From 5dc9dc626009c63d99c344e9703b8b8716d35572 Mon Sep 17 00:00:00 2001
From: luowei <lw@rock-chips.com>
Date: Thu, 10 Jul 2014 22:44:20 +0800
Subject: [PATCH] pinctrl:add rk3036 handler in pinctrl driver

---
 arch/arm/boot/dts/rk3036-pinctrl.dtsi  | 581 ++++++++++---------------
 drivers/pinctrl/pinctrl-rockchip.c     |  49 +++
 include/dt-bindings/pinctrl/rockchip.h |   5 +
 3 files changed, 276 insertions(+), 359 deletions(-)

diff --git a/arch/arm/boot/dts/rk3036-pinctrl.dtsi b/arch/arm/boot/dts/rk3036-pinctrl.dtsi
index 75ef0830a27e..d60816c4e41b 100755
--- a/arch/arm/boot/dts/rk3036-pinctrl.dtsi
+++ b/arch/arm/boot/dts/rk3036-pinctrl.dtsi
@@ -16,13 +16,10 @@
 		ranges;
 
 		gpio0: gpio0@2007c000 {
-			compatible = "rockchip,rk3036-gpio-bank0";
-			reg = <0x2007c000 0x100>,
-			      <0x2007c000 0>;
-
-			reg-names = "base", "pull_bank0";
+			compatible = "rockchip,gpio-bank";
+			reg = <0x2007c000 0x100>;
 			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
-			//clocks = <&clk_gates8 9>;
+			clocks = <&clk_gates8 9>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
@@ -48,7 +45,7 @@
 			compatible = "rockchip,gpio-bank";
 			reg = <0x20084000 0x100>;
 			interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
-			//clocks = <&clk_gates8 11>;
+			clocks = <&clk_gates8 11>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
@@ -61,7 +58,7 @@
 			compatible = "rockchip,gpio-bank";
 			reg = <0x20086000 0x100>;
 			interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;//127 = 160-32-1
-			//clocks = <&clk_gates8 12>;
+			clocks = <&clk_gates8 12>;
 
 			gpio-controller;
 			#gpio-cells = <2>;
@@ -82,35 +79,33 @@
 			bias-disable;
 		};
 
-		gpio1_uart0 {
+		gpio0_uart0 {
 			uart0_xfer: uart0-xfer {
 				rockchip,pins = <UART0_SIN>,
 						<UART0_SOUT>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				rockchip,voltage = <VALUE_VOL_DEFAULT>;
-				rockchip,drive = <VALUE_DRV_DEFAULT>;
-				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+				
 			};
 
 			uart0_cts: uart0-cts {
 				rockchip,pins = <UART0_CTSN>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				//rockchip,voltage = <VALUE_VOL_DEFAULT>;
-				rockchip,drive = <VALUE_DRV_DEFAULT>;
-				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+				
 			};
 
 			uart0_rts: uart0-rts {
 				rockchip,pins = <UART0_RTSN>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				//rockchip,voltage = <VALUE_VOL_DEFAULT>;
-				rockchip,drive = <VALUE_DRV_DEFAULT>;
-				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+				
 			};
 
 			uart0_rts_gpio: uart0-rts-gpio {
 				rockchip,pins = <FUNC_TO_GPIO(UART0_RTSN)>;
-				rockchip,drive = <VALUE_DRV_DEFAULT>;
+				rockchip,pull = <VALUE_PULL_DISABLE>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
 			};
 		};
 
@@ -119,9 +114,8 @@
 				rockchip,pins = <UART1_SIN>,
 						<UART1_SOUT>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				//rockchip,voltage = <VALUE_VOL_DEFAULT>;
-				rockchip,drive = <VALUE_DRV_DEFAULT>;
-				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+				
 			};
 
 		};
@@ -131,123 +125,112 @@
 				rockchip,pins = <UART2_SIN>,
 						<UART2_SOUT>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				//rockchip,voltage = <VALUE_VOL_DEFAULT>;
-				rockchip,drive = <VALUE_DRV_DEFAULT>;
-				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+				
 			};
 			/* no rts / cts for uart2 */
 		};
 
 
-		gpio1_i2c0 {
+		gpio0_i2c0 {
 			i2c0_sda:i2c0-sda {
 				rockchip,pins = <I2C0_SDA>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				//rockchip,voltage = <VALUE_VOL_DEFAULT>;
-				rockchip,drive = <VALUE_DRV_DEFAULT>;
-				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+				
 			};
 
 			i2c0_scl:i2c0-scl {
 				rockchip,pins = <I2C0_SCL>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				//rockchip,voltage = <VALUE_VOL_DEFAULT>;
-				rockchip,drive = <VALUE_DRV_DEFAULT>;
-				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+				
 			};
 
 			i2c0_gpio: i2c0-gpio {
 				rockchip,pins = <FUNC_TO_GPIO(I2C0_SDA)>, <FUNC_TO_GPIO(I2C0_SCL)>;
-				rockchip,drive = <VALUE_DRV_DEFAULT>;
+				rockchip,pull = <VALUE_PULL_DISABLE>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
 			};
 		};
 
-		gpio1_i2c1 {
+		gpio0_i2c1 {
 			i2c1_sda:i2c1-sda {
 				rockchip,pins = <I2C1_SDA>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				rockchip,voltage = <VALUE_VOL_DEFAULT>;
-				rockchip,drive = <VALUE_DRV_DEFAULT>;
-				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+				
 			};
 
 			i2c1_scl:i2c1-scl {
 				rockchip,pins = <I2C1_SCL>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				rockchip,voltage = <VALUE_VOL_DEFAULT>;
-				rockchip,drive = <VALUE_DRV_DEFAULT>;
-				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+				
 			};
 
 			i2c1_gpio: i2c1-gpio {
 				rockchip,pins = <FUNC_TO_GPIO(I2C1_SDA)>, <FUNC_TO_GPIO(I2C1_SCL)>;
-				rockchip,drive = <VALUE_DRV_DEFAULT>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
 			};
 		};
 
-		gpio1_i2c2 {
+		gpio2_i2c2 {
 			i2c2_sda:i2c2-sda {
 				rockchip,pins = <I2C2_SDA>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				//rockchip,voltage = <VALUE_VOL_DEFAULT>;
-				rockchip,drive = <VALUE_DRV_DEFAULT>;
-				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+				
 			};
 
 			i2c2_scl:i2c2-scl {
 				rockchip,pins = <I2C2_SCL>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				//rockchip,voltage = <VALUE_VOL_DEFAULT>;
-				rockchip,drive = <VALUE_DRV_DEFAULT>;
-				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+				
 			};
 
 			i2c2_gpio: i2c2-gpio {
 				rockchip,pins = <FUNC_TO_GPIO(I2C2_SDA)>, <FUNC_TO_GPIO(I2C2_SCL)>;
-				rockchip,drive = <VALUE_DRV_DEFAULT>;
+				rockchip,pull = <VALUE_PULL_DISABLE>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
 			};
 		};
 
-
 		gpio1_spi0 {
 			spi0_txd:spi0-txd {
 				rockchip,pins = <SPI0_TXD>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				//rockchip,voltage = <VALUE_VOL_DEFAULT>;
-				rockchip,drive = <VALUE_DRV_DEFAULT>;
-				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+				
 			};
 
 			spi0_rxd:spi0-rxd {
 				rockchip,pins = <SPI0_RXD>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				//rockchip,voltage = <VALUE_VOL_DEFAULT>;
-				rockchip,drive = <VALUE_DRV_DEFAULT>;
-				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+				
 			};
 
 			spi0_clk:spi0-clk {
 				rockchip,pins = <SPI0_CLK>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				//rockchip,voltage = <VALUE_VOL_DEFAULT>;
-				rockchip,drive = <VALUE_DRV_DEFAULT>;
-				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+				
 			};
 
 			spi0_cs0:spi0-cs0 {
 				rockchip,pins = <SPI0_CS0>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				//rockchip,voltage = <VALUE_VOL_DEFAULT>;
-				rockchip,drive = <VALUE_DRV_DEFAULT>;
-				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+				
 			};
 
 			spi0_cs1:spi0-cs1 {
 				rockchip,pins = <SPI0_CS1>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				//rockchip,voltage = <VALUE_VOL_DEFAULT>;
-				rockchip,drive = <VALUE_DRV_DEFAULT>;
-				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+				
 			};
 
 		};
@@ -256,91 +239,69 @@
 			hdmi_cec:hdmi-cec {
 				rockchip,pins = <HDMI_CEC>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				//rockchip,voltage = <VALUE_VOL_DEFAULT>;
-				rockchip,drive = <VALUE_DRV_8MA>;
+				//rockchip,drive = <VALUE_DRV_8MA>;
 			};
 
 			hdmi_sda:hdmi-sda {
 				rockchip,pins = <HDMI_SDA>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				//rockchip,voltage = <VALUE_VOL_DEFAULT>;
-				rockchip,drive = <VALUE_DRV_8MA>;
+				//rockchip,drive = <VALUE_DRV_8MA>;
 			};
 
 			hdmi_scl:hdmi-scl {
 				rockchip,pins = <HDMI_SCL>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				//rockchip,voltage = <VALUE_VOL_DEFAULT>;
-				rockchip,drive = <VALUE_DRV_8MA>;
+				//rockchip,drive = <VALUE_DRV_8MA>;
 			};
 
 			hdmi_hpd:hdmi-hpd {
 				rockchip,pins = <HDMI_HPD>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				//rockchip,voltage = <VALUE_VOL_DEFAULT>;
-				rockchip,drive = <VALUE_DRV_8MA>;
+				//rockchip,drive = <VALUE_DRV_8MA>;
 			};
 
 			hdmi_gpio: hdmi-gpio {
 				rockchip,pins = <FUNC_TO_GPIO(HDMI_CEC)>, <FUNC_TO_GPIO(HDMI_SDA)>, <FUNC_TO_GPIO(HDMI_SCL)>, <FUNC_TO_GPIO(HDMI_HPD)>;
-				rockchip,drive = <VALUE_DRV_DEFAULT>;
+				rockchip,pull = <VALUE_PULL_DISABLE>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
 			};
-		};
+		};		
 
 		gpio1_i2s0 {
-
 			i2s0_mclk:i2s0-mclk {
 				rockchip,pins = <I2S0_MCLK>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				//rockchip,voltage = <VALUE_VOL_DEFAULT>;
-				rockchip,drive = <VALUE_DRV_8MA>;
-				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
-
+				//rockchip,drive = <VALUE_DRV_8MA>;
 			};
 
 			i2s0_sclk:i2s0-sclk {
 				rockchip,pins = <I2S0_SCLK>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				//rockchip,voltage = <VALUE_VOL_DEFAULT>;
-				rockchip,drive = <VALUE_DRV_8MA>;
-				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
-
+				//rockchip,drive = <VALUE_DRV_8MA>;
 			};
 
 			i2s0_lrckrx:i2s0-lrckrx {
 				rockchip,pins = <I2S0_LRCKRX>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				//rockchip,voltage = <VALUE_VOL_DEFAULT>;
-				rockchip,drive = <VALUE_DRV_8MA>;
-				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
-
+				//rockchip,drive = <VALUE_DRV_8MA>;
 			};
 
 			i2s0_lrcktx:i2s0-lrcktx {
 				rockchip,pins = <I2S0_LRCKTX>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				//rockchip,voltage = <VALUE_VOL_DEFAULT>;
-				rockchip,drive = <VALUE_DRV_8MA>;
-				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
-
+				//rockchip,drive = <VALUE_DRV_8MA>;
 			};
 
 			i2s0_sdo:i2s0-sdo {
 				rockchip,pins = <I2S0_SDO>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				//rockchip,voltage = <VALUE_VOL_DEFAULT>;
-				rockchip,drive = <VALUE_DRV_8MA>;
-				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
-
+				//rockchip,drive = <VALUE_DRV_8MA>;
 			};
 
 			i2s0_sdi:i2s0-sdi {
 				rockchip,pins = <I2S0_SDI>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				//rockchip,voltage = <VALUE_VOL_DEFAULT>;
-				rockchip,drive = <VALUE_DRV_8MA>;
-				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
-
+				//rockchip,drive = <VALUE_DRV_8MA>;
 			};
 
 			i2s0_gpio: i2s0-gpio {
@@ -350,316 +311,218 @@
 						<FUNC_TO_GPIO(I2S0_LRCKTX)>,
 						<FUNC_TO_GPIO(I2S0_SDO)>,
 						<FUNC_TO_GPIO(I2S0_SDI)>;
-				rockchip,drive = <VALUE_DRV_8MA>;
+				rockchip,pull = <VALUE_PULL_DISABLE>;
+				//rockchip,drive = <VALUE_DRV_8MA>;
 			};
 		};
-	
 
 		gpio1_spdif {
 			spdif_tx: spdif-tx {
 				rockchip,pins = <SPDIF_TX>;
 				rockchip,pull = <VALUE_PULL_DISABLE>;
-				//rockchip,voltage = <VALUE_VOL_DEFAULT>;
-				rockchip,drive = <VALUE_DRV_DEFAULT>;
-				//rockchip,tristate = <VALUE_TRI_DEFAULT>;
-
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
 			};
 		};
 		
 		gpio1_emmc0 {
-                        emmc0_clk: emmc0-clk {
-                                rockchip,pins = <EMMC_CLKOUT>;
-                                rockchip,pull = <VALUE_PULL_DISABLE>;
-                                rockchip,drive = <VALUE_DRV_DEFAULT>;
-                                //rockchip,tristate = <VALUE_TRI_DEFAULT>;
-                        };
-
-                        emmc0_cmd: emmc0-cmd {
-                                rockchip,pins = <EMMC_CMD>;
-                                rockchip,pull = <VALUE_PULL_UP>;
-                                rockchip,drive = <VALUE_DRV_DEFAULT>;
-                                //rockchip,tristate = <VALUE_TRI_DEFAULT>;
-                        };
-
-                    
-                        emmc0_bus1: emmc0-bus-width1 {
-                                rockchip,pins = <EMMC_D0>;
-                                rockchip,pull = <VALUE_PULL_UP>;
-                                rockchip,drive = <VALUE_DRV_DEFAULT>;
-                                //rockchip,tristate = <VALUE_TRI_DEFAULT>;
-                        };
-
-                        emmc0_bus4: emmc0-bus-width4 {
-                                rockchip,pins = <EMMC_D0>,
-                                                <EMMC_D1>,
-                                                <EMMC_D2 >,
-                                                <EMMC_D3>;
-                                rockchip,pull = <VALUE_PULL_UP>;
-                                rockchip,drive = <VALUE_DRV_DEFAULT>;
-                                //rockchip,tristate = <VALUE_TRI_DEFAULT>;
-                        };
-                };
-
-		 gpio1_sdmmc0 {
-                        sdmmc0_clk: sdmmc0-clk {
-                                rockchip,pins = <MMC0_CLKOUT>;
-                                rockchip,pull = <VALUE_PULL_DISABLE>;
-                                rockchip,drive = <VALUE_DRV_DEFAULT>;
-                                //rockchip,tristate = <VALUE_TRI_DEFAULT>;
-                        };
-
-                        sdmmc0_cmd: sdmmc0-cmd {
-                                rockchip,pins = <MMC0_CMD>;
-                                rockchip,pull = <VALUE_PULL_UP>;
-                                rockchip,drive = <VALUE_DRV_DEFAULT>;
-                                //rockchip,tristate = <VALUE_TRI_DEFAULT>;
-                        };
-
-                        sdmmc0_dectn: sdmmc0-dectn{
-                                rockchip,pins = <MMC0_DETN>;
-                                rockchip,pull = <VALUE_PULL_UP>;
-                                rockchip,drive = <VALUE_DRV_DEFAULT>;
-                                //rockchip,tristate = <VALUE_TRI_DEFAULT>;
-                        };
-
-
-                        sdmmc0_bus1: sdmmc0-bus-width1 {
-                                rockchip,pins = <MMC0_D0>;
-                                rockchip,pull = <VALUE_PULL_UP>;
-                                rockchip,drive = <VALUE_DRV_DEFAULT>;
-                                //rockchip,tristate = <VALUE_TRI_DEFAULT>;
-                        };
-
-                        sdmmc0_bus4: sdmmc0-bus-width4 {
-                                rockchip,pins = <MMC0_D0>,
-                                                <MMC0_D1>,
-                                                <MMC0_D2>,
-                                                <MMC0_D3>;
-                                rockchip,pull = <VALUE_PULL_UP>;
-                                rockchip,drive = <VALUE_DRV_DEFAULT>;
-                                //rockchip,tristate = <VALUE_TRI_DEFAULT>;
-                        };
-
-                        sdmmc0_gpio: sdmmc0_gpio{
-                                rockchip,pins =
-                                        <GPIO1_B7>,  //CMD
-                                        <GPIO1_C0>,  //CLK
-                                        <GPIO1_C1>,  //DET
-                                        <GPIO1_C2>,  //D0
-                                        <GPIO1_C3>,  //D1
-					<GPIO1_C4>,  //D2
-                                        <GPIO1_C5>;  //D3
-                                rockchip,pull = <VALUE_PULL_UP>;
-                                rockchip,drive = <VALUE_DRV_DEFAULT>;
-                                //rockchip,tristate = <VALUE_TRI_DEFAULT>;
-                        };
-
-                };
-		gpio0_sdio0 {
+			emmc0_clk: emmc0-clk {
+				rockchip,pins = <EMMC_CLKOUT>;
+				rockchip,pull = <VALUE_PULL_DISABLE>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
 
-                sdio0_clk: sdio0_clk {
-                rockchip,pins = <MMC1_CLKOUT>;
-                rockchip,pull = <VALUE_PULL_DISABLE>;
-                rockchip,drive = <VALUE_DRV_DEFAULT>;
-                //rockchip,tristate = <VALUE_TRI_DEFAULT>;
-                };
-
-                sdio0_cmd: sdio0_cmd {
-                        rockchip,pins = <MMC1_CMD>;
-                        rockchip,pull = <VALUE_PULL_UP>;
-                        rockchip,drive = <VALUE_DRV_DEFAULT>;
-                        //rockchip,tristate = <VALUE_TRI_DEFAULT>;
-                };
-
-                sdio0_bus1: sdio0-bus-width1 {
-                        rockchip,pins = <MMC1_D0>;
-                        rockchip,pull = <VALUE_PULL_UP>;
-                        rockchip,drive = <VALUE_DRV_DEFAULT>;
-                        //rockchip,tristate = <VALUE_TRI_DEFAULT>;
-                };
-
-                sdio0_bus4: sdio0-bus-width4 {
-                        rockchip,pins = <MMC1_D0>,
-                        <MMC1_D1>,
-                        <MMC1_D2>,
-                        <MMC1_D3>;
-                        rockchip,pull = <VALUE_PULL_UP>;
-                        rockchip,drive = <VALUE_DRV_DEFAULT>;
-                        //rockchip,tristate = <VALUE_TRI_DEFAULT>;
-                };
-
-                sdio0_gpio: sdio0-all-gpio{
-                                        rockchip,pins =
-                                                <GPIO0_B1>,   //CLK
-                                                <GPIO0_B0>,   //CMD
-                                                <GPIO0_B3>,   //DO
-                                                <GPIO0_B4>,   //D1
-                                                <GPIO0_B5>,   //D2
-                                                <GPIO0_B6>;   //D3
-                                        rockchip,pull = <VALUE_PULL_UP>;
-                                        rockchip,drive = <VALUE_DRV_DEFAULT>;
-                                        //rockchip,tristate = <VALUE_TRI_DEFAULT>;
-                                };
-                };
-		gpio0_pwm{
+			};
 
-                  	pwm0_pin:pwm0 {
-                                rockchip,pins = <PWM0>;
-                                rockchip,pull = <VALUE_PULL_DISABLE>;
-                                rockchip,drive = <VALUE_DRV_DEFAULT>;
-                                //rockchip,tristate = <VALUE_TRI_DEFAULT>;
-                        };
-
-                        pwm1_pin:pwm1 {
-                                rockchip,pins = <PWM1>;
-                                rockchip,pull = <VALUE_PULL_DISABLE>;
-                                rockchip,drive = <VALUE_DRV_DEFAULT>;
-                                //rockchip,tristate = <VALUE_TRI_DEFAULT>;
-                        };
-
-                        pwm2_pin:pwm2 {
-                                rockchip,pins = <PWM2>;
-                                rockchip,pull = <VALUE_PULL_DISABLE>;
-                                rockchip,drive = <VALUE_DRV_DEFAULT>;
-                                //rockchip,tristate = <VALUE_TRI_DEFAULT>;
-                        };
-                  	
-			pwm3_pin:pwm3 {
-                                rockchip,pins = <PWM3(IR)>;
-                                rockchip,pull = <VALUE_PULL_DISABLE>;
-                                rockchip,drive = <VALUE_DRV_DEFAULT>;
-                                //rockchip,tristate = <VALUE_TRI_DEFAULT>;
-                        };
-		};
+			emmc0_cmd: emmc0-cmd {
+				rockchip,pins = <EMMC_CMD>;
+				rockchip,pull = <VALUE_PULL_UP>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
 
-		vol_domain {
-			ap0_vcc:ap0-vcc {
-				rockchip,pins = <VIRTUAL_PIN_FOR_AP0_VCC>;
-				rockchip,voltage = <VALUE_VOL_DEFAULT>;
 			};
-			
-			ap1_vcc:ap1-vcc {
-				rockchip,pins = <VIRTUAL_PIN_FOR_AP1_VCC>;
-				rockchip,voltage = <VALUE_VOL_DEFAULT>;
-			};
-			
-			cif_vcc:cif-vcc {
-				rockchip,pins = <VIRTUAL_PIN_FOR_CIF_VCC>;
-				rockchip,voltage = <VALUE_VOL_DEFAULT>;
+
+
+			emmc0_bus1: emmc0-bus-width1 {
+				rockchip,pins = <EMMC_D0>;
+				rockchip,pull = <VALUE_PULL_UP>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+
 			};
 
-			flash_vcc:flash-vcc {
-				rockchip,pins = <VIRTUAL_PIN_FOR_FLASH_VCC>;
-				rockchip,voltage = <VALUE_VOL_DEFAULT>;
+			emmc0_bus4: emmc0-bus-width4 {
+				rockchip,pins = <EMMC_D0>,
+					        <EMMC_D1>,
+					        <EMMC_D2 >,
+					        <EMMC_D3>;
+				rockchip,pull = <VALUE_PULL_UP>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+
 			};
-			
-			vccio0_vcc:vccio0-vcc {
-				rockchip,pins = <VIRTUAL_PIN_FOR_VCCIO0_VCC>;
-				rockchip,voltage = <VALUE_VOL_DEFAULT>; 
+		};
+
+		gpio1_sdmmc0 {
+			sdmmc0_clk: sdmmc0-clk {
+				rockchip,pins = <MMC0_CLKOUT>;
+				rockchip,pull = <VALUE_PULL_DISABLE>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+
 			};
 
-			vccio1_vcc:vccio1-vcc {
-				rockchip,pins = <VIRTUAL_PIN_FOR_VCCIO1_VCC>;
-				rockchip,voltage = <VALUE_VOL_DEFAULT>; 
+			sdmmc0_cmd: sdmmc0-cmd {
+				rockchip,pins = <MMC0_CMD>;
+				rockchip,pull = <VALUE_PULL_UP>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
 			};
 
-			lcdc0_vcc:lcdc0-vcc {
-				rockchip,pins = <VIRTUAL_PIN_FOR_LCDC0_VCC>;
-				rockchip,voltage = <VALUE_VOL_DEFAULT>;
+			sdmmc0_dectn: sdmmc0-dectn{
+				rockchip,pins = <MMC0_DETN>;
+				rockchip,pull = <VALUE_PULL_UP>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+
 			};
 
-			lcdc1_vcc:lcdc1-vcc {
-				rockchip,pins = <VIRTUAL_PIN_FOR_LCDC1_VCC>;
-				rockchip,voltage = <VALUE_VOL_DEFAULT>;
+
+			sdmmc0_bus1: sdmmc0-bus-width1 {
+				rockchip,pins = <MMC0_D0>;
+				rockchip,pull = <VALUE_PULL_UP>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+
 			};
 
-			
-			
-			ap0_vcc_18:ap0-vcc-18 {
-				rockchip,pins = <VIRTUAL_PIN_FOR_AP0_VCC>;
-				rockchip,voltage = <VALUE_VOL_1V8>;
+			sdmmc0_bus4: sdmmc0-bus-width4 {
+				rockchip,pins = <MMC0_D0>,
+						<MMC0_D1>,
+						<MMC0_D2>,
+						<MMC0_D3>;
+				rockchip,pull = <VALUE_PULL_UP>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+
 			};
-			
-			ap1_vcc_18:ap1-vcc-18 {
-				rockchip,pins = <VIRTUAL_PIN_FOR_AP1_VCC>;
-				rockchip,voltage = <VALUE_VOL_1V8>;
+
+			sdmmc0_gpio: sdmmc0_gpio{
+				rockchip,pins =
+					<GPIO1_B7>,  //CMD
+					<GPIO1_C0>,  //CLK
+					<GPIO1_C1>,  //DET
+					<GPIO1_C2>,  //D0
+					<GPIO1_C3>,  //D1
+					<GPIO1_C4>,  //D2
+					<GPIO1_C5>;  //D3
+				rockchip,pull = <VALUE_PULL_UP>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+
 			};
-			
-			cif_vcc_18:cif-vcc-18 {
-				rockchip,pins = <VIRTUAL_PIN_FOR_CIF_VCC>;
-				rockchip,voltage = <VALUE_VOL_1V8>;
+
+		};
+
+		gpio0_sdio0 {
+			sdio0_clk: sdio0_clk {
+				rockchip,pins = <MMC1_CLKOUT>;
+				rockchip,pull = <VALUE_PULL_DISABLE>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+
 			};
 
-			flash_vcc_18:flash-vcc-18 {
-				rockchip,pins = <VIRTUAL_PIN_FOR_FLASH_VCC>;
-				rockchip,voltage = <VALUE_VOL_1V8>;
+			sdio0_cmd: sdio0_cmd {
+				rockchip,pins = <MMC1_CMD>;
+				rockchip,pull = <VALUE_PULL_UP>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+
 			};
-			
-			vccio0_vcc_18:vccio0-vcc-18 {
-				rockchip,pins = <VIRTUAL_PIN_FOR_VCCIO0_VCC>;
-				rockchip,voltage = <VALUE_VOL_1V8>; 
+
+			sdio0_bus1: sdio0-bus-width1 {
+				rockchip,pins = <MMC1_D0>;
+				rockchip,pull = <VALUE_PULL_UP>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+
 			};
 
-			vccio1_vcc_18:vccio1-vcc-18 {
-				rockchip,pins = <VIRTUAL_PIN_FOR_VCCIO1_VCC>;
-				rockchip,voltage = <VALUE_VOL_1V8>; 
+			sdio0_bus4: sdio0-bus-width4 {
+				rockchip,pins = <MMC1_D0>,
+						<MMC1_D1>,
+						<MMC1_D2>,
+						<MMC1_D3>;
+				rockchip,pull = <VALUE_PULL_UP>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+
 			};
 
-			lcdc0_vcc_18:lcdc0-vcc-18 {
-				rockchip,pins = <VIRTUAL_PIN_FOR_LCDC0_VCC>;
-				rockchip,voltage = <VALUE_VOL_1V8>;
+			sdio0_gpio: sdio0-all-gpio{
+				rockchip,pins =
+				        <GPIO0_B1>,   //CLK
+				        <GPIO0_B0>,   //CMD
+				        <GPIO0_B3>,   //DO
+				        <GPIO0_B4>,   //D1
+				        <GPIO0_B5>,   //D2
+				        <GPIO0_B6>;   //D3
+				rockchip,pull = <VALUE_PULL_UP>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+
 			};
+		};
+                
+		gpio0_pwm{
+			pwm0_pin:pwm0 {
+				rockchip,pins = <PWM0>;
+				rockchip,pull = <VALUE_PULL_DISABLE>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
 
-			lcdc1_vcc_18:lcdc1-vcc-18 {
-				rockchip,pins = <VIRTUAL_PIN_FOR_LCDC1_VCC>;
-				rockchip,voltage = <VALUE_VOL_1V8>;
 			};
 
-			
+			pwm1_pin:pwm1 {
+				rockchip,pins = <PWM1>;
+				rockchip,pull = <VALUE_PULL_DISABLE>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
 
-			ap0_vcc_33:ap0-vcc-33 {
-				rockchip,pins = <VIRTUAL_PIN_FOR_AP0_VCC>;
-				rockchip,voltage = <VALUE_VOL_3V3>;
 			};
-			
-			ap1_vcc_33:ap1-vcc-33 {
-				rockchip,pins = <VIRTUAL_PIN_FOR_AP1_VCC>;
-				rockchip,voltage = <VALUE_VOL_3V3>;
+
+			pwm2_pin:pwm2 {
+				rockchip,pins = <PWM2>;
+				rockchip,pull = <VALUE_PULL_DISABLE>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+
 			};
-			
-			cif_vcc_33:cif-vcc-33 {
-				rockchip,pins = <VIRTUAL_PIN_FOR_CIF_VCC>;
-				rockchip,voltage = <VALUE_VOL_3V3>;
+
+			pwm3_pin:pwm3 {
+				rockchip,pins = <PWM3(IR)>;
+				rockchip,pull = <VALUE_PULL_DISABLE>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+
 			};
+		};
 
-			flash_vcc_33:flash-vcc-33 {
-				rockchip,pins = <VIRTUAL_PIN_FOR_FLASH_VCC>;
-				rockchip,voltage = <VALUE_VOL_3V3>;
+		gpio2_gmac {		
+			mac_txpins: mac-txpins {
+				rockchip,pins = <MAC_TXD0>, <MAC_TXD1>,  <MAC_TXEN>;
+				rockchip,pull = <VALUE_PULL_DISABLE>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+				
 			};
 			
-			vccio0_vcc_33:vccio0-vcc-33 {
-				rockchip,pins = <VIRTUAL_PIN_FOR_VCCIO0_VCC>;
-				rockchip,voltage = <VALUE_VOL_3V3>; 
+			mac_rxpins: mac-rxpins {
+				rockchip,pins = <MAC_RXD0>, <MAC_RXD1>,<MAC_RXER>;
+				rockchip,pull = <VALUE_PULL_DISABLE>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+				
 			};
-
-			vccio1_vcc_33:vccio1-vcc-33 {
-				rockchip,pins = <VIRTUAL_PIN_FOR_VCCIO1_VCC>;
-				rockchip,voltage = <VALUE_VOL_3V3>; 
+			
+			mac_crs: mac-crs {
+				rockchip,pins = <MAC_CRS>;
+				rockchip,pull = <VALUE_PULL_DISABLE>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+				
 			};
-
-			lcdc0_vcc_33:lcdc0-vcc-33 {
-				rockchip,pins = <VIRTUAL_PIN_FOR_LCDC0_VCC>;
-				rockchip,voltage = <VALUE_VOL_3V3>;
+			
+			mac_mdpins: mac-mdpins {
+				rockchip,pins = <MAC_MDIO>, <MAC_MDC>;
+				rockchip,pull = <VALUE_PULL_DISABLE>;
+				//rockchip,drive = <VALUE_DRV_DEFAULT>;
+				
 			};
+		};
 
-			lcdc1_vcc_33:lcdc1-vcc-33 {
-				rockchip,pins = <VIRTUAL_PIN_FOR_LCDC1_VCC>;
-				rockchip,voltage = <VALUE_VOL_3V3>;
-			};
 
+		//to add 
 
-		};
+		
+	};	
 
-		//to add
-	};
 };
diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index acb7a0916335..8a059b8c9498 100755
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -81,6 +81,7 @@ enum rockchip_pinctrl_type {
 	RK3066B,
 	RK3188,
 	RK3288,
+	RK3036,
 };
 
 enum rockchip_pin_bank_type {
@@ -1211,6 +1212,25 @@ static void rk3288_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
 }
 
 
+static void rk3036_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
+				    int pin_num, void __iomem **reg, u8 *bit)
+{
+	struct rockchip_pinctrl *info = bank->drvdata;
+	void __iomem *reg_base;
+	int pin = pin_num;
+	
+	*reg = info->reg_pull;
+	*reg += bank->bank_num * RK3036_PULL_BANK_STRIDE;
+	*reg += (pin_num / RK3036_PULL_PINS_PER_REG) * 4;
+
+	*bit = pin_num % RK3036_PULL_PINS_PER_REG;
+
+	reg_base = info->reg_pull;
+
+	DBG_PINCTRL("%s:GPIO%d-%d, pull_reg=0x%x, bit=%d\n", __func__, bank->bank_num, pin_num, *reg - reg_base, *bit);
+}
+
+
 #if 0
 static int rockchip_get_pull(struct rockchip_pin_bank *bank, int pin_num)
 {
@@ -1279,6 +1299,7 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
 
 	switch (ctrl->type) {
 	case RK2928:
+	case RK3036:
 		spin_lock_irqsave(&bank->slock, flags);
 
 		data = BIT(bit + 16);
@@ -1337,6 +1358,7 @@ static bool rockchip_pinconf_pull_valid(struct rockchip_pin_ctrl *ctrl,
 {
 	switch (ctrl->type) {
 	case RK2928:
+	case RK3036:
 		return (pull == PIN_CONFIG_BIAS_PULL_PIN_DEFAULT ||
 					pull == PIN_CONFIG_BIAS_DISABLE);
 	case RK3066B:
@@ -1685,6 +1707,10 @@ static int _rockchip_pinconf_set(struct rockchip_pin_bank *bank,
 
 		break;
 
+		case RK3036:
+		//to do
+		break;
+
 		default:
 		break;
 	}
@@ -3051,6 +3077,7 @@ static int rockchip_pinctrl_probe(struct platform_device *pdev)
 			break;
 
 		case RK3188:
+		case RK3036:
 			res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 			info->reg_base = devm_ioremap_resource(&pdev->dev, res);
 			if (IS_ERR(info->reg_base))
@@ -3243,6 +3270,26 @@ static struct rockchip_pin_ctrl rk3288_pin_ctrl = {
 };
 
 
+static struct rockchip_pin_bank rk3036_pin_banks[] = {
+	PIN_BANK(0, 32, "gpio0"),
+	PIN_BANK(1, 32, "gpio1"),
+	PIN_BANK(2, 32, "gpio2"),
+	
+	PIN_BANK(15, 32, "gpio15"),//virtual bank
+};
+
+static struct rockchip_pin_ctrl rk3036_pin_ctrl = {
+		.pin_banks		= rk3036_pin_banks,
+		.nr_banks		= ARRAY_SIZE(rk3036_pin_banks),
+		.label			= "rk3036-GPIO",
+		.type			= RK3036,
+		.mux_offset		= 0xa8,
+		.pull_calc_reg	= rk3036_calc_pull_reg_and_bit,
+};
+
+
+
+
 static const struct of_device_id rockchip_pinctrl_dt_match[] = {
 	{ .compatible = "rockchip,rk2928-pinctrl",
 		.data = (void *)&rk2928_pin_ctrl },
@@ -3254,6 +3301,8 @@ static const struct of_device_id rockchip_pinctrl_dt_match[] = {
 		.data = (void *)&rk3188_pin_ctrl },
 	{ .compatible = "rockchip,rk3288-pinctrl",
 		.data = (void *)&rk3288_pin_ctrl },
+	{ .compatible = "rockchip,rk3036-pinctrl",
+		.data = (void *)&rk3036_pin_ctrl },
 	{},
 };
 MODULE_DEVICE_TABLE(of, rockchip_pinctrl_dt_match);
diff --git a/include/dt-bindings/pinctrl/rockchip.h b/include/dt-bindings/pinctrl/rockchip.h
index faf5fc4646a0..8735f39407bf 100755
--- a/include/dt-bindings/pinctrl/rockchip.h
+++ b/include/dt-bindings/pinctrl/rockchip.h
@@ -77,6 +77,11 @@
 #define RK3188_PULL_PINS_PER_REG	8
 #define RK3188_PULL_BANK_STRIDE		16
 
+#define RK3036_PULL_BITS_PER_PIN	1
+#define RK3036_PULL_PINS_PER_REG	16
+#define RK3036_PULL_BANK_STRIDE		8
+
+
 
 /*warning:don not chang the following value*/
 #define VALUE_PULL_NORMAL	0
-- 
2.34.1