From 5f33cbc414937eb39cefb031c2e5b11be8dc9237 Mon Sep 17 00:00:00 2001 From: Lang Hames Date: Tue, 14 Jan 2014 19:56:36 +0000 Subject: [PATCH] Add FPExt option to CCValAssign::LocInfo. When generating calling-convention promotion code, Tablegen will now select FPExt for floating point promotions (previously it had returned AExt, which is not valid for floating point types). Any out-of-tree targets that were relying on AExt being returned for FP promotions will need to update their code check for FPExt instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199252 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/CodeGen/CallingConvLower.h | 1 + lib/Target/AArch64/AArch64ISelLowering.cpp | 6 ++++-- lib/Target/Sparc/SparcISelLowering.cpp | 4 +++- lib/Target/X86/X86FastISel.cpp | 2 ++ lib/Target/X86/X86ISelLowering.cpp | 3 +++ utils/TableGen/CallingConvEmitter.cpp | 19 ++++++++++++------- 6 files changed, 25 insertions(+), 10 deletions(-) diff --git a/include/llvm/CodeGen/CallingConvLower.h b/include/llvm/CodeGen/CallingConvLower.h index a18f433bda4..f824e73433a 100644 --- a/include/llvm/CodeGen/CallingConvLower.h +++ b/include/llvm/CodeGen/CallingConvLower.h @@ -39,6 +39,7 @@ public: VExt, // The value is vector-widened in the location. // FIXME: Not implemented yet. Code that uses AExt to mean // vector-widen should be fixed to use VExt instead. + FPExt, // The floating-point value is fp-extended in the location. Indirect // The location contains pointer to the value. // TODO: a subset of the value is in the location. }; diff --git a/lib/Target/AArch64/AArch64ISelLowering.cpp b/lib/Target/AArch64/AArch64ISelLowering.cpp index 317a41a05f4..e443bd5e55b 100644 --- a/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -1220,7 +1220,8 @@ AArch64TargetLowering::LowerFormalArguments(SDValue Chain, break; case CCValAssign::SExt: case CCValAssign::ZExt: - case CCValAssign::AExt: { + case CCValAssign::AExt: + case CCValAssign::FPExt: { unsigned DestSize = VA.getValVT().getSizeInBits(); unsigned DestSubReg; @@ -1441,7 +1442,8 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI, case CCValAssign::Full: break; case CCValAssign::SExt: case CCValAssign::ZExt: - case CCValAssign::AExt: { + case CCValAssign::AExt: + case CCValAssign::FPExt: { unsigned SrcSize = VA.getValVT().getSizeInBits(); unsigned SrcSubReg; diff --git a/lib/Target/Sparc/SparcISelLowering.cpp b/lib/Target/Sparc/SparcISelLowering.cpp index fce2c0d5b03..3abccdef6ef 100644 --- a/lib/Target/Sparc/SparcISelLowering.cpp +++ b/lib/Target/Sparc/SparcISelLowering.cpp @@ -271,6 +271,7 @@ SparcTargetLowering::LowerReturn_64(SDValue Chain, // Integer return values must be sign or zero extended by the callee. switch (VA.getLocInfo()) { + case CCValAssign::Full: break; case CCValAssign::SExt: OutVal = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), OutVal); break; @@ -279,8 +280,9 @@ SparcTargetLowering::LowerReturn_64(SDValue Chain, break; case CCValAssign::AExt: OutVal = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), OutVal); - default: break; + default: + llvm_unreachable("Unknown loc info!"); } // The custom bit on an i32 return value indicates that it should be passed diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp index 7b2d1d7776f..9fdc58a3116 100644 --- a/lib/Target/X86/X86FastISel.cpp +++ b/lib/Target/X86/X86FastISel.cpp @@ -2111,6 +2111,8 @@ bool X86FastISel::DoSelectCall(const Instruction *I, const char *MemIntName) { // FIXME: Indirect doesn't need extending, but fast-isel doesn't fully // support this. return false; + case CCValAssign::FPExt: + llvm_unreachable("Unexpected loc info!"); } if (VA.isRegLoc()) { diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 677cdbdee8f..ea78d9f88b0 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -1840,6 +1840,9 @@ X86TargetLowering::LowerReturn(SDValue Chain, else if (VA.getLocInfo() == CCValAssign::BCvt) ValToCopy = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), ValToCopy); + assert(VA.getLocInfo() != CCValAssign::FPExt && + "Unexpected FP-extend for return value."); + // If this is x86-64, and we disabled SSE, we can't return FP values, // or SSE or MMX vectors. if ((ValVT == MVT::f32 || ValVT == MVT::f64 || diff --git a/utils/TableGen/CallingConvEmitter.cpp b/utils/TableGen/CallingConvEmitter.cpp index 94f3c6518ca..e316e86cd2c 100644 --- a/utils/TableGen/CallingConvEmitter.cpp +++ b/utils/TableGen/CallingConvEmitter.cpp @@ -193,13 +193,18 @@ void CallingConvEmitter::EmitAction(Record *Action, O << IndentStr << "return false;\n"; } else if (Action->isSubClassOf("CCPromoteToType")) { Record *DestTy = Action->getValueAsDef("DestTy"); - O << IndentStr << "LocVT = " << getEnumName(getValueType(DestTy)) <<";\n"; - O << IndentStr << "if (ArgFlags.isSExt())\n" - << IndentStr << IndentStr << "LocInfo = CCValAssign::SExt;\n" - << IndentStr << "else if (ArgFlags.isZExt())\n" - << IndentStr << IndentStr << "LocInfo = CCValAssign::ZExt;\n" - << IndentStr << "else\n" - << IndentStr << IndentStr << "LocInfo = CCValAssign::AExt;\n"; + MVT::SimpleValueType DestVT = getValueType(DestTy); + O << IndentStr << "LocVT = " << getEnumName(DestVT) <<";\n"; + if (MVT(DestVT).isFloatingPoint()) { + O << IndentStr << "LocInfo = CCValAssign::FPExt;\n"; + } else { + O << IndentStr << "if (ArgFlags.isSExt())\n" + << IndentStr << IndentStr << "LocInfo = CCValAssign::SExt;\n" + << IndentStr << "else if (ArgFlags.isZExt())\n" + << IndentStr << IndentStr << "LocInfo = CCValAssign::ZExt;\n" + << IndentStr << "else\n" + << IndentStr << IndentStr << "LocInfo = CCValAssign::AExt;\n"; + } } else if (Action->isSubClassOf("CCBitConvertToType")) { Record *DestTy = Action->getValueAsDef("DestTy"); O << IndentStr << "LocVT = " << getEnumName(getValueType(DestTy)) <<";\n"; -- 2.34.1