From 5f3c2e566f946db6c95234e7c1de73bef8f8afe0 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 14 Sep 2001 06:20:10 +0000 Subject: [PATCH] Split Register specific stuff out from TargetMachine.h to RegInfo.h Get rid of unneccesary #includes from TargetMachine.h git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@568 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Target/InstInfo.h | 5 +- include/llvm/Target/Machine.h | 107 -------------------------------- include/llvm/Target/RegInfo.h | 99 +++++++++++++++++++++++++++++ include/llvm/Target/SchedInfo.h | 3 +- 4 files changed, 105 insertions(+), 109 deletions(-) create mode 100644 include/llvm/Target/RegInfo.h diff --git a/include/llvm/Target/InstInfo.h b/include/llvm/Target/InstInfo.h index e2d7c8e5311..87bd8bd2736 100644 --- a/include/llvm/Target/InstInfo.h +++ b/include/llvm/Target/InstInfo.h @@ -8,9 +8,12 @@ #define LLVM_TARGET_INSTINFO_H #include "llvm/Target/Machine.h" +#include "llvm/Support/DataTypes.h" + +class MachineInstrDescriptor; -typedef int InstrSchedClass; +typedef int InstrSchedClass; // Global variable holding an array of descriptors for machine instructions. // The actual object needs to be created separately for each target machine. diff --git a/include/llvm/Target/Machine.h b/include/llvm/Target/Machine.h index 88fce7731eb..17ef288302b 100644 --- a/include/llvm/Target/Machine.h +++ b/include/llvm/Target/Machine.h @@ -9,14 +9,8 @@ #include "llvm/Target/Data.h" #include "llvm/Support/NonCopyable.h" -#include "llvm/Support/DataTypes.h" #include -#include -#include -#include -class StructType; -struct MachineInstrDescriptor; class TargetMachine; class MachineInstrInfo; @@ -27,107 +21,6 @@ class MachineInstrInfo; typedef int MachineOpCode; typedef int OpCodeMask; -static const unsigned MAX_OPCODE_SIZE = 16; - -//----------------------------------------------------------------------------- -// class MachineRegClassInfo -// -// Purpose: -// Interface to description of machine register class (e.g., int reg class -// float reg class etc) -// -//-------------------------------------------------------------------------- - -class IGNode; -class MachineRegClassInfo { -protected: - const unsigned RegClassID; // integer ID of a reg class - const unsigned NumOfAvailRegs; // # of avail for coloring -without SP etc. - const unsigned NumOfAllRegs; // # of all registers -including SP,g0 etc. - -public: - - inline unsigned getRegClassID() const { return RegClassID; } - inline unsigned getNumOfAvailRegs() const { return NumOfAvailRegs; } - inline unsigned getNumOfAllRegs() const { return NumOfAllRegs; } - - - - // This method should find a color which is not used by neighbors - // (i.e., a false position in IsColorUsedArr) and - virtual void colorIGNode(IGNode * Node, bool IsColorUsedArr[] ) const = 0; - - - MachineRegClassInfo(const unsigned ID, const unsigned NVR, - const unsigned NAR): RegClassID(ID), NumOfAvailRegs(NVR), - NumOfAllRegs(NAR) - { } // empty constructor - -}; - - - - -//--------------------------------------------------------------------------- -// class MachineRegInfo -// -// Purpose: -// Interface to register info of target machine -// -//-------------------------------------------------------------------------- - -class LiveRangeInfo; -class Method; -class Instruction; -class LiveRange; -class AddedInstrns; -class MachineInstr; -typedef hash_map AddedInstrMapType; - -// A vector of all machine register classes -typedef vector MachineRegClassArrayType; - - -class MachineRegInfo : public NonCopyableV { - -protected: - - MachineRegClassArrayType MachineRegClassArr; - - -public: - - - inline unsigned int getNumOfRegClasses() const { - return MachineRegClassArr.size(); - } - - const MachineRegClassInfo *const getMachineRegClass(unsigned i) const { - return MachineRegClassArr[i]; - } - - - virtual unsigned getRegClassIDOfValue (const Value *const Val) const = 0; - - virtual void colorArgs(const Method *const Meth, - LiveRangeInfo & LRI) const = 0; - - virtual void colorCallArgs(vector & CallInstrList, - LiveRangeInfo& LRI, - AddedInstrMapType& AddedInstrMap ) const = 0; - - virtual int getUnifiedRegNum(int RegClassID, int reg) const = 0; - - virtual const string getUnifiedRegName(int reg) const = 0; - - //virtual void printReg(const LiveRange *const LR) const =0; - - MachineRegInfo() { } - -}; - - - //--------------------------------------------------------------------------- diff --git a/include/llvm/Target/RegInfo.h b/include/llvm/Target/RegInfo.h new file mode 100644 index 00000000000..726baabf24f --- /dev/null +++ b/include/llvm/Target/RegInfo.h @@ -0,0 +1,99 @@ +//===-- llvm/Target/RegInfo.h - Target Register Information ------*- C++ -*-==// +// +// This file is used to describe the register system of a target to the register +// allocator. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_TARGET_REGINFO_H +#define LLVM_TARGET_REGINFO_H + +class LiveRangeInfo; +class Method; +class Instruction; +class LiveRange; +class AddedInstrns; +class MachineInstr; + +//----------------------------------------------------------------------------- +// class MachineRegClassInfo +// +// Purpose: +// Interface to description of machine register class (e.g., int reg class +// float reg class etc) +// +//-------------------------------------------------------------------------- + +class IGNode; +class MachineRegClassInfo { +protected: + const unsigned RegClassID; // integer ID of a reg class + const unsigned NumOfAvailRegs; // # of avail for coloring -without SP etc. + const unsigned NumOfAllRegs; // # of all registers -including SP,g0 etc. + +public: + + inline unsigned getRegClassID() const { return RegClassID; } + inline unsigned getNumOfAvailRegs() const { return NumOfAvailRegs; } + inline unsigned getNumOfAllRegs() const { return NumOfAllRegs; } + + + + // This method should find a color which is not used by neighbors + // (i.e., a false position in IsColorUsedArr) and + virtual void colorIGNode(IGNode * Node, bool IsColorUsedArr[] ) const = 0; + + + MachineRegClassInfo(const unsigned ID, const unsigned NVR, + const unsigned NAR): RegClassID(ID), NumOfAvailRegs(NVR), + NumOfAllRegs(NAR) { } +}; + +//--------------------------------------------------------------------------- +// class MachineRegInfo +// +// Purpose: +// Interface to register info of target machine +// +//-------------------------------------------------------------------------- + +typedef hash_map AddedInstrMapType; + +// A vector of all machine register classes +typedef vector MachineRegClassArrayType; + + +class MachineRegInfo : public NonCopyableV { +protected: + MachineRegClassArrayType MachineRegClassArr; + +public: + inline unsigned int getNumOfRegClasses() const { + return MachineRegClassArr.size(); + } + + const MachineRegClassInfo *const getMachineRegClass(unsigned i) const { + return MachineRegClassArr[i]; + } + + + virtual unsigned getRegClassIDOfValue (const Value *const Val) const = 0; + + virtual void colorArgs(const Method *const Meth, + LiveRangeInfo & LRI) const = 0; + + virtual void colorCallArgs(vector & CallInstrList, + LiveRangeInfo& LRI, + AddedInstrMapType& AddedInstrMap ) const = 0; + + virtual int getUnifiedRegNum(int RegClassID, int reg) const = 0; + + virtual const string getUnifiedRegName(int reg) const = 0; + + //virtual void printReg(const LiveRange *const LR) const =0; + + MachineRegInfo() { } + +}; + +#endif diff --git a/include/llvm/Target/SchedInfo.h b/include/llvm/Target/SchedInfo.h index 5ada5f2a5f5..6997794bd3c 100644 --- a/include/llvm/Target/SchedInfo.h +++ b/include/llvm/Target/SchedInfo.h @@ -8,11 +8,12 @@ #define LLVM_TARGET_SCHEDINFO_H #include "llvm/Target/InstInfo.h" +#include typedef long long cycles_t; const cycles_t HUGE_LATENCY = ~((unsigned long long) 1 << sizeof(cycles_t)-1); const cycles_t INVALID_LATENCY = -HUGE_LATENCY; - +static const unsigned MAX_OPCODE_SIZE = 16; class OpCodePair { public: -- 2.34.1