From 6102549737d2a56031d8f9f0468d3a1a627e181f Mon Sep 17 00:00:00 2001 From: Eric Christopher Date: Tue, 15 Jun 2010 23:08:42 +0000 Subject: [PATCH] For 32-bit non-pic tlv mach-o addressing we don't need a pic base or a relative address. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106064 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 6d88454ba84..8e336f99e38 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -8543,6 +8543,15 @@ X86TargetLowering::EmitLoweredTLSCall(MachineInstr *MI, .addReg(0); MIB = BuildMI(BB, DL, TII->get(X86::CALL64m)); addDirectMem(MIB, X86::RDI).addReg(0); + } else if (getTargetMachine().getRelocationModel() != Reloc::PIC_) { + MachineInstrBuilder MIB = BuildMI(BB, DL, TII->get(X86::MOV32rm), X86::EAX) + .addReg(0) + .addImm(0).addReg(0) + .addGlobalAddress(MI->getOperand(3).getGlobal(), 0, + MI->getOperand(3).getTargetFlags()) + .addReg(0); + MIB = BuildMI(BB, DL, TII->get(X86::CALL32m)); + addDirectMem(MIB, X86::EAX).addReg(0); } else { MachineInstrBuilder MIB = BuildMI(BB, DL, TII->get(X86::MOV32rm), X86::EAX) .addReg(TII->getGlobalBaseReg(F)) -- 2.34.1