From 614d2e5a2721e0eaa8490b8d504c504c5927dde1 Mon Sep 17 00:00:00 2001 From: Benoit Goby Date: Fri, 11 Feb 2011 15:55:38 -0800 Subject: [PATCH] ARM: tegra: use generic ulpi operations Change-Id: I5b56a8a1b10532683accfe885387afb309b26b19 Signed-off-by: Benoit Goby --- arch/arm/mach-tegra/include/mach/usb_phy.h | 1 + arch/arm/mach-tegra/usb_phy.c | 45 ++++++++-------------- 2 files changed, 16 insertions(+), 30 deletions(-) diff --git a/arch/arm/mach-tegra/include/mach/usb_phy.h b/arch/arm/mach-tegra/include/mach/usb_phy.h index 335a2738d518..d4b8f9e298a8 100644 --- a/arch/arm/mach-tegra/include/mach/usb_phy.h +++ b/arch/arm/mach-tegra/include/mach/usb_phy.h @@ -58,6 +58,7 @@ struct tegra_usb_phy { struct clk *pad_clk; enum tegra_usb_phy_mode mode; void *config; + struct otg_transceiver *ulpi; }; struct tegra_usb_phy *tegra_usb_phy_open(int instance, void __iomem *regs, diff --git a/arch/arm/mach-tegra/usb_phy.c b/arch/arm/mach-tegra/usb_phy.c index e2c733ff547b..88081bb3ec52 100644 --- a/arch/arm/mach-tegra/usb_phy.c +++ b/arch/arm/mach-tegra/usb_phy.c @@ -25,19 +25,13 @@ #include #include #include +#include +#include #include #include #include #define ULPI_VIEWPORT 0x170 -#define ULPI_WAKEUP (1 << 31) -#define ULPI_RUN (1 << 30) -#define ULPI_RD_RW_WRITE (1 << 29) -#define ULPI_RD_RW_READ (0 << 29) -#define ULPI_PORT(x) (((x) & 0x7) << 24) -#define ULPI_ADDR(x) (((x) & 0xff) << 16) -#define ULPI_DATA_RD(x) (((x) & 0xff) << 8) -#define ULPI_DATA_WR(x) (((x) & 0xff) << 0) #define USB_PORTSC1 0x184 #define USB_PORTSC1_PTS(x) (((x) & 0x3) << 30) @@ -572,21 +566,9 @@ static void utmi_phy_restore_end(struct tegra_usb_phy *phy) udelay(10); } -static void ulpi_viewport_write(struct tegra_usb_phy *phy, u8 addr, u8 data) -{ - unsigned long val; - void __iomem *base = phy->regs; - - val = ULPI_RUN | ULPI_RD_RW_WRITE | ULPI_PORT(0); - val |= ULPI_ADDR(addr) | ULPI_DATA_WR(data); - writel(val, base + ULPI_VIEWPORT); - - if (utmi_wait_register(base + ULPI_VIEWPORT, ULPI_RUN, 0)) - pr_err("%s: timeout accessing ulpi phy\n", __func__); -} - static int ulpi_phy_power_on(struct tegra_usb_phy *phy) { + int ret; unsigned long val; void __iomem *base = phy->regs; struct tegra_ulpi_config *config = phy->config; @@ -624,17 +606,18 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy) val |= ULPI_DIR_TRIMMER_LOAD; writel(val, base + ULPI_TIMING_CTRL_1); - val = ULPI_WAKEUP | ULPI_RD_RW_WRITE | ULPI_PORT(0); - writel(val, base + ULPI_VIEWPORT); - - if (utmi_wait_register(base + ULPI_VIEWPORT, ULPI_WAKEUP, 0)) { - pr_err("%s: timeout waiting for ulpi phy wakeup\n", __func__); - return -EIO; + /* Fix VbusInvalid due to floating VBUS */ + ret = otg_io_write(phy->ulpi, 0x40, 0x08); + if (ret) { + pr_err("%s: ulpi write failed\n", __func__); + return ret; } - /* Fix VbusInvalid due to floating VBUS */ - ulpi_viewport_write(phy, 0x08, 0x40); - ulpi_viewport_write(phy, 0x0B, 0x80); + ret = otg_io_write(phy->ulpi, 0x80, 0x0B); + if (ret) { + pr_err("%s: ulpi write failed\n", __func__); + return ret; + } val = readl(base + USB_PORTSC1); val |= USB_PORTSC1_WKOC | USB_PORTSC1_WKDS | USB_PORTSC1_WKCN; @@ -729,6 +712,8 @@ struct tegra_usb_phy *tegra_usb_phy_open(int instance, void __iomem *regs, tegra_gpio_enable(ulpi_config->reset_gpio); gpio_request(ulpi_config->reset_gpio, "ulpi_phy_reset_b"); gpio_direction_output(ulpi_config->reset_gpio, 0); + phy->ulpi = otg_ulpi_create(&ulpi_viewport_access_ops, 0); + phy->ulpi->io_priv = regs + ULPI_VIEWPORT; } else { err = utmip_pad_open(phy); if (err < 0) -- 2.34.1