From 616141238d20582dcc1f7fd5c131f5831479ef99 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Fri, 8 Jan 2016 07:06:32 +0000 Subject: [PATCH] [TableGen] Use range-based for loops. Also fix one loop to not use some index name as an outer loop. NFC git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257156 91177308-0d34-0410-b5e6-96231b3b80d8 --- utils/TableGen/AsmWriterEmitter.cpp | 45 +++++++++++++---------------- 1 file changed, 20 insertions(+), 25 deletions(-) diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp index 7b0a2fb7929..c4f8a6a1ff5 100644 --- a/utils/TableGen/AsmWriterEmitter.cpp +++ b/utils/TableGen/AsmWriterEmitter.cpp @@ -109,9 +109,9 @@ static void EmitInstructions(std::vector &Insts, O << " case " << FirstInst.CGI->Namespace << "::" << FirstInst.CGI->TheDef->getName() << ":\n"; - for (unsigned i = 0, e = SimilarInsts.size(); i != e; ++i) - O << " case " << SimilarInsts[i].CGI->Namespace << "::" - << SimilarInsts[i].CGI->TheDef->getName() << ":\n"; + for (const AsmWriterInst &AWI : SimilarInsts) + O << " case " << AWI.CGI->Namespace << "::" + << AWI.CGI->TheDef->getName() << ":\n"; for (unsigned i = 0, e = FirstInst.Operands.size(); i != e; ++i) { if (i != DifferingOperand) { // If the operand is the same for all instructions, just print it. @@ -125,8 +125,7 @@ static void EmitInstructions(std::vector &Insts, FirstInst.CGI->TheDef->getName(), FirstInst.Operands[i])); - for (unsigned si = 0, e = SimilarInsts.size(); si != e; ++si) { - AsmWriterInst &AWI = SimilarInsts[si]; + for (const AsmWriterInst &AWI : SimilarInsts) { OpsToPrint.push_back(std::make_pair(AWI.CGI->Namespace+"::"+ AWI.CGI->TheDef->getName(), AWI.Operands[i])); @@ -298,8 +297,8 @@ void AsmWriterEmitter::EmitPrintInstruction(raw_ostream &O) { // Add all strings to the string table upfront so it can generate an optimized // representation. - for (unsigned i = 0, e = NumberedInstructions->size(); i != e; ++i) { - AsmWriterInst *AWI = CGIAWIMap[NumberedInstructions->at(i)]; + for (const CodeGenInstruction *Inst : *NumberedInstructions) { + AsmWriterInst *AWI = CGIAWIMap[Inst]; if (AWI && AWI->Operands[0].OperandType == AsmWriterOperand::isLiteralTextOperand && @@ -313,8 +312,8 @@ void AsmWriterEmitter::EmitPrintInstruction(raw_ostream &O) { StringTable.layout(); unsigned MaxStringIdx = 0; - for (unsigned i = 0, e = NumberedInstructions->size(); i != e; ++i) { - AsmWriterInst *AWI = CGIAWIMap[NumberedInstructions->at(i)]; + for (const CodeGenInstruction *Inst : *NumberedInstructions) { + AsmWriterInst *AWI = CGIAWIMap[Inst]; unsigned Idx; if (!AWI) { // Something not handled by the asmwriter printer. @@ -472,9 +471,9 @@ void AsmWriterEmitter::EmitPrintInstruction(raw_ostream &O) { << " default: llvm_unreachable(\"Invalid command number.\");\n"; // Print out all the cases. - for (unsigned i = 0, e = Commands.size(); i != e; ++i) { - O << " case " << i << ":\n"; - O << Commands[i]; + for (unsigned j = 0, e = Commands.size(); j != e; ++j) { + O << " case " << j << ":\n"; + O << Commands[j]; O << " break;\n"; } O << " }\n\n"; @@ -602,16 +601,16 @@ void AsmWriterEmitter::EmitGetRegisterName(raw_ostream &O) { << "\n"; if (hasAltNames) { - for (unsigned i = 0, e = AltNameIndices.size(); i < e; ++i) - emitRegisterNameString(O, AltNameIndices[i]->getName(), Registers); + for (const Record *R : AltNameIndices) + emitRegisterNameString(O, R->getName(), Registers); } else emitRegisterNameString(O, "", Registers); if (hasAltNames) { O << " switch(AltIdx) {\n" << " default: llvm_unreachable(\"Invalid register alt name index!\");\n"; - for (unsigned i = 0, e = AltNameIndices.size(); i < e; ++i) { - std::string AltName(AltNameIndices[i]->getName()); + for (const Record *R : AltNameIndices) { + std::string AltName(R->getName()); std::string Prefix = !Namespace.empty() ? Namespace + "::" : ""; O << " case " << Prefix << AltName << ":\n" << " assert(*(AsmStrs" << AltName << "+RegAsmOffset" @@ -798,9 +797,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) { typedef std::set, AliasPriorityComparator> AliasWithPriority; std::map AliasMap; - for (std::vector::iterator - I = AllInstAliases.begin(), E = AllInstAliases.end(); I != E; ++I) { - const Record *R = *I; + for (Record *R : AllInstAliases) { int Priority = R->getValueAsInt("EmitPriority"); if (Priority < 1) continue; // Aliases with priority 0 are never emitted. @@ -808,7 +805,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) { const DagInit *DI = R->getValueAsDag("ResultInst"); const DefInit *Op = cast(DI->getOperator()); AliasMap[getQualifiedName(Op->getDef())].insert( - std::make_pair(CodeGenInstAlias(*I, Variant, Target), Priority)); + std::make_pair(CodeGenInstAlias(R, Variant, Target), Priority)); } // A map of which conditions need to be met for each instruction operand @@ -976,9 +973,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) { CasesO.indent(2) << "case " << Entry.first << ":\n"; - for (std::vector::iterator - II = UniqueIAPs.begin(), IE = UniqueIAPs.end(); II != IE; ++II) { - IAPrinter *IAP = *II; + for (IAPrinter *IAP : UniqueIAPs) { CasesO.indent(4); IAP->print(CasesO); CasesO << '\n'; @@ -1108,8 +1103,8 @@ AsmWriterEmitter::AsmWriterEmitter(RecordKeeper &R) : Records(R), Target(R) { // Compute the CodeGenInstruction -> AsmWriterInst mapping. Note that not // all machine instructions are necessarily being printed, so there may be // target instructions not in this map. - for (unsigned i = 0, e = Instructions.size(); i != e; ++i) - CGIAWIMap.insert(std::make_pair(Instructions[i].CGI, &Instructions[i])); + for (AsmWriterInst &AWI : Instructions) + CGIAWIMap.insert(std::make_pair(AWI.CGI, &AWI)); } void AsmWriterEmitter::run(raw_ostream &O) { -- 2.34.1