From 62e5ebfaef9e058d1182de155c335fcc807a8914 Mon Sep 17 00:00:00 2001
From: Toma Tabacu <toma.tabacu@imgtec.com>
Date: Fri, 1 May 2015 12:19:27 +0000
Subject: [PATCH] [mips] [IAS] Fix error messages for using LI with 64-bit
immediates.
Summary:
LI should never accept immediates larger than 32 bits.
The additional Is32BitImm boolean also paves the way for unifying the functionality that LA and LI have in common.
Reviewers: dsanders
Reviewed By: dsanders
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D9289
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236313 91177308-0d34-0410-b5e6-96231b3b80d8
---
lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 25 +++++++++++----------
test/MC/Mips/mips-expansions-bad.s | 9 +++++---
2 files changed, 19 insertions(+), 15 deletions(-)
diff --git a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
index ed6e8ebe048..7046b7053e8 100644
--- a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -179,7 +179,7 @@ class MipsAsmParser : public MCTargetAsmParser {
bool expandJalWithRegs(MCInst &Inst, SMLoc IDLoc,
SmallVectorImpl<MCInst> &Instructions);
- bool expandLoadImm(MCInst &Inst, SMLoc IDLoc,
+ bool expandLoadImm(MCInst &Inst, bool Is32BitImm, SMLoc IDLoc,
SmallVectorImpl<MCInst> &Instructions);
bool expandLoadAddressImm(MCInst &Inst, SMLoc IDLoc,
@@ -1609,13 +1609,9 @@ bool MipsAsmParser::expandInstruction(MCInst &Inst, SMLoc IDLoc,
switch (Inst.getOpcode()) {
default: llvm_unreachable("unimplemented expansion");
case Mips::LoadImm32:
- return expandLoadImm(Inst, IDLoc, Instructions);
+ return expandLoadImm(Inst, true, IDLoc, Instructions);
case Mips::LoadImm64:
- if (!isGP64bit()) {
- Error(IDLoc, "instruction requires a 64-bit architecture");
- return true;
- }
- return expandLoadImm(Inst, IDLoc, Instructions);
+ return expandLoadImm(Inst, false, IDLoc, Instructions);
case Mips::LoadAddrImm32:
return expandLoadAddressImm(Inst, IDLoc, Instructions);
case Mips::LoadAddrReg32:
@@ -1715,8 +1711,13 @@ bool MipsAsmParser::expandJalWithRegs(MCInst &Inst, SMLoc IDLoc,
return false;
}
-bool MipsAsmParser::expandLoadImm(MCInst &Inst, SMLoc IDLoc,
+bool MipsAsmParser::expandLoadImm(MCInst &Inst, bool Is32BitImm, SMLoc IDLoc,
SmallVectorImpl<MCInst> &Instructions) {
+ if (!Is32BitImm && !isGP64bit()) {
+ Error(IDLoc, "instruction requires a 64-bit architecture");
+ return true;
+ }
+
MCInst tmpInst;
const MCOperand &ImmOp = Inst.getOperand(1);
assert(ImmOp.isImm() && "expected immediate operand kind");
@@ -1757,8 +1758,8 @@ bool MipsAsmParser::expandLoadImm(MCInst &Inst, SMLoc IDLoc,
Instructions.push_back(tmpInst);
createLShiftOri<0>(Bits15To0, Reg, IDLoc, Instructions);
} else if ((ImmValue & (0xffffLL << 48)) == 0) {
- if (!isGP64bit()) {
- Error(IDLoc, "instruction requires a 64-bit architecture");
+ if (Is32BitImm) {
+ Error(IDLoc, "instruction requires a 32-bit immediate");
return true;
}
@@ -1786,8 +1787,8 @@ bool MipsAsmParser::expandLoadImm(MCInst &Inst, SMLoc IDLoc,
createLShiftOri<0>(Bits31To16, Reg, IDLoc, Instructions);
createLShiftOri<16>(Bits15To0, Reg, IDLoc, Instructions);
} else {
- if (!isGP64bit()) {
- Error(IDLoc, "instruction requires a 64-bit architecture");
+ if (Is32BitImm) {
+ Error(IDLoc, "instruction requires a 32-bit immediate");
return true;
}
diff --git a/test/MC/Mips/mips-expansions-bad.s b/test/MC/Mips/mips-expansions-bad.s
index d9bac20e154..eebf1e496c5 100644
--- a/test/MC/Mips/mips-expansions-bad.s
+++ b/test/MC/Mips/mips-expansions-bad.s
@@ -1,8 +1,11 @@
# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r2 2>%t1
-# RUN: FileCheck %s < %t1
+# RUN: FileCheck %s < %t1 --check-prefix=32-BIT
+# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64 2>&1 | \
+# RUN: FileCheck %s --check-prefix=64-BIT
.text
li $5, 0x100000000
- # CHECK: :[[@LINE-1]]:3: error: instruction requires a 64-bit architecture
+ # 32-BIT: :[[@LINE-1]]:3: error: instruction requires a 32-bit immediate
+ # 64-BIT: :[[@LINE-2]]:3: error: instruction requires a 32-bit immediate
dli $5, 1
- # CHECK: :[[@LINE-1]]:3: error: instruction requires a 64-bit architecture
+ # 32-BIT: :[[@LINE-1]]:3: error: instruction requires a 64-bit architecture
--
2.34.1