From 62fd23412357a855ad9d0d0e44e76dbc3707585b Mon Sep 17 00:00:00 2001 From: WeiYong Bi Date: Thu, 13 Jul 2017 15:12:14 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3366: export MIPI DPHY PLL clock Change-Id: I99a4c252f877ff36a16f991ee2e94bb110401e47 Signed-off-by: WeiYong Bi --- arch/arm64/boot/dts/rockchip/rk3366.dtsi | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3366.dtsi b/arch/arm64/boot/dts/rockchip/rk3366.dtsi index 67ce4befdb6b..47388e8cdb13 100644 --- a/arch/arm64/boot/dts/rockchip/rk3366.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3366.dtsi @@ -1007,8 +1007,8 @@ compatible = "rockchip,rk3366-mipi-dsi"; reg = <0x0 0xff960000 0x0 0x4000>; interrupts = ; - clocks = <&cru PCLK_MIPI_DSI0>; - clock-names = "pclk"; + clocks = <&cru PCLK_MIPI_DSI0>, <&mipi_dphy>; + clock-names = "pclk", "hs_clk"; resets = <&cru SRST_MIPIDSI0>; reset-names = "apb"; phys = <&mipi_dphy>; @@ -1041,6 +1041,8 @@ reg = <0x0 0xff968000 0x0 0x4000>; clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_DPHYTX>; clock-names = "ref", "pclk"; + clock-output-names = "mipi_dphy_pll"; + #clock-cells = <0>; resets = <&cru SRST_MIPIDPHYTX>; reset-names = "apb"; #phy-cells = <0>; -- 2.34.1