From 654d5440a477b1f6c89b051107e041a331f78e27 Mon Sep 17 00:00:00 2001 From: Owen Anderson Date: Tue, 28 Sep 2010 21:57:50 +0000 Subject: [PATCH] Add a subtarget hook for reporting the misprediction penalty. Use this to provide more precise cost modeling for if-conversion. Now if only we had a way to estimate the misprediction probability. Adjsut CodeGen/ARM/ifcvt10.ll. The pipeline on Cortex-A8 is long enough that it is still profitable to predicate an ldm, but the shorter pipeline on Cortex-A9 makes it unprofitable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114995 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMBaseInstrInfo.cpp | 6 ++++-- lib/Target/ARM/ARMSubtarget.cpp | 12 ++++++++++++ lib/Target/ARM/ARMSubtarget.h | 2 ++ test/CodeGen/ARM/ifcvt10.ll | 2 +- 4 files changed, 19 insertions(+), 3 deletions(-) diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp index f92317c322c..c38b89534bf 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -1203,7 +1203,8 @@ bool ARMBaseInstrInfo::isProfitableToIfCvt(MachineBasicBlock &MBB, // Attempt to estimate the relative costs of predication versus branching. float UnpredCost = Probability * NumInstrs; - UnpredCost += 2.0; // FIXME: Should model a misprediction cost. + UnpredCost += 1.0; // The branch itself + UnpredCost += 0.1 * Subtarget.getMispredictionPenalty(); float PredCost = NumInstrs; @@ -1220,7 +1221,8 @@ isProfitableToIfCvt(MachineBasicBlock &TMBB, unsigned NumT, // Attempt to estimate the relative costs of predication versus branching. float UnpredCost = Probability * NumT + (1.0 - Probability) * NumF; - UnpredCost += 2.0; // FIXME: Should model a misprediction cost. + UnpredCost += 1.0; // The branch itself + UnpredCost += 0.1 * Subtarget.getMispredictionPenalty(); float PredCost = NumT + NumF; diff --git a/lib/Target/ARM/ARMSubtarget.cpp b/lib/Target/ARM/ARMSubtarget.cpp index 6ecb512d5be..65bb85f29f3 100644 --- a/lib/Target/ARM/ARMSubtarget.cpp +++ b/lib/Target/ARM/ARMSubtarget.cpp @@ -185,6 +185,18 @@ ARMSubtarget::GVIsIndirectSymbol(const GlobalValue *GV, return false; } +unsigned ARMSubtarget::getMispredictionPenalty() const { + // If we have a reasonable estimate of the pipeline depth, then we can + // estimate the penalty of a misprediction based on that. + if (isCortexA8()) + return 13; + else if (isCortexA9()) + return 8; + + // Otherwise, just return a sensible default. + return 10; +} + bool ARMSubtarget::enablePostRAScheduler( CodeGenOpt::Level OptLevel, TargetSubtarget::AntiDepBreakMode& Mode, diff --git a/lib/Target/ARM/ARMSubtarget.h b/lib/Target/ARM/ARMSubtarget.h index 3d9f40b4e75..aefd130b9a8 100644 --- a/lib/Target/ARM/ARMSubtarget.h +++ b/lib/Target/ARM/ARMSubtarget.h @@ -194,6 +194,8 @@ protected: const std::string & getCPUString() const { return CPUString; } + unsigned getMispredictionPenalty() const; + /// enablePostRAScheduler - True at 'More' optimization. bool enablePostRAScheduler(CodeGenOpt::Level OptLevel, TargetSubtarget::AntiDepBreakMode& Mode, diff --git a/test/CodeGen/ARM/ifcvt10.ll b/test/CodeGen/ARM/ifcvt10.ll index 57561eb65dd..707f0510b91 100644 --- a/test/CodeGen/ARM/ifcvt10.ll +++ b/test/CodeGen/ARM/ifcvt10.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=arm-apple-darwin -mcpu=cortex-a8 | FileCheck %s +; RUN: llc < %s -mtriple=arm-apple-darwin -mcpu=cortex-a9 | FileCheck %s ; rdar://8402126 ; Make sure if-converter is not predicating vldmia and ldmia. These are ; micro-coded and would have long issue latency even if predicated on -- 2.34.1