From 6636b6292b2f05a2aaad42aa2af47727b9b6f0bd Mon Sep 17 00:00:00 2001 From: Vedant Kumar Date: Fri, 21 Aug 2015 21:52:48 +0000 Subject: [PATCH] [ARM] Fix MachO CPU Subtype selection Differential Revision: http://reviews.llvm.org/D12040 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245744 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Support/TargetParser.h | 1 + lib/Support/TargetParser.cpp | 4 +- lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp | 47 +++++++++---- test/CodeGen/ARM/MachO-subtypes.ll | 68 +++++++++++++++++++ 4 files changed, 107 insertions(+), 13 deletions(-) create mode 100644 test/CodeGen/ARM/MachO-subtypes.ll diff --git a/include/llvm/Support/TargetParser.h b/include/llvm/Support/TargetParser.h index dd37afad290..605f74e42b6 100644 --- a/include/llvm/Support/TargetParser.h +++ b/include/llvm/Support/TargetParser.h @@ -117,6 +117,7 @@ namespace ARM { AK_ARMV7L, AK_ARMV7HL, AK_ARMV7S, + AK_ARMV7K, AK_LAST }; diff --git a/lib/Support/TargetParser.cpp b/lib/Support/TargetParser.cpp index 6d43f252eaf..dc385babcbd 100644 --- a/lib/Support/TargetParser.cpp +++ b/lib/Support/TargetParser.cpp @@ -107,7 +107,8 @@ struct { { "armv7", ARM::AK_ARMV7, "7", "v7", ARMBuildAttrs::CPUArch::v7 }, { "armv7l", ARM::AK_ARMV7L, "7-L", "v7l", ARMBuildAttrs::CPUArch::v7 }, { "armv7hl", ARM::AK_ARMV7HL, "7-L", "v7hl", ARMBuildAttrs::CPUArch::v7 }, - { "armv7s", ARM::AK_ARMV7S, "7-S", "v7s", ARMBuildAttrs::CPUArch::v7 } + { "armv7s", ARM::AK_ARMV7S, "7-S", "v7s", ARMBuildAttrs::CPUArch::v7 }, + { "armv7k", ARM::AK_ARMV7K, "7-K", "v7k", ARMBuildAttrs::CPUArch::v7 } }; // List of Arch Extension names. // FIXME: TableGen this. @@ -662,6 +663,7 @@ unsigned ARMTargetParser::parseArchVersion(StringRef Arch) { case ARM::AK_ARMV7HL: case ARM::AK_ARMV7S: case ARM::AK_ARMV7EM: + case ARM::AK_ARMV7K: return 7; case ARM::AK_ARMV8A: case ARM::AK_ARMV8_1A: diff --git a/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp index 11146358856..3b01a25fb15 100644 --- a/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp +++ b/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp @@ -32,6 +32,7 @@ #include "llvm/Support/ELF.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/MachO.h" +#include "llvm/Support/TargetParser.h" #include "llvm/Support/raw_ostream.h" using namespace llvm; @@ -743,6 +744,39 @@ void ARMAsmBackend::applyFixup(const MCFixup &Fixup, char *Data, } } +static MachO::CPUSubTypeARM getMachOSubTypeFromArch(StringRef Arch) { + unsigned AK = ARMTargetParser::parseArch(Arch); + switch (AK) { + default: + return MachO::CPU_SUBTYPE_ARM_V7; + case ARM::AK_ARMV4T: + return MachO::CPU_SUBTYPE_ARM_V4T; + case ARM::AK_ARMV6: + case ARM::AK_ARMV6K: + return MachO::CPU_SUBTYPE_ARM_V6; + case ARM::AK_ARMV5: + return MachO::CPU_SUBTYPE_ARM_V5; + case ARM::AK_ARMV5T: + case ARM::AK_ARMV5E: + case ARM::AK_ARMV5TE: + case ARM::AK_ARMV5TEJ: + return MachO::CPU_SUBTYPE_ARM_V5TEJ; + case ARM::AK_ARMV7: + return MachO::CPU_SUBTYPE_ARM_V7; + case ARM::AK_ARMV7S: + return MachO::CPU_SUBTYPE_ARM_V7S; + case ARM::AK_ARMV7K: + return MachO::CPU_SUBTYPE_ARM_V7K; + case ARM::AK_ARMV6M: + case ARM::AK_ARMV6SM: + return MachO::CPU_SUBTYPE_ARM_V6M; + case ARM::AK_ARMV7M: + return MachO::CPU_SUBTYPE_ARM_V7M; + case ARM::AK_ARMV7EM: + return MachO::CPU_SUBTYPE_ARM_V7EM; + } +} + MCAsmBackend *llvm::createARMAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TheTriple, StringRef CPU, @@ -751,18 +785,7 @@ MCAsmBackend *llvm::createARMAsmBackend(const Target &T, default: llvm_unreachable("unsupported object format"); case Triple::MachO: { - MachO::CPUSubTypeARM CS = - StringSwitch(TheTriple.getArchName()) - .Cases("armv4t", "thumbv4t", MachO::CPU_SUBTYPE_ARM_V4T) - .Cases("armv5e", "thumbv5e", MachO::CPU_SUBTYPE_ARM_V5TEJ) - .Cases("armv6", "thumbv6", MachO::CPU_SUBTYPE_ARM_V6) - .Cases("armv6m", "thumbv6m", MachO::CPU_SUBTYPE_ARM_V6M) - .Cases("armv7em", "thumbv7em", MachO::CPU_SUBTYPE_ARM_V7EM) - .Cases("armv7k", "thumbv7k", MachO::CPU_SUBTYPE_ARM_V7K) - .Cases("armv7m", "thumbv7m", MachO::CPU_SUBTYPE_ARM_V7M) - .Cases("armv7s", "thumbv7s", MachO::CPU_SUBTYPE_ARM_V7S) - .Default(MachO::CPU_SUBTYPE_ARM_V7); - + MachO::CPUSubTypeARM CS = getMachOSubTypeFromArch(TheTriple.getArchName()); return new ARMAsmBackendDarwin(T, TheTriple, CS); } case Triple::COFF: diff --git a/test/CodeGen/ARM/MachO-subtypes.ll b/test/CodeGen/ARM/MachO-subtypes.ll new file mode 100644 index 00000000000..8176d664084 --- /dev/null +++ b/test/CodeGen/ARM/MachO-subtypes.ll @@ -0,0 +1,68 @@ +; Check that MachO ARM CPU Subtypes are respected + +; RUN: llc -mtriple=armv4t-apple-darwin -filetype=obj -o - < %s \ +; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V4T + +; RUN: llc -mtriple=armv5-apple-darwin -filetype=obj -o - < %s \ +; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V5 +; RUN: llc -mtriple=armv5e-apple-darwin -filetype=obj -o - < %s \ +; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V5 +; RUN: llc -mtriple=armv5t-apple-darwin -filetype=obj -o - < %s \ +; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V5 +; RUN: llc -mtriple=armv5te-apple-darwin -filetype=obj -o - < %s \ +; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V5 +; RUN: llc -mtriple=armv5tej-apple-darwin -filetype=obj -o - < %s \ +; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V5 + +; RUN: llc -mtriple=armv6-apple-darwin -filetype=obj -o - < %s \ +; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V6 +; RUN: llc -mtriple=armv6k-apple-darwin -filetype=obj -o - < %s \ +; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V6 +; RUN: llc -mtriple=thumbv6-apple-darwin -filetype=obj -o - < %s \ +; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V6 +; RUN: llc -mtriple=thumbv6k-apple-darwin -filetype=obj -o - < %s \ +; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V6 + +; RUN: llc -mtriple=armv6m-apple-darwin -filetype=obj -o - < %s \ +; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V6M +; RUN: llc -mtriple=thumbv6m-apple-darwin -filetype=obj -o - < %s \ +; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V6M + +; RUN: llc -mtriple=armv7-apple-darwin -filetype=obj -o - < %s \ +; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V7 +; RUN: llc -mtriple=thumbv7-apple-darwin -filetype=obj -o - < %s \ +; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V7 + +; RUN: llc -mtriple=thumbv7em-apple-darwin -mcpu=cortex-m4 -filetype=obj -o - < %s \ +; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V7EM +; RUN: llc -mtriple=thumbv7em-apple-darwin -mcpu=cortex-m7 -filetype=obj -o - < %s \ +; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V7EM + +; RUN: llc -mtriple=armv7k-apple-darwin -filetype=obj -o - < %s \ +; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V7K +; RUN: llc -mtriple=thumbv7k-apple-darwin -filetype=obj -o - < %s \ +; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V7K + +; RUN: llc -mtriple=thumbv7m-apple-darwin -mcpu=sc300 -filetype=obj -o - < %s \ +; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V7M +; RUN: llc -mtriple=thumbv7m-apple-darwin -mcpu=cortex-m3 -filetype=obj -o - < %s \ +; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V7M + +; RUN: llc -mtriple=armv7s-apple-darwin -filetype=obj -o - < %s \ +; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V7S +; RUN: llc -mtriple=thumbv7s-apple-darwin -filetype=obj -o - < %s \ +; RUN: | llvm-readobj -file-headers | FileCheck %s --check-prefix=CHECK-V7S + +define void @_test() { + ret void +} + +; CHECK-V4T: CpuSubType: CPU_SUBTYPE_ARM_V4T (0x5) +; CHECK-V5: CpuSubType: CPU_SUBTYPE_ARM_V5 (0x7) +; CHECK-V6: CpuSubType: CPU_SUBTYPE_ARM_V6 (0x6) +; CHECK-V6M: CpuSubType: CPU_SUBTYPE_ARM_V6M (0xE) +; CHECK-V7: CpuSubType: CPU_SUBTYPE_ARM_V7 (0x9) +; CHECK-V7EM: CpuSubType: CPU_SUBTYPE_ARM_V7EM (0x10) +; CHECK-V7K: CpuSubType: CPU_SUBTYPE_ARM_V7K (0xC) +; CHECK-V7M: CpuSubType: CPU_SUBTYPE_ARM_V7M (0xF) +; CHECK-V7S: CpuSubType: CPU_SUBTYPE_ARM_V7S (0xB) -- 2.34.1