From 694f6c81e885818840d374c855cd0c91ed3f2f15 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Sat, 20 Jun 2009 04:34:51 +0000 Subject: [PATCH] Fix PR4419: handle defs of partial uses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73816 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/LiveVariables.cpp | 13 ++++---- .../ARM/2009-06-19-RegScavengerAssert.ll | 30 +++++++++++++++++++ 2 files changed, 36 insertions(+), 7 deletions(-) create mode 100644 test/CodeGen/ARM/2009-06-19-RegScavengerAssert.ll diff --git a/lib/CodeGen/LiveVariables.cpp b/lib/CodeGen/LiveVariables.cpp index 62288216912..bd845085bbf 100644 --- a/lib/CodeGen/LiveVariables.cpp +++ b/lib/CodeGen/LiveVariables.cpp @@ -359,12 +359,11 @@ bool LiveVariables::HandlePhysRegKill(unsigned Reg, MachineInstr *MI) { // That is, unless we are currently processing the last reference itself. LastRefOrPartRef->addRegisterDead(Reg, TRI, true); - /* Partial uses. Mark register def dead and add implicit def of - sub-registers which are used. - FIXME: LiveIntervalAnalysis can't handle this yet! - EAX = op AL - That is, EAX def is dead but AL def extends pass it. - Enable this after live interval analysis is fixed to improve codegen! + // Partial uses. Mark register def dead and add implicit def of + // sub-registers which are used. + // EAX = op AL + // That is, EAX def is dead but AL def extends pass it. + // Enable this after live interval analysis is fixed to improve codegen! else if (!PhysRegUse[Reg]) { PhysRegDef[Reg]->addRegisterDead(Reg, TRI, true); for (const unsigned *SubRegs = TRI->getSubRegisters(Reg); @@ -377,7 +376,7 @@ bool LiveVariables::HandlePhysRegKill(unsigned Reg, MachineInstr *MI) { PartUses.erase(*SS); } } - } */ + } else LastRefOrPartRef->addRegisterKilled(Reg, TRI, true); return true; diff --git a/test/CodeGen/ARM/2009-06-19-RegScavengerAssert.ll b/test/CodeGen/ARM/2009-06-19-RegScavengerAssert.ll new file mode 100644 index 00000000000..cbe2385ab27 --- /dev/null +++ b/test/CodeGen/ARM/2009-06-19-RegScavengerAssert.ll @@ -0,0 +1,30 @@ +; RUN: llvm-as < %s | llc -mtriple=armv6-eabi -mattr=+vfp2 -float-abi=hard +; PR4419 + +define float @__ieee754_acosf(float %x) nounwind { +entry: + br i1 undef, label %bb, label %bb4 + +bb: ; preds = %entry + ret float undef + +bb4: ; preds = %entry + br i1 undef, label %bb5, label %bb6 + +bb5: ; preds = %bb4 + ret float undef + +bb6: ; preds = %bb4 + br i1 undef, label %bb11, label %bb12 + +bb11: ; preds = %bb6 + %0 = tail call float @__ieee754_sqrtf(float undef) nounwind ; [#uses=1] + %1 = fmul float %0, -2.000000e+00 ; [#uses=1] + %2 = fadd float %1, 0x400921FB40000000 ; [#uses=1] + ret float %2 + +bb12: ; preds = %bb6 + ret float undef +} + +declare float @__ieee754_sqrtf(float) -- 2.34.1