From 6b1da9c39f0731d15cb743441bea6d4089efd9f8 Mon Sep 17 00:00:00 2001
From: Bill Wendling <isanbard@gmail.com>
Date: Fri, 14 Dec 2007 01:48:59 +0000
Subject: [PATCH] Add flags to indicate that there are "never" side effects or
 that there "may be" side effects for machine instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45022 91177308-0d34-0410-b5e6-96231b3b80d8
---
 include/llvm/Target/TargetInstrInfo.h | 12 ++++++++++++
 lib/Target/Target.td                  |  5 +++++
 utils/TableGen/CodeGenInstruction.h   |  2 ++
 utils/TableGen/CodeGenTarget.cpp      |  8 +++++++-
 utils/TableGen/InstrInfoEmitter.cpp   |  5 +++--
 5 files changed, 29 insertions(+), 3 deletions(-)

diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h
index f463c8aa692..e617e691ef6 100644
--- a/include/llvm/Target/TargetInstrInfo.h
+++ b/include/llvm/Target/TargetInstrInfo.h
@@ -91,6 +91,18 @@ const unsigned M_NOT_DUPLICABLE        = 1 << 16;
 // ARM instructions which can set condition code if 's' bit is set.
 const unsigned M_HAS_OPTIONAL_DEF      = 1 << 17;
 
+// M_MAY_HAVE_SIDE_EFFECTS - Set if this instruction *might* have side effects,
+// e.g. load instructions. Note: This and M_NEVER_HAS_SIDE_EFFECTS are mutually
+// exclusive. You can't set both! If neither flag is set, then the instruction
+// *always* has side effects.
+const unsigned M_MAY_HAVE_SIDE_EFFECTS = 1 << 18;
+
+// M_NEVER_HAS_SIDE_EFFECTS - Set if this instruction *never* has side effects,
+// e.g., xor on X86.  Note: This and M_MAY_HAVE_SIDE_EFFECTS are mutually
+// exclusive. You can't set both! If neither flag is set, then the instruction
+// *always* has side effects.
+const unsigned M_NEVER_HAS_SIDE_EFFECTS = 1 << 19;
+
 // Machine operand flags
 // M_LOOK_UP_PTR_REG_CLASS - Set if this operand is a pointer value and it
 // requires a callback to look up its register class.
diff --git a/lib/Target/Target.td b/lib/Target/Target.td
index 4c278bb8bd9..9619cb98f9c 100644
--- a/lib/Target/Target.td
+++ b/lib/Target/Target.td
@@ -203,6 +203,11 @@ class Instruction {
   bit usesCustomDAGSchedInserter = 0; // Pseudo instr needing special help.
   bit hasCtrlDep   = 0;     // Does this instruction r/w ctrl-flow chains?
   bit isNotDuplicable = 0;  // Is it unsafe to duplicate this instruction?
+
+  // Side effect flags - If neither of these flags is set, then the instruction
+  // *always* has side effects. Otherwise, it's one or the other.
+  bit mayHaveSideEffects = 0;  // This instruction *may* have side effects.
+  bit neverHasSideEffects = 0; // This instruction never has side effects.
   
   InstrItinClass Itinerary = NoItinerary;// Execution steps used for scheduling.
 
diff --git a/utils/TableGen/CodeGenInstruction.h b/utils/TableGen/CodeGenInstruction.h
index c209b1342f6..8f1bf5406d3 100644
--- a/utils/TableGen/CodeGenInstruction.h
+++ b/utils/TableGen/CodeGenInstruction.h
@@ -104,6 +104,8 @@ namespace llvm {
     bool hasCtrlDep;
     bool isNotDuplicable;
     bool hasOptionalDef;
+    bool mayHaveSideEffects;
+    bool neverHasSideEffects;
     
     /// ParseOperandName - Parse an operand name like "$foo" or "$foo.bar",
     /// where $foo is a whole operand and $foo.bar refers to a suboperand.
diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp
index 47bbecb87e9..a2fe37017a4 100644
--- a/utils/TableGen/CodeGenTarget.cpp
+++ b/utils/TableGen/CodeGenTarget.cpp
@@ -395,9 +395,15 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
   usesCustomDAGSchedInserter = R->getValueAsBit("usesCustomDAGSchedInserter");
   hasCtrlDep   = R->getValueAsBit("hasCtrlDep");
   isNotDuplicable = R->getValueAsBit("isNotDuplicable");
+  mayHaveSideEffects = R->getValueAsBit("mayHaveSideEffects");
+  neverHasSideEffects = R->getValueAsBit("neverHasSideEffects");
   hasOptionalDef = false;
   hasVariableNumberOfOperands = false;
-  
+
+  if (mayHaveSideEffects && neverHasSideEffects)
+    throw R->getName() +
+      ": cannot have both 'mayHaveSideEffects' and 'neverHasSideEffects' set!";
+
   DagInit *DI;
   try {
     DI = R->getValueAsDag("OutOperandList");
diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp
index 855a0f090ae..697a7e2f39b 100644
--- a/utils/TableGen/InstrInfoEmitter.cpp
+++ b/utils/TableGen/InstrInfoEmitter.cpp
@@ -253,8 +253,9 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
   if (Inst.hasOptionalDef) OS << "|M_HAS_OPTIONAL_DEF";
   if (Inst.usesCustomDAGSchedInserter)
     OS << "|M_USES_CUSTOM_DAG_SCHED_INSERTION";
-  if (Inst.hasVariableNumberOfOperands)
-    OS << "|M_VARIABLE_OPS";
+  if (Inst.hasVariableNumberOfOperands) OS << "|M_VARIABLE_OPS";
+  if (Inst.mayHaveSideEffects) OS << "|M_MAY_HAVE_SIDE_EFFECTS";
+  if (Inst.neverHasSideEffects) OS << "|M_NEVER_HAS_SIDE_EFFECTS";
   OS << ", 0";
 
   // Emit all of the target-specific flags...
-- 
2.34.1