From 6cf73267c6fc8f1d9287b6eba1aa202693040f53 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 25 Jan 2008 06:14:17 +0000 Subject: [PATCH] optimize fxor like for git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46345 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index cef8e4b3e69..e4d4ceb99fa 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -5627,10 +5627,12 @@ static SDOperand PerformSELECTCombine(SDNode *N, SelectionDAG &DAG, return SDOperand(); } -/// PerformFORCombine - Do target-specific dag combines on X86ISD::FOR nodes. +/// PerformFORCombine - Do target-specific dag combines on X86ISD::FOR and +/// X86ISD::FXOR nodes. static SDOperand PerformFORCombine(SDNode *N, SelectionDAG &DAG) { - // FOR(0.0, x) -> x - // FOR(x, 0.0) -> x + assert(N->getOpcode() == X86ISD::FOR || N->getOpcode() == X86ISD::FXOR); + // F[X]OR(0.0, x) -> x + // F[X]OR(x, 0.0) -> x if (ConstantFPSDNode *C = dyn_cast(N->getOperand(0))) if (C->getValueAPF().isPosZero()) return N->getOperand(1); @@ -5661,6 +5663,7 @@ SDOperand X86TargetLowering::PerformDAGCombine(SDNode *N, default: break; case ISD::VECTOR_SHUFFLE: return PerformShuffleCombine(N, DAG, Subtarget); case ISD::SELECT: return PerformSELECTCombine(N, DAG, Subtarget); + case X86ISD::FXOR: case X86ISD::FOR: return PerformFORCombine(N, DAG); case X86ISD::FAND: return PerformFANDCombine(N, DAG); } -- 2.34.1