From 6d6dce5920e227790f20a9549db3bc8460dd7035 Mon Sep 17 00:00:00 2001 From: Finley Xiao Date: Mon, 22 Aug 2016 18:16:37 -0700 Subject: [PATCH] arm64: dts: rockchip: add efuse0 device node for rk3399 Add a efuse0 node in the device tree for the ARM64 rk3399 SoC. Change-Id: I603e02177138f699b8b5f9d5609573547076e058 Signed-off-by: Finley Xiao --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 29 ++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 7dc5ef4ba26f..b582d12e90c7 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1283,6 +1283,35 @@ status = "disabled"; }; + efuse0: efuse@ff690000 { + compatible = "rockchip,rk3399-efuse"; + reg = <0x0 0xff690000 0x0 0x80>; + #address-cells = <1>; + #size-cells = <1>; + clocks = <&cru PCLK_EFUSE1024NS>; + clock-names = "pclk_efuse"; + + /* Data cells */ + cpul_leakage: cpul-leakage { + reg = <0x1a 0x1>; + }; + cpub_leakage: cpub-leakage { + reg = <0x17 0x1>; + }; + gpu_leakage: gpu-leakage { + reg = <0x18 0x1>; + }; + center_leakage: center-leakage { + reg = <0x19 0x1>; + }; + logic_leakage: logic-leakage { + reg = <0x1b 0x1>; + }; + wafer_info: wafer-info { + reg = <0x1c 0x1>; + }; + }; + pmucru: pmu-clock-controller@ff750000 { compatible = "rockchip,rk3399-pmucru"; reg = <0x0 0xff750000 0x0 0x1000>; -- 2.34.1