From 701c2fca7edebec22b011dc1578f7efc39456f84 Mon Sep 17 00:00:00 2001 From: David Majnemer Date: Fri, 3 Apr 2015 20:18:40 +0000 Subject: [PATCH] [InstCombine] Use DataLayout to determine vector element width InstCombine didn't realize that it needs to use DataLayout to determine how wide pointers are. This lead to assertion failures. This fixes PR23113. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234046 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Transforms/InstCombine/InstCombineVectorOps.cpp | 5 ++--- test/Transforms/InstCombine/vec_shuffle.ll | 8 ++++++++ 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/lib/Transforms/InstCombine/InstCombineVectorOps.cpp b/lib/Transforms/InstCombine/InstCombineVectorOps.cpp index b6beb650668..24446c8578e 100644 --- a/lib/Transforms/InstCombine/InstCombineVectorOps.cpp +++ b/lib/Transforms/InstCombine/InstCombineVectorOps.cpp @@ -987,8 +987,7 @@ Instruction *InstCombiner::visitShuffleVectorInst(ShuffleVectorInst &SVI) { unsigned BegIdx = Mask.front(); VectorType *SrcTy = cast(V->getType()); unsigned VecBitWidth = SrcTy->getBitWidth(); - unsigned SrcElemBitWidth = - SrcTy->getElementType()->getPrimitiveSizeInBits(); + unsigned SrcElemBitWidth = DL.getTypeSizeInBits(SrcTy->getElementType()); assert(SrcElemBitWidth && "vector elements must have a bitwidth"); unsigned SrcNumElems = SrcTy->getNumElements(); SmallVector BCs; @@ -1000,7 +999,7 @@ Instruction *InstCombiner::visitShuffleVectorInst(ShuffleVectorInst &SVI) { BCs.push_back(BC); for (BitCastInst *BC : BCs) { Type *TgtTy = BC->getDestTy(); - unsigned TgtElemBitWidth = TgtTy->getPrimitiveSizeInBits(); + unsigned TgtElemBitWidth = DL.getTypeSizeInBits(TgtTy); if (!TgtElemBitWidth) continue; unsigned TgtNumElems = VecBitWidth / TgtElemBitWidth; diff --git a/test/Transforms/InstCombine/vec_shuffle.ll b/test/Transforms/InstCombine/vec_shuffle.ll index 164e315c46a..87b612b7fbc 100644 --- a/test/Transforms/InstCombine/vec_shuffle.ll +++ b/test/Transforms/InstCombine/vec_shuffle.ll @@ -414,3 +414,11 @@ define <4 x i32> @pr20114(<4 x i32> %__mask) { %masked_new.i.i.i = and <4 x i32> bitcast (<2 x i64> (<4 x i32>)* @pr20114 to i64), i64 ptrtoint (<4 x i32> (<4 x i32>)* @pr20114 to i64)> to <4 x i32>), %mask01.i ret <4 x i32> %masked_new.i.i.i } + +define <2 x i32*> @pr23113(<4 x i32*> %A) { +; CHECK-LABEL: @pr20114 +; CHECK: %[[V:.*]] = shufflevector <4 x i32*> %A, <4 x i32*> undef, <2 x i32> +; CHECK-NEXT: ret <2 x i32*> %[[V]] + %1 = shufflevector <4 x i32*> %A, <4 x i32*> undef, <2 x i32> + ret <2 x i32*> %1 +} -- 2.34.1