From 70f556140fca702ef6062b0c46b032908b9ae2a5 Mon Sep 17 00:00:00 2001 From: Jack Carter Date: Mon, 30 Sep 2013 17:52:33 +0000 Subject: [PATCH] [mips][msa] Direct Object Emission for 2R instructions. This patch adds Direct Object Emission support for 2R instructions: nloc.{b,h,w}, nlzc.{b,h,w}, pcnt.{b,w,d}. Patch by Matheus Almeida git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191685 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Mips/MipsMSAInstrFormats.td | 5 ++++ lib/Target/Mips/MipsMSAInstrInfo.td | 32 +++++++++++------------ test/MC/Mips/msa/test_2r.s | 36 ++++++++++++++++++++++++++ 3 files changed, 57 insertions(+), 16 deletions(-) diff --git a/lib/Target/Mips/MipsMSAInstrFormats.td b/lib/Target/Mips/MipsMSAInstrFormats.td index 430a09b9f0a..053af339b75 100644 --- a/lib/Target/Mips/MipsMSAInstrFormats.td +++ b/lib/Target/Mips/MipsMSAInstrFormats.td @@ -57,8 +57,13 @@ class MSA_2R_FILL_FMT major, bits<2> df, bits<6> minor>: MSAInst { } class MSA_2R_FMT major, bits<2> df, bits<6> minor>: MSAInst { + bits<5> ws; + bits<5> wd; + let Inst{25-18} = major; let Inst{17-16} = df; + let Inst{15-11} = ws; + let Inst{10-6} = wd; let Inst{5-0} = minor; } diff --git a/lib/Target/Mips/MipsMSAInstrInfo.td b/lib/Target/Mips/MipsMSAInstrInfo.td index 2a75e2b9e9d..dee47390214 100644 --- a/lib/Target/Mips/MipsMSAInstrInfo.td +++ b/lib/Target/Mips/MipsMSAInstrInfo.td @@ -1138,12 +1138,12 @@ class MSA_I10_LDI_DESC_BASE { - dag OutOperandList = (outs RCWD:$wd); - dag InOperandList = (ins RCWS:$ws); + dag OutOperandList = (outs ROWD:$wd); + dag InOperandList = (ins ROWS:$ws); string AsmString = !strconcat(instr_asm, "\t$wd, $ws"); - list Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws))]; + list Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))]; InstrItinClass Itinerary = itin; } @@ -2147,15 +2147,15 @@ class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128HOpnd>; class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128WOpnd>; class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128DOpnd>; -class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128B>; -class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128H>; -class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128W>; -class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128D>; +class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128BOpnd>; +class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128HOpnd>; +class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128WOpnd>; +class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128DOpnd>; -class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128B>; -class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128H>; -class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128W>; -class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128D>; +class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128BOpnd>; +class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128HOpnd>; +class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128WOpnd>; +class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128DOpnd>; class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128B>; class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE; @@ -2182,10 +2182,10 @@ class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", MipsPCKOD, MSA128HOpnd>; class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", MipsPCKOD, MSA128WOpnd>; class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", MipsPCKOD, MSA128DOpnd>; -class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128B>; -class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128H>; -class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128W>; -class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128D>; +class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128BOpnd>; +class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128HOpnd>; +class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128WOpnd>; +class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128DOpnd>; class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, MSA128B>; class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, MSA128H>; diff --git a/test/MC/Mips/msa/test_2r.s b/test/MC/Mips/msa/test_2r.s index 5bdaf90d4e5..67a2b6f0164 100644 --- a/test/MC/Mips/msa/test_2r.s +++ b/test/MC/Mips/msa/test_2r.s @@ -5,11 +5,47 @@ # CHECK: fill.b $w30, $9 # encoding: [0x7b,0x00,0x4f,0x9e] # CHECK: fill.h $w31, $23 # encoding: [0x7b,0x01,0xbf,0xde] # CHECK: fill.w $w16, $24 # encoding: [0x7b,0x02,0xc4,0x1e] +# CHECK: nloc.b $w21, $w0 # encoding: [0x7b,0x08,0x05,0x5e] +# CHECK: nloc.h $w18, $w31 # encoding: [0x7b,0x09,0xfc,0x9e] +# CHECK: nloc.w $w2, $w23 # encoding: [0x7b,0x0a,0xb8,0x9e] +# CHECK: nloc.d $w4, $w10 # encoding: [0x7b,0x0b,0x51,0x1e] +# CHECK: nlzc.b $w31, $w2 # encoding: [0x7b,0x0c,0x17,0xde] +# CHECK: nlzc.h $w27, $w22 # encoding: [0x7b,0x0d,0xb6,0xde] +# CHECK: nlzc.w $w10, $w29 # encoding: [0x7b,0x0e,0xea,0x9e] +# CHECK: nlzc.d $w25, $w9 # encoding: [0x7b,0x0f,0x4e,0x5e] +# CHECK: pcnt.b $w20, $w18 # encoding: [0x7b,0x04,0x95,0x1e] +# CHECK: pcnt.h $w0, $w8 # encoding: [0x7b,0x05,0x40,0x1e] +# CHECK: pcnt.w $w23, $w9 # encoding: [0x7b,0x06,0x4d,0xde] +# CHECK: pcnt.d $w21, $w24 # encoding: [0x7b,0x07,0xc5,0x5e] # CHECKOBJDUMP: fill.b $w30, $9 # CHECKOBJDUMP: fill.h $w31, $23 # CHECKOBJDUMP: fill.w $w16, $24 +# CHECKOBJDUMP: nloc.b $w21, $w0 +# CHECKOBJDUMP: nloc.h $w18, $w31 +# CHECKOBJDUMP: nloc.w $w2, $w23 +# CHECKOBJDUMP: nloc.d $w4, $w10 +# CHECKOBJDUMP: nlzc.b $w31, $w2 +# CHECKOBJDUMP: nlzc.h $w27, $w22 +# CHECKOBJDUMP: nlzc.w $w10, $w29 +# CHECKOBJDUMP: nlzc.d $w25, $w9 +# CHECKOBJDUMP: pcnt.b $w20, $w18 +# CHECKOBJDUMP: pcnt.h $w0, $w8 +# CHECKOBJDUMP: pcnt.w $w23, $w9 +# CHECKOBJDUMP: pcnt.d $w21, $w24 fill.b $w30, $9 fill.h $w31, $23 fill.w $w16, $24 + nloc.b $w21, $w0 + nloc.h $w18, $w31 + nloc.w $w2, $w23 + nloc.d $w4, $w10 + nlzc.b $w31, $w2 + nlzc.h $w27, $w22 + nlzc.w $w10, $w29 + nlzc.d $w25, $w9 + pcnt.b $w20, $w18 + pcnt.h $w0, $w8 + pcnt.w $w23, $w9 + pcnt.d $w21, $w24 -- 2.34.1