From 75c3afbe05d88b759010d0740bb17af0209c3287 Mon Sep 17 00:00:00 2001 From: Hal Finkel Date: Wed, 28 Oct 2015 23:03:45 +0000 Subject: [PATCH] [PowerPC] Don't return unsupported register classes for asm constraints As a follow-up to r251566, do the same for the other optionally-supported register classes (mostly for vector registers). Don't return an unavailable register class (which would cause an assert later), but fail cleanly when provided an unsupported inline asm constraint. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251575 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPCISelLowering.cpp | 11 ++++++----- test/CodeGen/PowerPC/vec-asm-disabled.ll | 14 ++++++++++++++ 2 files changed, 20 insertions(+), 5 deletions(-) create mode 100644 test/CodeGen/PowerPC/vec-asm-disabled.ll diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index ce6f3a6e75d..8b55791f7e9 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -10923,18 +10923,19 @@ PPCTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, return std::make_pair(0U, &PPC::QFRCRegClass); if (VT == MVT::v4f32 && Subtarget.hasQPX()) return std::make_pair(0U, &PPC::QSRCRegClass); - return std::make_pair(0U, &PPC::VRRCRegClass); + if (Subtarget.hasAltivec()) + return std::make_pair(0U, &PPC::VRRCRegClass); case 'y': // crrc return std::make_pair(0U, &PPC::CRRCRegClass); } } else if (Constraint == "wc" && Subtarget.useCRBits()) { // An individual CR bit. return std::make_pair(0U, &PPC::CRBITRCRegClass); - } else if (Constraint == "wa" || Constraint == "wd" || - Constraint == "wf") { + } else if ((Constraint == "wa" || Constraint == "wd" || + Constraint == "wf") && Subtarget.hasVSX()) { return std::make_pair(0U, &PPC::VSRCRegClass); - } else if (Constraint == "ws") { - if (VT == MVT::f32) + } else if (Constraint == "ws" && Subtarget.hasVSX()) { + if (VT == MVT::f32 && Subtarget.hasP8Vector()) return std::make_pair(0U, &PPC::VSSRCRegClass); else return std::make_pair(0U, &PPC::VSFRCRegClass); diff --git a/test/CodeGen/PowerPC/vec-asm-disabled.ll b/test/CodeGen/PowerPC/vec-asm-disabled.ll new file mode 100644 index 00000000000..333ccce6b89 --- /dev/null +++ b/test/CodeGen/PowerPC/vec-asm-disabled.ll @@ -0,0 +1,14 @@ +; RUN: not llc -mcpu=pwr7 -o /dev/null %s 2>&1 | FileCheck %s +target datalayout = "E-m:e-i64:64-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +define <4 x i32> @testi1(<4 x i32> %b1, <4 x i32> %b2) #0 { +entry: + %0 = call <4 x i32> asm "xxland $0, $1, $2", "=^wd,^wd,^wd"(<4 x i32> %b1, <4 x i32> %b2) #0 + ret <4 x i32> %0 + +; CHECK: error: couldn't allocate output register for constraint 'wd' +} + +attributes #0 = { nounwind "target-features"="-vsx" } + -- 2.34.1