From 76aa42c19966c243f6b2ec75999f6160c819aff0 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Mon, 12 May 2014 19:23:21 +0000 Subject: [PATCH] Use range for git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208617 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/R600/R600ISelLowering.cpp | 3 +-- lib/Target/R600/SIRegisterInfo.cpp | 7 +++---- 2 files changed, 4 insertions(+), 6 deletions(-) diff --git a/lib/Target/R600/R600ISelLowering.cpp b/lib/Target/R600/R600ISelLowering.cpp index e3bcab02e3f..1ead0b19c24 100644 --- a/lib/Target/R600/R600ISelLowering.cpp +++ b/lib/Target/R600/R600ISelLowering.cpp @@ -1811,8 +1811,7 @@ FoldOperand(SDNode *ParentNode, unsigned SrcIdx, SDValue &Src, SDValue &Neg, TII->getOperandIdx(Opcode, AMDGPU::OpName::src1_W) }; std::vector Consts; - for (unsigned i = 0; i < sizeof(SrcIndices) / sizeof(int); i++) { - int OtherSrcIdx = SrcIndices[i]; + for (int OtherSrcIdx : SrcIndices) { int OtherSelIdx = TII->getSelIdx(Opcode, OtherSrcIdx); if (OtherSrcIdx < 0 || OtherSelIdx < 0) continue; diff --git a/lib/Target/R600/SIRegisterInfo.cpp b/lib/Target/R600/SIRegisterInfo.cpp index 8dc9a05799c..c72d549a3dd 100644 --- a/lib/Target/R600/SIRegisterInfo.cpp +++ b/lib/Target/R600/SIRegisterInfo.cpp @@ -71,10 +71,9 @@ const TargetRegisterClass *SIRegisterInfo::getPhysRegClass(unsigned Reg) const { &AMDGPU::SReg_256RegClass }; - for (unsigned i = 0, e = sizeof(BaseClasses) / - sizeof(const TargetRegisterClass*); i != e; ++i) { - if (BaseClasses[i]->contains(Reg)) { - return BaseClasses[i]; + for (const TargetRegisterClass *BaseClass : BaseClasses) { + if (BaseClass->contains(Reg)) { + return BaseClass; } } return nullptr; -- 2.34.1