From 776fea4daf61dd7631b3b5df36209ba8580dee54 Mon Sep 17 00:00:00 2001 From: =?utf8?q?=E9=BB=84=E6=B6=9B?= Date: Wed, 8 Aug 2012 18:20:43 +0800 Subject: [PATCH] rk2928: add reset support --- arch/arm/mach-rk2928/common.c | 15 ++++----------- arch/arm/mach-rk2928/reset.c | 25 +++++++++++++++++++++++-- 2 files changed, 27 insertions(+), 13 deletions(-) diff --git a/arch/arm/mach-rk2928/common.c b/arch/arm/mach-rk2928/common.c index 1236dca8f1e4..54a3c8da29d8 100644 --- a/arch/arm/mach-rk2928/common.c +++ b/arch/arm/mach-rk2928/common.c @@ -11,7 +11,7 @@ #include #include #include -//#include +#include #include //#include //#include @@ -86,18 +86,11 @@ static void __init rk2928_l2_cache_init(void) static int boot_mode; static void __init rk2928_boot_mode_init(void) { -#if 0 - u32 boot_flag = readl_relaxed(RK2928_PMU_BASE + PMU_SYS_REG0); - boot_mode = readl_relaxed(RK2928_PMU_BASE + PMU_SYS_REG1); - - if (boot_flag == (SYS_KERNRL_REBOOT_FLAG | BOOT_RECOVER)) { - boot_mode = BOOT_MODE_RECOVERY; - } else if (strstr(boot_command_line, "(parameter)")) { - boot_mode = BOOT_MODE_RECOVERY; - } + u32 boot_flag = 0; + boot_mode = readl_relaxed(RK2928_GRF_BASE + GRF_OS_REG1); + if (boot_mode || boot_flag) printk("Boot mode: %d flag: 0x%08x\n", boot_mode, boot_flag); -#endif } int board_boot_mode(void) diff --git a/arch/arm/mach-rk2928/reset.c b/arch/arm/mach-rk2928/reset.c index 24b088e9a1c2..5a0fb4cd00ed 100644 --- a/arch/arm/mach-rk2928/reset.c +++ b/arch/arm/mach-rk2928/reset.c @@ -1,11 +1,32 @@ #include #include -#include #include +#include +#include +#include +#include static void rk2928_arch_reset(char mode, const char *cmd) { - while (1); + u32 boot_flag = 0; + u32 boot_mode = BOOT_MODE_REBOOT; + + if (cmd) { + if (!strcmp(cmd, "charge")) + boot_mode = BOOT_MODE_CHARGE; + } else { + if (system_state != SYSTEM_RESTART) + boot_mode = BOOT_MODE_PANIC; + } + writel_relaxed(0xffff0000 | boot_mode, RK2928_GRF_BASE + GRF_OS_REG1); // for linux + dsb(); + /* disable remap */ + writel_relaxed(1 << (12 + 16), RK2928_GRF_BASE + GRF_SOC_CON0); + /* pll enter slow mode */ + writel_relaxed(PLL_MODE_SLOW(APLL_ID) | PLL_MODE_SLOW(CPLL_ID) | PLL_MODE_SLOW(GPLL_ID), RK2928_CRU_BASE + CRU_MODE_CON); + dsb(); + writel_relaxed(0xeca8, RK2928_CRU_BASE + CRU_GLB_SRST_SND); + dsb(); } void (*arch_reset)(char, const char *) = rk2928_arch_reset; -- 2.34.1