From 7935def33e4090ddbd1ed4c70439952073fde5f7 Mon Sep 17 00:00:00 2001 From: Todd Poynor Date: Fri, 5 Nov 2010 18:22:08 -0700 Subject: [PATCH] ARM: tegra: Don't include idle time in irqsoff/preemptoff tracers Surprise bonus change: Rename tegra_enter_idle to more accurately reflect what it does. Change-Id: I1237e1271df693c109b9db8b47421f8a4c3043c3 Signed-off-by: Todd Poynor --- arch/arm/mach-tegra/cpuidle.c | 8 ++++++-- arch/arm/mach-tegra/suspend.c | 2 ++ 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-tegra/cpuidle.c b/arch/arm/mach-tegra/cpuidle.c index 765e368401aa..a063c34ecf60 100644 --- a/arch/arm/mach-tegra/cpuidle.c +++ b/arch/arm/mach-tegra/cpuidle.c @@ -131,12 +131,14 @@ static inline void tegra_flow_wfi(struct cpuidle_device *dev) flow_ctrl = flow_ctrl + FLOW_CTRL_HALT_CPUx_EVENTS(dev->cpu); + stop_critical_timings(); dsb(); __raw_writel(reg, flow_ctrl); reg = __raw_readl(flow_ctrl); __asm__ volatile ("wfi"); __raw_writel(0, flow_ctrl); reg = __raw_readl(flow_ctrl); + start_critical_timings(); } #ifdef CONFIG_SMP @@ -377,6 +379,7 @@ static void tegra_idle_enter_lp2_cpu1(struct cpuidle_device *dev, /* Prepare CPU1 for LP2 by putting it in reset */ + stop_critical_timings(); gic_cpu_exit(0); barrier(); twd_ctrl = readl(twd_base + 0x8); @@ -398,6 +401,7 @@ static void tegra_idle_enter_lp2_cpu1(struct cpuidle_device *dev, tegra_legacy_force_irq_clr(TEGRA_CPUIDLE_BOTH_IDLE); writel(smp_processor_id(), EVP_CPU_RESET_VECTOR); + start_critical_timings(); /* * TODO: is it worth going back to wfi if no interrupt is pending @@ -474,7 +478,7 @@ static int tegra_idle_enter_lp2(struct cpuidle_device *dev, return (int)us; } -static int tegra_idle_enter(unsigned int cpu) +static int tegra_cpuidle_register_device(unsigned int cpu) { struct cpuidle_device *dev; struct cpuidle_state *state; @@ -589,7 +593,7 @@ static int __init tegra_cpuidle_init(void) return ret; for_each_possible_cpu(cpu) { - if (tegra_idle_enter(cpu)) + if (tegra_cpuidle_register_device(cpu)) pr_err("CPU%u: error initializing idle loop\n", cpu); } diff --git a/arch/arm/mach-tegra/suspend.c b/arch/arm/mach-tegra/suspend.c index 8c7d0a9ffe93..f691e906eb0e 100644 --- a/arch/arm/mach-tegra/suspend.c +++ b/arch/arm/mach-tegra/suspend.c @@ -365,6 +365,7 @@ unsigned int tegra_suspend_lp2(unsigned int us) tegra_lp2_set_trigger(us); suspend_cpu_complex(); + stop_critical_timings(); flush_cache_all(); /* structure is written by reset code, so the L2 lines * must be invalidated */ @@ -375,6 +376,7 @@ unsigned int tegra_suspend_lp2(unsigned int us) /* return from __cortex_a9_restore */ barrier(); restore_cpu_complex(); + start_critical_timings(); remain = tegra_lp2_timer_remain(); if (us) -- 2.34.1