From 798cb2ab82afd5862c80594abf47dac5f4251221 Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Tue, 26 Jun 2007 14:28:59 +0000 Subject: [PATCH] Renumber the SimpleValueType values to fill in the hole left by removing MVT::Vector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37730 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/CodeGen/ValueTypes.h | 24 ++++++++++++------------ include/llvm/CodeGen/ValueTypes.td | 23 +++++++++++------------ 2 files changed, 23 insertions(+), 24 deletions(-) diff --git a/include/llvm/CodeGen/ValueTypes.h b/include/llvm/CodeGen/ValueTypes.h index c9983868e81..743a1f64dd7 100644 --- a/include/llvm/CodeGen/ValueTypes.h +++ b/include/llvm/CodeGen/ValueTypes.h @@ -46,22 +46,22 @@ namespace MVT { // MVT = Machine Value Types isVoid = 12, // This has no value - v8i8 = 14, // 8 x i8 - v4i16 = 15, // 4 x i16 - v2i32 = 16, // 2 x i32 - v1i64 = 17, // 1 x i64 - v16i8 = 18, // 16 x i8 - v8i16 = 19, // 8 x i16 - v4i32 = 20, // 4 x i32 - v2i64 = 21, // 2 x i64 + v8i8 = 13, // 8 x i8 + v4i16 = 14, // 4 x i16 + v2i32 = 15, // 2 x i32 + v1i64 = 16, // 1 x i64 + v16i8 = 17, // 16 x i8 + v8i16 = 18, // 8 x i16 + v4i32 = 19, // 4 x i32 + v2i64 = 20, // 2 x i64 - v2f32 = 22, // 2 x f32 - v4f32 = 23, // 4 x f32 - v2f64 = 24, // 2 x f64 + v2f32 = 21, // 2 x f32 + v4f32 = 22, // 4 x f32 + v2f64 = 23, // 2 x f64 FIRST_VECTOR_VALUETYPE = v8i8, LAST_VECTOR_VALUETYPE = v2f64, - LAST_VALUETYPE = 25, // This always remains at the end of the list. + LAST_VALUETYPE = 24, // This always remains at the end of the list. // iAny - An integer value of any bit width. This is used for intrinsics // that have overloadings based on integer bit widths. This is only for diff --git a/include/llvm/CodeGen/ValueTypes.td b/include/llvm/CodeGen/ValueTypes.td index 0541785e3eb..557a02b34be 100644 --- a/include/llvm/CodeGen/ValueTypes.td +++ b/include/llvm/CodeGen/ValueTypes.td @@ -32,19 +32,18 @@ def f80 : ValueType<80 , 9>; // 80-bit floating point value def f128 : ValueType<128, 10>; // 128-bit floating point value def FlagVT : ValueType<0 , 11>; // Condition code or machine flag def isVoid : ValueType<0 , 12>; // Produces no value -def Vector : ValueType<0 , 13>; // Abstract vector value -def v8i8 : ValueType<64 , 14>; // 8 x i8 vector value -def v4i16 : ValueType<64 , 15>; // 4 x i16 vector value -def v2i32 : ValueType<64 , 16>; // 2 x i32 vector value -def v1i64 : ValueType<64 , 17>; // 1 x i64 vector value +def v8i8 : ValueType<64 , 13>; // 8 x i8 vector value +def v4i16 : ValueType<64 , 14>; // 4 x i16 vector value +def v2i32 : ValueType<64 , 15>; // 2 x i32 vector value +def v1i64 : ValueType<64 , 16>; // 1 x i64 vector value -def v16i8 : ValueType<128, 18>; // 16 x i8 vector value -def v8i16 : ValueType<128, 19>; // 8 x i16 vector value -def v4i32 : ValueType<128, 20>; // 4 x i32 vector value -def v2i64 : ValueType<128, 21>; // 2 x i64 vector value -def v2f32 : ValueType<64, 22>; // 2 x f32 vector value -def v4f32 : ValueType<128, 23>; // 4 x f32 vector value -def v2f64 : ValueType<128, 24>; // 2 x f64 vector value +def v16i8 : ValueType<128, 17>; // 16 x i8 vector value +def v8i16 : ValueType<128, 18>; // 8 x i16 vector value +def v4i32 : ValueType<128, 19>; // 4 x i32 vector value +def v2i64 : ValueType<128, 20>; // 2 x i64 vector value +def v2f32 : ValueType<64, 21>; // 2 x f32 vector value +def v4f32 : ValueType<128, 22>; // 4 x f32 vector value +def v2f64 : ValueType<128, 23>; // 2 x f64 vector value // Pseudo valuetype to represent "integer of any bit width" def iAny : ValueType<0 , 254>; // integer value of any bit width -- 2.34.1