From 79fb809a5dabf330dd0897b83162fc8e2f6ee9d9 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Tue, 26 Mar 2013 17:56:05 -0400 Subject: [PATCH] drm/radeon/dpm/ni: properly catch errors in dpm setup We weren't properly catching errors in dpm_enable() and dpm_set_power_state(). Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/ni_dpm.c | 132 ++++++++++++++++++++++++-------- 1 file changed, 98 insertions(+), 34 deletions(-) diff --git a/drivers/gpu/drm/radeon/ni_dpm.c b/drivers/gpu/drm/radeon/ni_dpm.c index 86f98db4716d..8e6b23aecc7f 100644 --- a/drivers/gpu/drm/radeon/ni_dpm.c +++ b/drivers/gpu/drm/radeon/ni_dpm.c @@ -3517,6 +3517,7 @@ int ni_dpm_enable(struct radeon_device *rdev) struct rv7xx_power_info *pi = rv770_get_pi(rdev); struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev); struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; + int ret; if (pi->gfx_clock_gating) ni_cg_clockgating_default(rdev); @@ -3528,10 +3529,15 @@ int ni_dpm_enable(struct radeon_device *rdev) ni_ls_clockgating_default(rdev); if (pi->voltage_control) { rv770_enable_voltage_control(rdev, true); - cypress_construct_voltage_tables(rdev); + ret = cypress_construct_voltage_tables(rdev); + if (ret) + return ret; + } + if (eg_pi->dynamic_ac_timing) { + ret = ni_initialize_mc_reg_table(rdev); + if (ret) + eg_pi->dynamic_ac_timing = false; } - if (eg_pi->dynamic_ac_timing) - ni_initialize_mc_reg_table(rdev); if (pi->dynamic_ss) cypress_enable_spread_spectrum(rdev, true); if (pi->thermal_protection) @@ -3545,21 +3551,43 @@ int ni_dpm_enable(struct radeon_device *rdev) rv770_program_vc(rdev); if (pi->dynamic_pcie_gen2) ni_enable_dynamic_pcie_gen2(rdev, true); - if (rv770_upload_firmware(rdev)) - return -EINVAL; - ni_process_firmware_header(rdev); - ni_initial_switch_from_arb_f0_to_f1(rdev); - ni_init_smc_table(rdev); - ni_init_smc_spll_table(rdev); - ni_init_arb_table_index(rdev); - if (eg_pi->dynamic_ac_timing) - ni_populate_mc_reg_table(rdev, boot_ps); - ni_initialize_smc_cac_tables(rdev); - ni_initialize_hardware_cac_manager(rdev); - ni_populate_smc_tdp_limits(rdev, boot_ps); + ret = rv770_upload_firmware(rdev); + if (ret) + return ret; + ret = ni_process_firmware_header(rdev); + if (ret) + return ret; + ret = ni_initial_switch_from_arb_f0_to_f1(rdev); + if (ret) + return ret; + ret = ni_init_smc_table(rdev); + if (ret) + return ret; + ret = ni_init_smc_spll_table(rdev); + if (ret) + return ret; + ret = ni_init_arb_table_index(rdev); + if (ret) + return ret; + if (eg_pi->dynamic_ac_timing) { + ret = ni_populate_mc_reg_table(rdev, boot_ps); + if (ret) + return ret; + } + ret = ni_initialize_smc_cac_tables(rdev); + if (ret) + return ret; + ret = ni_initialize_hardware_cac_manager(rdev); + if (ret) + return ret; + ret = ni_populate_smc_tdp_limits(rdev, boot_ps); + if (ret) + return ret; ni_program_response_times(rdev); r7xx_start_smc(rdev); - cypress_notify_smc_display_change(rdev, false); + ret = cypress_notify_smc_display_change(rdev, false); + if (ret) + return ret; cypress_enable_sclk_control(rdev, true); if (eg_pi->memory_transition) cypress_enable_mclk_control(rdev, true); @@ -3575,7 +3603,9 @@ int ni_dpm_enable(struct radeon_device *rdev) r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) { PPSMC_Result result; - rv770_set_thermal_temperature_range(rdev, R600_TEMP_RANGE_MIN, 0xff * 1000); + ret = rv770_set_thermal_temperature_range(rdev, R600_TEMP_RANGE_MIN, 0xff * 1000); + if (ret) + return ret; rdev->irq.dpm_thermal = true; radeon_irq_set(rdev); result = rv770_send_msg_to_smc(rdev, PPSMC_MSG_EnableThermalInterrupt); @@ -3632,11 +3662,20 @@ void ni_dpm_disable(struct radeon_device *rdev) int ni_power_control_set_level(struct radeon_device *rdev) { struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps; + int ret; - ni_restrict_performance_levels_before_switch(rdev); - rv770_halt_smc(rdev); - ni_populate_smc_tdp_limits(rdev, new_ps); - rv770_resume_smc(rdev); + ret = ni_restrict_performance_levels_before_switch(rdev); + if (ret) + return ret; + ret = rv770_halt_smc(rdev); + if (ret) + return ret; + ret = ni_populate_smc_tdp_limits(rdev, new_ps); + if (ret) + return ret; + ret = rv770_resume_smc(rdev); + if (ret) + return ret; rv770_set_sw_state(rdev); return 0; @@ -3662,29 +3701,54 @@ int ni_dpm_set_power_state(struct radeon_device *rdev) struct radeon_ps *old_ps = &eg_pi->current_rps; int ret; - ni_restrict_performance_levels_before_switch(rdev); + ret = ni_restrict_performance_levels_before_switch(rdev); + if (ret) + return ret; rv770_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps); - ni_enable_power_containment(rdev, new_ps, false); - ni_enable_smc_cac(rdev, new_ps, false); - rv770_halt_smc(rdev); + ret = ni_enable_power_containment(rdev, new_ps, false); + if (ret) + return ret; + ret = ni_enable_smc_cac(rdev, new_ps, false); + if (ret) + return ret; + ret = rv770_halt_smc(rdev); + if (ret) + return ret; if (eg_pi->smu_uvd_hs) btc_notify_uvd_to_smc(rdev, new_ps); - ni_upload_sw_state(rdev, new_ps); - if (eg_pi->dynamic_ac_timing) - ni_upload_mc_reg_table(rdev, new_ps); + ret = ni_upload_sw_state(rdev, new_ps); + if (ret) + return ret; + if (eg_pi->dynamic_ac_timing) { + ret = ni_upload_mc_reg_table(rdev, new_ps); + if (ret) + return ret; + } ret = ni_program_memory_timing_parameters(rdev, new_ps); if (ret) return ret; - ni_populate_smc_tdp_limits(rdev, new_ps); - rv770_resume_smc(rdev); - rv770_set_sw_state(rdev); + ret = ni_populate_smc_tdp_limits(rdev, new_ps); + if (ret) + return ret; + ret = rv770_resume_smc(rdev); + if (ret) + return ret; + ret = rv770_set_sw_state(rdev); + if (ret) + return ret; rv770_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); - ni_enable_smc_cac(rdev, new_ps, true); - ni_enable_power_containment(rdev, new_ps, true); + ret = ni_enable_smc_cac(rdev, new_ps, true); + if (ret) + return ret; + ret = ni_enable_power_containment(rdev, new_ps, true); + if (ret) + return ret; #if 0 /* XXX */ - ni_unrestrict_performance_levels_after_switch(rdev); + ret = ni_unrestrict_performance_levels_after_switch(rdev); + if (ret) + return ret; #endif return 0; -- 2.34.1