From 7b81ec6961fa9d6891e36ca3d967768093975d78 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Thu, 14 Apr 2016 15:03:39 +0300 Subject: [PATCH] UPSTREAM: usb: dwc3: core: add fifo space helper this helper will be used, initially, to dump space of different queues and fifos in dwc3 to debugfs. Later, it'll be used to issue remote wakeup when we want to start a transfer and there's something in a TX FIFO. Change-Id: I4ebd7a0c0df1757fbfdb561eab84617710e0a580 Signed-off-by: Felipe Balbi Signed-off-by: Wu Liang feng (cherry picked from commit cf6d867d3b57d4eca229b3c506216d98d88be49c) --- drivers/usb/dwc3/core.c | 14 ++++++++++++++ drivers/usb/dwc3/core.h | 14 ++++++++++++++ 2 files changed, 28 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 7d6b90cfe64c..9084908d3939 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -60,6 +60,20 @@ void dwc3_set_mode(struct dwc3 *dwc, u32 mode) dwc3_writel(dwc->regs, DWC3_GCTL, reg); } +u32 dwc3_core_fifo_space(struct dwc3_ep *dep, u8 type) +{ + struct dwc3 *dwc = dep->dwc; + u32 reg; + + dwc3_writel(dwc->regs, DWC3_GDBGFIFOSPACE, + DWC3_GDBGFIFOSPACE_NUM(dep->number) | + DWC3_GDBGFIFOSPACE_TYPE(type)); + + reg = dwc3_readl(dwc->regs, DWC3_GDBGFIFOSPACE); + + return DWC3_GDBGFIFOSPACE_SPACE_AVAILABLE(reg); +} + /** * dwc3_core_soft_reset - Issues core soft reset and PHY reset * @dwc: pointer to our context structure diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index e4fe8d752c8f..2705924c3516 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -153,6 +153,19 @@ /* Bit fields */ +/* Global Debug Queue/FIFO Space Available Register */ +#define DWC3_GDBGFIFOSPACE_NUM(n) ((n) & 0x1f) +#define DWC3_GDBGFIFOSPACE_TYPE(n) (((n) << 5) & 0x1e0) +#define DWC3_GDBGFIFOSPACE_SPACE_AVAILABLE(n) (((n) >> 16) & 0xffff) + +#define DWC3_TXFIFOQ 1 +#define DWC3_RXFIFOQ 3 +#define DWC3_TXREQQ 5 +#define DWC3_RXREQQ 7 +#define DWC3_RXINFOQ 9 +#define DWC3_DESCFETCHQ 13 +#define DWC3_EVENTQ 15 + /* Global Configuration Register */ #define DWC3_GCTL_PWRDNSCALE(n) ((n) << 19) #define DWC3_GCTL_U2RSTECN (1 << 16) @@ -1041,6 +1054,7 @@ struct dwc3_gadget_ep_cmd_params { /* prototypes */ void dwc3_set_mode(struct dwc3 *dwc, u32 mode); +u32 dwc3_core_fifo_space(struct dwc3_ep *dep, u8 type); /* check whether we are on the DWC_usb31 core */ static inline bool dwc3_is_usb31(struct dwc3 *dwc) -- 2.34.1