From 7df0bff9b6cc3b393829e90bbd0a78e0cca4624e Mon Sep 17 00:00:00 2001 From: WeiYong Bi Date: Tue, 6 Jun 2017 08:32:54 +0800 Subject: [PATCH] clk: rockchip: rk3228: export hdmiphy clock Change-Id: Ib7acd4c2f576ad320e069ab2bd9137156062e2d9 Signed-off-by: WeiYong Bi --- drivers/clk/rockchip/clk-rk3228.c | 2 +- include/dt-bindings/clock/rk3228-cru.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/rockchip/clk-rk3228.c b/drivers/clk/rockchip/clk-rk3228.c index 3f04be67429d..9a86f7ed0817 100644 --- a/drivers/clk/rockchip/clk-rk3228.c +++ b/drivers/clk/rockchip/clk-rk3228.c @@ -255,7 +255,7 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = { RK2928_CLKGATE_CON(4), 0, GFLAGS), /* PD_MISC */ - MUX(0, "hdmiphy", mux_hdmiphy_p, CLK_SET_RATE_PARENT, + MUX(HDMIPHY, "hdmiphy", mux_hdmiphy_p, CLK_SET_RATE_PARENT, RK2928_MISC_CON, 13, 1, MFLAGS), MUX(0, "usb480m_phy", mux_usb480m_phy_p, CLK_SET_RATE_PARENT, RK2928_MISC_CON, 14, 1, MFLAGS), diff --git a/include/dt-bindings/clock/rk3228-cru.h b/include/dt-bindings/clock/rk3228-cru.h index 56f841c22801..007267331695 100644 --- a/include/dt-bindings/clock/rk3228-cru.h +++ b/include/dt-bindings/clock/rk3228-cru.h @@ -76,6 +76,7 @@ /* dclk gates */ #define DCLK_VOP 190 #define DCLK_HDMI_PHY 191 +#define HDMIPHY 192 /* aclk gates */ #define ACLK_DMAC 194 -- 2.34.1