From 7ecc850cf19b365a88f30c3f300d3979b960fe8b Mon Sep 17 00:00:00 2001
From: David Goodwin <david_goodwin@apple.com>
Date: Wed, 15 Jul 2009 15:50:19 +0000
Subject: [PATCH] Thumb-2 only support [base_reg + offset_reg] addressing, not
 [base_reg - offset_reg].

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75789 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/ARM/ARMISelDAGToDAG.cpp | 29 ++++++++++++++++-------------
 1 file changed, 16 insertions(+), 13 deletions(-)

diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp
index a102021e423..bb8629a74d5 100644
--- a/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -613,23 +613,21 @@ bool ARMDAGToDAGISel::SelectT2AddrModeImm12(SDValue Op, SDValue N,
 
 bool ARMDAGToDAGISel::SelectT2AddrModeImm8(SDValue Op, SDValue N,
                                            SDValue &Base, SDValue &OffImm) {
-  if (N.getOpcode() == ISD::ADD) {
+  if ((N.getOpcode() == ISD::ADD) || (N.getOpcode() == ISD::SUB)) {
     if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
-      int RHSC = (int)RHS->getZExtValue();
-      if (RHSC < 0 && RHSC > -0x100) { // 8 bits.
+      int RHSC = (int)RHS->getSExtValue();
+      if (N.getOpcode() == ISD::SUB)
+        RHSC = -RHSC;
+
+      if ((RHSC >= -255) && (RHSC <= 255)) { // sign + 8 bits.
         Base   = N.getOperand(0);
         OffImm = CurDAG->getTargetConstant(RHSC, MVT::i32);
         return true;
       }
-    }
-  } else if (N.getOpcode() == ISD::SUB) {
-    if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
-      int RHSC = (int)RHS->getZExtValue();
-      if (RHSC >= 0 && RHSC < 0x100) { // 8 bits.
-        Base   = N.getOperand(0);
-        OffImm = CurDAG->getTargetConstant(-RHSC, MVT::i32);
-        return true;
-      }
+    } else if (N.getOpcode() == ISD::SUB) {
+      Base   = N;
+      OffImm = CurDAG->getTargetConstant(0, MVT::i32);
+      return true;
     }
   }
 
@@ -700,6 +698,10 @@ bool ARMDAGToDAGISel::SelectT2AddrModeSoReg(SDValue Op, SDValue N,
     return true;
   }
 
+  // Thumb2 does not support (R - R) or (R - (R << [1,2,3])).
+  if (N.getOpcode() != ISD::ADD)
+    return false;
+
   // Look for (R + R) or (R + (R << [1,2,3])).
   unsigned ShAmt = 0;
   Base   = N.getOperand(0);
@@ -727,9 +729,10 @@ bool ARMDAGToDAGISel::SelectT2AddrModeSoReg(SDValue Op, SDValue N,
       ShOpcVal = ARM_AM::no_shift;
     }
   } else if (SelectT2AddrModeImm12(Op, N, Base, ShImm) ||
-             SelectT2AddrModeImm8 (Op, N, Base, ShImm))
+             SelectT2AddrModeImm8 (Op, N, Base, ShImm)) {
     // Don't match if it's possible to match to one of the r +/- imm cases.
     return false;
+  }
   
   ShImm = CurDAG->getTargetConstant(ShAmt, MVT::i32);
 
-- 
2.34.1