From 812f70661d2d1c6e59f4e93798ef5778a4c1cf24 Mon Sep 17 00:00:00 2001 From: Alex Lorenz Date: Fri, 7 Aug 2015 20:48:30 +0000 Subject: [PATCH] MIR Serialization: Serialize the base alignment for the machine memory operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244357 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/MIRParser/MILexer.cpp | 1 + lib/CodeGen/MIRParser/MILexer.h | 1 + lib/CodeGen/MIRParser/MIParser.cpp | 17 ++++++++-- lib/CodeGen/MIRPrinter.cpp | 3 +- .../X86/expected-align-in-memory-operand.mir | 32 +++++++++++++++++++ ...lignment-after-align-in-memory-operand.mir | 32 +++++++++++++++++++ test/CodeGen/MIR/X86/memory-operands.mir | 31 ++++++++++++++++++ 7 files changed, 113 insertions(+), 4 deletions(-) create mode 100644 test/CodeGen/MIR/X86/expected-align-in-memory-operand.mir create mode 100644 test/CodeGen/MIR/X86/expected-alignment-after-align-in-memory-operand.mir diff --git a/lib/CodeGen/MIRParser/MILexer.cpp b/lib/CodeGen/MIRParser/MILexer.cpp index 99029a93c7b..f8640de8f6f 100644 --- a/lib/CodeGen/MIRParser/MILexer.cpp +++ b/lib/CodeGen/MIRParser/MILexer.cpp @@ -200,6 +200,7 @@ static MIToken::TokenKind getIdentifierKind(StringRef Identifier) { .Case("volatile", MIToken::kw_volatile) .Case("non-temporal", MIToken::kw_non_temporal) .Case("invariant", MIToken::kw_invariant) + .Case("align", MIToken::kw_align) .Default(MIToken::Identifier); } diff --git a/lib/CodeGen/MIRParser/MILexer.h b/lib/CodeGen/MIRParser/MILexer.h index 752344ed050..8448c228a7f 100644 --- a/lib/CodeGen/MIRParser/MILexer.h +++ b/lib/CodeGen/MIRParser/MILexer.h @@ -69,6 +69,7 @@ struct MIToken { kw_volatile, kw_non_temporal, kw_invariant, + kw_align, // Identifier tokens Identifier, diff --git a/lib/CodeGen/MIRParser/MIParser.cpp b/lib/CodeGen/MIRParser/MIParser.cpp index 8874aaedfcf..fe39d157297 100644 --- a/lib/CodeGen/MIRParser/MIParser.cpp +++ b/lib/CodeGen/MIRParser/MIParser.cpp @@ -1128,13 +1128,24 @@ bool MIParser::parseMachineMemoryOperand(MachineMemOperand *&Dest) { int64_t Offset = 0; if (parseOffset(Offset)) return true; - // TODO: Parse the base alignment. + unsigned BaseAlignment = Size; + if (Token.is(MIToken::comma)) { + lex(); + if (Token.isNot(MIToken::kw_align)) + return error("expected 'align'"); + lex(); + if (Token.isNot(MIToken::IntegerLiteral)) + return error("expected an integer literal after 'align'"); + if (getUnsigned(BaseAlignment)) + return true; + lex(); + } // TODO: Parse the attached metadata nodes. if (expectAndConsume(MIToken::rparen)) return true; - Dest = - MF.getMachineMemOperand(MachinePointerInfo(V, Offset), Flags, Size, Size); + Dest = MF.getMachineMemOperand(MachinePointerInfo(V, Offset), Flags, Size, + BaseAlignment); return false; } diff --git a/lib/CodeGen/MIRPrinter.cpp b/lib/CodeGen/MIRPrinter.cpp index 4710f168d3a..6327ff28ba8 100644 --- a/lib/CodeGen/MIRPrinter.cpp +++ b/lib/CodeGen/MIRPrinter.cpp @@ -679,7 +679,8 @@ void MIPrinter::print(const MachineMemOperand &Op) { printIRValueReference(*Val); // TODO: Print PseudoSourceValue. printOffset(Op.getOffset()); - // TODO: Print the base alignment. + if (Op.getBaseAlignment() != Op.getSize()) + OS << ", align " << Op.getBaseAlignment(); // TODO: Print the metadata attributes. OS << ')'; } diff --git a/test/CodeGen/MIR/X86/expected-align-in-memory-operand.mir b/test/CodeGen/MIR/X86/expected-align-in-memory-operand.mir new file mode 100644 index 00000000000..b11734e5d90 --- /dev/null +++ b/test/CodeGen/MIR/X86/expected-align-in-memory-operand.mir @@ -0,0 +1,32 @@ +# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s + +--- | + + define void @memory_alignment(<8 x float>* %vec) { + entry: + %v = load <8 x float>, <8 x float>* %vec + %v2 = insertelement <8 x float> %v, float 0.0, i32 4 + store <8 x float> %v2, <8 x float>* %vec + ret void + } + +... +--- +name: memory_alignment +tracksRegLiveness: true +liveins: + - { reg: '%rdi' } +body: + - id: 0 + name: entry + liveins: [ '%rdi' ] + instructions: +# CHECK: [[@LINE+1]]:70: expected 'align' + - '%xmm0 = MOVAPSrm %rdi, 1, _, 0, _ :: (load 16 from %ir.vec, 32)' + - '%xmm1 = MOVAPSrm %rdi, 1, _, 16, _ :: (load 16 from %ir.vec + 16, align 32)' + - '%xmm2 = FsFLD0SS' + - '%xmm1 = MOVSSrr killed %xmm1, killed %xmm2' + - 'MOVAPSmr %rdi, 1, _, 0, _, killed %xmm0 :: (store 16 into %ir.vec, align 32)' + - 'MOVAPSmr killed %rdi, 1, _, 16, _, killed %xmm1 :: (store 16 into %ir.vec + 16, align 32)' + - RETQ +... diff --git a/test/CodeGen/MIR/X86/expected-alignment-after-align-in-memory-operand.mir b/test/CodeGen/MIR/X86/expected-alignment-after-align-in-memory-operand.mir new file mode 100644 index 00000000000..19ed8e8544e --- /dev/null +++ b/test/CodeGen/MIR/X86/expected-alignment-after-align-in-memory-operand.mir @@ -0,0 +1,32 @@ +# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s + +--- | + + define void @memory_alignment(<8 x float>* %vec) { + entry: + %v = load <8 x float>, <8 x float>* %vec + %v2 = insertelement <8 x float> %v, float 0.0, i32 4 + store <8 x float> %v2, <8 x float>* %vec + ret void + } + +... +--- +name: memory_alignment +tracksRegLiveness: true +liveins: + - { reg: '%rdi' } +body: + - id: 0 + name: entry + liveins: [ '%rdi' ] + instructions: +# CHECK: [[@LINE+1]]:75: expected an integer literal after 'align' + - '%xmm0 = MOVAPSrm %rdi, 1, _, 0, _ :: (load 16 from %ir.vec, align)' + - '%xmm1 = MOVAPSrm %rdi, 1, _, 16, _ :: (load 16 from %ir.vec + 16, align 32)' + - '%xmm2 = FsFLD0SS' + - '%xmm1 = MOVSSrr killed %xmm1, killed %xmm2' + - 'MOVAPSmr %rdi, 1, _, 0, _, killed %xmm0 :: (store 16 into %ir.vec, align 32)' + - 'MOVAPSmr killed %rdi, 1, _, 16, _, killed %xmm1 :: (store 16 into %ir.vec + 16, align 32)' + - RETQ +... diff --git a/test/CodeGen/MIR/X86/memory-operands.mir b/test/CodeGen/MIR/X86/memory-operands.mir index 9e96516d55f..f061367ae12 100644 --- a/test/CodeGen/MIR/X86/memory-operands.mir +++ b/test/CodeGen/MIR/X86/memory-operands.mir @@ -51,6 +51,14 @@ ret void } + define void @memory_alignment(<8 x float>* %vec) { + entry: + %v = load <8 x float>, <8 x float>* %vec + %v2 = insertelement <8 x float> %v, float 0.0, i32 4 + store <8 x float> %v2, <8 x float>* %vec + ret void + } + ... --- name: test @@ -154,3 +162,26 @@ body: - 'MOVAPSmr killed %rdi, 1, _, 16, _, killed %xmm1 :: (store 16 into %ir.vec + 16)' - RETQ ... +--- +name: memory_alignment +tracksRegLiveness: true +liveins: + - { reg: '%rdi' } +body: + - id: 0 + name: entry + liveins: [ '%rdi' ] + instructions: +# CHECK: name: memory_alignment +# CHECK: %xmm0 = MOVAPSrm %rdi, 1, _, 0, _ :: (load 16 from %ir.vec, align 32) +# CHECK-NEXT: %xmm1 = MOVAPSrm %rdi, 1, _, 16, _ :: (load 16 from %ir.vec + 16, align 32) +# CHECK: MOVAPSmr %rdi, 1, _, 0, _, killed %xmm0 :: (store 16 into %ir.vec, align 32) +# CHECK-NEXT: MOVAPSmr killed %rdi, 1, _, 16, _, killed %xmm1 :: (store 16 into %ir.vec + 16, align 32) + - '%xmm0 = MOVAPSrm %rdi, 1, _, 0, _ :: (load 16 from %ir.vec, align 32)' + - '%xmm1 = MOVAPSrm %rdi, 1, _, 16, _ :: (load 16 from %ir.vec + 16, align 32)' + - '%xmm2 = FsFLD0SS' + - '%xmm1 = MOVSSrr killed %xmm1, killed %xmm2' + - 'MOVAPSmr %rdi, 1, _, 0, _, killed %xmm0 :: (store 16 into %ir.vec, align 32)' + - 'MOVAPSmr killed %rdi, 1, _, 16, _, killed %xmm1 :: (store 16 into %ir.vec + 16, align 32)' + - RETQ +... -- 2.34.1