From 815d6131a4d6b3d7d037e42a38734e4e48c35640 Mon Sep 17 00:00:00 2001 From: Daniel Sanders Date: Tue, 14 Jul 2015 12:24:22 +0000 Subject: [PATCH] [mips] Fix li/la differences between IAS and GAS. Summary: - Signed 16-bit should have priority over unsigned. - For la, unsigned 16-bit must use ori+addu rather than directly use ori. - Correct tests on 32-bit immediates with 64-bit predicates by sign-extending the immediate beforehand. For example, isInt<16>(0xffff8000) should be true and use addiu. Also split li/la testing into separate files due to their size. Reviewers: vkalintiris Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10967 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242139 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 165 ++++++------ test/MC/Mips/macro-la-bad.s | 17 ++ test/MC/Mips/macro-la.s | 263 ++++++++++++++++++++ test/MC/Mips/macro-li-bad.s | 11 + test/MC/Mips/macro-li.s | 67 +++++ test/MC/Mips/micromips-expansions.s | 6 +- test/MC/Mips/mips-expansions-bad.s | 12 - test/MC/Mips/mips-expansions.s | 89 ++----- test/MC/Mips/mips64-expansions.s | 2 +- 9 files changed, 464 insertions(+), 168 deletions(-) create mode 100644 test/MC/Mips/macro-la-bad.s create mode 100644 test/MC/Mips/macro-la.s create mode 100644 test/MC/Mips/macro-li-bad.s create mode 100644 test/MC/Mips/macro-li.s diff --git a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index f14156dbfa2..6ee1472b06c 100644 --- a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -1727,37 +1727,59 @@ bool MipsAsmParser::expandInstruction(MCInst &Inst, SMLoc IDLoc, } namespace { +void emitRX(unsigned Opcode, unsigned DstReg, MCOperand Imm, SMLoc IDLoc, + SmallVectorImpl &Instructions) { + MCInst tmpInst; + tmpInst.setOpcode(Opcode); + tmpInst.addOperand(MCOperand::createReg(DstReg)); + tmpInst.addOperand(Imm); + tmpInst.setLoc(IDLoc); + Instructions.push_back(tmpInst); +} + +void emitRI(unsigned Opcode, unsigned DstReg, int16_t Imm, SMLoc IDLoc, + SmallVectorImpl &Instructions) { + emitRX(Opcode, DstReg, MCOperand::createImm(Imm), IDLoc, Instructions); +} + + +void emitRRX(unsigned Opcode, unsigned DstReg, unsigned SrcReg, MCOperand Imm, + SMLoc IDLoc, SmallVectorImpl &Instructions) { + MCInst tmpInst; + tmpInst.setOpcode(Opcode); + tmpInst.addOperand(MCOperand::createReg(DstReg)); + tmpInst.addOperand(MCOperand::createReg(SrcReg)); + tmpInst.addOperand(Imm); + tmpInst.setLoc(IDLoc); + Instructions.push_back(tmpInst); +} + +void emitRRR(unsigned Opcode, unsigned DstReg, unsigned SrcReg, + unsigned SrcReg2, SMLoc IDLoc, + SmallVectorImpl &Instructions) { + emitRRX(Opcode, DstReg, SrcReg, MCOperand::createReg(SrcReg2), IDLoc, + Instructions); +} + +void emitRRI(unsigned Opcode, unsigned DstReg, unsigned SrcReg, int16_t Imm, + SMLoc IDLoc, SmallVectorImpl &Instructions) { + emitRRX(Opcode, DstReg, SrcReg, MCOperand::createImm(Imm), IDLoc, + Instructions); +} + template void createLShiftOri(MCOperand Operand, unsigned RegNo, SMLoc IDLoc, SmallVectorImpl &Instructions) { - MCInst tmpInst; - if (ShiftAmount >= 32) { - tmpInst.setOpcode(Mips::DSLL32); - tmpInst.addOperand(MCOperand::createReg(RegNo)); - tmpInst.addOperand(MCOperand::createReg(RegNo)); - tmpInst.addOperand(MCOperand::createImm(ShiftAmount - 32)); - tmpInst.setLoc(IDLoc); - Instructions.push_back(tmpInst); - tmpInst.clear(); - } else if (ShiftAmount > 0) { - tmpInst.setOpcode(Mips::DSLL); - tmpInst.addOperand(MCOperand::createReg(RegNo)); - tmpInst.addOperand(MCOperand::createReg(RegNo)); - tmpInst.addOperand(MCOperand::createImm(ShiftAmount)); - tmpInst.setLoc(IDLoc); - Instructions.push_back(tmpInst); - tmpInst.clear(); - } + if (ShiftAmount >= 32) + emitRRI(Mips::DSLL32, RegNo, RegNo, ShiftAmount - 32, IDLoc, Instructions); + else if (ShiftAmount > 0) + emitRRI(Mips::DSLL, RegNo, RegNo, ShiftAmount, IDLoc, Instructions); + // There's no need for an ORi if the immediate is 0. if (Operand.isImm() && Operand.getImm() == 0) return; - tmpInst.setOpcode(Mips::ORi); - tmpInst.addOperand(MCOperand::createReg(RegNo)); - tmpInst.addOperand(MCOperand::createReg(RegNo)); - tmpInst.addOperand(Operand); - tmpInst.setLoc(IDLoc); - Instructions.push_back(tmpInst); + emitRRX(Mips::ORi, RegNo, RegNo, Operand, IDLoc, Instructions); } template @@ -1818,12 +1840,22 @@ bool MipsAsmParser::loadImmediate(int64_t ImmValue, unsigned DstReg, return true; } + if (Is32BitImm) { + if (isInt<32>(ImmValue) || isUInt<32>(ImmValue)) { + // Sign extend up to 64-bit so that the predicates match the hardware + // behaviour. In particular, isInt<16>(0xffff8000) and similar should be + // true. + ImmValue = SignExtend64<32>(ImmValue); + } else { + Error(IDLoc, "instruction requires a 32-bit immediate"); + return true; + } + } + bool UseSrcReg = false; if (SrcReg != Mips::NoRegister) UseSrcReg = true; - MCInst tmpInst; - unsigned TmpReg = DstReg; if (UseSrcReg && (DstReg == SrcReg)) { // At this point we need AT to perform the expansions and we exit if it is @@ -1834,29 +1866,26 @@ bool MipsAsmParser::loadImmediate(int64_t ImmValue, unsigned DstReg, TmpReg = ATReg; } - tmpInst.setLoc(IDLoc); // FIXME: gas has a special case for values that are 000...1111, which // becomes a li -1 and then a dsrl - if (0 <= ImmValue && ImmValue <= 65535) { - // For unsigned and positive signed 16-bit values (0 <= j <= 65535): - // li d,j => ori d,$zero,j - if (!UseSrcReg) - SrcReg = isGP64bit() ? Mips::ZERO_64 : Mips::ZERO; - tmpInst.setOpcode(Mips::ORi); - tmpInst.addOperand(MCOperand::createReg(DstReg)); - tmpInst.addOperand(MCOperand::createReg(SrcReg)); - tmpInst.addOperand(MCOperand::createImm(ImmValue)); - Instructions.push_back(tmpInst); - } else if (ImmValue < 0 && ImmValue >= -32768) { - // For negative signed 16-bit values (-32768 <= j < 0): + if (isInt<16>(ImmValue)) { // li d,j => addiu d,$zero,j if (!UseSrcReg) SrcReg = Mips::ZERO; - tmpInst.setOpcode(Mips::ADDiu); - tmpInst.addOperand(MCOperand::createReg(DstReg)); - tmpInst.addOperand(MCOperand::createReg(SrcReg)); - tmpInst.addOperand(MCOperand::createImm(ImmValue)); - Instructions.push_back(tmpInst); + emitRRI(Mips::ADDiu, DstReg, SrcReg, ImmValue, IDLoc, Instructions); + } else if (isUInt<16>(ImmValue)) { + // li d,j => ori d,$zero,j + unsigned TmpReg = DstReg; + if (SrcReg == DstReg) { + unsigned ATReg = getATReg(IDLoc); + if (!ATReg) + return true; + TmpReg = ATReg; + } + + emitRRI(Mips::ORi, TmpReg, Mips::ZERO, ImmValue, IDLoc, Instructions); + if (UseSrcReg) + emitRRR(Mips::ADDu, DstReg, TmpReg, SrcReg, IDLoc, Instructions); } else if (isInt<32>(ImmValue) || isUInt<32>(ImmValue)) { warnIfNoMacro(IDLoc); @@ -1869,30 +1898,16 @@ bool MipsAsmParser::loadImmediate(int64_t ImmValue, unsigned DstReg, if (!Is32BitImm && !isInt<32>(ImmValue)) { // For DLI, expand to an ORi instead of a LUi to avoid sign-extending the // upper 32 bits. - tmpInst.setOpcode(Mips::ORi); - tmpInst.addOperand(MCOperand::createReg(TmpReg)); - tmpInst.addOperand(MCOperand::createReg(Mips::ZERO)); - tmpInst.addOperand(MCOperand::createImm(Bits31To16)); - tmpInst.setLoc(IDLoc); - Instructions.push_back(tmpInst); - // Move the value to the upper 16 bits by doing a 16-bit left shift. - createLShiftOri<16>(0, TmpReg, IDLoc, Instructions); - } else { - tmpInst.setOpcode(Mips::LUi); - tmpInst.addOperand(MCOperand::createReg(TmpReg)); - tmpInst.addOperand(MCOperand::createImm(Bits31To16)); - Instructions.push_back(tmpInst); - } + emitRRI(Mips::ORi, TmpReg, Mips::ZERO, Bits31To16, IDLoc, Instructions); + emitRRI(Mips::DSLL, TmpReg, TmpReg, 16, IDLoc, Instructions); + } else + emitRI(Mips::LUi, TmpReg, Bits31To16, IDLoc, Instructions); createLShiftOri<0>(Bits15To0, TmpReg, IDLoc, Instructions); if (UseSrcReg) createAddu(DstReg, TmpReg, SrcReg, !Is32BitImm, Instructions); } else if ((ImmValue & (0xffffLL << 48)) == 0) { - if (Is32BitImm) { - Error(IDLoc, "instruction requires a 32-bit immediate"); - return true; - } warnIfNoMacro(IDLoc); // <------- lo32 ------> @@ -1912,10 +1927,7 @@ bool MipsAsmParser::loadImmediate(int64_t ImmValue, unsigned DstReg, uint16_t Bits31To16 = (ImmValue >> 16) & 0xffff; uint16_t Bits15To0 = ImmValue & 0xffff; - tmpInst.setOpcode(Mips::LUi); - tmpInst.addOperand(MCOperand::createReg(TmpReg)); - tmpInst.addOperand(MCOperand::createImm(Bits47To32)); - Instructions.push_back(tmpInst); + emitRI(Mips::LUi, TmpReg, Bits47To32, IDLoc, Instructions); createLShiftOri<0>(Bits31To16, TmpReg, IDLoc, Instructions); createLShiftOri<16>(Bits15To0, TmpReg, IDLoc, Instructions); @@ -1923,10 +1935,6 @@ bool MipsAsmParser::loadImmediate(int64_t ImmValue, unsigned DstReg, createAddu(DstReg, TmpReg, SrcReg, !Is32BitImm, Instructions); } else { - if (Is32BitImm) { - Error(IDLoc, "instruction requires a 32-bit immediate"); - return true; - } warnIfNoMacro(IDLoc); // <------- hi32 ------> <------- lo32 ------> @@ -1948,10 +1956,7 @@ bool MipsAsmParser::loadImmediate(int64_t ImmValue, unsigned DstReg, uint16_t Bits31To16 = (ImmValue >> 16) & 0xffff; uint16_t Bits15To0 = ImmValue & 0xffff; - tmpInst.setOpcode(Mips::LUi); - tmpInst.addOperand(MCOperand::createReg(TmpReg)); - tmpInst.addOperand(MCOperand::createImm(Bits63To48)); - Instructions.push_back(tmpInst); + emitRI(Mips::LUi, TmpReg, Bits63To48, IDLoc, Instructions); createLShiftOri<0>(Bits47To32, TmpReg, IDLoc, Instructions); // When Bits31To16 is 0, do a left shift of 32 bits instead of doing @@ -2096,8 +2101,8 @@ bool MipsAsmParser::loadAndAddSymbolAddress( tmpInst.addOperand(MCOperand::createExpr(HiExpr)); Instructions.push_back(tmpInst); - createLShiftOri<0>(MCOperand::createExpr(LoExpr), TmpReg, SMLoc(), - Instructions); + emitRRX(Mips::ADDiu, TmpReg, TmpReg, MCOperand::createExpr(LoExpr), SMLoc(), + Instructions); } if (UseSrcReg) @@ -2708,12 +2713,8 @@ void MipsAsmParser::createNop(bool hasShortDelaySlot, SMLoc IDLoc, void MipsAsmParser::createAddu(unsigned DstReg, unsigned SrcReg, unsigned TrgReg, bool Is64Bit, SmallVectorImpl &Instructions) { - MCInst AdduInst; - AdduInst.setOpcode(Is64Bit ? Mips::DADDu : Mips::ADDu); - AdduInst.addOperand(MCOperand::createReg(DstReg)); - AdduInst.addOperand(MCOperand::createReg(SrcReg)); - AdduInst.addOperand(MCOperand::createReg(TrgReg)); - Instructions.push_back(AdduInst); + emitRRR(Is64Bit ? Mips::DADDu : Mips::ADDu, DstReg, SrcReg, TrgReg, SMLoc(), + Instructions); } unsigned MipsAsmParser::checkTargetMatchPredicate(MCInst &Inst) { diff --git a/test/MC/Mips/macro-la-bad.s b/test/MC/Mips/macro-la-bad.s new file mode 100644 index 00000000000..89d334030ec --- /dev/null +++ b/test/MC/Mips/macro-la-bad.s @@ -0,0 +1,17 @@ +# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r2 2>%t1 +# RUN: FileCheck %s < %t1 --check-prefix=32-BIT +# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n32 2>&1 | \ +# RUN: FileCheck %s --check-prefix=64-BIT --check-prefix=N32-ONLY +# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n64 2>&1 | \ +# RUN: FileCheck %s --check-prefix=64-BIT --check-prefix=N64-ONLY + + .text + la $5, 0x100000000 + # 32-BIT: :[[@LINE-1]]:3: error: instruction requires a 32-bit immediate + # 64-BIT: :[[@LINE-2]]:3: error: instruction requires a 32-bit immediate + la $5, 0x100000000($6) + # 32-BIT: :[[@LINE-1]]:3: error: instruction requires a 32-bit immediate + # 64-BIT: :[[@LINE-2]]:3: error: instruction requires a 32-bit immediate + la $5, symbol + # N64-ONLY: :[[@LINE-1]]:3: warning: instruction loads the 32-bit address of a 64-bit symbol + # N32-ONLY-NOT: :[[@LINE-2]]:3: warning: instruction loads the 32-bit address of a 64-bit symbol diff --git a/test/MC/Mips/macro-la.s b/test/MC/Mips/macro-la.s new file mode 100644 index 00000000000..8c183a7b23e --- /dev/null +++ b/test/MC/Mips/macro-la.s @@ -0,0 +1,263 @@ +# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r2 | \ +# RUN: FileCheck %s +# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 | \ +# RUN: FileCheck %s +# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r2 | \ +# RUN: FileCheck %s +# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r6 | \ +# RUN: FileCheck %s + +la $5, 0x00000001 # CHECK: addiu $5, $zero, 1 # encoding: [0x24,0x05,0x00,0x01] +la $5, 0x00000002 # CHECK: addiu $5, $zero, 2 # encoding: [0x24,0x05,0x00,0x02] +la $5, 0x00004000 # CHECK: addiu $5, $zero, 16384 # encoding: [0x24,0x05,0x40,0x00] +la $5, 0x00008000 # CHECK: ori $5, $zero, 32768 # encoding: [0x34,0x05,0x80,0x00] +la $5, 0xffffffff # CHECK: addiu $5, $zero, -1 # encoding: [0x24,0x05,0xff,0xff] +la $5, 0xfffffffe # CHECK: addiu $5, $zero, -2 # encoding: [0x24,0x05,0xff,0xfe] +la $5, 0xffffc000 # CHECK: addiu $5, $zero, -16384 # encoding: [0x24,0x05,0xc0,0x00] +la $5, 0xffff8000 # CHECK: addiu $5, $zero, -32768 # encoding: [0x24,0x05,0x80,0x00] + +la $5, 0x00010000 # CHECK: lui $5, 1 # encoding: [0x3c,0x05,0x00,0x01] +la $5, 0x00020000 # CHECK: lui $5, 2 # encoding: [0x3c,0x05,0x00,0x02] +la $5, 0x40000000 # CHECK: lui $5, 16384 # encoding: [0x3c,0x05,0x40,0x00] +la $5, 0x80000000 # CHECK: lui $5, 32768 # encoding: [0x3c,0x05,0x80,0x00] +la $5, 0xffff0000 # CHECK: lui $5, 65535 # encoding: [0x3c,0x05,0xff,0xff] +la $5, 0xfffe0000 # CHECK: lui $5, 65534 # encoding: [0x3c,0x05,0xff,0xfe] +la $5, 0xc0000000 # CHECK: lui $5, 49152 # encoding: [0x3c,0x05,0xc0,0x00] +la $5, 0x80000000 # CHECK: lui $5, 32768 # encoding: [0x3c,0x05,0x80,0x00] + +la $5, 0x00010001 # CHECK: lui $5, 1 # encoding: [0x3c,0x05,0x00,0x01] + # CHECK: ori $5, $5, 1 # encoding: [0x34,0xa5,0x00,0x01] +la $5, 0x00020001 # CHECK: lui $5, 2 # encoding: [0x3c,0x05,0x00,0x02] + # CHECK: ori $5, $5, 1 # encoding: [0x34,0xa5,0x00,0x01] +la $5, 0x40000001 # CHECK: lui $5, 16384 # encoding: [0x3c,0x05,0x40,0x00] + # CHECK: ori $5, $5, 1 # encoding: [0x34,0xa5,0x00,0x01] +la $5, 0x80000001 # CHECK: lui $5, 32768 # encoding: [0x3c,0x05,0x80,0x00] + # CHECK: ori $5, $5, 1 # encoding: [0x34,0xa5,0x00,0x01] +la $5, 0x00010002 # CHECK: lui $5, 1 # encoding: [0x3c,0x05,0x00,0x01] + # CHECK: ori $5, $5, 2 # encoding: [0x34,0xa5,0x00,0x02] +la $5, 0x00020002 # CHECK: lui $5, 2 # encoding: [0x3c,0x05,0x00,0x02] + # CHECK: ori $5, $5, 2 # encoding: [0x34,0xa5,0x00,0x02] +la $5, 0x40000002 # CHECK: lui $5, 16384 # encoding: [0x3c,0x05,0x40,0x00] + # CHECK: ori $5, $5, 2 # encoding: [0x34,0xa5,0x00,0x02] +la $5, 0x80000002 # CHECK: lui $5, 32768 # encoding: [0x3c,0x05,0x80,0x00] + # CHECK: ori $5, $5, 2 # encoding: [0x34,0xa5,0x00,0x02] +la $5, 0x00014000 # CHECK: lui $5, 1 # encoding: [0x3c,0x05,0x00,0x01] + # CHECK: ori $5, $5, 16384 # encoding: [0x34,0xa5,0x40,0x00] +la $5, 0x00024000 # CHECK: lui $5, 2 # encoding: [0x3c,0x05,0x00,0x02] + # CHECK: ori $5, $5, 16384 # encoding: [0x34,0xa5,0x40,0x00] +la $5, 0x40004000 # CHECK: lui $5, 16384 # encoding: [0x3c,0x05,0x40,0x00] + # CHECK: ori $5, $5, 16384 # encoding: [0x34,0xa5,0x40,0x00] +la $5, 0x80004000 # CHECK: lui $5, 32768 # encoding: [0x3c,0x05,0x80,0x00] + # CHECK: ori $5, $5, 16384 # encoding: [0x34,0xa5,0x40,0x00] +la $5, 0x00018000 # CHECK: lui $5, 1 # encoding: [0x3c,0x05,0x00,0x01] + # CHECK: ori $5, $5, 32768 # encoding: [0x34,0xa5,0x80,0x00] +la $5, 0x00028000 # CHECK: lui $5, 2 # encoding: [0x3c,0x05,0x00,0x02] + # CHECK: ori $5, $5, 32768 # encoding: [0x34,0xa5,0x80,0x00] +la $5, 0x40008000 # CHECK: lui $5, 16384 # encoding: [0x3c,0x05,0x40,0x00] + # CHECK: ori $5, $5, 32768 # encoding: [0x34,0xa5,0x80,0x00] +la $5, 0x80008000 # CHECK: lui $5, 32768 # encoding: [0x3c,0x05,0x80,0x00] + # CHECK: ori $5, $5, 32768 # encoding: [0x34,0xa5,0x80,0x00] +la $5, 0xffff4000 # CHECK: lui $5, 65535 # encoding: [0x3c,0x05,0xff,0xff] + # CHECK: ori $5, $5, 16384 # encoding: [0x34,0xa5,0x40,0x00] +la $5, 0xfffe8000 # CHECK: lui $5, 65534 # encoding: [0x3c,0x05,0xff,0xfe] + # CHECK: ori $5, $5, 32768 # encoding: [0x34,0xa5,0x80,0x00] +la $5, 0xc0008000 # CHECK: lui $5, 49152 # encoding: [0x3c,0x05,0xc0,0x00] + # CHECK: ori $5, $5, 32768 # encoding: [0x34,0xa5,0x80,0x00] +la $5, 0x80008000 # CHECK: lui $5, 32768 # encoding: [0x3c,0x05,0x80,0x00] + # CHECK: ori $5, $5, 32768 # encoding: [0x34,0xa5,0x80,0x00] + +la $5, 0x00000001($6) # CHECK: addiu $5, $6, 1 # encoding: [0x24,0xc5,0x00,0x01] +la $5, 0x00000002($6) # CHECK: addiu $5, $6, 2 # encoding: [0x24,0xc5,0x00,0x02] +la $5, 0x00004000($6) # CHECK: addiu $5, $6, 16384 # encoding: [0x24,0xc5,0x40,0x00] +la $5, 0x00008000($6) # CHECK: ori $5, $zero, 32768 # encoding: [0x34,0x05,0x80,0x00] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] +la $5, 0xffffffff($6) # CHECK: addiu $5, $6, -1 # encoding: [0x24,0xc5,0xff,0xff] +la $5, 0xfffffffe($6) # CHECK: addiu $5, $6, -2 # encoding: [0x24,0xc5,0xff,0xfe] +la $5, 0xffffc000($6) # CHECK: addiu $5, $6, -16384 # encoding: [0x24,0xc5,0xc0,0x00] +la $5, 0xffff8000($6) # CHECK: addiu $5, $6, -32768 # encoding: [0x24,0xc5,0x80,0x00] + +la $5, 0x00010000($6) # CHECK: lui $5, 1 # encoding: [0x3c,0x05,0x00,0x01] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] +la $5, 0x00020000($6) # CHECK: lui $5, 2 # encoding: [0x3c,0x05,0x00,0x02] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] +la $5, 0x40000000($6) # CHECK: lui $5, 16384 # encoding: [0x3c,0x05,0x40,0x00] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] +la $5, 0x80000000($6) # CHECK: lui $5, 32768 # encoding: [0x3c,0x05,0x80,0x00] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] +la $5, 0xffff0000($6) # CHECK: lui $5, 65535 # encoding: [0x3c,0x05,0xff,0xff] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] +la $5, 0xfffe0000($6) # CHECK: lui $5, 65534 # encoding: [0x3c,0x05,0xff,0xfe] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] +la $5, 0xc0000000($6) # CHECK: lui $5, 49152 # encoding: [0x3c,0x05,0xc0,0x00] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] +la $5, 0x80000000($6) # CHECK: lui $5, 32768 # encoding: [0x3c,0x05,0x80,0x00] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] + +la $5, 0x00010001($6) # CHECK: lui $5, 1 # encoding: [0x3c,0x05,0x00,0x01] + # CHECK: ori $5, $5, 1 # encoding: [0x34,0xa5,0x00,0x01] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] +la $5, 0x00020001($6) # CHECK: lui $5, 2 # encoding: [0x3c,0x05,0x00,0x02] + # CHECK: ori $5, $5, 1 # encoding: [0x34,0xa5,0x00,0x01] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] +la $5, 0x40000001($6) # CHECK: lui $5, 16384 # encoding: [0x3c,0x05,0x40,0x00] + # CHECK: ori $5, $5, 1 # encoding: [0x34,0xa5,0x00,0x01] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] +la $5, 0x80000001($6) # CHECK: lui $5, 32768 # encoding: [0x3c,0x05,0x80,0x00] + # CHECK: ori $5, $5, 1 # encoding: [0x34,0xa5,0x00,0x01] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] +la $5, 0x00010002($6) # CHECK: lui $5, 1 # encoding: [0x3c,0x05,0x00,0x01] + # CHECK: ori $5, $5, 2 # encoding: [0x34,0xa5,0x00,0x02] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] +la $5, 0x00020002($6) # CHECK: lui $5, 2 # encoding: [0x3c,0x05,0x00,0x02] + # CHECK: ori $5, $5, 2 # encoding: [0x34,0xa5,0x00,0x02] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] +la $5, 0x40000002($6) # CHECK: lui $5, 16384 # encoding: [0x3c,0x05,0x40,0x00] + # CHECK: ori $5, $5, 2 # encoding: [0x34,0xa5,0x00,0x02] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] +la $5, 0x80000002($6) # CHECK: lui $5, 32768 # encoding: [0x3c,0x05,0x80,0x00] + # CHECK: ori $5, $5, 2 # encoding: [0x34,0xa5,0x00,0x02] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] +la $5, 0x00014000($6) # CHECK: lui $5, 1 # encoding: [0x3c,0x05,0x00,0x01] + # CHECK: ori $5, $5, 16384 # encoding: [0x34,0xa5,0x40,0x00] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] +la $5, 0x00024000($6) # CHECK: lui $5, 2 # encoding: [0x3c,0x05,0x00,0x02] + # CHECK: ori $5, $5, 16384 # encoding: [0x34,0xa5,0x40,0x00] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] +la $5, 0x40004000($6) # CHECK: lui $5, 16384 # encoding: [0x3c,0x05,0x40,0x00] + # CHECK: ori $5, $5, 16384 # encoding: [0x34,0xa5,0x40,0x00] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] +la $5, 0x80004000($6) # CHECK: lui $5, 32768 # encoding: [0x3c,0x05,0x80,0x00] + # CHECK: ori $5, $5, 16384 # encoding: [0x34,0xa5,0x40,0x00] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] +la $5, 0x00018000($6) # CHECK: lui $5, 1 # encoding: [0x3c,0x05,0x00,0x01] + # CHECK: ori $5, $5, 32768 # encoding: [0x34,0xa5,0x80,0x00] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] +la $5, 0x00028000($6) # CHECK: lui $5, 2 # encoding: [0x3c,0x05,0x00,0x02] + # CHECK: ori $5, $5, 32768 # encoding: [0x34,0xa5,0x80,0x00] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] +la $5, 0x40008000($6) # CHECK: lui $5, 16384 # encoding: [0x3c,0x05,0x40,0x00] + # CHECK: ori $5, $5, 32768 # encoding: [0x34,0xa5,0x80,0x00] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] +la $5, 0x80008000($6) # CHECK: lui $5, 32768 # encoding: [0x3c,0x05,0x80,0x00] + # CHECK: ori $5, $5, 32768 # encoding: [0x34,0xa5,0x80,0x00] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] +la $5, 0xffff4000($6) # CHECK: lui $5, 65535 # encoding: [0x3c,0x05,0xff,0xff] + # CHECK: ori $5, $5, 16384 # encoding: [0x34,0xa5,0x40,0x00] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] +la $5, 0xfffe8000($6) # CHECK: lui $5, 65534 # encoding: [0x3c,0x05,0xff,0xfe] + # CHECK: ori $5, $5, 32768 # encoding: [0x34,0xa5,0x80,0x00] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] +la $5, 0xc0008000($6) # CHECK: lui $5, 49152 # encoding: [0x3c,0x05,0xc0,0x00] + # CHECK: ori $5, $5, 32768 # encoding: [0x34,0xa5,0x80,0x00] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] +la $5, 0x80008000($6) # CHECK: lui $5, 32768 # encoding: [0x3c,0x05,0x80,0x00] + # CHECK: ori $5, $5, 32768 # encoding: [0x34,0xa5,0x80,0x00] + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] + +la $6, 0x00000001($6) # CHECK: addiu $6, $6, 1 # encoding: [0x24,0xc6,0x00,0x01] +la $6, 0x00000002($6) # CHECK: addiu $6, $6, 2 # encoding: [0x24,0xc6,0x00,0x02] +la $6, 0x00004000($6) # CHECK: addiu $6, $6, 16384 # encoding: [0x24,0xc6,0x40,0x00] +la $6, 0x00008000($6) # CHECK: ori $1, $zero, 32768 # encoding: [0x34,0x01,0x80,0x00] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] +la $6, 0xffffffff($6) # CHECK: addiu $6, $6, -1 # encoding: [0x24,0xc6,0xff,0xff] +la $6, 0xfffffffe($6) # CHECK: addiu $6, $6, -2 # encoding: [0x24,0xc6,0xff,0xfe] +la $6, 0xffffc000($6) # CHECK: addiu $6, $6, -16384 # encoding: [0x24,0xc6,0xc0,0x00] +la $6, 0xffff8000($6) # CHECK: addiu $6, $6, -32768 # encoding: [0x24,0xc6,0x80,0x00] + +la $6, 0x00010000($6) # CHECK: lui $1, 1 # encoding: [0x3c,0x01,0x00,0x01] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] +la $6, 0x00020000($6) # CHECK: lui $1, 2 # encoding: [0x3c,0x01,0x00,0x02] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] +la $6, 0x40000000($6) # CHECK: lui $1, 16384 # encoding: [0x3c,0x01,0x40,0x00] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] +la $6, 0x80000000($6) # CHECK: lui $1, 32768 # encoding: [0x3c,0x01,0x80,0x00] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] +la $6, 0xffff0000($6) # CHECK: lui $1, 65535 # encoding: [0x3c,0x01,0xff,0xff] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] +la $6, 0xfffe0000($6) # CHECK: lui $1, 65534 # encoding: [0x3c,0x01,0xff,0xfe] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] +la $6, 0xc0000000($6) # CHECK: lui $1, 49152 # encoding: [0x3c,0x01,0xc0,0x00] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] +la $6, 0x80000000($6) # CHECK: lui $1, 32768 # encoding: [0x3c,0x01,0x80,0x00] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] + +la $6, 0x00010001($6) # CHECK: lui $1, 1 # encoding: [0x3c,0x01,0x00,0x01] + # CHECK: ori $1, $1, 1 # encoding: [0x34,0x21,0x00,0x01] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] +la $6, 0x00020001($6) # CHECK: lui $1, 2 # encoding: [0x3c,0x01,0x00,0x02] + # CHECK: ori $1, $1, 1 # encoding: [0x34,0x21,0x00,0x01] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] +la $6, 0x40000001($6) # CHECK: lui $1, 16384 # encoding: [0x3c,0x01,0x40,0x00] + # CHECK: ori $1, $1, 1 # encoding: [0x34,0x21,0x00,0x01] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] +la $6, 0x80000001($6) # CHECK: lui $1, 32768 # encoding: [0x3c,0x01,0x80,0x00] + # CHECK: ori $1, $1, 1 # encoding: [0x34,0x21,0x00,0x01] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] +la $6, 0x00010002($6) # CHECK: lui $1, 1 # encoding: [0x3c,0x01,0x00,0x01] + # CHECK: ori $1, $1, 2 # encoding: [0x34,0x21,0x00,0x02] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] +la $6, 0x00020002($6) # CHECK: lui $1, 2 # encoding: [0x3c,0x01,0x00,0x02] + # CHECK: ori $1, $1, 2 # encoding: [0x34,0x21,0x00,0x02] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] +la $6, 0x40000002($6) # CHECK: lui $1, 16384 # encoding: [0x3c,0x01,0x40,0x00] + # CHECK: ori $1, $1, 2 # encoding: [0x34,0x21,0x00,0x02] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] +la $6, 0x80000002($6) # CHECK: lui $1, 32768 # encoding: [0x3c,0x01,0x80,0x00] + # CHECK: ori $1, $1, 2 # encoding: [0x34,0x21,0x00,0x02] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] +la $6, 0x00014000($6) # CHECK: lui $1, 1 # encoding: [0x3c,0x01,0x00,0x01] + # CHECK: ori $1, $1, 16384 # encoding: [0x34,0x21,0x40,0x00] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] +la $6, 0x00024000($6) # CHECK: lui $1, 2 # encoding: [0x3c,0x01,0x00,0x02] + # CHECK: ori $1, $1, 16384 # encoding: [0x34,0x21,0x40,0x00] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] +la $6, 0x40004000($6) # CHECK: lui $1, 16384 # encoding: [0x3c,0x01,0x40,0x00] + # CHECK: ori $1, $1, 16384 # encoding: [0x34,0x21,0x40,0x00] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] +la $6, 0x80004000($6) # CHECK: lui $1, 32768 # encoding: [0x3c,0x01,0x80,0x00] + # CHECK: ori $1, $1, 16384 # encoding: [0x34,0x21,0x40,0x00] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] +la $6, 0x00018000($6) # CHECK: lui $1, 1 # encoding: [0x3c,0x01,0x00,0x01] + # CHECK: ori $1, $1, 32768 # encoding: [0x34,0x21,0x80,0x00] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] +la $6, 0x00028000($6) # CHECK: lui $1, 2 # encoding: [0x3c,0x01,0x00,0x02] + # CHECK: ori $1, $1, 32768 # encoding: [0x34,0x21,0x80,0x00] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] +la $6, 0x40008000($6) # CHECK: lui $1, 16384 # encoding: [0x3c,0x01,0x40,0x00] + # CHECK: ori $1, $1, 32768 # encoding: [0x34,0x21,0x80,0x00] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] +la $6, 0x80008000($6) # CHECK: lui $1, 32768 # encoding: [0x3c,0x01,0x80,0x00] + # CHECK: ori $1, $1, 32768 # encoding: [0x34,0x21,0x80,0x00] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] +la $6, 0xffff4000($6) # CHECK: lui $1, 65535 # encoding: [0x3c,0x01,0xff,0xff] + # CHECK: ori $1, $1, 16384 # encoding: [0x34,0x21,0x40,0x00] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] +la $6, 0xfffe8000($6) # CHECK: lui $1, 65534 # encoding: [0x3c,0x01,0xff,0xfe] + # CHECK: ori $1, $1, 32768 # encoding: [0x34,0x21,0x80,0x00] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] +la $6, 0xc0008000($6) # CHECK: lui $1, 49152 # encoding: [0x3c,0x01,0xc0,0x00] + # CHECK: ori $1, $1, 32768 # encoding: [0x34,0x21,0x80,0x00] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] +la $6, 0x80008000($6) # CHECK: lui $1, 32768 # encoding: [0x3c,0x01,0x80,0x00] + # CHECK: ori $1, $1, 32768 # encoding: [0x34,0x21,0x80,0x00] + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] + +la $5, symbol # CHECK: lui $5, %hi(symbol) # encoding: [0x3c,0x05,A,A] + # CHECK: # fixup A - offset: 0, value: symbol@ABS_HI, kind: fixup_Mips_HI16 + # CHECK: addiu $5, $5, %lo(symbol) # encoding: [0x24,0xa5,A,A] + # CHECK: # fixup A - offset: 0, value: symbol@ABS_LO, kind: fixup_Mips_LO16 +la $5, symbol($6) # CHECK: lui $5, %hi(symbol) # encoding: [0x3c,0x05,A,A] + # CHECK: # fixup A - offset: 0, value: symbol@ABS_HI, kind: fixup_Mips_HI16 + # CHECK: addiu $5, $5, %lo(symbol) # encoding: [0x24,0xa5,A,A] + # CHECK: # fixup A - offset: 0, value: symbol@ABS_LO, kind: fixup_Mips_LO16 + # CHECK: addu $5, $5, $6 # encoding: [0x00,0xa6,0x28,0x21] +la $6, symbol($6) # CHECK: lui $1, %hi(symbol) # encoding: [0x3c,0x01,A,A] + # CHECK: # fixup A - offset: 0, value: symbol@ABS_HI, kind: fixup_Mips_HI16 + # CHECK: addiu $1, $1, %lo(symbol) # encoding: [0x24,0x21,A,A] + # CHECK: # fixup A - offset: 0, value: symbol@ABS_LO, kind: fixup_Mips_LO16 + # CHECK: addu $6, $1, $6 # encoding: [0x00,0x26,0x30,0x21] +la $5, 1f # CHECK: lui $5, %hi($tmp0) # encoding: [0x3c,0x05,A,A] + # CHECK: # fixup A - offset: 0, value: ($tmp0)@ABS_HI, kind: fixup_Mips_HI16 + # CHECK: addiu $5, $5, %lo($tmp0) # encoding: [0x24,0xa5,A,A] + # CHECK: # fixup A - offset: 0, value: ($tmp0)@ABS_LO, kind: fixup_Mips_LO16 +1: diff --git a/test/MC/Mips/macro-li-bad.s b/test/MC/Mips/macro-li-bad.s new file mode 100644 index 00000000000..8fe622066e9 --- /dev/null +++ b/test/MC/Mips/macro-li-bad.s @@ -0,0 +1,11 @@ +# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r2 2>%t1 +# RUN: FileCheck %s < %t1 --check-prefix=32-BIT +# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n32 2>&1 | \ +# RUN: FileCheck %s --check-prefix=64-BIT +# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n64 2>&1 | \ +# RUN: FileCheck %s --check-prefix=64-BIT + + .text + li $5, 0x100000000 + # 32-BIT: :[[@LINE-1]]:3: error: instruction requires a 32-bit immediate + # 64-BIT: :[[@LINE-2]]:3: error: instruction requires a 32-bit immediate diff --git a/test/MC/Mips/macro-li.s b/test/MC/Mips/macro-li.s new file mode 100644 index 00000000000..88e013a854e --- /dev/null +++ b/test/MC/Mips/macro-li.s @@ -0,0 +1,67 @@ +# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r2 | \ +# RUN: FileCheck %s +# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 | \ +# RUN: FileCheck %s +# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r2 | \ +# RUN: FileCheck %s +# RUN: llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64r6 | \ +# RUN: FileCheck %s + +li $5, 0x00000001 # CHECK: addiu $5, $zero, 1 # encoding: [0x24,0x05,0x00,0x01] +li $5, 0x00000002 # CHECK: addiu $5, $zero, 2 # encoding: [0x24,0x05,0x00,0x02] +li $5, 0x00004000 # CHECK: addiu $5, $zero, 16384 # encoding: [0x24,0x05,0x40,0x00] +li $5, 0x00008000 # CHECK: ori $5, $zero, 32768 # encoding: [0x34,0x05,0x80,0x00] +li $5, 0xffffffff # CHECK: addiu $5, $zero, -1 # encoding: [0x24,0x05,0xff,0xff] +li $5, 0xfffffffe # CHECK: addiu $5, $zero, -2 # encoding: [0x24,0x05,0xff,0xfe] +li $5, 0xffffc000 # CHECK: addiu $5, $zero, -16384 # encoding: [0x24,0x05,0xc0,0x00] +li $5, 0xffff8000 # CHECK: addiu $5, $zero, -32768 # encoding: [0x24,0x05,0x80,0x00] + +li $5, 0x00010000 # CHECK: lui $5, 1 # encoding: [0x3c,0x05,0x00,0x01] +li $5, 0x00020000 # CHECK: lui $5, 2 # encoding: [0x3c,0x05,0x00,0x02] +li $5, 0x40000000 # CHECK: lui $5, 16384 # encoding: [0x3c,0x05,0x40,0x00] +li $5, 0x80000000 # CHECK: lui $5, 32768 # encoding: [0x3c,0x05,0x80,0x00] +li $5, 0xffff0000 # CHECK: lui $5, 65535 # encoding: [0x3c,0x05,0xff,0xff] +li $5, 0xfffe0000 # CHECK: lui $5, 65534 # encoding: [0x3c,0x05,0xff,0xfe] +li $5, 0xc0000000 # CHECK: lui $5, 49152 # encoding: [0x3c,0x05,0xc0,0x00] +li $5, 0x80000000 # CHECK: lui $5, 32768 # encoding: [0x3c,0x05,0x80,0x00] + +li $5, 0x00010001 # CHECK: lui $5, 1 # encoding: [0x3c,0x05,0x00,0x01] + # CHECK: ori $5, $5, 1 # encoding: [0x34,0xa5,0x00,0x01] +li $5, 0x00020001 # CHECK: lui $5, 2 # encoding: [0x3c,0x05,0x00,0x02] + # CHECK: ori $5, $5, 1 # encoding: [0x34,0xa5,0x00,0x01] +li $5, 0x40000001 # CHECK: lui $5, 16384 # encoding: [0x3c,0x05,0x40,0x00] + # CHECK: ori $5, $5, 1 # encoding: [0x34,0xa5,0x00,0x01] +li $5, 0x80000001 # CHECK: lui $5, 32768 # encoding: [0x3c,0x05,0x80,0x00] + # CHECK: ori $5, $5, 1 # encoding: [0x34,0xa5,0x00,0x01] +li $5, 0x00010002 # CHECK: lui $5, 1 # encoding: [0x3c,0x05,0x00,0x01] + # CHECK: ori $5, $5, 2 # encoding: [0x34,0xa5,0x00,0x02] +li $5, 0x00020002 # CHECK: lui $5, 2 # encoding: [0x3c,0x05,0x00,0x02] + # CHECK: ori $5, $5, 2 # encoding: [0x34,0xa5,0x00,0x02] +li $5, 0x40000002 # CHECK: lui $5, 16384 # encoding: [0x3c,0x05,0x40,0x00] + # CHECK: ori $5, $5, 2 # encoding: [0x34,0xa5,0x00,0x02] +li $5, 0x80000002 # CHECK: lui $5, 32768 # encoding: [0x3c,0x05,0x80,0x00] + # CHECK: ori $5, $5, 2 # encoding: [0x34,0xa5,0x00,0x02] +li $5, 0x00014000 # CHECK: lui $5, 1 # encoding: [0x3c,0x05,0x00,0x01] + # CHECK: ori $5, $5, 16384 # encoding: [0x34,0xa5,0x40,0x00] +li $5, 0x00024000 # CHECK: lui $5, 2 # encoding: [0x3c,0x05,0x00,0x02] + # CHECK: ori $5, $5, 16384 # encoding: [0x34,0xa5,0x40,0x00] +li $5, 0x40004000 # CHECK: lui $5, 16384 # encoding: [0x3c,0x05,0x40,0x00] + # CHECK: ori $5, $5, 16384 # encoding: [0x34,0xa5,0x40,0x00] +li $5, 0x80004000 # CHECK: lui $5, 32768 # encoding: [0x3c,0x05,0x80,0x00] + # CHECK: ori $5, $5, 16384 # encoding: [0x34,0xa5,0x40,0x00] +li $5, 0x00018000 # CHECK: lui $5, 1 # encoding: [0x3c,0x05,0x00,0x01] + # CHECK: ori $5, $5, 32768 # encoding: [0x34,0xa5,0x80,0x00] +li $5, 0x00028000 # CHECK: lui $5, 2 # encoding: [0x3c,0x05,0x00,0x02] + # CHECK: ori $5, $5, 32768 # encoding: [0x34,0xa5,0x80,0x00] +li $5, 0x40008000 # CHECK: lui $5, 16384 # encoding: [0x3c,0x05,0x40,0x00] + # CHECK: ori $5, $5, 32768 # encoding: [0x34,0xa5,0x80,0x00] +li $5, 0x80008000 # CHECK: lui $5, 32768 # encoding: [0x3c,0x05,0x80,0x00] + # CHECK: ori $5, $5, 32768 # encoding: [0x34,0xa5,0x80,0x00] +li $5, 0xffff4000 # CHECK: lui $5, 65535 # encoding: [0x3c,0x05,0xff,0xff] + # CHECK: ori $5, $5, 16384 # encoding: [0x34,0xa5,0x40,0x00] +li $5, 0xfffe8000 # CHECK: lui $5, 65534 # encoding: [0x3c,0x05,0xff,0xfe] + # CHECK: ori $5, $5, 32768 # encoding: [0x34,0xa5,0x80,0x00] +li $5, 0xc0008000 # CHECK: lui $5, 49152 # encoding: [0x3c,0x05,0xc0,0x00] + # CHECK: ori $5, $5, 32768 # encoding: [0x34,0xa5,0x80,0x00] +li $5, 0x80008000 # CHECK: lui $5, 32768 # encoding: [0x3c,0x05,0x80,0x00] + # CHECK: ori $5, $5, 32768 # encoding: [0x34,0xa5,0x80,0x00] diff --git a/test/MC/Mips/micromips-expansions.s b/test/MC/Mips/micromips-expansions.s index 5024850abc4..48c73f34e7e 100644 --- a/test/MC/Mips/micromips-expansions.s +++ b/test/MC/Mips/micromips-expansions.s @@ -5,14 +5,14 @@ #------------------------------------------------------------------------------ # Load immediate instructions #------------------------------------------------------------------------------ -# CHECK: ori $5, $zero, 123 # encoding: [0xa0,0x50,0x7b,0x00] +# CHECK: addiu $5, $zero, 123 # encoding: [0xa0,0x30,0x7b,0x00] # CHECK: addiu $6, $zero, -2345 # encoding: [0xc0,0x30,0xd7,0xf6] # CHECK: lui $7, 1 # encoding: [0xa7,0x41,0x01,0x00] # CHECK: ori $7, $7, 2 # encoding: [0xe7,0x50,0x02,0x00] -# CHECK: ori $4, $zero, 20 # encoding: [0x80,0x50,0x14,0x00] +# CHECK: addiu $4, $zero, 20 # encoding: [0x80,0x30,0x14,0x00] # CHECK: lui $7, 1 # encoding: [0xa7,0x41,0x01,0x00] # CHECK: ori $7, $7, 2 # encoding: [0xe7,0x50,0x02,0x00] -# CHECK: ori $4, $5, 20 # encoding: [0x85,0x50,0x14,0x00] +# CHECK: addiu $4, $5, 20 # encoding: [0x85,0x30,0x14,0x00] # CHECK: lui $7, 1 # encoding: [0xa7,0x41,0x01,0x00] # CHECK: ori $7, $7, 2 # encoding: [0xe7,0x50,0x02,0x00] # CHECK: addu $7, $7, $8 # encoding: [0x07,0x01,0x50,0x39] diff --git a/test/MC/Mips/mips-expansions-bad.s b/test/MC/Mips/mips-expansions-bad.s index 416cb5f3ba6..cd74f7d4aa8 100644 --- a/test/MC/Mips/mips-expansions-bad.s +++ b/test/MC/Mips/mips-expansions-bad.s @@ -6,18 +6,6 @@ # RUN: FileCheck %s --check-prefix=64-BIT --check-prefix=N64-ONLY .text - li $5, 0x100000000 - # 32-BIT: :[[@LINE-1]]:3: error: instruction requires a 32-bit immediate - # 64-BIT: :[[@LINE-2]]:3: error: instruction requires a 32-bit immediate - la $5, 0x100000000 - # 32-BIT: :[[@LINE-1]]:3: error: instruction requires a 32-bit immediate - # 64-BIT: :[[@LINE-2]]:3: error: instruction requires a 32-bit immediate - la $5, 0x100000000($6) - # 32-BIT: :[[@LINE-1]]:3: error: instruction requires a 32-bit immediate - # 64-BIT: :[[@LINE-2]]:3: error: instruction requires a 32-bit immediate - la $5, symbol - # N64-ONLY: :[[@LINE-1]]:3: warning: instruction loads the 32-bit address of a 64-bit symbol - # N32-ONLY-NOT: :[[@LINE-2]]:3: warning: instruction loads the 32-bit address of a 64-bit symbol dli $5, 1 # 32-BIT: :[[@LINE-1]]:3: error: instruction requires a 64-bit architecture bne $2, 0x100010001, 1332 diff --git a/test/MC/Mips/mips-expansions.s b/test/MC/Mips/mips-expansions.s index 55de6d04634..93c6b7cd75a 100644 --- a/test/MC/Mips/mips-expansions.s +++ b/test/MC/Mips/mips-expansions.s @@ -5,64 +5,13 @@ # Check that the IAS expands macro instructions in the same way as GAS. -# Load immediate, done by MipsAsmParser::expandLoadImm(): - li $5, 123 -# CHECK-LE: ori $5, $zero, 123 # encoding: [0x7b,0x00,0x05,0x34] - li $6, -2345 -# CHECK-LE: addiu $6, $zero, -2345 # encoding: [0xd7,0xf6,0x06,0x24] - li $7, 65538 -# CHECK-LE: lui $7, 1 # encoding: [0x01,0x00,0x07,0x3c] -# CHECK-LE: ori $7, $7, 2 # encoding: [0x02,0x00,0xe7,0x34] - li $8, ~7 -# CHECK-LE: addiu $8, $zero, -8 # encoding: [0xf8,0xff,0x08,0x24] - li $9, 0x10000 -# CHECK-LE: lui $9, 1 # encoding: [0x01,0x00,0x09,0x3c] -# CHECK-LE-NOT: ori $9, $9, 0 # encoding: [0x00,0x00,0x29,0x35] - li $10, ~(0x101010) -# CHECK-LE: lui $10, 65519 # encoding: [0xef,0xff,0x0a,0x3c] -# CHECK-LE: ori $10, $10, 61423 # encoding: [0xef,0xef,0x4a,0x35] - # Load address, done by MipsAsmParser::expandLoadAddressReg() # and MipsAsmParser::expandLoadAddressImm(): - la $4, 20 -# CHECK-LE: ori $4, $zero, 20 # encoding: [0x14,0x00,0x04,0x34] - la $7, 65538 -# CHECK-LE: lui $7, 1 # encoding: [0x01,0x00,0x07,0x3c] -# CHECK-LE: ori $7, $7, 2 # encoding: [0x02,0x00,0xe7,0x34] - la $4, 20($5) -# CHECK-LE: ori $4, $5, 20 # encoding: [0x14,0x00,0xa4,0x34] - la $7, 65538($8) -# CHECK-LE: lui $7, 1 # encoding: [0x01,0x00,0x07,0x3c] -# CHECK-LE: ori $7, $7, 2 # encoding: [0x02,0x00,0xe7,0x34] -# CHECK-LE: addu $7, $7, $8 # encoding: [0x21,0x38,0xe8,0x00] la $8, 1f # CHECK-LE: lui $8, %hi($tmp0) # encoding: [A,A,0x08,0x3c] # CHECK-LE: # fixup A - offset: 0, value: ($tmp0)@ABS_HI, kind: fixup_Mips_HI16 -# CHECK-LE: ori $8, $8, %lo($tmp0) # encoding: [A,A,0x08,0x35] +# CHECK-LE: addiu $8, $8, %lo($tmp0) # encoding: [A,A,0x08,0x25] # CHECK-LE: # fixup A - offset: 0, value: ($tmp0)@ABS_LO, kind: fixup_Mips_LO16 - la $8, symbol -# CHECK-LE: lui $8, %hi(symbol) # encoding: [A,A,0x08,0x3c] -# CHECK-LE: # fixup A - offset: 0, value: symbol@ABS_HI, kind: fixup_Mips_HI16 -# CHECK-LE: ori $8, $8, %lo(symbol) # encoding: [A,A,0x08,0x35] -# CHECK-LE: # fixup A - offset: 0, value: symbol@ABS_LO, kind: fixup_Mips_LO16 - la $8, symbol($9) -# CHECK-LE: lui $8, %hi(symbol) # encoding: [A,A,0x08,0x3c] -# CHECK-LE: # fixup A - offset: 0, value: symbol@ABS_HI, kind: fixup_Mips_HI16 -# CHECK-LE: ori $8, $8, %lo(symbol) # encoding: [A,A,0x08,0x35] -# CHECK-LE: # fixup A - offset: 0, value: symbol@ABS_LO, kind: fixup_Mips_LO16 -# CHECK-LE: addu $8, $8, $9 # encoding: [0x21,0x40,0x09,0x01] - la $8, symbol($8) -# CHECK-LE: lui $1, %hi(symbol) # encoding: [A,A,0x01,0x3c] -# CHECK-LE: # fixup A - offset: 0, value: symbol@ABS_HI, kind: fixup_Mips_HI16 -# CHECK-LE: ori $1, $1, %lo(symbol) # encoding: [A,A,0x21,0x34] -# CHECK-LE: # fixup A - offset: 0, value: symbol@ABS_LO, kind: fixup_Mips_LO16 -# CHECK-LE: addu $8, $1, $8 # encoding: [0x21,0x40,0x28,0x00] - la $8, 20($8) -# CHECK-LE: ori $8, $8, 20 # encoding: [0x14,0x00,0x08,0x35] - la $8, 65538($8) -# CHECK-LE: lui $1, 1 # encoding: [0x01,0x00,0x01,0x3c] -# CHECK-LE: ori $1, $1, 2 # encoding: [0x02,0x00,0x21,0x34] -# CHECK-LE: addu $8, $1, $8 # encoding: [0x21,0x40,0x28,0x00] # LW/SW and LDC1/SDC1 of symbol address, done by MipsAsmParser::expandMemInst(): .set noat @@ -126,7 +75,7 @@ # CHECK-LE: nop # encoding: [0x00,0x00,0x00,0x00] bne $2, 123, 1332 -# CHECK-LE: ori $1, $zero, 123 # encoding: [0x7b,0x00,0x01,0x34] +# CHECK-LE: addiu $1, $zero, 123 # encoding: [0x7b,0x00,0x01,0x24] # CHECK-LE: bne $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x14] # CHECK-LE: nop # encoding: [0x00,0x00,0x00,0x00] @@ -157,7 +106,7 @@ # CHECK-LE: nop # encoding: [0x00,0x00,0x00,0x00] beq $2, 123, 1332 -# CHECK-LE: ori $1, $zero, 123 # encoding: [0x7b,0x00,0x01,0x34] +# CHECK-LE: addiu $1, $zero, 123 # encoding: [0x7b,0x00,0x01,0x24] # CHECK-LE: beq $2, $1, 1332 # encoding: [0x4d,0x01,0x41,0x10] # CHECK-LE: nop # encoding: [0x00,0x00,0x00,0x00] @@ -266,16 +215,16 @@ # CHECK-LE: or $8, $8, $1 # encoding: [0x25,0x40,0x01,0x01] ulhu $8, 32767 -# CHECK-BE: ori $1, $zero, 32767 # encoding: [0x34,0x01,0x7f,0xff] -# CHECK-BE: lbu $8, 0($1) # encoding: [0x90,0x28,0x00,0x00] -# CHECK-BE: lbu $1, 1($1) # encoding: [0x90,0x21,0x00,0x01] -# CHECK-BE: sll $8, $8, 8 # encoding: [0x00,0x08,0x42,0x00] -# CHECK-BE: or $8, $8, $1 # encoding: [0x01,0x01,0x40,0x25] -# CHECK-LE: ori $1, $zero, 32767 # encoding: [0xff,0x7f,0x01,0x34] -# CHECK-LE: lbu $8, 1($1) # encoding: [0x01,0x00,0x28,0x90] -# CHECK-LE: lbu $1, 0($1) # encoding: [0x00,0x00,0x21,0x90] -# CHECK-LE: sll $8, $8, 8 # encoding: [0x00,0x42,0x08,0x00] -# CHECK-LE: or $8, $8, $1 # encoding: [0x25,0x40,0x01,0x01] +# CHECK-BE: addiu $1, $zero, 32767 # encoding: [0x24,0x01,0x7f,0xff] +# CHECK-BE: lbu $8, 0($1) # encoding: [0x90,0x28,0x00,0x00] +# CHECK-BE: lbu $1, 1($1) # encoding: [0x90,0x21,0x00,0x01] +# CHECK-BE: sll $8, $8, 8 # encoding: [0x00,0x08,0x42,0x00] +# CHECK-BE: or $8, $8, $1 # encoding: [0x01,0x01,0x40,0x25] +# CHECK-LE: addiu $1, $zero, 32767 # encoding: [0xff,0x7f,0x01,0x24] +# CHECK-LE: lbu $8, 1($1) # encoding: [0x01,0x00,0x28,0x90] +# CHECK-LE: lbu $1, 0($1) # encoding: [0x00,0x00,0x21,0x90] +# CHECK-LE: sll $8, $8, 8 # encoding: [0x00,0x42,0x08,0x00] +# CHECK-LE: or $8, $8, $1 # encoding: [0x25,0x40,0x01,0x01] # Test ULHU with immediate offset and a source register operand. ulhu $8, 0($9) @@ -369,13 +318,13 @@ # CHECK-LE: or $8, $8, $1 # encoding: [0x25,0x40,0x01,0x01] ulhu $8, 32767($9) -# CHECK-BE: ori $1, $zero, 32767 # encoding: [0x34,0x01,0x7f,0xff] +# CHECK-BE: addiu $1, $zero, 32767 # encoding: [0x24,0x01,0x7f,0xff] # CHECK-BE: addu $1, $1, $9 # encoding: [0x00,0x29,0x08,0x21] # CHECK-BE: lbu $8, 0($1) # encoding: [0x90,0x28,0x00,0x00] # CHECK-BE: lbu $1, 1($1) # encoding: [0x90,0x21,0x00,0x01] # CHECK-BE: sll $8, $8, 8 # encoding: [0x00,0x08,0x42,0x00] # CHECK-BE: or $8, $8, $1 # encoding: [0x01,0x01,0x40,0x25] -# CHECK-LE: ori $1, $zero, 32767 # encoding: [0xff,0x7f,0x01,0x34] +# CHECK-LE: addiu $1, $zero, 32767 # encoding: [0xff,0x7f,0x01,0x24] # CHECK-LE: addu $1, $1, $9 # encoding: [0x21,0x08,0x29,0x00] # CHECK-LE: lbu $8, 1($1) # encoding: [0x01,0x00,0x28,0x90] # CHECK-LE: lbu $1, 0($1) # encoding: [0x00,0x00,0x21,0x90] @@ -438,10 +387,10 @@ # CHECK-LE: lwr $8, 0($1) # encoding: [0x00,0x00,0x28,0x98] ulw $8, 32765 -# CHECK-BE: ori $1, $zero, 32765 # encoding: [0x34,0x01,0x7f,0xfd] +# CHECK-BE: addiu $1, $zero, 32765 # encoding: [0x24,0x01,0x7f,0xfd] # CHECK-BE: lwl $8, 0($1) # encoding: [0x88,0x28,0x00,0x00] # CHECK-BE: lwr $8, 3($1) # encoding: [0x98,0x28,0x00,0x03] -# CHECK-LE: ori $1, $zero, 32765 # encoding: [0xfd,0x7f,0x01,0x34] +# CHECK-LE: addiu $1, $zero, 32765 # encoding: [0xfd,0x7f,0x01,0x24] # CHECK-LE: lwl $8, 3($1) # encoding: [0x03,0x00,0x28,0x88] # CHECK-LE: lwr $8, 0($1) # encoding: [0x00,0x00,0x28,0x98] @@ -509,11 +458,11 @@ # CHECK-LE: lwr $8, 0($1) # encoding: [0x00,0x00,0x28,0x98] ulw $8, 32765($9) -# CHECK-BE: ori $1, $zero, 32765 # encoding: [0x34,0x01,0x7f,0xfd] +# CHECK-BE: addiu $1, $zero, 32765 # encoding: [0x24,0x01,0x7f,0xfd] # CHECK-BE: addu $1, $1, $9 # encoding: [0x00,0x29,0x08,0x21] # CHECK-BE: lwl $8, 0($1) # encoding: [0x88,0x28,0x00,0x00] # CHECK-BE: lwr $8, 3($1) # encoding: [0x98,0x28,0x00,0x03] -# CHECK-LE: ori $1, $zero, 32765 # encoding: [0xfd,0x7f,0x01,0x34] +# CHECK-LE: addiu $1, $zero, 32765 # encoding: [0xfd,0x7f,0x01,0x24] # CHECK-LE: addu $1, $1, $9 # encoding: [0x21,0x08,0x29,0x00] # CHECK-LE: lwl $8, 3($1) # encoding: [0x03,0x00,0x28,0x88] # CHECK-LE: lwr $8, 0($1) # encoding: [0x00,0x00,0x28,0x98] diff --git a/test/MC/Mips/mips64-expansions.s b/test/MC/Mips/mips64-expansions.s index a66a520a211..b8f1e7a3e87 100644 --- a/test/MC/Mips/mips64-expansions.s +++ b/test/MC/Mips/mips64-expansions.s @@ -4,7 +4,7 @@ # Immediate is <= 32 bits. dli $5, 123 -# CHECK: ori $5, $zero, 123 # encoding: [0x7b,0x00,0x05,0x34] +# CHECK: addiu $5, $zero, 123 # encoding: [0x7b,0x00,0x05,0x24] dli $6, -2345 # CHECK: addiu $6, $zero, -2345 # encoding: [0xd7,0xf6,0x06,0x24] -- 2.34.1