From 81c7fda6fa0c363458ab8494636afa0fafb7a9bd Mon Sep 17 00:00:00 2001
From: zhaoyifeng <zyf@ubuntu-fs.(none)>
Date: Wed, 16 Mar 2011 14:42:33 +0800
Subject: [PATCH] modify reboot code.

---
 arch/arm/mach-rk29/reset.c |  81 +++++++++++++++++--------
 drivers/dbg/wrapcall.S     | 121 +++++++++++++++++++++++++++++++++++++
 2 files changed, 178 insertions(+), 24 deletions(-)
 mode change 100644 => 100755 arch/arm/mach-rk29/reset.c
 mode change 100644 => 100755 drivers/dbg/wrapcall.S

diff --git a/arch/arm/mach-rk29/reset.c b/arch/arm/mach-rk29/reset.c
old mode 100644
new mode 100755
index 03f4a28cde28..10cca81fe05a
--- a/arch/arm/mach-rk29/reset.c
+++ b/arch/arm/mach-rk29/reset.c
@@ -13,6 +13,13 @@
 
 #include <mach/rk29_iomap.h>
 #include <mach/cru.h>
+#include <mach/memory.h>
+#include <mach/sram.h>
+#include <linux/clk.h>
+
+#include <asm/delay.h>
+#include <asm/tlbflush.h>
+#include <asm/cacheflush.h>
 
 #define cru_readl(offset)	readl(RK29_CRU_BASE + offset)
 #define cru_writel(v, offset)	do { writel(v, RK29_CRU_BASE + offset); readl(RK29_CRU_BASE + offset); } while (0)
@@ -25,7 +32,34 @@ static inline void delay_500ns(void)
 		barrier();
 }
 
-static void pwm2gpiodefault(void)
+
+#if 0
+volatile int testflag;
+static void  __rk29_reset_to_maskrom(void)
+{
+	u32 reg;
+    asm("mrc    p15, 0, %0, c1, c0, 0\n\t"
+        "bic    %0, %0, #(1 << 13)  @set vector to 0x00000000\n\t"
+        "bic    %0, %0, #(1 << 0)   @disable mmu\n\t"
+        "bic    %0, %0, #(1 << 12)  @disable I CACHE\n\t"
+        "bic    %0, %0, #(1 << 2)   @disable D DACHE\n\t"
+        "bic    %0, %0, #(1 << 11)      @disable \n\t"
+        "bic    %0, %0, #(1 << 28)      @disable \n\t"
+        "mcr    p15, 0, %0, c1, c0, 0\n\t"
+    //      "mcr    p15, 0, %0, c8, c7, 0   @ invalidate whole TLB\n\t"
+    //      "mcr    p15, 0, %0, c7, c5, 6   @ invalidate BTC\n\t"
+        : "=r" (reg));
+
+    asm("b 1f\n\t"
+        ".align 5\n\t"
+        "1:\n\t"
+        "mcr    p15, 0, %0, c7, c10, 5\n\t"
+        "mcr    p15, 0, %0, c7, c10, 4\n\t"
+        "mov    pc, #0" : : "r" (reg));
+} 
+#endif
+
+static void  pwm2gpiodefault(void)
 {
 	#define     REG_FILE_BASE_ADDR         RK29_GRF_BASE
 	volatile unsigned int * pGRF_GPIO2L_IOMUX =  (volatile unsigned int *)(REG_FILE_BASE_ADDR + 0x58);
@@ -36,10 +70,26 @@ static void pwm2gpiodefault(void)
 	*pGRF_GPIO2L_IOMUX &= ~(0x3<<6);
 	// set gpio to input
 	*pGPIO2_DIR &= ~(0x1<<3);
+//	testflag =1;
 } 
 
 
-void rk29_arch_reset(int mode, const char *cmd)
+extern void __rb( void*  );
+void rb( void )
+{
+    void(*cb)(void* ) ;
+    
+    void * uart_base = (unsigned int *)ioremap( RK29_UART1_PHYS , RK29_UART1_SIZE );
+    local_irq_disable();
+    cb =  (void(*)(void* ))__pa(__rb);
+    __cpuc_flush_kern_all();
+    __cpuc_flush_user_all();
+    //printk("begin to jump to reboot,uart1 va=0x%p\n" , uart_base);
+    //while(testflag);    
+    cb( uart_base );
+}
+
+void  rk29_arch_reset(int mode, const char *cmd)
 {
 	u32 reg;
 
@@ -49,7 +99,6 @@ void rk29_arch_reset(int mode, const char *cmd)
 
 	local_irq_disable();
 	local_fiq_disable();
-	
 	pwm2gpiodefault();
 
 	cru_writel((cru_readl(CRU_MODE_CON) & ~CRU_CPU_MODE_MASK) | CRU_CPU_MODE_SLOW, CRU_MODE_CON);
@@ -90,27 +139,11 @@ void rk29_arch_reset(int mode, const char *cmd)
 	writel(0, RK29_CPU_AXI_BUS0_PHYS);
 	writel(0, RK29_AXI1_PHYS);
 
-	__cpuc_flush_kern_all();
-	__cpuc_flush_user_all();
-
-	asm("mrc	p15, 0, %0, c1, c0, 0\n\t"
-	    "bic	r0, %0, #(1 << 13)	@set vector to 0x00000000\n\t"
-	    "bic	r0, %0, #(1 << 0)	@disable mmu\n\t"
-	    "bic	r0, %0, #(1 << 12)	@disable I CACHE\n\t"
-	    "bic	r0, %0, #(1 << 2)	@disable D DACHE\n\t"
-	    "bic        r0, %0, #(1 << 11)      @disable \n\t"
-            "bic        r0, %0, #(1 << 28)      @disable \n\t"
-	    "mcr	p15, 0, %0, c1, c0, 0\n\t"
-//	    "mcr	p15, 0, %0, c8, c7, 0	@ invalidate whole TLB\n\t"
-//	    "mcr	p15, 0, %0, c7, c5, 6	@ invalidate BTC\n\t"
-	    : "=r" (reg));
-
-	asm("b 1f\n\t"
-	    ".align 5\n\t"
-	    "1:\n\t"
-	    "mcr	p15, 0, %0, c7, c10, 5\n\t"
-	    "mcr	p15, 0, %0, c7, c10, 4\n\t"
-	    "mov	pc, #0" : : "r" (reg));
+	//__cpuc_flush_kern_all();
+	//__cpuc_flush_user_all();
+	
+    rb();
+
 }
 
 
diff --git a/drivers/dbg/wrapcall.S b/drivers/dbg/wrapcall.S
old mode 100644
new mode 100755
index 01805046cc98..facf323be8bf
--- a/drivers/dbg/wrapcall.S
+++ b/drivers/dbg/wrapcall.S
@@ -6,6 +6,7 @@
 #include <asm/ptrace.h>
 #include <asm/assembler.h>
 #include <asm/asm-offsets.h>
+#include <mach/rk29_iomap.h>
 
 #__scu_call_wrap:
 #
@@ -55,6 +56,126 @@ ENTRY(__scu_bk_continue)
     	ldr	r0, [r12, #S_PSR]		
 	msr	spsr_cxsf, r0
 	ldmia	r12, {r0 - pc}^			@ load r0 - pc, cpsr
+
+ENTRY(__run)
+    		mov r0, r0
+		mov	pc, lr
+
+
+/* 20110212,HSL@RK, USE parm0 for debug.
+  *
+  */
+ENTRY(__rb)
+		mov	r7,r0
+/*		adr   r0 , __rb_info
+		adr	r8, __prk
+		ldr	r8,[r8,#0]
+		adr	r1 , __rb
+		mov	lr , pc
+		bx	r8
+		mov	r0,#0x10000
+		bl __rb_delay
+*/		
+		mov	r8,r7
+/*		adr   r0 , __prk_info
+1:		
+		ldrb	r1,[r0],#1
+		cmp r1,#0
+		strne r1,[r8,#0]
+		bne	1b
+		mov	r0,#0x20000
+		bl __rb_delay*/
+		
+		MRC p15,0,r0,c1,c0,0
+		BIC r0,r0,#(1<<0)	   @disable mmu
+		BIC r0,r0,#(1<<13)    @set vector to 0x00000000
+		BIC r0,r0,#(1<<12)	   @disable I CACHE
+		BIC r0,r0,#(1<<2)	   @disable D DACHE
+        BIC r0,r0,#(1<<11)	   @disable Z
+        BIC r0,r0,#(1<<28)	   @disable TRE
+		MCR p15,0,r0,c1,c0,0
+		isb
+		dsb
+		nop	
+		nop
+		nop
+		
+		adr	r7,__regs
+
+		ldr	r8,[r7,#0x10]
+/*		adr   r3 , __dbg_info
+2:		
+		ldrb	r1,[r3],#1
+		cmp r1,#0
+		strne r1,[r8,#0]
+		bne	2b
+
+		mov	r0,#0x20000
+		bl __rb_delay*/
+
+wait:	
+		@b wait
+		@arm slow mod.
+		ldr	r8,[r7,#0xc]
+		ldr	r9,[r8,#0]
+		bic	r9,r9,#3
+		str	r9,[r8,#0]
+		dsb
+		mov	r0,#0x10000
+		bl __rb_delay
+		
+		@ unremap, and axi.
+		ldr	r8,[r7,#0]
+		ldr	r9,[r8,#0]
+		bic	r9,r9,#(1<<21)
+		str	r9,[r8,#0]
+
+		mov	r9,#0
+		ldr	r8,[r7,#4]
+		str	r9,[r8,#0]
+		
+		ldr	r8,[r7,#8]
+		str	r9,[r8,#0]
+		dsb
+		
+
+		ldr	r8,[r7,#0x10]
+/*		adr   r0 , __dbg_info1
+3:		
+		ldrb	r1,[r0],#1
+		cmp r1,#0
+		strne r1,[r8,#0]
+		bne	3b
+
+		mov	r0,#0x10000
+		bl __rb_delay
+*/
+        mov r4, #0
+		mov	pc, r4
+		
+__prk:
+	.long		printk
+__rb_info:
+	.asciz	 "at reboot function,pc=0x%x\n"
+__prk_info:	
+	.asciz	"after printk!\n\r"	
+__dbg_info:	
+	.asciz	"AFTER DIS MMU\n\r"
+__dbg_info1:	
+	.asciz	"LAST JUMP TO 0\n\r"	
+	.align
+__regs:
+	.long		RK29_GRF_PHYS+0xc0	@ 0x20008000 , unremap 
+	.long		RK29_CPU_AXI_BUS0_PHYS 	@ 0x15000000
+	.long		RK29_AXI1_PHYS		@ 0x10000000
+	.long		RK29_CRU_PHYS		@ 0x20000000
+	.long		RK29_UART1_PHYS		@ 0x20060000 , printk for debug.
+	.align
+
+__rb_delay:
+	subs	r0, r0, #1
+	bhi	__rb_delay
+	mov	pc, lr
 	
 #if FIQ_ENABLE
         .align
-- 
2.34.1