From 81feaac451460af7d03d5a67e9d86d03c2608514 Mon Sep 17 00:00:00 2001 From: xxh Date: Fri, 9 Jan 2015 16:47:40 +0800 Subject: [PATCH] UPDATE 8723BU WIFI driver --- .../wireless/rockchip_wlan/rtl8723bu/Kconfig | 7 +- .../wireless/rockchip_wlan/rtl8723bu/Makefile | 125 +- .../rtl8723bu/core/efuse/rtw_efuse.c | 0 .../rockchip_wlan/rtl8723bu/core/rtw_ap.c | 54 +- .../rtl8723bu/core/rtw_beamforming.c | 0 .../rockchip_wlan/rtl8723bu/core/rtw_br_ext.c | 0 .../rockchip_wlan/rtl8723bu/core/rtw_bt_mp.c | 0 .../rockchip_wlan/rtl8723bu/core/rtw_btcoex.c | 58 +- .../rockchip_wlan/rtl8723bu/core/rtw_cmd.c | 198 +- .../rockchip_wlan/rtl8723bu/core/rtw_debug.c | 395 +- .../rockchip_wlan/rtl8723bu/core/rtw_eeprom.c | 0 .../rtl8723bu/core/rtw_ieee80211.c | 86 +- .../rockchip_wlan/rtl8723bu/core/rtw_io.c | 0 .../rtl8723bu/core/rtw_ioctl_query.c | 0 .../rtl8723bu/core/rtw_ioctl_rtl.c | 0 .../rtl8723bu/core/rtw_ioctl_set.c | 4 +- .../rockchip_wlan/rtl8723bu/core/rtw_iol.c | 0 .../rockchip_wlan/rtl8723bu/core/rtw_mem.c | 103 + .../rockchip_wlan/rtl8723bu/core/rtw_mlme.c | 116 +- .../rtl8723bu/core/rtw_mlme_ext.c | 437 +- .../rockchip_wlan/rtl8723bu/core/rtw_mp.c | 148 +- .../rtl8723bu/core/rtw_mp_ioctl.c | 0 .../rockchip_wlan/rtl8723bu/core/rtw_odm.c | 65 +- .../rockchip_wlan/rtl8723bu/core/rtw_p2p.c | 13 +- .../rtl8723bu/core/rtw_pwrctrl.c | 19 +- .../rockchip_wlan/rtl8723bu/core/rtw_recv.c | 147 +- .../rockchip_wlan/rtl8723bu/core/rtw_rf.c | 0 .../rtl8723bu/core/rtw_security.c | 85 +- .../rockchip_wlan/rtl8723bu/core/rtw_sreset.c | 8 +- .../rtl8723bu/core/rtw_sta_mgt.c | 0 .../rockchip_wlan/rtl8723bu/core/rtw_tdls.c | 6 +- .../rockchip_wlan/rtl8723bu/core/rtw_vht.c | 5 +- .../rockchip_wlan/rtl8723bu/core/rtw_wapi.c | 0 .../rtl8723bu/core/rtw_wapi_sms4.c | 0 .../rtl8723bu/core/rtw_wlan_util.c | 584 +- .../rockchip_wlan/rtl8723bu/core/rtw_xmit.c | 321 +- .../rtl8723bu/hal/HalPwrSeqCmd.c | 0 .../hal/OUTSRC-BTCoexist/HalBtc8188c2Ant.c | 14 +- .../hal/OUTSRC-BTCoexist/HalBtc8188c2Ant.h | 4 + .../hal/OUTSRC-BTCoexist/HalBtc8192d2Ant.c | 14 +- .../hal/OUTSRC-BTCoexist/HalBtc8192d2Ant.h | 4 + .../hal/OUTSRC-BTCoexist/HalBtc8192e1Ant.c | 14 +- .../hal/OUTSRC-BTCoexist/HalBtc8192e1Ant.h | 4 + .../hal/OUTSRC-BTCoexist/HalBtc8192e2Ant.c | 14 +- .../hal/OUTSRC-BTCoexist/HalBtc8192e2Ant.h | 4 + .../hal/OUTSRC-BTCoexist/HalBtc8723a1Ant.c | 7 - .../hal/OUTSRC-BTCoexist/HalBtc8723a1Ant.h | 0 .../hal/OUTSRC-BTCoexist/HalBtc8723a2Ant.c | 14 +- .../hal/OUTSRC-BTCoexist/HalBtc8723a2Ant.h | 4 + .../hal/OUTSRC-BTCoexist/HalBtc8723b1Ant.c | 1031 +- .../hal/OUTSRC-BTCoexist/HalBtc8723b1Ant.h | 33 +- .../hal/OUTSRC-BTCoexist/HalBtc8723b2Ant.c | 96 +- .../hal/OUTSRC-BTCoexist/HalBtc8723b2Ant.h | 4 + .../hal/OUTSRC-BTCoexist/HalBtc8812a1Ant.c | 14 +- .../hal/OUTSRC-BTCoexist/HalBtc8812a1Ant.h | 4 + .../hal/OUTSRC-BTCoexist/HalBtc8812a2Ant.c | 14 +- .../hal/OUTSRC-BTCoexist/HalBtc8812a2Ant.h | 4 + .../hal/OUTSRC-BTCoexist/HalBtc8821a1Ant.c | 606 +- .../hal/OUTSRC-BTCoexist/HalBtc8821a1Ant.h | 18 +- .../hal/OUTSRC-BTCoexist/HalBtc8821a2Ant.c | 14 +- .../hal/OUTSRC-BTCoexist/HalBtc8821a2Ant.h | 4 + .../hal/OUTSRC-BTCoexist/HalBtc8821aCsr2Ant.c | 4433 +++++ .../hal/OUTSRC-BTCoexist/HalBtc8821aCsr2Ant.h | 207 + .../hal/OUTSRC-BTCoexist/HalBtcOutSrc.h | 44 +- .../hal/OUTSRC-BTCoexist/Mp_Precomp.h | 1 + .../rtl8723bu/hal/OUTSRC/HalPhyRf.c | 0 .../rtl8723bu/hal/OUTSRC/HalPhyRf.h | 0 .../rockchip_wlan/rtl8723bu/hal/OUTSRC/odm.c | 14330 ++++------------ .../rockchip_wlan/rtl8723bu/hal/OUTSRC/odm.h | 481 +- .../rtl8723bu/hal/OUTSRC/odm_AntDiv.c | 16 +- .../rtl8723bu/hal/OUTSRC/odm_AntDiv.h | 0 .../rtl8723bu/hal/OUTSRC/odm_CfoTracking.c | 363 + .../rtl8723bu/hal/OUTSRC/odm_CfoTracking.h | 66 + .../rtl8723bu/hal/OUTSRC/odm_DIG.c | 2647 +++ .../rtl8723bu/hal/OUTSRC/odm_DIG.h | 406 + .../hal/OUTSRC/odm_DynamicBBPowerSaving.c | 218 + .../hal/OUTSRC/odm_DynamicBBPowerSaving.h | 61 + .../rtl8723bu/hal/OUTSRC/odm_DynamicTxPower.c | 884 + .../rtl8723bu/hal/OUTSRC/odm_DynamicTxPower.h | 87 + .../rtl8723bu/hal/OUTSRC/odm_EdcaTurboCheck.c | 1915 +++ .../rtl8723bu/hal/OUTSRC/odm_EdcaTurboCheck.h | 150 + .../rtl8723bu/hal/OUTSRC/odm_HWConfig.c | 191 +- .../rtl8723bu/hal/OUTSRC/odm_HWConfig.h | 8 +- .../rtl8723bu/hal/OUTSRC/odm_NoiseMonitor.c | 197 + .../rtl8723bu/hal/OUTSRC/odm_NoiseMonitor.h | 49 + .../rtl8723bu/hal/OUTSRC/odm_PathDiv.c | 1580 ++ .../rtl8723bu/hal/OUTSRC/odm_PathDiv.h | 196 + .../rtl8723bu/hal/OUTSRC/odm_RaInfo.c | 1583 ++ .../rtl8723bu/hal/OUTSRC/odm_RaInfo.h | 169 + .../rtl8723bu/hal/OUTSRC/odm_RegDefine11AC.h | 20 +- .../rtl8723bu/hal/OUTSRC/odm_RegDefine11N.h | 36 +- .../rtl8723bu/hal/OUTSRC/odm_debug.c | 2 +- .../rtl8723bu/hal/OUTSRC/odm_debug.h | 18 +- .../rtl8723bu/hal/OUTSRC/odm_interface.c | 14 + .../rtl8723bu/hal/OUTSRC/odm_interface.h | 6 + .../rtl8723bu/hal/OUTSRC/odm_precomp.h | 8 + .../rtl8723bu/hal/OUTSRC/odm_reg.h | 0 .../rtl8723bu/hal/OUTSRC/odm_types.h | 9 + .../hal/OUTSRC/rtl8723b/Hal8723BReg.h | 0 .../hal/OUTSRC/rtl8723b/HalHWImg8723B_BB.c | 401 +- .../hal/OUTSRC/rtl8723b/HalHWImg8723B_BB.h | 4 +- .../hal/OUTSRC/rtl8723b/HalHWImg8723B_FW.c | 9732 +++++------ .../hal/OUTSRC/rtl8723b/HalHWImg8723B_FW.h | 0 .../hal/OUTSRC/rtl8723b/HalHWImg8723B_MAC.c | 222 +- .../hal/OUTSRC/rtl8723b/HalHWImg8723B_MAC.h | 2 +- .../hal/OUTSRC/rtl8723b/HalHWImg8723B_MP.c | 741 +- .../hal/OUTSRC/rtl8723b/HalHWImg8723B_MP.h | 38 +- .../hal/OUTSRC/rtl8723b/HalHWImg8723B_RF.c | 273 +- .../hal/OUTSRC/rtl8723b/HalHWImg8723B_RF.h | 7 +- .../hal/OUTSRC/rtl8723b/HalPhyRf_8723B.c | 275 +- .../hal/OUTSRC/rtl8723b/HalPhyRf_8723B.h | 0 .../hal/OUTSRC/rtl8723b/odm_RTL8723B.c | 24 - .../hal/OUTSRC/rtl8723b/odm_RTL8723B.h | 5 - .../hal/OUTSRC/rtl8723b/odm_RegConfig8723B.c | 0 .../hal/OUTSRC/rtl8723b/odm_RegConfig8723B.h | 0 .../rockchip_wlan/rtl8723bu/hal/hal_btcoex.c | 246 +- .../rockchip_wlan/rtl8723bu/hal/hal_com.c | 592 +- .../rtl8723bu/hal/hal_com_phycfg.c | 53 +- .../rtl8723bu/hal/hal_hci/hal_usb.c | 0 .../rockchip_wlan/rtl8723bu/hal/hal_intf.c | 28 +- .../rockchip_wlan/rtl8723bu/hal/hal_phy.c | 0 .../rtl8723bu/hal/led/hal_usb_led.c | 0 .../rtl8723bu/hal/rtl8723b/Hal8723BPwrSeq.c | 0 .../rtl8723bu/hal/rtl8723b/rtl8723b_cmd.c | 3 +- .../rtl8723bu/hal/rtl8723b/rtl8723b_dm.c | 17 +- .../hal/rtl8723b/rtl8723b_hal_init.c | 607 +- .../rtl8723bu/hal/rtl8723b/rtl8723b_mp.c | 21 +- .../rtl8723bu/hal/rtl8723b/rtl8723b_phycfg.c | 9 +- .../rtl8723bu/hal/rtl8723b/rtl8723b_rf6052.c | 0 .../rtl8723bu/hal/rtl8723b/rtl8723b_rxdesc.c | 16 +- .../rtl8723bu/hal/rtl8723b/rtl8723b_sreset.c | 0 .../hal/rtl8723b/usb/rtl8723bu_led.c | 0 .../hal/rtl8723b/usb/rtl8723bu_recv.c | 79 +- .../hal/rtl8723b/usb/rtl8723bu_xmit.c | 62 +- .../rtl8723bu/hal/rtl8723b/usb/usb_halinit.c | 252 +- .../rtl8723bu/hal/rtl8723b/usb/usb_ops.c | 55 +- .../rtl8723bu/include/Hal8192CPhyReg.h | 1 + .../rtl8723bu/include/Hal8723BPhyCfg.h | 0 .../rtl8723bu/include/Hal8723BPhyReg.h | 0 .../rtl8723bu/include/Hal8723BPwrSeq.h | 0 .../rtl8723bu/include/HalPwrSeqCmd.h | 0 .../rtl8723bu/include/HalVerDef.h | 0 .../rtl8723bu/include/autoconf.h | 40 +- .../rtl8723bu/include/basic_types.h | 0 .../rtl8723bu/include/byteorder/big_endian.h | 0 .../rtl8723bu/include/byteorder/generic.h | 0 .../include/byteorder/little_endian.h | 0 .../rtl8723bu/include/byteorder/swab.h | 0 .../rtl8723bu/include/byteorder/swabb.h | 0 .../rtl8723bu/include/circ_buf.h | 0 .../rtl8723bu/include/cmd_osdep.h | 0 .../rtl8723bu/include/custom_gpio.h | 0 .../rtl8723bu/include/drv_conf.h | 15 + .../rtl8723bu/include/drv_types.h | 173 +- .../rtl8723bu/include/drv_types_linux.h | 0 .../rtl8723bu/include/ethernet.h | 0 .../rockchip_wlan/rtl8723bu/include/h2clbk.h | 0 .../rtl8723bu/include/hal_btcoex.h | 4 +- .../rockchip_wlan/rtl8723bu/include/hal_com.h | 41 + .../rtl8723bu/include/hal_com_h2c.h | 1 + .../rtl8723bu/include/hal_com_led.h | 0 .../rtl8723bu/include/hal_com_phycfg.h | 4 +- .../rtl8723bu/include/hal_com_reg.h | 11 +- .../rtl8723bu/include/hal_data.h | 22 +- .../rtl8723bu/include/hal_gspi.h | 32 + .../rtl8723bu/include/hal_intf.h | 11 +- .../rockchip_wlan/rtl8723bu/include/hal_pg.h | 0 .../rockchip_wlan/rtl8723bu/include/hal_phy.h | 0 .../rtl8723bu/include/hal_phy_reg.h | 0 .../rtl8723bu/include/hal_sdio.h | 0 .../rtl8723bu/include/ieee80211.h | 0 .../rtl8723bu/include/ieee80211_ext.h | 0 .../rtl8723bu/include/if_ether.h | 0 .../rtl8723bu/include/ioctl_cfg80211.h | 7 +- .../rockchip_wlan/rtl8723bu/include/ip.h | 0 .../rtl8723bu/include/linux/wireless.h | 0 .../rtl8723bu/include/mlme_osdep.h | 0 .../rtl8723bu/include/mp_custom_oid.h | 0 .../rtl8723bu/include/nic_spec.h | 0 .../rtl8723bu/include/osdep_intf.h | 12 +- .../rtl8723bu/include/osdep_service.h | 0 .../rtl8723bu/include/osdep_service_bsd.h | 0 .../rtl8723bu/include/osdep_service_ce.h | 0 .../rtl8723bu/include/osdep_service_linux.h | 0 .../rtl8723bu/include/osdep_service_xp.h | 0 .../rtl8723bu/include/recv_osdep.h | 0 .../rtl8723bu/include/rtl8192c_recv.h | 4 +- .../rtl8723bu/include/rtl8192c_rf.h | 0 .../rtl8723bu/include/rtl8723b_cmd.h | 0 .../rtl8723bu/include/rtl8723b_dm.h | 0 .../rtl8723bu/include/rtl8723b_hal.h | 19 +- .../rtl8723bu/include/rtl8723b_led.h | 0 .../rtl8723bu/include/rtl8723b_recv.h | 121 +- .../rtl8723bu/include/rtl8723b_rf.h | 0 .../rtl8723bu/include/rtl8723b_spec.h | 0 .../rtl8723bu/include/rtl8723b_sreset.h | 0 .../rtl8723bu/include/rtl8723b_xmit.h | 157 +- .../rtl8723bu/include/rtw_android.h | 5 +- .../rockchip_wlan/rtl8723bu/include/rtw_ap.h | 0 .../rtl8723bu/include/rtw_beamforming.h | 0 .../rtl8723bu/include/rtw_br_ext.h | 0 .../rtl8723bu/include/rtw_bt_mp.h | 2 +- .../rtl8723bu/include/rtw_btcoex.h | 4 +- .../rtl8723bu/include/rtw_byteorder.h | 0 .../rockchip_wlan/rtl8723bu/include/rtw_cmd.h | 17 +- .../rtl8723bu/include/rtw_debug.h | 17 + .../rtl8723bu/include/rtw_eeprom.h | 4 +- .../rtl8723bu/include/rtw_efuse.h | 0 .../rtl8723bu/include/rtw_event.h | 0 .../rockchip_wlan/rtl8723bu/include/rtw_ht.h | 2 + .../rockchip_wlan/rtl8723bu/include/rtw_io.h | 5 + .../rtl8723bu/include/rtw_ioctl.h | 0 .../rtl8723bu/include/rtw_ioctl_query.h | 0 .../rtl8723bu/include/rtw_ioctl_rtl.h | 0 .../rtl8723bu/include/rtw_ioctl_set.h | 0 .../rockchip_wlan/rtl8723bu/include/rtw_iol.h | 0 .../rockchip_wlan/rtl8723bu/include/rtw_mem.h | 38 + .../rtl8723bu/include/rtw_mlme.h | 2 + .../rtl8723bu/include/rtw_mlme_ext.h | 21 +- .../rockchip_wlan/rtl8723bu/include/rtw_mp.h | 18 +- .../rtl8723bu/include/rtw_mp_ioctl.h | 0 .../rtl8723bu/include/rtw_mp_phy_regdef.h | 9 +- .../rockchip_wlan/rtl8723bu/include/rtw_odm.h | 1 + .../rockchip_wlan/rtl8723bu/include/rtw_p2p.h | 0 .../rtl8723bu/include/rtw_pwrctrl.h | 7 +- .../rockchip_wlan/rtl8723bu/include/rtw_qos.h | 0 .../rtl8723bu/include/rtw_recv.h | 29 +- .../rockchip_wlan/rtl8723bu/include/rtw_rf.h | 0 .../rtl8723bu/include/rtw_security.h | 24 + .../rtl8723bu/include/rtw_sreset.h | 0 .../rtl8723bu/include/rtw_tdls.h | 0 .../rtl8723bu/include/rtw_version.h | 4 +- .../rockchip_wlan/rtl8723bu/include/rtw_vht.h | 0 .../rtl8723bu/include/rtw_wapi.h | 0 .../rtl8723bu/include/rtw_wifi_regd.h | 0 .../rtl8723bu/include/rtw_xmit.h | 79 +- .../rtl8723bu/include/sta_info.h | 0 .../rockchip_wlan/rtl8723bu/include/usb_hal.h | 0 .../rockchip_wlan/rtl8723bu/include/usb_ops.h | 0 .../rtl8723bu/include/usb_ops_linux.h | 0 .../rtl8723bu/include/usb_osintf.h | 0 .../rtl8723bu/include/usb_vendor_req.h | 0 .../rockchip_wlan/rtl8723bu/include/wifi.h | 1 + .../rtl8723bu/include/wlan_bssdef.h | 0 .../rtl8723bu/include/xmit_osdep.h | 0 .../os_dep/linux/custom_gpio_linux.c | 37 +- .../rtl8723bu/os_dep/linux/ioctl_cfg80211.c | 186 +- .../rtl8723bu/os_dep/linux/ioctl_linux.c | 517 +- .../rtl8723bu/os_dep/linux/mlme_linux.c | 32 +- .../rtl8723bu/os_dep/linux/os_intfs.c | 669 +- .../rtl8723bu/os_dep/linux/recv_linux.c | 20 +- .../rtl8723bu/os_dep/linux/rtw_android.c | 110 +- .../rtl8723bu/os_dep/linux/rtw_proc.c | 63 +- .../rtl8723bu/os_dep/linux/rtw_proc.h | 0 .../rtl8723bu/os_dep/linux/usb_intf.c | 359 +- .../rtl8723bu/os_dep/linux/usb_ops_linux.c | 11 +- .../rtl8723bu/os_dep/linux/wifi_regd.c | 13 +- .../rtl8723bu/os_dep/linux/wifi_version.h | 10 +- .../rtl8723bu/os_dep/linux/xmit_linux.c | 36 +- .../rtl8723bu/os_dep/osdep_service.c | 4 + .../platform/platform_ARM_SUNnI_sdio.c | 17 +- .../platform/platform_ARM_SUNxI_sdio.c | 0 .../platform/platform_ARM_SUNxI_usb.c | 0 .../platform/platform_ARM_WMT_sdio.c | 51 + .../rtl8723bu/platform/platform_RTK_DMP_usb.c | 0 .../rtl8723bu/platform/platform_ops.c | 0 .../rtl8723bu/platform/platform_ops.h | 0 .../rtl8723bu/platform/platform_sprd_sdio.c | 0 268 files changed, 31889 insertions(+), 20292 deletions(-) mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/Kconfig mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/Makefile mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/efuse/rtw_efuse.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_ap.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_beamforming.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_br_ext.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_bt_mp.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_btcoex.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_cmd.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_debug.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_eeprom.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_ieee80211.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_io.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_ioctl_query.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_ioctl_rtl.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_ioctl_set.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_iol.c create mode 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_mem.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_mlme.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_mlme_ext.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_mp.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_mp_ioctl.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_odm.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_p2p.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_pwrctrl.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_recv.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_rf.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_security.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_sreset.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_sta_mgt.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_tdls.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_vht.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_wapi.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_wapi_sms4.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_wlan_util.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_xmit.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/HalPwrSeqCmd.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8188c2Ant.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8188c2Ant.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192d2Ant.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192d2Ant.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192e1Ant.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192e1Ant.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192e2Ant.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192e2Ant.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723a1Ant.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723a1Ant.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723a2Ant.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723a2Ant.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723b1Ant.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723b1Ant.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723b2Ant.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723b2Ant.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8812a1Ant.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8812a1Ant.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8812a2Ant.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8812a2Ant.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8821a1Ant.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8821a1Ant.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8821a2Ant.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8821a2Ant.h create mode 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8821aCsr2Ant.c create mode 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8821aCsr2Ant.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtcOutSrc.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/Mp_Precomp.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/HalPhyRf.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/HalPhyRf.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_AntDiv.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_AntDiv.h create mode 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_CfoTracking.c create mode 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_CfoTracking.h create mode 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_DIG.c create mode 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_DIG.h create mode 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_DynamicBBPowerSaving.c create mode 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_DynamicBBPowerSaving.h create mode 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_DynamicTxPower.c create mode 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_DynamicTxPower.h create mode 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_EdcaTurboCheck.c create mode 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_EdcaTurboCheck.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_HWConfig.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_HWConfig.h create mode 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_NoiseMonitor.c create mode 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_NoiseMonitor.h create mode 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_PathDiv.c create mode 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_PathDiv.h create mode 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_RaInfo.c create mode 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_RaInfo.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_RegDefine11AC.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_RegDefine11N.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_debug.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_debug.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_interface.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_interface.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_precomp.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_reg.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_types.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/Hal8723BReg.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_BB.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_BB.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_FW.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_FW.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_MAC.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_MAC.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_MP.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_MP.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_RF.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_RF.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalPhyRf_8723B.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalPhyRf_8723B.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/odm_RTL8723B.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/odm_RTL8723B.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/odm_RegConfig8723B.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/odm_RegConfig8723B.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/hal_btcoex.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/hal_com.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/hal_com_phycfg.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/hal_hci/hal_usb.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/hal_intf.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/hal_phy.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/led/hal_usb_led.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/Hal8723BPwrSeq.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_cmd.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_dm.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_hal_init.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_mp.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_phycfg.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_rf6052.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_rxdesc.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_sreset.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/usb/rtl8723bu_led.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/usb/rtl8723bu_recv.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/usb/rtl8723bu_xmit.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/usb/usb_halinit.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/usb/usb_ops.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/Hal8192CPhyReg.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/Hal8723BPhyCfg.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/Hal8723BPhyReg.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/Hal8723BPwrSeq.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/HalPwrSeqCmd.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/HalVerDef.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/autoconf.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/basic_types.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/byteorder/big_endian.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/byteorder/generic.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/byteorder/little_endian.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/byteorder/swab.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/byteorder/swabb.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/circ_buf.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/cmd_osdep.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/custom_gpio.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/drv_conf.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/drv_types.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/drv_types_linux.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/ethernet.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/h2clbk.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_btcoex.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_com.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_com_h2c.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_com_led.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_com_phycfg.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_com_reg.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_data.h create mode 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_gspi.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_intf.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_pg.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_phy.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_phy_reg.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_sdio.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/ieee80211.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/ieee80211_ext.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/if_ether.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/ioctl_cfg80211.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/ip.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/linux/wireless.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/mlme_osdep.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/mp_custom_oid.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/nic_spec.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/osdep_intf.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/osdep_service.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/osdep_service_bsd.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/osdep_service_ce.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/osdep_service_linux.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/osdep_service_xp.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/recv_osdep.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8192c_recv.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8192c_rf.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_cmd.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_dm.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_hal.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_led.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_recv.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_rf.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_spec.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_sreset.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_xmit.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_android.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_ap.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_beamforming.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_br_ext.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_bt_mp.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_btcoex.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_byteorder.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_cmd.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_debug.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_eeprom.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_efuse.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_event.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_ht.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_io.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_ioctl.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_ioctl_query.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_ioctl_rtl.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_ioctl_set.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_iol.h create mode 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_mem.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_mlme.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_mlme_ext.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_mp.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_mp_ioctl.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_mp_phy_regdef.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_odm.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_p2p.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_pwrctrl.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_qos.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_recv.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_rf.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_security.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_sreset.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_tdls.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_version.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_vht.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_wapi.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_wifi_regd.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_xmit.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/sta_info.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/usb_hal.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/usb_ops.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/usb_ops_linux.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/usb_osintf.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/usb_vendor_req.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/wifi.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/wlan_bssdef.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/include/xmit_osdep.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/custom_gpio_linux.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/ioctl_cfg80211.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/ioctl_linux.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/mlme_linux.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/os_intfs.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/recv_linux.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/rtw_android.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/rtw_proc.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/rtw_proc.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/usb_intf.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/usb_ops_linux.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/wifi_regd.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/wifi_version.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/xmit_linux.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/osdep_service.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/platform/platform_ARM_SUNnI_sdio.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/platform/platform_ARM_SUNxI_sdio.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/platform/platform_ARM_SUNxI_usb.c create mode 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/platform/platform_ARM_WMT_sdio.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/platform/platform_RTK_DMP_usb.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/platform/platform_ops.c mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/platform/platform_ops.h mode change 100644 => 100755 drivers/net/wireless/rockchip_wlan/rtl8723bu/platform/platform_sprd_sdio.c diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/Kconfig b/drivers/net/wireless/rockchip_wlan/rtl8723bu/Kconfig old mode 100644 new mode 100755 index 9824ce87ecd8..a84ff814ee69 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/Kconfig +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/Kconfig @@ -1,10 +1,5 @@ config RTL8723BU - tristate "Realtek 8723BU USB WiFi Support" + tristate "Realtek 8723BU USB WiFi" depends on USB - select WIRELESS_EXT - select WEXT_PRIV - select IEEE80211 - select BT_RTKBTUSB - select UHID ---help--- Help message of RTL8723BU diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/Makefile b/drivers/net/wireless/rockchip_wlan/rtl8723bu/Makefile old mode 100644 new mode 100755 index ba903b97ced5..8f38c324b57f --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/Makefile +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/Makefile @@ -53,7 +53,9 @@ CONFIG_TRAFFIC_PROTECT = y CONFIG_LOAD_PHY_PARA_FROM_FILE = y CONFIG_CALIBRATE_TX_POWER_BY_REGULATORY = n CONFIG_CALIBRATE_TX_POWER_TO_MAX = n -CONFIG_ODM_ADAPTIVITY = n +CONFIG_RTW_ADAPTIVITY_EN = auto +CONFIG_RTW_ADAPTIVITY_MODE = normal +CONFIG_SKIP_SIGNAL_SCALE_MAPPING = n ######################## Wake On Lan ########################## CONFIG_WOWLAN = n CONFIG_GPIO_WAKEUP = n @@ -63,7 +65,7 @@ CONFIG_AP_WOWLAN = n ######### Notify SDIO Host Keep Power During Syspend ########## CONFIG_RTW_SDIO_PM_KEEP_POWER = y ###################### Platform Related ####################### -CONFIG_PLATFORM_I386_PC = y +CONFIG_PLATFORM_I386_PC = n CONFIG_PLATFORM_ANDROID_X86 = n CONFIG_PLATFORM_JB_X86 = n CONFIG_PLATFORM_ARM_S3C2K4 = n @@ -85,13 +87,12 @@ CONFIG_PLATFORM_ARM_TCC8900 = n CONFIG_PLATFORM_ARM_TCC8920 = n CONFIG_PLATFORM_ARM_TCC8920_JB42 = n CONFIG_PLATFORM_ARM_RK2818 = n -CONFIG_PLATFORM_ARM_RK3066 = y -CONFIG_PLATFORM_ARM_RK3188 = n +CONFIG_PLATFORM_ARM_RK3066 = n +CONFIG_PLATFORM_ARM_RK3188 = y CONFIG_PLATFORM_ARM_URBETTER = n CONFIG_PLATFORM_ARM_TI_PANDA = n CONFIG_PLATFORM_MIPS_JZ4760 = n CONFIG_PLATFORM_DMP_PHILIPS = n -CONFIG_PLATFORM_TI_DM365 = n CONFIG_PLATFORM_MSTAR_TITANIA12 = n CONFIG_PLATFORM_MSTAR = n CONFIG_PLATFORM_SZEBOOK = n @@ -104,6 +105,9 @@ CONFIG_PLATFORM_ACTIONS_ATV5201 = n CONFIG_PLATFORM_ARM_RTD299X = n CONFIG_PLATFORM_ARM_SPREADTRUM_6820 = n CONFIG_PLATFORM_ARM_SPREADTRUM_8810 = n +CONFIG_PLATFORM_ARM_WMT = n +CONFIG_PLATFORM_TI_DM365 = n +CONFIG_PLATFORM_MOZART = n ############################################################### CONFIG_DRVEXT_MODULE = n @@ -165,8 +169,16 @@ _OUTSRC_FILES := hal/OUTSRC/odm_debug.o \ hal/OUTSRC/odm_interface.o\ hal/OUTSRC/odm_HWConfig.o\ hal/OUTSRC/odm.o\ - hal/OUTSRC/HalPhyRf.o - + hal/OUTSRC/HalPhyRf.o\ + hal/OUTSRC/odm_EdcaTurboCheck.o\ + hal/OUTSRC/odm_DIG.o\ + hal/OUTSRC/odm_PathDiv.o\ + hal/OUTSRC/odm_RaInfo.o\ + hal/OUTSRC/odm_DynamicBBPowerSaving.o\ + hal/OUTSRC/odm_DynamicTxPower.o\ + hal/OUTSRC/odm_CfoTracking.o\ + hal/OUTSRC/odm_NoiseMonitor.o + EXTRA_CFLAGS += -I$(src)/platform _PLATFORM_FILES := platform/platform_ops.o @@ -183,7 +195,8 @@ _OUTSRC_FILES += hal/OUTSRC-BTCoexist/HalBtc8188c2Ant.o \ hal/OUTSRC-BTCoexist/HalBtc8812a1Ant.o \ hal/OUTSRC-BTCoexist/HalBtc8812a2Ant.o \ hal/OUTSRC-BTCoexist/HalBtc8821a1Ant.o \ - hal/OUTSRC-BTCoexist/HalBtc8821a2Ant.o + hal/OUTSRC-BTCoexist/HalBtc8821a2Ant.o \ + hal/OUTSRC-BTCoexist/HalBtc8821aCsr2Ant.o endif ########### HAL_RTL8192C ################################# @@ -370,6 +383,10 @@ ifeq ($(CONFIG_SDIO_HCI), y) MODULE_NAME = 8189es endif +ifeq ($(CONFIG_GSPI_HCI), y) +MODULE_NAME = 8189es +endif + ifeq ($(CONFIG_USB_HCI), y) MODULE_NAME = 8188eu endif @@ -530,10 +547,6 @@ _OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/HalHWImg8812A_FW.o\ hal/OUTSRC/$(RTL871X)/HalHWImg8812A_MAC.o\ hal/OUTSRC/$(RTL871X)/HalHWImg8812A_BB.o\ hal/OUTSRC/$(RTL871X)/HalHWImg8812A_RF.o\ - hal/OUTSRC/$(RTL871X)/HalHWImg8812A_TestChip_FW.o\ - hal/OUTSRC/$(RTL871X)/HalHWImg8812A_TestChip_MAC.o\ - hal/OUTSRC/$(RTL871X)/HalHWImg8812A_TestChip_BB.o\ - hal/OUTSRC/$(RTL871X)/HalHWImg8812A_TestChip_RF.o\ hal/OUTSRC/$(RTL871X)/HalPhyRf_8812A.o\ hal/OUTSRC/$(RTL871X)/odm_RegConfig8812A.o\ hal/OUTSRC/$(RTL871X)/odm_RTL8812A.o @@ -561,9 +574,6 @@ _OUTSRC_FILES += hal/OUTSRC/rtl8821a/HalHWImg8821A_FW.o\ hal/OUTSRC/rtl8821a/HalHWImg8821A_MAC.o\ hal/OUTSRC/rtl8821a/HalHWImg8821A_BB.o\ hal/OUTSRC/rtl8821a/HalHWImg8821A_RF.o\ - hal/OUTSRC/rtl8821a/HalHWImg8821A_TestChip_MAC.o\ - hal/OUTSRC/rtl8821a/HalHWImg8821A_TestChip_BB.o\ - hal/OUTSRC/rtl8821a/HalHWImg8821A_TestChip_RF.o\ hal/OUTSRC/rtl8812a/HalPhyRf_8812A.o\ hal/OUTSRC/rtl8821a/HalPhyRf_8821A.o\ hal/OUTSRC/rtl8821a/odm_RegConfig8821A.o\ @@ -689,6 +699,12 @@ endif ifeq ($(CONFIG_EFUSE_CONFIG_FILE), y) EXTRA_CFLAGS += -DCONFIG_EFUSE_CONFIG_FILE +ifeq ($(MODULE_NAME), 8189es) +EXTRA_CFLAGS += -DEFUSE_MAP_PATH=\"/system/etc/wifi/wifi_efuse_8189e.map\" +else +EXTRA_CFLAGS += -DEFUSE_MAP_PATH=\"/system/etc/wifi/wifi_efuse_$(MODULE_NAME).map\" +endif +EXTRA_CFLAGS += -DWIFIMAC_PATH=\"/data/wifimac.txt\" endif ifeq ($(CONFIG_EXT_CLK), y) @@ -711,8 +727,22 @@ ifeq ($(CONFIG_CALIBRATE_TX_POWER_TO_MAX), y) EXTRA_CFLAGS += -DCONFIG_CALIBRATE_TX_POWER_TO_MAX endif -ifeq ($(CONFIG_ODM_ADAPTIVITY), y) -EXTRA_CFLAGS += -DCONFIG_ODM_ADAPTIVITY +ifeq ($(CONFIG_RTW_ADAPTIVITY_EN), disable) +EXTRA_CFLAGS += -DCONFIG_RTW_ADAPTIVITY_EN=0 +else ifeq ($(CONFIG_RTW_ADAPTIVITY_EN), enable) +EXTRA_CFLAGS += -DCONFIG_RTW_ADAPTIVITY_EN=1 +else ifeq ($(CONFIG_RTW_ADAPTIVITY_EN), auto) +EXTRA_CFLAGS += -DCONFIG_RTW_ADAPTIVITY_EN=2 +endif + +ifeq ($(CONFIG_RTW_ADAPTIVITY_MODE), normal) +EXTRA_CFLAGS += -DCONFIG_RTW_ADAPTIVITY_MODE=0 +else ifeq ($(CONFIG_RTW_ADAPTIVITY_MODE), carrier_sense) +EXTRA_CFLAGS += -DCONFIG_RTW_ADAPTIVITY_MODE=1 +endif + +ifeq ($(CONFIG_SKIP_SIGNAL_SCALE_MAPPING), y) +EXTRA_CFLAGS += -DCONFIG_SKIP_SIGNAL_SCALE_MAPPING endif ifeq ($(CONFIG_WOWLAN), y) @@ -748,6 +778,10 @@ endif ifeq ($(CONFIG_PLATFORM_I386_PC), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN +EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE +EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 +EXTRA_CFLAGS += -DRTW_USE_CFG80211_STA_EVENT # only enable when kernel >= 3.2 +EXTRA_CFLAGS += -DCONFIG_P2P_IPS SUBARCH := $(shell uname -m | sed -e s/i.86/i386/) ARCH ?= $(SUBARCH) CROSS_COMPILE ?= @@ -931,10 +965,23 @@ endif ifeq ($(CONFIG_PLATFORM_TI_DM365), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_TI_DM365 +EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_RX ARCH := arm -CROSS_COMPILE := /home/cnsd4/Appro/mv_pro_5.0/montavista/pro/devkit/arm/v5t_le/bin/arm_v5t_le- +#CROSS_COMPILE := /home/cnsd4/Appro/mv_pro_5.0/montavista/pro/devkit/arm/v5t_le/bin/arm_v5t_le- +#KSRC := /home/cnsd4/Appro/mv_pro_5.0/montavista/pro/devkit/lsp/ti-davinci/linux-dm365 +CROSS_COMPILE := /opt/montavista/pro5.0/devkit/arm/v5t_le/bin/arm-linux- +KSRC:= /home/vivotek/lsp/DM365/kernel_platform/kernel/linux-2.6.18 +KERNELOUTPUT := ${PRODUCTDIR}/tmp KVER := 2.6.18 -KSRC := /home/cnsd4/Appro/mv_pro_5.0/montavista/pro/devkit/lsp/ti-davinci/linux-dm365 +endif + +ifeq ($(CONFIG_PLATFORM_MOZART), y) +EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MOZART +ARCH := arm +CROSS_COMPILE := /home/vivotek/lsp/mozart3v2/Mozart3e_Toolchain/build_arm_nofpu/usr/bin/arm-linux- +KVER := $(shell uname -r) +KSRC:= /opt/Vivotek/lsp/mozart3v2/kernel_platform/kernel/mozart_kernel-1.17 +KERNELOUTPUT := /home/pink/sample/ODM/IP8136W-VINT/tmp/kernel endif ifeq ($(CONFIG_PLATFORM_TEGRA3_CARDHU), y) @@ -994,9 +1041,9 @@ endif ifeq ($(CONFIG_PLATFORM_ARM_RK2818), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID -DCONFIG_PLATFORM_ROCKCHIPS ARCH := arm -CROSS_COMPILE := /home/xxh/toolchain/arm-eabi-4.4.0/bin/arm-eabi- -KSRC := /home/xxh/work/3066_Jelly_Bean_4.2_r2/kernel -MODULE_NAME := 8723bu +CROSS_COMPILE := /usr/src/release_fae_version/toolchain/arm-eabi-4.4.0/bin/arm-eabi- +KSRC := /usr/src/release_fae_version/kernel25_A7_281x +MODULE_NAME := wlan endif ifeq ($(CONFIG_PLATFORM_ARM_RK3188), y) @@ -1012,11 +1059,12 @@ EXTRA_CFLAGS += -DCONFIG_P2P_IPS ARCH := arm CROSS_COMPILE := /home/android_sdk/Rockchip/Rk3188/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi- KSRC := /home/android_sdk/Rockchip/Rk3188/kernel -MODULE_NAME := wlan +MODULE_NAME := 8723bu endif ifeq ($(CONFIG_PLATFORM_ARM_RK3066), y) -#EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC +EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_RK3066 +EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 @@ -1026,10 +1074,10 @@ EXTRA_CFLAGS += -DRTW_SUPPORT_PLATFORM_SHUTDOWN endif EXTRA_CFLAGS += -fno-pic ARCH := arm -CROSS_COMPILE := /home/xxh/work/3066_KitKat/prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.6/bin/arm-linux-androideabi- +CROSS_COMPILE := /home/android_sdk/Rockchip/rk3066_20130607/prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.6/bin/arm-linux-androideabi- #CROSS_COMPILE := /home/android_sdk/Rockchip/Rk3066sdk/prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.6/bin/arm-linux-androideabi- -KSRC := /home/xxh/work/3066_KitKat/kernel -MODULE_NAME :=8723bu +KSRC := /home/android_sdk/Rockchip/Rk3066sdk/kernel +MODULE_NAME :=wlan endif ifeq ($(CONFIG_PLATFORM_ARM_URBETTER), y) @@ -1184,9 +1232,12 @@ _PLATFORM_FILES += platform/platform_ARM_SUNnI_sdio.o endif ARCH := arm -CROSS_COMPILE := /home/android_sdk/Allwinner/a23/android-jb42/lichee/out/android/common/buildroot/external-toolchain/bin/arm-linux-gnueabi- -KVER := 3.4.39 -KSRC :=/home/android_sdk/Allwinner/a23/android-jb42/lichee/linux-3.4 +# ===Cross compile setting for Android 4.2 SDK === +#CROSS_COMPILE := /home/android_sdk/Allwinner/a23/android-jb42/lichee/out/android/common/buildroot/external-toolchain/bin/arm-linux-gnueabi- +#KSRC :=/home/android_sdk/Allwinner/a23/android-jb42/lichee/linux-3.4 +# ===Cross compile setting for Android 4.4 SDK === +CROSS_COMPILE := /home/android_sdk/Allwinner/a23/android-kk44/lichee/out/android/common/buildroot/external-toolchain/bin/arm-linux-gnueabi- +KSRC :=/home/android_sdk/Allwinner/a23/android-kk44/lichee/linux-3.4 endif ifeq ($(CONFIG_PLATFORM_ACTIONS_ATV5201), y) @@ -1236,6 +1287,20 @@ _PLATFORM_FILES += platform/platform_sprd_sdio.o endif endif +ifeq ($(CONFIG_PLATFORM_ARM_WMT), y) +EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN +EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE +EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT +EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS +ifeq ($(CONFIG_SDIO_HCI), y) +_PLATFORM_FILES += platform/platform_ARM_WMT_sdio.o +endif +ARCH := arm +CROSS_COMPILE := /home/android_sdk/WonderMedia/wm8880-android4.4/toolchain/arm_201103_gcc4.5.2/mybin/arm_1103_le- +KSRC := /home/android_sdk/WonderMedia/wm8880-android4.4/kernel4.4/ +MODULE_NAME :=8189es_kk +endif + ifeq ($(CONFIG_MULTIDRV), y) ifeq ($(CONFIG_SDIO_HCI), y) diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/efuse/rtw_efuse.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/efuse/rtw_efuse.c old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_ap.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_ap.c old mode 100644 new mode 100755 index 4190fa3689bb..8362f94e834a --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_ap.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_ap.c @@ -992,26 +992,39 @@ void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta) //check if sta supports rx ampdu phtpriv_sta->ampdu_enable = phtpriv_ap->ampdu_enable; - //check if sta support s Short GI 20M - if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_20)) - { - phtpriv_sta->sgi_20m = _TRUE; + phtpriv_sta->rx_ampdu_min_spacing = (phtpriv_sta->ht_cap.ampdu_params_info&IEEE80211_HT_CAP_AMPDU_DENSITY)>>2; + + // bwmode + if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SUP_WIDTH)) + { + psta->bw_mode = CHANNEL_WIDTH_40; } - //check if sta support s Short GI 40M - if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_40)) + else + { + psta->bw_mode = CHANNEL_WIDTH_20; + } + + if(pmlmeext->cur_bwmode < psta->bw_mode) { - phtpriv_sta->sgi_40m = _TRUE; + psta->bw_mode = pmlmeext->cur_bwmode; } - // bwmode - if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SUP_WIDTH)) + phtpriv_sta->ch_offset = pmlmeext->cur_ch_offset; + + + //check if sta support s Short GI 20M + if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_20)) { - phtpriv_sta->ch_offset = pmlmeext->cur_ch_offset; - psta->bw_mode = CHANNEL_WIDTH_40; + phtpriv_sta->sgi_20m = _TRUE; } - else + + //check if sta support s Short GI 40M + if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_40)) { - psta->bw_mode = CHANNEL_WIDTH_20; + if(psta->bw_mode == CHANNEL_WIDTH_40) //according to psta->bw_mode + phtpriv_sta->sgi_40m = _TRUE; + else + phtpriv_sta->sgi_40m = _FALSE; } psta->qos_option = _TRUE; @@ -1720,7 +1733,7 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len) if(p && ie_len>0) { u8 rf_type=0; - u8 max_rx_ampdu_factor=0; + HT_CAP_AMPDU_FACTOR max_rx_ampdu_factor=MAX_AMPDU_FACTOR_64K; struct rtw_ieee80211_ht_cap *pht_cap = (struct rtw_ieee80211_ht_cap *)(p+2); pHT_caps_ie=p; @@ -2890,7 +2903,7 @@ u8 ap_free_sta(_adapter *padapter, struct sta_info *psta, bool active, u16 reaso //report_del_sta_event(padapter, psta->hwaddr, reason); //clear cam entry / key - rtw_clearstakey_cmd(padapter, (u8*)psta, (u8)rtw_get_camid(psta->mac_id), _TRUE); + rtw_clearstakey_cmd(padapter, psta, _TRUE); _enter_critical_bh(&psta->lock, &irqL); @@ -3129,13 +3142,14 @@ void rtw_ap_restore_network(_adapter *padapter) if (psta == NULL) { DBG_871X(FUNC_ADPT_FMT" sta_info is null\n", FUNC_ADPT_ARG(padapter)); } else if (psta->state &_FW_LINKED) { + rtw_sta_media_status_rpt(padapter, psta, 1); Update_RA_Entry(padapter, psta); //pairwise key /* per sta pairwise key and settings */ if( (padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) || (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) { - rtw_setstakey_cmd(padapter, (unsigned char *)psta, _TRUE,_FALSE); + rtw_setstakey_cmd(padapter, psta, _TRUE,_FALSE); } } } @@ -3178,14 +3192,6 @@ void start_ap_mode(_adapter *padapter) for(i=0; ista_aid[i] = NULL; - pmlmepriv->wps_beacon_ie = NULL; - pmlmepriv->wps_probe_resp_ie = NULL; - pmlmepriv->wps_assoc_resp_ie = NULL; - - pmlmepriv->p2p_beacon_ie = NULL; - pmlmepriv->p2p_probe_resp_ie = NULL; - - //for ACL _rtw_init_listhead(&(pacl_list->acl_node_q.queue)); pacl_list->num = 0; diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_beamforming.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_beamforming.c old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_br_ext.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_br_ext.c old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_bt_mp.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_bt_mp.c old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_btcoex.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_btcoex.c old mode 100644 new mode 100755 index ea5931cf66fd..d37f5c817eb4 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_btcoex.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_btcoex.c @@ -28,6 +28,11 @@ void rtw_btcoex_Initialize(PADAPTER padapter) hal_btcoex_Initialize(padapter); } +void rtw_btcoex_PowerOnSetting(PADAPTER padapter) +{ + hal_btcoex_PowerOnSetting(padapter); +} + void rtw_btcoex_HAL_Initialize(PADAPTER padapter, u8 bWifiOnly) { hal_btcoex_InitHwConfig(padapter, bWifiOnly); @@ -240,9 +245,9 @@ void rtw_btcoex_SetChipType(PADAPTER padapter, u8 chipType) hal_btcoex_SetChipType(padapter, chipType); } -void rtw_btcoex_SetPGAntNum(PADAPTER padapter, u8 antNum, u8 antInverse) +void rtw_btcoex_SetPGAntNum(PADAPTER padapter, u8 antNum) { - hal_btcoex_SetPgAntNum(padapter, antNum, antInverse); + hal_btcoex_SetPgAntNum(padapter, antNum); } u8 rtw_btcoex_GetPGAntNum(PADAPTER padapter) @@ -250,6 +255,11 @@ u8 rtw_btcoex_GetPGAntNum(PADAPTER padapter) return hal_btcoex_GetPgAntNum(padapter); } +void rtw_btcoex_SetSingleAntPath(PADAPTER padapter, u8 singleAntPath) +{ + hal_btcoex_SetSingleAntPath(padapter, singleAntPath); +} + u32 rtw_btcoex_GetRaMask(PADAPTER padapter) { return hal_btcoex_GetRaMask(padapter); @@ -291,15 +301,53 @@ u8 rtw_btcoex_IsBtLinkExist(PADAPTER padapter) void rtw_btcoex_RejectApAggregatedPacket(PADAPTER padapter, u8 enable) { struct mlme_ext_info *pmlmeinfo; - struct sta_info *psta; pmlmeinfo = &padapter->mlmeextpriv.mlmext_info; - psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(&padapter->mlmepriv)); if (_TRUE == enable) { + struct sta_info *psta = NULL; + pmlmeinfo->bAcceptAddbaReq = _FALSE; - send_delba(padapter, 0, psta->hwaddr); + + if ((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE) { + psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(&padapter->mlmepriv)); + if (psta) + send_delba(padapter, 0, psta->hwaddr); + } else if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) { + _irqL irqL; + _list *phead, *plist; + u8 peer_num = 0; + char peers[NUM_STA]; + struct sta_priv *pstapriv = &padapter->stapriv; + int i; + + _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); + + phead = &pstapriv->asoc_list; + plist = get_next(phead); + + while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { + int stainfo_offset; + + psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); + plist = get_next(plist); + + stainfo_offset = rtw_stainfo_offset(pstapriv, psta); + if (stainfo_offset_valid(stainfo_offset)) + peers[peer_num++] = stainfo_offset; + } + + _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); + + if (peer_num) { + for (i = 0; i < peer_num; i++) { + psta = rtw_get_stainfo_by_offset(pstapriv, peers[i]); + if (psta) + send_delba(padapter, 0, psta->hwaddr); + } + } + } } else { diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_cmd.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_cmd.c old mode 100644 new mode 100755 index fb77701d7068..2298e424e8d0 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_cmd.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_cmd.c @@ -330,7 +330,7 @@ int rtw_cmd_filter(struct cmd_priv *pcmdpriv, struct cmd_obj *cmd_obj) bAllow = _TRUE; if( (pcmdpriv->padapter->hw_init_completed ==_FALSE && bAllow == _FALSE) - || pcmdpriv->cmdthd_running== _FALSE //com_thread not running + || ATOMIC_READ(&(pcmdpriv->cmdthd_running)) == _FALSE //com_thread not running ) { //DBG_871X("%s:%s: drop cmdcode:%u, hw_init_completed:%u, cmdthd_running:%u\n", caller_func, __FUNCTION__, @@ -430,8 +430,9 @@ _func_exit_; void rtw_stop_cmd_thread(_adapter *adapter) { - if(adapter->cmdThread && adapter->cmdpriv.cmdthd_running == _TRUE - && adapter->cmdpriv.stop_req == 0) + if(adapter->cmdThread && + ATOMIC_READ(&(adapter->cmdpriv.cmdthd_running)) == _TRUE && + adapter->cmdpriv.stop_req == 0) { adapter->cmdpriv.stop_req = 1; _rtw_up_sema(&adapter->cmdpriv.cmd_queue_sema); @@ -460,7 +461,7 @@ _func_enter_; prspbuf = pcmdpriv->rsp_buf; pcmdpriv->stop_req = 0; - pcmdpriv->cmdthd_running=_TRUE; + ATOMIC_SET(&(pcmdpriv->cmdthd_running), _TRUE); _rtw_up_sema(&pcmdpriv->terminate_cmdthread_sema); RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("start r871x rtw_cmd_thread !!!!\n")); @@ -607,8 +608,6 @@ post_process: goto _next; } - pcmdpriv->cmdthd_running=_FALSE; - // free all cmd_obj resources do{ @@ -633,6 +632,7 @@ post_process: }while(1); _rtw_up_sema(&pcmdpriv->terminate_cmdthread_sema); + ATOMIC_SET(&(pcmdpriv->cmdthd_running), _FALSE); _func_exit_; @@ -1570,7 +1570,7 @@ _func_exit_; return res; } -u8 rtw_setstakey_cmd(_adapter *padapter, u8 *psta, u8 unicast_key, bool enqueue) +u8 rtw_setstakey_cmd(_adapter *padapter, struct sta_info *sta, u8 unicast_key, bool enqueue) { struct cmd_obj* ph2c; struct set_stakey_parm *psetstakey_para; @@ -1579,7 +1579,6 @@ u8 rtw_setstakey_cmd(_adapter *padapter, u8 *psta, u8 unicast_key, bool enqueue) struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct security_priv *psecuritypriv = &padapter->securitypriv; - struct sta_info* sta = (struct sta_info* )psta; u8 res=_SUCCESS; _func_enter_; @@ -1651,7 +1650,7 @@ _func_exit_; return res; } -u8 rtw_clearstakey_cmd(_adapter *padapter, u8 *psta, u8 entry, u8 enqueue) +u8 rtw_clearstakey_cmd(_adapter *padapter, struct sta_info *sta, u8 enqueue) { struct cmd_obj* ph2c; struct set_stakey_parm *psetstakey_para; @@ -1659,14 +1658,18 @@ u8 rtw_clearstakey_cmd(_adapter *padapter, u8 *psta, u8 entry, u8 enqueue) struct set_stakey_rsp *psetstakey_rsp = NULL; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct security_priv *psecuritypriv = &padapter->securitypriv; - struct sta_info* sta = (struct sta_info* )psta; + s16 cam_id = 0; u8 res=_SUCCESS; _func_enter_; if(!enqueue) { - clear_cam_entry(padapter, entry); + while((cam_id = rtw_camid_search(padapter, sta->hwaddr, -1)) >= 0) { + DBG_871X_LEVEL(_drv_always_, "clear key for addr:"MAC_FMT", camid:%d\n", MAC_ARG(sta->hwaddr), cam_id); + clear_cam_entry(padapter, cam_id); + rtw_camid_free(padapter, cam_id); + } } else { @@ -1698,8 +1701,6 @@ _func_enter_; _rtw_memcpy(psetstakey_para->addr, sta->hwaddr, ETH_ALEN); psetstakey_para->algorithm = _NO_PRIVACY_; - - psetstakey_para->id = entry; res = rtw_enqueue_cmd(pcmdpriv, ph2c); @@ -2103,15 +2104,11 @@ _func_enter_; else { //no need to enqueue, do the cmd hdl directly and free cmd parameter - if( H2C_SUCCESS !=set_chplan_hdl(padapter, (unsigned char *)setChannelPlan_param) ) + if( H2C_SUCCESS != set_chplan_hdl(padapter, (unsigned char *)setChannelPlan_param) ) res = _FAIL; rtw_mfree((u8 *)setChannelPlan_param, sizeof(struct SetChannelPlan_param)); } - - //do something based on res... - if(res == _SUCCESS) - padapter->mlmepriv.ChannelPlan = chplan; exit: @@ -2288,7 +2285,14 @@ static void collect_traffic_statistics(_adapter *padapter) u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer) { u8 bEnterPS = _FALSE; - u16 BusyThreshold = 100; +#ifdef CONFIG_BT_COEXIST + u16 BusyThresholdHigh = 25; + u16 BusyThresholdLow = 10; +#else + u16 BusyThresholdHigh = 100; + u16 BusyThresholdLow = 75; +#endif + u16 BusyThreshold = BusyThresholdHigh; u8 bBusyTraffic = _FALSE, bTxBusyTraffic = _FALSE, bRxBusyTraffic = _FALSE; u8 bHigherBusyTraffic = _FALSE, bHigherBusyRxTraffic = _FALSE, bHigherBusyTxTraffic = _FALSE; @@ -2309,16 +2313,12 @@ u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer) if((check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) /*&& !MgntInitAdapterInProgress(pMgntInfo)*/) { -#ifdef CONFIG_BT_COEXIST - if( pmlmepriv->LinkDetectInfo.NumRxOkInPeriod > 25 || - pmlmepriv->LinkDetectInfo.NumTxOkInPeriod > 25 ) -#else // !CONFIG_BT_COEXIST // if we raise bBusyTraffic in last watchdog, using lower threshold. if (pmlmepriv->LinkDetectInfo.bBusyTraffic) - BusyThreshold = 75; + BusyThreshold = BusyThresholdLow; + if( pmlmepriv->LinkDetectInfo.NumRxOkInPeriod > BusyThreshold || pmlmepriv->LinkDetectInfo.NumTxOkInPeriod > BusyThreshold ) -#endif // !CONFIG_BT_COEXIST { bBusyTraffic = _TRUE; @@ -2521,6 +2521,7 @@ void dynamic_chk_wk_hdl(_adapter *padapter) { linked_status_chk(padapter); traffic_status_watchdog(padapter, 0); + dm_DynamicUsbTxAgg(padapter, 0); } #ifdef CONFIG_BEAMFORMING @@ -3123,6 +3124,147 @@ exit: } #endif +#ifdef CONFIG_BT_COEXIST +struct btinfo { + u8 cid; + u8 len; + + u8 bConnection:1; + u8 bSCOeSCO:1; + u8 bInQPage:1; + u8 bACLBusy:1; + u8 bSCOBusy:1; + u8 bHID:1; + u8 bA2DP:1; + u8 bFTP:1; + + u8 retry_cnt:4; + u8 rsvd_34:1; + u8 rsvd_35:1; + u8 rsvd_36:1; + u8 rsvd_37:1; + + u8 rssi; + + u8 rsvd_50:1; + u8 rsvd_51:1; + u8 rsvd_52:1; + u8 rsvd_53:1; + u8 rsvd_54:1; + u8 rsvd_55:1; + u8 eSCO_SCO:1; + u8 Master_Slave:1; + + u8 rsvd_6; + u8 rsvd_7; +}; + +void btinfo_evt_dump(void *sel, void *buf) +{ + struct btinfo *info = (struct btinfo *)buf; + + DBG_871X_SEL_NL(sel, "cid:0x%02x, len:%u\n", info->cid, info->len); + + if (info->len > 2) + DBG_871X_SEL_NL(sel, "byte2:%s%s%s%s%s%s%s%s\n" + , info->bConnection?"bConnection ":"" + , info->bSCOeSCO?"bSCOeSCO ":"" + , info->bInQPage?"bInQPage ":"" + , info->bACLBusy?"bACLBusy ":"" + , info->bSCOBusy?"bSCOBusy ":"" + , info->bHID?"bHID ":"" + , info->bA2DP?"bA2DP ":"" + , info->bFTP?"bFTP":"" + ); + + if (info->len > 3) + DBG_871X_SEL_NL(sel, "retry_cnt:%u\n", info->retry_cnt); + + if (info->len > 4) + DBG_871X_SEL_NL(sel, "rssi:%u\n", info->rssi); + + if (info->len > 5) + DBG_871X_SEL_NL(sel, "byte5:%s%s\n" + , info->eSCO_SCO?"eSCO_SCO ":"" + , info->Master_Slave?"Master_Slave ":"" + ); +} + +static void rtw_btinfo_hdl(_adapter *adapter, u8 *buf, u16 buf_len) +{ + #define BTINFO_WIFI_FETCH 0x23 + #define BTINFO_BT_AUTO_RPT 0x27 + struct btinfo *info = (struct btinfo *)buf; + u8 cmd_idx; + u8 len; + + cmd_idx = info->cid; + + if (info->len > buf_len-2) { + rtw_warn_on(1); + len = buf_len-2; + } else { + len = info->len; + } + +//#define DBG_PROC_SET_BTINFO_EVT +#ifdef DBG_PROC_SET_BTINFO_EVT + btinfo_evt_dump(RTW_DBGDUMP, info); +#endif + + /* transform BT-FW btinfo to WiFI-FW C2H format and notify */ + if (cmd_idx == BTINFO_WIFI_FETCH) + buf[1] = 0; + else if (cmd_idx == BTINFO_BT_AUTO_RPT) + buf[1] = 2; + rtw_btcoex_BtInfoNotify(adapter ,len+1, &buf[1]); +} + +u8 rtw_btinfo_cmd(_adapter *adapter, u8 *buf, u16 len) +{ + struct cmd_obj *ph2c; + struct drvextra_cmd_parm *pdrvextra_cmd_parm; + u8 *btinfo; + struct cmd_priv *pcmdpriv = &adapter->cmdpriv; + u8 res = _SUCCESS; + + ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); + if (ph2c == NULL) { + res = _FAIL; + goto exit; + } + + pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); + if (pdrvextra_cmd_parm == NULL) { + rtw_mfree((u8*)ph2c, sizeof(struct cmd_obj)); + res = _FAIL; + goto exit; + } + + btinfo = rtw_zmalloc(len); + if (btinfo == NULL) { + rtw_mfree((u8*)ph2c, sizeof(struct cmd_obj)); + rtw_mfree((u8*)pdrvextra_cmd_parm, sizeof(struct drvextra_cmd_parm)); + res = _FAIL; + goto exit; + } + + pdrvextra_cmd_parm->ec_id = BTINFO_WK_CID; + pdrvextra_cmd_parm->type = 0; + pdrvextra_cmd_parm->size = len; + pdrvextra_cmd_parm->pbuf = btinfo; + + _rtw_memcpy(btinfo, buf, len); + + init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); + + res = rtw_enqueue_cmd(pcmdpriv, ph2c); + +exit: + return res; +} +#endif + //#ifdef CONFIG_C2H_PACKET_EN u8 rtw_c2h_packet_wk_cmd(PADAPTER padapter, u8 *pbuf, u16 length) { @@ -3355,7 +3497,11 @@ u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf) case DM_RA_MSK_WK_CID: rtw_dm_ra_mask_hdl(padapter, (struct sta_info *)pdrvextra_cmd->pbuf); break; - +#ifdef CONFIG_BT_COEXIST + case BTINFO_WK_CID: + rtw_btinfo_hdl(padapter ,pdrvextra_cmd->pbuf, pdrvextra_cmd->size); + break; +#endif default: break; } diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_debug.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_debug.c old mode 100644 new mode 100755 index 175110c0be9f..936d2e395df1 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_debug.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_debug.c @@ -281,6 +281,23 @@ int proc_get_sec_info(struct seq_file *m, void *v) DBG_871X_SEL_NL(m, "hw_decrypted=%d\n", sec->hw_decrypted); +#ifdef DBG_SW_SEC_CNT + DBG_871X_SEL_NL(m, "wep_sw_enc_cnt=%llu, %llu, %llu\n" + , sec->wep_sw_enc_cnt_bc , sec->wep_sw_enc_cnt_mc, sec->wep_sw_enc_cnt_uc); + DBG_871X_SEL_NL(m, "wep_sw_dec_cnt=%llu, %llu, %llu\n" + , sec->wep_sw_dec_cnt_bc , sec->wep_sw_dec_cnt_mc, sec->wep_sw_dec_cnt_uc); + + DBG_871X_SEL_NL(m, "tkip_sw_enc_cnt=%llu, %llu, %llu\n" + , sec->tkip_sw_enc_cnt_bc , sec->tkip_sw_enc_cnt_mc, sec->tkip_sw_enc_cnt_uc); + DBG_871X_SEL_NL(m, "tkip_sw_dec_cnt=%llu, %llu, %llu\n" + , sec->tkip_sw_dec_cnt_bc , sec->tkip_sw_dec_cnt_mc, sec->tkip_sw_dec_cnt_uc); + + DBG_871X_SEL_NL(m, "aes_sw_enc_cnt=%llu, %llu, %llu\n" + , sec->aes_sw_enc_cnt_bc , sec->aes_sw_enc_cnt_mc, sec->aes_sw_enc_cnt_uc); + DBG_871X_SEL_NL(m, "aes_sw_dec_cnt=%llu, %llu, %llu\n" + , sec->aes_sw_dec_cnt_bc , sec->aes_sw_dec_cnt_mc, sec->aes_sw_dec_cnt_uc); +#endif /* DBG_SW_SEC_CNT */ + return 0; } @@ -449,6 +466,7 @@ int proc_get_survey_info(struct seq_file *m, void *v) struct wlan_network *pnetwork = NULL; _list *plist, *phead; s32 notify_signal; + s16 notify_noise = 0; u16 index = 0; _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); @@ -457,7 +475,7 @@ int proc_get_survey_info(struct seq_file *m, void *v) if ((!phead) || (!plist)) return 0; - DBG_871X_SEL_NL(m, "%5s %-17s %3s %-3s %-4s %5s %s\n","index", "bssid", "ch", "dBm", "SdBm", "age", "ssid"); + DBG_871X_SEL_NL(m, "%5s %-17s %3s %-3s %-4s %-4s %5s %s\n","index", "bssid", "ch", "RSSI", "SdBm", "Noise", "age", "ssid"); while(1) { if (rtw_end_of_queue_search(phead,plist)== _TRUE) @@ -473,13 +491,18 @@ int proc_get_survey_info(struct seq_file *m, void *v) } else { notify_signal = translate_percentage_to_dbm(pnetwork->network.PhyInfo.SignalStrength);//dbm } + + #if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR) + rtw_hal_get_odm_var(padapter, HAL_ODM_NOISE_MONITOR,&(pnetwork->network.Configuration.DSConfig), &(notify_noise)); + #endif - DBG_871X_SEL_NL(m, "%5d "MAC_FMT" %3d %3d %4d %5d %s\n", + DBG_871X_SEL_NL(m, "%5d "MAC_FMT" %3d %3d %4d %4d %5d %s\n", ++index, MAC_ARG(pnetwork->network.MacAddress), pnetwork->network.Configuration.DSConfig, (int)pnetwork->network.Rssi, notify_signal, + notify_noise, rtw_get_passing_time_ms((u32)pnetwork->last_scanned), //translate_percentage_to_dbm(pnetwork->network.PhyInfo.SignalStrength), pnetwork->network.Ssid.Ssid); @@ -547,8 +570,14 @@ int proc_get_adapter_state(struct seq_file *m, void *v) struct net_device *dev = m->private; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); - DBG_871X_SEL_NL(m, "bSurpriseRemoved=%d, bDriverStopped=%d\n", - padapter->bSurpriseRemoved, padapter->bDriverStopped); +#ifdef CONFIG_CONCURRENT_MODE + DBG_871X_SEL_NL(m, "name=%s, iface_type=%d, bSurpriseRemoved=%d, bDriverStopped=%d\n", + dev->name, padapter->iface_type, + padapter->bSurpriseRemoved, padapter->bDriverStopped); +#else + DBG_871X_SEL_NL(m, "name=%s, bSurpriseRemoved=%d, bDriverStopped=%d\n", + dev->name, padapter->bSurpriseRemoved, padapter->bDriverStopped); +#endif return 0; } @@ -590,7 +619,7 @@ int proc_get_rate_ctl(struct seq_file *m, void *v) if (adapter->fix_rate != 0xff) { DBG_871X_SEL_NL(m, "FIX\n"); - DBG_871X_SEL_NL(m, "0x%02x\n", adapter->fix_rate); + DBG_871X_SEL_NL(m, "0x%02x(%s)\n", adapter->fix_rate, HDATA_RATE(adapter->fix_rate)); } else { DBG_871X_SEL_NL(m, "RA\n"); } @@ -695,6 +724,269 @@ int proc_get_suspend_resume_info(struct seq_file *m, void *v) return 0; } +#ifdef CONFIG_DBG_COUNTER + +int proc_get_rx_logs(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + struct rx_logs *rx_logs = &padapter->rx_logs; + + DBG_871X_SEL_NL(m, + "intf_rx=%d\n" + "intf_rx_err_recvframe=%d\n" + "intf_rx_err_skb=%d\n" + "intf_rx_report=%d\n" + "core_rx=%d\n" + "core_rx_pre=%d\n" + "core_rx_pre_ver_err=%d\n" + "core_rx_pre_mgmt=%d\n" + "core_rx_pre_mgmt_err_80211w=%d\n" + "core_rx_pre_mgmt_err=%d\n" + "core_rx_pre_ctrl=%d\n" + "core_rx_pre_ctrl_err=%d\n" + "core_rx_pre_data=%d\n" + "core_rx_pre_data_wapi_seq_err=%d\n" + "core_rx_pre_data_wapi_key_err=%d\n" + "core_rx_pre_data_handled=%d\n" + "core_rx_pre_data_err=%d\n" + "core_rx_pre_data_unknown=%d\n" + "core_rx_pre_unknown=%d\n" + "core_rx_enqueue=%d\n" + "core_rx_dequeue=%d\n" + "core_rx_post=%d\n" + "core_rx_post_decrypt=%d\n" + "core_rx_post_decrypt_wep=%d\n" + "core_rx_post_decrypt_tkip=%d\n" + "core_rx_post_decrypt_aes=%d\n" + "core_rx_post_decrypt_wapi=%d\n" + "core_rx_post_decrypt_hw=%d\n" + "core_rx_post_decrypt_unknown=%d\n" + "core_rx_post_decrypt_err=%d\n" + "core_rx_post_defrag_err=%d\n" + "core_rx_post_portctrl_err=%d\n" + "core_rx_post_indicate=%d\n" + "core_rx_post_indicate_in_oder=%d\n" + "core_rx_post_indicate_reoder=%d\n" + "core_rx_post_indicate_err=%d\n" + "os_indicate=%d\n" + "os_indicate_ap_mcast=%d\n" + "os_indicate_ap_forward=%d\n" + "os_indicate_ap_self=%d\n" + "os_indicate_err=%d\n" + "os_netif_ok=%d\n" + "os_netif_err=%d\n", + rx_logs->intf_rx, + rx_logs->intf_rx_err_recvframe, + rx_logs->intf_rx_err_skb, + rx_logs->intf_rx_report, + rx_logs->core_rx, + rx_logs->core_rx_pre, + rx_logs->core_rx_pre_ver_err, + rx_logs->core_rx_pre_mgmt, + rx_logs->core_rx_pre_mgmt_err_80211w, + rx_logs->core_rx_pre_mgmt_err, + rx_logs->core_rx_pre_ctrl, + rx_logs->core_rx_pre_ctrl_err, + rx_logs->core_rx_pre_data, + rx_logs->core_rx_pre_data_wapi_seq_err, + rx_logs->core_rx_pre_data_wapi_key_err, + rx_logs->core_rx_pre_data_handled, + rx_logs->core_rx_pre_data_err, + rx_logs->core_rx_pre_data_unknown, + rx_logs->core_rx_pre_unknown, + rx_logs->core_rx_enqueue, + rx_logs->core_rx_dequeue, + rx_logs->core_rx_post, + rx_logs->core_rx_post_decrypt, + rx_logs->core_rx_post_decrypt_wep, + rx_logs->core_rx_post_decrypt_tkip, + rx_logs->core_rx_post_decrypt_aes, + rx_logs->core_rx_post_decrypt_wapi, + rx_logs->core_rx_post_decrypt_hw, + rx_logs->core_rx_post_decrypt_unknown, + rx_logs->core_rx_post_decrypt_err, + rx_logs->core_rx_post_defrag_err, + rx_logs->core_rx_post_portctrl_err, + rx_logs->core_rx_post_indicate, + rx_logs->core_rx_post_indicate_in_oder, + rx_logs->core_rx_post_indicate_reoder, + rx_logs->core_rx_post_indicate_err, + rx_logs->os_indicate, + rx_logs->os_indicate_ap_mcast, + rx_logs->os_indicate_ap_forward, + rx_logs->os_indicate_ap_self, + rx_logs->os_indicate_err, + rx_logs->os_netif_ok, + rx_logs->os_netif_err + ); + + return 0; +} + +int proc_get_tx_logs(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + struct tx_logs *tx_logs = &padapter->tx_logs; + + DBG_871X_SEL_NL(m, + "os_tx=%d\n" + "os_tx_err_up=%d\n" + "os_tx_err_xmit=%d\n" + "os_tx_m2u=%d\n" + "os_tx_m2u_ignore_fw_linked=%d\n" + "os_tx_m2u_ignore_self=%d\n" + "os_tx_m2u_entry=%d\n" + "os_tx_m2u_entry_err_xmit=%d\n" + "os_tx_m2u_entry_err_skb=%d\n" + "os_tx_m2u_stop=%d\n" + "core_tx=%d\n" + "core_tx_err_pxmitframe=%d\n" + "core_tx_err_brtx=%d\n" + "core_tx_upd_attrib=%d\n" + "core_tx_upd_attrib_adhoc=%d\n" + "core_tx_upd_attrib_sta=%d\n" + "core_tx_upd_attrib_ap=%d\n" + "core_tx_upd_attrib_unknown=%d\n" + "core_tx_upd_attrib_dhcp=%d\n" + "core_tx_upd_attrib_icmp=%d\n" + "core_tx_upd_attrib_active=%d\n" + "core_tx_upd_attrib_err_ucast_sta=%d\n" + "core_tx_upd_attrib_err_ucast_ap_link=%d\n" + "core_tx_upd_attrib_err_sta=%d\n" + "core_tx_upd_attrib_err_link=%d\n" + "core_tx_upd_attrib_err_sec=%d\n" + "core_tx_ap_enqueue_warn_fwstate=%d\n" + "core_tx_ap_enqueue_warn_sta=%d\n" + "core_tx_ap_enqueue_warn_nosta=%d\n" + "core_tx_ap_enqueue_warn_link=%d\n" + "core_tx_ap_enqueue_warn_trigger=%d\n" + "core_tx_ap_enqueue_mcast=%d\n" + "core_tx_ap_enqueue_ucast=%d\n" + "core_tx_ap_enqueue=%d\n" + "intf_tx=%d\n" + "intf_tx_pending_ac=%d\n" + "intf_tx_pending_fw_under_survey=%d\n" + "intf_tx_pending_fw_under_linking=%d\n" + "intf_tx_pending_xmitbuf=%d\n" + "intf_tx_enqueue=%d\n" + "core_tx_enqueue=%d\n" + "core_tx_enqueue_class=%d\n" + "core_tx_enqueue_class_err_sta=%d\n" + "core_tx_enqueue_class_err_nosta=%d\n" + "core_tx_enqueue_class_err_fwlink=%d\n" + "intf_tx_direct=%d\n" + "intf_tx_direct_err_coalesce=%d\n" + "intf_tx_dequeue=%d\n" + "intf_tx_dequeue_err_coalesce=%d\n" + "intf_tx_dump_xframe=%d\n" + "intf_tx_dump_xframe_err_txdesc=%d\n" + "intf_tx_dump_xframe_err_port=%d\n", + tx_logs->os_tx, + tx_logs->os_tx_err_up, + tx_logs->os_tx_err_xmit, + tx_logs->os_tx_m2u, + tx_logs->os_tx_m2u_ignore_fw_linked, + tx_logs->os_tx_m2u_ignore_self, + tx_logs->os_tx_m2u_entry, + tx_logs->os_tx_m2u_entry_err_xmit, + tx_logs->os_tx_m2u_entry_err_skb, + tx_logs->os_tx_m2u_stop, + tx_logs->core_tx, + tx_logs->core_tx_err_pxmitframe, + tx_logs->core_tx_err_brtx, + tx_logs->core_tx_upd_attrib, + tx_logs->core_tx_upd_attrib_adhoc, + tx_logs->core_tx_upd_attrib_sta, + tx_logs->core_tx_upd_attrib_ap, + tx_logs->core_tx_upd_attrib_unknown, + tx_logs->core_tx_upd_attrib_dhcp, + tx_logs->core_tx_upd_attrib_icmp, + tx_logs->core_tx_upd_attrib_active, + tx_logs->core_tx_upd_attrib_err_ucast_sta, + tx_logs->core_tx_upd_attrib_err_ucast_ap_link, + tx_logs->core_tx_upd_attrib_err_sta, + tx_logs->core_tx_upd_attrib_err_link, + tx_logs->core_tx_upd_attrib_err_sec, + tx_logs->core_tx_ap_enqueue_warn_fwstate, + tx_logs->core_tx_ap_enqueue_warn_sta, + tx_logs->core_tx_ap_enqueue_warn_nosta, + tx_logs->core_tx_ap_enqueue_warn_link, + tx_logs->core_tx_ap_enqueue_warn_trigger, + tx_logs->core_tx_ap_enqueue_mcast, + tx_logs->core_tx_ap_enqueue_ucast, + tx_logs->core_tx_ap_enqueue, + tx_logs->intf_tx, + tx_logs->intf_tx_pending_ac, + tx_logs->intf_tx_pending_fw_under_survey, + tx_logs->intf_tx_pending_fw_under_linking, + tx_logs->intf_tx_pending_xmitbuf, + tx_logs->intf_tx_enqueue, + tx_logs->core_tx_enqueue, + tx_logs->core_tx_enqueue_class, + tx_logs->core_tx_enqueue_class_err_sta, + tx_logs->core_tx_enqueue_class_err_nosta, + tx_logs->core_tx_enqueue_class_err_fwlink, + tx_logs->intf_tx_direct, + tx_logs->intf_tx_direct_err_coalesce, + tx_logs->intf_tx_dequeue, + tx_logs->intf_tx_dequeue_err_coalesce, + tx_logs->intf_tx_dump_xframe, + tx_logs->intf_tx_dump_xframe_err_txdesc, + tx_logs->intf_tx_dump_xframe_err_port + ); + + return 0; +} + +int proc_get_int_logs(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + + DBG_871X_SEL_NL(m, + "all=%d\n" + "err=%d\n" + "tbdok=%d\n" + "tbder=%d\n" + "bcnderr=%d\n" + "bcndma=%d\n" + "bcndma_e=%d\n" + "rx=%d\n" + "rx_rdu=%d\n" + "rx_fovw=%d\n" + "txfovw=%d\n" + "mgntok=%d\n" + "highdok=%d\n" + "bkdok=%d\n" + "bedok=%d\n" + "vidok=%d\n" + "vodok=%d\n", + padapter->int_logs.all, + padapter->int_logs.err, + padapter->int_logs.tbdok, + padapter->int_logs.tbder, + padapter->int_logs.bcnderr, + padapter->int_logs.bcndma, + padapter->int_logs.bcndma_e, + padapter->int_logs.rx, + padapter->int_logs.rx_rdu, + padapter->int_logs.rx_fovw, + padapter->int_logs.txfovw, + padapter->int_logs.mgntok, + padapter->int_logs.highdok, + padapter->int_logs.bkdok, + padapter->int_logs.bedok, + padapter->int_logs.vidok, + padapter->int_logs.vodok + ); + + return 0; +} + +#endif // CONFIG_DBG_COUNTER + int proc_get_rx_signal(struct seq_file *m, void *v) { struct net_device *dev = m->private; @@ -705,7 +997,7 @@ int proc_get_rx_signal(struct seq_file *m, void *v) //DBG_871X_SEL_NL(m, "rxpwdb:%d\n", padapter->recvpriv.rxpwdb); DBG_871X_SEL_NL(m, "signal_strength:%u\n", padapter->recvpriv.signal_strength); DBG_871X_SEL_NL(m, "signal_qual:%u\n", padapter->recvpriv.signal_qual); - DBG_871X_SEL_NL(m, "noise:%u\n", padapter->recvpriv.noise); + DBG_871X_SEL_NL(m, "noise:%d\n", padapter->recvpriv.noise); rtw_odm_get_perpkt_rssi(m,padapter); #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA rtw_get_raw_rssi_info(m,padapter); @@ -1114,6 +1406,11 @@ int proc_get_all_sta_info(struct seq_file *m, void *v) DBG_871X_SEL_NL(m, "agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap); #endif //CONFIG_80211N_HT DBG_871X_SEL_NL(m, "sleepq_len=%d\n", psta->sleepq_len); + DBG_871X_SEL_NL(m, "sta_xmitpriv.vo_q_qcnt=%d\n", psta->sta_xmitpriv.vo_q.qcnt); + DBG_871X_SEL_NL(m, "sta_xmitpriv.vi_q_qcnt=%d\n", psta->sta_xmitpriv.vi_q.qcnt); + DBG_871X_SEL_NL(m, "sta_xmitpriv.be_q_qcnt=%d\n", psta->sta_xmitpriv.be_q.qcnt); + DBG_871X_SEL_NL(m, "sta_xmitpriv.bk_q_qcnt=%d\n", psta->sta_xmitpriv.bk_q.qcnt); + DBG_871X_SEL_NL(m, "capability=0x%x\n", psta->capability); DBG_871X_SEL_NL(m, "flags=0x%x\n", psta->flags); DBG_871X_SEL_NL(m, "wpa_psk=0x%x\n", psta->wpa_psk); @@ -1386,5 +1683,91 @@ ssize_t proc_set_sreset(struct file *file, const char __user *buffer, size_t cou } #endif /* DBG_CONFIG_ERROR_DETECT */ +#ifdef CONFIG_PCI_HCI + +int proc_get_rx_ring(struct seq_file *m, void *v) +{ + _irqL irqL; + struct net_device *dev = m->private; + _adapter *padapter = (_adapter *) rtw_netdev_priv(dev); + struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); + struct recv_priv *precvpriv = &padapter->recvpriv; + struct rtw_rx_ring *rx_ring = &precvpriv->rx_ring[RX_MPDU_QUEUE]; + int i, j; + + DBG_871X_SEL_NL(m, "rx ring (%p)\n", rx_ring); + DBG_871X_SEL_NL(m, " dma: 0x%08x\n", (int) rx_ring->dma); + DBG_871X_SEL_NL(m, " idx: %d\n", rx_ring->idx); + + _enter_critical(&pdvobjpriv->irq_th_lock, &irqL); + for (i=0; irxringcount; i++) + { + struct recv_stat *entry = &rx_ring->desc[i]; + struct sk_buff *skb = rx_ring->rx_buf[i]; + + DBG_871X_SEL_NL(m, " desc[%03d]: %p, rx_buf[%03d]: 0x%08x\n", + i, entry, i, cpu_to_le32(*((dma_addr_t *)skb->cb))); + + for (j=0; jirq_th_lock, &irqL); + + return 0; +} + +int proc_get_tx_ring(struct seq_file *m, void *v) +{ + _irqL irqL; + struct net_device *dev = m->private; + _adapter *padapter = (_adapter *) rtw_netdev_priv(dev); + struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + int i, j, k; + + _enter_critical(&pdvobjpriv->irq_th_lock, &irqL); + for (i = 0; i < PCI_MAX_TX_QUEUE_COUNT; i++) + { + struct rtw_tx_ring *tx_ring = &pxmitpriv->tx_ring[i]; + + DBG_871X_SEL_NL(m, "tx ring[%d] (%p)\n", i, tx_ring); + DBG_871X_SEL_NL(m, " dma: 0x%08x\n", (int) tx_ring->dma); + DBG_871X_SEL_NL(m, " idx: %d\n", tx_ring->idx); + DBG_871X_SEL_NL(m, " entries: %d\n", tx_ring->entries); +// DBG_871X_SEL_NL(m, " queue: %d\n", tx_ring->queue); + DBG_871X_SEL_NL(m, " qlen: %d\n", tx_ring->qlen); + + for (j=0; j < pxmitpriv->txringcount[i]; j++) + { + struct tx_desc *entry = &tx_ring->desc[j]; + + DBG_871X_SEL_NL(m, " desc[%03d]: %p\n", j, entry); + for (k=0; k < sizeof(*entry)/4; k++) + { + if ((k % 4) == 0) + DBG_871X_SEL_NL(m, " 0x%03x", k); + + DBG_871X_SEL_NL(m, " 0x%08x ", ((int *) entry)[k]); + + if ((k % 4) == 3) + DBG_871X_SEL_NL(m, "\n"); + } + } + } + _exit_critical(&pdvobjpriv->irq_th_lock, &irqL); + + return 0; +} + +#endif + #endif diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_eeprom.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_eeprom.c old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_ieee80211.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_ieee80211.c old mode 100644 new mode 100755 index 789d30fa4ec0..036b96bd0cfb --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_ieee80211.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_ieee80211.c @@ -1348,54 +1348,52 @@ u8 convert_ip_addr(u8 hch, u8 mch, u8 lch) } extern char* rtw_initmac; -#include +extern int rockchip_wifi_mac_addr(unsigned char *buf); void rtw_macaddr_cfg(u8 *mac_addr) { - u8 mac[ETH_ALEN]; - - if(mac_addr == NULL) return; + u8 mac[ETH_ALEN]; + if(mac_addr == NULL) return; + + if ( rtw_initmac ) + { // Users specify the mac address + int jj,kk; - if ( rtw_initmac ) - { // Users specify the mac address - int jj,kk; + for( jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3 ) + { + mac[jj] = key_2char2num(rtw_initmac[kk], rtw_initmac[kk+ 1]); + } + _rtw_memcpy(mac_addr, mac, ETH_ALEN); + } + else + { + printk("Wifi Efuse Mac => %02x:%02x:%02x:%02x:%02x:%02x\n", + mac_addr[0], mac_addr[1], mac_addr[2], mac_addr[3], mac_addr[4], mac_addr[5]); + if (!rockchip_wifi_mac_addr(mac_addr)) { + printk("Use flash MAC = %02x:%02x:%02x:%02x:%02x:%02x\n", + mac_addr[0], mac_addr[1], mac_addr[2], mac_addr[3], mac_addr[4], mac_addr[5]); + } else { + // Use the mac address stored in the Efuse + _rtw_memcpy(mac, mac_addr, ETH_ALEN); + } + } + + if (((mac[0]==0xff) &&(mac[1]==0xff) && (mac[2]==0xff) && + (mac[3]==0xff) && (mac[4]==0xff) &&(mac[5]==0xff)) || + ((mac[0]==0x0) && (mac[1]==0x0) && (mac[2]==0x0) && + (mac[3]==0x0) && (mac[4]==0x0) &&(mac[5]==0x0))) + { + mac[0] = 0x00; + mac[1] = 0xe0; + mac[2] = 0x4c; + mac[3] = 0x87; + mac[4] = 0x00; + mac[5] = 0x00; + // use default mac addresss + _rtw_memcpy(mac_addr, mac, ETH_ALEN); + DBG_871X("MAC Address from efuse error, assign default one !!!\n"); + } - for( jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3 ) - { - mac[jj] = key_2char2num(rtw_initmac[kk], rtw_initmac[kk+ 1]); - } - _rtw_memcpy(mac_addr, mac, ETH_ALEN); - } - else - { - printk("Wifi Efuse Mac => %02x:%02x:%02x:%02x:%02x:%02x\n", mac_addr[0], mac_addr[1], - mac_addr[2], mac_addr[3], mac_addr[4], mac_addr[5]); - if (!rockchip_wifi_mac_addr(mac)) { - printk("=========> get mac address from flash=[%02x:%02x:%02x:%02x:%02x:%02x]\n", mac[0], mac[1], - mac[2], mac[3], mac[4], mac[5]); - _rtw_memcpy(mac_addr, mac, ETH_ALEN); - } else { - // Use the mac address stored in the Efuse - _rtw_memcpy(mac, mac_addr, ETH_ALEN); - } - } - - if (((mac[0]==0xff) &&(mac[1]==0xff) && (mac[2]==0xff) && - (mac[3]==0xff) && (mac[4]==0xff) &&(mac[5]==0xff)) || - ((mac[0]==0x0) && (mac[1]==0x0) && (mac[2]==0x0) && - (mac[3]==0x0) && (mac[4]==0x0) &&(mac[5]==0x0))) - { - mac[0] = 0x00; - mac[1] = 0xe0; - mac[2] = 0x4c; - mac[3] = 0x87; - mac[4] = 0x00; - mac[5] = 0x00; - // use default mac addresss - _rtw_memcpy(mac_addr, mac, ETH_ALEN); - DBG_871X("MAC Address from efuse error, assign default one !!!\n"); - } - - DBG_871X("rtw_macaddr_cfg MAC Address = "MAC_FMT"\n", MAC_ARG(mac_addr)); + DBG_871X("rtw_macaddr_cfg MAC Address = "MAC_FMT"\n", MAC_ARG(mac_addr)); } void dump_ies(u8 *buf, u32 buf_len) diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_io.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_io.c old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_ioctl_query.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_ioctl_query.c old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_ioctl_rtl.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_ioctl_rtl.c old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_ioctl_set.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_ioctl_set.c old mode 100644 new mode 100755 index 255453b78ad5..59b88f4d5c10 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_ioctl_set.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_ioctl_set.c @@ -1254,11 +1254,11 @@ _func_enter_; //Set key to CAM through H2C command if(bgrouptkey)//never go to here { - res=rtw_setstakey_cmd(padapter, (unsigned char *)stainfo, _FALSE, _TRUE); + res=rtw_setstakey_cmd(padapter, stainfo, _FALSE, _TRUE); RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:rtw_setstakey_cmd(group)\n")); } else{ - res=rtw_setstakey_cmd(padapter, (unsigned char *)stainfo, _TRUE, _TRUE); + res=rtw_setstakey_cmd(padapter, stainfo, _TRUE, _TRUE); RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:rtw_setstakey_cmd(unicast)\n")); } diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_iol.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_iol.c old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_mem.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_mem.c new file mode 100755 index 000000000000..a4de3e61431f --- /dev/null +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_mem.c @@ -0,0 +1,103 @@ + +#include +#include + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("Realtek Wireless Lan Driver"); +MODULE_AUTHOR("Realtek Semiconductor Corp."); +MODULE_VERSION("DRIVERVERSION"); + +struct sk_buff_head rtk_skb_mem_q; +struct u8* rtk_buf_mem[NR_RECVBUFF]; + +struct u8 * rtw_get_buf_premem(int index) +{ + printk("%s, rtk_buf_mem index : %d\n", __func__, index); + return rtk_buf_mem[index]; +} + +struct sk_buff *rtw_alloc_skb_premem(void) +{ + struct sk_buff *skb = NULL; + + skb = skb_dequeue(&rtk_skb_mem_q); + + printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q)); + + return skb; +} +EXPORT_SYMBOL(rtw_alloc_skb_premem); + +int rtw_free_skb_premem(struct sk_buff *pskb) +{ + if(!pskb) + return -1; + + if(skb_queue_len(&rtk_skb_mem_q) >= NR_PREALLOC_RECV_SKB) + return -1; + + skb_queue_tail(&rtk_skb_mem_q, pskb); + + printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q)); + + return 0; +} +EXPORT_SYMBOL(rtw_free_skb_premem); + +static int __init rtw_mem_init(void) +{ + int i; + SIZE_PTR tmpaddr=0; + SIZE_PTR alignment=0; + struct sk_buff *pskb=NULL; + + printk("%s\n", __func__); + +#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX + for(i=0; idata; + alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1); + skb_reserve(pskb, (RECVBUFF_ALIGN_SZ - alignment)); + + skb_queue_tail(&rtk_skb_mem_q, pskb); + } + else + { + printk("%s, alloc skb memory fail!\n", __func__); + } + + pskb=NULL; + } + + printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q)); + + return 0; + +} + +static void __exit rtw_mem_exit(void) +{ + if (skb_queue_len(&rtk_skb_mem_q)) { + printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q)); + } + + skb_queue_purge(&rtk_skb_mem_q); + + printk("%s\n", __func__); +} + +module_init(rtw_mem_init); +module_exit(rtw_mem_exit); + diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_mlme.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_mlme.c old mode 100644 new mode 100755 index 276787246a00..df6dfc85ccdc --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_mlme.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_mlme.c @@ -25,13 +25,6 @@ extern void indicate_wx_scan_complete_event(_adapter *padapter); extern u8 rtw_do_join(_adapter * padapter); -#ifdef CONFIG_DISABLE_MCS13TO15 -extern unsigned char MCS_rate_2R_MCS13TO15_OFF[16]; -extern unsigned char MCS_rate_2R[16]; -#else //CONFIG_DISABLE_MCS13TO15 -extern unsigned char MCS_rate_2R[16]; -#endif //CONFIG_DISABLE_MCS13TO15 -extern unsigned char MCS_rate_1R[16]; sint _rtw_init_mlme_priv (_adapter* padapter) { @@ -540,15 +533,18 @@ void rtw_free_network(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork _func_enter_; RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_free_network==> ssid = %s \n\n" , pnetwork->network.Ssid.Ssid)); _rtw_free_network(pmlmepriv, pnetwork, is_freeall); -_func_exit_; +_func_exit_; } -void rtw_free_network_nolock(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork ); -void rtw_free_network_nolock(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork ) +void rtw_free_network_nolock(_adapter * padapter, struct wlan_network *pnetwork ); +void rtw_free_network_nolock(_adapter * padapter, struct wlan_network *pnetwork ) { _func_enter_; //RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_free_network==> ssid = %s \n\n" , pnetwork->network.Ssid.Ssid)); - _rtw_free_network_nolock(pmlmepriv, pnetwork); + _rtw_free_network_nolock(&(padapter->mlmepriv), pnetwork); +#ifdef CONFIG_IOCTL_CFG80211 + rtw_cfg80211_unlink_bss(padapter, pnetwork); +#endif //CONFIG_IOCTL_CFG80211 _func_exit_; } @@ -1565,7 +1561,7 @@ _func_enter_; if((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) && (adapter->stapriv.asoc_sta_count== 1)) /*||check_fwstate(pmlmepriv, WIFI_STATION_STATE)*/) { - rtw_free_network_nolock(pmlmepriv, pwlan); + rtw_free_network_nolock(adapter, pwlan); } if(lock_scanned_queue) @@ -1821,6 +1817,7 @@ static struct sta_info *rtw_joinbss_update_stainfo(_adapter *padapter, struct wl _rtw_memset((u8 *)&psta->dot11tkiptxmickey, 0, sizeof (union Keytype)); _rtw_memset((u8 *)&psta->dot11txpn, 0, sizeof (union pn48)); + psta->dot11txpn.val = psta->dot11txpn.val + 1; #ifdef CONFIG_IEEE80211W _rtw_memset((u8 *)&psta->dot11wtxpn, 0, sizeof (union pn48)); #endif //CONFIG_IEEE80211W @@ -2395,7 +2392,7 @@ _func_enter_; #ifdef CONFIG_RTL8711 //submit SetStaKey_cmd to tell fw, fw will allocate an CAM entry for this sta - rtw_setstakey_cmd(adapter, (unsigned char*)psta, _FALSE, _TRUE); + rtw_setstakey_cmd(adapter, psta, _FALSE, _TRUE); #endif exit: @@ -2496,7 +2493,7 @@ _func_enter_; pwlan = rtw_find_network(&pmlmepriv->scanned_queue, tgt_network->network.MacAddress); if (pwlan) { pwlan->fixed = _FALSE; - rtw_free_network_nolock(pmlmepriv, pwlan); + rtw_free_network_nolock(adapter, pwlan); } _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); @@ -2526,7 +2523,7 @@ _func_enter_; if(pwlan) { pwlan->fixed = _FALSE; - rtw_free_network_nolock(pmlmepriv, pwlan); + rtw_free_network_nolock(adapter, pwlan); } _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); //re-create ibss @@ -2720,6 +2717,8 @@ void rtw_scan_timeout_handler (_adapter *adapter) void rtw_mlme_reset_auto_scan_int(_adapter *adapter) { struct mlme_priv *mlme = &adapter->mlmepriv; + struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); #ifdef CONFIG_P2P if(!rtw_p2p_chk_state(&adapter->wdinfo, P2P_STATE_NONE)) { @@ -2727,8 +2726,11 @@ void rtw_mlme_reset_auto_scan_int(_adapter *adapter) goto exit; } #endif - - if(adapter->registrypriv.wifi_spec) { + if(pmlmeinfo->VHT_enable) //disable auto scan when connect to 11AC AP + { + mlme->auto_scan_int_ms = 0; + } + else if(adapter->registrypriv.wifi_spec && is_client_associated_to_ap(adapter) == _TRUE) { mlme->auto_scan_int_ms = 60*1000; #ifdef CONFIG_LAYER2_ROAMING } else if(rtw_chk_roam_flags(adapter, RTW_ROAM_ACTIVE)) { @@ -3845,6 +3847,7 @@ unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, ui struct registry_priv *pregistrypriv = &padapter->registrypriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct ht_priv *phtpriv = &pmlmepriv->htpriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; phtpriv->ht_option = _FALSE; @@ -3918,17 +3921,21 @@ unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, ui } } + //fill default supported_mcs_set + _rtw_memcpy(ht_capie.supp_mcs_set, pmlmeext->default_supported_mcs_set, 16); + + //update default supported_mcs_set rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); -#ifdef RTL8192C_RECONFIG_TO_1T1R - rf_type = RF_1T1R; -#endif - switch (rf_type) { + + switch(rf_type) + { case RF_1T1R: + if (stbc_rx_enable) ht_capie.cap_info |= IEEE80211_HT_CAP_RX_STBC_1R;//RX STBC One spatial stream - _rtw_memcpy(ht_capie.supp_mcs_set, MCS_rate_1R, 16); - break; + set_mcs_rate_by_mask(ht_capie.supp_mcs_set, MCS_RATE_1R); + break; case RF_2T2R: case RF_1T2R: @@ -3939,11 +3946,11 @@ unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, ui #ifdef CONFIG_DISABLE_MCS13TO15 if(((cbw40_enable == 1) && (operation_bw == CHANNEL_WIDTH_40)) && (pregistrypriv->wifi_spec!=1)) - _rtw_memcpy(ht_capie.supp_mcs_set, MCS_rate_2R_MCS13TO15_OFF, 16); + set_mcs_rate_by_mask(ht_capie.supp_mcs_set, MCS_RATE_2R_13TO15_OFF); else - _rtw_memcpy(ht_capie.supp_mcs_set, MCS_rate_2R, 16); + set_mcs_rate_by_mask(ht_capie.supp_mcs_set, MCS_RATE_2R); #else //CONFIG_DISABLE_MCS13TO15 - _rtw_memcpy(ht_capie.supp_mcs_set, MCS_rate_2R, 16); + set_mcs_rate_by_mask(ht_capie.supp_mcs_set, MCS_RATE_2R); #endif //CONFIG_DISABLE_MCS13TO15 break; } @@ -3970,7 +3977,12 @@ unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, ui #endif */ - rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor); + if(padapter->driver_rx_ampdu_factor != 0xFF) + max_rx_ampdu_factor = (HT_CAP_AMPDU_FACTOR)padapter->driver_rx_ampdu_factor; + else + rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor); + + //rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor); ht_capie.ampdu_params_info = (max_rx_ampdu_factor&0x03); if(padapter->securitypriv.dot11PrivacyAlgrthm == _AES_ ) @@ -4053,7 +4065,9 @@ void rtw_update_ht_cap(_adapter *padapter, u8 *pie, uint ie_len, u8 channel) { if(pregistrypriv->wifi_spec==1) { - phtpriv->ampdu_enable = _FALSE; + //remove this part because testbed AP should disable RX AMPDU + //phtpriv->ampdu_enable = _FALSE; + phtpriv->ampdu_enable = _TRUE; } else { @@ -4062,7 +4076,8 @@ void rtw_update_ht_cap(_adapter *padapter, u8 *pie, uint ie_len, u8 channel) } else if(pregistrypriv->ampdu_enable==2) { - phtpriv->ampdu_enable = _TRUE; + //remove this part because testbed AP should disable RX AMPDU + //phtpriv->ampdu_enable = _TRUE; } @@ -4105,34 +4120,31 @@ void rtw_update_ht_cap(_adapter *padapter, u8 *pie, uint ie_len, u8 channel) int i; u8 rf_type; - padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); + rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); - //update the MCS rates + //update the MCS set for (i = 0; i < 16; i++) + pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= pmlmeext->default_supported_mcs_set[i]; + + //update the MCS rates + switch(rf_type) { - if((rf_type == RF_1T1R) || (rf_type == RF_1T2R)) - { - pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; - } - else - { - #ifdef CONFIG_DISABLE_MCS13TO15 - if(pmlmeext->cur_bwmode == CHANNEL_WIDTH_40 && pregistrypriv->wifi_spec != 1 ) - { - pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_2R_MCS13TO15_OFF[i]; - } + case RF_1T1R: + case RF_1T2R: + set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_1R); + break; + case RF_2T2R: + default: +#ifdef CONFIG_DISABLE_MCS13TO15 + if(pmlmeext->cur_bwmode == CHANNEL_WIDTH_40 && pregistrypriv->wifi_spec != 1 ) + set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_2R_13TO15_OFF); else - pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_2R[i]; - #else - pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_2R[i]; - #endif //CONFIG_DISABLE_MCS13TO15 - } - #ifdef RTL8192C_RECONFIG_TO_1T1R - { - pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; - } - #endif + set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_2R); +#else //CONFIG_DISABLE_MCS13TO15 + set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_2R); +#endif //CONFIG_DISABLE_MCS13TO15 } + //switch to the 40M Hz mode accoring to the AP //pmlmeext->cur_bwmode = CHANNEL_WIDTH_40; switch ((pmlmeinfo->HT_info.infos[0] & 0x3)) diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_mlme_ext.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_mlme_ext.c old mode 100644 new mode 100755 index ab0859d521c8..4f50cb794295 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_mlme_ext.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_mlme_ext.c @@ -113,16 +113,6 @@ unsigned char RSN_TKIP_CIPHER[4] = {0x00, 0x0f, 0xac, 0x02}; extern unsigned char REALTEK_96B_IE[]; -/******************************************************** -MCS rate definitions -*********************************************************/ -#ifdef CONFIG_DISABLE_MCS13TO15 -unsigned char MCS_rate_2R_MCS13TO15_OFF[16] = {0xff, 0x1f, 0x0, 0x0, 0x01, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}; -unsigned char MCS_rate_2R[16] = {0xff, 0xff, 0x0, 0x0, 0x01, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}; -#else //CONFIG_DISABLE_MCS13TO15 -unsigned char MCS_rate_2R[16] = {0xff, 0xff, 0x0, 0x0, 0x01, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}; -#endif //CONFIG_DISABLE_MCS13TO15 -unsigned char MCS_rate_1R[16] = {0xff, 0x00, 0x0, 0x0, 0x01, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}; /******************************************************** ChannelPlan definitions @@ -345,18 +335,24 @@ int init_hw_mlme_ext(_adapter *padapter) return _SUCCESS; } -static void init_mlme_ext_priv_value(_adapter* padapter) +void init_mlme_default_rate_set(_adapter* padapter) { - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - -#ifdef CONFIG_TDLS - u8 i; -#endif + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - //unsigned char default_channel_set[MAX_CHANNEL_NUM] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 0, 0}; unsigned char mixed_datarate[NumRates] = {_1M_RATE_, _2M_RATE_, _5M_RATE_, _11M_RATE_, _6M_RATE_,_9M_RATE_, _12M_RATE_, _18M_RATE_, _24M_RATE_, _36M_RATE_, _48M_RATE_, _54M_RATE_, 0xff}; unsigned char mixed_basicrate[NumRates] ={_1M_RATE_, _2M_RATE_, _5M_RATE_, _11M_RATE_, _6M_RATE_, _12M_RATE_, _24M_RATE_, 0xff,}; + unsigned char supported_mcs_set[16] = {0xff, 0xff, 0x00, 0x00, 0x01, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}; + + _rtw_memcpy(pmlmeext->datarate, mixed_datarate, NumRates); + _rtw_memcpy(pmlmeext->basicrate, mixed_basicrate, NumRates); + + _rtw_memcpy(pmlmeext->default_supported_mcs_set, supported_mcs_set, sizeof(pmlmeext->default_supported_mcs_set)); +} + +static void init_mlme_ext_priv_value(_adapter* padapter) +{ + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ATOMIC_SET(&pmlmeext->event_seq, 0); pmlmeext->mgnt_seq = 0;//reset to zero when disconnect at client mode @@ -373,10 +369,7 @@ static void init_mlme_ext_priv_value(_adapter* padapter) pmlmeext->cur_wireless_mode = padapter->registrypriv.wireless_mode; - //_rtw_memcpy(pmlmeext->channel_set, DefaultChannelPlan[padapter->mlmepriv.ChannelPlan].Channel, DefaultChannelPlan[padapter->mlmepriv.ChannelPlan].Len); - //_rtw_memcpy(pmlmeext->channel_set, default_channel_set, MAX_CHANNEL_NUM); - _rtw_memcpy(pmlmeext->datarate, mixed_datarate, NumRates); - _rtw_memcpy(pmlmeext->basicrate, mixed_basicrate, NumRates); + init_mlme_default_rate_set(padapter); if(pmlmeext->cur_channel > 14) pmlmeext->tx_rate = IEEE80211_OFDM_RATE_6MB; @@ -487,14 +480,13 @@ static u8 init_channel_set(_adapter* padapter, u8 ChannelPlan, RT_CHANNEL_INFO * u8 b5GBand = _FALSE, b2_4GBand = _FALSE; u8 Index2G = 0, Index5G=0; - _rtw_memset(channel_set, 0, sizeof(RT_CHANNEL_INFO)*MAX_CHANNEL_NUM); - - if(ChannelPlan >= RT_CHANNEL_DOMAIN_MAX && ChannelPlan != RT_CHANNEL_DOMAIN_REALTEK_DEFINE) - { + if (!rtw_is_channel_plan_valid(ChannelPlan)) { DBG_871X("ChannelPlan ID %x error !!!!!\n",ChannelPlan); return chanset_size; } + _rtw_memset(channel_set, 0, sizeof(RT_CHANNEL_INFO)*MAX_CHANNEL_NUM); + if(IsSupported24G(padapter->registrypriv.wireless_mode)) { b2_4GBand = _TRUE; @@ -579,6 +571,8 @@ static u8 init_channel_set(_adapter* padapter, u8 ChannelPlan, RT_CHANNEL_INFO * } } + Hal_ChannelPlanToRegulation(padapter, ChannelPlan); + DBG_871X("%s ChannelPlan ID %x Chan num:%d \n",__FUNCTION__,ChannelPlan,chanset_size); return chanset_size; } @@ -2238,6 +2232,10 @@ unsigned int OnAssocReq(_adapter *padapter, union recv_frame *precv_frame) if (elems.vht_op_mode_notify && elems.vht_op_mode_notify_len == 1) { _rtw_memcpy(&pstat->vhtpriv.vht_op_mode_notify, elems.vht_op_mode_notify, 1); } + else // for Frame without Operating Mode notify ie; default: 80M + { + pstat->vhtpriv.vht_op_mode_notify = CHANNEL_WIDTH_80; + } } else { pstat->flags &= ~WLAN_STA_VHT; @@ -3185,7 +3183,7 @@ void issue_p2p_GO_request(_adapter *padapter, u8* raddr) // Value: // Todo the tie breaker bit. - p2pie[ p2pielen++ ] = ( ( pwdinfo->intent << 1 ) | BIT(0) ); + p2pie[ p2pielen++ ] = ( ( pwdinfo->intent << 1 ) & 0xFE ); // Configuration Timeout // Type: @@ -5820,8 +5818,7 @@ unsigned int on_action_public_p2p(union recv_frame *precv_frame) result = process_p2p_group_negotation_req( pwdinfo, frame_body, len ); issue_p2p_GO_response( padapter, GetAddr2Ptr(pframe), frame_body, len, result ); #ifdef CONFIG_INTEL_WIDI - if( (padapter->mlmepriv.widi_state == INTEL_WIDI_STATE_LISTEN) && (padapter->mlmepriv.widi_state != INTEL_WIDI_STATE_WFD_CONNECTION) ) - { + if (padapter->mlmepriv.widi_state == INTEL_WIDI_STATE_LISTEN) { padapter->mlmepriv.widi_state = INTEL_WIDI_STATE_WFD_CONNECTION; _cancel_timer_ex(&(padapter->mlmepriv.listen_timer)); intel_widi_wk_cmd(padapter, INTEL_WIDI_LISTEN_STOP_WK, NULL, 0); @@ -6070,8 +6067,7 @@ unsigned int on_action_public_p2p(union recv_frame *precv_frame) _set_timer( &pwdinfo->restore_p2p_state_timer, 3000 ); } #ifdef CONFIG_INTEL_WIDI - if( (padapter->mlmepriv.widi_state == INTEL_WIDI_STATE_LISTEN) && (padapter->mlmepriv.widi_state != INTEL_WIDI_STATE_WFD_CONNECTION) ) - { + if (padapter->mlmepriv.widi_state == INTEL_WIDI_STATE_LISTEN) { padapter->mlmepriv.widi_state = INTEL_WIDI_STATE_WFD_CONNECTION; _cancel_timer_ex(&(padapter->mlmepriv.listen_timer)); intel_widi_wk_cmd(padapter, INTEL_WIDI_LISTEN_STOP_WK, NULL, 0); @@ -6156,8 +6152,7 @@ unsigned int on_action_public_p2p(union recv_frame *precv_frame) rtw_p2p_set_state(pwdinfo, P2P_STATE_RX_PROVISION_DIS_REQ); _set_timer( &pwdinfo->restore_p2p_state_timer, P2P_PROVISION_TIMEOUT ); #ifdef CONFIG_INTEL_WIDI - if( (padapter->mlmepriv.widi_state == INTEL_WIDI_STATE_LISTEN) && (padapter->mlmepriv.widi_state != INTEL_WIDI_STATE_WFD_CONNECTION) ) - { + if (padapter->mlmepriv.widi_state == INTEL_WIDI_STATE_LISTEN) { padapter->mlmepriv.widi_state = INTEL_WIDI_STATE_WFD_CONNECTION; _cancel_timer_ex(&(padapter->mlmepriv.listen_timer)); intel_widi_wk_cmd(padapter, INTEL_WIDI_LISTEN_STOP_WK, NULL, 0); @@ -6389,10 +6384,7 @@ unsigned int OnAction_p2p(_adapter *padapter, union recv_frame *precv_frame) u8 *pframe = precv_frame->u.hdr.rx_data; uint len = precv_frame->u.hdr.len; struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); - - DBG_871X("%s\n", __FUNCTION__); - //check RA matches or not if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), GetAddr1Ptr(pframe), ETH_ALEN))//for if1, sta/ap mode return _SUCCESS; @@ -6734,7 +6726,11 @@ void issue_beacon(_adapter *padapter, int timeout_ms) //DBG_871X("%s\n", __FUNCTION__); +#ifdef CONFIG_BCN_ICF + if ((pmgntframe = rtw_alloc_bcnxmitframe(pxmitpriv)) == NULL) +#else if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) +#endif { DBG_871X("%s, alloc mgnt frame fail\n", __FUNCTION__); return; @@ -7847,6 +7843,7 @@ void issue_assocreq(_adapter *padapter) struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); int bssrate_len = 0, sta_bssrate_len = 0; + u8 vs_ie_length = 0; #ifdef CONFIG_P2P struct wifidirect_info *pwdinfo = &(padapter->wdinfo); u8 p2pie[ 255 ] = { 0x00 }; @@ -8033,17 +8030,18 @@ void issue_assocreq(_adapter *padapter) if ((_rtw_memcmp(pIE->data, RTW_WPA_OUI, 4)) || (_rtw_memcmp(pIE->data, WMM_OUI, 4)) || (_rtw_memcmp(pIE->data, WPS_OUI, 4))) - { - if(!padapter->registrypriv.wifi_spec) + { + vs_ie_length = pIE->Length; + if((!padapter->registrypriv.wifi_spec) && (_rtw_memcmp(pIE->data, WPS_OUI, 4))) { //Commented by Kurt 20110629 //In some older APs, WPS handshake //would be fail if we append vender extensions informations to AP - if(_rtw_memcmp(pIE->data, WPS_OUI, 4)){ - pIE->Length=14; - } + + vs_ie_length = 14; } - pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, pIE->Length, pIE->data, &(pattrib->pktlen)); + + pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, vs_ie_length, pIE->data, &(pattrib->pktlen)); } break; @@ -8870,6 +8868,7 @@ void issue_action_BA(_adapter *padapter, unsigned char *raddr, unsigned char act u16 BA_timeout_value; u16 BA_starting_seqctrl; HT_CAP_AMPDU_FACTOR max_rx_ampdu_factor; + u8 ba_rxbuf_sz; struct xmit_frame *pmgntframe; struct pkt_attrib *pattrib; u8 *pframe; @@ -8883,7 +8882,6 @@ void issue_action_BA(_adapter *padapter, unsigned char *raddr, unsigned char act struct registry_priv *pregpriv = &padapter->registrypriv; #ifdef CONFIG_80211N_HT - DBG_871X("%s, category=%d, action=%d, status=%d\n", __FUNCTION__, category, action, status); if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { @@ -8930,28 +8928,12 @@ void issue_action_BA(_adapter *padapter, unsigned char *raddr, unsigned char act } while (pmlmeinfo->dialogToken == 0); pframe = rtw_set_fixed_ie(pframe, 1, &(pmlmeinfo->dialogToken), &(pattrib->pktlen)); -#ifdef CONFIG_BT_COEXIST - if (rtw_btcoex_IsBTCoexCtrlAMPDUSize(padapter) == _TRUE) - { - // A-MSDU NOT Supported - BA_para_set = 0; - // immediate Block Ack - BA_para_set |= (1 << 1) & IEEE80211_ADDBA_PARAM_POLICY_MASK; - // TID - BA_para_set |= (status << 2) & IEEE80211_ADDBA_PARAM_TID_MASK; - // max buffer size is 8 MSDU - BA_para_set |= (8 << 6) & RTW_IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK; - } - else -#endif - { - #if defined(CONFIG_RTL8188E) && defined(CONFIG_SDIO_HCI) - BA_para_set = (0x0802 | ((status & 0xf) << 2)); //immediate ack & 16 buffer size - #else - BA_para_set = (0x1002 | ((status & 0xf) << 2)); //immediate ack & 64 buffer size - #endif - } - //sys_mib.BA_para_set = 0x0802; //immediate ack & 32 buffer size + #if defined(CONFIG_RTL8188E) && defined(CONFIG_SDIO_HCI) + BA_para_set = (0x0802 | ((status & 0xf) << 2)); //immediate ack & 16 buffer size + #else + BA_para_set = (0x1002 | ((status & 0xf) << 2)); //immediate ack & 64 buffer size + #endif + BA_para_set = cpu_to_le16(BA_para_set); pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_para_set)), &(pattrib->pktlen)); @@ -8974,49 +8956,56 @@ void issue_action_BA(_adapter *padapter, unsigned char *raddr, unsigned char act BA_starting_seqctrl = cpu_to_le16(BA_starting_seqctrl); pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_starting_seqctrl)), &(pattrib->pktlen)); + DBG_871X("%s, category=%d, action=%d, status=%d\n", __FUNCTION__, category, action, status); break; case 1: //ADDBA rsp pframe = rtw_set_fixed_ie(pframe, 1, &(pmlmeinfo->ADDBA_req.dialog_token), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&status), &(pattrib->pktlen)); - /* - //BA_para_set = cpu_to_le16((le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f) | 0x1000); //64 buffer size - #if defined(CONFIG_RTL8188E )&& defined (CONFIG_SDIO_HCI) - BA_para_set = ((le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f) | 0x0800); //32buffer size - #else - BA_para_set = ((le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f) | 0x1000); //64 buffer size - #endif - */ - rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor); + + BA_para_set = le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set); + + if(padapter->driver_rx_ampdu_factor != 0xFF) + max_rx_ampdu_factor = (HT_CAP_AMPDU_FACTOR)padapter->driver_rx_ampdu_factor; + else + rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor); + if(MAX_AMPDU_FACTOR_64K == max_rx_ampdu_factor) - BA_para_set = ((le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f) | 0x1000); //64 buffer size + ba_rxbuf_sz = 64; else if(MAX_AMPDU_FACTOR_32K == max_rx_ampdu_factor) - BA_para_set = ((le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f) | 0x0800); //32 buffer size + ba_rxbuf_sz = 32; else if(MAX_AMPDU_FACTOR_16K == max_rx_ampdu_factor) - BA_para_set = ((le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f) | 0x0400); //16 buffer size + ba_rxbuf_sz = 16; else if(MAX_AMPDU_FACTOR_8K == max_rx_ampdu_factor) - BA_para_set = ((le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f) | 0x0200); //8 buffer size + ba_rxbuf_sz = 8; else - BA_para_set = ((le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f) | 0x1000); //64 buffer size + ba_rxbuf_sz = 64; -#ifdef CONFIG_BT_COEXIST + #ifdef CONFIG_BT_COEXIST if (rtw_btcoex_IsBTCoexCtrlAMPDUSize(padapter) == _TRUE) - { - // max buffer size is 8 MSDU - BA_para_set &= ~RTW_IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK; - BA_para_set |= (8 << 6) & RTW_IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK; + ba_rxbuf_sz = rtw_btcoex_GetAMPDUSize(padapter); + #endif + + if (padapter->fix_ba_rxbuf_bz != 0xFF) + ba_rxbuf_sz = padapter->fix_ba_rxbuf_bz; + + ba_rxbuf_sz &= 0x03ff; + + BA_para_set &= ~RTW_IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK; + BA_para_set |= (ba_rxbuf_sz << 6) & RTW_IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK; + + if (!padapter->registrypriv.wifi_spec) { + if(pregpriv->ampdu_amsdu==0)//disabled + BA_para_set &= ~BIT(0); + else if(pregpriv->ampdu_amsdu==1)//enabled + BA_para_set |= BIT(0); } -#endif - if(pregpriv->ampdu_amsdu==0)//disabled - BA_para_set = cpu_to_le16(BA_para_set & ~BIT(0)); - else if(pregpriv->ampdu_amsdu==1)//enabled - BA_para_set = cpu_to_le16(BA_para_set | BIT(0)); - else //auto - BA_para_set = cpu_to_le16(BA_para_set); - + BA_para_set = cpu_to_le16(BA_para_set); + pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_para_set)), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(pmlmeinfo->ADDBA_req.BA_timeout_value)), &(pattrib->pktlen)); + DBG_871X("%s, category=%d, action=%d, status=%d, rxbuf_sz=%u\n", __FUNCTION__, category, action, status, ba_rxbuf_sz); break; case 2://DELBA BA_para_set = (status & 0x1F) << 3; @@ -9026,6 +9015,7 @@ void issue_action_BA(_adapter *padapter, unsigned char *raddr, unsigned char act reason_code = 37;//Requested from peer STA as it does not want to use the mechanism reason_code = cpu_to_le16(reason_code); pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(reason_code)), &(pattrib->pktlen)); + DBG_871X("%s, category=%d, action=%d, status=%d\n", __FUNCTION__, category, action, status); break; default: break; @@ -9348,6 +9338,7 @@ void site_survey(_adapter *padapter) struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); u32 initialgain = 0; + u32 channel_scan_time_ms = 0,val32 = 0; #ifdef CONFIG_P2P @@ -9522,28 +9513,43 @@ void site_survey(_adapter *padapter) } } } + #if defined(CONFIG_ATMEL_RC_PATCH) // treat wlan0 & p2p0 in same way, may be changed in near feature. // assume home channel is 6, channel switch sequence will be // 1,2-6-3,4-6-5,6-6-7,8-6-9,10-6-11,12-6-13,14 //if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)==_TRUE) - if( stay_buddy_ch == 1 ) - set_survey_timer(pmlmeext, pmlmeext->chan_scan_time * RTW_STAY_AP_CH_MILLISECOND ); + if( stay_buddy_ch == 1 ){ + channel_scan_time_ms = pmlmeext->chan_scan_time * RTW_STAY_AP_CH_MILLISECOND; + } else { if( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) - set_survey_timer(pmlmeext, 20); + channel_scan_time_ms = 20; else - set_survey_timer(pmlmeext, 40); + channel_scan_time_ms = 40 } #elif defined(CONFIG_STA_MODE_SCAN_UNDER_AP_MODE) if( stay_buddy_ch == 1 ) - set_survey_timer(pmlmeext, pmlmeext->chan_scan_time * RTW_STAY_AP_CH_MILLISECOND ); - else - set_survey_timer(pmlmeext, pmlmeext->chan_scan_time); + channel_scan_time_ms = pmlmeext->chan_scan_time * RTW_STAY_AP_CH_MILLISECOND ; + else + channel_scan_time_ms = pmlmeext->chan_scan_time; #else - set_survey_timer(pmlmeext, pmlmeext->chan_scan_time); + channel_scan_time_ms = pmlmeext->chan_scan_time; +#endif + + set_survey_timer(pmlmeext, channel_scan_time_ms); +#if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR) + { + struct noise_info info; + info.bPauseDIG = _FALSE; + info.IGIValue = 0; + info.max_time = channel_scan_time_ms/2;//ms + info.chan = survey_channel; + rtw_hal_set_odm_var(padapter, HAL_ODM_NOISE_MONITOR,&info, _FALSE); + } #endif + } else { @@ -10957,6 +10963,8 @@ void update_sta_info(_adapter *padapter, struct sta_info *psta) psta->htpriv.ampdu_enable = pmlmepriv->htpriv.ampdu_enable; + psta->htpriv.rx_ampdu_min_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para&IEEE80211_HT_CAP_AMPDU_DENSITY)>>2; + if (support_short_GI(padapter, &(pmlmeinfo->HT_caps), CHANNEL_WIDTH_20)) psta->htpriv.sgi_20m = _TRUE; @@ -11016,10 +11024,27 @@ static void rtw_mlmeext_disconnect(_adapter *padapter) struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network)); u8 state_backup = (pmlmeinfo->state&0x03); //set_opmode_cmd(padapter, infra_client_with_mlme); +#if 1 + /* + * For safety, prevent from keeping macid sleep. + * If we can sure all power mode enter/leave are paired, + * this check can be removed. + * Lucas@20131113 + */ + /* wakeup macid after disconnect. */ + { + struct sta_info *psta; + psta = rtw_get_stainfo(&padapter->stapriv, get_my_bssid(pnetwork)); + if (psta) + rtw_hal_macid_wakeup(padapter, psta->mac_id); + } +#endif + rtw_hal_set_hwreg(padapter, HW_VAR_MLME_DISCONNECT, 0); rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, null_addr); @@ -11157,6 +11182,10 @@ void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res) set_sta_rate(padapter, psta); rtw_sta_media_status_rpt(padapter, psta, 1); + + /* wakeup macid after join bss successfully to ensure + the subsequent data frames can be sent out normally */ + rtw_hal_macid_wakeup(padapter, psta->mac_id); } if (rtw_port_switch_chk(padapter) == _TRUE) @@ -12142,48 +12171,6 @@ u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf) //u32 acparm; u8 ch, bw, offset; -#if 1 - /* - * For safety, prevent from keeping macid sleep. - * If we can sure all power mode enter/leave are paired, - * this check can be removed. - * Lucas@20131113 - */ - { - struct sta_info *psta; - psta = rtw_get_stainfo(&padapter->stapriv, get_my_bssid(pnetwork)); - if (psta) - rtw_hal_macid_wakeup(padapter, psta->mac_id); - } -#endif - -#ifdef CONFIG_BT_COEXIST -{ - static u8 bw_mode = 0; - - if (0 == bw_mode) - { - bw_mode = pregpriv->bw_mode; // keep original bw_mode - DBG_871X(FUNC_ADPT_FMT ": [BTCOEX] Save bw_mode(0x%02x)\n", - FUNC_ADPT_ARG(padapter), pregpriv->bw_mode); - } - - if ((rtw_btcoex_1Ant(padapter) == _TRUE) - && (rtw_btcoex_IsBtLinkExist(padapter) == _TRUE)) - { - pregpriv->bw_mode = 0x00; - DBG_871X(FUNC_ADPT_FMT ": [BTCOEX] Change bw_mode to 20MHz(0x%02x)\n", - FUNC_ADPT_ARG(padapter), pregpriv->bw_mode); - } - else - { - pregpriv->bw_mode = bw_mode; - DBG_871X(FUNC_ADPT_FMT ": [BTCOEX] Restore bw_mode(0x%02x)\n", - FUNC_ADPT_ARG(padapter), pregpriv->bw_mode); - } -} -#endif // CONFIG_BT_COEXIST - //check already connecting to AP or not if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) { @@ -12399,22 +12386,6 @@ u8 disconnect_hdl(_adapter *padapter, unsigned char *pbuf) WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network)); u8 val8; - -#if 1 - /* - * For safety, prevent from keeping macid sleep. - * If we can sure all power mode enter/leave are paired, - * this check can be removed. - * Lucas@20131113 - */ - { - struct sta_info *psta; - psta = rtw_get_stainfo(&padapter->stapriv, get_my_bssid(pnetwork)); - if (psta) - rtw_hal_macid_wakeup(padapter, psta->mac_id); - } -#endif - if (is_client_associated_to_ap(padapter)) { #ifdef CONFIG_DFS @@ -12714,23 +12685,38 @@ u8 setauth_hdl(_adapter *padapter, unsigned char *pbuf) u8 setkey_hdl(_adapter *padapter, u8 *pbuf) { - unsigned short ctrl; + u16 ctrl = 0; + s16 cam_id = 0; struct setkey_parm *pparm = (struct setkey_parm *)pbuf; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - unsigned char null_sta[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; + unsigned char null_addr[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; + u8 *addr; //main tx key for wep. if(pparm->set_tx) pmlmeinfo->key_index = pparm->keyid; - - //write cam - ctrl = BIT(15) | ((pparm->algorithm) << 2) | pparm->keyid; - DBG_871X_LEVEL(_drv_always_, "set group key to hw: alg:%d(WEP40-1 WEP104-5 TKIP-2 AES-4) " - "keyid:%d\n", pparm->algorithm, pparm->keyid); - write_cam(padapter, pparm->keyid, ctrl, null_sta, pparm->key); - + cam_id = rtw_camid_alloc(padapter, NULL, pparm->keyid); + + if (cam_id < 0){ + } else { + if (cam_id > 3) /* not default key, searched by A2 */ + addr = get_bssid(&padapter->mlmepriv); + else + addr = null_addr; + + ctrl = BIT(15) | BIT6 |((pparm->algorithm) << 2) | pparm->keyid; + write_cam(padapter, cam_id, ctrl, addr, pparm->key); + DBG_871X_LEVEL(_drv_always_, "set group key camid:%d, addr:"MAC_FMT", kid:%d, type:%s\n" + ,cam_id, MAC_ARG(addr), pparm->keyid, security_type_str(pparm->algorithm)); + } + + #ifdef DYNAMIC_CAMID_ALLOC + if (cam_id >=0 && cam_id <=3) + rtw_hal_set_hwreg(padapter, HW_VAR_SEC_DK_CFG, (u8*)_TRUE); + #endif + //allow multicast packets to driver padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_ON_RCR_AM, null_addr); @@ -12739,8 +12725,8 @@ u8 setkey_hdl(_adapter *padapter, u8 *pbuf) u8 set_stakey_hdl(_adapter *padapter, u8 *pbuf) { - u16 ctrl=0; - u8 cam_id = 0;//cam_entry + u16 ctrl = 0; + s16 cam_id = 0; u8 ret = H2C_SUCCESS; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); @@ -12751,82 +12737,38 @@ u8 set_stakey_hdl(_adapter *padapter, u8 *pbuf) struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; #endif //CONFIG_TDLS - //cam_entry: - //0~3 for default key - - //for concurrent mode (ap+sta, sta+sta): - //default key is disable, using sw encrypt/decrypt - //camid 0, 1, 2, 3 is default entry for default key/group key - //macid = 1 is for bc/mc stainfo, no mapping to camid - //macid = 0 mapping to camid 4 - //for macid >=2, camid = macid+3; - + if(pparm->algorithm == _NO_PRIVACY_) + goto write_to_cam; - if(pparm->algorithm == _NO_PRIVACY_) // clear cam entry - { - clear_cam_entry(padapter, pparm->id); - ret = H2C_SUCCESS; - goto exit_set_stakey_hdl; + psta = rtw_get_stainfo(pstapriv, pparm->addr); + if (!psta) { + DBG_871X_LEVEL(_drv_always_, "%s sta:"MAC_FMT" not found\n", __func__, MAC_ARG(pparm->addr)); + ret = H2C_REJECTED; + goto exit; } - if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) - { - psta = rtw_get_stainfo(pstapriv, pparm->addr); - if(psta) - { - ctrl = (BIT(15) | ((pparm->algorithm) << 2)); - - DBG_871X("r871x_set_stakey_hdl(): enc_algorithm=%d\n", pparm->algorithm); - - if((psta->mac_id == 1) || (psta->mac_id>(NUM_STA-4))) - { - DBG_871X("r871x_set_stakey_hdl():set_stakey failed, mac_id(aid)=%d\n", psta->mac_id); - ret = H2C_REJECTED; - goto exit_set_stakey_hdl; - } - - cam_id = (u8)rtw_get_camid(psta->mac_id);//0~3 for default key, cmd_id=macid + 3; - - DBG_871X("Write CAM, mac_addr=%x:%x:%x:%x:%x:%x, cam_entry=%d\n", pparm->addr[0], - pparm->addr[1], pparm->addr[2], pparm->addr[3], pparm->addr[4], - pparm->addr[5], cam_id); - - write_cam(padapter, cam_id, ctrl, pparm->addr, pparm->key); - - ret = H2C_SUCCESS_RSP; - goto exit_set_stakey_hdl; + pmlmeinfo->enc_algo = pparm->algorithm; + cam_id = rtw_camid_alloc(padapter, psta, 0); + if (cam_id < 0) + goto exit; +write_to_cam: + if(pparm->algorithm == _NO_PRIVACY_) { + while((cam_id = rtw_camid_search(padapter, pparm->addr, -1)) >= 0) { + DBG_871X_LEVEL(_drv_always_, "clear key for addr:"MAC_FMT", camid:%d\n", MAC_ARG(pparm->addr), cam_id); + clear_cam_entry(padapter, cam_id); + rtw_camid_free(padapter,cam_id); } - else - { - DBG_871X("r871x_set_stakey_hdl(): sta has been free\n"); - ret = H2C_REJECTED; - goto exit_set_stakey_hdl; - } - - } - - - //below for sta mode - if((psta = rtw_get_stainfo(pstapriv, pparm->addr))) - { - cam_id = (u8)rtw_get_camid(psta->mac_id); + } else { + DBG_871X_LEVEL(_drv_always_, "set pairwise key camid:%d, addr:"MAC_FMT", kid:%d, type:%s\n", + cam_id, MAC_ARG(pparm->addr), pparm->keyid, security_type_str(pparm->algorithm)); + ctrl = BIT(15) | ((pparm->algorithm) << 2) | pparm->keyid; + write_cam(padapter, cam_id, ctrl, pparm->addr, pparm->key); } - else - cam_id = 4; - - ctrl = BIT(15) | ((pparm->algorithm) << 2); - pmlmeinfo->enc_algo = pparm->algorithm; - - DBG_871X_LEVEL(_drv_always_, "set pairwise key to hw: alg:%d(WEP40-1 WEP104-5 TKIP-2 AES-4) camid:%d\n", - pparm->algorithm, cam_id); - - write_cam(padapter, cam_id, ctrl, pparm->addr, pparm->key); - -exit_set_stakey_hdl: + ret = H2C_SUCCESS_RSP; +exit: return ret; - } u8 add_ba_hdl(_adapter *padapter, unsigned char *pbuf) @@ -13059,7 +13001,8 @@ u8 chk_bmc_sleepq_hdl(_adapter *padapter, unsigned char *pbuf) pxmitframe->attrib.triggered=1; - pxmitframe->attrib.qsel = 0x11;//HIQ + if (xmitframe_hiq_filter(pxmitframe) == _TRUE) + pxmitframe->attrib.qsel = 0x11;//HIQ #if 0 _exit_critical_bh(&psta_bmc->sleep_q.lock, &irqL); @@ -13075,10 +13018,10 @@ u8 chk_bmc_sleepq_hdl(_adapter *padapter, unsigned char *pbuf) //_exit_critical_bh(&psta_bmc->sleep_q.lock, &irqL); _exit_critical_bh(&pxmitpriv->lock, &irqL); - //#if defined(CONFIG_PCI_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) - #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) - rtw_chk_hi_queue_cmd(padapter); - #endif + if (padapter->interface_type != RTW_PCIE) { + /* check hi queue and bmc_sleepq */ + rtw_chk_hi_queue_cmd(padapter); + } } #endif @@ -14259,14 +14202,20 @@ u8 set_ch_hdl(_adapter *padapter, u8 *pbuf) u8 set_chplan_hdl(_adapter *padapter, unsigned char *pbuf) { struct SetChannelPlan_param *setChannelPlan_param; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_priv *mlme = &padapter->mlmepriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; if(!pbuf) return H2C_PARAMETERS_ERROR; setChannelPlan_param = (struct SetChannelPlan_param *)pbuf; + if(!rtw_is_channel_plan_valid(setChannelPlan_param->channel_plan)) { + return H2C_PARAMETERS_ERROR; + } + + mlme->ChannelPlan = setChannelPlan_param->channel_plan; + pmlmeext->max_chan_nums = init_channel_set(padapter, setChannelPlan_param->channel_plan, pmlmeext->channel_set); init_channel_list(padapter, pmlmeext->channel_set, pmlmeext->max_chan_nums, &pmlmeext->channel_list); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_mp.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_mp.c old mode 100644 new mode 100755 index 91372d0baff0..3db2a2c8bfce --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_mp.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_mp.c @@ -292,7 +292,7 @@ s32 init_mp_priv(PADAPTER padapter) pmppriv->tx.stop = 1; pmppriv->bSetTxPower=0; //for manually set tx power pmppriv->bTxBufCkFail=_FALSE; - pmppriv->pktInterval=300; + pmppriv->pktInterval=1; mp_init_xmit_attrib(&pmppriv->tx, padapter); @@ -550,7 +550,7 @@ MPT_InitializeAdapter( PHY_LCCalibrate(pAdapter); PHY_IQCalibrate(pAdapter, _FALSE); - dm_CheckTXPowerTracking(&pHalData->odmpriv); //trigger thermal meter + //dm_CheckTXPowerTracking(&pHalData->odmpriv); //trigger thermal meter PHY_SetRFPathSwitch(pAdapter, 1/*pHalData->bDefaultAntenna*/); //default use Main @@ -560,15 +560,14 @@ MPT_InitializeAdapter( #ifdef CONFIG_RTL8188E pMptCtx->backup0x52_RF_A = (u1Byte)PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0); pMptCtx->backup0x52_RF_B = (u1Byte)PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0); + rtw_write32(pAdapter, REG_MACID_NO_LINK_0, 0x0); + rtw_write32(pAdapter, REG_MACID_NO_LINK_1, 0x0); #endif //set ant to wifi side in mp mode rtw_write16(pAdapter, 0x870, 0x300); rtw_write16(pAdapter, 0x860, 0x110); - if (pAdapter->registrypriv.mp_mode == 1) - pmlmepriv->fw_state = WIFI_MP_STATE; - return rtStatus; } @@ -679,9 +678,9 @@ static void disable_dm(PADAPTER padapter) #endif Switch_DM_Func(padapter, DYNAMIC_RF_CALIBRATION, _TRUE); -#ifdef CONFIG_BT_COEXIST - rtw_btcoex_Switch(padapter, 0); -#endif +//#ifdef CONFIG_BT_COEXIST +// rtw_btcoex_Switch(padapter, 0); //remove for BT MP Down. +//#endif } @@ -691,7 +690,6 @@ void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart) struct dm_priv *pdmpriv = &pHalData->dmpriv; PDM_ODM_T pDM_Odm = &pHalData->odmpriv; - //Switch_DM_Func(padapter, DYNAMIC_RF_CALIBRATION, bstart); if (bstart==1){ DBG_871X("in MPT_PwrCtlDM start \n"); Switch_DM_Func(padapter, DYNAMIC_RF_TX_PWR_TRACK, _TRUE); @@ -700,6 +698,9 @@ void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart) pdmpriv->TxPowerTrackControl = _TRUE; pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _TRUE; padapter->mppriv.mp_dm =1; + odm_TXPowerTrackingInit(pDM_Odm); + ODM_ClearTxPowerTrackingState(pDM_Odm); + }else{ DBG_871X("in MPT_PwrCtlDM stop \n"); disable_dm(padapter); @@ -707,6 +708,15 @@ void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart) pdmpriv->TxPowerTrackControl = _FALSE; pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _FALSE; padapter->mppriv.mp_dm = 0; + { + TXPWRTRACK_CFG c; + u1Byte chnl =0 ; + + ConfigureTxpowerTrack(pDM_Odm, &c); + ODM_ClearTxPowerTrackingState(pDM_Odm); + (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, ODM_RF_PATH_A, chnl); + (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, ODM_RF_PATH_B, chnl); + } } } @@ -724,9 +734,7 @@ u32 mp_join(PADAPTER padapter,u8 mode) struct mp_priv *pmppriv = &padapter->mppriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct wlan_network *tgt_network = &pmlmepriv->cur_network; - _adapter *pbuddyadapter = padapter->pbuddy_adapter; - struct mlme_priv *pbuddymlmepriv = &pbuddyadapter->mlmepriv; - + // 1. initialize a new WLAN_BSSID_EX _rtw_memset(&bssid, 0, sizeof(WLAN_BSSID_EX)); DBG_8192C("%s ,pmppriv->network_macaddr=%x %x %x %x %x %x \n",__func__, @@ -757,21 +765,18 @@ u32 mp_join(PADAPTER padapter,u8 mode) _enter_critical_bh(&pmlmepriv->lock, &irqL); - //if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) - // goto end_of_mp_start_test; -#if 0 + if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) + goto end_of_mp_start_test; + //init mp_start_test status if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { - rtw_disassoc_cmd(padapter, 0, _TRUE); + rtw_disassoc_cmd(padapter, 500, _TRUE); rtw_indicate_disconnect(padapter); rtw_free_assoc_resources(padapter, 1); } - rtw_msleep_os(500); - pmppriv->prev_fw_state = get_fwstate(pmlmepriv); - if (padapter->registrypriv.mp_mode == 1) - pmlmepriv->fw_state = WIFI_MP_STATE; - + pmlmepriv->fw_state = WIFI_MP_STATE; +#if 0 if (pmppriv->mode == _LOOPBOOK_MODE_) { set_fwstate(pmlmepriv, WIFI_MP_LPBK_STATE); //append txdesc RT_TRACE(_module_mp_, _drv_notice_, ("+start mp in Lookback mode\n")); @@ -779,17 +784,8 @@ u32 mp_join(PADAPTER padapter,u8 mode) RT_TRACE(_module_mp_, _drv_notice_, ("+start mp in normal mode\n")); } #endif - _clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY); - _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); - _clr_fwstate_(pmlmepriv, _FW_LINKED); - _clr_fwstate_(pbuddymlmepriv, _FW_UNDER_SURVEY); - _clr_fwstate_(pbuddymlmepriv, _FW_UNDER_LINKING); - _clr_fwstate_(pbuddymlmepriv, _FW_LINKED); - set_fwstate(pmlmepriv, _FW_UNDER_LINKING); - set_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE); - #if 1 //3 2. create a new psta for mp driver //clear psta in the cur_network, if any psta = rtw_get_stainfo(&padapter->stapriv, tgt_network->network.MacAddress); @@ -802,7 +798,7 @@ u32 mp_join(PADAPTER padapter,u8 mode) res = _FAIL; goto end_of_mp_start_test; } - #endif + set_fwstate(pmlmepriv,WIFI_ADHOC_MASTER_STATE); //3 3. join psudo AdHoc tgt_network->join_res = 1; tgt_network->aid = psta->aid = 1; @@ -810,31 +806,32 @@ u32 mp_join(PADAPTER padapter,u8 mode) rtw_indicate_connect(padapter); _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); + set_fwstate(pmlmepriv,_FW_LINKED); end_of_mp_start_test: _exit_critical_bh(&pmlmepriv->lock, &irqL); - if(1) //(res == _SUCCESS) + if(1) //(res == _SUCCESS) { // set MSR to WIFI_FW_ADHOC_STATE - if( mode==WIFI_FW_ADHOC_STATE ){ + if( mode==WIFI_FW_ADHOC_STATE ){ - val8 = rtw_read8(padapter, MSR) & 0xFC; // 0x0102 - val8 |= WIFI_FW_ADHOC_STATE; - rtw_write8(padapter, MSR, val8); // Link in ad hoc network - } - else { - Set_MSR(padapter, WIFI_FW_STATION_STATE); + val8 = rtw_read8(padapter, MSR) & 0xFC; // 0x0102 + val8 |= WIFI_FW_ADHOC_STATE; + rtw_write8(padapter, MSR, val8); // Link in ad hoc network + } + else { + Set_MSR(padapter, WIFI_FW_STATION_STATE); - DBG_8192C("%s , pmppriv->network_macaddr =%x %x %x %x %x %x\n",__func__, - pmppriv->network_macaddr[0],pmppriv->network_macaddr[1],pmppriv->network_macaddr[2],pmppriv->network_macaddr[3],pmppriv->network_macaddr[4],pmppriv->network_macaddr[5]); + DBG_8192C("%s , pmppriv->network_macaddr =%x %x %x %x %x %x\n",__func__, + pmppriv->network_macaddr[0],pmppriv->network_macaddr[1],pmppriv->network_macaddr[2],pmppriv->network_macaddr[3],pmppriv->network_macaddr[4],pmppriv->network_macaddr[5]); - rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmppriv->network_macaddr); - } + rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmppriv->network_macaddr); } - pmlmepriv->fw_state = WIFI_MP_STATE; - return res; + } + + return res; } //This function initializes the DUT to the MP test mode s32 mp_start_test(PADAPTER padapter) @@ -1280,7 +1277,7 @@ static thread_return mp_xmit_packet_thread(thread_context context) _rtw_memcpy(&(pxmitframe->attrib), &(pmptx->attrib), sizeof(struct pkt_attrib)); - rtw_udelay_os(padapter->mppriv.pktInterval); + rtw_usleep_os(padapter->mppriv.pktInterval); dump_mpframe(padapter, pxmitframe); pmptx->sended++; @@ -1361,7 +1358,7 @@ void fill_tx_desc_8188e(PADAPTER padapter) u32 pkt_size = pattrib->last_txcmdsz; s32 bmcast = IS_MCAST(pattrib->ra); // offset 0 -#if !defined(CONFIG_RTL8188E_SDIO) +#if !defined(CONFIG_RTL8188E_SDIO) && !defined(CONFIG_PCI_HCI) desc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); desc->txdw0 |= cpu_to_le32(pkt_size & 0x0000FFFF); // packet size desc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) & 0x00FF0000); //32 bytes for TX Desc @@ -1514,45 +1511,45 @@ void fill_tx_desc_8723b(PADAPTER padapter) struct mp_priv *pmp_priv = &padapter->mppriv; struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib); - PTXDESC_8723B ptxdesc = (PTXDESC_8723B)&(pmp_priv->tx.desc); - u8 descRate; - - ptxdesc->bk = 1; - ptxdesc->macid = pattrib->mac_id; - ptxdesc->qsel = pattrib->qsel; + u8 *ptxdesc = pmp_priv->tx.desc; - ptxdesc->rate_id = pattrib->raid; - ptxdesc->seq = pattrib->seqnum; - ptxdesc->en_hwseq = 1; - ptxdesc->userate = 1; - ptxdesc->disdatafb = 1; + SET_TX_DESC_AGG_BREAK_8723B(ptxdesc, 1); + SET_TX_DESC_MACID_8723B(ptxdesc, pattrib->mac_id); + SET_TX_DESC_QUEUE_SEL_8723B(ptxdesc, pattrib->qsel); - if( pmp_priv->preamble ){ - if (pmp_priv->rateidx <= MPT_RATE_54M) - ptxdesc->data_short = 1; - } - if (pmp_priv->bandwidth == CHANNEL_WIDTH_40) - ptxdesc->data_bw = 1; + SET_TX_DESC_RATE_ID_8723B(ptxdesc, pattrib->raid); + SET_TX_DESC_SEQ_8723B(ptxdesc, pattrib->seqnum); + SET_TX_DESC_HWSEQ_EN_8723B(ptxdesc, 1); + SET_TX_DESC_USE_RATE_8723B(ptxdesc, 1); + SET_TX_DESC_DISABLE_FB_8723B(ptxdesc, 1); + + if (pmp_priv->preamble) + if (pmp_priv->rateidx <= MPT_RATE_54M) { + SET_TX_DESC_DATA_SHORT_8723B(ptxdesc, 1); + } - ptxdesc->datarate = pmp_priv->rateidx; + if (pmp_priv->bandwidth == CHANNEL_WIDTH_40) { + SET_TX_DESC_DATA_BW_8723B(ptxdesc, 1); + } - ptxdesc->data_ratefb_lmt = 0x1F; - ptxdesc->rts_ratefb_lmt = 0xF; + SET_TX_DESC_TX_RATE_8723B(ptxdesc, pmp_priv->rateidx); + SET_TX_DESC_DATA_RATE_FB_LIMIT_8723B(ptxdesc, 0x1F); + SET_TX_DESC_RTS_RATE_FB_LIMIT_8723B(ptxdesc, 0xF); } #endif static void Rtw_MPSetMacTxEDCA(PADAPTER padapter) { - rtw_write32(padapter, 0x508 , 0x00a43f); //Disable EDCA BE Txop for MP pkt tx adjust Packet interval + rtw_write32(padapter, 0x508 , 0x00a422); //Disable EDCA BE Txop for MP pkt tx adjust Packet interval //DBG_871X("%s:write 0x508~~~~~~ 0x%x\n", __func__,rtw_read32(padapter, 0x508)); PHY_SetMacReg(padapter, 0x458 ,bMaskDWord , 0x0); //DBG_8192C("%s()!!!!! 0x460 = 0x%x\n" ,__func__,PHY_QueryBBReg(padapter, 0x460, bMaskDWord)); PHY_SetMacReg(padapter, 0x460 ,bMaskLWord , 0x0);//fast EDCA queue packet interval & time out vaule - PHY_SetMacReg(padapter, ODM_EDCA_VO_PARAM ,bMaskLWord , 0x431C); - PHY_SetMacReg(padapter, ODM_EDCA_BE_PARAM ,bMaskLWord , 0x431C); - PHY_SetMacReg(padapter, ODM_EDCA_BK_PARAM ,bMaskLWord , 0x431C); + //PHY_SetMacReg(padapter, ODM_EDCA_VO_PARAM ,bMaskLWord , 0x431C); + //PHY_SetMacReg(padapter, ODM_EDCA_BE_PARAM ,bMaskLWord , 0x431C); + //PHY_SetMacReg(padapter, ODM_EDCA_BK_PARAM ,bMaskLWord , 0x431C); DBG_8192C("%s()!!!!! 0x460 = 0x%x\n" ,__func__,PHY_QueryBBReg(padapter, 0x460, bMaskDWord)); } @@ -1885,7 +1882,7 @@ u32 mp_query_psd(PADAPTER pAdapter, u8 *data) } - +#if 0 void _rtw_mp_xmit_priv (struct xmit_priv *pxmitpriv) { int i,res; @@ -1952,7 +1949,7 @@ void _rtw_mp_xmit_priv (struct xmit_priv *pxmitpriv) pxmitbuf->padapter = padapter; pxmitbuf->buf_tag = XMITBUF_MGNT; - if((res=rtw_os_xmit_resource_alloc(padapter, pxmitbuf,max_xmit_extbuf_size + XMITBUF_ALIGN_SZ, _FALSE)) == _FAIL) { + if((res=rtw_os_xmit_resource_alloc(padapter, pxmitbuf,max_xmit_extbuf_size + XMITBUF_ALIGN_SZ, _TRUE)) == _FAIL) { res= _FAIL; goto exit; } @@ -1977,7 +1974,7 @@ void _rtw_mp_xmit_priv (struct xmit_priv *pxmitpriv) exit: ; } - +#endif ULONG getPowerDiffByRate8188E( @@ -2446,8 +2443,5 @@ void Hal_ProSetCrystalCap (PADAPTER pAdapter , u32 CrystalCap) PHY_SetBBReg(pAdapter, REG_MAC_PHY_CTRL, 0xFFF000, (CrystalCap | (CrystalCap << 6))); } } - - - #endif diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_mp_ioctl.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_mp_ioctl.c old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_odm.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_odm.c old mode 100644 new mode 100755 index 75beea8a2178..5a40e543c237 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_odm.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_odm.c @@ -132,7 +132,7 @@ void rtw_odm_dbg_level_msg(void *sel, _adapter *adapter) int i; rtw_hal_get_def_var(adapter, HW_DEF_ODM_DBG_LEVEL, &dbg_level); - DBG_871X_SEL_NL(sel, "odm.DebugDebugLevel = %u\n", dbg_level); + DBG_871X_SEL_NL(sel, "odm.DebugLevel = %u\n", dbg_level); for (i=0;iregistrypriv; + struct mlme_priv *mlme = &adapter->mlmepriv; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); + DM_ODM_T *odm = &hal_data->odmpriv; + + DBG_871X_SEL_NL(sel, "RTW_ADAPTIVITY_EN_"); + + if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_DISABLE) { + DBG_871X_SEL(sel, "DISABLE\n"); + } else if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE) { + DBG_871X_SEL(sel, "ENABLE\n"); + } else if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_AUTO) { + DBG_871X_SEL(sel, "AUTO, chplan:0x%02x, Regulation:%u,%u\n" + , mlme->ChannelPlan, odm->odm_Regulation2_4G, odm->odm_Regulation5G); + } else { + DBG_871X_SEL(sel, "INVALID\n"); + } +} + +#define RTW_ADAPTIVITY_MODE_NORMAL 0 +#define RTW_ADAPTIVITY_MODE_CARRIER_SENSE 1 + +void rtw_odm_adaptivity_mode_msg(void *sel, _adapter *adapter) +{ + struct registry_priv *regsty = &adapter->registrypriv; + + DBG_871X_SEL_NL(sel, "RTW_ADAPTIVITY_MODE_"); + + if (regsty->adaptivity_mode == RTW_ADAPTIVITY_MODE_NORMAL) { + DBG_871X_SEL(sel, "NORMAL\n"); + } else if (regsty->adaptivity_mode == RTW_ADAPTIVITY_MODE_CARRIER_SENSE) { + DBG_871X_SEL(sel, "CARRIER_SENSE\n"); + } else { + DBG_871X_SEL(sel, "INVALID\n"); + } +} +bool rtw_odm_adaptivity_needed(_adapter *adapter) +{ + struct registry_priv *regsty = &adapter->registrypriv; + struct mlme_priv *mlme = &adapter->mlmepriv; + bool ret = _FALSE; + + if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE + || regsty->adaptivity_en == RTW_ADAPTIVITY_EN_AUTO) + ret = _TRUE; + + if (ret == _TRUE) { + rtw_odm_adaptivity_en_msg(RTW_DBGDUMP, adapter); + rtw_odm_adaptivity_mode_msg(RTW_DBGDUMP, adapter); + } + + return ret; +} + void rtw_odm_adaptivity_parm_msg(void *sel, _adapter *adapter) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter); DM_ODM_T *odm = &pHalData->odmpriv; + rtw_odm_adaptivity_en_msg(sel, adapter); + rtw_odm_adaptivity_mode_msg(sel, adapter); + DBG_871X_SEL_NL(sel, "%10s %16s %8s %10s %11s %14s\n" , "TH_L2H_ini", "TH_EDCCA_HL_diff", "IGI_Base", "ForceEDCCA", "AdapEn_RSSI", "IGI_LowerBound"); DBG_871X_SEL_NL(sel, "0x%-8x %-16d 0x%-6x %-10d %-11u %-14u\n" diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_p2p.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_p2p.c old mode 100644 new mode 100755 index f1bed6f86fc7..92423bb339f0 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_p2p.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_p2p.c @@ -5277,10 +5277,6 @@ int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role) adapter_wdev_data(padapter)->p2p_enabled = _FALSE; #endif //CONFIG_IOCTL_CFG80211 - if (_FAIL == rtw_pwr_wakeup(padapter)) { - ret = _FAIL; - goto exit; - } //Disable P2P function if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) @@ -5299,6 +5295,10 @@ int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role) rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_NONE); rtw_p2p_set_role(pwdinfo, P2P_ROLE_DISABLE); _rtw_memset(&pwdinfo->rx_prov_disc_info, 0x00, sizeof(struct rx_provdisc_req_info)); + + /* Remove profiles in wifidirect_info structure. */ + _rtw_memset( &pwdinfo->profileinfo[ 0 ], 0x00, sizeof( struct profile_info ) * P2P_MAX_PERSISTENT_GROUP_NUM ); + pwdinfo->profileindex = 0; } rtw_hal_set_odm_var(padapter,HAL_ODM_P2P_STATE,NULL,_FALSE); @@ -5306,6 +5306,11 @@ int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role) rtw_hal_set_odm_var(padapter,HAL_ODM_WIFI_DISPLAY_STATE,NULL,_FALSE); #endif + if (_FAIL == rtw_pwr_wakeup(padapter)) { + ret = _FAIL; + goto exit; + } + //Restore to initial setting. update_tx_basic_rate(padapter, padapter->registrypriv.wireless_mode); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_pwrctrl.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_pwrctrl.c old mode 100644 new mode 100755 index b2c24fade0a2..2076e152be14 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_pwrctrl.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_pwrctrl.c @@ -1116,7 +1116,7 @@ _func_enter_; ) { //connect - if(pwrpriv->power_mgnt == PS_MODE_ACTIVE) { + if(pwrpriv->pwr_mode == PS_MODE_ACTIVE) { DBG_871X("%s: Driver Already Leave LPS\n",__FUNCTION__); return; } @@ -1201,7 +1201,7 @@ _func_enter_; else #endif { -#if defined(CONFIG_FWLPS_IN_IPS) || defined(CONFIG_SWLPS_IN_IPS) || (defined(CONFIG_PLATFORM_SPRD) && defined(CONFIG_RTL8188E)) +#if defined(CONFIG_FWLPS_IN_IPS) || defined(CONFIG_SWLPS_IN_IPS) || defined(CONFIG_RTL8188E) #ifdef CONFIG_IPS if(_FALSE == ips_leave(pri_padapter)) { @@ -1209,8 +1209,8 @@ _func_enter_; } #endif #endif //CONFIG_SWLPS_IN_IPS || (CONFIG_PLATFORM_SPRD && CONFIG_RTL8188E) - } - } + } + } } _func_exit_; @@ -2146,6 +2146,9 @@ _func_enter_; rtw_init_timer(&pwrctrlpriv->pwr_state_check_timer, padapter, pwr_state_check_handler); + pwrctrlpriv->wowlan_mode = _FALSE; + pwrctrlpriv->wowlan_ap_mode = _FALSE; + #ifdef CONFIG_RESUME_IN_WORKQUEUE _init_workitem(&pwrctrlpriv->resume_work, resume_workitem_callback, NULL); pwrctrlpriv->rtw_workqueue = create_singlethread_workqueue("rtw_workqueue"); @@ -2157,9 +2160,11 @@ _func_enter_; #endif //CONFIG_HAS_EARLYSUSPEND || CONFIG_ANDROID_POWER #ifdef CONFIG_PNO_SUPPORT + pwrctrlpriv->pno_inited = _FALSE; pwrctrlpriv->pnlo_info = NULL; pwrctrlpriv->pscan_info = NULL; pwrctrlpriv->pno_ssid_list = NULL; + pwrctrlpriv->pno_in_resume = _TRUE; #endif _func_exit_; @@ -2221,12 +2226,16 @@ static void resume_workitem_callback(struct work_struct *work) DBG_871X("%s\n",__FUNCTION__); rtw_resume_process(adapter); + + rtw_resume_unlock_suspend(); } void rtw_resume_in_workqueue(struct pwrctrl_priv *pwrpriv) { // accquire system's suspend lock preventing from falliing asleep while resume in workqueue - rtw_lock_suspend(); + //rtw_lock_suspend(); + + rtw_resume_lock_suspend(); #if 1 queue_work(pwrpriv->rtw_workqueue, &pwrpriv->resume_work); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_recv.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_recv.c old mode 100644 new mode 100755 index 186a50e0028d..bee356f8cc3d --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_recv.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_recv.c @@ -606,8 +606,11 @@ union recv_frame * decryptor(_adapter *padapter,union recv_frame *precv_frame) struct security_priv *psecuritypriv=&padapter->securitypriv; union recv_frame *return_packet=precv_frame; u32 res=_SUCCESS; + _func_enter_; + DBG_COUNTER(padapter->rx_logs.core_rx_post_decrypt); + RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("prxstat->decrypted=%x prxattrib->encrypt = 0x%03x\n",prxattrib->bdecrypted,prxattrib->encrypt)); if(prxattrib->encrypt>0) @@ -653,16 +656,20 @@ _func_enter_; switch(prxattrib->encrypt){ case _WEP40_: case _WEP104_: + DBG_COUNTER(padapter->rx_logs.core_rx_post_decrypt_wep); rtw_wep_decrypt(padapter, (u8 *)precv_frame); break; case _TKIP_: + DBG_COUNTER(padapter->rx_logs.core_rx_post_decrypt_tkip); res = rtw_tkip_decrypt(padapter, (u8 *)precv_frame); break; case _AES_: + DBG_COUNTER(padapter->rx_logs.core_rx_post_decrypt_aes); res = rtw_aes_decrypt(padapter, (u8 * )precv_frame); break; #ifdef CONFIG_WAPI_SUPPORT case _SMS4_: + DBG_COUNTER(padapter->rx_logs.core_rx_post_decrypt_wapi); rtw_sms4_decrypt(padapter, (u8 * )precv_frame); break; #endif @@ -690,6 +697,8 @@ _func_enter_; else #endif { + DBG_COUNTER(padapter->rx_logs.core_rx_post_decrypt_hw); + psecuritypriv->hw_decrypted=_TRUE; #ifdef DBG_RX_DECRYPTOR DBG_871X("[%s] %d:prxstat->bdecrypted:%d, prxattrib->encrypt:%d, Setting psecuritypriv->hw_decrypted = %d\n", @@ -700,10 +709,10 @@ _func_enter_; psecuritypriv->hw_decrypted); #endif - } } else { + DBG_COUNTER(padapter->rx_logs.core_rx_post_decrypt_unknown); #ifdef DBG_RX_DECRYPTOR DBG_871X("[%s] %d:prxstat->bdecrypted:%d, prxattrib->encrypt:%d, Setting psecuritypriv->hw_decrypted = %d\n", __FUNCTION__, @@ -1488,9 +1497,20 @@ _func_enter_; *psta = rtw_get_stainfo(pstapriv, pattrib->bssid); // get sta_info if (*psta == NULL) { - DBG_871X("issue_deauth to the ap=" MAC_FMT " for the reason(7)\n", MAC_ARG(pattrib->bssid)); - issue_deauth(adapter, pattrib->bssid, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA); + //for AP multicast issue , modify by yiwei + static u32 send_issue_deauth_time=0; + + //DBG_871X("After send deauth , %u ms has elapsed.\n", rtw_get_passing_time_ms(send_issue_deauth_time)); + + if(rtw_get_passing_time_ms(send_issue_deauth_time) > 10000 || send_issue_deauth_time == 0 ) + { + send_issue_deauth_time = rtw_get_current_time(); + + DBG_871X("issue_deauth to the ap=" MAC_FMT " for the reason(7)\n", MAC_ARG(pattrib->bssid)); + + issue_deauth(adapter, pattrib->bssid, WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA); + } } } @@ -2148,6 +2168,17 @@ validate_80211w_fail: } #endif //CONFIG_IEEE80211W +static inline void dump_rx_packet(u8 *ptr) +{ + int i; + + DBG_871X("############################# \n"); + for(i=0; i<64;i=i+8) + DBG_871X("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:\n", *(ptr+i), + *(ptr+i+1), *(ptr+i+2) ,*(ptr+i+3) ,*(ptr+i+4),*(ptr+i+5), *(ptr+i+6), *(ptr+i+7)); + DBG_871X("############################# \n"); +} + sint validate_recv_frame(_adapter *adapter, union recv_frame *precv_frame); sint validate_recv_frame(_adapter *adapter, union recv_frame *precv_frame) { @@ -2180,7 +2211,6 @@ sint validate_recv_frame(_adapter *adapter, union recv_frame *precv_frame) _func_enter_; - #ifdef CONFIG_FIND_BEST_CHANNEL if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) { int ch_set_idx = rtw_ch_set_search_ch(pmlmeext->channel_set, rtw_get_oper_ch(adapter)); @@ -2214,6 +2244,7 @@ _func_enter_; if(ver!=0){ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("validate_recv_data_frame fail! (ver!=0)\n")); retval= _FAIL; + DBG_COUNTER(adapter->rx_logs.core_rx_pre_ver_err); goto exit; } @@ -2238,46 +2269,23 @@ _func_enter_; { u8 bDumpRxPkt; rtw_hal_get_def_var(adapter, HAL_DEF_DBG_DUMP_RXPKT, &(bDumpRxPkt)); - if(bDumpRxPkt ==1){//dump all rx packets - int i; - DBG_871X("############################# \n"); - - for(i=0; i<64;i=i+8) - DBG_871X("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:\n", *(ptr+i), - *(ptr+i+1), *(ptr+i+2) ,*(ptr+i+3) ,*(ptr+i+4),*(ptr+i+5), *(ptr+i+6), *(ptr+i+7)); - DBG_871X("############################# \n"); - } - else if(bDumpRxPkt ==2){ - if(type== WIFI_MGT_TYPE){ - int i; - DBG_871X("############################# \n"); - - for(i=0; i<64;i=i+8) - DBG_871X("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:\n", *(ptr+i), - *(ptr+i+1), *(ptr+i+2) ,*(ptr+i+3) ,*(ptr+i+4),*(ptr+i+5), *(ptr+i+6), *(ptr+i+7)); - DBG_871X("############################# \n"); - } - } - else if(bDumpRxPkt ==3){ - if(type== WIFI_DATA_TYPE){ - int i; - DBG_871X("############################# \n"); - - for(i=0; i<64;i=i+8) - DBG_871X("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:\n", *(ptr+i), - *(ptr+i+1), *(ptr+i+2) ,*(ptr+i+3) ,*(ptr+i+4),*(ptr+i+5), *(ptr+i+6), *(ptr+i+7)); - DBG_871X("############################# \n"); - } - } + if (bDumpRxPkt == 1) //dump all rx packets + dump_rx_packet(ptr); + else if ((bDumpRxPkt == 2) && (type == WIFI_MGT_TYPE)) + dump_rx_packet(ptr); + else if ((bDumpRxPkt == 3) && (type == WIFI_DATA_TYPE)) + dump_rx_packet(ptr); } #endif switch (type) { case WIFI_MGT_TYPE: //mgnt + DBG_COUNTER(adapter->rx_logs.core_rx_pre_mgmt); #ifdef CONFIG_IEEE80211W if(validate_80211w_mgmt(adapter, precv_frame) == _FAIL) { retval = _FAIL; + DBG_COUNTER(padapter->rx_logs.core_rx_pre_mgmt_err_80211w); break; } #endif //CONFIG_IEEE80211W @@ -2286,18 +2294,22 @@ _func_enter_; if (retval == _FAIL) { RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("validate_recv_mgnt_frame fail\n")); + DBG_COUNTER(adapter->rx_logs.core_rx_pre_mgmt_err); } retval = _FAIL; // only data frame return _SUCCESS break; case WIFI_CTRL_TYPE: //ctrl + DBG_COUNTER(adapter->rx_logs.core_rx_pre_ctrl); retval = validate_recv_ctrl_frame(adapter, precv_frame); if (retval == _FAIL) { RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("validate_recv_ctrl_frame fail\n")); + DBG_COUNTER(adapter->rx_logs.core_rx_pre_ctrl_err); } retval = _FAIL; // only data frame return _SUCCESS break; case WIFI_DATA_TYPE: //data + DBG_COUNTER(adapter->rx_logs.core_rx_pre_data); #ifdef CONFIG_WAPI_SUPPORT if(pattrib->qos) external_len = 2; @@ -2316,6 +2328,7 @@ _func_enter_; else { retval = _FAIL; + DBG_COUNTER(adapter->rx_logs.core_rx_pre_data_wapi_seq_err); break; } } @@ -2324,6 +2337,7 @@ _func_enter_; if(rtw_wapi_drop_for_key_absent(adapter,GetAddr2Ptr(ptr))){ retval=_FAIL; WAPI_TRACE(WAPI_RX,"drop for key absent for rx \n"); + DBG_COUNTER(adapter->rx_logs.core_rx_pre_data_wapi_key_err); break; } } @@ -2337,9 +2351,30 @@ _func_enter_; struct recv_priv *precvpriv = &adapter->recvpriv; //RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("validate_recv_data_frame fail\n")); precvpriv->rx_drop++; + DBG_COUNTER(adapter->rx_logs.core_rx_pre_data_err); + } + else if (retval == _SUCCESS) + { +#ifdef DBG_RX_DUMP_EAP + u8 bDumpRxPkt; + u16 eth_type; + + // dump eapol + rtw_hal_get_def_var(adapter, HAL_DEF_DBG_DUMP_RXPKT, &(bDumpRxPkt)); + // get ether_type + _rtw_memcpy(ð_type, ptr + pattrib->hdrlen + pattrib->iv_len + LLC_HEADER_SIZE, 2); + eth_type = ntohs((unsigned short) eth_type); + if ((bDumpRxPkt == 4) && (eth_type == 0x888e)) + dump_rx_packet(ptr); +#endif + } + else + { + DBG_COUNTER(adapter->rx_logs.core_rx_pre_data_handled); } break; default: + DBG_COUNTER(adapter->rx_logs.core_rx_pre_unknown); RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("validate_recv_data_frame fail! type=0x%x\n", type)); #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME validate_recv_data_frame fail! type=0x%x\n", type); @@ -3103,10 +3138,11 @@ int enqueue_reorder_recvframe(struct recv_reorder_ctrl *preorder_ctrl, union rec void recv_indicatepkts_pkt_loss_cnt(struct debug_priv *pdbgpriv, u64 prev_seq, u64 current_seq); void recv_indicatepkts_pkt_loss_cnt(struct debug_priv *pdbgpriv, u64 prev_seq, u64 current_seq) -{ +{ if(current_seq < prev_seq) { - pdbgpriv->dbg_rx_ampdu_loss_count+= (4096 + current_seq - prev_seq); + pdbgpriv->dbg_rx_ampdu_loss_count+= (4096 + current_seq - prev_seq); + } else { @@ -3128,6 +3164,8 @@ int recv_indicatepkts_in_order(_adapter *padapter, struct recv_reorder_ctrl *pre struct dvobj_priv *psdpriv = padapter->dvobj; struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; + DBG_COUNTER(padapter->rx_logs.core_rx_post_indicate_in_oder); + //DbgPrint("+recv_indicatepkts_in_order\n"); //_enter_critical_ex(&ppending_recvframe_queue->lock, &irql); @@ -3299,6 +3337,8 @@ int recv_indicatepkt_reorder(_adapter *padapter, union recv_frame *prframe) struct dvobj_priv *psdpriv = padapter->dvobj; struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; + DBG_COUNTER(padapter->rx_logs.core_rx_post_indicate_reoder); + if(!pattrib->amsdu) { //s1. @@ -3504,6 +3544,8 @@ int process_recv_indicatepkts(_adapter *padapter, union recv_frame *prframe) #ifdef CONFIG_80211N_HT struct ht_priv *phtpriv = &pmlmepriv->htpriv; + + DBG_COUNTER(padapter->rx_logs.core_rx_post_indicate); #ifdef CONFIG_TDLS if( (phtpriv->ht_option==_TRUE) || @@ -3607,10 +3649,14 @@ int recv_func_prehandle(_adapter *padapter, union recv_frame *rframe) struct rx_pkt_attrib *pattrib = &rframe->u.hdr.attrib; struct recv_priv *precvpriv = &padapter->recvpriv; _queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue; - #ifdef CONFIG_MP_INCLUDED struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct mp_priv *pmppriv = &padapter->mppriv; +#endif //CONFIG_MP_INCLUDED + DBG_COUNTER(padapter->rx_logs.core_rx_pre); + +#ifdef CONFIG_MP_INCLUDED if (padapter->registrypriv.mp_mode == 1) { if ((check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE))//&&(padapter->mppriv.check_mp_pkt == 0)) @@ -3626,13 +3672,16 @@ int recv_func_prehandle(_adapter *padapter, union recv_frame *rframe) } - if (check_fwstate(pmlmepriv, WIFI_MP_LPBK_STATE) == _FALSE) { - //RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("MP - Not in loopback mode , drop pkt \n")); - ret = _FAIL; - rtw_free_recvframe(rframe, pfree_recv_queue);//free this recv_frame - goto exit; + if(pmppriv->rx_bindicatePkt == _FALSE) + { + if (check_fwstate(pmlmepriv, WIFI_MP_LPBK_STATE) == _FALSE) { + //RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("MP - Not in loopback mode , drop pkt \n")); + ret = _FAIL; + rtw_free_recvframe(rframe, pfree_recv_queue);//free this recv_frame + goto exit; + } } - } + } } #endif @@ -3656,12 +3705,11 @@ int recv_func_posthandle(_adapter *padapter, union recv_frame *prframe) struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; struct recv_priv *precvpriv = &padapter->recvpriv; _queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue; - - #ifdef CONFIG_TDLS u8 *psnap_type, *pcategory; #endif //CONFIG_TDLS + DBG_COUNTER(padapter->rx_logs.core_rx_post); // DATA FRAME rtw_led_control(padapter, LED_CTL_RX); @@ -3673,6 +3721,7 @@ int recv_func_posthandle(_adapter *padapter, union recv_frame *prframe) DBG_871X("DBG_RX_DROP_FRAME %s decryptor: drop pkt\n", __FUNCTION__); #endif ret = _FAIL; + DBG_COUNTER(padapter->rx_logs.core_rx_post_decrypt_err); goto _recv_data_drop; } @@ -3712,6 +3761,7 @@ int recv_func_posthandle(_adapter *padapter, union recv_frame *prframe) #ifdef DBG_RX_DROP_FRAME DBG_871X("DBG_RX_DROP_FRAME %s recvframe_chk_defrag: drop pkt\n", __FUNCTION__); #endif + DBG_COUNTER(padapter->rx_logs.core_rx_post_defrag_err); goto _recv_data_drop; } @@ -3722,6 +3772,7 @@ int recv_func_posthandle(_adapter *padapter, union recv_frame *prframe) DBG_871X("DBG_RX_DROP_FRAME %s portctrl: drop pkt\n", __FUNCTION__); #endif ret = _FAIL; + DBG_COUNTER(padapter->rx_logs.core_rx_post_portctrl_err); goto _recv_data_drop; } @@ -3740,6 +3791,7 @@ int recv_func_posthandle(_adapter *padapter, union recv_frame *prframe) DBG_871X("DBG_RX_DROP_FRAME %s process_recv_indicatepkts fail!\n", __FUNCTION__); #endif rtw_free_recvframe(orig_prframe, pfree_recv_queue);//free this recv_frame + DBG_COUNTER(padapter->rx_logs.core_rx_post_indicate_err); goto _recv_data_drop; } #else // CONFIG_80211N_HT @@ -3830,6 +3882,7 @@ int recv_func(_adapter *padapter, union recv_frame *rframe) while((pending_frame=rtw_alloc_recvframe(&padapter->recvpriv.uc_swdec_pending_queue))) { cnt++; + DBG_COUNTER(padapter->rx_logs.core_rx_dequeue); recv_func_posthandle(padapter, pending_frame); } @@ -3838,6 +3891,7 @@ int recv_func(_adapter *padapter, union recv_frame *rframe) FUNC_ADPT_ARG(padapter), cnt); } + DBG_COUNTER(padapter->rx_logs.core_rx); ret = recv_func_prehandle(padapter, rframe); if(ret == _SUCCESS) { @@ -3849,6 +3903,7 @@ int recv_func(_adapter *padapter, union recv_frame *rframe) psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPAPSK && !psecuritypriv->busetkipkey) { + DBG_COUNTER(padapter->rx_logs.core_rx_enqueue); rtw_enqueue_recvframe(rframe, &padapter->recvpriv.uc_swdec_pending_queue); //DBG_871X("%s: no key, enqueue uc_swdec_pending_queue\n", __func__); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_rf.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_rf.c old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_security.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_security.c old mode 100644 new mode 100755 index 579fd0954296..9841568494ec --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_security.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_security.c @@ -44,6 +44,63 @@ const char *security_type_str(u8 value) return NULL; } +#ifdef DBG_SW_SEC_CNT +#define WEP_SW_ENC_CNT_INC(sec, ra) \ + if (is_broadcast_mac_addr(ra)) \ + sec->wep_sw_enc_cnt_bc++; \ + else if (is_multicast_mac_addr(ra)) \ + sec->wep_sw_enc_cnt_mc++; \ + else \ + sec->wep_sw_enc_cnt_uc++; + +#define WEP_SW_DEC_CNT_INC(sec, ra) \ + if (is_broadcast_mac_addr(ra)) \ + sec->wep_sw_dec_cnt_bc++; \ + else if (is_multicast_mac_addr(ra)) \ + sec->wep_sw_dec_cnt_mc++; \ + else \ + sec->wep_sw_dec_cnt_uc++; + +#define TKIP_SW_ENC_CNT_INC(sec, ra) \ + if (is_broadcast_mac_addr(ra)) \ + sec->tkip_sw_enc_cnt_bc++; \ + else if (is_multicast_mac_addr(ra)) \ + sec->tkip_sw_enc_cnt_mc++; \ + else \ + sec->tkip_sw_enc_cnt_uc++; + +#define TKIP_SW_DEC_CNT_INC(sec, ra) \ + if (is_broadcast_mac_addr(ra)) \ + sec->tkip_sw_dec_cnt_bc++; \ + else if (is_multicast_mac_addr(ra)) \ + sec->tkip_sw_dec_cnt_mc++; \ + else \ + sec->tkip_sw_dec_cnt_uc++; + +#define AES_SW_ENC_CNT_INC(sec, ra) \ + if (is_broadcast_mac_addr(ra)) \ + sec->aes_sw_enc_cnt_bc++; \ + else if (is_multicast_mac_addr(ra)) \ + sec->aes_sw_enc_cnt_mc++; \ + else \ + sec->aes_sw_enc_cnt_uc++; + +#define AES_SW_DEC_CNT_INC(sec, ra) \ + if (is_broadcast_mac_addr(ra)) \ + sec->aes_sw_dec_cnt_bc++; \ + else if (is_multicast_mac_addr(ra)) \ + sec->aes_sw_dec_cnt_mc++; \ + else \ + sec->aes_sw_dec_cnt_uc++; +#else +#define WEP_SW_ENC_CNT_INC(sec, ra) +#define WEP_SW_DEC_CNT_INC(sec, ra) +#define TKIP_SW_ENC_CNT_INC(sec, ra) +#define TKIP_SW_DEC_CNT_INC(sec, ra) +#define AES_SW_ENC_CNT_INC(sec, ra) +#define AES_SW_DEC_CNT_INC(sec, ra) +#endif /* DBG_SW_SEC_CNT */ + //=====WEP related===== #define CRC32_POLY 0x04c11db7 @@ -251,7 +308,8 @@ _func_enter_; } } - + + WEP_SW_ENC_CNT_INC(psecuritypriv, pattrib->ra); } _func_exit_; @@ -299,8 +357,9 @@ _func_enter_; { RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_wep_decrypt:icv error crc[3](%x)!=payload[length-1](%x) || crc[2](%x)!=payload[length-2](%x) || crc[1](%x)!=payload[length-3](%x) || crc[0](%x)!=payload[length-4](%x)\n", crc[3],payload[length-1],crc[2],payload[length-2],crc[1],payload[length-3],crc[0],payload[length-4])); - } - + } + + WEP_SW_DEC_CNT_INC(psecuritypriv, prxattrib->ra); } _func_exit_; @@ -775,7 +834,7 @@ _func_enter_; } } - + TKIP_SW_ENC_CNT_INC(psecuritypriv,pattrib->ra); } /* else{ @@ -867,7 +926,6 @@ _func_enter_; } else { - RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_tkip_decrypt: stainfo!=NULL!!!\n")); prwskey=&stainfo->dot118021x_UncstKey.skey[0]; prwskeylen=16; } @@ -897,8 +955,8 @@ _func_enter_; crc[3],payload[length-1],crc[2],payload[length-2],crc[1],payload[length-3],crc[0],payload[length-4])); res=_FAIL; } - - + + TKIP_SW_DEC_CNT_INC(psecuritypriv, prxattrib->ra); } else{ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_tkip_decrypt: stainfo==NULL!!!\n")); @@ -1706,7 +1764,7 @@ _func_enter_; } } - + AES_SW_ENC_CNT_INC(psecuritypriv, pattrib->ra); } /* else{ @@ -1714,7 +1772,7 @@ _func_enter_; DBG_871X("%s, psta==NUL\n", __func__); res=_FAIL; } -*/ +*/ } @@ -2031,7 +2089,6 @@ _func_enter_; static u32 no_gkey_bc_cnt = 0; static u32 no_gkey_mc_cnt = 0; - //in concurrent we should use sw descrypt in group key, so we remove this message //DBG_871X("rx bc/mc packets, to perform sw rtw_aes_decrypt\n"); //prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey; if(psecuritypriv->binstallGrpkey==_FALSE) @@ -2107,10 +2164,10 @@ _func_enter_; res= aes_decipher(prwskey,prxattrib->hdrlen,pframe, length); - + AES_SW_DEC_CNT_INC(psecuritypriv, prxattrib->ra); } else{ - RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_aes_encrypt: stainfo==NULL!!!\n")); + RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_aes_decrypt: stainfo==NULL!!!\n")); res=_FAIL; } @@ -3141,9 +3198,9 @@ void rtw_sec_restore_wep_key(_adapter *adapter) for(keyid=0;keyid<4;keyid++){ if(securitypriv->key_mask & BIT(keyid)){ if(keyid == securitypriv->dot11PrivacyKeyIndex) - rtw_set_key(adapter,securitypriv, keyid, 1, _TRUE); + rtw_set_key(adapter,securitypriv, keyid, 1, _FALSE); else - rtw_set_key(adapter,securitypriv, keyid, 0, _TRUE); + rtw_set_key(adapter,securitypriv, keyid, 0, _FALSE); } } } diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_sreset.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_sreset.c old mode 100644 new mode 100755 index 108833b37911..82db59c670dd --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_sreset.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_sreset.c @@ -162,7 +162,7 @@ void sreset_restore_security_station(_adapter *padapter) else { //pairwise key - rtw_setstakey_cmd(padapter, (unsigned char *)psta, _TRUE,_FALSE); + rtw_setstakey_cmd(padapter, psta, _TRUE,_FALSE); //group key rtw_set_key(padapter,&padapter->securitypriv,padapter->securitypriv.dot118021XGrpKeyid, 0,_FALSE); } @@ -331,10 +331,10 @@ void sreset_reset(_adapter *padapter) psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; - -#ifdef CONFIG_POWER_SAVING + +#ifdef CONFIG_LPS rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "SRESET"); -#endif +#endif//#ifdef CONFIG_LPS _enter_pwrlock(&pwrpriv->lock); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_sta_mgt.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_sta_mgt.c old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_tdls.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_tdls.c old mode 100644 new mode 100755 index a4a9c0a6623c..21f9fcc8342b --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_tdls.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_tdls.c @@ -22,8 +22,6 @@ #include #ifdef CONFIG_TDLS -extern unsigned char MCS_rate_2R[16]; -extern unsigned char MCS_rate_1R[16]; extern void process_wmmps_data(_adapter *padapter, union recv_frame *precv_frame); void rtw_reset_tdls_info(_adapter* padapter) @@ -210,7 +208,7 @@ void free_tdls_sta(_adapter *padapter, struct sta_info *ptdls_sta) } //clear cam - rtw_clearstakey_cmd(padapter, (u8 *)ptdls_sta, (u8)rtw_get_camid(ptdls_sta->mac_id), _TRUE); + rtw_clearstakey_cmd(padapter, ptdls_sta, _TRUE); if(ptdlsinfo->sta_cnt==0){ rtw_tdls_cmd(padapter, myid(&(padapter->eeprompriv)), TDLS_RS_RCR); @@ -230,7 +228,7 @@ void rtw_tdls_set_key(_adapter *padapter, struct rx_pkt_attrib *prx_pkt_attrib, if(prx_pkt_attrib->encrypt) { ptdls_sta->dot118021XPrivacy=_AES_; - rtw_setstakey_cmd(padapter, (u8*)ptdls_sta, _TRUE, _TRUE); + rtw_setstakey_cmd(padapter, ptdls_sta, _TRUE, _TRUE); } } diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_vht.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_vht.c old mode 100644 new mode 100755 index 1d752711e4f7..ce971d5a5ed3 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_vht.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_vht.c @@ -281,8 +281,9 @@ void update_sta_vht_info_apmode(_adapter *padapter, PVOID sta) } bw_mode = GET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(&pvhtpriv_sta->vht_op_mode_notify); - if (bw_mode > psta->bw_mode) - psta->bw_mode = bw_mode; + + //if (bw_mode > psta->bw_mode) + psta->bw_mode = bw_mode; // B4 Rx LDPC if (TEST_FLAG(pvhtpriv_ap->ldpc_cap, LDPC_VHT_ENABLE_TX) && diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_wapi.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_wapi.c old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_wapi_sms4.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_wapi_sms4.c old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_wlan_util.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_wlan_util.c old mode 100644 new mode 100755 index 158aface5a94..e3f1fed10f8d --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_wlan_util.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_wlan_util.c @@ -40,11 +40,6 @@ unsigned char AIRGOCAP_OUI[] = {0x00, 0x0a, 0xf5}; unsigned char REALTEK_96B_IE[] = {0x00, 0xe0, 0x4c, 0x02, 0x01, 0x20}; -extern unsigned char MCS_rate_2R[16]; -#ifdef CONFIG_DISABLE_MCS13TO15 -extern unsigned char MCS_rate_2R_MCS13TO15_OFF[16]; -#endif //CONFIG_DISABLE_MCS13TO15 -extern unsigned char MCS_rate_1R[16]; extern unsigned char RTW_WPA_OUI[]; extern unsigned char WPA_TKIP_CIPHER[4]; extern unsigned char RSN_TKIP_CIPHER[4]; @@ -55,6 +50,9 @@ extern unsigned char RSN_TKIP_CIPHER[4]; #define WAIT_FOR_BCN_TO_MIN (6000) #define WAIT_FOR_BCN_TO_MAX (20000) +#define DISCONNECT_BY_CHK_BCN_FAIL_OBSERV_PERIOD_IN_MS 1000 +#define DISCONNECT_BY_CHK_BCN_FAIL_THRESHOLD 3 + static u8 rtw_basic_rate_cck[4] = { IEEE80211_CCK_RATE_1MB|IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_2MB|IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_5MB|IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_11MB|IEEE80211_BASIC_RATE_MASK @@ -393,6 +391,19 @@ void get_rate_set(_adapter *padapter, unsigned char *pbssrate, int *bssrate_len) _rtw_memcpy(pbssrate, supportedrates, *bssrate_len); } +void set_mcs_rate_by_mask(u8 *mcs_set, u32 mask) +{ + u8 mcs_rate_1r = (u8)(mask&0xff); + u8 mcs_rate_2r = (u8)((mask>>8)&0xff); + u8 mcs_rate_3r = (u8)((mask>>16)&0xff); + u8 mcs_rate_4r = (u8)((mask>>24)&0xff); + + mcs_set[0] &= mcs_rate_1r; + mcs_set[1] &= mcs_rate_2r; + mcs_set[2] &= mcs_rate_3r; + mcs_set[3] &= mcs_rate_4r; +} + void UpdateBrateTbl( IN PADAPTER Adapter, IN u8 *mBratesOS @@ -848,7 +859,16 @@ void CAM_empty_entry( void invalidate_cam_all(_adapter *padapter) { + struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); + struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; + _irqL irqL; + rtw_hal_set_hwreg(padapter, HW_VAR_CAM_INVALID_ALL, 0); + + _enter_critical_bh(&cam_ctl->lock, &irqL); + cam_ctl->bitmap = 0; + _rtw_memset(dvobj->cam_cache, 0, sizeof(struct cam_entry_cache)*TOTAL_CAM_ENTRY); + _exit_critical_bh(&cam_ctl->lock, &irqL); } #if 1 static u32 _ReadCAM(_adapter *padapter ,u32 addr) @@ -938,24 +958,254 @@ inline void clear_cam_entry(_adapter *adapter, u8 id) inline void write_cam_from_cache(_adapter *adapter, u8 id) { struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; + _irqL irqL; + struct cam_entry_cache cache; + + _enter_critical_bh(&cam_ctl->lock, &irqL); + _rtw_memcpy(&cache, &dvobj->cam_cache[id], sizeof(struct cam_entry_cache)); + _exit_critical_bh(&cam_ctl->lock, &irqL); - _write_cam(adapter, id, dvobj->cam_cache[id].ctrl, dvobj->cam_cache[id].mac, dvobj->cam_cache[id].key); + _write_cam(adapter, id, cache.ctrl, cache.mac, cache.key); } void write_cam_cache(_adapter *adapter, u8 id, u16 ctrl, u8 *mac, u8 *key) { struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; + _irqL irqL; + + _enter_critical_bh(&cam_ctl->lock, &irqL); dvobj->cam_cache[id].ctrl = ctrl; _rtw_memcpy(dvobj->cam_cache[id].mac, mac, ETH_ALEN); _rtw_memcpy(dvobj->cam_cache[id].key, key, 16); + + _exit_critical_bh(&cam_ctl->lock, &irqL); } void clear_cam_cache(_adapter *adapter, u8 id) { struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; + _irqL irqL; + + _enter_critical_bh(&cam_ctl->lock, &irqL); _rtw_memset(&(dvobj->cam_cache[id]), 0, sizeof(struct cam_entry_cache)); + + _exit_critical_bh(&cam_ctl->lock, &irqL); +} + +s16 rtw_get_camid(_adapter *adapter, struct sta_info *sta, s16 kid) +{ + u8 macid; + s16 camid; + + //cam_entry: + //0~3 for default key + + //for concurrent mode (ap+sta, sta+sta): + //default key is disable, using sw encrypt/decrypt + //camid 0, 1, 2, 3 is default entry for default key/group key + //macid = 1 is for bc/mc stainfo, no mapping to camid + //macid = 0 mapping to camid 4 + //for macid >=2, camid = macid+3; + + if (sta) { + struct mlme_ext_info *mlmeinfo = &adapter->mlmeextpriv.mlmext_info; + macid = sta->mac_id; + + if((mlmeinfo->state&0x03) == WIFI_FW_AP_STATE) { + if((macid == 1) || (macid>(NUM_STA-4))){ + DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" failed, mac_id=%d\n", FUNC_ADPT_ARG(adapter), macid); + camid = -1; + goto exit; + } + } + + if(macid==0) + camid = 4; + else if(macid >=2) + camid = macid + 3; + else + camid = 4; + } + else { + /* default key is disabled */ + camid = -1; + } + +exit: + return (s16)camid; +} + +bool _rtw_camid_is_gk(_adapter *adapter, u8 cam_id) +{ + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; + bool ret = _FALSE; + + if (cam_id >= TOTAL_CAM_ENTRY) + goto exit; + + if (!(cam_ctl->bitmap & BIT(cam_id))) + goto exit; + + ret = (dvobj->cam_cache[cam_id].ctrl&BIT6)?_TRUE:_FALSE; + +exit: + return ret; +} + +bool rtw_camid_is_gk(_adapter *adapter, u8 cam_id) +{ + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; + _irqL irqL; + bool ret; + + _enter_critical_bh(&cam_ctl->lock, &irqL); + ret = _rtw_camid_is_gk(adapter, cam_id); + _exit_critical_bh(&cam_ctl->lock, &irqL); + + return ret; +} + +s16 _rtw_camid_search(_adapter *adapter, u8 *addr, s16 kid) +{ + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; + int i; + s16 cam_id = -1; + + for (i=0;icam_cache[i].mac, addr, ETH_ALEN) == _FALSE) + continue; + if (kid >= 0 && kid != (dvobj->cam_cache[i].ctrl&0x03)) + continue; + + cam_id = i; + break; + } + + if (0) { + if (addr) + DBG_871X(FUNC_ADPT_FMT" addr:"MAC_FMT" kid:%d, return cam_id:%d\n" + , FUNC_ADPT_ARG(adapter), MAC_ARG(addr), kid, cam_id); + else + DBG_871X(FUNC_ADPT_FMT" addr:%p kid:%d, return cam_id:%d\n" + , FUNC_ADPT_ARG(adapter), addr, kid, cam_id); + } + + return cam_id; +} + +s16 rtw_camid_search(_adapter *adapter, u8 *addr, s16 kid) +{ + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; + _irqL irqL; + s16 cam_id = -1; + + _enter_critical_bh(&cam_ctl->lock, &irqL); + cam_id = _rtw_camid_search(adapter, addr, kid); + _exit_critical_bh(&cam_ctl->lock, &irqL); + + return cam_id; +} + +s16 rtw_camid_alloc(_adapter *adapter, struct sta_info *sta, u8 kid) +{ + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; + _irqL irqL; + s16 cam_id = -1; + + _enter_critical_bh(&cam_ctl->lock, &irqL); + +#ifdef DYNAMIC_CAMID_ALLOC + { + struct mlme_ext_info *mlmeinfo = &adapter->mlmeextpriv.mlmext_info; + + if((((mlmeinfo->state&0x03) == WIFI_FW_AP_STATE) || ((mlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)) + && !sta) { + /* AP/Ad-hoc mode group key: static alloction to default key by key ID */ + if (kid > 3) { + DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" group key with invalid key id:%u\n" + , FUNC_ADPT_ARG(adapter), kid); + rtw_warn_on(1); + goto bitmap_handle; + } + + cam_id = kid; + } + else { + int i; + u8 *addr = sta?sta->hwaddr:NULL; + + if(!sta) { + if (!(mlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)) { + /* bypass STA mode group key setting before connected(ex:WEP) because bssid is not ready */ + goto bitmap_handle; + } + + addr = get_bssid(&adapter->mlmepriv); + } + + if ((i = _rtw_camid_search(adapter, addr, kid)) >= 0) { + /* Fix issue that pairwise and group key have same key id. Pairwise key first, group key can overwirte group only(ex: rekey) */ + if (sta || _rtw_camid_is_gk(adapter, i) == _TRUE) + cam_id = i; + else + DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" group key id:%u the same key id as pairwise key\n" + , FUNC_ADPT_ARG(adapter), kid); + goto bitmap_handle; + } + + for (i=4;ibitmap & BIT(i))) + break; + + if (i == TOTAL_CAM_ENTRY) { + if (sta) + DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" pairwise key with "MAC_FMT" id:%u no room\n" + , FUNC_ADPT_ARG(adapter), MAC_ARG(sta->hwaddr), kid); + else + DBG_871X_LEVEL(_drv_always_, FUNC_ADPT_FMT" group key id:%u no room\n" + , FUNC_ADPT_ARG(adapter), kid); + rtw_warn_on(1); + goto bitmap_handle; + } + + cam_id = i; + } + } +#else + cam_id = rtw_get_camid(adapter, sta, kid); +#endif /* DYNAMIC_CAMID_ALLOC */ + +bitmap_handle: + if (cam_id >= 0) + cam_ctl->bitmap |= BIT(cam_id); + + _exit_critical_bh(&cam_ctl->lock, &irqL); + + return cam_id; +} + +void rtw_camid_free(_adapter *adapter, u8 cam_id) +{ + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl; + _irqL irqL; + + _enter_critical_bh(&cam_ctl->lock, &irqL); + + if (cam_id < TOTAL_CAM_ENTRY) + cam_ctl->bitmap &= ~(BIT(cam_id)); + + _exit_critical_bh(&cam_ctl->lock, &irqL); } int allocate_fw_sta_entry(_adapter *padapter) @@ -979,46 +1229,58 @@ int allocate_fw_sta_entry(_adapter *padapter) void flush_all_cam_entry(_adapter *padapter) { - struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - -#ifdef CONFIG_CONCURRENT_MODE - + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - //if(check_buddy_mlmeinfo_state(padapter, _HW_STATE_NOLINK_)) - if(check_buddy_fwstate(padapter, _FW_LINKED) == _FALSE) - { - rtw_hal_set_hwreg(padapter, HW_VAR_CAM_INVALID_ALL, 0); - } - else +#ifdef CONFIG_CONCURRENT_MODE + if(check_buddy_fwstate(padapter, _FW_LINKED) == _TRUE) { if(check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { struct sta_priv *pstapriv = &padapter->stapriv; struct sta_info *psta; - u8 cam_id;//cam_entry psta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress); if(psta) { if(psta->state & WIFI_AP_STATE) {} //clear cam when ap free per sta_info else { - cam_id = (u8)rtw_get_camid(psta->mac_id); - rtw_clearstakey_cmd(padapter, (u8*)psta, cam_id, _FALSE); - } + rtw_clearstakey_cmd(padapter, psta, _FALSE); + } } } else if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) { - //clear cam when ap free per sta_info - } - } -#else //CONFIG_CONCURRENT_MODE + /* clear default key */ + int i, cam_id; + u8 null_addr[ETH_ALEN]= {0,0,0,0,0,0}; + + for (i=0;i<4;i++) { + cam_id = rtw_camid_search(padapter, null_addr, i); + if (cam_id >= 0) { + clear_cam_entry(padapter, cam_id); + rtw_camid_free(padapter, cam_id); + } + } - rtw_hal_set_hwreg(padapter, HW_VAR_CAM_INVALID_ALL, 0); + /* clear default key related key search setting */ + #ifdef DYNAMIC_CAMID_ALLOC + rtw_hal_set_hwreg(padapter, HW_VAR_SEC_DK_CFG, (u8*)_FALSE); + #endif + /* leave pairwise key when ap free per sta_info */ + } + } + else #endif //CONFIG_CONCURRENT_MODE + { + invalidate_cam_all(padapter); + /* clear default key related key search setting */ + #ifdef DYNAMIC_CAMID_ALLOC + rtw_hal_set_hwreg(padapter, HW_VAR_SEC_DK_CFG, (u8*)_FALSE); + #endif + } _rtw_memset((u8 *)(pmlmeinfo->FW_sta_info), 0, sizeof(pmlmeinfo->FW_sta_info)); @@ -1425,29 +1687,28 @@ void HT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); - //update the MCS rates + + //update the MCS set for (i = 0; i < 16; i++) + pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= pmlmeext->default_supported_mcs_set[i]; + + //update the MCS rates + switch(rf_type) { - if((rf_type == RF_1T1R) || (rf_type == RF_1T2R)) - { - pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; - } - else - { - #ifdef CONFIG_DISABLE_MCS13TO15 - if(pmlmeext->cur_bwmode == CHANNEL_WIDTH_40 && (pregistrypriv->wifi_spec!=1)) - pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_2R_MCS13TO15_OFF[i]; + case RF_1T1R: + case RF_1T2R: + set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_1R); + break; + case RF_2T2R: + default: +#ifdef CONFIG_DISABLE_MCS13TO15 + if(pmlmeext->cur_bwmode == CHANNEL_WIDTH_40 && pregistrypriv->wifi_spec != 1 ) + set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_2R_13TO15_OFF); else - pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_2R[i]; - #else - pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_2R[i]; - #endif //CONFIG_DISABLE_MCS13TO15 - } - #ifdef RTL8192C_RECONFIG_TO_1T1R - { - pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; - } - #endif + set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_2R); +#else //CONFIG_DISABLE_MCS13TO15 + set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_2R); +#endif //CONFIG_DISABLE_MCS13TO15 } if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) { @@ -1515,7 +1776,6 @@ void HT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) } #endif //CONFIG_80211N_HT - return; } void HT_info_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) @@ -1755,6 +2015,7 @@ int rtw_check_bcn_info(ADAPTER *Adapter, u8 *pframe, u32 packet_len) u32 bcn_channel; unsigned short ht_cap_info; unsigned char ht_info_infos_0; + struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; if (is_client_associated_to_ap(Adapter) == _FALSE) return _TRUE; @@ -1778,6 +2039,12 @@ int rtw_check_bcn_info(ADAPTER *Adapter, u8 *pframe, u32 packet_len) return _TRUE; } + if ((pmlmepriv->timeBcnInfoChkStart != 0) && (rtw_get_passing_time_ms(pmlmepriv->timeBcnInfoChkStart) > DISCONNECT_BY_CHK_BCN_FAIL_OBSERV_PERIOD_IN_MS)) + { + pmlmepriv->timeBcnInfoChkStart = 0; + pmlmepriv->NumOfBcnInfoChkFail = 0; + } + subtype = GetFrameSubType(pframe) >> 4; if(subtype==WIFI_BEACON) @@ -1812,7 +2079,7 @@ int rtw_check_bcn_info(ADAPTER *Adapter, u8 *pframe, u32 packet_len) ht_cap_info, ht_info_infos_0); DBG_871X("%s bcn link: ht_cap_info:%x ht_info_infos_0:%x\n", __func__, cur_network->BcnInfo.ht_cap_info, cur_network->BcnInfo.ht_info_infos_0); - DBG_871X("%s bw mode change, disconnect\n", __func__); + DBG_871X("%s bw mode change\n", __func__); { //bcn_info_update cur_network->BcnInfo.ht_cap_info = ht_cap_info; @@ -1865,7 +2132,7 @@ int rtw_check_bcn_info(ADAPTER *Adapter, u8 *pframe, u32 packet_len) if (_rtw_memcmp(bssid->Ssid.Ssid, cur_network->network.Ssid.Ssid, 32) == _FALSE || bssid->Ssid.SsidLength != cur_network->network.Ssid.SsidLength) { if (bssid->Ssid.Ssid[0] != '\0' && bssid->Ssid.SsidLength != 0) { /* not hidden ssid */ - DBG_871X("%s(), SSID is not match return FAIL\n", __func__); + DBG_871X("%s(), SSID is not match\n", __func__); goto _mismatch; } } @@ -1882,7 +2149,7 @@ int rtw_check_bcn_info(ADAPTER *Adapter, u8 *pframe, u32 packet_len) ("%s(): cur_network->network.Privacy is %d, bssid.Privacy is %d\n", __func__, cur_network->network.Privacy,bssid->Privacy)); if (cur_network->network.Privacy != bssid->Privacy) { - DBG_871X("%s(), privacy is not match return FAIL\n",__func__); + DBG_871X("%s(), privacy is not match\n",__func__); goto _mismatch; } @@ -1898,7 +2165,7 @@ int rtw_check_bcn_info(ADAPTER *Adapter, u8 *pframe, u32 packet_len) } if (cur_network->BcnInfo.encryp_protocol != encryp_protocol) { - DBG_871X("%s(): enctyp is not match ,return FAIL\n",__func__); + DBG_871X("%s(): enctyp is not match\n",__func__); goto _mismatch; } @@ -1925,14 +2192,14 @@ int rtw_check_bcn_info(ADAPTER *Adapter, u8 *pframe, u32 packet_len) RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_, ("%s cur_network->group_cipher is %d: %d\n",__func__, cur_network->BcnInfo.group_cipher, group_cipher)); if (pairwise_cipher != cur_network->BcnInfo.pairwise_cipher || group_cipher != cur_network->BcnInfo.group_cipher) { - DBG_871X("%s pairwise_cipher(%x:%x) or group_cipher(%x:%x) is not match ,return FAIL\n",__func__, + DBG_871X("%s pairwise_cipher(%x:%x) or group_cipher(%x:%x) is not match\n",__func__, pairwise_cipher, cur_network->BcnInfo.pairwise_cipher, group_cipher, cur_network->BcnInfo.group_cipher); goto _mismatch; } if (is_8021x != cur_network->BcnInfo.is_8021x) { - DBG_871X("%s authentication is not match ,return FAIL\n", __func__); + DBG_871X("%s authentication is not match\n", __func__); goto _mismatch; } } @@ -1942,7 +2209,26 @@ int rtw_check_bcn_info(ADAPTER *Adapter, u8 *pframe, u32 packet_len) _mismatch: rtw_mfree((u8 *)bssid, sizeof(WLAN_BSSID_EX)); - return _FAIL; + + if (pmlmepriv->NumOfBcnInfoChkFail == 0) + { + pmlmepriv->timeBcnInfoChkStart = rtw_get_current_time(); + } + + pmlmepriv->NumOfBcnInfoChkFail++; + DBG_871X("%s by "ADPT_FMT" - NumOfChkFail = %d (SeqNum of this Beacon frame = %d).\n", __func__, ADPT_ARG(Adapter), pmlmepriv->NumOfBcnInfoChkFail, GetSequence(pframe)); + + if ((pmlmepriv->timeBcnInfoChkStart != 0) && (rtw_get_passing_time_ms(pmlmepriv->timeBcnInfoChkStart) <= DISCONNECT_BY_CHK_BCN_FAIL_OBSERV_PERIOD_IN_MS) + && (pmlmepriv->NumOfBcnInfoChkFail >= DISCONNECT_BY_CHK_BCN_FAIL_THRESHOLD)) + { + DBG_871X("%s by "ADPT_FMT" - NumOfChkFail = %d >= threshold : %d (in %d ms), return FAIL.\n", __func__, ADPT_ARG(Adapter), pmlmepriv->NumOfBcnInfoChkFail, + DISCONNECT_BY_CHK_BCN_FAIL_THRESHOLD, rtw_get_passing_time_ms(pmlmepriv->timeBcnInfoChkStart)); + pmlmepriv->timeBcnInfoChkStart = 0; + pmlmepriv->NumOfBcnInfoChkFail = 0; + return _FAIL; + } + + return _SUCCESS; } void update_beacon_info(_adapter *padapter, u8 *pframe, uint pkt_len, struct sta_info *psta) @@ -1965,8 +2251,8 @@ void update_beacon_info(_adapter *padapter, u8 *pframe, uint pkt_len, struct sta switch (pIE->ElementID) { case _VENDOR_SPECIFIC_IE_: - //to update WMM paramter set while receiving beacon - if (_rtw_memcmp(pIE->data, WMM_PARA_OUI, 6)) //WMM + //to update WMM paramter set while receiving beacon + if (_rtw_memcmp(pIE->data, WMM_PARA_OUI, 6) && pIE->Length == WLAN_WMM_LEN) //WMM { (WMM_param_handler(padapter, pIE))? report_wmm_edca_update(padapter): 0; } @@ -2878,25 +3164,6 @@ void beacon_timing_control(_adapter *padapter) rtw_hal_bcn_related_reg_setting(padapter); } -uint rtw_get_camid(uint macid) -{ - uint camid; - - //camid 0, 1, 2, 3 is default entry for default key/group key - //macid = 1 is for bc/mc stainfo, no mapping to camid - //macid = 0 mapping to camid 4 - //for macid >=2, camid = macid+3; - - if(macid==0) - camid = 4; - else if(macid >=2) - camid = macid + 3; - else - camid = 4; - - return camid; -} - void rtw_alloc_macid(_adapter *padapter, struct sta_info *psta) { int i; @@ -3162,6 +3429,49 @@ _adapter *dvobj_get_port0_adapter(struct dvobj_priv *dvobj) return port0_iface; } +/* + * Description: + * rtw_check_invalid_mac_address: + * This is only used for checking mac address valid or not. + * + * Input: + * adapter: mac_address pointer. + * + * Output: + * _TRUE: The mac address is invalid. + * _FALSE: The mac address is valid. + * + * Auther: Isaac.Li + */ +u8 rtw_check_invalid_mac_address(u8 *mac_addr) { + u8 null_mac_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0}; + u8 multi_mac_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; + u8 res = _FALSE; + + if (_rtw_memcmp(mac_addr, null_mac_addr, ETH_ALEN)) { + res = _TRUE; + goto func_exit; + } + + if (_rtw_memcmp(mac_addr, multi_mac_addr, ETH_ALEN)) { + res = _TRUE; + goto func_exit; + } + + if (mac_addr[0] & BIT0) { + res = _TRUE; + goto func_exit; + } + + if (mac_addr[0] & BIT1) { + res = _TRUE; + goto func_exit; + } + +func_exit: + return res; +} + /* * Description: * dump_TX_FIFO: This is only used to dump TX_FIFO for debug WoW mode offload @@ -3206,6 +3516,109 @@ void dump_TX_FIFO(_adapter* padapter, u8 page_num, u16 page_size){ } } +#ifdef CONFIG_GPIO_API +int rtw_get_gpio(struct net_device *netdev, int gpio_num) +{ + u8 value; + u8 direction; + _adapter *adapter = (_adapter *)rtw_netdev_priv(netdev); + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); + + rtw_ps_deny(adapter, PS_DENY_IOCTL); + + DBG_871X("rf_pwrstate=0x%02x\n", pwrpriv->rf_pwrstate); + LeaveAllPowerSaveModeDirect(adapter); + + /* Read GPIO Direction */ + direction = (rtw_read8(adapter,REG_GPIO_PIN_CTRL + 2) & BIT(gpio_num)) >> gpio_num; + + /* According the direction to read register value */ + if( direction ) + value = (rtw_read8(adapter, REG_GPIO_PIN_CTRL + 1)& BIT(gpio_num)) >> gpio_num; + else + value = (rtw_read8(adapter, REG_GPIO_PIN_CTRL)& BIT(gpio_num)) >> gpio_num; + + rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL); + DBG_871X("%s direction=%d value=%d\n",__FUNCTION__,direction,value); + + return value; +} +EXPORT_SYMBOL(rtw_get_gpio); + +int rtw_set_gpio_output_value(struct net_device *netdev, int gpio_num, BOOLEAN isHigh) +{ + u8 direction = 0; + u8 res = -1; + _adapter *adapter = (_adapter *)rtw_netdev_priv(netdev); + + /* Check GPIO is 4~7 */ + if( gpio_num > 7 || gpio_num < 4) + { + DBG_871X("%s The gpio number does not included 4~7.\n",__FUNCTION__); + return -1; + } + + rtw_ps_deny(adapter, PS_DENY_IOCTL); + + LeaveAllPowerSaveModeDirect(adapter); + + /* Read GPIO direction */ + direction = (rtw_read8(adapter,REG_GPIO_PIN_CTRL + 2) & BIT(gpio_num)) >> gpio_num; + + /* If GPIO is output direction, setting value. */ + if( direction ) + { + if(isHigh) + rtw_write8(adapter, REG_GPIO_PIN_CTRL + 1, rtw_read8(adapter, REG_GPIO_PIN_CTRL + 1) | BIT(gpio_num)); + else + rtw_write8(adapter, REG_GPIO_PIN_CTRL + 1, rtw_read8(adapter, REG_GPIO_PIN_CTRL + 1) & ~BIT(gpio_num)); + + DBG_871X("%s Set gpio %x[%d]=%d\n",__FUNCTION__,REG_GPIO_PIN_CTRL+1,gpio_num,isHigh ); + res = 0; + } + else + { + DBG_871X("%s The gpio is input,not be set!\n",__FUNCTION__); + res = -1; + } + + rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL); + return res; +} +EXPORT_SYMBOL(rtw_set_gpio_output_value); + +int rtw_config_gpio(struct net_device *netdev, int gpio_num, BOOLEAN isOutput) +{ + _adapter *adapter = (_adapter *)rtw_netdev_priv(netdev); + + if( gpio_num > 7 || gpio_num < 4) + { + DBG_871X("%s The gpio number does not included 4~7.\n",__FUNCTION__); + return -1; + } + + DBG_871X("%s gpio_num =%d direction=%d\n",__FUNCTION__,gpio_num,isOutput); + + rtw_ps_deny(adapter, PS_DENY_IOCTL); + + LeaveAllPowerSaveModeDirect(adapter); + + if( isOutput ) + { + rtw_write8(adapter, REG_GPIO_PIN_CTRL + 2, rtw_read8(adapter, REG_GPIO_PIN_CTRL + 2) | BIT(gpio_num)); + } + else + { + rtw_write8(adapter, REG_GPIO_PIN_CTRL + 2, rtw_read8(adapter, REG_GPIO_PIN_CTRL + 2) & ~BIT(gpio_num)); + } + + rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL); + + return 0; +} +EXPORT_SYMBOL(rtw_config_gpio); +#endif + #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) void rtw_get_current_ip_address(PADAPTER padapter, u8 *pcurrentip) { @@ -3529,9 +3942,12 @@ int rtw_dev_pno_set(struct net_device *net, pno_ssid_t* ssid, int num, pwrctl->pscan_info == NULL || pwrctl->pno_ssid_list == NULL){ DBG_871X("%s, ERROR: alloc nlo_info, ssid_list, scan_info fail\n", __func__); - return -1; + goto failing; } + pwrctl->pno_in_resume = _FALSE; + + pwrctl->pno_inited = _TRUE; /* NLO Info */ ret = rtw_dev_nlo_info_set(pwrctl->pnlo_info, ssid, num, pno_time, pno_repeat, pno_freq_expo_max); @@ -3547,6 +3963,22 @@ int rtw_dev_pno_set(struct net_device *net, pno_ssid_t* ssid, int num, __func__, num, pno_time, pno_repeat, pno_freq_expo_max); return 0; + +failing: + if (pwrctl->pnlo_info) { + rtw_mfree(pwrctl->pnlo_info, sizeof(pno_nlo_info_t)); + pwrctl->pnlo_info = NULL; + } + if (pwrctl->pno_ssid_list) { + rtw_mfree(pwrctl->pno_ssid_list, sizeof(pno_ssid_list_t)); + pwrctl->pno_ssid_list = NULL; + } + if (pwrctl->pscan_info) { + rtw_mfree(pwrctl->pscan_info, sizeof(pno_scan_info_t)); + pwrctl->pscan_info = NULL; + } + + return -1; } #ifdef CONFIG_PNO_SET_DEBUG diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_xmit.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_xmit.c old mode 100644 new mode 100755 index a501d42fa486..79c3b6185ced --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_xmit.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/core/rtw_xmit.c @@ -68,9 +68,7 @@ s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, _adapter *padapter) struct xmit_buf *pxmitbuf; struct xmit_frame *pxframe; sint res=_SUCCESS; - u32 max_xmit_extbuf_size = MAX_XMIT_EXTBUF_SZ; - u32 num_xmit_extbuf = NR_XMIT_EXTBUFF; - + _func_enter_; // We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc(). @@ -201,7 +199,7 @@ _func_enter_; /* init xframe_ext queue, the same count as extbuf */ _rtw_init_queue(&pxmitpriv->free_xframe_ext_queue); - pxmitpriv->xframe_ext_alloc_addr = rtw_zvmalloc(num_xmit_extbuf * sizeof(struct xmit_frame) + 4); + pxmitpriv->xframe_ext_alloc_addr = rtw_zvmalloc(NR_XMIT_EXTBUFF * sizeof(struct xmit_frame) + 4); if (pxmitpriv->xframe_ext_alloc_addr == NULL){ pxmitpriv->xframe_ext = NULL; @@ -212,7 +210,7 @@ _func_enter_; pxmitpriv->xframe_ext = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitpriv->xframe_ext_alloc_addr), 4); pxframe = (struct xmit_frame*)pxmitpriv->xframe_ext; - for (i = 0; i < num_xmit_extbuf; i++) { + for (i = 0; i < NR_XMIT_EXTBUFF; i++) { _rtw_init_listhead(&(pxframe->list)); pxframe->padapter = padapter; @@ -229,12 +227,12 @@ _func_enter_; pxframe++; } - pxmitpriv->free_xframe_ext_cnt = num_xmit_extbuf; + pxmitpriv->free_xframe_ext_cnt = NR_XMIT_EXTBUFF; // Init xmit extension buff _rtw_init_queue(&pxmitpriv->free_xmit_extbuf_queue); - pxmitpriv->pallocated_xmit_extbuf = rtw_zvmalloc(num_xmit_extbuf * sizeof(struct xmit_buf) + 4); + pxmitpriv->pallocated_xmit_extbuf = rtw_zvmalloc(NR_XMIT_EXTBUFF * sizeof(struct xmit_buf) + 4); if (pxmitpriv->pallocated_xmit_extbuf == NULL){ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("alloc xmit_extbuf fail!\n")); @@ -246,7 +244,7 @@ _func_enter_; pxmitbuf = (struct xmit_buf*)pxmitpriv->pxmit_extbuf; - for (i = 0; i < num_xmit_extbuf; i++) + for (i = 0; i < NR_XMIT_EXTBUFF; i++) { _rtw_init_listhead(&pxmitbuf->list); @@ -254,14 +252,14 @@ _func_enter_; pxmitbuf->padapter = padapter; pxmitbuf->buf_tag = XMITBUF_MGNT; - if((res=rtw_os_xmit_resource_alloc(padapter, pxmitbuf,max_xmit_extbuf_size + XMITBUF_ALIGN_SZ, _TRUE)) == _FAIL) { + if((res=rtw_os_xmit_resource_alloc(padapter, pxmitbuf,MAX_XMIT_EXTBUF_SZ + XMITBUF_ALIGN_SZ, _TRUE)) == _FAIL) { res= _FAIL; goto exit; } #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) pxmitbuf->phead = pxmitbuf->pbuf; - pxmitbuf->pend = pxmitbuf->pbuf + max_xmit_extbuf_size; + pxmitbuf->pend = pxmitbuf->pbuf + MAX_XMIT_EXTBUF_SZ; pxmitbuf->len = 0; pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->phead; #endif @@ -274,29 +272,30 @@ _func_enter_; } - pxmitpriv->free_xmit_extbuf_cnt = num_xmit_extbuf; + pxmitpriv->free_xmit_extbuf_cnt = NR_XMIT_EXTBUFF; + for (i = 0; ipcmd_xmitbuf[i]; + if (pxmitbuf) { + _rtw_init_listhead(&pxmitbuf->list); - pxmitbuf = &pxmitpriv->pcmd_xmitbuf; - if (pxmitbuf) { - _rtw_init_listhead(&pxmitbuf->list); - - pxmitbuf->priv_data = NULL; - pxmitbuf->padapter = padapter; - pxmitbuf->buf_tag = XMITBUF_CMD; + pxmitbuf->priv_data = NULL; + pxmitbuf->padapter = padapter; + pxmitbuf->buf_tag = XMITBUF_CMD; - if((res=rtw_os_xmit_resource_alloc(padapter, pxmitbuf, MAX_CMDBUF_SZ+XMITBUF_ALIGN_SZ, _TRUE)) == _FAIL) { - res= _FAIL; - goto exit; - } + if((res=rtw_os_xmit_resource_alloc(padapter, pxmitbuf, MAX_CMDBUF_SZ+XMITBUF_ALIGN_SZ, _TRUE)) == _FAIL) { + res= _FAIL; + goto exit; + } #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) - pxmitbuf->phead = pxmitbuf->pbuf; - pxmitbuf->pend = pxmitbuf->pbuf + MAX_CMDBUF_SZ; - pxmitbuf->len = 0; - pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->phead; + pxmitbuf->phead = pxmitbuf->pbuf; + pxmitbuf->pend = pxmitbuf->pbuf + MAX_CMDBUF_SZ; + pxmitbuf->len = 0; + pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->phead; #endif - pxmitbuf->alloc_sz = MAX_CMDBUF_SZ+XMITBUF_ALIGN_SZ; + pxmitbuf->alloc_sz = MAX_CMDBUF_SZ+XMITBUF_ALIGN_SZ; + } } rtw_alloc_hwxmits(padapter); @@ -363,15 +362,7 @@ void _rtw_free_xmit_priv (struct xmit_priv *pxmitpriv) _adapter *padapter = pxmitpriv->adapter; struct xmit_frame *pxmitframe = (struct xmit_frame*) pxmitpriv->pxmit_frame_buf; struct xmit_buf *pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmitbuf; - u32 max_xmit_extbuf_size = MAX_XMIT_EXTBUF_SZ; - u32 num_xmit_extbuf = NR_XMIT_EXTBUFF; -#if defined(CONFIG_MP_INCLUDED) && (defined(CONFIG_RTL8723A) ||defined(CONFIG_RTL8723B)) - if (padapter->registrypriv.mp_mode) { - max_xmit_extbuf_size = 20000; - num_xmit_extbuf = 1; - } -#endif - + _func_enter_; rtw_hal_free_xmit_priv(padapter); @@ -406,33 +397,35 @@ void _rtw_free_xmit_priv (struct xmit_priv *pxmitpriv) /* free xframe_ext queue, the same count as extbuf */ if ((pxmitframe = (struct xmit_frame*)pxmitpriv->xframe_ext)) { - for (i=0; ixframe_ext_alloc_addr) - rtw_vmfree(pxmitpriv->xframe_ext_alloc_addr, num_xmit_extbuf * sizeof(struct xmit_frame) + 4); + rtw_vmfree(pxmitpriv->xframe_ext_alloc_addr, NR_XMIT_EXTBUFF * sizeof(struct xmit_frame) + 4); _rtw_spinlock_free(&pxmitpriv->free_xframe_ext_queue.lock); // free xmit extension buff _rtw_spinlock_free(&pxmitpriv->free_xmit_extbuf_queue.lock); pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmit_extbuf; - for(i=0; ipallocated_xmit_extbuf) { - rtw_vmfree(pxmitpriv->pallocated_xmit_extbuf, num_xmit_extbuf * sizeof(struct xmit_buf) + 4); + rtw_vmfree(pxmitpriv->pallocated_xmit_extbuf, NR_XMIT_EXTBUFF * sizeof(struct xmit_buf) + 4); } - pxmitbuf = &pxmitpriv->pcmd_xmitbuf; - if(pxmitbuf!=NULL) - rtw_os_xmit_resource_free(padapter, pxmitbuf, MAX_CMDBUF_SZ+XMITBUF_ALIGN_SZ , _TRUE); + for (i=0; ipcmd_xmitbuf[i]; + if(pxmitbuf!=NULL) + rtw_os_xmit_resource_free(padapter, pxmitbuf, MAX_CMDBUF_SZ+XMITBUF_ALIGN_SZ , _TRUE); + } rtw_free_hwxmits(padapter); @@ -612,23 +605,38 @@ static void update_attrib_vcs_info(_adapter *padapter, struct xmit_frame *pxmitf break; } } + + //for debug : force driver control vrtl_carrier_sense. + if(padapter->driver_vcs_en==1) + { + //u8 driver_vcs_en; //Enable=1, Disable=0 driver control vrtl_carrier_sense. + //u8 driver_vcs_type;//force 0:disable VCS, 1:RTS-CTS, 2:CTS-to-self when vcs_en=1. + pattrib->vcs_mode = padapter->driver_vcs_type; + } + } -static void update_attrib_phy_info(struct pkt_attrib *pattrib, struct sta_info *psta) +static void update_attrib_phy_info(_adapter *padapter, struct pkt_attrib *pattrib, struct sta_info *psta) { + struct mlme_ext_priv *mlmeext = &padapter->mlmeextpriv; + pattrib->rtsen = psta->rtsen; pattrib->cts2self = psta->cts2self; pattrib->mdata = 0; pattrib->eosp = 0; pattrib->triggered=0; + pattrib->ampdu_spacing = 0; //qos_en, ht_en, init rate, ,bw, ch_offset, sgi pattrib->qos_en = psta->qos_option; pattrib->raid = psta->raid; - pattrib->bwmode = psta->bw_mode; + if (mlmeext->cur_bwmode < psta->bw_mode) + pattrib->bwmode = mlmeext->cur_bwmode; + else + pattrib->bwmode = psta->bw_mode; pattrib->sgi = query_ra_short_GI(psta); @@ -639,6 +647,11 @@ static void update_attrib_phy_info(struct pkt_attrib *pattrib, struct sta_info * pattrib->ht_en = psta->htpriv.ht_option; pattrib->ch_offset = psta->htpriv.ch_offset; pattrib->ampdu_en = _FALSE; + + if(padapter->driver_ampdu_spacing != 0xFF) //driver control AMPDU Density for peer sta's rx + pattrib->ampdu_spacing = padapter->driver_ampdu_spacing; + else + pattrib->ampdu_spacing = psta->htpriv.rx_ampdu_min_spacing; #endif //CONFIG_80211N_HT //if(pattrib->ht_en && psta->htpriv.ampdu_enable) //{ @@ -792,7 +805,7 @@ static s32 update_attrib_sec_info(_adapter *padapter, struct pkt_attrib *pattrib RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("update_attrib: bswenc=_FALSE\n")); } -#ifdef CONFIG_CONCURRENT_MODE +#if defined(CONFIG_CONCURRENT_MODE) && !defined(DYNAMIC_CAMID_ALLOC) if((pattrib->encrypt && bmcast) || (pattrib->encrypt ==_WEP40_) || (pattrib->encrypt ==_WEP104_)) { pattrib->bswenc = _TRUE;//force using sw enc. @@ -941,7 +954,7 @@ s32 update_tdls_attrib(_adapter *padapter, struct pkt_attrib *pattrib) goto exit; } - update_attrib_phy_info(pattrib, psta); + update_attrib_phy_info(padapter, pattrib, psta); exit: @@ -967,6 +980,8 @@ static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattr _func_enter_; + DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib); + _rtw_open_pktfile(pkt, &pktfile); i = _rtw_pktfile_read(&pktfile, (u8*)ðerhdr, ETH_HLEN); @@ -980,16 +995,21 @@ static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattr if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) || (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) { _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); - _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); + _rtw_memcpy(pattrib->ta, myid(&padapter->eeprompriv), ETH_ALEN); + DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_adhoc); } else if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); - _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); + _rtw_memcpy(pattrib->ta, myid(&padapter->eeprompriv), ETH_ALEN); + DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_sta); } else if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) { _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); _rtw_memcpy(pattrib->ta, get_bssid(pmlmepriv), ETH_ALEN); - } + DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_ap); + } + else + DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_unknown); #ifdef CONFIG_TDLS rtw_check_tdls_established(padapter, pattrib); @@ -1024,6 +1044,7 @@ static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattr // pTcb->DataRate = Adapter->MgntInfo.LowestBasicRate; //RTPRINT(FDM, WA_IOT, ("DHCP TranslateHeader(), pTcb->DataRate = 0x%x\n", pTcb->DataRate)); pattrib->dhcp_pkt = 1; + DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_dhcp); } } } @@ -1034,7 +1055,10 @@ static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattr pattrib->icmp_pkt = 0; if(piphdr->protocol == 0x1) // protocol type in ip header 0x1 is ICMP + { pattrib->icmp_pkt = 1; + DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_icmp); + } } @@ -1064,6 +1088,7 @@ static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattr #endif #endif { + DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_active); rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_SPECIAL_PACKET, 1); } #endif //CONFIG_LPS @@ -1075,7 +1100,8 @@ static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattr psta = rtw_get_bcmc_stainfo(padapter); } else { psta = rtw_get_stainfo(pstapriv, pattrib->ra); - if (psta == NULL) { // if we cannot get psta => drrp the pkt + if (psta == NULL) { // if we cannot get psta => drop the pkt + DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_err_ucast_sta); RT_TRACE(_module_rtl871x_xmit_c_, _drv_alert_, ("\nupdate_attrib => get sta_info fail, ra:" MAC_FMT"\n", MAC_ARG(pattrib->ra))); #ifdef DBG_TX_DROP_FRAME DBG_871X("DBG_TX_DROP_FRAME %s get sta_info fail, ra:" MAC_FMT"\n", __FUNCTION__, MAC_ARG(pattrib->ra)); @@ -1085,6 +1111,7 @@ static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattr } else if((check_fwstate(pmlmepriv, WIFI_AP_STATE)==_TRUE)&&(!(psta->state & _FW_LINKED))) { + DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_err_ucast_ap_link); res =_FAIL; goto exit; } @@ -1092,6 +1119,7 @@ static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattr if(psta == NULL) { // if we cannot get psta => drop the pkt + DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_err_sta); RT_TRACE(_module_rtl871x_xmit_c_, _drv_alert_, ("\nupdate_attrib => get sta_info fail, ra:" MAC_FMT "\n", MAC_ARG(pattrib->ra))); #ifdef DBG_TX_DROP_FRAME DBG_871X("DBG_TX_DROP_FRAME %s get sta_info fail, ra:" MAC_FMT"\n", __FUNCTION__, MAC_ARG(pattrib->ra)); @@ -1102,6 +1130,7 @@ static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattr if(!(psta->state &_FW_LINKED)) { + DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_err_link); DBG_871X("%s, psta("MAC_FMT")->state(0x%x) != _FW_LINKED\n", __func__, MAC_ARG(psta->hwaddr), psta->state); return _FAIL; } @@ -1111,11 +1140,12 @@ static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattr //TODO:_lock if(update_attrib_sec_info(padapter, pattrib, psta) == _FAIL) { + DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_err_sec); res = _FAIL; goto exit; } - update_attrib_phy_info(pattrib, psta); + update_attrib_phy_info(padapter, pattrib, psta); //DBG_8192C("%s ==> mac_id(%d)\n",__FUNCTION__,pattrib->mac_id ); @@ -1404,8 +1434,6 @@ _func_enter_; if (pattrib->subtype & WIFI_DATA_TYPE) { if ((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)) { - //to_ds = 1, fr_ds = 0; - #ifdef CONFIG_TDLS if(pattrib->direct_link == _TRUE){ //TDLS data transfer, ToDS=0, FrDs=0 @@ -1416,11 +1444,12 @@ _func_enter_; else #endif //CONFIG_TDLS { + //to_ds = 1, fr_ds = 0; // 1.Data transfer to AP // 2.Arp pkt will relayed by AP SetToDs(fctrl); _rtw_memcpy(pwlanhdr->addr1, get_bssid(pmlmepriv), ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, pattrib->ta, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, pattrib->dst, ETH_ALEN); } @@ -1441,7 +1470,7 @@ _func_enter_; else if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) || (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) { _rtw_memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN); - _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, pattrib->ta, ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, get_bssid(pmlmepriv), ETH_ALEN); if(pattrib->qos_en) @@ -2525,13 +2554,14 @@ void rtw_count_tx_stats(PADAPTER padapter, struct xmit_frame *pxmitframe, int sz } } -struct xmit_buf *rtw_alloc_cmd_xmitbuf(struct xmit_priv *pxmitpriv) +static struct xmit_buf *__rtw_alloc_cmd_xmitbuf(struct xmit_priv *pxmitpriv, + enum cmdbuf_type buf_type) { struct xmit_buf *pxmitbuf = NULL; _func_enter_; - pxmitbuf = &pxmitpriv->pcmd_xmitbuf; + pxmitbuf = &pxmitpriv->pcmd_xmitbuf[buf_type]; if (pxmitbuf != NULL) { pxmitbuf->priv_data = NULL; @@ -2543,6 +2573,7 @@ _func_enter_; #endif #ifdef CONFIG_PCI_HCI pxmitbuf->len = 0; + pxmitbuf->desc = NULL; #endif if (pxmitbuf->sctx) { @@ -2560,27 +2591,8 @@ _func_exit_; return pxmitbuf; } -s32 rtw_free_cmd_xmitbuf(struct xmit_priv *pxmitpriv) -{ - struct xmit_buf *pxmitbuf = NULL; - -_func_enter_; - - pxmitbuf = &pxmitpriv->pcmd_xmitbuf; - if (pxmitbuf==NULL) { - DBG_871X("%s fail, no xmitbuf available !!!\n", __func__); - return _FAIL; - } else { - rtw_os_xmit_resource_free(pxmitbuf->padapter, pxmitbuf, pxmitbuf->alloc_sz, _FALSE); - pxmitbuf->pallocated_buf = NULL; - } - -_func_exit_; - - return _SUCCESS; -} - -struct xmit_frame *rtw_alloc_cmdxmitframe(struct xmit_priv *pxmitpriv) +struct xmit_frame *__rtw_alloc_cmdxmitframe(struct xmit_priv *pxmitpriv, + enum cmdbuf_type buf_type) { struct xmit_frame *pcmdframe; struct xmit_buf *pxmitbuf; @@ -2591,7 +2603,7 @@ struct xmit_frame *rtw_alloc_cmdxmitframe(struct xmit_priv *pxmitpriv) return NULL; } - if ((pxmitbuf = rtw_alloc_cmd_xmitbuf(pxmitpriv)) == NULL) { + if ((pxmitbuf = __rtw_alloc_cmd_xmitbuf(pxmitpriv, buf_type)) == NULL) { DBG_871X("%s, alloc xmitbuf fail\n", __FUNCTION__); rtw_free_xmitframe(pxmitpriv, pcmdframe); return NULL; @@ -2650,6 +2662,7 @@ _func_enter_; #endif #ifdef CONFIG_PCI_HCI pxmitbuf->len = 0; + pxmitbuf->desc = NULL; #endif if (pxmitbuf->sctx) { @@ -2739,6 +2752,7 @@ _func_enter_; #endif #ifdef CONFIG_PCI_HCI pxmitbuf->len = 0; + pxmitbuf->desc = NULL; #endif if (pxmitbuf->sctx) { @@ -3046,6 +3060,7 @@ _func_exit_; s32 rtw_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe) { + DBG_COUNTER(padapter->tx_logs.core_tx_enqueue); if (rtw_xmit_classifier(padapter, pxmitframe) == _FAIL) { RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, @@ -3312,6 +3327,8 @@ s32 rtw_xmit_classifier(_adapter *padapter, struct xmit_frame *pxmitframe) _func_enter_; + DBG_COUNTER(padapter->tx_logs.core_tx_enqueue_class); + /* if (pattrib->psta) { psta = pattrib->psta; @@ -3324,11 +3341,13 @@ _func_enter_; psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); if(pattrib->psta != psta) { + DBG_COUNTER(padapter->tx_logs.core_tx_enqueue_class_err_sta); DBG_871X("%s, pattrib->psta(%p) != psta(%p)\n", __func__, pattrib->psta, psta); return _FAIL; } if (psta == NULL) { + DBG_COUNTER(padapter->tx_logs.core_tx_enqueue_class_err_nosta); res = _FAIL; DBG_8192C("rtw_xmit_classifier: psta == NULL\n"); RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("rtw_xmit_classifier: psta == NULL\n")); @@ -3337,6 +3356,7 @@ _func_enter_; if(!(psta->state &_FW_LINKED)) { + DBG_COUNTER(padapter->tx_logs.core_tx_enqueue_class_err_fwlink); DBG_871X("%s, psta->state(0x%x) != _FW_LINKED\n", __func__, psta->state); return _FAIL; } @@ -3722,6 +3742,8 @@ s32 rtw_xmit(_adapter *padapter, _pkt **ppkt) s32 res; + DBG_COUNTER(padapter->tx_logs.core_tx); + if (start == 0) start = rtw_get_current_time(); @@ -3737,6 +3759,7 @@ s32 rtw_xmit(_adapter *padapter, _pkt **ppkt) if (pxmitframe == NULL) { drop_cnt ++; RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("rtw_xmit: no more pxmitframe\n")); + DBG_COUNTER(padapter->tx_logs.core_tx_err_pxmitframe); return -1; } @@ -3756,6 +3779,7 @@ s32 rtw_xmit(_adapter *padapter, _pkt **ppkt) if (res == -1) { rtw_free_xmitframe(pxmitpriv, pxmitframe); + DBG_COUNTER(padapter->tx_logs.core_tx_err_brtx); return -1; } } @@ -3793,11 +3817,13 @@ s32 rtw_xmit(_adapter *padapter, _pkt **ppkt) if(xmitframe_enqueue_for_sleeping_sta(padapter, pxmitframe) == _TRUE) { _exit_critical_bh(&pxmitpriv->lock, &irqL0); + DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue); return 1; } _exit_critical_bh(&pxmitpriv->lock, &irqL0); #endif + //pre_xmitframe if (rtw_hal_xmit(padapter, pxmitframe) == _FALSE) return 1; @@ -3879,6 +3905,47 @@ sint xmitframe_enqueue_for_tdls_sleeping_sta(_adapter *padapter, struct xmit_fra } #endif //CONFIG_TDLS +#define RTW_HIQ_FILTER_ALLOW_ALL 0 +#define RTW_HIQ_FILTER_ALLOW_SPECIAL 1 +#define RTW_HIQ_FILTER_DENY_ALL 2 + +inline bool xmitframe_hiq_filter(struct xmit_frame *xmitframe) +{ + bool allow = _FALSE; + _adapter *adapter = xmitframe->padapter; + struct registry_priv *registry = &adapter->registrypriv; + +if (adapter->interface_type != RTW_PCIE) { + + if (registry->hiq_filter == RTW_HIQ_FILTER_ALLOW_SPECIAL) { + + struct pkt_attrib *attrib = &xmitframe->attrib; + + if (attrib->ether_type == 0x0806 + || attrib->ether_type == 0x888e + #ifdef CONFIG_WAPI_SUPPORT + || attrib->ether_type == 0x88B4 + #endif + || attrib->dhcp_pkt + ) { + if (0) + DBG_871X(FUNC_ADPT_FMT" ether_type:0x%04x%s\n", FUNC_ADPT_ARG(xmitframe->padapter) + , attrib->ether_type, attrib->dhcp_pkt?" DHCP":""); + allow = _TRUE; + } + } + else if (registry->hiq_filter == RTW_HIQ_FILTER_ALLOW_ALL) { + allow = _TRUE; + } + else if (registry->hiq_filter == RTW_HIQ_FILTER_DENY_ALL) { + } + else { + rtw_warn_on(1); + } +} + return allow; +} + #if defined(CONFIG_AP_MODE) || defined(CONFIG_TDLS) sint xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *pxmitframe) @@ -3900,7 +3967,10 @@ sint xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *p #endif //CONFIG_TDLS if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _FALSE) + { + DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue_warn_fwstate); return ret; + } /* if(pattrib->psta) { @@ -3915,31 +3985,33 @@ sint xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *p psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); if(pattrib->psta != psta) { + DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue_warn_sta); DBG_871X("%s, pattrib->psta(%p) != psta(%p)\n", __func__, pattrib->psta, psta); return _FALSE; } if(psta==NULL) { + DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue_warn_nosta); DBG_871X("%s, psta==NUL\n", __func__); return _FALSE; } if(!(psta->state &_FW_LINKED)) { + DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue_warn_link); DBG_871X("%s, psta->state(0x%x) != _FW_LINKED\n", __func__, psta->state); return _FALSE; } if(pattrib->triggered==1) { + DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue_warn_trigger); //DBG_871X("directly xmit pspoll_triggered packet\n"); //pattrib->triggered=0; - - if(bmcst) + if (bmcst && xmitframe_hiq_filter(pxmitframe) == _TRUE) pattrib->qsel = 0x11;//HIQ - return ret; } @@ -3978,6 +4050,8 @@ sint xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *p //_exit_critical_bh(&psta->sleep_q.lock, &irqL); ret = _TRUE; + + DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue_mcast); } @@ -4054,6 +4128,7 @@ sint xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *p ret = _TRUE; + DBG_COUNTER(padapter->tx_logs.core_tx_ap_enqueue_ucast); } } @@ -4081,14 +4156,16 @@ static void dequeue_xmitframes_to_sleeping_queue(_adapter *padapter, struct sta_ { pxmitframe = LIST_CONTAINOR(plist, struct xmit_frame, list); - plist = get_next(plist); + plist = get_next(plist); + pattrib = &pxmitframe->attrib; + + pattrib->triggered = 0; + ret = xmitframe_enqueue_for_sleeping_sta(padapter, pxmitframe); if(_TRUE == ret) { - pattrib = &pxmitframe->attrib; - ptxservq = rtw_get_sta_pending(padapter, psta, pattrib->priority, (u8 *)(&ac_index)); ptxservq->qcnt--; @@ -4250,6 +4327,41 @@ void wakeup_sta_to_xmit(_adapter *padapter, struct sta_info *psta) } + if(psta->sleepq_len==0) + { +#ifdef CONFIG_TDLS + if( psta->tdls_sta_state & TDLS_LINKED_STATE ) + { + if(psta->state&WIFI_SLEEP_STATE) + psta->state ^= WIFI_SLEEP_STATE; + + _exit_critical_bh(&pxmitpriv->lock, &irqL); + return; + } +#endif //CONFIG_TDLS + + if (pstapriv->tim_bitmap & BIT(psta->aid)) { + //DBG_871X("wakeup to xmit, qlen==0, update_BCNTIM, tim=%x\n", pstapriv->tim_bitmap); + //upate BCN for TIM IE + //update_BCNTIM(padapter); + update_mask = BIT(0); + } + + pstapriv->tim_bitmap &= ~BIT(psta->aid); + + if(psta->state&WIFI_SLEEP_STATE) + psta->state ^= WIFI_SLEEP_STATE; + + if(psta->state & WIFI_STA_ALIVE_CHK_STATE) + { + DBG_871X("%s alive check\n", __func__); + psta->expire_to = pstapriv->expire_to; + psta->state ^= WIFI_STA_ALIVE_CHK_STATE; + } + + pstapriv->sta_dz_bitmap &= ~BIT(psta->aid); + } + //for BC/MC Frames if(!psta_bmc) goto _exit; @@ -4302,41 +4414,6 @@ void wakeup_sta_to_xmit(_adapter *padapter, struct sta_info *psta) } - if(psta->sleepq_len==0) - { -#ifdef CONFIG_TDLS - if( psta->tdls_sta_state & TDLS_LINKED_STATE ) - { - if(psta->state&WIFI_SLEEP_STATE) - psta->state ^= WIFI_SLEEP_STATE; - - _exit_critical_bh(&pxmitpriv->lock, &irqL); - return; - } -#endif //CONFIG_TDLS - - if (pstapriv->tim_bitmap & BIT(psta->aid)) { - //DBG_871X("wakeup to xmit, qlen==0, update_BCNTIM, tim=%x\n", pstapriv->tim_bitmap); - //upate BCN for TIM IE - //update_BCNTIM(padapter); - update_mask = BIT(0); - } - - pstapriv->tim_bitmap &= ~BIT(psta->aid); - - if(psta->state&WIFI_SLEEP_STATE) - psta->state ^= WIFI_SLEEP_STATE; - - if(psta->state & WIFI_STA_ALIVE_CHK_STATE) - { - DBG_871X("%s alive check\n", __func__); - psta->expire_to = pstapriv->expire_to; - psta->state ^= WIFI_STA_ALIVE_CHK_STATE; - } - - pstapriv->sta_dz_bitmap &= ~BIT(psta->aid); - } - _exit: //_exit_critical_bh(&psta_bmc->sleep_q.lock, &irqL); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/HalPwrSeqCmd.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/HalPwrSeqCmd.c old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8188c2Ant.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8188c2Ant.c old mode 100644 new mode 100755 index 8e12ef2f0064..9f691416a493 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8188c2Ant.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8188c2Ant.c @@ -1723,6 +1723,13 @@ halbtc8188c2ant_ActionPanA2dp( //============================================================ // extern function start with EXhalbtc8188c2ant_ //============================================================ +VOID +EXhalbtc8188c2ant_PowerOnSetting( + IN PBTC_COEXIST pBtCoexist + ) +{ +} + VOID EXhalbtc8188c2ant_InitHwConfig( IN PBTC_COEXIST pBtCoexist, @@ -1776,13 +1783,6 @@ EXhalbtc8188c2ant_DisplayCoexInfo( CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); CL_PRINTF(cliBuf); - if(!pBoardInfo->bBtExist) - { - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!"); - CL_PRINTF(cliBuf); - return; - } - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); CL_PRINTF(cliBuf); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8188c2Ant.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8188c2Ant.h old mode 100644 new mode 100755 index 22e7e338998e..ce7ec564414f --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8188c2Ant.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8188c2Ant.h @@ -87,6 +87,10 @@ typedef struct _COEX_STA_8188C_2ANT{ // The following is interface which will notify coex module. //=========================================== VOID +EXhalbtc8188c2ant_PowerOnSetting( + IN PBTC_COEXIST pBtCoexist + ); +VOID EXhalbtc8188c2ant_InitHwConfig( IN PBTC_COEXIST pBtCoexist, IN BOOLEAN bWifiOnly diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192d2Ant.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192d2Ant.c old mode 100644 new mode 100755 index 4267a752caf1..239da74f5252 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192d2Ant.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192d2Ant.c @@ -1712,6 +1712,13 @@ halbtc8192d2ant_IsBtCoexistEnter( //============================================================ // extern function start with EXhalbtc8192d2ant_ //============================================================ +VOID +EXhalbtc8192d2ant_PowerOnSetting( + IN PBTC_COEXIST pBtCoexist + ) +{ +} + VOID EXhalbtc8192d2ant_InitHwConfig( IN PBTC_COEXIST pBtCoexist, @@ -1782,13 +1789,6 @@ EXhalbtc8192d2ant_DisplayCoexInfo( CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); CL_PRINTF(cliBuf); - if(!pBoardInfo->bBtExist) - { - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!"); - CL_PRINTF(cliBuf); - return; - } - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); CL_PRINTF(cliBuf); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192d2Ant.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192d2Ant.h old mode 100644 new mode 100755 index 24b25130e4c5..85fd6742ca2f --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192d2Ant.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192d2Ant.h @@ -108,6 +108,10 @@ typedef struct _COEX_STA_8192D_2ANT{ // The following is interface which will notify coex module. //=========================================== VOID +EXhalbtc8192d2ant_PowerOnSetting( + IN PBTC_COEXIST pBtCoexist + ); +VOID EXhalbtc8192d2ant_InitHwConfig( IN PBTC_COEXIST pBtCoexist, IN BOOLEAN bWifiOnly diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192e1Ant.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192e1Ant.c old mode 100644 new mode 100755 index cecf085298b5..36a48d082138 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192e1Ant.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192e1Ant.c @@ -2436,6 +2436,13 @@ halbtc8192e1ant_InitCoexDm( //============================================================ // extern function start with EXhalbtc8192e1ant_ //============================================================ +VOID +EXhalbtc8192e1ant_PowerOnSetting( + IN PBTC_COEXIST pBtCoexist + ) +{ +} + VOID EXhalbtc8192e1ant_InitHwConfig( IN PBTC_COEXIST pBtCoexist, @@ -2537,13 +2544,6 @@ EXhalbtc8192e1ant_DisplayCoexInfo( CL_PRINTF(cliBuf); } - if(!pBoardInfo->bBtExist) - { - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!"); - CL_PRINTF(cliBuf); - return; - } - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); CL_PRINTF(cliBuf); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192e1Ant.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192e1Ant.h old mode 100644 new mode 100755 index 54add813d73f..8792ec8d381c --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192e1Ant.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192e1Ant.h @@ -140,6 +140,10 @@ typedef struct _COEX_STA_8192E_1ANT{ // The following is interface which will notify coex module. //=========================================== VOID +EXhalbtc8192e1ant_PowerOnSetting( + IN PBTC_COEXIST pBtCoexist + ); +VOID EXhalbtc8192e1ant_InitHwConfig( IN PBTC_COEXIST pBtCoexist, IN BOOLEAN bWifiOnly diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192e2Ant.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192e2Ant.c old mode 100644 new mode 100755 index b8c7a0ff0683..b17ee766e581 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192e2Ant.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192e2Ant.c @@ -3790,6 +3790,13 @@ halbtc8192e2ant_InitHwConfig( //============================================================ // extern function start with EXhalbtc8192e2ant_ //============================================================ +VOID +EXhalbtc8192e2ant_PowerOnSetting( + IN PBTC_COEXIST pBtCoexist + ) +{ +} + VOID EXhalbtc8192e2ant_InitHwConfig( IN PBTC_COEXIST pBtCoexist, @@ -3838,13 +3845,6 @@ EXhalbtc8192e2ant_DisplayCoexInfo( CL_PRINTF(cliBuf); } - if(!pBoardInfo->bBtExist) - { - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!"); - CL_PRINTF(cliBuf); - return; - } - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); CL_PRINTF(cliBuf); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192e2Ant.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192e2Ant.h old mode 100644 new mode 100755 index c83df8bd0fe7..58cddce87a41 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192e2Ant.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8192e2Ant.h @@ -143,6 +143,10 @@ typedef struct _COEX_STA_8192E_2ANT{ // The following is interface which will notify coex module. //=========================================== VOID +EXhalbtc8192e2ant_PowerOnSetting( + IN PBTC_COEXIST pBtCoexist + ); +VOID EXhalbtc8192e2ant_InitHwConfig( IN PBTC_COEXIST pBtCoexist, IN BOOLEAN bWifiOnly diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723a1Ant.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723a1Ant.c old mode 100644 new mode 100755 index d2476cda62e5..8cd3d15b3146 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723a1Ant.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723a1Ant.c @@ -1077,13 +1077,6 @@ EXhalbtc8723a1ant_DisplayCoexInfo( CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); CL_PRINTF(cliBuf); - if(!pBoardInfo->bBtExist) - { - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!"); - CL_PRINTF(cliBuf); - return; - } - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); CL_PRINTF(cliBuf); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723a1Ant.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723a1Ant.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723a2Ant.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723a2Ant.c old mode 100644 new mode 100755 index 458ab3359a3e..3e115864cd21 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723a2Ant.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723a2Ant.c @@ -3381,6 +3381,13 @@ wa_halbtc8723a2ant_MonitorC2h( //============================================================ // extern function start with EXhalbtc8723a2ant_ //============================================================ +VOID +EXhalbtc8723a2ant_PowerOnSetting( + IN PBTC_COEXIST pBtCoexist + ) +{ +} + VOID EXhalbtc8723a2ant_InitHwConfig( IN PBTC_COEXIST pBtCoexist, @@ -3431,13 +3438,6 @@ EXhalbtc8723a2ant_DisplayCoexInfo( CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); CL_PRINTF(cliBuf); - if(!pBoardInfo->bBtExist) - { - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!"); - CL_PRINTF(cliBuf); - return; - } - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); CL_PRINTF(cliBuf); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723a2Ant.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723a2Ant.h old mode 100644 new mode 100755 index b2903f8d86ec..f0cc8b546972 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723a2Ant.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723a2Ant.h @@ -116,6 +116,10 @@ typedef struct _COEX_STA_8723A_2ANT{ // The following is interface which will notify coex module. //=========================================== VOID +EXhalbtc8723a2ant_PowerOnSetting( + IN PBTC_COEXIST pBtCoexist + ); +VOID EXhalbtc8723a2ant_InitHwConfig( IN PBTC_COEXIST pBtCoexist, IN BOOLEAN bWifiOnly diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723b1Ant.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723b1Ant.c old mode 100644 new mode 100755 index 348699a81420..b351f6c87a20 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723b1Ant.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723b1Ant.c @@ -27,8 +27,8 @@ const char *const GLBtInfoSrc8723b1Ant[]={ "BT Info[bt auto report]", }; -u4Byte GLCoexVerDate8723b1Ant=20140123; -u4Byte GLCoexVer8723b1Ant=0x4a; +u4Byte GLCoexVerDate8723b1Ant=20140702; +u4Byte GLCoexVer8723b1Ant=0x51; //============================================================ // local function proto type if needed @@ -411,6 +411,23 @@ halbtc8723b1ant_LimitedRx( } +VOID +halbtc8723b1ant_QueryBtInfo( + IN PBTC_COEXIST pBtCoexist + ) +{ + u1Byte H2C_Parameter[1] ={0}; + + pCoexSta->bC2hBtInfoReqSent = TRUE; + + H2C_Parameter[0] |= BIT0; // trigger + + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n", + H2C_Parameter[0])); + + pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter); +} + VOID halbtc8723b1ant_MonitorBtCtr( IN PBTC_COEXIST pBtCoexist @@ -420,29 +437,11 @@ halbtc8723b1ant_MonitorBtCtr( u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; u1Byte u1Tmp, u1Tmp1; s4Byte wifiRssi; + static u1Byte NumOfBtCounterChk = 0; -/* - if (pCoexSta->bFinishInitHW == FALSE) //to avoid 0x76e[3] = 1 (WLAN_Act control by PTA) during IPS - { - pCoexSta->highPriorityTx = 65535; - pCoexSta->highPriorityRx = 65535; - pCoexSta->lowPriorityTx = 65535; - pCoexSta->lowPriorityRx = 65535; - return; - } -*/ - //to avoid 0x76e[3] = 1 (WLAN_Act control by PTA) during IPS - if (! (pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e) & 0x8) ) - { - pCoexSta->highPriorityTx = 65535; - pCoexSta->highPriorityRx = 65535; - pCoexSta->lowPriorityTx = 65535; - pCoexSta->lowPriorityRx = 65535; - return; - } - - + //if (! (pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e) & 0x8) ) + regHPTxRx = 0x770; regLPTxRx = 0x774; @@ -459,25 +458,122 @@ halbtc8723b1ant_MonitorBtCtr( pCoexSta->lowPriorityTx = regLPTx; pCoexSta->lowPriorityRx = regLPRx; + if( (pCoexSta->lowPriorityTx > 1150) && (!pCoexSta->bC2hBtInquiryPage)) + pCoexSta->popEventCnt++; + + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Hi-Pri Rx/Tx: %d/%d, Lo-Pri Rx/Tx: %d/%d\n", + regHPRx, regHPTx, regLPRx, regLPTx)); + // reset counter pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); + + if ((regHPTx == 0) && (regHPRx ==0) && (regLPTx == 0) && (regLPRx == 0)) + { + NumOfBtCounterChk++; + if (NumOfBtCounterChk >= 3) +{ + halbtc8723b1ant_QueryBtInfo(pBtCoexist); + NumOfBtCounterChk = 0; + } + } } + VOID -halbtc8723b1ant_QueryBtInfo( +halbtc8723b1ant_MonitorWiFiCtr( IN PBTC_COEXIST pBtCoexist ) { - u1Byte H2C_Parameter[1] ={0}; + u4Byte u4Tmp; + u2Byte u2Tmp[3]; + s4Byte wifiRssi=0; + BOOLEAN bWifiBusy = FALSE, bWifiUnderBMode = FALSE; + static u1Byte nCCKLockCounter = 0; - pCoexSta->bC2hBtInfoReqSent = TRUE; + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); - H2C_Parameter[0] |= BIT0; // trigger + if (pCoexSta->bUnderIps) + { + pCoexSta->nCRCOK_CCK = 0; + pCoexSta->nCRCOK_11g = 0; + pCoexSta->nCRCOK_11n = 0; + pCoexSta->nCRCOK_11nAgg = 0; - BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n", - H2C_Parameter[0])); + pCoexSta->nCRCErr_CCK = 0; + pCoexSta->nCRCErr_11g = 0; + pCoexSta->nCRCErr_11n = 0; + pCoexSta->nCRCErr_11nAgg = 0; + } + else + { + pCoexSta->nCRCOK_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf88); + pCoexSta->nCRCOK_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf94); + pCoexSta->nCRCOK_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf90); + pCoexSta->nCRCOK_11nAgg= pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfb8); + + pCoexSta->nCRCErr_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf84); + pCoexSta->nCRCErr_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf96); + pCoexSta->nCRCErr_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf92); + pCoexSta->nCRCErr_11nAgg = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfba); + } + + + //reset counter + pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x1); + pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x0); + + if ( (bWifiBusy) && (wifiRssi >= 30) && (!bWifiUnderBMode)) + { + if ( (pCoexDm->btStatus == BT_8723B_1ANT_BT_STATUS_ACL_BUSY) || + (pCoexDm->btStatus == BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY) || + (pCoexDm->btStatus == BT_8723B_1ANT_BT_STATUS_SCO_BUSY) ) + { + if (pCoexSta->nCRCOK_CCK >(pCoexSta->nCRCOK_11g + pCoexSta->nCRCOK_11n + + pCoexSta->nCRCOK_11nAgg) ) + { + if (nCCKLockCounter < 5) + nCCKLockCounter++; + } + else + { + if (nCCKLockCounter > 0) + nCCKLockCounter--; + } + + } + else + { + if (nCCKLockCounter > 0) + nCCKLockCounter--; + } + } + else + { + if (nCCKLockCounter > 0) + nCCKLockCounter--; + } + + if (!pCoexSta->bPreCCKLock) + { + + if (nCCKLockCounter >= 5) + pCoexSta->bCCKLock = TRUE; + else + pCoexSta->bCCKLock = FALSE; + } + else + { + if (nCCKLockCounter == 0) + pCoexSta->bCCKLock = FALSE; + else + pCoexSta->bCCKLock = TRUE; + } + + pCoexSta->bPreCCKLock = pCoexSta->bCCKLock; + - pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter); } BOOLEAN @@ -944,6 +1040,8 @@ halbtc8723b1ant_CoexTableWithType( { BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], ********** CoexTable(%d) **********\n", type)); + pCoexSta->nCoexTableType = type; + switch(type) { case 0: @@ -956,16 +1054,16 @@ halbtc8723b1ant_CoexTableWithType( halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0x5a5a5a5a, 0xffffff, 0x3); break; case 3: - halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0xaaaaaaaa, 0xffffff, 0x3); + halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3); break; case 4: - halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0xaaaaaaaa, 0xffffff, 0x3); + halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0xaaaa5a5a, 0xffffff, 0x3); break; case 5: - halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0xaaaa5a5a, 0xffffff, 0x3); + halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0xaa5a5a5a, 0xffffff, 0x3); break; case 6: - halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0xaaaa5a5a, 0xffffff, 0x3); + halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0xaaaaaaaa, 0xffffff, 0x3); break; case 7: halbtc8723b1ant_CoexTable(pBtCoexist, bForceExec, 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3); @@ -1018,54 +1116,6 @@ halbtc8723b1ant_IgnoreWlanAct( pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; } -VOID -halbtc8723b1ant_SetFwPstdma( - IN PBTC_COEXIST pBtCoexist, - IN u1Byte byte1, - IN u1Byte byte2, - IN u1Byte byte3, - IN u1Byte byte4, - IN u1Byte byte5 - ) -{ - u1Byte H2C_Parameter[5] ={0}; - u1Byte realByte1=byte1, realByte5=byte5; - BOOLEAN bApEnable=FALSE; - - pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); - - if(bApEnable) - { - if(byte1&BIT4 && !(byte1&BIT5)) - { - BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], FW for 1Ant AP mode\n")); - realByte1 &= ~BIT4; - realByte1 |= BIT5; - - realByte5 |= BIT5; - realByte5 &= ~BIT6; - } - } - - H2C_Parameter[0] = realByte1; - H2C_Parameter[1] = byte2; - H2C_Parameter[2] = byte3; - H2C_Parameter[3] = byte4; - H2C_Parameter[4] = realByte5; - - pCoexDm->psTdmaPara[0] = realByte1; - pCoexDm->psTdmaPara[1] = byte2; - pCoexDm->psTdmaPara[2] = byte3; - pCoexDm->psTdmaPara[3] = byte4; - pCoexDm->psTdmaPara[4] = realByte5; - - BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], PS-TDMA H2C cmd =0x%x%08x\n", - H2C_Parameter[0], - H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); - - pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter); -} - VOID halbtc8723b1ant_SetLpsRpwm( IN PBTC_COEXIST pBtCoexist, @@ -1141,12 +1191,11 @@ halbtc8723b1ant_SetAntPath( BOOLEAN bUseExtSwitch=FALSE; BOOLEAN bIsInMpMode = FALSE; u1Byte H2C_Parameter[2] ={0}, u1Tmp = 0; - PADAPTER padapter=pBtCoexist->Adapter; + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_EXT_SWITCH, &bPgExtSwitch); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); // [31:16]=fw ver, [15:0]=fw sub ver - - if((fwVer<0xc0000) || bPgExtSwitch) + if((fwVer>0 && fwVer<0xc0000) || bPgExtSwitch) bUseExtSwitch = TRUE; if(bInitHwCfg) @@ -1154,30 +1203,19 @@ halbtc8723b1ant_SetAntPath( pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); //WiFi TRx Mask on pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x15); //BT TRx Mask on - // BT calibration check - while(cntBtCalChk <= 20) + if(fwVer >= 0x180000) { - delay_ms(50); - - u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x49d); - cntBtCalChk++; - if(u1Tmp & BIT0) - { - BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], ########### BT is calibrating (wait cnt=%d) ###########\n", cntBtCalChk)); - } - else - { - BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], ********** BT is NOT calibrating (wait cnt=%d)**********\n", cntBtCalChk)); - break; - } - } - - /* Use H2C to set GNT_BT to LOW */ - H2C_Parameter[0] = 0; + /* Use H2C to set GNT_BT to HIGH */ + H2C_Parameter[0] = 1; pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter); - + } + else + { + // set grant_bt to high + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18); + } //set wlan_act control by PTA - pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1); //BT select s0/s1 is controlled by WiFi @@ -1188,15 +1226,22 @@ halbtc8723b1ant_SetAntPath( } else if(bWifiOff) { + if(fwVer >= 0x180000) + { /* Use H2C to set GNT_BT to HIGH */ H2C_Parameter[0] = 1; pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter); - + } + else + { + // set grant_bt to high + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18); + } //set wlan_act to always low pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_IS_IN_MP_MODE, &bIsInMpMode); - if (bIsInMpMode == FALSE) + if(!bIsInMpMode) pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x0); //BT select s0/s1 is controlled by BT else pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1); //BT select s0/s1 is controlled by WiFi @@ -1207,6 +1252,46 @@ halbtc8723b1ant_SetAntPath( u4Tmp &= ~BIT24; pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); } + else + { + /* Use H2C to set GNT_BT to LOW */ + if(fwVer >= 0x180000) + { + if (pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765) != 0) + { + H2C_Parameter[0] = 0; + pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter); + } + } + else + { + // BT calibration check + while(cntBtCalChk <= 20) + { + u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x49d); + cntBtCalChk++; + if(u1Tmp & BIT0) + { + BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], ########### BT is calibrating (wait cnt=%d) ###########\n", cntBtCalChk)); + delay_ms(50); + } + else + { + BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], ********** BT is NOT calibrating (wait cnt=%d)**********\n", cntBtCalChk)); + break; + } + } + + // set grant_bt to PTA + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x0); + } + + if (pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e) != 0xc) + { + //set wlan_act control by PTA + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); + } + } if(bUseExtSwitch) { @@ -1222,8 +1307,6 @@ halbtc8723b1ant_SetAntPath( if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) { - //pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x64, 0x1, 0x1); //Main Ant to BT for IPS case 0x4c[23]=1 - //tell firmware "no antenna inverse" H2C_Parameter[0] = 0; H2C_Parameter[1] = 1; //ext switch type @@ -1231,8 +1314,6 @@ halbtc8723b1ant_SetAntPath( } else { - //pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x64, 0x1, 0x0); //Aux Ant to BT for IPS case 0x4c[23]=1 - //tell firmware "antenna inverse" H2C_Parameter[0] = 1; H2C_Parameter[1] = 1; //ext switch type @@ -1240,14 +1321,7 @@ halbtc8723b1ant_SetAntPath( } } -#if 0 - // fixed internal switch first - if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) - pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); // fixed internal switch S1->WiFi, S0->BT - else - pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x280); // fixed internal switch S0->WiFi, S1->BT -#endif - + // ext switch setting switch(antPosType) { @@ -1283,11 +1357,11 @@ halbtc8723b1ant_SetAntPath( u4Tmp &=~BIT24; pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); - pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x64, 0x1, 0x0);//fixed external switch S1->Main, S0->Aux + //Fix Ext switch Main->S1, Aux->S0 + pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x64, 0x1, 0x0); if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) { - //pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x64, 0x1, 0x0); //Main Ant to WiFi for IPS case 0x4c[23]=1 //tell firmware "no antenna inverse" H2C_Parameter[0] = 0; @@ -1296,7 +1370,6 @@ halbtc8723b1ant_SetAntPath( } else { - //pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x64, 0x1, 0x1); //Aux Ant to BT for IPS case 0x4c[23]=1 //tell firmware "antenna inverse" H2C_Parameter[0] = 1; @@ -1305,13 +1378,6 @@ halbtc8723b1ant_SetAntPath( } } -#if 0 - // fixed external switch first - if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) - pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x1); //Main->WiFi, Aux->BT - else - pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x2); //Main->BT, Aux->WiFi -#endif // internal switch setting switch(antPosType) @@ -1337,7 +1403,6 @@ halbtc8723b1ant_SetAntPath( break; } } - } VOID @@ -1356,7 +1421,6 @@ halbtc8723b1ant_SetAntPathDCut( BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], set BT Ant, bAntennaAux/bExtSwitch/bTwoAntenna/antennaPos/wifiState=%d/%d/%d/%d/%d\n", bAntennaAux, bExtSwitch, bTwoAntenna, antennaPos, wifiState)); - buf[0] = dataLen; if(bAntennaAux) @@ -1373,9 +1437,57 @@ halbtc8723b1ant_SetAntPathDCut( buf[5] = wifiState; pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_CTRL_8723B_ANT, (PVOID)&buf[0]); +} +VOID +halbtc8723b1ant_SetFwPstdma( + IN PBTC_COEXIST pBtCoexist, + IN u1Byte byte1, + IN u1Byte byte2, + IN u1Byte byte3, + IN u1Byte byte4, + IN u1Byte byte5 + ) +{ + u1Byte H2C_Parameter[5] ={0}; + u1Byte realByte1=byte1, realByte5=byte5; + BOOLEAN bApEnable=FALSE; + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); + + if(bApEnable) + { + if(byte1&BIT4 && !(byte1&BIT5)) + { + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], FW for 1Ant AP mode\n")); + realByte1 &= ~BIT4; + realByte1 |= BIT5; + + realByte5 |= BIT5; + realByte5 &= ~BIT6; + } + } + + H2C_Parameter[0] = realByte1; + H2C_Parameter[1] = byte2; + H2C_Parameter[2] = byte3; + H2C_Parameter[3] = byte4; + H2C_Parameter[4] = realByte5; + + pCoexDm->psTdmaPara[0] = realByte1; + pCoexDm->psTdmaPara[1] = byte2; + pCoexDm->psTdmaPara[2] = byte3; + pCoexDm->psTdmaPara[3] = byte4; + pCoexDm->psTdmaPara[4] = realByte5; + + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], PS-TDMA H2C cmd =0x%x%08x\n", + H2C_Parameter[0], + H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4])); + + pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter); } + VOID halbtc8723b1ant_PsTdma( IN PBTC_COEXIST pBtCoexist, @@ -1385,9 +1497,12 @@ halbtc8723b1ant_PsTdma( ) { PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; - BOOLEAN bTurnOnByCnt=FALSE, bWifiBusy=FALSE; + PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; + BOOLEAN bTurnOnByCnt=FALSE, bWifiBusy=FALSE, bWiFiNoisy=FALSE; u1Byte psTdmaTypeByCnt=0, rssiAdjustVal=0; - //u4Byte fwVer=0; + u1Byte psTdmaByte4Val = 0x50, psTdmaByte0Val = 0x51, psTdmaByte3Val = 0x10; + s1Byte nWiFiDurationAdjust = 0x0; + static BOOLEAN bPreWifiBusy=FALSE; //BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s turn %s PS TDMA, type=%d\n", // (bForceExec? "force to":""), (bTurnOn? "ON":"OFF"), type)); @@ -1396,6 +1511,12 @@ halbtc8723b1ant_PsTdma( pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); + if (bWifiBusy != bPreWifiBusy) + { + bForceExec = TRUE; + bPreWifiBusy = bWifiBusy; + } + if (pCoexDm->bCurPsTdmaOn) { BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], ********** TDMA(on, %d) **********\n", @@ -1413,40 +1534,56 @@ halbtc8723b1ant_PsTdma( (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) return; } + + if (pCoexSta->nScanAPNum <= 5) + nWiFiDurationAdjust = 2; + else if (pCoexSta->nScanAPNum >= 40) + nWiFiDurationAdjust = -15; + else if (pCoexSta->nScanAPNum >= 20) + nWiFiDurationAdjust = -10; + + if (!pCoexSta->bForceLpsOn) //only for A2DP-only case 1/2/9/11 + { + psTdmaByte0Val = 0x61; //no null-pkt + psTdmaByte3Val = 0x11; // no tx-pause at BT-slot + psTdmaByte4Val = 0x10; // 0x778 = d/1 toggle + } + + if ( (type == 3) || (type == 13) || (type == 14) ) + { + psTdmaByte4Val = psTdmaByte4Val & 0xbf; //no dynamic slot for multi-profile + + if (!bWifiBusy) + psTdmaByte4Val = psTdmaByte4Val | 0x1; //0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) + } + + if (pBtLinkInfo->bSlaveRole == TRUE) + psTdmaByte4Val = psTdmaByte4Val | 0x1; //0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) + if(bTurnOn) { switch(type) { default: - halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x1a, 0x1a, 0x0, 0x50); + halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x1a, 0x1a, 0x0, psTdmaByte4Val); break; case 1: - //if(bWifiBusy) - halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x3a, 0x03, 0x10, 0x50); - //else - // halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x3a, 0x03, 0x10, 0x51); - - rssiAdjustVal = 11; + halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x3a+nWiFiDurationAdjust, 0x03, psTdmaByte3Val, psTdmaByte4Val); break; case 2: - //if(bWifiBusy) - halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x2b, 0x03, 0x10, 0x50); - //else - // halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x2b, 0x03, 0x10, 0x51); - rssiAdjustVal = 14; + halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x2d+nWiFiDurationAdjust, 0x03, psTdmaByte3Val, psTdmaByte4Val); break; case 3: - halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x1d, 0x1d, 0x0, 0x52); + halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x1d, 0x1d, 0x0, psTdmaByte4Val); break; case 4: halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x93, 0x15, 0x3, 0x14, 0x0); - rssiAdjustVal = 17; break; case 5: - halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x61, 0x15, 0x3, 0x11, 0x10); + halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x61, 0x15, 0x3, 0x11, 0x11); break; case 6: - halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x61, 0x20, 0x3, 0x11, 0x13); + halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x61, 0x20, 0x3, 0x11, 0x11); break; case 7: halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x13, 0xc, 0x5, 0x0, 0x0); @@ -1455,38 +1592,34 @@ halbtc8723b1ant_PsTdma( halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x93, 0x25, 0x3, 0x10, 0x0); break; case 9: - halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x21, 0x3, 0x10, 0x50); - rssiAdjustVal = 18; + halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x3, psTdmaByte3Val, psTdmaByte4Val); break; case 10: halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x13, 0xa, 0xa, 0x0, 0x40); break; case 11: - halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x15, 0x03, 0x10, 0x50); - rssiAdjustVal = 20; + halbtc8723b1ant_SetFwPstdma(pBtCoexist, psTdmaByte0Val, 0x21, 0x03, psTdmaByte3Val, psTdmaByte4Val); break; case 12: halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x0a, 0x0a, 0x0, 0x50); break; case 13: - halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x12, 0x12, 0x0, 0x50); + halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x12, 0x12, 0x0, psTdmaByte4Val); break; case 14: - halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x21, 0x3, 0x10, 0x52); + halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x51, 0x21, 0x3, 0x10, psTdmaByte4Val); break; case 15: halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x13, 0xa, 0x3, 0x8, 0x0); break; case 16: halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x93, 0x15, 0x3, 0x10, 0x0); - rssiAdjustVal = 18; break; case 18: halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x93, 0x25, 0x3, 0x10, 0x0); - rssiAdjustVal = 14; break; case 20: - halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x61, 0x35, 0x03, 0x11, 0x10); + halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x61, 0x3f, 0x03, 0x11, 0x10); break; case 21: halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x61, 0x25, 0x03, 0x11, 0x11); @@ -1496,23 +1629,18 @@ halbtc8723b1ant_PsTdma( break; case 23: halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x3, 0x31, 0x18); - rssiAdjustVal = 22; break; case 24: halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x3, 0x31, 0x18); - rssiAdjustVal = 22; break; case 25: halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0x3, 0x31, 0x18); - rssiAdjustVal = 22; break; case 26: halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0x3, 0x31, 0x18); - rssiAdjustVal = 22; break; case 27: halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x3, 0x31, 0x98); - rssiAdjustVal = 22; break; case 28: halbtc8723b1ant_SetFwPstdma(pBtCoexist, 0x69, 0x25, 0x3, 0x31, 0x0); @@ -1574,6 +1702,9 @@ halbtc8723b1ant_PsTdma( rssiAdjustVal =0; pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, &rssiAdjustVal); + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x\n", + pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948), pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765), pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67))); + // update pre state pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; pCoexDm->prePsTdma = pCoexDm->curPsTdma; @@ -1588,7 +1719,7 @@ halbtc8723b1ant_CoexAllOff( halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); // hw all off - halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); + halbtc8723b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); } BOOLEAN @@ -1606,7 +1737,7 @@ halbtc8723b1ant_IsCommonAction( { BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi non connected-idle + BT non connected-idle!!\n")); - halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); + //halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); bCommon = TRUE; } @@ -1615,7 +1746,7 @@ halbtc8723b1ant_IsCommonAction( { BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi connected + BT non connected-idle!!\n")); - halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); + //halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); bCommon = TRUE; } @@ -1624,7 +1755,7 @@ halbtc8723b1ant_IsCommonAction( { BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi non connected-idle + BT connected-idle!!\n")); - halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); + //halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); bCommon = TRUE; } @@ -1633,7 +1764,7 @@ halbtc8723b1ant_IsCommonAction( { BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi connected + BT connected-idle!!\n")); - halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); + //halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); bCommon = TRUE; } @@ -1642,7 +1773,7 @@ halbtc8723b1ant_IsCommonAction( { BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi non connected-idle + BT Busy!!\n")); - halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); + //halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); bCommon = TRUE; } @@ -1728,6 +1859,10 @@ halbtc8723b1ant_TdmaDurationAdjustForAcl( //BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], retryCount = %d\n", retryCount)); //BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], up=%d, dn=%d, m=%d, n=%d, WaitCount=%d\n", // up, dn, m, n, WaitCount)); + + if ( (pCoexSta->lowPriorityTx) > 1150 || (pCoexSta->lowPriorityRx) > 1250 ) + retryCount++; + result = 0; WaitCount++; @@ -1919,6 +2054,7 @@ halbtc8723b1ant_PowerSaveState( bLowPwrDisable = FALSE; pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL); + pCoexSta->bForceLpsOn = FALSE; break; case BTC_PS_LPS_ON: halbtc8723b1ant_PsTdmaCheckForPowerSaveState(pBtCoexist, TRUE); @@ -1928,10 +2064,12 @@ halbtc8723b1ant_PowerSaveState( pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); // power save must executed before psTdma. pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL); + pCoexSta->bForceLpsOn = TRUE; break; case BTC_PS_LPS_OFF: halbtc8723b1ant_PsTdmaCheckForPowerSaveState(pBtCoexist, FALSE); pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL); + pCoexSta->bForceLpsOn = FALSE; break; default: break; @@ -1943,8 +2081,8 @@ halbtc8723b1ant_ActionWifiOnly( IN PBTC_COEXIST pBtCoexist ) { - halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); - halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 9); + halbtc8723b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); + halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 9); } VOID @@ -2016,6 +2154,8 @@ halbtc8723b1ant_MonitorBtEnableDisable( //============================================= // SCO only or SCO+PAN(HS) + +/* VOID halbtc8723b1ant_ActionSco( IN PBTC_COEXIST pBtCoexist @@ -2101,6 +2241,8 @@ halbtc8723b1ant_ActionHidA2dp( halbtc8723b1ant_SwMechanism(pBtCoexist, TRUE); } +*/ + //============================================= // // Non-Software Coex Mechanism start @@ -2146,16 +2288,15 @@ halbtc8723b1ant_ActionBtInquiry( halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); } - else if( (pBtLinkInfo->bScoExist) || - (pBtLinkInfo->bHidExist) ) + else if( (pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist) ) { - // SCO/HID-only busy + // SCO/HID/A2DP busy halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); } - else if ( (pBtLinkInfo->bA2dpExist) || (pBtLinkInfo->bPanExist) || (bWifiBusy) ) + else if ( (pBtLinkInfo->bPanExist) || (bWifiBusy) ) { halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); @@ -2188,35 +2329,13 @@ halbtc8723b1ant_ActionBtScoHidOnlyBusy( if(pBtLinkInfo->bScoExist) { halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); - halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); + halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); } else //HID { halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); } -/* - if(pBtLinkInfo->bScoExist || pBtLinkInfo->bHidExist) - { - if(bWifiConnected) - { - wifiRssiState = halbtc8723b1ant_WifiRssiState(pBtCoexist, 0, 2, 30, 0); - if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || - (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) - { - halbtc8723b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 2, 1, 1, 1); - } - else - { - halbtc8723b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 1, 1, 1); - } - } - else - { - halbtc8723b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); - } - } -*/ } VOID @@ -2230,6 +2349,15 @@ halbtc8723b1ant_ActionWifiConnectedBtAclBusy( PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; btRssiState = halbtc8723b1ant_BtRssiState(2, 28, 0); + if ( (pCoexSta->lowPriorityRx >= 950) && (!pCoexSta->bUnderIps) ) + { + pBtLinkInfo->bSlaveRole = TRUE; + } + else + { + pBtLinkInfo->bSlaveRole = FALSE; + } + if(pBtLinkInfo->bHidOnly) //HID { halbtc8723b1ant_ActionBtScoHidOnlyBusy(pBtCoexist, wifiStatus); @@ -2240,58 +2368,42 @@ halbtc8723b1ant_ActionWifiConnectedBtAclBusy( { if(BT_8723B_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifiStatus) { - //halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); - //halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); - halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); + halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); pCoexDm->bAutoTdmaAdjust = FALSE; } - else if( (btRssiState == BTC_RSSI_STATE_HIGH) || - (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + else { halbtc8723b1ant_TdmaDurationAdjustForAcl(pBtCoexist, wifiStatus); - halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); - } - else //for low BT RSSI - { - halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); - halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); - pCoexDm->bAutoTdmaAdjust = FALSE; + halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); + pCoexDm->bAutoTdmaAdjust = TRUE; } } + else if ( ((pBtLinkInfo->bA2dpExist) && (pBtLinkInfo->bPanExist)) || + (pBtLinkInfo->bHidExist&&pBtLinkInfo->bA2dpExist&&pBtLinkInfo->bPanExist) ) //A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP) + { + halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); + halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); + pCoexDm->bAutoTdmaAdjust = FALSE; + } else if(pBtLinkInfo->bHidExist&&pBtLinkInfo->bA2dpExist) //HID+A2DP { - if( (btRssiState == BTC_RSSI_STATE_HIGH) || - (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) - { - halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); - pCoexDm->bAutoTdmaAdjust = FALSE; - } - else //for low BT RSSI - { - halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); - pCoexDm->bAutoTdmaAdjust = FALSE; - } + halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); + pCoexDm->bAutoTdmaAdjust = FALSE; - halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 6); + halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3); } else if( (pBtLinkInfo->bPanOnly) || (pBtLinkInfo->bHidExist&&pBtLinkInfo->bPanExist) ) //PAN(OPP,FTP), HID+PAN(OPP,FTP) { halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); - halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 6); - pCoexDm->bAutoTdmaAdjust = FALSE; - } - else if ( ((pBtLinkInfo->bA2dpExist) && (pBtLinkInfo->bPanExist)) || - (pBtLinkInfo->bHidExist&&pBtLinkInfo->bA2dpExist&&pBtLinkInfo->bPanExist) ) //A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP) - { - halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); - halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); + halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); pCoexDm->bAutoTdmaAdjust = FALSE; } else { - halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); - halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); + //BT no-profile busy (0x9) + halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); + halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); pCoexDm->bAutoTdmaAdjust = FALSE; } } @@ -2317,16 +2429,20 @@ halbtc8723b1ant_ActionWifiNotConnectedScan( PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); - halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); //Force antenna setup for no scan result issue // tdma and coex table if(BT_8723B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) { - if(pBtLinkInfo->bA2dpExist && pBtLinkInfo->bPanExist) - { + if (pBtLinkInfo->bA2dpExist) + { + halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); + halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); + } + else if (pBtLinkInfo->bA2dpExist && pBtLinkInfo->bPanExist) + { halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); - } + } else { halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); @@ -2341,9 +2457,6 @@ halbtc8723b1ant_ActionWifiNotConnectedScan( } else { - //halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); - //halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); - //Bryant Add halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); @@ -2360,20 +2473,20 @@ halbtc8723b1ant_ActionWifiNotConnectedAssoAuth( halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); // tdma and coex table - if( (pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) ) + if( (pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist) ) { halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); - halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); + halbtc8723b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 4); } - else if( (pBtLinkInfo->bA2dpExist) || (pBtLinkInfo->bPanExist) ) + else if (pBtLinkInfo->bPanExist) { halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); - halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); + halbtc8723b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 4); } else { halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); - halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); + halbtc8723b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 2); } } @@ -2389,11 +2502,16 @@ halbtc8723b1ant_ActionWifiConnectedScan( // tdma and coex table if(BT_8723B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) { - if(pBtLinkInfo->bA2dpExist && pBtLinkInfo->bPanExist) - { + if (pBtLinkInfo->bA2dpExist) + { + halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); + halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); + } + else if (pBtLinkInfo->bA2dpExist && pBtLinkInfo->bPanExist) + { halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); - } + } else { halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); @@ -2408,9 +2526,6 @@ halbtc8723b1ant_ActionWifiConnectedScan( } else { - //halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); - //halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); - //Bryant Add halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); @@ -2427,12 +2542,12 @@ halbtc8723b1ant_ActionWifiConnectedSpecialPacket( halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); // tdma and coex table - if( (pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) ) + if( (pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist) ) { halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); } - else if( (pBtLinkInfo->bA2dpExist) || (pBtLinkInfo->bPanExist) ) + else if(pBtLinkInfo->bPanExist) { halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); @@ -2479,11 +2594,28 @@ halbtc8723b1ant_ActionWifiConnected( pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); + // power save state if(!bApEnable && BT_8723B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus && !pBtCoexist->btLinkInfo.bHidOnly) { - if(!bWifiBusy && pBtCoexist->btLinkInfo.bA2dpOnly) //A2DP + if(pBtCoexist->btLinkInfo.bA2dpOnly) //A2DP + { + if(!bWifiBusy) + halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); + else //busy + { + if (pCoexSta->nScanAPNum >= BT_8723B_1ANT_WIFI_NOISY_THRESH) //no force LPS, no PS-TDMA, use pure TDMA + { halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); + } + else + { + halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); + } + } + } + else if ((pCoexSta->bPanExist == FALSE) && (pCoexSta->bA2dpExist == FALSE) && (pCoexSta->bHidExist == FALSE)) + halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); else halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); } @@ -2507,7 +2639,11 @@ halbtc8723b1ant_ActionWifiConnected( else { halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); + + if ( (pCoexSta->highPriorityTx) + (pCoexSta->highPriorityRx) <= 60 ) halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); + else + halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); } } else @@ -2526,7 +2662,11 @@ halbtc8723b1ant_ActionWifiConnected( else { halbtc8723b1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); + + if ( (pCoexSta->highPriorityTx) + (pCoexSta->highPriorityRx) <= 60 ) halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); + else + halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); } } } @@ -2551,43 +2691,43 @@ halbtc8723b1ant_RunSwCoexistMechanism( { case BT_8723B_1ANT_COEX_ALGO_SCO: BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action algorithm = SCO.\n")); - halbtc8723b1ant_ActionSco(pBtCoexist); + //halbtc8723b1ant_ActionSco(pBtCoexist); break; case BT_8723B_1ANT_COEX_ALGO_HID: BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action algorithm = HID.\n")); - halbtc8723b1ant_ActionHid(pBtCoexist); + //halbtc8723b1ant_ActionHid(pBtCoexist); break; case BT_8723B_1ANT_COEX_ALGO_A2DP: BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action algorithm = A2DP.\n")); - halbtc8723b1ant_ActionA2dp(pBtCoexist); + //halbtc8723b1ant_ActionA2dp(pBtCoexist); break; case BT_8723B_1ANT_COEX_ALGO_A2DP_PANHS: BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action algorithm = A2DP+PAN(HS).\n")); - halbtc8723b1ant_ActionA2dpPanHs(pBtCoexist); + //halbtc8723b1ant_ActionA2dpPanHs(pBtCoexist); break; case BT_8723B_1ANT_COEX_ALGO_PANEDR: BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action algorithm = PAN(EDR).\n")); - halbtc8723b1ant_ActionPanEdr(pBtCoexist); + //halbtc8723b1ant_ActionPanEdr(pBtCoexist); break; case BT_8723B_1ANT_COEX_ALGO_PANHS: BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action algorithm = HS mode.\n")); - halbtc8723b1ant_ActionPanHs(pBtCoexist); + //halbtc8723b1ant_ActionPanHs(pBtCoexist); break; case BT_8723B_1ANT_COEX_ALGO_PANEDR_A2DP: BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action algorithm = PAN+A2DP.\n")); - halbtc8723b1ant_ActionPanEdrA2dp(pBtCoexist); + //halbtc8723b1ant_ActionPanEdrA2dp(pBtCoexist); break; case BT_8723B_1ANT_COEX_ALGO_PANEDR_HID: BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action algorithm = PAN(EDR)+HID.\n")); - halbtc8723b1ant_ActionPanEdrHid(pBtCoexist); + //halbtc8723b1ant_ActionPanEdrHid(pBtCoexist); break; case BT_8723B_1ANT_COEX_ALGO_HID_A2DP_PANEDR: BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action algorithm = HID+A2DP+PAN.\n")); - halbtc8723b1ant_ActionHidA2dpPanEdr(pBtCoexist); + //halbtc8723b1ant_ActionHidA2dpPanEdr(pBtCoexist); break; case BT_8723B_1ANT_COEX_ALGO_HID_A2DP: BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action algorithm = HID+A2DP.\n")); - halbtc8723b1ant_ActionHidA2dp(pBtCoexist); + //halbtc8723b1ant_ActionHidA2dp(pBtCoexist); break; default: BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action algorithm = coexist All Off!!\n")); @@ -2607,10 +2747,11 @@ halbtc8723b1ant_RunCoexistMechanism( BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; BOOLEAN bIncreaseScanDevNum=FALSE; BOOLEAN bBtCtrlAggBufSize=FALSE; + BOOLEAN bMiracastPlusBt=FALSE; u1Byte aggBufSize=5; u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; u4Byte wifiLinkStatus=0; - u4Byte numOfWifiLink=0; + u4Byte numOfWifiLink=0, wifiBw; BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], RunCoexistMechanism()===>\n")); @@ -2644,62 +2785,73 @@ halbtc8723b1ant_RunCoexistMechanism( pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); numOfWifiLink = wifiLinkStatus>>16; - if(numOfWifiLink >= 2) + + if((numOfWifiLink>=2) || (wifiLinkStatus&WIFI_P2P_GO_CONNECTED)) { - halbtc8723b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); - halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); - halbtc8723b1ant_ActionWifiMultiPort(pBtCoexist); - return; - } + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("############# [BTCoex], Multi-Port numOfWifiLink = %d, wifiLinkStatus = 0x%x\n", numOfWifiLink,wifiLinkStatus) ); - if(!pBtLinkInfo->bScoExist && !pBtLinkInfo->bHidExist) - { - halbtc8723b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); - } - else - { - if(bWifiConnected) + if(pBtLinkInfo->bBtLinkExist) { - wifiRssiState = halbtc8723b1ant_WifiRssiState(pBtCoexist, 1, 2, 30, 0); - if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || - (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) - { - halbtc8723b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 1, 1, 1); - } - else - { - halbtc8723b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 1, 1, 1); - } + halbtc8723b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 1, 0, 1); + bMiracastPlusBt = TRUE; } else { halbtc8723b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); + bMiracastPlusBt = FALSE; } + pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); + halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); + if ( (pBtLinkInfo->bA2dpExist) && (pCoexSta->bC2hBtInquiryPage) ) + { + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("############# [BTCoex], BT Is Inquirying \n") ); + halbtc8723b1ant_ActionBtInquiry(pBtCoexist); + } + else + halbtc8723b1ant_ActionWifiMultiPort(pBtCoexist); + + return; } - - if(pBtLinkInfo->bScoExist) + else { - bBtCtrlAggBufSize = TRUE; - aggBufSize = 0x3; + bMiracastPlusBt = FALSE; + pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt); } - else if(pBtLinkInfo->bHidExist) + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); + + if ( (pBtLinkInfo->bBtLinkExist) && (bWifiConnected) ) { - bBtCtrlAggBufSize = TRUE; - aggBufSize = 0x5; + halbtc8723b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 1, 0, 1); + + if(pBtLinkInfo->bScoExist) + halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, TRUE, FALSE, 0x5); + else + { + if (BTC_WIFI_BW_HT40==wifiBw) + halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x10); + else + halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x8); + } + + halbtc8723b1ant_SwMechanism(pBtCoexist, TRUE); + halbtc8723b1ant_RunSwCoexistMechanism(pBtCoexist); //just print debug message } - else if(pBtLinkInfo->bA2dpExist || pBtLinkInfo->bPanExist) + else { - bBtCtrlAggBufSize = TRUE; - aggBufSize = 0x8; - } - halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); + halbtc8723b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); + + halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x5); - halbtc8723b1ant_RunSwCoexistMechanism(pBtCoexist); + halbtc8723b1ant_SwMechanism(pBtCoexist, FALSE); + halbtc8723b1ant_RunSwCoexistMechanism(pBtCoexist); ////just print debug message + } pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); if(pCoexSta->bC2hBtInquiryPage) { + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("############# [BTCoex], BT Is Inquirying \n") ); halbtc8723b1ant_ActionBtInquiry(pBtCoexist); return; } @@ -2748,6 +2900,8 @@ halbtc8723b1ant_InitCoexDm( //halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); halbtc8723b1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); + + pCoexSta->popEventCnt = 0; } VOID @@ -2764,7 +2918,7 @@ halbtc8723b1ant_InitHwConfig( u1Byte H2C_Parameter[2] ={0}; BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], 1Ant Init HW Config!!\n")); - +#if 0//move to BTC_MEDIA_CONNECT if(bBackUp) { pCoexDm->backupArfrCnt1 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); @@ -2772,7 +2926,7 @@ halbtc8723b1ant_InitHwConfig( pCoexDm->backupRetryLimit = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); pCoexDm->backupAmpduMaxTime = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); } - +#endif pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x550, 0x8, 0x1); //enable TBTT nterrupt // 0x790[5:0]=0x5 @@ -2819,10 +2973,9 @@ halbtc8723b1ant_InitHwConfig( BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x\n", u4Tmp, u1Tmpa, u1Tmpb)); - - pCoexSta->bFinishInitHW = TRUE; } +/* VOID halbtc8723b1ant_WifiOffHwCfg( IN PBTC_COEXIST pBtCoexist @@ -2831,6 +2984,7 @@ halbtc8723b1ant_WifiOffHwCfg( // set wlan_act to low //pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); } +*/ //============================================================ // work around function start with wa_halbtc8723b1ant_ @@ -2838,6 +2992,73 @@ halbtc8723b1ant_WifiOffHwCfg( //============================================================ // extern function start with EXhalbtc8723b1ant_ //============================================================ +VOID +EXhalbtc8723b1ant_PowerOnSetting( + IN PBTC_COEXIST pBtCoexist + ) +{ + PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; + u1Byte u1Tmp=0x0; + u2Byte u2Tmp=0x0; + + pBtCoexist->bStopCoexDm = TRUE; + + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x67, 0x20); + + // enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly. + u2Tmp = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x2); + pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x2, u2Tmp|BIT0|BIT1); + + // set GRAN_BT = 1 + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18); + // set WLAN_ACT = 0 + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); + + // + // S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) + // Local setting bit define + // BIT0: "0" for no antenna inverse; "1" for antenna inverse + // BIT1: "0" for internal switch; "1" for external switch + // BIT2: "0" for one antenna; "1" for two antenna + // NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 + if(pBtCoexist->chipInterface == BTC_INTF_USB) + { + // fixed at S0 for USB interface + pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); + + u1Tmp |= 0x1; // antenna inverse + pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0xfe08, u1Tmp); + + pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT; + } + else + { + // for PCIE and SDIO interface, we check efuse 0xc3[6] + if(pBoardInfo->singleAntPath == 0) + { + // set to S1 + pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x280); + pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; + } + else if(pBoardInfo->singleAntPath == 1) + { + // set to S0 + pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); + u1Tmp |= 0x1; // antenna inverse + pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT; + } + + if(pBtCoexist->chipInterface == BTC_INTF_PCI) + { + pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x384, u1Tmp); + } + else if(pBtCoexist->chipInterface == BTC_INTF_SDIO) + { + pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x60, u1Tmp); + } + } +} + VOID EXhalbtc8723b1ant_InitHwConfig( IN PBTC_COEXIST pBtCoexist, @@ -2845,6 +3066,7 @@ EXhalbtc8723b1ant_InitHwConfig( ) { halbtc8723b1ant_InitHwConfig(pBtCoexist, TRUE, bWifiOnly); + pBtCoexist->bStopCoexDm = FALSE; } VOID @@ -2873,12 +3095,13 @@ EXhalbtc8723b1ant_DisplayCoexInfo( u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; u2Byte u2Tmp[4]; u4Byte u4Tmp[4]; - BOOLEAN bRoam=FALSE, bScan=FALSE, bLink=FALSE, bWifiUnder5G=FALSE; + BOOLEAN bRoam=FALSE, bScan=FALSE, bLink=FALSE, bWifiUnder5G=FALSE, bWifiUnderBMode = FALSE; BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; s4Byte wifiRssi=0, btHsRssi=0; u4Byte wifiBw, wifiTrafficDir, faOfdm, faCck, wifiLinkStatus; - u1Byte wifiDot11Chnl, wifiHsChnl; + u1Byte wifiDot11Chnl, wifiHsChnl, apNum; u4Byte fwVer=0, btPatchVer=0; + static u1Byte PopReportIn10s = 0; CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); CL_PRINTF(cliBuf); @@ -2898,13 +3121,6 @@ EXhalbtc8723b1ant_DisplayCoexInfo( CL_PRINTF(cliBuf); } - if(!pBoardInfo->bBtExist) - { - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!"); - CL_PRINTF(cliBuf); - return; - } - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d", "Ant PG Num/ Ant Mech/ Ant Pos:", \ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos); CL_PRINTF(cliBuf); @@ -2934,24 +3150,26 @@ EXhalbtc8723b1ant_DisplayCoexInfo( pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_HS_RSSI, &btHsRssi); CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "Wifi rssi/ HS rssi", \ - wifiRssi, btHsRssi); + wifiRssi-100, btHsRssi-100); CL_PRINTF(cliBuf); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "Wifi bLink/ bRoam/ bScan", \ - bLink, bRoam, bScan); + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %s", "Wifi bLink/ bRoam/ bScan/ bHi-Pri", \ + bLink, bRoam, bScan,((pCoexSta->bWiFiIsHighPriTask)? "1":"0")); CL_PRINTF(cliBuf); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ %s ", "Wifi status", \ + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); + + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ %s/ AP=%d/ %s ", "Wifi status", \ (bWifiUnder5G? "5G":"2.4G"), - ((BTC_WIFI_BW_LEGACY==wifiBw)? "Legacy": (((BTC_WIFI_BW_HT40==wifiBw)? "HT40":"HT20"))), - ((!bWifiBusy)? "idle": ((BTC_WIFI_TRAFFIC_TX==wifiTrafficDir)? "uplink":"downlink"))); + ((bWifiUnderBMode)? "11b": ((BTC_WIFI_BW_LEGACY==wifiBw)? "11bg": (((BTC_WIFI_BW_HT40==wifiBw)? "HT40":"HT20")))), + ((!bWifiBusy)? "idle": ((BTC_WIFI_TRAFFIC_TX==wifiTrafficDir)? "uplink":"downlink")), pCoexSta->nScanAPNum,( pCoexSta->bCCKLock)? "Lock":"noLock"); CL_PRINTF(cliBuf); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); @@ -2961,17 +3179,36 @@ EXhalbtc8723b1ant_DisplayCoexInfo( ((wifiLinkStatus&WIFI_P2P_GC_CONNECTED)? 1:0) ); CL_PRINTF(cliBuf); - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \ + + PopReportIn10s++; + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d/ %d] ", "BT [status/ rssi/ retryCnt/ popCnt]", \ ((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle": ( (BT_8723B_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))), - pCoexSta->btRssi, pCoexSta->btRetryCnt); + pCoexSta->btRssi, pCoexSta->btRetryCnt, pCoexSta->popEventCnt); CL_PRINTF(cliBuf); + if (PopReportIn10s >= 5) + { + pCoexSta->popEventCnt = 0; + PopReportIn10s = 0; + } + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ pBtLinkInfo->bScoExist, pBtLinkInfo->bHidExist, pBtLinkInfo->bPanExist, pBtLinkInfo->bA2dpExist); CL_PRINTF(cliBuf); + + if (pStackInfo->bProfileNotified) + { pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); + } + else + { + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Role", \ + (pBtLinkInfo->bSlaveRole )? "Slave":"Master"); + CL_PRINTF(cliBuf); + } + btInfoExt = pCoexSta->btInfoExt; CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \ @@ -3027,13 +3264,19 @@ EXhalbtc8723b1ant_DisplayCoexInfo( pCoexDm->psTdmaPara[4], psTdmaCase, pCoexDm->bAutoTdmaAdjust); CL_PRINTF(cliBuf); + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "Coex Table Type", \ + pCoexSta->nCoexTableType); + CL_PRINTF(cliBuf); + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "IgnWlanAct", \ pCoexDm->bCurIgnoreWlanAct); CL_PRINTF(cliBuf); + /* CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Latest error condition(should be 0)", \ pCoexDm->errorCondition); CL_PRINTF(cliBuf); + */ } // Hw setting @@ -3061,9 +3304,10 @@ EXhalbtc8723b1ant_DisplayCoexInfo( u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67); - u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x948/ 0x67[5] / 0x765", \ - u4Tmp[0], ((u1Tmp[0]&0x20)>> 5), u1Tmp[1]); + u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x764); + u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e); + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x948/ 0x67[5] / 0x764 / 0x76e", \ + u4Tmp[0], ((u1Tmp[0]&0x20)>> 5), (u4Tmp[1] & 0xffff), u1Tmp[1]); CL_PRINTF(cliBuf); u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x92c); @@ -3109,6 +3353,15 @@ EXhalbtc8723b1ant_DisplayCoexInfo( u4Tmp[0]&0xffff, faOfdm, faCck); CL_PRINTF(cliBuf); + + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_OK CCK/11g/11n/11n-Agg", \ + pCoexSta->nCRCOK_CCK, pCoexSta->nCRCOK_11g, pCoexSta->nCRCOK_11n, pCoexSta->nCRCOK_11nAgg); + CL_PRINTF(cliBuf); + + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_Err CCK/11g/11n/11n-Agg", \ + pCoexSta->nCRCErr_CCK, pCoexSta->nCRCErr_11g, pCoexSta->nCRCErr_11n, pCoexSta->nCRCErr_11nAgg); + CL_PRINTF(cliBuf); + u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); @@ -3123,7 +3376,7 @@ EXhalbtc8723b1ant_DisplayCoexInfo( pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); CL_PRINTF(cliBuf); #if(BT_AUTO_REPORT_ONLY_8723B_1ANT == 1) - halbtc8723b1ant_MonitorBtCtr(pBtCoexist); + //halbtc8723b1ant_MonitorBtCtr(pBtCoexist); #endif pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); } @@ -3149,17 +3402,16 @@ EXhalbtc8723b1ant_IpsNotify( halbtc8723b1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, TRUE); //halbtc8723b1ant_SetAntPathDCut(pBtCoexist, FALSE, FALSE, FALSE, BTC_ANT_PATH_BT, BTC_WIFI_STAT_NORMAL_OFF); - - pCoexSta->bFinishInitHW = FALSE; } else if(BTC_IPS_LEAVE == type) { BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], IPS LEAVE notify\n")); - pCoexSta->bUnderIps = FALSE; halbtc8723b1ant_InitHwConfig(pBtCoexist, FALSE, FALSE); halbtc8723b1ant_InitCoexDm(pBtCoexist); halbtc8723b1ant_QueryBtInfo(pBtCoexist); + + pCoexSta->bUnderIps = FALSE; } } @@ -3200,18 +3452,15 @@ EXhalbtc8723b1ant_ScanNotify( u4Byte u4Tmp; if(pBtCoexist->bManualControl || - pBtCoexist->bStopCoexDm || - pBtCoexist->btInfo.bBtDisabled ) + pBtCoexist->bStopCoexDm ) return; - pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); - pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); - if(BTC_SCAN_START == type) { pCoexSta->bWiFiIsHighPriTask = TRUE; BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], SCAN START notify\n")); + halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); //Force antenna setup for no scan result issue u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67); @@ -3224,8 +3473,16 @@ EXhalbtc8723b1ant_ScanNotify( { pCoexSta->bWiFiIsHighPriTask = FALSE; BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], SCAN FINISH notify\n")); + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &pCoexSta->nScanAPNum); } + if(pBtCoexist->btInfo.bBtDisabled) + return; + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); + halbtc8723b1ant_QueryBtInfo(pBtCoexist); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); @@ -3295,12 +3552,15 @@ EXhalbtc8723b1ant_ConnectNotify( if(BTC_ASSOCIATE_START == type) { pCoexSta->bWiFiIsHighPriTask = TRUE; + halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); //Force antenna setup for no scan result issue BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], CONNECT START notify\n")); + pCoexDm->nArpCnt = 0; } else { pCoexSta->bWiFiIsHighPriTask = FALSE; BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], CONNECT FINISH notify\n")); + //pCoexDm->nArpCnt = 0; } pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); @@ -3355,6 +3615,7 @@ EXhalbtc8723b1ant_MediaStatusNotify( u1Byte H2C_Parameter[3] ={0}; u4Byte wifiBw; u1Byte wifiCentralChnl; + BOOLEAN bWifiUnderBMode = FALSE; if(pBtCoexist->bManualControl || pBtCoexist->bStopCoexDm || @@ -3364,10 +3625,33 @@ EXhalbtc8723b1ant_MediaStatusNotify( if(BTC_MEDIA_CONNECT == type) { BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], MEDIA connect notify\n")); + halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); //Force antenna setup for no scan result issue + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); + + //Set CCK Tx/Rx high Pri except 11b mode + if (bWifiUnderBMode) + { + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x00); //CCK Tx + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x00); //CCK Rx + } + else + { + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x10); //CCK Tx + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x10); //CCK Rx + } + + pCoexDm->backupArfrCnt1 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); + pCoexDm->backupArfrCnt2 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); + pCoexDm->backupRetryLimit = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); + pCoexDm->backupAmpduMaxTime = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); } else { BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], MEDIA disconnect notify\n")); + pCoexDm->nArpCnt = 0; + + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cd, 0x0); //CCK Tx + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cf, 0x0); //CCK Rx } // only 2.4G we need to inform bt the chnl mask @@ -3416,14 +3700,25 @@ EXhalbtc8723b1ant_SpecialPacketNotify( BTC_PACKET_EAPOL == type || BTC_PACKET_ARP == type ) { - pCoexSta->bWiFiIsHighPriTask = TRUE; - if (BTC_PACKET_ARP == type) { BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], special Packet ARP notify\n")); + + pCoexDm->nArpCnt++; + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], ARP Packet Count = %d\n", pCoexDm->nArpCnt)); + + if(pCoexDm->nArpCnt >= 10) // if APR PKT > 10 after connect, do not go to ActionWifiConnectedSpecialPacket(pBtCoexist) + { + pCoexSta->bWiFiIsHighPriTask = FALSE; + } + else + { + pCoexSta->bWiFiIsHighPriTask = TRUE; + } } else { + pCoexSta->bWiFiIsHighPriTask = TRUE; BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], special Packet DHCP or EAPOL notify\n")); } } @@ -3459,9 +3754,8 @@ EXhalbtc8723b1ant_SpecialPacketNotify( if( BTC_PACKET_DHCP == type || BTC_PACKET_EAPOL == type || - BTC_PACKET_ARP == type ) - { - //BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], special Packet(%d) notify\n", type)); + ( (BTC_PACKET_ARP == type ) && (pCoexSta->bWiFiIsHighPriTask) ) ) + { halbtc8723b1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); } } @@ -3492,7 +3786,6 @@ EXhalbtc8723b1ant_BtInfoNotify( pCoexSta->btInfoC2h[rspSource][i] = tmpBuf[i]; if(i == 1) btInfo = tmpBuf[i]; - if(i == length-1) { BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("0x%02x]\n", tmpBuf[i])); @@ -3501,7 +3794,6 @@ EXhalbtc8723b1ant_BtInfoNotify( { BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("0x%02x, ", tmpBuf[i])); } - } if(BT_INFO_SRC_8723B_1ANT_WIFI_FW != rspSource) @@ -3509,13 +3801,17 @@ EXhalbtc8723b1ant_BtInfoNotify( pCoexSta->btRetryCnt = // [3:0] pCoexSta->btInfoC2h[rspSource][2]&0xf; + if (pCoexSta->btRetryCnt >= 1) + pCoexSta->popEventCnt++; + if (pCoexSta->btInfoC2h[rspSource][2]&0x20) pCoexSta->bC2hBtPage = TRUE; else pCoexSta->bC2hBtPage = FALSE; pCoexSta->btRssi = - pCoexSta->btInfoC2h[rspSource][3]*2+10; + pCoexSta->btInfoC2h[rspSource][3]*2-90; + //pCoexSta->btInfoC2h[rspSource][3]*2+10; pCoexSta->btInfoExt = pCoexSta->btInfoC2h[rspSource][4]; @@ -3649,6 +3945,44 @@ EXhalbtc8723b1ant_BtInfoNotify( halbtc8723b1ant_RunCoexistMechanism(pBtCoexist); } +VOID +EXhalbtc8723b1ant_RfStatusNotify( + IN PBTC_COEXIST pBtCoexist, + IN u1Byte type + ) +{ + u4Byte u4Tmp; + u1Byte u1Tmpa,u1Tmpb, u1Tmpc; + + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], RF Status notify\n")); + + if(BTC_RF_ON == type) + { + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], RF is turned ON!!\n")); + pBtCoexist->bStopCoexDm = FALSE; + } + else if(BTC_RF_OFF == type) + { + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], RF is turned OFF!!\n")); + + halbtc8723b1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); + halbtc8723b1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); + halbtc8723b1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, TRUE); + //halbtc8723b1ant_SetAntPathDCut(pBtCoexist, FALSE, FALSE, FALSE, BTC_ANT_PATH_BT, BTC_WIFI_STAT_NORMAL_OFF); + + halbtc8723b1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); + pBtCoexist->bStopCoexDm = TRUE; + + u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948); + u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765); + u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67); + u1Tmpc = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e); + + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x, 0x76e=0x%x\n", + u4Tmp, u1Tmpa, u1Tmpb, u1Tmpc)); + } +} + VOID EXhalbtc8723b1ant_HaltNotify( IN PBTC_COEXIST pBtCoexist @@ -3668,8 +4002,6 @@ EXhalbtc8723b1ant_HaltNotify( EXhalbtc8723b1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); pBtCoexist->bStopCoexDm = TRUE; - - pCoexSta->bFinishInitHW = FALSE; } VOID @@ -3691,7 +4023,6 @@ EXhalbtc8723b1ant_PnpNotify( //halbtc8723b1ant_SetAntPathDCut(pBtCoexist, FALSE, FALSE, FALSE, BTC_ANT_PATH_BT, BTC_WIFI_STAT_NORMAL_OFF); pBtCoexist->bStopCoexDm = TRUE; - pCoexSta->bFinishInitHW = FALSE; } else if(BTC_WIFI_PNP_WAKE_UP == pnpState) { @@ -3745,16 +4076,16 @@ EXhalbtc8723b1ant_Periodical( #if(BT_AUTO_REPORT_ONLY_8723B_1ANT == 0) halbtc8723b1ant_QueryBtInfo(pBtCoexist); - halbtc8723b1ant_MonitorBtCtr(pBtCoexist); halbtc8723b1ant_MonitorBtEnableDisable(pBtCoexist); #else + halbtc8723b1ant_MonitorBtCtr(pBtCoexist); + halbtc8723b1ant_MonitorWiFiCtr(pBtCoexist); + if( halbtc8723b1ant_IsWifiStatusChanged(pBtCoexist) || pCoexDm->bAutoTdmaAdjust ) { - //if(pCoexSta->specialPktPeriodCnt > 2) - //{ - halbtc8723b1ant_RunCoexistMechanism(pBtCoexist); - //} + + halbtc8723b1ant_RunCoexistMechanism(pBtCoexist); } pCoexSta->specialPktPeriodCnt++; diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723b1Ant.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723b1Ant.h old mode 100644 new mode 100755 index 102c68610018..9ebec684988e --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723b1Ant.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723b1Ant.h @@ -17,6 +17,8 @@ #define BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT 2 +#define BT_8723B_1ANT_WIFI_NOISY_THRESH 30 //max: 255 + typedef enum _BT_INFO_SRC_8723B_1ANT{ BT_INFO_SRC_8723B_1ANT_WIFI_FW = 0x0, BT_INFO_SRC_8723B_1ANT_BT_RSP = 0x1, @@ -109,6 +111,7 @@ typedef struct _COEX_DM_8723B_1ANT{ u1Byte curRetryLimitType; u1Byte preAmpduTimeType; u1Byte curAmpduTimeType; + u4Byte nArpCnt; u1Byte errorCondition; } COEX_DM_8723B_1ANT, *PCOEX_DM_8723B_1ANT; @@ -122,13 +125,12 @@ typedef struct _COEX_STA_8723B_1ANT{ BOOLEAN bUnderLps; BOOLEAN bUnderIps; - BOOLEAN bFinishInitHW; u4Byte specialPktPeriodCnt; u4Byte highPriorityTx; u4Byte highPriorityRx; u4Byte lowPriorityTx; u4Byte lowPriorityRx; - u1Byte btRssi; + s1Byte btRssi; BOOLEAN bBtTxRxMask; u1Byte preBtRssiState; u1Byte preWifiRssiState[4]; @@ -140,12 +142,34 @@ typedef struct _COEX_STA_8723B_1ANT{ BOOLEAN bWiFiIsHighPriTask; //Add for win8.1 page out issue u1Byte btRetryCnt; u1Byte btInfoExt; + u4Byte popEventCnt; + u1Byte nScanAPNum; + + u4Byte nCRCOK_CCK; + u4Byte nCRCOK_11g; + u4Byte nCRCOK_11n; + u4Byte nCRCOK_11nAgg; + + u4Byte nCRCErr_CCK; + u4Byte nCRCErr_11g; + u4Byte nCRCErr_11n; + u4Byte nCRCErr_11nAgg; + + BOOLEAN bCCKLock; + BOOLEAN bPreCCKLock; + u1Byte nCoexTableType; + + BOOLEAN bForceLpsOn; }COEX_STA_8723B_1ANT, *PCOEX_STA_8723B_1ANT; //=========================================== // The following is interface which will notify coex module. //=========================================== VOID +EXhalbtc8723b1ant_PowerOnSetting( + IN PBTC_COEXIST pBtCoexist + ); +VOID EXhalbtc8723b1ant_InitHwConfig( IN PBTC_COEXIST pBtCoexist, IN BOOLEAN bWifiOnly @@ -191,6 +215,11 @@ EXhalbtc8723b1ant_BtInfoNotify( IN u1Byte length ); VOID +EXhalbtc8723b1ant_RfStatusNotify( + IN PBTC_COEXIST pBtCoexist, + IN u1Byte type + ); +VOID EXhalbtc8723b1ant_HaltNotify( IN PBTC_COEXIST pBtCoexist ); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723b2Ant.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723b2Ant.c old mode 100644 new mode 100755 index 72dfe4d72298..34795bd91d4f --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723b2Ant.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723b2Ant.c @@ -1377,7 +1377,7 @@ halbtc8723b2ant_SetAntPath( pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_EXT_SWITCH, &bPgExtSwitch); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); // [31:16]=fw ver, [15:0]=fw sub ver - if((fwVer<0xc0000) || bPgExtSwitch) + if((fwVer>0 && fwVer<0xc0000) || bPgExtSwitch) bUseExtSwitch = TRUE; if(bInitHwCfg) @@ -1388,9 +1388,17 @@ halbtc8723b2ant_SetAntPath( pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x930, 0x77); pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1); + if(fwVer >= 0x180000) + { /* Use H2C to set GNT_BT to LOW */ H2C_Parameter[0] = 0; pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter); + } + else + { + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x0); + } + pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); //WiFi TRx Mask off @@ -1420,7 +1428,6 @@ halbtc8723b2ant_SetAntPath( pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); } - // ext switch setting if(bUseExtSwitch) { @@ -3516,20 +3523,27 @@ halbtc8723b2ant_WifiOffHwCfg( ) { BOOLEAN bIsInMpMode = FALSE; - PADAPTER padapter=pBtCoexist->Adapter; u1Byte H2C_Parameter[2] ={0}; + u4Byte fwVer=0; // set wlan_act to low pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); //WiFi goto standby while GNT_BT 0-->1 - + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); + if(fwVer >= 0x180000) + { /* Use H2C to set GNT_BT to HIGH */ H2C_Parameter[0] = 1; pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter); + } + else + { + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18); + } pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_IS_IN_MP_MODE, &bIsInMpMode); - if (bIsInMpMode == FALSE) + if(!bIsInMpMode) pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x0); //BT select s0/s1 is controlled by BT else pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1); //BT select s0/s1 is controlled by WiFi @@ -3578,6 +3592,71 @@ halbtc8723b2ant_InitHwConfig( //============================================================ // extern function start with EXhalbtc8723b2ant_ //============================================================ +VOID +EXhalbtc8723b2ant_PowerOnSetting( + IN PBTC_COEXIST pBtCoexist + ) +{ + PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; + u1Byte u1Tmp=0x4; /* Set BIT2 by default since it's 2ant case */ + u2Byte u2Tmp=0x0; + + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x67, 0x20); + + // enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly. + u2Tmp = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x2); + pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x2, u2Tmp|BIT0|BIT1); + + // set GRAN_BT = 1 + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18); + // set WLAN_ACT = 0 + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); + + // + // S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) + // Local setting bit define + // BIT0: "0" for no antenna inverse; "1" for antenna inverse + // BIT1: "0" for internal switch; "1" for external switch + // BIT2: "0" for one antenna; "1" for two antenna + // NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 + if(pBtCoexist->chipInterface == BTC_INTF_USB) + { + // fixed at S0 for USB interface + pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); + + u1Tmp |= 0x1; // antenna inverse + pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0xfe08, u1Tmp); + + pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT; + } + else + { + // for PCIE and SDIO interface, we check efuse 0xc3[6] + if(pBoardInfo->singleAntPath == 0) + { + // set to S1 + pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x280); + pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; + } + else if(pBoardInfo->singleAntPath == 1) + { + // set to S0 + pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); + u1Tmp |= 0x1; // antenna inverse + pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT; + } + + if(pBtCoexist->chipInterface == BTC_INTF_PCI) + { + pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x384, u1Tmp); + } + else if(pBtCoexist->chipInterface == BTC_INTF_SDIO) + { + pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x60, u1Tmp); + } + } +} + VOID EXhalbtc8723b2ant_InitHwConfig( IN PBTC_COEXIST pBtCoexist, @@ -3627,13 +3706,6 @@ EXhalbtc8723b2ant_DisplayCoexInfo( CL_PRINTF(cliBuf); } - if(!pBoardInfo->bBtExist) - { - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!"); - CL_PRINTF(cliBuf); - return; - } - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); CL_PRINTF(cliBuf); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723b2Ant.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723b2Ant.h old mode 100644 new mode 100755 index 54558aadccbc..d16466d18f79 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723b2Ant.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8723b2Ant.h @@ -129,6 +129,10 @@ typedef struct _COEX_STA_8723B_2ANT{ // The following is interface which will notify coex module. //=========================================== VOID +EXhalbtc8723b2ant_PowerOnSetting( + IN PBTC_COEXIST pBtCoexist + ); +VOID EXhalbtc8723b2ant_InitHwConfig( IN PBTC_COEXIST pBtCoexist, IN BOOLEAN bWifiOnly diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8812a1Ant.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8812a1Ant.c old mode 100644 new mode 100755 index 4ae158b405fe..d705431b51b3 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8812a1Ant.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8812a1Ant.c @@ -2091,6 +2091,13 @@ halbtc8812a1ant_InitCoexDm( //============================================================ // extern function start with EXhalbtc8812a1ant_ //============================================================ +VOID +EXhalbtc8812a1ant_PowerOnSetting( + IN PBTC_COEXIST pBtCoexist + ) +{ +} + VOID EXhalbtc8812a1ant_InitHwConfig( IN PBTC_COEXIST pBtCoexist, @@ -2186,13 +2193,6 @@ EXhalbtc8812a1ant_DisplayCoexInfo( CL_PRINTF(cliBuf); } - if(!pBoardInfo->bBtExist) - { - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!"); - CL_PRINTF(cliBuf); - return; - } - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); CL_PRINTF(cliBuf); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8812a1Ant.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8812a1Ant.h old mode 100644 new mode 100755 index 3c7cd7324fc7..4f2df7a6033d --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8812a1Ant.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8812a1Ant.h @@ -132,6 +132,10 @@ typedef struct _COEX_STA_8812A_1ANT{ // The following is interface which will notify coex module. //=========================================== VOID +EXhalbtc8812a1ant_PowerOnSetting( + IN PBTC_COEXIST pBtCoexist + ); +VOID EXhalbtc8812a1ant_InitHwConfig( IN PBTC_COEXIST pBtCoexist, IN BOOLEAN bWifiOnly diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8812a2Ant.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8812a2Ant.c old mode 100644 new mode 100755 index c1c607220b9d..e0737098f83d --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8812a2Ant.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8812a2Ant.c @@ -4125,6 +4125,13 @@ halbtc8812a2ant_InitHwConfig( //============================================================ // extern function start with EXhalbtc8812a2ant_ //============================================================ +VOID +EXhalbtc8812a2ant_PowerOnSetting( + IN PBTC_COEXIST pBtCoexist + ) +{ +} + VOID EXhalbtc8812a2ant_InitHwConfig( IN PBTC_COEXIST pBtCoexist, @@ -4174,13 +4181,6 @@ EXhalbtc8812a2ant_DisplayCoexInfo( CL_PRINTF(cliBuf); } - if(!pBoardInfo->bBtExist) - { - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!"); - CL_PRINTF(cliBuf); - return; - } - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); CL_PRINTF(cliBuf); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8812a2Ant.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8812a2Ant.h old mode 100644 new mode 100755 index af55c1627790..4f6f5d1210c7 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8812a2Ant.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8812a2Ant.h @@ -148,6 +148,10 @@ typedef struct _COEX_STA_8812A_2ANT{ // The following is interface which will notify coex module. //=========================================== VOID +EXhalbtc8812a2ant_PowerOnSetting( + IN PBTC_COEXIST pBtCoexist + ); +VOID EXhalbtc8812a2ant_InitHwConfig( IN PBTC_COEXIST pBtCoexist, IN BOOLEAN bWifiOnly diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8821a1Ant.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8821a1Ant.c old mode 100644 new mode 100755 index bb7990fc18a0..130566a2f6d4 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8821a1Ant.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8821a1Ant.c @@ -1,7 +1,7 @@ //============================================================ // Description: // -// This file is for RTL8821A Co-exist mechanism +// This file is for 8821A_1ANT Co-exist mechanism // // History // 2012/11/15 Cosa first check in. @@ -27,8 +27,8 @@ const char *const GLBtInfoSrc8821a1Ant[]={ "BT Info[bt auto report]", }; -u4Byte GLCoexVerDate8821a1Ant=20130816; -u4Byte GLCoexVer8821a1Ant=0x41; +u4Byte GLCoexVerDate8821a1Ant=20140306; +u4Byte GLCoexVer8821a1Ant=0x4b; //============================================================ // local function proto type if needed @@ -420,7 +420,17 @@ halbtc8821a1ant_MonitorBtCtr( u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; u1Byte u1Tmp, u1Tmp1; s4Byte wifiRssi; - +#if 0 + //to avoid 0x76e[3] = 1 (WLAN_Act control by PTA) during IPS + if (! (pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e) & 0x8) ) + { + pCoexSta->highPriorityTx = 65535; + pCoexSta->highPriorityRx = 65535; + pCoexSta->lowPriorityTx = 65535; + pCoexSta->lowPriorityRx = 65535; + return; + } +#endif regHPTxRx = 0x770; regLPTxRx = 0x774; @@ -915,6 +925,8 @@ halbtc8821a1ant_CoexTableWithType( IN u1Byte type ) { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], ********** CoexTable(%d) **********\n", type)); + switch(type) { case 0: @@ -927,19 +939,19 @@ halbtc8821a1ant_CoexTableWithType( halbtc8821a1ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0x5a5a5a5a, 0xffffff, 0x3); break; case 3: - halbtc8821a1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0xaaaaaaaa, 0xffffff, 0x3); + halbtc8821a1ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0xaaaaaaaa, 0xffffff, 0x3); break; case 4: - halbtc8821a1ant_CoexTable(pBtCoexist, bForceExec, 0xffffffff, 0xffffffff, 0xffffff, 0x3); + halbtc8821a1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0xaaaaaaaa, 0xffffff, 0x3); break; case 5: - halbtc8821a1ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5fff5fff, 0xffffff, 0x3); + halbtc8821a1ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0xaaaa5a5a, 0xffffff, 0x3); break; case 6: - halbtc8821a1ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0x5a5a5a5a, 0xffffff, 0x3); + halbtc8821a1ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0xaaaa5a5a, 0xffffff, 0x3); break; case 7: - halbtc8821a1ant_CoexTable(pBtCoexist, bForceExec, 0x5afa5afa, 0x5afa5afa, 0xffffff, 0x3); + halbtc8821a1ant_CoexTable(pBtCoexist, bForceExec, 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3); break; default: break; @@ -1000,18 +1012,35 @@ halbtc8821a1ant_SetFwPstdma( ) { u1Byte H2C_Parameter[5] ={0}; + u1Byte realByte1=byte1, realByte5=byte5; + BOOLEAN bApEnable=FALSE; + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); + + if(bApEnable) + { + if(byte1&BIT4 && !(byte1&BIT5)) + { + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], FW for 1Ant AP mode\n")); + realByte1 &= ~BIT4; + realByte1 |= BIT5; - H2C_Parameter[0] = byte1; + realByte5 |= BIT5; + realByte5 &= ~BIT6; + } + } + + H2C_Parameter[0] = realByte1; H2C_Parameter[1] = byte2; H2C_Parameter[2] = byte3; H2C_Parameter[3] = byte4; - H2C_Parameter[4] = byte5; + H2C_Parameter[4] = realByte5; - pCoexDm->psTdmaPara[0] = byte1; + pCoexDm->psTdmaPara[0] = realByte1; pCoexDm->psTdmaPara[1] = byte2; pCoexDm->psTdmaPara[2] = byte3; pCoexDm->psTdmaPara[3] = byte4; - pCoexDm->psTdmaPara[4] = byte5; + pCoexDm->psTdmaPara[4] = realByte5; BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], PS-TDMA H2C cmd =0x%x%08x\n", H2C_Parameter[0], @@ -1075,7 +1104,8 @@ halbtc8821a1ant_SwMechanism( IN BOOLEAN bLowPenaltyRA ) { - BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], SM[LpRA] = %d \n", bLowPenaltyRA)); + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], SM[LpRA] = %d\n", + bLowPenaltyRA)); halbtc8821a1ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA); } @@ -1100,8 +1130,8 @@ halbtc8821a1ant_SetAntPath( u4Tmp |= BIT24; pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); - pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x975, 0x3, 0x3); - pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb4, 0x77); + //0x765 = 0x18 + pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x765, 0x18, 0x3); if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) { @@ -1110,7 +1140,7 @@ halbtc8821a1ant_SetAntPath( H2C_Parameter[1] = 1; pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); - pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x64, 0x1, 0x1); //Main Ant to BT for IPS case 0x4c[23]=1 + //pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x64, 0x1, 0x1); //Main Ant to BT for IPS case 0x4c[23]=1 } else { @@ -1119,7 +1149,7 @@ halbtc8821a1ant_SetAntPath( H2C_Parameter[1] = 1; pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); - pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x64, 0x1, 0x0); //Aux Ant to BT for IPS case 0x4c[23]=1 + //pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x64, 0x1, 0x0); //Aux Ant to BT for IPS case 0x4c[23]=1 } } else if(bWifiOff) @@ -1129,18 +1159,28 @@ halbtc8821a1ant_SetAntPath( u4Tmp &= ~BIT23; u4Tmp &= ~BIT24; pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); + + //0x765 = 0x18 + pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x765, 0x18, 0x3); + } + else + { + //0x765 = 0x0 + pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x765, 0x18, 0x0); } // ext switch setting switch(antPosType) { case BTC_ANT_PATH_WIFI: + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb4, 0x77); if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xcb7, 0x30, 0x1); else pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xcb7, 0x30, 0x2); break; case BTC_ANT_PATH_BT: + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb4, 0x77); if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xcb7, 0x30, 0x2); else @@ -1148,6 +1188,7 @@ halbtc8821a1ant_SetAntPath( break; default: case BTC_ANT_PATH_PTA: + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb4, 0x66); if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xcb7, 0x30, 0x1); else @@ -1167,25 +1208,24 @@ halbtc8821a1ant_PsTdma( PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; BOOLEAN bTurnOnByCnt=FALSE; u1Byte psTdmaTypeByCnt=0, rssiAdjustVal=0; - u4Byte fwVer=0; + //u4Byte fwVer=0; pCoexDm->bCurPsTdmaOn = bTurnOn; pCoexDm->curPsTdma = type; - if(!bForceExec) + if (pCoexDm->bCurPsTdmaOn) { - if (pCoexDm->bCurPsTdmaOn) - { - BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], ********** TDMA(on, %d) **********\n", - pCoexDm->curPsTdma)); - } - else - { - BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], ********** TDMA(off, %d) **********\n", - pCoexDm->curPsTdma)); - } - + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], ********** TDMA(on, %d) **********\n", + pCoexDm->curPsTdma)); + } + else + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], ********** TDMA(off, %d) **********\n", + pCoexDm->curPsTdma)); + } + if(!bForceExec) + { if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) return; @@ -1206,7 +1246,7 @@ halbtc8821a1ant_PsTdma( rssiAdjustVal = 14; break; case 3: - halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x1d, 0x1d, 0x0, 0x10); + halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x1d, 0x1d, 0x0, 0x52); break; case 4: halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x93, 0x15, 0x3, 0x14, 0x0); @@ -1216,7 +1256,7 @@ halbtc8821a1ant_PsTdma( halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x15, 0x3, 0x11, 0x10); break; case 6: - halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x13, 0xa, 0x3, 0x0, 0x0); + halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x20, 0x3, 0x11, 0x13); break; case 7: halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x13, 0xc, 0x5, 0x0, 0x0); @@ -1232,17 +1272,17 @@ halbtc8821a1ant_PsTdma( halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x13, 0xa, 0xa, 0x0, 0x40); break; case 11: - halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x14, 0x03, 0x10, 0x10); + halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x15, 0x03, 0x10, 0x50); rssiAdjustVal = 20; break; case 12: halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x0a, 0x0a, 0x0, 0x50); break; case 13: - halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x18, 0x18, 0x0, 0x10); + halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x12, 0x12, 0x0, 0x50); break; case 14: - halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x21, 0x3, 0x10, 0x10); + halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x21, 0x3, 0x10, 0x52); break; case 15: halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x13, 0xa, 0x3, 0x8, 0x0); @@ -1259,7 +1299,7 @@ halbtc8821a1ant_PsTdma( halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x35, 0x03, 0x11, 0x10); break; case 21: - halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x15, 0x03, 0x11, 0x10); + halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x25, 0x03, 0x11, 0x11); break; case 22: halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x25, 0x03, 0x11, 0x10); @@ -1291,13 +1331,13 @@ halbtc8821a1ant_PsTdma( halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0xab, 0x1a, 0x1a, 0x1, 0x10); break; case 30: - halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x14, 0x3, 0x10, 0x50); + halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x51, 0x30, 0x3, 0x10, 0x10); break; case 31: halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0xd3, 0x1a, 0x1a, 0, 0x58); break; case 32: - halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x61, 0xa, 0x3, 0x10, 0x0); + halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x61, 0x35, 0x3, 0x11, 0x11); break; case 33: halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0xa3, 0x25, 0x3, 0x30, 0x90); @@ -1311,6 +1351,10 @@ halbtc8821a1ant_PsTdma( case 36: halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0xd3, 0x12, 0x3, 0x14, 0x50); break; + case 40: // SoftAP only with no sta associated,BT disable ,TDMA mode for power saving + /* here softap mode screen off will cost 70-80mA for phone */ + halbtc8821a1ant_SetFwPstdma(pBtCoexist, 0x23, 0x18, 0x00, 0x10, 0x24); + break; } } else @@ -1869,6 +1913,16 @@ halbtc8821a1ant_ActionHidA2dp( // Non-Software Coex Mechanism start // //============================================= +VOID +halbtc8821a1ant_ActionWifiMultiPort( + IN PBTC_COEXIST pBtCoexist + ) +{ + halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); + + halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); + halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); +} VOID halbtc8821a1ant_ActionHs( @@ -1876,38 +1930,50 @@ halbtc8821a1ant_ActionHs( ) { halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); - halbtc8821a1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 2); + halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); } VOID halbtc8821a1ant_ActionBtInquiry( IN PBTC_COEXIST pBtCoexist ) -{ +{ PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; - BOOLEAN bWifiConnected=FALSE; - + BOOLEAN bWifiConnected=FALSE, bApEnable=FALSE, bWifiBusy=FALSE, bBtBusy=FALSE; + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); + pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); - if(!bWifiConnected) + if((!bWifiConnected) && (!pCoexSta->bWiFiIsHighPriTask)) { halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); - halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); - halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); + halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); + + halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); } - else if( (pBtLinkInfo->bScoExist) || - (pBtLinkInfo->bHidOnly) ) + else if((pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist)) { - // SCO/HID-only busy + // SCO/HID/A2DP busy halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); - halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); + + halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); + } + else if ((pBtLinkInfo->bPanExist) || (bWifiBusy)) + { + halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); + halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); + + halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); } else { - halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); - halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 30); - halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); + halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); + halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); + + halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7); } } @@ -1917,13 +1983,24 @@ halbtc8821a1ant_ActionBtScoHidOnlyBusy( IN u1Byte wifiStatus ) { + PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; + BOOLEAN bWifiConnected=FALSE; + u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); + // tdma and coex table - halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); - if(BT_8821A_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN == wifiStatus) - halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); - else - halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); + if(pBtLinkInfo->bScoExist) + { + halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); + halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); + } + else //HID + { + halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); + halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 5); + } } VOID @@ -1945,18 +2022,26 @@ halbtc8821a1ant_ActionWifiConnectedBtAclBusy( } else if(pBtLinkInfo->bA2dpOnly) //A2DP { - if( (btRssiState == BTC_RSSI_STATE_HIGH) || + if(BT_8821A_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifiStatus) + { + //halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); + //halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); + halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); + halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); + pCoexDm->bAutoTdmaAdjust = FALSE; + } + else if( (btRssiState == BTC_RSSI_STATE_HIGH) || (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) { - halbtc8821a1ant_TdmaDurationAdjustForAcl(pBtCoexist, wifiStatus); + halbtc8821a1ant_TdmaDurationAdjustForAcl(pBtCoexist, wifiStatus); + halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); } else //for low BT RSSI { halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); + halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); pCoexDm->bAutoTdmaAdjust = FALSE; - } - - halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); + } } else if(pBtLinkInfo->bHidExist&&pBtLinkInfo->bA2dpExist) //HID+A2DP { @@ -1968,16 +2053,16 @@ halbtc8821a1ant_ActionWifiConnectedBtAclBusy( } else //for low BT RSSI { - halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); + halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); pCoexDm->bAutoTdmaAdjust = FALSE; } - halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); + halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 6); } else if( (pBtLinkInfo->bPanOnly) || (pBtLinkInfo->bHidExist&&pBtLinkInfo->bPanExist) ) //PAN(OPP,FTP), HID+PAN(OPP,FTP) { halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); - halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); + halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 6); pCoexDm->bAutoTdmaAdjust = FALSE; } else if ( ((pBtLinkInfo->bA2dpExist) && (pBtLinkInfo->bPanExist)) || @@ -2004,20 +2089,80 @@ halbtc8821a1ant_ActionWifiNotConnected( halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); // tdma and coex table - halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); + halbtc8821a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); } VOID -halbtc8821a1ant_ActionWifiNotConnectedAssoAuthScan( +halbtc8821a1ant_ActionWifiNotConnectedScan( IN PBTC_COEXIST pBtCoexist ) { + PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; + halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); + + // tdma and coex table + if(BT_8821A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) + { + if (pBtLinkInfo->bA2dpExist) + { + halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); + halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); + } + else if (pBtLinkInfo->bA2dpExist && pBtLinkInfo->bPanExist) + { + halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); + halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); + } + else + { + halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); + halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); + } + } + else if( (BT_8821A_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || + (BT_8821A_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) + { + halbtc8821a1ant_ActionBtScoHidOnlyBusy(pBtCoexist, + BT_8821A_1ANT_WIFI_STATUS_CONNECTED_SCAN); + } + else + { + //halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); + //halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); + //Bryant Add + halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); + halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); + } +} + +VOID +halbtc8821a1ant_ActionWifiNotConnectedAssoAuth( + IN PBTC_COEXIST pBtCoexist + ) +{ + PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; + + halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); - halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); - halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); + // tdma and coex table + if( (pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) ) + { + halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); + halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); + } + else if( (pBtLinkInfo->bA2dpExist) || (pBtLinkInfo->bPanExist) ) + { + halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); + halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); + } + else + { + halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); + halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); + } } VOID @@ -2027,22 +2172,26 @@ halbtc8821a1ant_ActionWifiConnectedScan( { PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; - // power save state halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); // tdma and coex table if(BT_8821A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) { - if(pBtLinkInfo->bA2dpExist && pBtLinkInfo->bPanExist) + if (pBtLinkInfo->bA2dpExist) + { + halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); + halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); + } + else if (pBtLinkInfo->bA2dpExist && pBtLinkInfo->bPanExist) { halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); - halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); + halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); } else { - halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); - halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); - } + halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); + halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); + } } else if( (BT_8821A_1ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) || (BT_8821A_1ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) ) @@ -2052,8 +2201,12 @@ halbtc8821a1ant_ActionWifiConnectedScan( } else { - halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); - halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); + //halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); + //halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); + + //Bryant Add + halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); + halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); } } @@ -2062,31 +2215,25 @@ halbtc8821a1ant_ActionWifiConnectedSpecialPacket( IN PBTC_COEXIST pBtCoexist ) { - BOOLEAN bHsConnecting=FALSE; PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo; - pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_CONNECTING, &bHsConnecting); - halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); // tdma and coex table - if(BT_8821A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) + if((pBtLinkInfo->bScoExist) || (pBtLinkInfo->bHidExist) || (pBtLinkInfo->bA2dpExist)) { - if(pBtLinkInfo->bA2dpExist && pBtLinkInfo->bPanExist) - { - halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); - halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); - } - else - { - halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); - halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); - } + halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 32); + halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); } - else + else if(pBtLinkInfo->bPanExist) { halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 20); - halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1); + halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4); + } + else + { + halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); + halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); } } @@ -2097,7 +2244,7 @@ halbtc8821a1ant_ActionWifiConnected( { BOOLEAN bWifiBusy=FALSE; BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; - BOOLEAN bUnder4way=FALSE; + BOOLEAN bUnder4way=FALSE, bApEnable=FALSE; u4Byte wifiBw; BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], CoexForWifiConnect()===>\n")); @@ -2115,19 +2262,28 @@ halbtc8821a1ant_ActionWifiConnected( pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); if(bScan || bLink || bRoam) { - halbtc8821a1ant_ActionWifiConnectedScan(pBtCoexist); + if(bScan) + halbtc8821a1ant_ActionWifiConnectedScan(pBtCoexist); + else + halbtc8821a1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], CoexForWifiConnect(), return for wifi is under scan<===\n")); return; } + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable); + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); // power save state - if(BT_8821A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus && !pBtCoexist->btLinkInfo.bHidOnly) - halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); + if(!bApEnable && BT_8821A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus && !pBtCoexist->btLinkInfo.bHidOnly) + { + if(!bWifiBusy && pBtCoexist->btLinkInfo.bA2dpOnly) //A2DP + halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); + else + halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4); + } else halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); // tdma and coex table - pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); if(!bWifiBusy) { if(BT_8821A_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) @@ -2143,7 +2299,7 @@ halbtc8821a1ant_ActionWifiConnected( } else { - halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); + halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); } } @@ -2162,7 +2318,7 @@ halbtc8821a1ant_ActionWifiConnected( } else { - halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); + halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); } } @@ -2246,6 +2402,8 @@ halbtc8821a1ant_RunCoexistMechanism( BOOLEAN bBtCtrlAggBufSize=FALSE; u1Byte aggBufSize=5; u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH; + u4Byte wifiLinkStatus=0; + u4Byte numOfWifiLink=0; BOOLEAN bWifiUnder5G=FALSE; BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], RunCoexistMechanism()===>\n")); @@ -2284,9 +2442,18 @@ halbtc8821a1ant_RunCoexistMechanism( } pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_INC_SCAN_DEV_NUM, &bIncreaseScanDevNum); - pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); + numOfWifiLink = wifiLinkStatus>>16; + if((numOfWifiLink>=2) || (wifiLinkStatus&WIFI_P2P_GO_CONNECTED)) + { + halbtc8821a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); + halbtc8821a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); + halbtc8821a1ant_ActionWifiMultiPort(pBtCoexist); + return; + } + if(!pBtLinkInfo->bScoExist && !pBtLinkInfo->bHidExist) { halbtc8821a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); @@ -2356,7 +2523,12 @@ halbtc8821a1ant_RunCoexistMechanism( pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); if(bScan || bLink || bRoam) - halbtc8821a1ant_ActionWifiNotConnectedAssoAuthScan(pBtCoexist); + { + if (bScan) + halbtc8821a1ant_ActionWifiNotConnectedScan(pBtCoexist); + else + halbtc8821a1ant_ActionWifiNotConnectedAssoAuth(pBtCoexist); + } else halbtc8821a1ant_ActionWifiNotConnected(pBtCoexist); } @@ -2375,14 +2547,15 @@ halbtc8821a1ant_InitCoexDm( // sw all off halbtc8821a1ant_SwMechanism(pBtCoexist, FALSE); - halbtc8821a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); + //halbtc8821a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); halbtc8821a1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); } VOID halbtc8821a1ant_InitHwConfig( IN PBTC_COEXIST pBtCoexist, - IN BOOLEAN bBackUp + IN BOOLEAN bBackUp, + IN BOOLEAN bWifiOnly ) { PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; @@ -2392,9 +2565,12 @@ halbtc8821a1ant_InitHwConfig( u1Byte H2C_Parameter[2] ={0}; BOOLEAN bWifiUnder5G=FALSE; - + BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], 1Ant Init HW Config!!\n")); + if(bWifiOnly) + return; + if(bBackUp) { pCoexDm->backupArfrCnt1 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); @@ -2416,6 +2592,7 @@ halbtc8821a1ant_InitHwConfig( halbtc8821a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, TRUE, FALSE); else halbtc8821a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, TRUE, FALSE); + // PTA parameter halbtc8821a1ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0); @@ -2431,13 +2608,20 @@ halbtc8821a1ant_InitHwConfig( //============================================================ // extern function start with EXhalbtc8821a1ant_ //============================================================ +VOID +EXhalbtc8821a1ant_PowerOnSetting( + IN PBTC_COEXIST pBtCoexist + ) +{ +} + VOID EXhalbtc8821a1ant_InitHwConfig( IN PBTC_COEXIST pBtCoexist, IN BOOLEAN bWifiOnly ) { - halbtc8821a1ant_InitHwConfig(pBtCoexist, TRUE); + halbtc8821a1ant_InitHwConfig(pBtCoexist, TRUE, bWifiOnly); } VOID @@ -2469,7 +2653,7 @@ EXhalbtc8821a1ant_DisplayCoexInfo( BOOLEAN bRoam=FALSE, bScan=FALSE, bLink=FALSE, bWifiUnder5G=FALSE; BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; s4Byte wifiRssi=0, btHsRssi=0; - u4Byte wifiBw, wifiTrafficDir; + u4Byte wifiBw, wifiTrafficDir, faOfdm, faCck, wifiLinkStatus; u1Byte wifiDot11Chnl, wifiHsChnl; u4Byte fwVer=0, btPatchVer=0; @@ -2491,13 +2675,6 @@ EXhalbtc8821a1ant_DisplayCoexInfo( CL_PRINTF(cliBuf); } - if(!pBoardInfo->bBtExist) - { - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!"); - CL_PRINTF(cliBuf); - return; - } - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d", "Ant PG Num/ Ant Mech/ Ant Pos:", \ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos); CL_PRINTF(cliBuf); @@ -2546,6 +2723,14 @@ EXhalbtc8821a1ant_DisplayCoexInfo( ((BTC_WIFI_BW_LEGACY==wifiBw)? "Legacy": (((BTC_WIFI_BW_HT40==wifiBw)? "HT40":"HT20"))), ((!bWifiBusy)? "idle": ((BTC_WIFI_TRAFFIC_TX==wifiTrafficDir)? "uplink":"downlink"))); CL_PRINTF(cliBuf); + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d", "sta/vwifi/hs/p2pGo/p2pGc", \ + ((wifiLinkStatus&WIFI_STA_CONNECTED)? 1:0), ((wifiLinkStatus&WIFI_AP_CONNECTED)? 1:0), + ((wifiLinkStatus&WIFI_HS_CONNECTED)? 1:0), ((wifiLinkStatus&WIFI_P2P_GO_CONNECTED)? 1:0), + ((wifiLinkStatus&WIFI_P2P_GC_CONNECTED)? 1:0) ); + CL_PRINTF(cliBuf); + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \ ((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8821A_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle": ( (BT_8821A_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))), @@ -2611,13 +2796,13 @@ EXhalbtc8821a1ant_DisplayCoexInfo( pCoexDm->psTdmaPara[4], psTdmaCase, pCoexDm->bAutoTdmaAdjust); CL_PRINTF(cliBuf); - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Latest error condition(should be 0)", \ - pCoexDm->errorCondition); - CL_PRINTF(cliBuf); - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ", "IgnWlanAct", \ pCoexDm->bCurIgnoreWlanAct); CL_PRINTF(cliBuf); + + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Latest error condition(should be 0)", \ + pCoexDm->errorCondition); + CL_PRINTF(cliBuf); } // Hw setting @@ -2682,9 +2867,8 @@ EXhalbtc8821a1ant_DisplayCoexInfo( u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); - u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc); - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \ - u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp[0]); + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8(coexTable)", \ + u4Tmp[0], u4Tmp[1], u4Tmp[2]); CL_PRINTF(cliBuf); CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770(high-pri rx/tx)", \ @@ -2715,17 +2899,20 @@ EXhalbtc8821a1ant_IpsNotify( { BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], IPS ENTER notify\n")); pCoexSta->bUnderIps = TRUE; - halbtc8821a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, TRUE); - //set PTA control - halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 8); + + halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0); + halbtc8821a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, TRUE); + //halbtc8821a1ant_SetAntPathDCut(pBtCoexist, FALSE, FALSE, FALSE, BTC_ANT_PATH_BT, BTC_WIFI_STAT_NORMAL_OFF); } else if(BTC_IPS_LEAVE == type) { BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], IPS LEAVE notify\n")); pCoexSta->bUnderIps = FALSE; - halbtc8821a1ant_RunCoexistMechanism(pBtCoexist); + halbtc8821a1ant_InitHwConfig(pBtCoexist, FALSE, FALSE); + halbtc8821a1ant_InitCoexDm(pBtCoexist); + halbtc8821a1ant_QueryBtInfo(pBtCoexist); } } @@ -2757,10 +2944,29 @@ EXhalbtc8821a1ant_ScanNotify( ) { BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; + u4Byte wifiLinkStatus=0; + u4Byte numOfWifiLink=0; + BOOLEAN bBtCtrlAggBufSize=FALSE; + u1Byte aggBufSize=5; if(pBtCoexist->bManualControl || - pBtCoexist->bStopCoexDm || - pBtCoexist->btInfo.bBtDisabled ) + pBtCoexist->bStopCoexDm ) + return; + + if(BTC_SCAN_START == type) + { + pCoexSta->bWiFiIsHighPriTask = TRUE; + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], SCAN START notify\n")); + + halbtc8821a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 8); //Force antenna setup for no scan result issue + } + else + { + pCoexSta->bWiFiIsHighPriTask = FALSE; + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], SCAN FINISH notify\n")); + } + + if(pBtCoexist->btInfo.bBtDisabled) return; pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); @@ -2768,6 +2974,16 @@ EXhalbtc8821a1ant_ScanNotify( halbtc8821a1ant_QueryBtInfo(pBtCoexist); + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); + numOfWifiLink = wifiLinkStatus>>16; + if(numOfWifiLink >= 2) + { + halbtc8821a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); + halbtc8821a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); + halbtc8821a1ant_ActionWifiMultiPort(pBtCoexist); + return; + } + if(pCoexSta->bC2hBtInquiryPage) { halbtc8821a1ant_ActionBtInquiry(pBtCoexist); @@ -2781,10 +2997,10 @@ EXhalbtc8821a1ant_ScanNotify( if(BTC_SCAN_START == type) { - BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], SCAN START notify\n")); + //BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], SCAN START notify\n")); if(!bWifiConnected) // non-connected scan { - halbtc8821a1ant_ActionWifiNotConnectedAssoAuthScan(pBtCoexist); + halbtc8821a1ant_ActionWifiNotConnectedScan(pBtCoexist); } else // wifi is connected { @@ -2793,7 +3009,7 @@ EXhalbtc8821a1ant_ScanNotify( } else if(BTC_SCAN_FINISH == type) { - BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], SCAN FINISH notify\n")); + //BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], SCAN FINISH notify\n")); if(!bWifiConnected) // non-connected scan { halbtc8821a1ant_ActionWifiNotConnected(pBtCoexist); @@ -2812,12 +3028,39 @@ EXhalbtc8821a1ant_ConnectNotify( ) { BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE; + u4Byte wifiLinkStatus=0; + u4Byte numOfWifiLink=0; + BOOLEAN bBtCtrlAggBufSize=FALSE; + u1Byte aggBufSize=5; if(pBtCoexist->bManualControl || pBtCoexist->bStopCoexDm || pBtCoexist->btInfo.bBtDisabled ) return; + if(BTC_ASSOCIATE_START == type) + { + pCoexSta->bWiFiIsHighPriTask = TRUE; + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], CONNECT START notify\n")); + pCoexDm->nArpCnt = 0; + } + else + { + pCoexSta->bWiFiIsHighPriTask = FALSE; + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], CONNECT FINISH notify\n")); + pCoexDm->nArpCnt = 0; + } + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); + numOfWifiLink = wifiLinkStatus>>16; + if(numOfWifiLink >= 2) + { + halbtc8821a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); + halbtc8821a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); + halbtc8821a1ant_ActionWifiMultiPort(pBtCoexist); + return; + } + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); if(pCoexSta->bC2hBtInquiryPage) { @@ -2832,12 +3075,12 @@ EXhalbtc8821a1ant_ConnectNotify( if(BTC_ASSOCIATE_START == type) { - BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], CONNECT START notify\n")); - halbtc8821a1ant_ActionWifiNotConnectedAssoAuthScan(pBtCoexist); + //BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], CONNECT START notify\n")); + halbtc8821a1ant_ActionWifiNotConnectedAssoAuth(pBtCoexist); } else if(BTC_ASSOCIATE_FINISH == type) { - BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], CONNECT FINISH notify\n")); + //BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], CONNECT FINISH notify\n")); pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); if(!bWifiConnected) // non-connected scan @@ -2873,6 +3116,7 @@ EXhalbtc8821a1ant_MediaStatusNotify( else { BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], MEDIA disconnect notify\n")); + pCoexDm->nArpCnt = 0; } // only 2.4G we need to inform bt the chnl mask @@ -2907,14 +3151,49 @@ EXhalbtc8821a1ant_SpecialPacketNotify( ) { BOOLEAN bBtHsOn=FALSE; + u4Byte wifiLinkStatus=0; + u4Byte numOfWifiLink=0; + BOOLEAN bBtCtrlAggBufSize=FALSE; + u1Byte aggBufSize=5; if(pBtCoexist->bManualControl || pBtCoexist->bStopCoexDm || pBtCoexist->btInfo.bBtDisabled ) return; + if( BTC_PACKET_DHCP == type || + BTC_PACKET_EAPOL == type || + BTC_PACKET_ARP == type ) + { + pCoexSta->bWiFiIsHighPriTask = TRUE; + + if(BTC_PACKET_ARP == type) + { + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], special Packet ARP notify\n")); + } + else + { + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], special Packet DHCP or EAPOL notify\n")); + } + } + else + { + pCoexSta->bWiFiIsHighPriTask = FALSE; + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], special Packet [Type = %d] notify\n", type)); + } + pCoexSta->specialPktPeriodCnt = 0; + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus); + numOfWifiLink = wifiLinkStatus>>16; + if(numOfWifiLink >= 2) + { + halbtc8821a1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0); + halbtc8821a1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, bBtCtrlAggBufSize, aggBufSize); + halbtc8821a1ant_ActionWifiMultiPort(pBtCoexist); + return; + } + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); if(pCoexSta->bC2hBtInquiryPage) { @@ -2928,9 +3207,18 @@ EXhalbtc8821a1ant_SpecialPacketNotify( } if( BTC_PACKET_DHCP == type || - BTC_PACKET_EAPOL == type ) + BTC_PACKET_EAPOL == type || + BTC_PACKET_ARP == type ) { - BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], special Packet(%d) notify\n", type)); + //BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], special Packet(%d) notify\n", type)); + if(BTC_PACKET_ARP == type) + { + pCoexDm->nArpCnt++; + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], ARP Packet Count = %d\n", pCoexDm->nArpCnt)); + if(pCoexDm->nArpCnt >= 10) // if APR PKT > 10 after connect, do not go to ActionWifiConnectedSpecialPacket(pBtCoexist) + return; + } + halbtc8821a1ant_ActionWifiConnectedSpecialPacket(pBtCoexist); } } @@ -2979,12 +3267,26 @@ EXhalbtc8821a1ant_BtInfoNotify( pCoexSta->btRetryCnt = // [3:0] pCoexSta->btInfoC2h[rspSource][2]&0xf; + if (pCoexSta->btInfoC2h[rspSource][2]&0x20) + pCoexSta->bC2hBtPage = TRUE; + else + pCoexSta->bC2hBtPage = FALSE; + pCoexSta->btRssi = pCoexSta->btInfoC2h[rspSource][3]*2+10; pCoexSta->btInfoExt = pCoexSta->btInfoC2h[rspSource][4]; + pCoexSta->bBtTxRxMask = (pCoexSta->btInfoC2h[rspSource][2]&0x40); + pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TX_RX_MASK, &pCoexSta->bBtTxRxMask); + if(!pCoexSta->bBtTxRxMask) + { + /* BT into is responded by BT FW and BT RF REG 0x3C != 0x15 => Need to switch BT TRx Mask */ + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x15\n")); + pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x15); + } + // Here we need to resend some wifi info to BT // because bt is reset and loss of the info. if(pCoexSta->btInfoExt & BIT1) @@ -3020,7 +3322,6 @@ EXhalbtc8821a1ant_BtInfoNotify( } else { - BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BT ext info bit4 check, set BT to enable Auto Report!!\n")); halbtc8821a1ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE); } #endif @@ -3064,6 +3365,8 @@ EXhalbtc8821a1ant_BtInfoNotify( halbtc8821a1ant_UpdateBtLinkInfo(pBtCoexist); + btInfo = btInfo & 0x1f; //mask profile bit for connect-ilde identification ( for CSR case: A2DP idle --> 0x41) + if(!(btInfo&BT_INFO_8821A_1ANT_B_CONNECTION)) { pCoexDm->btStatus = BT_8821A_1ANT_BT_STATUS_NON_CONNECTED_IDLE; @@ -3113,15 +3416,16 @@ EXhalbtc8821a1ant_HaltNotify( BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Halt notify\n")); - pBtCoexist->bStopCoexDm = TRUE; - - halbtc8821a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, TRUE); - halbtc8821a1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); - halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); halbtc8821a1ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0); + halbtc8821a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, TRUE); + //halbtc8821a1ant_SetAntPathDCut(pBtCoexist, FALSE, FALSE, FALSE, BTC_ANT_PATH_BT, BTC_WIFI_STAT_NORMAL_OFF); + + halbtc8821a1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); EXhalbtc8821a1ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); + + pBtCoexist->bStopCoexDm = TRUE; } VOID @@ -3135,16 +3439,20 @@ EXhalbtc8821a1ant_PnpNotify( if(BTC_WIFI_PNP_SLEEP == pnpState) { BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Pnp notify to SLEEP\n")); - pBtCoexist->bStopCoexDm = TRUE; - halbtc8821a1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); + halbtc8821a1ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0); - halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 9); + halbtc8821a1ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); + halbtc8821a1ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2); + halbtc8821a1ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, TRUE); + //halbtc8821a1ant_SetAntPathDCut(pBtCoexist, FALSE, FALSE, FALSE, BTC_ANT_PATH_BT, BTC_WIFI_STAT_NORMAL_OFF); + + pBtCoexist->bStopCoexDm = TRUE; } else if(BTC_WIFI_PNP_WAKE_UP == pnpState) { BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Pnp notify to WAKE UP\n")); pBtCoexist->bStopCoexDm = FALSE; - halbtc8821a1ant_InitHwConfig(pBtCoexist, FALSE); + halbtc8821a1ant_InitHwConfig(pBtCoexist, FALSE, FALSE); halbtc8821a1ant_InitCoexDm(pBtCoexist); halbtc8821a1ant_QueryBtInfo(pBtCoexist); } @@ -3185,10 +3493,10 @@ EXhalbtc8821a1ant_Periodical( if( halbtc8821a1ant_IsWifiStatusChanged(pBtCoexist) || pCoexDm->bAutoTdmaAdjust ) { - if(pCoexSta->specialPktPeriodCnt > 2) - { + //if(pCoexSta->specialPktPeriodCnt > 2) + //{ halbtc8821a1ant_RunCoexistMechanism(pBtCoexist); - } + //} } pCoexSta->specialPktPeriodCnt++; diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8821a1Ant.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8821a1Ant.h old mode 100644 new mode 100755 index 4d7f2203aa51..4c7469ef67c8 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8821a1Ant.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8821a1Ant.h @@ -1,7 +1,7 @@ //=========================================== // The following is for 8821A 1ANT BT Co-exist definition //=========================================== -#define BT_AUTO_REPORT_ONLY_8821A_1ANT 0 +#define BT_AUTO_REPORT_ONLY_8821A_1ANT 1 #define BT_INFO_8821A_1ANT_B_FTP BIT7 #define BT_INFO_8821A_1ANT_B_A2DP BIT6 @@ -108,6 +108,7 @@ typedef struct _COEX_DM_8821A_1ANT{ u1Byte curRetryLimitType; u1Byte preAmpduTimeType; u1Byte curAmpduTimeType; + u4Byte nArpCnt; u1Byte errorCondition; } COEX_DM_8821A_1ANT, *PCOEX_DM_8821A_1ANT; @@ -127,12 +128,15 @@ typedef struct _COEX_STA_8821A_1ANT{ u4Byte lowPriorityTx; u4Byte lowPriorityRx; u1Byte btRssi; + BOOLEAN bBtTxRxMask; u1Byte preBtRssiState; u1Byte preWifiRssiState[4]; BOOLEAN bC2hBtInfoReqSent; u1Byte btInfoC2h[BT_INFO_SRC_8821A_1ANT_MAX][10]; u4Byte btInfoC2hCnt[BT_INFO_SRC_8821A_1ANT_MAX]; BOOLEAN bC2hBtInquiryPage; + BOOLEAN bC2hBtPage; //Add for win8.1 page out issue + BOOLEAN bWiFiIsHighPriTask; //Add for win8.1 page out issue u1Byte btRetryCnt; u1Byte btInfoExt; }COEX_STA_8821A_1ANT, *PCOEX_STA_8821A_1ANT; @@ -141,6 +145,10 @@ typedef struct _COEX_STA_8821A_1ANT{ // The following is interface which will notify coex module. //=========================================== VOID +EXhalbtc8821a1ant_PowerOnSetting( + IN PBTC_COEXIST pBtCoexist + ); +VOID EXhalbtc8821a1ant_InitHwConfig( IN PBTC_COEXIST pBtCoexist, IN BOOLEAN bWifiOnly @@ -202,10 +210,4 @@ VOID EXhalbtc8821a1ant_DisplayCoexInfo( IN PBTC_COEXIST pBtCoexist ); -VOID -EXhalbtc8821a1ant_DbgControl( - IN PBTC_COEXIST pBtCoexist, - IN u1Byte opCode, - IN u1Byte opLen, - IN pu1Byte pData - ); + diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8821a2Ant.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8821a2Ant.c old mode 100644 new mode 100755 index e55fc8119f4b..520c76960292 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8821a2Ant.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8821a2Ant.c @@ -3508,6 +3508,13 @@ halbtc8821a2ant_RunCoexistMechanism( //============================================================ // extern function start with EXhalbtc8821a2ant_ //============================================================ +VOID +EXhalbtc8821a2ant_PowerOnSetting( + IN PBTC_COEXIST pBtCoexist + ) +{ +} + VOID EXhalbtc8821a2ant_InitHwConfig( IN PBTC_COEXIST pBtCoexist, @@ -3575,13 +3582,6 @@ EXhalbtc8821a2ant_DisplayCoexInfo( CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); CL_PRINTF(cliBuf); - if(!pBoardInfo->bBtExist) - { - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!"); - CL_PRINTF(cliBuf); - return; - } - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); CL_PRINTF(cliBuf); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8821a2Ant.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8821a2Ant.h old mode 100644 new mode 100755 index 51950becac1d..3da55176f5ba --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8821a2Ant.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8821a2Ant.h @@ -118,6 +118,10 @@ typedef struct _COEX_STA_8821A_2ANT{ // The following is interface which will notify coex module. //=========================================== VOID +EXhalbtc8821a2ant_PowerOnSetting( + IN PBTC_COEXIST pBtCoexist + ); +VOID EXhalbtc8821a2ant_InitHwConfig( IN PBTC_COEXIST pBtCoexist, IN BOOLEAN bWifiOnly diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8821aCsr2Ant.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8821aCsr2Ant.c new file mode 100755 index 000000000000..9a7bed6f2523 --- /dev/null +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8821aCsr2Ant.c @@ -0,0 +1,4433 @@ +//============================================================ +// Description: +// +// This file is for RTL8821A_CSR Co-exist mechanism +// +// History +// 2012/08/22 Cosa first check in. +// 2012/11/14 Cosa Revise for 8821A_CSR 2Ant out sourcing. +// +//============================================================ + +//============================================================ +// include files +//============================================================ +#include "Mp_Precomp.h" + +#define _BTCOEX_CSR 1 + +#if(BT_30_SUPPORT == 1) +//============================================================ +// Global variables, these are static variables +//============================================================ +static COEX_DM_8821A_CSR_2ANT GLCoexDm8821aCsr2Ant; +static PCOEX_DM_8821A_CSR_2ANT pCoexDm=&GLCoexDm8821aCsr2Ant; +static COEX_STA_8821A_CSR_2ANT GLCoexSta8821aCsr2Ant; +static PCOEX_STA_8821A_CSR_2ANT pCoexSta=&GLCoexSta8821aCsr2Ant; + +const char *const GLBtInfoSrc8821aCsr2Ant[]={ + "BT Info[wifi fw]", + "BT Info[bt rsp]", + "BT Info[bt auto report]", +}; + +u4Byte GLCoexVerDate8821aCsr2Ant=20130618; +u4Byte GLCoexVer8821aCsr2Ant=0x5050; + +//============================================================ +// local function proto type if needed +//============================================================ +//============================================================ +// local function start with halbtc8821aCsr2ant_ +//============================================================ +u1Byte +halbtc8821aCsr2ant_BtRssiState( + u1Byte levelNum, + u1Byte rssiThresh, + u1Byte rssiThresh1 + ) +{ + s4Byte btRssi=0; + u1Byte btRssiState=pCoexSta->preBtRssiState; + + btRssi = pCoexSta->btRssi; + + if(levelNum == 2) + { + if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || + (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) + { + if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT)) + { + btRssiState = BTC_RSSI_STATE_HIGH; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to High\n")); + } + else + { + btRssiState = BTC_RSSI_STATE_STAY_LOW; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at Low\n")); + } + } + else + { + if(btRssi < rssiThresh) + { + btRssiState = BTC_RSSI_STATE_LOW; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to Low\n")); + } + else + { + btRssiState = BTC_RSSI_STATE_STAY_HIGH; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at High\n")); + } + } + } + else if(levelNum == 3) + { + if(rssiThresh > rssiThresh1) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi thresh error!!\n")); + return pCoexSta->preBtRssiState; + } + + if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) || + (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)) + { + if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT)) + { + btRssiState = BTC_RSSI_STATE_MEDIUM; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to Medium\n")); + } + else + { + btRssiState = BTC_RSSI_STATE_STAY_LOW; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at Low\n")); + } + } + else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) || + (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)) + { + if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT)) + { + btRssiState = BTC_RSSI_STATE_HIGH; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to High\n")); + } + else if(btRssi < rssiThresh) + { + btRssiState = BTC_RSSI_STATE_LOW; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to Low\n")); + } + else + { + btRssiState = BTC_RSSI_STATE_STAY_MEDIUM; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at Medium\n")); + } + } + else + { + if(btRssi < rssiThresh1) + { + btRssiState = BTC_RSSI_STATE_MEDIUM; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to Medium\n")); + } + else + { + btRssiState = BTC_RSSI_STATE_STAY_HIGH; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at High\n")); + } + } + } + + pCoexSta->preBtRssiState = btRssiState; + + return btRssiState; +} + +u1Byte +halbtc8821aCsr2ant_WifiRssiState( + IN PBTC_COEXIST pBtCoexist, + IN u1Byte index, + IN u1Byte levelNum, + IN u1Byte rssiThresh, + IN u1Byte rssiThresh1 + ) +{ + s4Byte wifiRssi=0; + u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index]; + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); + + if(levelNum == 2) + { + if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || + (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) + { + if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT)) + { + wifiRssiState = BTC_RSSI_STATE_HIGH; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to High\n")); + } + else + { + wifiRssiState = BTC_RSSI_STATE_STAY_LOW; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at Low\n")); + } + } + else + { + if(wifiRssi < rssiThresh) + { + wifiRssiState = BTC_RSSI_STATE_LOW; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to Low\n")); + } + else + { + wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at High\n")); + } + } + } + else if(levelNum == 3) + { + if(rssiThresh > rssiThresh1) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI thresh error!!\n")); + return pCoexSta->preWifiRssiState[index]; + } + + if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) || + (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW)) + { + if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT)) + { + wifiRssiState = BTC_RSSI_STATE_MEDIUM; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to Medium\n")); + } + else + { + wifiRssiState = BTC_RSSI_STATE_STAY_LOW; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at Low\n")); + } + } + else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) || + (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM)) + { + if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT)) + { + wifiRssiState = BTC_RSSI_STATE_HIGH; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to High\n")); + } + else if(wifiRssi < rssiThresh) + { + wifiRssiState = BTC_RSSI_STATE_LOW; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to Low\n")); + } + else + { + wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at Medium\n")); + } + } + else + { + if(wifiRssi < rssiThresh1) + { + wifiRssiState = BTC_RSSI_STATE_MEDIUM; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to Medium\n")); + } + else + { + wifiRssiState = BTC_RSSI_STATE_STAY_HIGH; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at High\n")); + } + } + } + + pCoexSta->preWifiRssiState[index] = wifiRssiState; + + return wifiRssiState; +} + +VOID +halbtc8821aCsr2ant_MonitorBtEnableDisable( + IN PBTC_COEXIST pBtCoexist + ) +{ + static BOOLEAN bPreBtDisabled=FALSE; + static u4Byte btDisableCnt=0; + BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE; + + // This function check if bt is disabled + + if( pCoexSta->highPriorityTx == 0 && + pCoexSta->highPriorityRx == 0 && + pCoexSta->lowPriorityTx == 0 && + pCoexSta->lowPriorityRx == 0) + { + bBtActive = FALSE; + } + if( pCoexSta->highPriorityTx == 0xffff && + pCoexSta->highPriorityRx == 0xffff && + pCoexSta->lowPriorityTx == 0xffff && + pCoexSta->lowPriorityRx == 0xffff) + { + bBtActive = FALSE; + } + if(bBtActive) + { + btDisableCnt = 0; + bBtDisabled = FALSE; + pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], BT is enabled !!\n")); + } + else + { + btDisableCnt++; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], bt all counters=0, %d times!!\n", + btDisableCnt)); + if(btDisableCnt >= 2) + { + bBtDisabled = TRUE; + pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled); + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], BT is disabled !!\n")); + } + } + if(bPreBtDisabled != bBtDisabled) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], BT is from %s to %s!!\n", + (bPreBtDisabled ? "disabled":"enabled"), + (bBtDisabled ? "disabled":"enabled"))); + bPreBtDisabled = bBtDisabled; + if(!bBtDisabled) + { + } + else + { + } + } +} + +VOID +halbtc8821aCsr2ant_MonitorBtCtr( + IN PBTC_COEXIST pBtCoexist + ) +{ + u4Byte regHPTxRx, regLPTxRx, u4Tmp; + u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0; + u1Byte u1Tmp; + + regHPTxRx = 0x770; + regLPTxRx = 0x774; + + u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx); + regHPTx = u4Tmp & bMaskLWord; + regHPRx = (u4Tmp & bMaskHWord)>>16; + + u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx); + regLPTx = u4Tmp & bMaskLWord; + regLPRx = (u4Tmp & bMaskHWord)>>16; + + pCoexSta->highPriorityTx = regHPTx; + pCoexSta->highPriorityRx = regHPRx; + pCoexSta->lowPriorityTx = regLPTx; + pCoexSta->lowPriorityRx = regLPRx; + + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", + regHPTxRx, regHPTx, regHPTx, regHPRx, regHPRx)); + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n", + regLPTxRx, regLPTx, regLPTx, regLPRx, regLPRx)); + + // reset counter + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x5d); +} + +VOID +halbtc8821aCsr2ant_UpdateRaMask( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bForceExec, + IN u4Byte disRateMask + ) +{ + pCoexDm->curRaMask = disRateMask; + + if( bForceExec || (pCoexDm->preRaMask != pCoexDm->curRaMask)) + { + pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_UPDATE_RAMASK, &pCoexDm->curRaMask); + } + pCoexDm->preRaMask = pCoexDm->curRaMask; +} + +VOID +halbtc8821aCsr2ant_AutoRateFallbackRetry( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bForceExec, + IN u1Byte type + ) +{ + BOOLEAN bWifiUnderBMode=FALSE; + + pCoexDm->curArfrType = type; + + if( bForceExec || (pCoexDm->preArfrType != pCoexDm->curArfrType)) + { + switch(pCoexDm->curArfrType) + { + case 0: // normal mode + pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, pCoexDm->backupArfrCnt1); + pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, pCoexDm->backupArfrCnt2); + break; + case 1: + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode); + if(bWifiUnderBMode) + { + pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); + pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x01010101); + } + else + { + pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0); + pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x04030201); + } + break; + default: + break; + } + } + + pCoexDm->preArfrType = pCoexDm->curArfrType; +} + +VOID +halbtc8821aCsr2ant_RetryLimit( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bForceExec, + IN u1Byte type + ) +{ + pCoexDm->curRetryLimitType = type; + + if( bForceExec || (pCoexDm->preRetryLimitType != pCoexDm->curRetryLimitType)) + { + switch(pCoexDm->curRetryLimitType) + { + case 0: // normal mode + pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, pCoexDm->backupRetryLimit); + break; + case 1: // retry limit=8 + pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, 0x0808); + break; + default: + break; + } + } + + pCoexDm->preRetryLimitType = pCoexDm->curRetryLimitType; +} + +VOID +halbtc8821aCsr2ant_AmpduMaxTime( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bForceExec, + IN u1Byte type + ) +{ + pCoexDm->curAmpduTimeType = type; + + if( bForceExec || (pCoexDm->preAmpduTimeType != pCoexDm->curAmpduTimeType)) + { + switch(pCoexDm->curAmpduTimeType) + { + case 0: // normal mode + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, pCoexDm->backupAmpduMaxTime); + break; + case 1: // AMPDU timw = 0x38 * 32us + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, 0x38); + break; + case 2: + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, 0x17); + break; + default: + break; + } + } + + pCoexDm->preAmpduTimeType = pCoexDm->curAmpduTimeType; +} + +VOID +halbtc8821aCsr2Ant_AmpduMaxNum( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bForceExec, + IN u1Byte type + ) +{ + pCoexDm->curAmpduNumType = type; + + if( bForceExec || (pCoexDm->preAmpduNumType != pCoexDm->curAmpduNumType)) + { + switch(pCoexDm->curAmpduNumType) + { + case 0: // normal mode + pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x4ca, pCoexDm->backupAmpduMaxNum); + break; + case 1: + pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x4ca, 0x0808); + break; + case 2: + pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x4ca, 0x1f1f); + break; + default: + break; + } + } + + pCoexDm->preAmpduNumType = pCoexDm->curAmpduNumType; + +} + +VOID +halbtc8821aCsr2ant_LimitedTx( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bForceExec, + IN u1Byte raMaskType, + IN u1Byte arfrType, + IN u1Byte retryLimitType, + IN u1Byte ampduTimeType, + IN u1Byte ampduNumType + ) +{ + switch(raMaskType) + { + case 0: // normal mode + halbtc8821aCsr2ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0); + break; + case 1: // disable cck 1/2 + halbtc8821aCsr2ant_UpdateRaMask(pBtCoexist, bForceExec, 0x00000003); + break; + case 2: // disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 + halbtc8821aCsr2ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0001f1f7); + break; + default: + break; + } + + halbtc8821aCsr2ant_AutoRateFallbackRetry(pBtCoexist, bForceExec, arfrType); + halbtc8821aCsr2ant_RetryLimit(pBtCoexist, bForceExec, retryLimitType); + halbtc8821aCsr2ant_AmpduMaxTime(pBtCoexist, bForceExec, ampduTimeType); + halbtc8821aCsr2Ant_AmpduMaxNum(pBtCoexist, bForceExec, ampduNumType); +} + + + +VOID +halbtc8821aCsr2ant_LimitedRx( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bForceExec, + IN BOOLEAN bRejApAggPkt, + IN BOOLEAN bBtCtrlAggBufSize, + IN u1Byte aggBufSize + ) +{ + BOOLEAN bRejectRxAgg=bRejApAggPkt; + BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize; + u1Byte rxAggSize=aggBufSize; + + //============================================ + // Rx Aggregation related setting + //============================================ + pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg); + // decide BT control aggregation buf size or not + pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize); + // aggregation buf size, only work when BT control Rx aggregation size. + pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize); + // real update aggregation setting + pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL); +} + +VOID +halbtc8821aCsr2ant_QueryBtInfo( + IN PBTC_COEXIST pBtCoexist + ) +{ + u1Byte H2C_Parameter[1] ={0}; + + pCoexSta->bC2hBtInfoReqSent = TRUE; + + H2C_Parameter[0] |= BIT0; // trigger + + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n", + H2C_Parameter[0])); + + rtw_warn_on(_BTCOEX_CSR); + pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter); +} + +u1Byte +halbtc8821aCsr2ant_ActionAlgorithm( + IN PBTC_COEXIST pBtCoexist + ) +{ + PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; + BOOLEAN bBtHsOn=FALSE; + u1Byte algorithm=BT_8821A_CSR_2ANT_COEX_ALGO_UNDEFINED; + u1Byte numOfDiffProfile=0; + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); + + //sync StackInfo with BT firmware and stack + pStackInfo->bHidExist = pCoexSta->bHidExist; + pStackInfo->bBtLinkExist = pCoexSta->bBtLinkExist; + pStackInfo->bScoExist = pCoexSta->bScoExist; + pStackInfo->bPanExist = pCoexSta->bPanExist; + pStackInfo->bA2dpExist = pCoexSta->bA2dpExist; + + if(!pStackInfo->bBtLinkExist) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], No profile exists!!!\n")); + return algorithm; + } + + if(pStackInfo->bScoExist) + numOfDiffProfile++; + if(pStackInfo->bHidExist) + numOfDiffProfile++; + if(pStackInfo->bPanExist) + numOfDiffProfile++; + if(pStackInfo->bA2dpExist) + numOfDiffProfile++; + + if(numOfDiffProfile == 1) + { + if(pStackInfo->bScoExist) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO only\n")); + algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_SCO; + } + else + { + if(pStackInfo->bHidExist) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID only\n")); + algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_HID; + } + else if(pStackInfo->bA2dpExist) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], A2DP only\n")); + algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_A2DP; + } + else if(pStackInfo->bPanExist) + { + if(bBtHsOn) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], PAN(HS) only\n")); + algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANHS; + } + else + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], PAN(EDR) only\n")); + algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR; + } + } + } + } + else if(numOfDiffProfile == 2) + { + if(pStackInfo->bScoExist) + { + if(pStackInfo->bHidExist) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + HID\n")); + algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; + } + else if(pStackInfo->bA2dpExist) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + A2DP ==> SCO\n")); + algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; + } + else if(pStackInfo->bPanExist) + { + if(bBtHsOn) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + PAN(HS)\n")); + algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_SCO; + } + else + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + PAN(EDR)\n")); + algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; + } + } + } + else + { + if( pStackInfo->bHidExist && + pStackInfo->bA2dpExist ) + { + if(pStackInfo->numOfHid >= 2) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID*2 + A2DP\n")); + algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP_PANEDR; + } + else + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + A2DP\n")); + algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP; + } + } + else if( pStackInfo->bHidExist && + pStackInfo->bPanExist ) + { + if(bBtHsOn) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + PAN(HS)\n")); + algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_HID; + } + else + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + PAN(EDR)\n")); + algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; + } + } + else if( pStackInfo->bPanExist && + pStackInfo->bA2dpExist ) + { + if(bBtHsOn) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], A2DP + PAN(HS)\n")); + algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_A2DP_PANHS; + } + else + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], A2DP + PAN(EDR)\n")); + algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_A2DP; + } + } + } + } + else if(numOfDiffProfile == 3) + { + if(pStackInfo->bScoExist) + { + if( pStackInfo->bHidExist && + pStackInfo->bA2dpExist ) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + HID + A2DP ==> HID\n")); + algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; + } + else if( pStackInfo->bHidExist && + pStackInfo->bPanExist ) + { + if(bBtHsOn) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + HID + PAN(HS)\n")); + algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; + } + else + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + HID + PAN(EDR)\n")); + algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; + } + } + else if( pStackInfo->bPanExist && + pStackInfo->bA2dpExist ) + { + if(bBtHsOn) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + A2DP + PAN(HS)\n")); + algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; + } + else + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n")); + algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; + } + } + } + else + { + if( pStackInfo->bHidExist && + pStackInfo->bPanExist && + pStackInfo->bA2dpExist ) + { + if(bBtHsOn) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + A2DP + PAN(HS)\n")); + algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP; + } + else + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + A2DP + PAN(EDR)\n")); + algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP_PANEDR; + } + } + } + } + else if(numOfDiffProfile >= 3) + { + if(pStackInfo->bScoExist) + { + if( pStackInfo->bHidExist && + pStackInfo->bPanExist && + pStackInfo->bA2dpExist ) + { + if(bBtHsOn) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n")); + + } + else + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n")); + algorithm = BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID; + } + } + } + } + + return algorithm; +} + +BOOLEAN +halbtc8821aCsr2ant_NeedToDecBtPwr( + IN PBTC_COEXIST pBtCoexist + ) +{ + BOOLEAN bRet=FALSE; + BOOLEAN bBtHsOn=FALSE, bWifiConnected=FALSE; + s4Byte btHsRssi=0; + u1Byte btRssiState; + + if(!pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn)) + return FALSE; + if(!pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected)) + return FALSE; + if(!pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_HS_RSSI, &btHsRssi)) + return FALSE; + + btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); + + if(bWifiConnected) + { + if(bBtHsOn) + { + if(btHsRssi > 37) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], Need to decrease bt power for HS mode!!\n")); + bRet = TRUE; + } + } + else + { + if( (btRssiState == BTC_RSSI_STATE_HIGH) || + (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], Need to decrease bt power for Wifi is connected!!\n")); + bRet = TRUE; + } + } + } + + return bRet; +} + +VOID +halbtc8821aCsr2ant_SetFwDacSwingLevel( + IN PBTC_COEXIST pBtCoexist, + IN u1Byte dacSwingLvl + ) +{ + u1Byte H2C_Parameter[1] ={0}; + + // There are several type of dacswing + // 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 + H2C_Parameter[0] = dacSwingLvl; + + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], Set Dac Swing Level=0x%x\n", dacSwingLvl)); + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], FW write 0x64=0x%x\n", H2C_Parameter[0])); + + pBtCoexist->fBtcFillH2c(pBtCoexist, 0x64, 1, H2C_Parameter); +} + +VOID +halbtc8821aCsr2ant_SetFwDecBtPwr( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bDecBtPwr + ) +{ + u1Byte H2C_Parameter[1] ={0}; + + H2C_Parameter[0] = 0; + + if(bDecBtPwr) + { + H2C_Parameter[0] |= BIT1; + } + + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], decrease Bt Power : %s, FW write 0x62=0x%x\n", + (bDecBtPwr? "Yes!!":"No!!"), H2C_Parameter[0])); + + rtw_warn_on(_BTCOEX_CSR); + pBtCoexist->fBtcFillH2c(pBtCoexist, 0x62, 1, H2C_Parameter); +} + +VOID +halbtc8821aCsr2ant_DecBtPwr( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bForceExec, + IN BOOLEAN bDecBtPwr + ) +{ + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s Dec BT power = %s\n", + (bForceExec? "force to":""), ((bDecBtPwr)? "ON":"OFF"))); + pCoexDm->bCurDecBtPwr = bDecBtPwr; + + if(!bForceExec) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], bPreDecBtPwr=%d, bCurDecBtPwr=%d\n", + pCoexDm->bPreDecBtPwr, pCoexDm->bCurDecBtPwr)); + + if(pCoexDm->bPreDecBtPwr == pCoexDm->bCurDecBtPwr) + return; + } + + /* TODO: may CSR consider to decrease BT power? */ + //halbtc8821aCsr2ant_SetFwDecBtPwr(pBtCoexist, pCoexDm->bCurDecBtPwr); + + pCoexDm->bPreDecBtPwr = pCoexDm->bCurDecBtPwr; +} + +VOID +halbtc8821aCsr2ant_SetBtAutoReport( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bEnableAutoReport + ) +{ + u1Byte H2C_Parameter[1] ={0}; + + H2C_Parameter[0] = 0; + + if(bEnableAutoReport) + { + H2C_Parameter[0] |= BIT0; + } + + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n", + (bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0])); + + rtw_warn_on(_BTCOEX_CSR); + pBtCoexist->fBtcFillH2c(pBtCoexist, 0x68, 1, H2C_Parameter); +} + +VOID +halbtc8821aCsr2ant_BtAutoReport( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bForceExec, + IN BOOLEAN bEnableAutoReport + ) +{ + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s BT Auto report = %s\n", + (bForceExec? "force to":""), ((bEnableAutoReport)? "Enabled":"Disabled"))); + pCoexDm->bCurBtAutoReport = bEnableAutoReport; + + if(!bForceExec) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], bPreBtAutoReport=%d, bCurBtAutoReport=%d\n", + pCoexDm->bPreBtAutoReport, pCoexDm->bCurBtAutoReport)); + + if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport) + return; + } + //halbtc8821aCsr2ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport); + + pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport; +} + +VOID +halbtc8821aCsr2ant_FwDacSwingLvl( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bForceExec, + IN u1Byte fwDacSwingLvl + ) +{ + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s set FW Dac Swing level = %d\n", + (bForceExec? "force to":""), fwDacSwingLvl)); + pCoexDm->curFwDacSwingLvl = fwDacSwingLvl; + + if(!bForceExec) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], preFwDacSwingLvl=%d, curFwDacSwingLvl=%d\n", + pCoexDm->preFwDacSwingLvl, pCoexDm->curFwDacSwingLvl)); + + if(pCoexDm->preFwDacSwingLvl == pCoexDm->curFwDacSwingLvl) + return; + } + + halbtc8821aCsr2ant_SetFwDacSwingLevel(pBtCoexist, pCoexDm->curFwDacSwingLvl); + + pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl; +} + +VOID +halbtc8821aCsr2ant_SetSwRfRxLpfCorner( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bRxRfShrinkOn + ) +{ + if(bRxRfShrinkOn) + { + //Shrink RF Rx LPF corner + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Shrink RF Rx LPF corner!!\n")); + pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xffffc); + } + else + { + //Resume RF Rx LPF corner + // After initialized, we can use pCoexDm->btRf0x1eBackup + if(pBtCoexist->bInitilized) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Resume RF Rx LPF corner!!\n")); + pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup); + } + } +} + +VOID +halbtc8821aCsr2ant_RfShrink( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bForceExec, + IN BOOLEAN bRxRfShrinkOn + ) +{ + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s turn Rx RF Shrink = %s\n", + (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF"))); + pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn; + + if(!bForceExec) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], bPreRfRxLpfShrink=%d, bCurRfRxLpfShrink=%d\n", + pCoexDm->bPreRfRxLpfShrink, pCoexDm->bCurRfRxLpfShrink)); + + if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink) + return; + } + halbtc8821aCsr2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink); + + pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink; +} + +VOID +halbtc8821aCsr2ant_SetSwPenaltyTxRateAdaptive( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bLowPenaltyRa + ) +{ + u1Byte H2C_Parameter[6] ={0}; + + H2C_Parameter[0] = 0x6; // opCode, 0x6= Retry_Penalty + + if(bLowPenaltyRa) + { + H2C_Parameter[1] |= BIT0; + H2C_Parameter[2] = 0x00; //normal rate except MCS7/6/5, OFDM54/48/36 + H2C_Parameter[3] = 0xf7; //MCS7 or OFDM54 + H2C_Parameter[4] = 0xf8; //MCS6 or OFDM48 + H2C_Parameter[5] = 0xf9; //MCS5 or OFDM36 + } + + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], set WiFi Low-Penalty Retry: %s", + (bLowPenaltyRa? "ON!!":"OFF!!") )); + + pBtCoexist->fBtcFillH2c(pBtCoexist, 0x69, 6, H2C_Parameter); +} + +VOID +halbtc8821aCsr2ant_LowPenaltyRa( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bForceExec, + IN BOOLEAN bLowPenaltyRa + ) +{ + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s turn LowPenaltyRA = %s\n", + (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF"))); + pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa; + + if(!bForceExec) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], bPreLowPenaltyRa=%d, bCurLowPenaltyRa=%d\n", + pCoexDm->bPreLowPenaltyRa, pCoexDm->bCurLowPenaltyRa)); + + if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa) + return; + } + halbtc8821aCsr2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa); + + pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa; +} + +VOID +halbtc8821aCsr2ant_SetDacSwingReg( + IN PBTC_COEXIST pBtCoexist, + IN u4Byte level + ) +{ + u1Byte val=(u1Byte)level; + + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Write SwDacSwing = 0x%x\n", level)); + pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc5b, 0x3e, val); +} + +VOID +halbtc8821aCsr2ant_SetSwFullTimeDacSwing( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bSwDacSwingOn, + IN u4Byte swDacSwingLvl + ) +{ + if(bSwDacSwingOn) + { + halbtc8821aCsr2ant_SetDacSwingReg(pBtCoexist, swDacSwingLvl); + } + else + { + halbtc8821aCsr2ant_SetDacSwingReg(pBtCoexist, 0x18); + } +} + + +VOID +halbtc8821aCsr2ant_DacSwing( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bForceExec, + IN BOOLEAN bDacSwingOn, + IN u4Byte dacSwingLvl + ) +{ + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n", + (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl)); + pCoexDm->bCurDacSwingOn = bDacSwingOn; + pCoexDm->curDacSwingLvl = dacSwingLvl; + + if(!bForceExec) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], bPreDacSwingOn=%d, preDacSwingLvl=0x%x, bCurDacSwingOn=%d, curDacSwingLvl=0x%x\n", + pCoexDm->bPreDacSwingOn, pCoexDm->preDacSwingLvl, + pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl)); + + if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) && + (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) ) + return; + } + delay_ms(30); + halbtc8821aCsr2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl); + + pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn; + pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl; +} + +VOID +halbtc8821aCsr2ant_SetAdcBackOff( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bAdcBackOff + ) +{ + if(bAdcBackOff) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], BB BackOff Level On!\n")); + pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x8db, 0x60, 0x3); + } + else + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], BB BackOff Level Off!\n")); + pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x8db, 0x60, 0x1); + } +} + +VOID +halbtc8821aCsr2ant_AdcBackOff( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bForceExec, + IN BOOLEAN bAdcBackOff + ) +{ + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s turn AdcBackOff = %s\n", + (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF"))); + pCoexDm->bCurAdcBackOff = bAdcBackOff; + + if(!bForceExec) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], bPreAdcBackOff=%d, bCurAdcBackOff=%d\n", + pCoexDm->bPreAdcBackOff, pCoexDm->bCurAdcBackOff)); + + if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff) + return; + } + halbtc8821aCsr2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff); + + pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff; +} + +VOID +halbtc8821aCsr2ant_SetAgcTable( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bAgcTableEn + ) +{ + u1Byte rssiAdjustVal=0; + + pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000); + if(bAgcTableEn) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Agc Table On!\n")); + pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x28F4B); + pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x10AB2); + rssiAdjustVal = 8; + } + else + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Agc Table Off!\n")); + pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x2884B); + pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x104B2); + } + pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x0); + + // set rssiAdjustVal for wifi module. + pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal); +} + +VOID +halbtc8821aCsr2ant_AgcTable( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bForceExec, + IN BOOLEAN bAgcTableEn + ) +{ + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s %s Agc Table\n", + (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable"))); + pCoexDm->bCurAgcTableEn = bAgcTableEn; + + if(!bForceExec) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], bPreAgcTableEn=%d, bCurAgcTableEn=%d\n", + pCoexDm->bPreAgcTableEn, pCoexDm->bCurAgcTableEn)); + + if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn) + return; + } + halbtc8821aCsr2ant_SetAgcTable(pBtCoexist, bAgcTableEn); + + pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn; +} + +VOID +halbtc8821aCsr2ant_SetCoexTable( + IN PBTC_COEXIST pBtCoexist, + IN u4Byte val0x6c0, + IN u4Byte val0x6c4, + IN u4Byte val0x6c8, + IN u1Byte val0x6cc + ) +{ + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0)); + pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0); + + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4)); + pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4); + + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8)); + pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8); + + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc)); + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc); +} + +VOID +halbtc8821aCsr2ant_CoexTable( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bForceExec, + IN u4Byte val0x6c0, + IN u4Byte val0x6c4, + IN u4Byte val0x6c8, + IN u1Byte val0x6cc + ) +{ + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n", + (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6c8, val0x6cc)); + pCoexDm->curVal0x6c0 = val0x6c0; + pCoexDm->curVal0x6c4 = val0x6c4; + pCoexDm->curVal0x6c8 = val0x6c8; + pCoexDm->curVal0x6cc = val0x6cc; + + if(!bForceExec) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], preVal0x6c0=0x%x, preVal0x6c4=0x%x, preVal0x6c8=0x%x, preVal0x6cc=0x%x !!\n", + pCoexDm->preVal0x6c0, pCoexDm->preVal0x6c4, pCoexDm->preVal0x6c8, pCoexDm->preVal0x6cc)); + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], curVal0x6c0=0x%x, curVal0x6c4=0x%x, curVal0x6c8=0x%x, curVal0x6cc=0x%x !!\n", + pCoexDm->curVal0x6c0, pCoexDm->curVal0x6c4, pCoexDm->curVal0x6c8, pCoexDm->curVal0x6cc)); + + if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) && + (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) && + (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) && + (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) ) + return; + } + halbtc8821aCsr2ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc); + + pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0; + pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4; + pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8; + pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc; +} + +VOID +halbtc8821aCsr2ant_SetFwIgnoreWlanAct( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bEnable + ) +{ + u1Byte H2C_Parameter[1] ={0}; + + if(bEnable) + { + H2C_Parameter[0] |= BIT0; // function enable + } + + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n", + H2C_Parameter[0])); + + rtw_warn_on(_BTCOEX_CSR); + pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter); +} + +VOID +halbtc8821aCsr2ant_IgnoreWlanAct( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bForceExec, + IN BOOLEAN bEnable + ) +{ + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s turn Ignore WlanAct %s\n", + (bForceExec? "force to":""), (bEnable? "ON":"OFF"))); + pCoexDm->bCurIgnoreWlanAct = bEnable; + + if(!bForceExec) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], bPreIgnoreWlanAct = %d, bCurIgnoreWlanAct = %d!!\n", + pCoexDm->bPreIgnoreWlanAct, pCoexDm->bCurIgnoreWlanAct)); + + if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct) + return; + } + //halbtc8821aCsr2ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable); + + pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct; +} + +VOID +halbtc8821aCsr2ant_SetFwPstdma( + IN PBTC_COEXIST pBtCoexist, + IN u1Byte byte1, + IN u1Byte byte2, + IN u1Byte byte3, + IN u1Byte byte4, + IN u1Byte byte5 + ) +{ + u1Byte H2C_Parameter[6] ={0}; + + H2C_Parameter[0] = byte1; + H2C_Parameter[1] = byte2; + H2C_Parameter[2] = byte3; + H2C_Parameter[3] = byte4; + H2C_Parameter[4] = byte5; + H2C_Parameter[5] = 0x03; + + pCoexDm->psTdmaPara[0] = byte1; + pCoexDm->psTdmaPara[1] = byte2; + pCoexDm->psTdmaPara[2] = byte3; + pCoexDm->psTdmaPara[3] = byte4; + pCoexDm->psTdmaPara[4] = byte5; + pCoexDm->psTdmaPara[5] = 0x03; + + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], FW write 0x60(6bytes)=0x%x%08x%02x\n", + H2C_Parameter[0], + H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4], H2C_Parameter[5])); + + pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 6, H2C_Parameter); +} + +VOID +halbtc8821aCsr2ant_SwMechanism1( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bShrinkRxLPF, + IN BOOLEAN bLowPenaltyRA, + IN BOOLEAN bLimitedDIG, + IN BOOLEAN bBTLNAConstrain + ) +{ + u4Byte wifiBw; + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); + + if(BTC_WIFI_BW_HT40 != wifiBw) //only shrink RF Rx LPF for HT40 + { + if (bShrinkRxLPF) + bShrinkRxLPF = FALSE; + } + + halbtc8821aCsr2ant_RfShrink(pBtCoexist, NORMAL_EXEC, bShrinkRxLPF); + halbtc8821aCsr2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA); + + //no limited DIG + //halbtc8821aCsr2ant_SetBtLnaConstrain(pBtCoexist, NORMAL_EXEC, bBTLNAConstrain); +} + +VOID +halbtc8821aCsr2ant_SwMechanism2( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bAGCTableShift, + IN BOOLEAN bADCBackOff, + IN BOOLEAN bSWDACSwing, + IN u4Byte dacSwingLvl + ) +{ + //halbtc8821aCsr2ant_AgcTable(pBtCoexist, NORMAL_EXEC, bAGCTableShift); + halbtc8821aCsr2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, bADCBackOff); + halbtc8821aCsr2ant_DacSwing(pBtCoexist, NORMAL_EXEC, bSWDACSwing, dacSwingLvl); +} + +VOID +halbtc8821aCsr2ant_SetAntPath( + IN PBTC_COEXIST pBtCoexist, + IN u1Byte antPosType, + IN BOOLEAN bInitHwCfg, + IN BOOLEAN bWifiOff + ) +{ + PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; + u4Byte u4Tmp=0; + u1Byte H2C_Parameter[2] ={0}; + + if(bInitHwCfg) + { + // 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT + u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); + u4Tmp &=~BIT23; + u4Tmp |= BIT24; + pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp); + + pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x974, 0x3ff); + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xcb4, 0x77); + + if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT) + { + //tell firmware "antenna inverse" ==> WRONG firmware antenna control code.==>need fw to fix + H2C_Parameter[0] = 1; + H2C_Parameter[1] = 1; + pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); + } + else + { + //tell firmware "no antenna inverse" ==> WRONG firmware antenna control code.==>need fw to fix + H2C_Parameter[0] = 0; + H2C_Parameter[1] = 1; + pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter); + } + } + + // ext switch setting + switch(antPosType) + { + case BTC_ANT_WIFI_AT_MAIN: + pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xcb7, 0x30, 0x1); + break; + case BTC_ANT_WIFI_AT_AUX: + pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xcb7, 0x30, 0x2); + break; + } +} + +VOID +halbtc8821aCsr2ant_PsTdma( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bForceExec, + IN BOOLEAN bTurnOn, + IN u1Byte type + ) +{ + BOOLEAN bTurnOnByCnt=FALSE; + u1Byte psTdmaTypeByCnt=0; + + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s turn %s PS TDMA, type=%d\n", + (bForceExec? "force to":""), (bTurnOn? "ON":"OFF"), type)); + pCoexDm->bCurPsTdmaOn = bTurnOn; + pCoexDm->curPsTdma = type; + + if(!bForceExec) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], bPrePsTdmaOn = %d, bCurPsTdmaOn = %d!!\n", + pCoexDm->bPrePsTdmaOn, pCoexDm->bCurPsTdmaOn)); + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], prePsTdma = %d, curPsTdma = %d!!\n", + pCoexDm->prePsTdma, pCoexDm->curPsTdma)); + + if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) && + (pCoexDm->prePsTdma == pCoexDm->curPsTdma) ) + return; + } + if(bTurnOn) + { + switch(type) + { + case 1: + default: + halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); + break; + case 2: + halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90); + break; + case 3: + halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x90); + break; + case 4: + halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x03, 0xf1, 0x90); + break; + case 5: + halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90); + break; + case 6: + halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90); + break; + case 7: + halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0x70, 0x90); + break; + case 8: + halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x10, 0x3, 0x70, 0x90); + break; + case 9: + halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); + break; + case 10: + halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90); + break; + case 11: + halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0xe1, 0x90); + break; + case 12: + halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90); + break; + case 13: + halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90); + break; + case 14: + halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90); + break; + case 15: + halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0x60, 0x90); + break; + case 16: + halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0x60, 0x90); + break; + case 17: + halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x2f, 0x2f, 0x60, 0x90); + break; + case 18: + halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90); + break; + case 19: + halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0xe1, 0x90); + break; + case 20: + halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0x60, 0x90); + break; + case 21: + halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90); + break; + case 22: //ad2dp master + halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xeb, 0x12, 0x12, 0x21, 0x10); + break; + case 23: //a2dp slave + halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xeb, 0x12, 0x12, 0x20, 0x10); + break; + case 71: + halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90); + break; + } + } + else + { + // disable PS tdma + switch(type) + { + case 0: + halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0); + break; + case 1: + halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x48, 0x0); + break; + default: + halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0); + break; + } + } + + // update pre state + pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn; + pCoexDm->prePsTdma = pCoexDm->curPsTdma; +} + +VOID +halbtc8821aCsr2ant_CoexAllOff( + IN PBTC_COEXIST pBtCoexist + ) +{ + // fw all off + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); + halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); + + // sw all off + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); + + // hw all off + halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x55555555, 0xffff, 0x3); +} + +VOID +halbtc8821aCsr2ant_CoexUnder5G( + IN PBTC_COEXIST pBtCoexist + ) +{ + halbtc8821aCsr2ant_CoexAllOff(pBtCoexist); + + halbtc8821aCsr2ant_IgnoreWlanAct(pBtCoexist, NORMAL_EXEC, TRUE); +} + +VOID +halbtc8821aCsr2ant_InitCoexDm( + IN PBTC_COEXIST pBtCoexist + ) +{ + // force to reset coex mechanism + halbtc8821aCsr2ant_CoexTable(pBtCoexist, FORCE_EXEC, 0x55555555, 0x55555555, 0xffff, 0x3); + + halbtc8821aCsr2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1); + halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6); + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, FORCE_EXEC, FALSE); + + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); +} + +VOID +halbtc8821aCsr2ant_BtInquiryPage( + IN PBTC_COEXIST pBtCoexist + ) +{ + BOOLEAN bLowPwrDisable=TRUE; + + pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); + + halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5afa5afa, 0xffff, 0x3); + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); +} +BOOLEAN +halbtc8821aCsr2ant_IsCommonAction( + IN PBTC_COEXIST pBtCoexist + ) +{ + BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE; + BOOLEAN bLowPwrDisable=FALSE; + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); + + if(!bWifiConnected && + BT_8821A_CSR_2ANT_BT_STATUS_IDLE == pCoexDm->btStatus) + { + bLowPwrDisable = FALSE; + pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); + + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi IPS + BT IPS!!\n")); + + + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); + halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); + + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); + halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 0); + halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, 0, 0, 0); + + bCommon = TRUE; + } + else if(bWifiConnected && + (BT_8821A_CSR_2ANT_BT_STATUS_IDLE == pCoexDm->btStatus) ) + { + bLowPwrDisable = FALSE; + pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); + + if(bWifiBusy) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi Busy + BT IPS!!\n")); + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); + } + else + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi LPS + BT IPS!!\n")); + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); + } + + halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); + + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); + halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 0); + halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, 0, 0, 0); + + bCommon = TRUE; + } + else if(!bWifiConnected && + (BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) + { + bLowPwrDisable = TRUE; + pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); + + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi IPS + BT LPS!!\n")); + + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); + halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); + + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); + halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 0); + halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, 0, 0, 0); + + bCommon = TRUE; + } + else if(bWifiConnected && + (BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) ) + { + bLowPwrDisable = TRUE; + pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); + + if(bWifiBusy) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi Busy + BT LPS!!\n")); + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); + } + else + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi LPS + BT LPS!!\n")); + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); + } + + halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); + + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,TRUE,TRUE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); + halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 0); + halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, 0, 0, 0); + + bCommon = TRUE; + } + else if(!bWifiConnected && + (BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE == pCoexDm->btStatus) ) + { + bLowPwrDisable = FALSE; + pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); + + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi IPS + BT Busy!!\n")); + + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); + halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); + + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); + halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 0); + halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, 0, 0, 0); + + bCommon = TRUE; + } + else + { + bLowPwrDisable = TRUE; + pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable); + + if(bWifiBusy) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi Busy + BT Busy!!\n")); + bCommon = FALSE; + } + else + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi LPS + BT Busy!!\n")); + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 21); + + if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); + else + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); + + bCommon = TRUE; + } + + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,TRUE,TRUE); + } + + if (bCommon == TRUE) + halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5afa5afa, 0xffff, 0x3); + + return bCommon; +} +VOID +halbtc8821aCsr2ant_TdmaDurationAdjust( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bScoHid, + IN BOOLEAN bTxPause, + IN u1Byte maxInterval + ) +{ + static s4Byte up,dn,m,n,WaitCount; + s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration + u1Byte retryCount=0; + + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], TdmaDurationAdjust()\n")); + + if(pCoexDm->bResetTdmaAdjust) + { + pCoexDm->bResetTdmaAdjust = FALSE; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], first run TdmaDurationAdjust()!!\n")); + { + if(bScoHid) + { + if(bTxPause) + { + if(maxInterval == 1) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); + pCoexDm->psTdmaDuAdjType = 13; + } + else if(maxInterval == 2) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); + pCoexDm->psTdmaDuAdjType = 14; + } + else if(maxInterval == 3) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); + pCoexDm->psTdmaDuAdjType = 15; + } + else + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); + pCoexDm->psTdmaDuAdjType = 15; + } + } + else + { + if(maxInterval == 1) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); + pCoexDm->psTdmaDuAdjType = 9; + } + else if(maxInterval == 2) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); + pCoexDm->psTdmaDuAdjType = 10; + } + else if(maxInterval == 3) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); + pCoexDm->psTdmaDuAdjType = 11; + } + else + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); + pCoexDm->psTdmaDuAdjType = 11; + } + } + } + else + { + if(bTxPause) + { + if(maxInterval == 1) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); + pCoexDm->psTdmaDuAdjType = 5; + } + else if(maxInterval == 2) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); + pCoexDm->psTdmaDuAdjType = 6; + } + else if(maxInterval == 3) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); + pCoexDm->psTdmaDuAdjType = 7; + } + else + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); + pCoexDm->psTdmaDuAdjType = 7; + } + } + else + { + if(maxInterval == 1) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); + pCoexDm->psTdmaDuAdjType = 1; + } + else if(maxInterval == 2) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); + pCoexDm->psTdmaDuAdjType = 2; + } + else if(maxInterval == 3) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); + pCoexDm->psTdmaDuAdjType = 3; + } + else + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); + pCoexDm->psTdmaDuAdjType = 3; + } + } + } + } + //============ + up = 0; + dn = 0; + m = 1; + n= 3; + result = 0; + WaitCount = 0; + } + else + { + //accquire the BT TRx retry count from BT_Info byte2 + retryCount = pCoexSta->btRetryCnt; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], retryCount = %d\n", retryCount)); + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], up=%d, dn=%d, m=%d, n=%d, WaitCount=%d\n", + up, dn, m, n, WaitCount)); + result = 0; + WaitCount++; + + if(retryCount == 0) // no retry in the last 2-second duration + { + up++; + dn--; + + if (dn <= 0) + dn = 0; + + if(up >= n) // if ³sÄò n ­Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration + { + WaitCount = 0; + n = 3; + up = 0; + dn = 0; + result = 1; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], Increase wifi duration!!\n")); + } + } + else if (retryCount <= 3) // <=3 retry in the last 2-second duration + { + up--; + dn++; + + if (up <= 0) + up = 0; + + if (dn == 2) // if ³sÄò 2 ­Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration + { + if (WaitCount <= 2) + m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ + else + m = 1; + + if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. + m = 20; + + n = 3*m; + up = 0; + dn = 0; + WaitCount = 0; + result = -1; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n")); + } + } + else //retry count > 3, ¥u­n1¦¸ retry count > 3, «h½Õ¯¶WiFi duration + { + if (WaitCount == 1) + m++; // ÁקK¤@ª½¦b¨â­Ólevel¤¤¨Ó¦^ + else + m = 1; + + if ( m >= 20) //m ³Ì¤j­È = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration. + m = 20; + + n = 3*m; + up = 0; + dn = 0; + WaitCount = 0; + result = -1; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n")); + } + + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], max Interval = %d\n", maxInterval)); + if(maxInterval == 1) + { + if(bTxPause) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 1\n")); + + if(pCoexDm->curPsTdma == 71) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); + pCoexDm->psTdmaDuAdjType = 5; + } + else if(pCoexDm->curPsTdma == 1) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); + pCoexDm->psTdmaDuAdjType = 5; + } + else if(pCoexDm->curPsTdma == 2) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); + pCoexDm->psTdmaDuAdjType = 6; + } + else if(pCoexDm->curPsTdma == 3) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); + pCoexDm->psTdmaDuAdjType = 7; + } + else if(pCoexDm->curPsTdma == 4) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); + pCoexDm->psTdmaDuAdjType = 8; + } + if(pCoexDm->curPsTdma == 9) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); + pCoexDm->psTdmaDuAdjType = 13; + } + else if(pCoexDm->curPsTdma == 10) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); + pCoexDm->psTdmaDuAdjType = 14; + } + else if(pCoexDm->curPsTdma == 11) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); + pCoexDm->psTdmaDuAdjType = 15; + } + else if(pCoexDm->curPsTdma == 12) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); + pCoexDm->psTdmaDuAdjType = 16; + } + + if(result == -1) + { + if(pCoexDm->curPsTdma == 5) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); + pCoexDm->psTdmaDuAdjType = 6; + } + else if(pCoexDm->curPsTdma == 6) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); + pCoexDm->psTdmaDuAdjType = 7; + } + else if(pCoexDm->curPsTdma == 7) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); + pCoexDm->psTdmaDuAdjType = 8; + } + else if(pCoexDm->curPsTdma == 13) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); + pCoexDm->psTdmaDuAdjType = 14; + } + else if(pCoexDm->curPsTdma == 14) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); + pCoexDm->psTdmaDuAdjType = 15; + } + else if(pCoexDm->curPsTdma == 15) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); + pCoexDm->psTdmaDuAdjType = 16; + } + } + else if (result == 1) + { + if(pCoexDm->curPsTdma == 8) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); + pCoexDm->psTdmaDuAdjType = 7; + } + else if(pCoexDm->curPsTdma == 7) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); + pCoexDm->psTdmaDuAdjType = 6; + } + else if(pCoexDm->curPsTdma == 6) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); + pCoexDm->psTdmaDuAdjType = 5; + } + else if(pCoexDm->curPsTdma == 16) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); + pCoexDm->psTdmaDuAdjType = 15; + } + else if(pCoexDm->curPsTdma == 15) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); + pCoexDm->psTdmaDuAdjType = 14; + } + else if(pCoexDm->curPsTdma == 14) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); + pCoexDm->psTdmaDuAdjType = 13; + } + } + } + else + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 0\n")); + if(pCoexDm->curPsTdma == 5) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71); + pCoexDm->psTdmaDuAdjType = 71; + } + else if(pCoexDm->curPsTdma == 6) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); + pCoexDm->psTdmaDuAdjType = 2; + } + else if(pCoexDm->curPsTdma == 7) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); + pCoexDm->psTdmaDuAdjType = 3; + } + else if(pCoexDm->curPsTdma == 8) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); + pCoexDm->psTdmaDuAdjType = 4; + } + if(pCoexDm->curPsTdma == 13) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); + pCoexDm->psTdmaDuAdjType = 9; + } + else if(pCoexDm->curPsTdma == 14) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); + pCoexDm->psTdmaDuAdjType = 10; + } + else if(pCoexDm->curPsTdma == 15) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); + pCoexDm->psTdmaDuAdjType = 11; + } + else if(pCoexDm->curPsTdma == 16) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); + pCoexDm->psTdmaDuAdjType = 12; + } + + if(result == -1) + { + if(pCoexDm->curPsTdma == 71) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); + pCoexDm->psTdmaDuAdjType = 1; + } + else if(pCoexDm->curPsTdma == 1) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); + pCoexDm->psTdmaDuAdjType = 2; + } + else if(pCoexDm->curPsTdma == 2) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); + pCoexDm->psTdmaDuAdjType = 3; + } + else if(pCoexDm->curPsTdma == 3) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); + pCoexDm->psTdmaDuAdjType = 4; + } + else if(pCoexDm->curPsTdma == 9) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); + pCoexDm->psTdmaDuAdjType = 10; + } + else if(pCoexDm->curPsTdma == 10) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); + pCoexDm->psTdmaDuAdjType = 11; + } + else if(pCoexDm->curPsTdma == 11) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); + pCoexDm->psTdmaDuAdjType = 12; + } + } + else if (result == 1) + { + if(pCoexDm->curPsTdma == 4) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); + pCoexDm->psTdmaDuAdjType = 3; + } + else if(pCoexDm->curPsTdma == 3) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); + pCoexDm->psTdmaDuAdjType = 2; + } + else if(pCoexDm->curPsTdma == 2) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); + pCoexDm->psTdmaDuAdjType = 1; + } + else if(pCoexDm->curPsTdma == 1) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71); + pCoexDm->psTdmaDuAdjType = 71; + } + else if(pCoexDm->curPsTdma == 12) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); + pCoexDm->psTdmaDuAdjType = 11; + } + else if(pCoexDm->curPsTdma == 11) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); + pCoexDm->psTdmaDuAdjType = 10; + } + else if(pCoexDm->curPsTdma == 10) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); + pCoexDm->psTdmaDuAdjType = 9; + } + } + } + } + else if(maxInterval == 2) + { + if(bTxPause) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 1\n")); + if(pCoexDm->curPsTdma == 1) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); + pCoexDm->psTdmaDuAdjType = 6; + } + else if(pCoexDm->curPsTdma == 2) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); + pCoexDm->psTdmaDuAdjType = 6; + } + else if(pCoexDm->curPsTdma == 3) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); + pCoexDm->psTdmaDuAdjType = 7; + } + else if(pCoexDm->curPsTdma == 4) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); + pCoexDm->psTdmaDuAdjType = 8; + } + if(pCoexDm->curPsTdma == 9) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); + pCoexDm->psTdmaDuAdjType = 14; + } + else if(pCoexDm->curPsTdma == 10) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); + pCoexDm->psTdmaDuAdjType = 14; + } + else if(pCoexDm->curPsTdma == 11) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); + pCoexDm->psTdmaDuAdjType = 15; + } + else if(pCoexDm->curPsTdma == 12) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); + pCoexDm->psTdmaDuAdjType = 16; + } + if(result == -1) + { + if(pCoexDm->curPsTdma == 5) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); + pCoexDm->psTdmaDuAdjType = 6; + } + else if(pCoexDm->curPsTdma == 6) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); + pCoexDm->psTdmaDuAdjType = 7; + } + else if(pCoexDm->curPsTdma == 7) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); + pCoexDm->psTdmaDuAdjType = 8; + } + else if(pCoexDm->curPsTdma == 13) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); + pCoexDm->psTdmaDuAdjType = 14; + } + else if(pCoexDm->curPsTdma == 14) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); + pCoexDm->psTdmaDuAdjType = 15; + } + else if(pCoexDm->curPsTdma == 15) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); + pCoexDm->psTdmaDuAdjType = 16; + } + } + else if (result == 1) + { + if(pCoexDm->curPsTdma == 8) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); + pCoexDm->psTdmaDuAdjType = 7; + } + else if(pCoexDm->curPsTdma == 7) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); + pCoexDm->psTdmaDuAdjType = 6; + } + else if(pCoexDm->curPsTdma == 6) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6); + pCoexDm->psTdmaDuAdjType = 6; + } + else if(pCoexDm->curPsTdma == 16) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); + pCoexDm->psTdmaDuAdjType = 15; + } + else if(pCoexDm->curPsTdma == 15) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); + pCoexDm->psTdmaDuAdjType = 14; + } + else if(pCoexDm->curPsTdma == 14) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); + pCoexDm->psTdmaDuAdjType = 14; + } + } + } + else + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 0\n")); + if(pCoexDm->curPsTdma == 5) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); + pCoexDm->psTdmaDuAdjType = 2; + } + else if(pCoexDm->curPsTdma == 6) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); + pCoexDm->psTdmaDuAdjType = 2; + } + else if(pCoexDm->curPsTdma == 7) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); + pCoexDm->psTdmaDuAdjType = 3; + } + else if(pCoexDm->curPsTdma == 8) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); + pCoexDm->psTdmaDuAdjType = 4; + } + if(pCoexDm->curPsTdma == 13) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); + pCoexDm->psTdmaDuAdjType = 10; + } + else if(pCoexDm->curPsTdma == 14) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); + pCoexDm->psTdmaDuAdjType = 10; + } + else if(pCoexDm->curPsTdma == 15) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); + pCoexDm->psTdmaDuAdjType = 11; + } + else if(pCoexDm->curPsTdma == 16) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); + pCoexDm->psTdmaDuAdjType = 12; + } + if(result == -1) + { + if(pCoexDm->curPsTdma == 1) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); + pCoexDm->psTdmaDuAdjType = 2; + } + else if(pCoexDm->curPsTdma == 2) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); + pCoexDm->psTdmaDuAdjType = 3; + } + else if(pCoexDm->curPsTdma == 3) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); + pCoexDm->psTdmaDuAdjType = 4; + } + else if(pCoexDm->curPsTdma == 9) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); + pCoexDm->psTdmaDuAdjType = 10; + } + else if(pCoexDm->curPsTdma == 10) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); + pCoexDm->psTdmaDuAdjType = 11; + } + else if(pCoexDm->curPsTdma == 11) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); + pCoexDm->psTdmaDuAdjType = 12; + } + } + else if (result == 1) + { + if(pCoexDm->curPsTdma == 4) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); + pCoexDm->psTdmaDuAdjType = 3; + } + else if(pCoexDm->curPsTdma == 3) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); + pCoexDm->psTdmaDuAdjType = 2; + } + else if(pCoexDm->curPsTdma == 2) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2); + pCoexDm->psTdmaDuAdjType = 2; + } + else if(pCoexDm->curPsTdma == 12) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); + pCoexDm->psTdmaDuAdjType = 11; + } + else if(pCoexDm->curPsTdma == 11) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); + pCoexDm->psTdmaDuAdjType = 10; + } + else if(pCoexDm->curPsTdma == 10) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); + pCoexDm->psTdmaDuAdjType = 10; + } + } + } + } + else if(maxInterval == 3) + { + if(bTxPause) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 1\n")); + if(pCoexDm->curPsTdma == 1) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); + pCoexDm->psTdmaDuAdjType = 7; + } + else if(pCoexDm->curPsTdma == 2) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); + pCoexDm->psTdmaDuAdjType = 7; + } + else if(pCoexDm->curPsTdma == 3) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); + pCoexDm->psTdmaDuAdjType = 7; + } + else if(pCoexDm->curPsTdma == 4) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); + pCoexDm->psTdmaDuAdjType = 8; + } + if(pCoexDm->curPsTdma == 9) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); + pCoexDm->psTdmaDuAdjType = 15; + } + else if(pCoexDm->curPsTdma == 10) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); + pCoexDm->psTdmaDuAdjType = 15; + } + else if(pCoexDm->curPsTdma == 11) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); + pCoexDm->psTdmaDuAdjType = 15; + } + else if(pCoexDm->curPsTdma == 12) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); + pCoexDm->psTdmaDuAdjType = 16; + } + if(result == -1) + { + if(pCoexDm->curPsTdma == 5) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); + pCoexDm->psTdmaDuAdjType = 7; + } + else if(pCoexDm->curPsTdma == 6) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); + pCoexDm->psTdmaDuAdjType = 7; + } + else if(pCoexDm->curPsTdma == 7) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8); + pCoexDm->psTdmaDuAdjType = 8; + } + else if(pCoexDm->curPsTdma == 13) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); + pCoexDm->psTdmaDuAdjType = 15; + } + else if(pCoexDm->curPsTdma == 14) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); + pCoexDm->psTdmaDuAdjType = 15; + } + else if(pCoexDm->curPsTdma == 15) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16); + pCoexDm->psTdmaDuAdjType = 16; + } + } + else if (result == 1) + { + if(pCoexDm->curPsTdma == 8) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); + pCoexDm->psTdmaDuAdjType = 7; + } + else if(pCoexDm->curPsTdma == 7) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); + pCoexDm->psTdmaDuAdjType = 7; + } + else if(pCoexDm->curPsTdma == 6) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7); + pCoexDm->psTdmaDuAdjType = 7; + } + else if(pCoexDm->curPsTdma == 16) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); + pCoexDm->psTdmaDuAdjType = 15; + } + else if(pCoexDm->curPsTdma == 15) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); + pCoexDm->psTdmaDuAdjType = 15; + } + else if(pCoexDm->curPsTdma == 14) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15); + pCoexDm->psTdmaDuAdjType = 15; + } + } + } + else + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 0\n")); + if(pCoexDm->curPsTdma == 5) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); + pCoexDm->psTdmaDuAdjType = 3; + } + else if(pCoexDm->curPsTdma == 6) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); + pCoexDm->psTdmaDuAdjType = 3; + } + else if(pCoexDm->curPsTdma == 7) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); + pCoexDm->psTdmaDuAdjType = 3; + } + else if(pCoexDm->curPsTdma == 8) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); + pCoexDm->psTdmaDuAdjType = 4; + } + if(pCoexDm->curPsTdma == 13) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); + pCoexDm->psTdmaDuAdjType = 11; + } + else if(pCoexDm->curPsTdma == 14) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); + pCoexDm->psTdmaDuAdjType = 11; + } + else if(pCoexDm->curPsTdma == 15) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); + pCoexDm->psTdmaDuAdjType = 11; + } + else if(pCoexDm->curPsTdma == 16) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); + pCoexDm->psTdmaDuAdjType = 12; + } + if(result == -1) + { + if(pCoexDm->curPsTdma == 1) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); + pCoexDm->psTdmaDuAdjType = 3; + } + else if(pCoexDm->curPsTdma == 2) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); + pCoexDm->psTdmaDuAdjType = 3; + } + else if(pCoexDm->curPsTdma == 3) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4); + pCoexDm->psTdmaDuAdjType = 4; + } + else if(pCoexDm->curPsTdma == 9) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); + pCoexDm->psTdmaDuAdjType = 11; + } + else if(pCoexDm->curPsTdma == 10) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); + pCoexDm->psTdmaDuAdjType = 11; + } + else if(pCoexDm->curPsTdma == 11) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12); + pCoexDm->psTdmaDuAdjType = 12; + } + } + else if (result == 1) + { + if(pCoexDm->curPsTdma == 4) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); + pCoexDm->psTdmaDuAdjType = 3; + } + else if(pCoexDm->curPsTdma == 3) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); + pCoexDm->psTdmaDuAdjType = 3; + } + else if(pCoexDm->curPsTdma == 2) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3); + pCoexDm->psTdmaDuAdjType = 3; + } + else if(pCoexDm->curPsTdma == 12) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); + pCoexDm->psTdmaDuAdjType = 11; + } + else if(pCoexDm->curPsTdma == 11) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); + pCoexDm->psTdmaDuAdjType = 11; + } + else if(pCoexDm->curPsTdma == 10) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11); + pCoexDm->psTdmaDuAdjType = 11; + } + } + } + } + } + + // if current PsTdma not match with the recorded one (when scan, dhcp...), + // then we have to adjust it back to the previous record one. + if(pCoexDm->curPsTdma != pCoexDm->psTdmaDuAdjType) + { + BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], PsTdma type dismatch!!!, curPsTdma=%d, recordPsTdma=%d\n", + pCoexDm->curPsTdma, pCoexDm->psTdmaDuAdjType)); + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); + + if( !bScan && !bLink && !bRoam) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType); + } + else + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n")); + } + } + + // when halbtc8821aCsr2ant_TdmaDurationAdjust() is called, fw dac swing is included in the function. + //if(pCoexDm->psTdmaDuAdjType == 71) + // halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xc); //Skip because A2DP get worse at HT40 + //else + halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0x6); +} + +// SCO only or SCO+PAN(HS) +VOID +halbtc8821aCsr2ant_ActionSco( + IN PBTC_COEXIST pBtCoexist + ) +{ + u1Byte wifiRssiState,btRssiState; + u4Byte wifiBw; + + halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x55555555, 0xffffff, 0x3); + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); + + halbtc8821aCsr2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE); + + halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 1, 0, 2, 0); + + if(pCoexSta->bSlave == FALSE) + halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x4); + else + halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x2); + +/* + wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); + btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); + + halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 4); + + if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); + else + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); + + if (BTC_WIFI_BW_LEGACY == wifiBw) //for SCO quality at 11b/g mode + { + halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x5a5a5a5a, 0x5a5a5a5a, 0xffff, 0x3); + } + else //for SCO quality & wifi performance balance at 11n mode + { + halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x5aea5aea, 0x5aea5aea, 0xffff, 0x3); + } + + if(BTC_WIFI_BW_HT40 == wifiBw) + { + + // fw mechanism + //halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); + + if( (btRssiState == BTC_RSSI_STATE_HIGH) || + (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); //for voice quality + } + else + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); //for voice quality + } + + // sw mechanism + if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || + (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); + } + else + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); + } + } + else + { + // fw mechanism + //halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); + + if( (btRssiState == BTC_RSSI_STATE_HIGH) || + (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); //for voice quality + } + else + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); //for voice quality + } + + // sw mechanism + if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || + (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); + } + else + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); + } + } +*/ +} + + +VOID +halbtc8821aCsr2ant_ActionHid( + IN PBTC_COEXIST pBtCoexist + ) +{ + u1Byte wifiRssiState, btRssiState; + u4Byte wifiBw; + + wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); + btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); + + halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); + + if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); + else + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); + + if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode + { + halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3); + } + else //for HID quality & wifi performance balance at 11n mode + { + halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5aea5aea, 0xffff, 0x3); + } + + if(BTC_WIFI_BW_HT40 == wifiBw) + { + // fw mechanism + if( (btRssiState == BTC_RSSI_STATE_HIGH) || + (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); + } + else + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); + } + + // sw mechanism + if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || + (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); + } + else + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); + } + } + else + { + // fw mechanism + if( (btRssiState == BTC_RSSI_STATE_HIGH) || + (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9); + } + else + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13); + } + + // sw mechanism + if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || + (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); + } + else + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); + } + } +} + +//A2DP only / PAN(EDR) only/ A2DP+PAN(HS) +VOID +halbtc8821aCsr2ant_ActionA2dp( + IN PBTC_COEXIST pBtCoexist + ) +{ + u1Byte wifiRssiState, btRssiState; + u4Byte wifiBw; + + halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x8); + + if(pCoexSta->bSlave == FALSE) + { + halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0xfdfdfdfd, 0xdfdadfda, 0xffffff, 0x3); + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22); + halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 1); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x0c); + } + else + { + halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0xfdfdfdfd, 0xdfdadfda, 0xffffff, 0x3); + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 23); + halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 2); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x18); + } + +/* + wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); + btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); + + //fw dac swing is called in halbtc8821aCsr2ant_TdmaDurationAdjust() + //halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); + + + if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); + else + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); + + if(BTC_WIFI_BW_HT40 == wifiBw) + { + // fw mechanism + if( (btRssiState == BTC_RSSI_STATE_HIGH) || + (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1); + } + else + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1); + } + + // sw mechanism + if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || + (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); + } + else + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); + } + } + else + { + // fw mechanism + if( (btRssiState == BTC_RSSI_STATE_HIGH) || + (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1); + } + else + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1); + } + + // sw mechanism + if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || + (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); + } + else + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); + } + } +*/ +} + +VOID +halbtc8821aCsr2ant_ActionA2dpPanHs( + IN PBTC_COEXIST pBtCoexist + ) +{ + u1Byte wifiRssiState, btRssiState, btInfoExt; + u4Byte wifiBw; + + btInfoExt = pCoexSta->btInfoExt; + wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); + btRssiState = halbtc8821aCsr2ant_BtRssiState(2,35, 0); + + //fw dac swing is called in halbtc8821aCsr2ant_TdmaDurationAdjust() + //halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); + + + if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); + else + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); + + if(BTC_WIFI_BW_HT40 == wifiBw) + { + // fw mechanism + if(btInfoExt&BIT0) //a2dp basic rate + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 2); + } + else //a2dp edr rate + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1); + } + + // sw mechanism + if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || + (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); + } + else + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); + } + } + else + { + // fw mechanism + if(btInfoExt&BIT0) //a2dp basic rate + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 2); + } + else //a2dp edr rate + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1); + } + + // sw mechanism + if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || + (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); + } + else + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); + } + } +} + +VOID +halbtc8821aCsr2ant_ActionPanEdr( + IN PBTC_COEXIST pBtCoexist + ) +{ + u1Byte wifiRssiState, btRssiState; + u4Byte wifiBw; + + wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); + btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); + + halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); + + if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); + else + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); + + if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode + { + halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5aff5aff, 0xffff, 0x3); + } + else //for HID quality & wifi performance balance at 11n mode + { + halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5aff5aff, 0xffff, 0x3); + } + + if(BTC_WIFI_BW_HT40 == wifiBw) + { + // fw mechanism + if( (btRssiState == BTC_RSSI_STATE_HIGH) || + (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); + } + else + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); + } + + // sw mechanism + if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || + (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); + } + else + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); + } + } + else + { + // fw mechanism + if( (btRssiState == BTC_RSSI_STATE_HIGH) || + (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1); + } + else + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5); + } + + // sw mechanism + if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || + (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); + } + else + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); + } + } +} + + +//PAN(HS) only +VOID +halbtc8821aCsr2ant_ActionPanHs( + IN PBTC_COEXIST pBtCoexist + ) +{ + u1Byte wifiRssiState, btRssiState; + u4Byte wifiBw; + + wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); + btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); + + halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); + + if(BTC_WIFI_BW_HT40 == wifiBw) + { + // fw mechanism + if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || + (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); + } + else + { + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); + } + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); + + // sw mechanism + if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || + (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); + } + else + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); + } + } + else + { + // fw mechanism + if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || + (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); + } + else + { + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); + } + + if( (btRssiState == BTC_RSSI_STATE_HIGH) || + (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); + } + else + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1); + } + + // sw mechanism + if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || + (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); + } + else + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); + } + } +} + +//PAN(EDR)+A2DP +VOID +halbtc8821aCsr2ant_ActionPanEdrA2dp( + IN PBTC_COEXIST pBtCoexist + ) +{ + u1Byte wifiRssiState, btRssiState, btInfoExt; + u4Byte wifiBw; + + btInfoExt = pCoexSta->btInfoExt; + wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); + btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); + + halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); + + if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); + else + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); + + if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode + { + halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5afa5afa, 0xffff, 0x3); + } + else //for HID quality & wifi performance balance at 11n mode + { + halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5afa5afa, 0xffff, 0x3); + } + + if(BTC_WIFI_BW_HT40 == wifiBw) + { + // fw mechanism + if( (btRssiState == BTC_RSSI_STATE_HIGH) || + (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + if(btInfoExt&BIT0) //a2dp basic rate + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); + } + else //a2dp edr rate + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); + } + } + else + { + if(btInfoExt&BIT0) //a2dp basic rate + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); + } + else //a2dp edr rate + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); + } + } + + // sw mechanism + if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || + (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); + } + else + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); + }; + } + else + { + // fw mechanism + if( (btRssiState == BTC_RSSI_STATE_HIGH) || + (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + if(btInfoExt&BIT0) //a2dp basic rate + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); + } + else //a2dp edr rate + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3); + } + } + else + { + if(btInfoExt&BIT0) //a2dp basic rate + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); + } + else //a2dp edr rate + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3); + } + } + + // sw mechanism + if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || + (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); + } + else + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); + } + } +} + +VOID +halbtc8821aCsr2ant_ActionPanEdrHid( + IN PBTC_COEXIST pBtCoexist + ) +{ + u1Byte wifiRssiState, btRssiState; + u4Byte wifiBw; + + wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); + btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); + + halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); + + if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); + else + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); + + if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode + { + halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5f5a5f, 0xffff, 0x3); + } + else //for HID quality & wifi performance balance at 11n mode + { + halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5f5a5f, 0xffff, 0x3); + } + + if(BTC_WIFI_BW_HT40 == wifiBw) + { + halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 3); + // fw mechanism + if( (btRssiState == BTC_RSSI_STATE_HIGH) || + (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); + } + else + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); + } + + // sw mechanism + if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || + (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); + } + else + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); + } + } + else + { + halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); + // fw mechanism + if( (btRssiState == BTC_RSSI_STATE_HIGH) || + (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10); + } + else + { + halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14); + } + + // sw mechanism + if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || + (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); + } + else + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); + } + } +} + +// HID+A2DP+PAN(EDR) +VOID +halbtc8821aCsr2ant_ActionHidA2dpPanEdr( + IN PBTC_COEXIST pBtCoexist + ) +{ + u1Byte wifiRssiState, btRssiState, btInfoExt; + u4Byte wifiBw; + + btInfoExt = pCoexSta->btInfoExt; + wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); + btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); + + halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6); + + if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); + else + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); + + if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode + { + halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3); + } + else //for HID quality & wifi performance balance at 11n mode + { + halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3); + } + + if(BTC_WIFI_BW_HT40 == wifiBw) + { + // fw mechanism + if( (btRssiState == BTC_RSSI_STATE_HIGH) || + (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + if(btInfoExt&BIT0) //a2dp basic rate + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); + } + else //a2dp edr rate + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); + } + } + else + { + if(btInfoExt&BIT0) //a2dp basic rate + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); + } + else //a2dp edr rate + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); + } + } + + // sw mechanism + if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || + (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); + } + else + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); + } + } + else + { + // fw mechanism + if( (btRssiState == BTC_RSSI_STATE_HIGH) || + (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + if(btInfoExt&BIT0) //a2dp basic rate + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); + } + else //a2dp edr rate + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3); + } + } + else + { + if(btInfoExt&BIT0) //a2dp basic rate + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); + } + else //a2dp edr rate + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3); + } + } + + // sw mechanism + if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || + (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); + } + else + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); + } + } +} + +VOID +halbtc8821aCsr2ant_ActionHidA2dp( + IN PBTC_COEXIST pBtCoexist + ) +{ + u1Byte wifiRssiState, btRssiState, btInfoExt; + u4Byte wifiBw; + + btInfoExt = pCoexSta->btInfoExt; + wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0); + btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0); + + if(halbtc8821aCsr2ant_NeedToDecBtPwr(pBtCoexist)) + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, TRUE); + else + halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE); + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); + + if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode + { +//Allen halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3); + halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5f5b5f5b, 0xffffff, 0x3); + } + else //for HID quality & wifi performance balance at 11n mode + { +//Allen halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5a5a5a5a, 0xffff, 0x3); + halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5f5b5f5b, 0xffffff, 0x3); + + } + + if(BTC_WIFI_BW_HT40 == wifiBw) + { + // fw mechanism + if( (btRssiState == BTC_RSSI_STATE_HIGH) || + (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + if(btInfoExt&BIT0) //a2dp basic rate + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); + } + else //a2dp edr rate + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); + } + } + else + { + if(btInfoExt&BIT0) //a2dp basic rate + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); + } + else //a2dp edr rate + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); + } + } + + // sw mechanism + if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || + (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); + } + else + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); + } + } + else + { + // fw mechanism + if( (btRssiState == BTC_RSSI_STATE_HIGH) || + (btRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + if(btInfoExt&BIT0) //a2dp basic rate + { +// halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 2); + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); + + } + else //a2dp edr rate + { +//Allen halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 2); + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); + } + } + else + { + if(btInfoExt&BIT0) //a2dp basic rate + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); + } + else //a2dp edr rate + { + halbtc8821aCsr2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2); + } + } + + // sw mechanism + if( (wifiRssiState == BTC_RSSI_STATE_HIGH) || + (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) ) + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18); + } + else + { + halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE); + halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18); + } + } +} + +VOID +halbtc8821aCsr2ant_RunCoexistMechanism( + IN PBTC_COEXIST pBtCoexist + ) +{ + PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; + BOOLEAN bWifiUnder5G=FALSE; + u1Byte btInfoOriginal=0, btRetryCnt=0; + u1Byte algorithm=0; + + if(pBtCoexist->bManualControl) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Manual control!!!\n")); + return; + } + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G); + + if(bWifiUnder5G) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], RunCoexistMechanism(), run 5G coex setting!!<===\n")); + halbtc8821aCsr2ant_CoexUnder5G(pBtCoexist); + return; + } + + //if(pStackInfo->bProfileNotified) + { + algorithm = halbtc8821aCsr2ant_ActionAlgorithm(pBtCoexist); + if(pCoexSta->bC2hBtInquiryPage && (BT_8821A_CSR_2ANT_COEX_ALGO_PANHS!=algorithm)) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BT is under inquiry/page scan !!\n")); + halbtc8821aCsr2ant_BtInquiryPage(pBtCoexist); + return; + } + + pCoexDm->curAlgorithm = algorithm; + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Algorithm = %d \n", pCoexDm->curAlgorithm)); + + if(halbtc8821aCsr2ant_IsCommonAction(pBtCoexist)) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant common.\n")); + pCoexDm->bResetTdmaAdjust = TRUE; + } + else + { + if(pCoexDm->curAlgorithm != pCoexDm->preAlgorithm) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], preAlgorithm=%d, curAlgorithm=%d\n", + pCoexDm->preAlgorithm, pCoexDm->curAlgorithm)); + pCoexDm->bResetTdmaAdjust = TRUE; + } + switch(pCoexDm->curAlgorithm) + { + case BT_8821A_CSR_2ANT_COEX_ALGO_SCO: + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = SCO.\n")); + halbtc8821aCsr2ant_ActionSco(pBtCoexist); + break; + case BT_8821A_CSR_2ANT_COEX_ALGO_HID: + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = HID.\n")); + halbtc8821aCsr2ant_ActionHid(pBtCoexist); + break; + case BT_8821A_CSR_2ANT_COEX_ALGO_A2DP: + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = A2DP.\n")); + halbtc8821aCsr2ant_ActionA2dp(pBtCoexist); + break; + case BT_8821A_CSR_2ANT_COEX_ALGO_A2DP_PANHS: + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n")); + halbtc8821aCsr2ant_ActionA2dpPanHs(pBtCoexist); + break; + case BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR: + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n")); + halbtc8821aCsr2ant_ActionPanEdr(pBtCoexist); + break; + case BT_8821A_CSR_2ANT_COEX_ALGO_PANHS: + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = HS mode.\n")); + halbtc8821aCsr2ant_ActionPanHs(pBtCoexist); + break; + case BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_A2DP: + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n")); + halbtc8821aCsr2ant_ActionPanEdrA2dp(pBtCoexist); + break; + case BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID: + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n")); + halbtc8821aCsr2ant_ActionPanEdrHid(pBtCoexist); + break; + case BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP_PANEDR: + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n")); + halbtc8821aCsr2ant_ActionHidA2dpPanEdr(pBtCoexist); + break; + case BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP: + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n")); + halbtc8821aCsr2ant_ActionHidA2dp(pBtCoexist); + break; + default: + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n")); + halbtc8821aCsr2ant_CoexAllOff(pBtCoexist); + break; + } + pCoexDm->preAlgorithm = pCoexDm->curAlgorithm; + } + } +} + + + +//============================================================ +// work around function start with wa_halbtc8821aCsr2ant_ +//============================================================ +//============================================================ +// extern function start with EXhalbtc8821aCsr2ant_ +//============================================================ +VOID +EXhalbtc8821aCsr2ant_PowerOnSetting( + IN PBTC_COEXIST pBtCoexist + ) +{ +} + +VOID +EXhalbtc8821aCsr2ant_InitHwConfig( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bWifiOnly + ) +{ + PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; + u4Byte u4Tmp=0; + u2Byte u2Tmp=0; + u1Byte u1Tmp=0; + u1Byte H2C_Parameter[2] ={0}; + + + BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], 2Ant Init HW Config!!\n")); + + if(bWifiOnly) + return; + + //if(bBackUp) + { + // backup rf 0x1e value + pCoexDm->btRf0x1eBackup = pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff); + pCoexDm->backupArfrCnt1 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430); + pCoexDm->backupArfrCnt2 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434); + pCoexDm->backupRetryLimit = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a); + pCoexDm->backupAmpduMaxTime = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456); + pCoexDm->backupAmpduMaxNum = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x4ca); + } + + #if 0 /* REMOVE */ + // 0x790[5:0]=0x5 + u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790); + u1Tmp &= 0xc0; + u1Tmp |= 0x5; + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp); + #endif + + //Antenna config + halbtc8821aCsr2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_MAIN, TRUE, FALSE); + + // PTA parameter + halbtc8821aCsr2ant_CoexTable(pBtCoexist, FORCE_EXEC, 0x55555555, 0x55555555, 0xffff, 0x3); + + // Enable counter statistics + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); //0x76e[3] =1, WLAN_Act control by PTA + pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x3); + + #if 0 /* REMOVE */ + pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x40, 0x20, 0x1); + #endif +} + +VOID +EXhalbtc8821aCsr2ant_InitCoexDm( + IN PBTC_COEXIST pBtCoexist + ) +{ + BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], Coex Mechanism Init!!\n")); + + halbtc8821aCsr2ant_InitCoexDm(pBtCoexist); +} + +VOID +EXhalbtc8821aCsr2ant_DisplayCoexInfo( + IN PBTC_COEXIST pBtCoexist + ) +{ + PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; + PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; + pu1Byte cliBuf=pBtCoexist->cliBuf; + u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0; + u4Byte u4Tmp[4]; + BOOLEAN bRoam=FALSE, bScan=FALSE, bLink=FALSE, bWifiUnder5G=FALSE; + BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE; + s4Byte wifiRssi=0, btHsRssi=0; + u4Byte wifiBw, wifiTrafficDir; + u1Byte wifiDot11Chnl, wifiHsChnl; + u4Byte fwVer=0, btPatchVer=0; + + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============"); + CL_PRINTF(cliBuf); + + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \ + pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum); + CL_PRINTF(cliBuf); + + if(pBtCoexist->bManualControl) + { + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "[Action Manual control]!!"); + CL_PRINTF(cliBuf); + } + + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \ + ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion); + CL_PRINTF(cliBuf); + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)", "CoexVer/ FwVer/ PatchVer", \ + GLCoexVerDate8821aCsr2Ant, GLCoexVer8821aCsr2Ant, fwVer, btPatchVer, btPatchVer); + CL_PRINTF(cliBuf); + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_DOT11_CHNL, &wifiDot11Chnl); + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifiHsChnl); + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d(%d)", "Dot11 channel / HsMode(HsChnl)", \ + wifiDot11Chnl, bBtHsOn, wifiHsChnl); + CL_PRINTF(cliBuf); + + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "H2C Wifi inform bt chnl Info", \ + pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1], + pCoexDm->wifiChnlInfo[2]); + CL_PRINTF(cliBuf); + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi); + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_HS_RSSI, &btHsRssi); + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "Wifi rssi/ HS rssi", \ + wifiRssi, btHsRssi); + CL_PRINTF(cliBuf); + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan); + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink); + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "Wifi bLink/ bRoam/ bScan", \ + bLink, bRoam, bScan); + CL_PRINTF(cliBuf); + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G); + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy); + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir); + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ %s ", "Wifi status", \ + (bWifiUnder5G? "5G":"2.4G"), + ((BTC_WIFI_BW_LEGACY==wifiBw)? "Legacy": (((BTC_WIFI_BW_HT40==wifiBw)? "HT40":"HT20"))), + ((!bWifiBusy)? "idle": ((BTC_WIFI_TRAFFIC_TX==wifiTrafficDir)? "uplink":"downlink"))); + CL_PRINTF(cliBuf); + + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \ + ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8821A_CSR_2ANT_BT_STATUS_IDLE == pCoexDm->btStatus)? "idle":( (BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy"))), + pCoexSta->btRssi, pCoexSta->btRetryCnt); + CL_PRINTF(cliBuf); + + if(pStackInfo->bProfileNotified) + { + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \ + pStackInfo->bScoExist, pStackInfo->bHidExist, pStackInfo->bPanExist, pStackInfo->bA2dpExist); + CL_PRINTF(cliBuf); + + pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO); + } + + btInfoExt = pCoexSta->btInfoExt; + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \ + (btInfoExt&BIT0)? "Basic rate":"EDR rate"); + CL_PRINTF(cliBuf); + + for(i=0; ibtInfoC2hCnt[i]) + { + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8821aCsr2Ant[i], \ + pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1], + pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3], + pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5], + pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]); + CL_PRINTF(cliBuf); + } + } + + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/%s", "PS state, IPS/LPS", \ + ((pCoexSta->bUnderIps? "IPS ON":"IPS OFF")), + ((pCoexSta->bUnderLps? "LPS ON":"LPS OFF"))); + CL_PRINTF(cliBuf); + pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_FW_PWR_MODE_CMD); + + // Sw mechanism + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============"); + CL_PRINTF(cliBuf); + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "SM1[ShRf/ LpRA/ LimDig]", \ + pCoexDm->bCurRfRxLpfShrink, pCoexDm->bCurLowPenaltyRa, pCoexDm->bLimitedDig); + CL_PRINTF(cliBuf); + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \ + pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl); + CL_PRINTF(cliBuf); + + // Fw mechanism + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============"); + CL_PRINTF(cliBuf); + + if(!pBtCoexist->bManualControl) + { + psTdmaCase = pCoexDm->curPsTdma; + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d", "PS TDMA", \ + pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1], + pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3], + pCoexDm->psTdmaPara[4], psTdmaCase); + CL_PRINTF(cliBuf); + + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "DecBtPwr/ IgnWlanAct", \ + pCoexDm->bCurDecBtPwr, pCoexDm->bCurIgnoreWlanAct); + CL_PRINTF(cliBuf); + } + + // Hw setting + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============"); + CL_PRINTF(cliBuf); + + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \ + pCoexDm->btRf0x1eBackup); + CL_PRINTF(cliBuf); + + u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778); + u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc); + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x ", "0x778 (W_Act)/ 0x6cc (CoTab Sel)", \ + u1Tmp[0], u1Tmp[1]); + CL_PRINTF(cliBuf); + + u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x8db); + u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xc5b); + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x8db(ADC)/0xc5b[29:25](DAC)", \ + ((u1Tmp[0]&0x60)>>5), ((u1Tmp[1]&0x3e)>>1)); + CL_PRINTF(cliBuf); + + u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xcb4); + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0xcb4[7:0](ctrl)/ 0xcb4[29:28](val)", \ + u4Tmp[0]&0xff, ((u4Tmp[0]&0x30000000)>>28)); + CL_PRINTF(cliBuf); + + u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40); + u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c); + u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x974); + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x40/ 0x4c[24:23]/ 0x974", \ + u1Tmp[0], ((u4Tmp[0]&0x01800000)>>23), u4Tmp[1]); + CL_PRINTF(cliBuf); + + u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550); + u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522); + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \ + u4Tmp[0], u1Tmp[0]); + CL_PRINTF(cliBuf); + + u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50); + u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa0a); + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0xc50(DIG)/0xa0a(CCK-TH)", \ + u4Tmp[0], u1Tmp[0]); + CL_PRINTF(cliBuf); + + u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf48); + u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5b); + u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5c); + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "OFDM-FA/ CCK-FA", \ + u4Tmp[0], (u1Tmp[0]<<8) + u1Tmp[1] ); + CL_PRINTF(cliBuf); + + u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0); + u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4); + u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8); + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8", \ + u4Tmp[0], u4Tmp[1], u4Tmp[2]); + CL_PRINTF(cliBuf); + + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770 (hi-pri Rx/Tx)", \ + pCoexSta->highPriorityRx, pCoexSta->highPriorityTx); + CL_PRINTF(cliBuf); + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(low-pri Rx/Tx)", \ + pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx); + CL_PRINTF(cliBuf); + + // Tx mgnt queue hang or not, 0x41b should = 0xf, ex: 0xd ==>hang + u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x41b); + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x41b (mgntQ hang chk == 0xf)", \ + u1Tmp[0]); + CL_PRINTF(cliBuf); + + pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS); +} + + +VOID +EXhalbtc8821aCsr2ant_IpsNotify( + IN PBTC_COEXIST pBtCoexist, + IN u1Byte type + ) +{ + if(BTC_IPS_ENTER == type) + { + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], IPS ENTER notify\n")); + pCoexSta->bUnderIps = TRUE; + halbtc8821aCsr2ant_CoexAllOff(pBtCoexist); + } + else if(BTC_IPS_LEAVE == type) + { + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], IPS LEAVE notify\n")); + pCoexSta->bUnderIps = FALSE; + //halbtc8821aCsr2ant_InitCoexDm(pBtCoexist); + } +} + +VOID +EXhalbtc8821aCsr2ant_LpsNotify( + IN PBTC_COEXIST pBtCoexist, + IN u1Byte type + ) +{ + if(BTC_LPS_ENABLE == type) + { + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], LPS ENABLE notify\n")); + pCoexSta->bUnderLps = TRUE; + } + else if(BTC_LPS_DISABLE == type) + { + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], LPS DISABLE notify\n")); + pCoexSta->bUnderLps = FALSE; + } +} + +VOID +EXhalbtc8821aCsr2ant_ScanNotify( + IN PBTC_COEXIST pBtCoexist, + IN u1Byte type + ) +{ + if(BTC_SCAN_START == type) + { + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], SCAN START notify\n")); + } + else if(BTC_SCAN_FINISH == type) + { + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], SCAN FINISH notify\n")); + } +} + +VOID +EXhalbtc8821aCsr2ant_ConnectNotify( + IN PBTC_COEXIST pBtCoexist, + IN u1Byte type + ) +{ + if(BTC_ASSOCIATE_START == type) + { + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], CONNECT START notify\n")); + } + else if(BTC_ASSOCIATE_FINISH == type) + { + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], CONNECT FINISH notify\n")); + } +} + +VOID +EXhalbtc8821aCsr2ant_MediaStatusNotify( + IN PBTC_COEXIST pBtCoexist, + IN u1Byte type + ) +{ + u1Byte H2C_Parameter[3] ={0}; + u4Byte wifiBw; + u1Byte wifiCentralChnl; + + if(BTC_MEDIA_CONNECT == type) + { + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], MEDIA connect notify\n")); + } + else + { + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], MEDIA disconnect notify\n")); + } + + // only 2.4G we need to inform bt the chnl mask + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl); + if( (BTC_MEDIA_CONNECT == type) && + (wifiCentralChnl <= 14) ) + { + H2C_Parameter[0] = 0x1; + H2C_Parameter[1] = wifiCentralChnl; + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw); + if(BTC_WIFI_BW_HT40 == wifiBw) + H2C_Parameter[2] = 0x30; + else + H2C_Parameter[2] = 0x20; + } + + #if 0 /* REMOVE */ + pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0]; + pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1]; + pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2]; + + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], FW write 0x66=0x%x\n", + H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2])); + + rtw_warn_on(_BTCOEX_CSR); + pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter); + #endif +} + +VOID +EXhalbtc8821aCsr2ant_SpecialPacketNotify( + IN PBTC_COEXIST pBtCoexist, + IN u1Byte type + ) +{ + if(type == BTC_PACKET_DHCP) + { + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], DHCP Packet notify\n")); + } +} + +VOID +EXhalbtc8821aCsr2ant_BtInfoNotify( + IN PBTC_COEXIST pBtCoexist, + IN pu1Byte tmpBuf, + IN u1Byte length + ) +{ + u1Byte btInfo=0; + u1Byte i, rspSource=0; + BOOLEAN bBtBusy=FALSE, bLimitedDig=FALSE; + BOOLEAN bWifiConnected=FALSE, bBtHsOn=FALSE, bWifiUnder5G=FALSE; + + pCoexSta->bC2hBtInfoReqSent = FALSE; + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G); + + rspSource = tmpBuf[0]&0xf; + if(rspSource >= BT_INFO_SRC_8821A_CSR_2ANT_MAX) + rspSource = BT_INFO_SRC_8821A_CSR_2ANT_WIFI_FW; + pCoexSta->btInfoC2hCnt[rspSource]++; + + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length)); + for(i=0; ibtInfoC2h[rspSource][i] = tmpBuf[i]; + if(i == 1) + btInfo = tmpBuf[i]; + if(i == length-1) + { + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("0x%02x]\n", tmpBuf[i])); + } + else + { + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("0x%02x, ", tmpBuf[i])); + } + } + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected); + if(BT_INFO_SRC_8821A_CSR_2ANT_WIFI_FW != rspSource) + { + pCoexSta->btRetryCnt = // [3:0] + pCoexSta->btInfoC2h[rspSource][2]&0xf; + + pCoexSta->btRssi = + pCoexSta->btInfoC2h[rspSource][3]*2+10; + + pCoexSta->btInfoExt = + pCoexSta->btInfoC2h[rspSource][4]; + + #if 0 /* REMOVE */ + // Here we need to resend some wifi info to BT + // because bt is reset and loss of the info. + if( (pCoexSta->btInfoExt & BIT1) ) + { + + if(bWifiConnected) + { + EXhalbtc8821aCsr2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT); + } + else + { + EXhalbtc8821aCsr2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); + } + } + #endif + + #if 0 /* REMOVE */ + if(!pBtCoexist->bManualControl && !bWifiUnder5G) + { + if( (pCoexSta->btInfoExt&BIT3) ) + { + if(bWifiConnected) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n")); + halbtc8821aCsr2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE); + } + } + else + { + // BT already NOT ignore Wlan active, do nothing here. + if(!bWifiConnected) + { + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BT ext info bit3 check, set BT to ignore Wlan active!!\n")); + halbtc8821aCsr2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); + } + } + } + #endif + + #if 0 /* REMOVE */ + if( (pCoexSta->btInfoExt & BIT4) ) + { + // BT auto report already enabled, do nothing + } + else + { + halbtc8821aCsr2ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE); + } + #endif + } + + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn); + + if(btInfo == BT_INFO_8821A_CSR_2ANT_B_CONNECTION) // connection exists but no busy + { + pCoexSta->bBtLinkExist = TRUE; + pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE; + } + else if(btInfo & BT_INFO_8821A_CSR_2ANT_B_CONNECTION) // connection exists and some link is busy + { + pCoexSta->bBtLinkExist = TRUE; + + if(btInfo & BT_INFO_8821A_CSR_2ANT_B_FTP) + pCoexSta->bPanExist = TRUE; + else + pCoexSta->bPanExist = FALSE; + + if(btInfo & BT_INFO_8821A_CSR_2ANT_B_A2DP) + pCoexSta->bA2dpExist = TRUE; + else + pCoexSta->bA2dpExist = FALSE; + + if(btInfo & BT_INFO_8821A_CSR_2ANT_B_HID) + pCoexSta->bHidExist = TRUE; + else + pCoexSta->bHidExist = FALSE; + + if(btInfo & BT_INFO_8821A_CSR_2ANT_B_SCO_ESCO) + pCoexSta->bScoExist = TRUE; + else + pCoexSta->bScoExist = FALSE; + + if (pCoexSta->btInfoExt & 0x80) + pCoexSta->bSlave = TRUE; //Slave + else + pCoexSta->bSlave = FALSE; //Master + + pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE; + } + else + { + pCoexSta->bBtLinkExist = FALSE; + pCoexSta->bPanExist = FALSE; + pCoexSta->bA2dpExist = FALSE; + pCoexSta->bSlave = FALSE; + pCoexSta->bHidExist = FALSE; + pCoexSta->bScoExist = FALSE; + pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_IDLE; + } + + if(bBtHsOn) + { + pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE; + } + + if(btInfo & BT_INFO_8821A_CSR_2ANT_B_INQ_PAGE) + { + pCoexSta->bC2hBtInquiryPage = TRUE; + pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE; + } + else + { + pCoexSta->bC2hBtInquiryPage = FALSE; + } + + + if(BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE == pCoexDm->btStatus) + { + bBtBusy = TRUE; + } + else + { + bBtBusy = FALSE; + } + pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy); + + if(BT_8821A_CSR_2ANT_BT_STATUS_IDLE != pCoexDm->btStatus) + { + bLimitedDig = TRUE; + } + else + { + bLimitedDig = FALSE; + } + pCoexDm->bLimitedDig = bLimitedDig; + pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &bLimitedDig); + + halbtc8821aCsr2ant_RunCoexistMechanism(pBtCoexist); +} + +VOID +EXhalbtc8821aCsr2ant_HaltNotify( + IN PBTC_COEXIST pBtCoexist + ) +{ + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Halt notify\n")); + + halbtc8821aCsr2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); + EXhalbtc8821aCsr2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT); +} + +VOID +EXhalbtc8821aCsr2ant_PnpNotify( + IN PBTC_COEXIST pBtCoexist, + IN u1Byte pnpState + ) +{ + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Pnp notify\n")); + + if(BTC_WIFI_PNP_SLEEP == pnpState) + { + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Pnp notify to SLEEP\n")); + halbtc8821aCsr2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE); + } + else if(BTC_WIFI_PNP_WAKE_UP == pnpState) + { + BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Pnp notify to WAKE UP\n")); + } +} + +VOID +EXhalbtc8821aCsr2ant_Periodical( + IN PBTC_COEXIST pBtCoexist + ) +{ + static u1Byte disVerInfoCnt=0; + u4Byte fwVer=0, btPatchVer=0; + PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo; + PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo; + + BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], ==========================Periodical===========================\n")); + + if(disVerInfoCnt <= 5) + { + disVerInfoCnt += 1; + BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], ****************************************************************\n")); + BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", \ + pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos)); + BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n", \ + ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion)); + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer); + pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); + BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", \ + GLCoexVerDate8821aCsr2Ant, GLCoexVer8821aCsr2Ant, fwVer, btPatchVer, btPatchVer)); + BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], ****************************************************************\n")); + } + + //halbtc8821aCsr2ant_QueryBtInfo(pBtCoexist); + //halbtc8821aCsr2ant_RunCoexistMechanism(pBtCoexist); + halbtc8821aCsr2ant_MonitorBtCtr(pBtCoexist); + halbtc8821aCsr2ant_MonitorBtEnableDisable(pBtCoexist); +} + + +#endif + diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8821aCsr2Ant.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8821aCsr2Ant.h new file mode 100755 index 000000000000..aeebf82196da --- /dev/null +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtc8821aCsr2Ant.h @@ -0,0 +1,207 @@ +//=========================================== +// The following is for 8821A_CSR 2Ant BT Co-exist definition +//=========================================== +#define BT_INFO_8821A_CSR_2ANT_B_FTP BIT7 +#define BT_INFO_8821A_CSR_2ANT_B_A2DP BIT6 +#define BT_INFO_8821A_CSR_2ANT_B_HID BIT5 +#define BT_INFO_8821A_CSR_2ANT_B_SCO_BUSY BIT4 +#define BT_INFO_8821A_CSR_2ANT_B_ACL_BUSY BIT3 +#define BT_INFO_8821A_CSR_2ANT_B_INQ_PAGE BIT2 +#define BT_INFO_8821A_CSR_2ANT_B_SCO_ESCO BIT1 +#define BT_INFO_8821A_CSR_2ANT_B_CONNECTION BIT0 + +#define BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT 2 + +typedef enum _BT_INFO_SRC_8821A_CSR_2ANT{ + BT_INFO_SRC_8821A_CSR_2ANT_WIFI_FW = 0x0, + BT_INFO_SRC_8821A_CSR_2ANT_BT_RSP = 0x1, + BT_INFO_SRC_8821A_CSR_2ANT_BT_ACTIVE_SEND = 0x2, + BT_INFO_SRC_8821A_CSR_2ANT_MAX +}BT_INFO_SRC_8821A_CSR_2ANT,*PBT_INFO_SRC_8821A_CSR_2ANT; + +typedef enum _BT_8821A_CSR_2ANT_BT_STATUS{ + BT_8821A_CSR_2ANT_BT_STATUS_IDLE = 0x0, + BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1, + BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE = 0x2, + BT_8821A_CSR_2ANT_BT_STATUS_MAX +}BT_8821A_CSR_2ANT_BT_STATUS,*PBT_8821A_CSR_2ANT_BT_STATUS; + +typedef enum _BT_8821A_CSR_2ANT_COEX_ALGO{ + BT_8821A_CSR_2ANT_COEX_ALGO_UNDEFINED = 0x0, + BT_8821A_CSR_2ANT_COEX_ALGO_SCO = 0x1, + BT_8821A_CSR_2ANT_COEX_ALGO_HID = 0x2, + BT_8821A_CSR_2ANT_COEX_ALGO_A2DP = 0x3, + BT_8821A_CSR_2ANT_COEX_ALGO_A2DP_PANHS = 0x4, + BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR = 0x5, + BT_8821A_CSR_2ANT_COEX_ALGO_PANHS = 0x6, + BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7, + BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID = 0x8, + BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, + BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP = 0xa, + BT_8821A_CSR_2ANT_COEX_ALGO_MAX = 0xb, +}BT_8821A_CSR_2ANT_COEX_ALGO,*PBT_8821A_CSR_2ANT_COEX_ALGO; + +typedef struct _COEX_DM_8821A_CSR_2ANT{ + // fw mechanism + BOOLEAN bPreDecBtPwr; + BOOLEAN bCurDecBtPwr; + u1Byte preFwDacSwingLvl; + u1Byte curFwDacSwingLvl; + BOOLEAN bCurIgnoreWlanAct; + BOOLEAN bPreIgnoreWlanAct; + u1Byte prePsTdma; + u1Byte curPsTdma; + u1Byte psTdmaPara[6]; + u1Byte psTdmaDuAdjType; + BOOLEAN bResetTdmaAdjust; + BOOLEAN bPrePsTdmaOn; + BOOLEAN bCurPsTdmaOn; + BOOLEAN bPreBtAutoReport; + BOOLEAN bCurBtAutoReport; + + // sw mechanism + BOOLEAN bPreRfRxLpfShrink; + BOOLEAN bCurRfRxLpfShrink; + u4Byte btRf0x1eBackup; + BOOLEAN bPreLowPenaltyRa; + BOOLEAN bCurLowPenaltyRa; + BOOLEAN bPreDacSwingOn; + u4Byte preDacSwingLvl; + BOOLEAN bCurDacSwingOn; + u4Byte curDacSwingLvl; + BOOLEAN bPreAdcBackOff; + BOOLEAN bCurAdcBackOff; + BOOLEAN bPreAgcTableEn; + BOOLEAN bCurAgcTableEn; + u4Byte preVal0x6c0; + u4Byte curVal0x6c0; + u4Byte preVal0x6c4; + u4Byte curVal0x6c4; + u4Byte preVal0x6c8; + u4Byte curVal0x6c8; + u1Byte preVal0x6cc; + u1Byte curVal0x6cc; + BOOLEAN bLimitedDig; + + u4Byte preRaMask; + u4Byte curRaMask; + + u1Byte curAmpduNumType; + u1Byte preAmpduNumType; + u2Byte backupAmpduMaxNum; + + u1Byte curAmpduTimeType; + u1Byte preAmpduTimeType; + u1Byte backupAmpduMaxTime; + + u1Byte curArfrType; + u1Byte preArfrType; + u4Byte backupArfrCnt1; + u4Byte backupArfrCnt2; + + u1Byte curRetryLimitType; + u1Byte preRetryLimitType; + u2Byte backupRetryLimit; + + // algorithm related + u1Byte preAlgorithm; + u1Byte curAlgorithm; + u1Byte btStatus; + u1Byte wifiChnlInfo[3]; +} COEX_DM_8821A_CSR_2ANT, *PCOEX_DM_8821A_CSR_2ANT; + +typedef struct _COEX_STA_8821A_CSR_2ANT{ + BOOLEAN bBtLinkExist; + BOOLEAN bScoExist; + BOOLEAN bA2dpExist; + BOOLEAN bSlave; + BOOLEAN bHidExist; + BOOLEAN bPanExist; + + BOOLEAN bUnderLps; + BOOLEAN bUnderIps; + u4Byte highPriorityTx; + u4Byte highPriorityRx; + u4Byte lowPriorityTx; + u4Byte lowPriorityRx; + u1Byte btRssi; + u1Byte preBtRssiState; + u1Byte preWifiRssiState[4]; + BOOLEAN bC2hBtInfoReqSent; + u1Byte btInfoC2h[BT_INFO_SRC_8821A_CSR_2ANT_MAX][10]; + u4Byte btInfoC2hCnt[BT_INFO_SRC_8821A_CSR_2ANT_MAX]; + BOOLEAN bC2hBtInquiryPage; + u1Byte btRetryCnt; + u1Byte btInfoExt; +}COEX_STA_8821A_CSR_2ANT, *PCOEX_STA_8821A_CSR_2ANT; + +//=========================================== +// The following is interface which will notify coex module. +//=========================================== +VOID +EXhalbtc8821aCsr2ant_PowerOnSetting( + IN PBTC_COEXIST pBtCoexist + ); +VOID +EXhalbtc8821aCsr2ant_InitHwConfig( + IN PBTC_COEXIST pBtCoexist, + IN BOOLEAN bWifiOnly + ); +VOID +EXhalbtc8821aCsr2ant_InitCoexDm( + IN PBTC_COEXIST pBtCoexist + ); +VOID +EXhalbtc8821aCsr2ant_IpsNotify( + IN PBTC_COEXIST pBtCoexist, + IN u1Byte type + ); +VOID +EXhalbtc8821aCsr2ant_LpsNotify( + IN PBTC_COEXIST pBtCoexist, + IN u1Byte type + ); +VOID +EXhalbtc8821aCsr2ant_ScanNotify( + IN PBTC_COEXIST pBtCoexist, + IN u1Byte type + ); +VOID +EXhalbtc8821aCsr2ant_ConnectNotify( + IN PBTC_COEXIST pBtCoexist, + IN u1Byte type + ); +VOID +EXhalbtc8821aCsr2ant_MediaStatusNotify( + IN PBTC_COEXIST pBtCoexist, + IN u1Byte type + ); +VOID +EXhalbtc8821aCsr2ant_SpecialPacketNotify( + IN PBTC_COEXIST pBtCoexist, + IN u1Byte type + ); +VOID +EXhalbtc8821aCsr2ant_BtInfoNotify( + IN PBTC_COEXIST pBtCoexist, + IN pu1Byte tmpBuf, + IN u1Byte length + ); +VOID +EXhalbtc8821aCsr2ant_HaltNotify( + IN PBTC_COEXIST pBtCoexist + ); +VOID +EXhalbtc8821aCsr2ant_PnpNotify( + IN PBTC_COEXIST pBtCoexist, + IN u1Byte pnpState + ); +VOID +EXhalbtc8821aCsr2ant_Periodical( + IN PBTC_COEXIST pBtCoexist + ); +VOID +EXhalbtc8821aCsr2ant_DisplayCoexInfo( + IN PBTC_COEXIST pBtCoexist + ); + diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtcOutSrc.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtcOutSrc.h old mode 100644 new mode 100755 index 570609894477..9e235d62aba4 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtcOutSrc.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/HalBtcOutSrc.h @@ -4,6 +4,9 @@ #define NORMAL_EXEC FALSE #define FORCE_EXEC TRUE +#define BTC_RF_OFF 0x0 +#define BTC_RF_ON 0x1 + #define BTC_RF_A 0x0 #define BTC_RF_B 0x1 #define BTC_RF_C 0x2 @@ -165,7 +168,8 @@ typedef struct _BTC_BOARD_INFO{ u1Byte pgAntNum; // pg ant number u1Byte btdmAntNum; // ant number for btdm u1Byte btdmAntPos; //Bryant Add to indicate Antenna Position for (pgAntNum = 2) && (btdmAntNum =1) (DPDT+1Ant case) - BOOLEAN bBtExist; + u1Byte singleAntPath; // current used for 8723b only, 1=>s0, 0=>s1 + //BOOLEAN bBtExist; } BTC_BOARD_INFO, *PBTC_BOARD_INFO; typedef enum _BTC_DBG_OPCODE{ @@ -244,8 +248,8 @@ typedef enum _BTC_GET_TYPE{ BTC_GET_BL_WIFI_AP_MODE_ENABLE, BTC_GET_BL_WIFI_ENABLE_ENCRYPTION, BTC_GET_BL_WIFI_UNDER_B_MODE, - BTC_GET_BL_WIFI_IS_IN_MP_MODE, BTC_GET_BL_EXT_SWITCH, + BTC_GET_BL_WIFI_IS_IN_MP_MODE, // type s4Byte BTC_GET_S4_WIFI_RSSI, @@ -282,6 +286,7 @@ typedef enum _BTC_SET_TYPE{ BTC_SET_BL_BT_CTRL_AGG_SIZE, BTC_SET_BL_INC_SCAN_DEV_NUM, BTC_SET_BL_BT_TX_RX_MASK, + BTC_SET_BL_MIRACAST_PLUS_BT, // type u1Byte BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, @@ -405,6 +410,12 @@ typedef VOID IN u4Byte Data ); typedef VOID +(*BFP_BTC_LOCAL_REG_W1)( + IN PVOID pBtcContext, + IN u4Byte RegAddr, + IN u1Byte Data + ); +typedef VOID (*BFP_BTC_SET_BB_REG)( IN PVOID pBtcContext, IN u4Byte RegAddr, @@ -488,6 +499,8 @@ typedef struct _BTC_BT_INFO{ u2Byte btHciVer; u2Byte btRealFwVer; u1Byte btFwVer; + u4Byte getBtFwVerCnt; + BOOLEAN bMiracastPlusBt; BOOLEAN bBtDisableLowPwr; @@ -524,10 +537,12 @@ typedef struct _BTC_BT_LINK_INFO{ BOOLEAN bHidOnly; BOOLEAN bPanExist; BOOLEAN bPanOnly; + BOOLEAN bSlaveRole; } BTC_BT_LINK_INFO, *PBTC_BT_LINK_INFO; typedef struct _BTC_STATISTICS{ u4Byte cntBind; + u4Byte cntPowerOn; u4Byte cntInitHwConfig; u4Byte cntInitCoexDm; u4Byte cntIpsNotify; @@ -537,6 +552,7 @@ typedef struct _BTC_STATISTICS{ u4Byte cntMediaStatusNotify; u4Byte cntSpecialPacketNotify; u4Byte cntBtInfoNotify; + u4Byte cntRfStatusNotify; u4Byte cntPeriodical; u4Byte cntCoexDmSwitch; u4Byte cntStackOperationNotify; @@ -568,6 +584,7 @@ typedef struct _BTC_COEXIST{ BFP_BTC_W2 fBtcWrite2Byte; BFP_BTC_R4 fBtcRead4Byte; BFP_BTC_W4 fBtcWrite4Byte; + BFP_BTC_LOCAL_REG_W1 fBtcWriteLocalReg1Byte; // read/write bb related BFP_BTC_SET_BB_REG fBtcSetBbReg; BFP_BTC_GET_BB_REG fBtcGetBbReg; @@ -592,7 +609,11 @@ extern BTC_COEXIST GLBtCoexist; BOOLEAN EXhalbtcoutsrc_InitlizeVariables( - IN PVOID Adapter + IN PVOID Adapter + ); +VOID +EXhalbtcoutsrc_PowerOnSetting( + IN PBTC_COEXIST pBtCoexist ); VOID EXhalbtcoutsrc_InitHwConfig( @@ -640,6 +661,11 @@ EXhalbtcoutsrc_BtInfoNotify( IN u1Byte length ); VOID +EXhalbtcoutsrc_RfStatusNotify( + IN PBTC_COEXIST pBtCoexist, + IN u1Byte type + ); +VOID EXhalbtcoutsrc_StackOperationNotify( IN PBTC_COEXIST pBtCoexist, IN u1Byte type @@ -655,8 +681,7 @@ EXhalbtcoutsrc_PnpNotify( ); VOID EXhalbtcoutsrc_CoexDmSwitch( - IN PBTC_COEXIST pBtCoexist, - IN BOOLEAN antInverse + IN PBTC_COEXIST pBtCoexist ); VOID EXhalbtcoutsrc_Periodical( @@ -686,10 +711,12 @@ VOID EXhalbtcoutsrc_UpdateMinBtRssi( IN s1Byte btRssi ); +#if 0 VOID EXhalbtcoutsrc_SetBtExist( IN BOOLEAN bBtExist ); +#endif VOID EXhalbtcoutsrc_SetChipType( IN u1Byte chipType @@ -697,8 +724,11 @@ EXhalbtcoutsrc_SetChipType( VOID EXhalbtcoutsrc_SetAntNum( IN u1Byte type, - IN u1Byte antNum, - IN BOOLEAN antInverse + IN u1Byte antNum + ); +VOID +EXhalbtcoutsrc_SetSingleAntPath( + IN u1Byte singleAntPath ); VOID EXhalbtcoutsrc_DisplayBtCoexInfo( diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/Mp_Precomp.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/Mp_Precomp.h old mode 100644 new mode 100755 index fdd940611f6f..b1fc17ba1484 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/Mp_Precomp.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC-BTCoexist/Mp_Precomp.h @@ -52,5 +52,6 @@ #include "HalBtc8812a2Ant.h" #include "HalBtc8821a1Ant.h" #include "HalBtc8821a2Ant.h" +#include "HalBtc8821aCsr2Ant.h" #endif // __MP_PRECOMP_H__ diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/HalPhyRf.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/HalPhyRf.c old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/HalPhyRf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/HalPhyRf.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm.c old mode 100644 new mode 100755 index fd6474e8aa21..25d53cb24eae --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm.c @@ -36,50 +36,6 @@ const u2Byte dB_Invert_Table[8][12] = { { 17783, 19953, 22387, 25119, 28184, 31623, 35481, 39811, 44668, 50119, 56234, 65535}}; -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -static u4Byte edca_setting_UL[HT_IOT_PEER_MAX] = -// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU MARVELL 92U_AP SELF_AP(DownLink/Tx) -{ 0x5e4322, 0xa44f, 0x5e4322, 0x5ea32b, 0x5ea422, 0x5ea322, 0x3ea430, 0x5ea42b, 0x5ea44f, 0x5e4322, 0x5e4322}; - - -static u4Byte edca_setting_DL[HT_IOT_PEER_MAX] = -// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU, MARVELL 92U_AP SELF_AP(UpLink/Rx) -{ 0xa44f, 0x5ea44f, 0x5e4322, 0x5ea42b, 0xa44f, 0xa630, 0x5ea630, 0x5ea42b, 0xa44f, 0xa42b, 0xa42b}; - -static u4Byte edca_setting_DL_GMode[HT_IOT_PEER_MAX] = -// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU, MARVELL 92U_AP SELF_AP -{ 0x4322, 0xa44f, 0x5e4322, 0xa42b, 0x5e4322, 0x4322, 0xa42b, 0x5ea42b, 0xa44f, 0x5e4322, 0x5ea42b}; - - -//============================================================ -// EDCA Paramter for AP/ADSL by Mingzhi 2011-11-22 -//============================================================ -#elif (DM_ODM_SUPPORT_TYPE &ODM_ADSL) -enum qos_prio { BK, BE, VI, VO, VI_AG, VO_AG }; - -static const struct ParaRecord rtl_ap_EDCA[] = -{ -//ACM,AIFSN, ECWmin, ECWmax, TXOplimit - {0, 7, 4, 10, 0}, //BK - {0, 3, 4, 6, 0}, //BE - {0, 1, 3, 4, 188}, //VI - {0, 1, 2, 3, 102}, //VO - {0, 1, 3, 4, 94}, //VI_AG - {0, 1, 2, 3, 47}, //VO_AG -}; - -static const struct ParaRecord rtl_sta_EDCA[] = -{ -//ACM,AIFSN, ECWmin, ECWmax, TXOplimit - {0, 7, 4, 10, 0}, - {0, 3, 4, 10, 0}, - {0, 2, 3, 4, 188}, - {0, 2, 2, 3, 102}, - {0, 2, 3, 4, 94}, - {0, 2, 2, 3, 47}, -}; -#endif - //============================================================ // Global var //============================================================ @@ -440,58 +396,13 @@ odm_BasicDbgMessage //END------------COMMON INFO RELATED---------------// //START---------------DIG---------------------------// -VOID -odm_FalseAlarmCounterStatistics( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_DIGInit( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_DIG( - IN PDM_ODM_T pDM_Odm - ); - -BOOLEAN -odm_DigAbort( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_CCKPacketDetectionThresh( - IN PDM_ODM_T pDM_Odm - ); -VOID -odm_AdaptivityInit( - IN PDM_ODM_T pDM_Odm -); +//Remove by Yuchen -VOID -odm_Adaptivity( - IN PDM_ODM_T pDM_Odm, - IN u1Byte IGI -); //END---------------DIG---------------------------// //START-------BB POWER SAVE-----------------------// -VOID -odm_DynamicBBPowerSavingInit( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_DynamicBBPowerSaving( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_1R_CCA( - IN PDM_ODM_T pDM_Odm - ); +//Remove BB power Saving by YuChen //END---------BB POWER SAVE-----------------------// //START-----------------PSD-----------------------// @@ -499,36 +410,8 @@ odm_1R_CCA( //============================================================ // Function predefine. //============================================================ -VOID odm_PathDiversityInit_92C( IN PADAPTER Adapter); -VOID odm_2TPathDiversityInit_92C( IN PADAPTER Adapter); -VOID odm_1TPathDiversityInit_92C( IN PADAPTER Adapter); -BOOLEAN odm_IsConnected_92C(IN PADAPTER Adapter); -VOID odm_PathDiversityAfterLink_92C( IN PADAPTER Adapter); - -VOID -odm_CCKTXPathDiversityCallback( - PRT_TIMER pTimer - ); - -VOID -odm_CCKTXPathDiversityWorkItemCallback( - IN PVOID pContext - ); - -VOID -odm_PathDivChkAntSwitchCallback( - PRT_TIMER pTimer - ); - -VOID -odm_PathDivChkAntSwitchWorkitemCallback( - IN PVOID pContext - ); -VOID odm_SetRespPath_92C( IN PADAPTER Adapter, IN u1Byte DefaultRespPath); -VOID odm_OFDMTXPathDiversity_92C( IN PADAPTER Adapter); -VOID odm_CCKTXPathDiversity_92C( IN PADAPTER Adapter); -VOID odm_ResetPathDiversity_92C( IN PADAPTER Adapter); +//Remove PathDiversity related funtion predefine to odm_PathDiv.h //Start-------------------- RX High Power------------------------// VOID odm_RXHPInit( IN PDM_ODM_T pDM_Odm); @@ -540,131 +423,15 @@ VOID odm_PSD_RXHPCallback( PRT_TIMER pTimer); VOID odm_PSD_RXHPWorkitemCallback( IN PVOID pContext); //End--------------------- RX High Power -----------------------// -VOID odm_PathDivInit_92D( IN PDM_ODM_T pDM_Odm); - -VOID -odm_SetRespPath_92C( - IN PADAPTER Adapter, - IN u1Byte DefaultRespPath - ); - -#endif -//END-------------------PSD-----------------------// - -VOID -odm_RefreshRateAdaptiveMaskMP( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_RefreshRateAdaptiveMaskCE( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_RefreshRateAdaptiveMaskAPADSL( - IN PDM_ODM_T pDM_Odm - ); - -VOID -ODM_DynamicATCSwitch_init( - IN PDM_ODM_T pDM_Odm - ); - -VOID -ODM_DynamicATCSwitch( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_Write_CrystalCap( - IN PDM_ODM_T pDM_Odm, - IN u1Byte CrystalCap -); - -VOID -odm_DynamicTxPowerInit( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_DynamicTxPowerRestorePowerIndex( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_DynamicTxPowerNIC( - IN PDM_ODM_T pDM_Odm - ); - -#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -VOID -odm_DynamicTxPowerSavePowerIndex( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_DynamicTxPowerWritePowerIndex( - IN PDM_ODM_T pDM_Odm, - IN u1Byte Value); - -VOID -odm_DynamicTxPower_92C( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_DynamicTxPower_92D( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_MPT_DIGCallback( - PRT_TIMER pTimer -); - -VOID -odm_MPT_DIGWorkItemCallback( - IN PVOID pContext - ); #endif +//END-------------------PSD-----------------------// -VOID -odm_RSSIMonitorInit( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_RSSIMonitorCheckMP( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_RSSIMonitorCheckCE( - IN PDM_ODM_T pDM_Odm - ); -VOID -odm_RSSIMonitorCheckAP( - IN PDM_ODM_T pDM_Odm - ); - - - -VOID -odm_RSSIMonitorCheck( - IN PDM_ODM_T pDM_Odm - ); -VOID -odm_DynamicTxPower( - IN PDM_ODM_T pDM_Odm - ); +//Remove RAMASK by RS_James -VOID -odm_DynamicTxPowerAP( - IN PDM_ODM_T pDM_Odm - ); +//Remove by YuChen +//Remove Rssimonitorcheck by RS_James VOID odm_SwAntDivInit( @@ -720,15 +487,7 @@ odm_GlobalAdapterCheck( IN VOID ); -VOID -odm_RefreshBasicRateMask( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_RefreshRateAdaptiveMask( - IN PDM_ODM_T pDM_Odm - ); +//Remove RAMask by RS_James VOID ODM_TXPowerTrackingCheck( @@ -741,16 +500,6 @@ odm_TXPowerTrackingCheckAP( ); - - - - - -VOID -odm_RateAdaptiveMaskInit( - IN PDM_ODM_T pDM_Odm - ); - VOID odm_TXPowerTrackingThermalMeterInit( IN PDM_ODM_T pDM_Odm @@ -780,12 +529,6 @@ odm_TXPowerTrackingCheckCE( #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -VOID -ODM_RateAdaptiveStateApInit( - IN PADAPTER Adapter , - IN PRT_WLAN_STA pEntry - ); - VOID odm_TXPowerTrackingCallbackThermalMeter92C( IN PADAPTER Adapter @@ -813,60 +556,7 @@ odm_TXPowerTrackingThermalMeterCheck( #endif -VOID -odm_EdcaTurboCheck( - IN PDM_ODM_T pDM_Odm - ); -VOID -ODM_EdcaTurboInit( - IN PDM_ODM_T pDM_Odm -); - -#if(DM_ODM_SUPPORT_TYPE==ODM_WIN) -VOID -odm_EdcaTurboCheckMP( - IN PDM_ODM_T pDM_Odm - ); - -//check if edca turbo is disabled -BOOLEAN -odm_IsEdcaTurboDisable( - IN PDM_ODM_T pDM_Odm -); -//choose edca paramter for special IOT case -VOID -ODM_EdcaParaSelByIot( - IN PDM_ODM_T pDM_Odm, - OUT u4Byte *EDCA_BE_UL, - OUT u4Byte *EDCA_BE_DL - ); -//check if it is UL or DL -VOID -odm_EdcaChooseTrafficIdx( - IN PDM_ODM_T pDM_Odm, - IN u8Byte cur_tx_bytes, - IN u8Byte cur_rx_bytes, - IN BOOLEAN bBiasOnRx, - OUT BOOLEAN *pbIsCurRDLState - ); - -#elif (DM_ODM_SUPPORT_TYPE==ODM_CE) -VOID -odm_EdcaTurboCheckCE( - IN PDM_ODM_T pDM_Odm - ); -#else -VOID -odm_IotEngine( - IN PDM_ODM_T pDM_Odm - ); - -VOID -odm_EdcaParaInit( - IN PDM_ODM_T pDM_Odm - ); -#endif - +//Remove Edca by Yu Chen #define RxDefaultAnt1 0x65a9 @@ -901,10 +591,6 @@ odm_HwAntDiv( IN PDM_ODM_T pDM_Odm ); -VOID odm_PathDiversityInit(IN PDM_ODM_T pDM_Odm); -VOID odm_PathDiversity( IN PDM_ODM_T pDM_Odm); - - //============================================================ //3 Export Interface @@ -919,88 +605,85 @@ ODM_DMInit( ) { - //2012.05.03 Luke: For all IC series odm_CommonInfoSelfInit(pDM_Odm); odm_CmnInfoInit_Debug(pDM_Odm); - odm_DIGInit(pDM_Odm); + odm_DIGInit(pDM_Odm); + odm_NHMCounterStatisticsInit(pDM_Odm); odm_AdaptivityInit(pDM_Odm); odm_RateAdaptiveMaskInit(pDM_Odm); + ODM_CfoTrackingInit(pDM_Odm); + ODM_EdcaTurboInit(pDM_Odm); odm_RSSIMonitorInit(pDM_Odm); - -#if (RTL8192E_SUPPORT == 1) - if(pDM_Odm->SupportICType==ODM_RTL8192E) - { - odm_PrimaryCCA_Check_Init(pDM_Odm); - } -#endif + odm_TXPowerTrackingInit(pDM_Odm); + +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) + ODM_ClearTxPowerTrackingState(pDM_Odm); -//#if (MP_DRIVER != 1) if ( *(pDM_Odm->mp_mode) != 1) - odm_PathDiversityInit(pDM_Odm); -//#endif - ODM_EdcaTurboInit(pDM_Odm); + odm_PathDiversityInit(pDM_Odm); - if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) +#endif + +#if (defined(CONFIG_HW_ANTENNA_DIVERSITY)) + if ( *(pDM_Odm->mp_mode) != 1){ + if(pDM_Odm->SupportICType==ODM_RTL8723A) + odm_SwAntDivInit(pDM_Odm); + else if(pDM_Odm->SupportICType & (ODM_RTL8192C|ODM_RTL8192D)) { - odm_TXPowerTrackingInit(pDM_Odm); -//#if (MP_DRIVER != 1) - if ( *(pDM_Odm->mp_mode) != 1) - ODM_AntDivInit(pDM_Odm); -//#endif + if(pDM_Odm->AntDivType == HW_ANTDIV) + odm_InitHybridAntDiv(pDM_Odm); + else + odm_SwAntDivInit(pDM_Odm); } - else if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) + else + ODM_AntDivInit(pDM_Odm); + } +#endif + + if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) { odm_DynamicBBPowerSavingInit(pDM_Odm); odm_DynamicTxPowerInit(pDM_Odm); - odm_TXPowerTrackingInit(pDM_Odm); - //ODM_EdcaTurboInit(pDM_Odm); -//#if (MP_DRIVER != 1) - if ( *(pDM_Odm->mp_mode) != 1) { - if(pDM_Odm->SupportICType==ODM_RTL8723A) - odm_SwAntDivInit(pDM_Odm); - else if(pDM_Odm->SupportICType & (ODM_RTL8192C|ODM_RTL8192D)) - { - if(pDM_Odm->AntDivType == HW_ANTDIV) - odm_InitHybridAntDiv(pDM_Odm); - else - odm_SwAntDivInit(pDM_Odm); - } - else - ODM_AntDivInit(pDM_Odm); - - if(pDM_Odm->SupportICType == ODM_RTL8723B) - odm_SwAntDetectInit(pDM_Odm); - } -//#endif -//2010.05.30 LukeLee: For CE platform, files in IC subfolders may not be included to be compiled, -// so compile flags must be left here to prevent from compile errors #if (RTL8188E_SUPPORT == 1) if(pDM_Odm->SupportICType==ODM_RTL8188E) { - odm_PrimaryCCA_Init(pDM_Odm); // Gary + odm_PrimaryCCA_Init(pDM_Odm); ODM_RAInfo_Init_all(pDM_Odm); - } -#endif + } +#endif -//2010.05.30 LukeLee: Following are not incorporated into ODM structure yet. -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - if(pDM_Odm->SupportICType&ODM_RTL8723A) - odm_PSDMonitorInit(pDM_Odm); - - if(!(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8188E))) - { - odm_RXHPInit(pDM_Odm); - } +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) + + #if (RTL8723B_SUPPORT == 1) + if(pDM_Odm->SupportICType == ODM_RTL8723B) + odm_SwAntDetectInit(pDM_Odm); + #endif + + #if (RTL8192E_SUPPORT == 1) + if(pDM_Odm->SupportICType==ODM_RTL8192E) + odm_PrimaryCCA_Check_Init(pDM_Odm); + #endif + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + #if (RTL8723A_SUPPORT == 1) + if(pDM_Odm->SupportICType == ODM_RTL8723A) + odm_PSDMonitorInit(pDM_Odm); + #endif + + #if (RTL8192D_SUPPORT == 1) if(pDM_Odm->SupportICType==ODM_RTL8192D) - { - odm_PathDivInit_92D(pDM_Odm); //92D Path Div Init //Neil Chen - } + odm_PathDivInit_92D(pDM_Odm); + #endif + + #if ((RTL8192C_SUPPORT == 1) || (RTL8192D_SUPPORT == 1)) + if(pDM_Odm->SupportICType & (ODM_RTL8192C|ODM_RTL8192D)) + odm_RXHPInit(pDM_Odm); + #endif +#endif #endif - } - ODM_DynamicATCSwitch_init(pDM_Odm); - ODM_ClearTxPowerTrackingState(pDM_Odm); + } } @@ -1026,6 +709,7 @@ ODM_DMWatchdog( odm_CommonInfoSelfUpdate(pDM_Odm); odm_BasicDbgMessage(pDM_Odm); odm_FalseAlarmCounterStatistics(pDM_Odm); + odm_NHMCounterStatistics(pDM_Odm); ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): RSSI=0x%x\n",pDM_Odm->RSSI_Min)); odm_RSSIMonitorCheck(pDM_Odm); @@ -1069,7 +753,7 @@ ODM_DMWatchdog( odm_DynamicBBPowerSaving(pDM_Odm); odm_EdcaTurboCheck(pDM_Odm); odm_PathDiversity(pDM_Odm); - ODM_DynamicATCSwitch(pDM_Odm); + ODM_CfoTracking(pDM_Odm); odm_DynamicTxPower(pDM_Odm); #if (RTL8192E_SUPPORT == 1) @@ -1243,10 +927,15 @@ ODM_CmnInfoInit( case ODM_CMNINFO_BWIFI_TEST: pDM_Odm->bWIFITest = (BOOLEAN)Value; break; - case ODM_CMNINFO_SMART_CONCURRENT: pDM_Odm->bDualMacSmartConcurrent = (BOOLEAN )Value; break; + case ODM_CMNINFO_DOMAIN_CODE_2G: + pDM_Odm->odm_Regulation2_4G = (u1Byte)Value; + break; + case ODM_CMNINFO_DOMAIN_CODE_5G: + pDM_Odm->odm_Regulation5G = (u1Byte)Value; + break; //To remove the compiler warning, must add an empty default statement to handle the other values. default: @@ -1483,8 +1172,8 @@ ODM_CmnInfoUpdate( pDM_Odm->RateAdaptive.LowRSSIThresh = (u1Byte)Value; break; // The following is for BT HS mode and BT coexist mechanism. - case ODM_CMNINFO_BT_DISABLED: - pDM_Odm->bBtDisabled = (BOOLEAN)Value; + case ODM_CMNINFO_BT_ENABLED: + pDM_Odm->bBtEnabled = (BOOLEAN)Value; break; case ODM_CMNINFO_BT_HS_CONNECT_PROCESS: @@ -1967,11440 +1656,4097 @@ odm_IsLinked( * When Who Remark * *---------------------------------------------------------------------------*/ -VOID -ODM_ChangeDynamicInitGainThresh( - IN PDM_ODM_T pDM_Odm, - IN u4Byte DM_Type, - IN u4Byte DM_Value - ) -{ - pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; - if (DM_Type == DIG_TYPE_THRESH_HIGH) - { - pDM_DigTable->RssiHighThresh = DM_Value; - } - else if (DM_Type == DIG_TYPE_THRESH_LOW) - { - pDM_DigTable->RssiLowThresh = DM_Value; - } - else if (DM_Type == DIG_TYPE_ENABLE) - { - pDM_DigTable->Dig_Enable_Flag = TRUE; - } - else if (DM_Type == DIG_TYPE_DISABLE) - { - pDM_DigTable->Dig_Enable_Flag = FALSE; - } - else if (DM_Type == DIG_TYPE_BACKOFF) - { - if(DM_Value > 30) - DM_Value = 30; - pDM_DigTable->BackoffVal = (u1Byte)DM_Value; - } - else if(DM_Type == DIG_TYPE_RX_GAIN_MIN) - { - if(DM_Value == 0) - DM_Value = 0x1; - pDM_DigTable->rx_gain_range_min = (u1Byte)DM_Value; - } - else if(DM_Type == DIG_TYPE_RX_GAIN_MAX) - { - if(DM_Value > 0x50) - DM_Value = 0x50; - pDM_DigTable->rx_gain_range_max = (u1Byte)DM_Value; - } -} /* DM_ChangeDynamicInitGainThresh */ - -int getIGIForDiff(int value_IGI) -{ - #define ONERCCA_LOW_TH 0x30 - #define ONERCCA_LOW_DIFF 8 +//Remove DIG by yuchen - if (value_IGI < ONERCCA_LOW_TH) { - if ((ONERCCA_LOW_TH - value_IGI) < ONERCCA_LOW_DIFF) - return ONERCCA_LOW_TH; - else - return value_IGI + ONERCCA_LOW_DIFF; - } else { - return value_IGI; - } -} +//Remove DIG and FA check by Yu Chen -VOID -odm_AdaptivityInit( -IN PDM_ODM_T pDM_Odm -) -{ - if(pDM_Odm->SupportICType == ODM_RTL8723B) - { - pDM_Odm->TH_L2H_ini = 0xf8; // -8 - } - if((pDM_Odm->SupportICType == ODM_RTL8192E)&&(pDM_Odm->SupportInterface == ODM_ITRF_PCIE)) - { - pDM_Odm->TH_L2H_ini = 0xf0; // -16 - } - else - { - pDM_Odm->TH_L2H_ini = 0xf9; // -7 - } - - pDM_Odm->TH_EDCCA_HL_diff = 7; - pDM_Odm->IGI_Base = 0x32; - pDM_Odm->IGI_target = 0x1c; - pDM_Odm->ForceEDCCA = 0; - pDM_Odm->AdapEn_RSSI = 20; +//3============================================================ +//3 BB Power Save +//3============================================================ - //Reg524[11]=0 is easily to transmit packets during adaptivity test +//Remove BB power saving by Yuchen - //ODM_SetBBReg(pDM_Odm, 0x524, BIT11, 1);// stop counting if EDCCA is asserted -} +//3============================================================ +//3 RATR MASK +//3============================================================ +//3============================================================ +//3 Rate Adaptive +//3============================================================ -// Add by Neil Chen to enable edcca to MP Platform -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +//Remove RAMask by RS_James -VOID -odm_EnableEDCCA( - IN PDM_ODM_T pDM_Odm -) -{ +//3============================================================ +//3 Dynamic Tx Power +//3============================================================ - // This should be moved out of OUTSRC - PADAPTER pAdapter = pDM_Odm->Adapter; - // Enable EDCCA. The value is suggested by SD3 Wilson. +//Remove BY YuChen - // - // Revised for ASUS 11b/g performance issues, suggested by BB Neil, 2012.04.13. - // - if((pDM_Odm->SupportICType == ODM_RTL8723A)&&(IS_WIRELESS_MODE_G(pAdapter))) - { - //PlatformEFIOWrite1Byte(Adapter, rOFDM0_ECCAThreshold, 0x00); - ODM_Write1Byte(pDM_Odm,rOFDM0_ECCAThreshold,0x00); - ODM_Write1Byte(pDM_Odm,rOFDM0_ECCAThreshold+2,0xFD); - - } - else - { - //PlatformEFIOWrite1Byte(Adapter, rOFDM0_ECCAThreshold, 0x03); - ODM_Write1Byte(pDM_Odm,rOFDM0_ECCAThreshold,0x03); - ODM_Write1Byte(pDM_Odm,rOFDM0_ECCAThreshold+2,0x00); - } - - //PlatformEFIOWrite1Byte(Adapter, rOFDM0_ECCAThreshold+2, 0x00); -} +//Remove Rssimonitorcheck related function to odm_rssimonitorcheck.c -VOID -odm_DisableEDCCA( - IN PDM_ODM_T pDM_Odm -) -{ - // Disable EDCCA.. - ODM_Write1Byte(pDM_Odm, rOFDM0_ECCAThreshold, 0x7f); - ODM_Write1Byte(pDM_Odm, rOFDM0_ECCAThreshold+2, 0x7f); -} -// -// Description: According to initial gain value to determine to enable or disable EDCCA. -// -// Suggested by SD3 Wilson. Added by tynli. 2011.11.25. -// VOID -odm_DynamicEDCCA( - IN PDM_ODM_T pDM_Odm -) +ODM_InitAllTimers( + IN PDM_ODM_T pDM_Odm + ) { - PADAPTER pAdapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - u1Byte RegC50, RegC58; - BOOLEAN bFwCurrentInPSMode=FALSE; - - pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_FW_PSMODE_STATUS, (pu1Byte)(&bFwCurrentInPSMode)); +#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) +#if (RTL8723B_SUPPORT == 1)||(RTL8821A_SUPPORT == 1) + ODM_InitializeTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer_8723B, + (RT_TIMER_CALL_BACK)ODM_SW_AntDiv_Callback, NULL, "SwAntennaSwitchTimer_8723B"); +#endif +#endif - // Disable EDCCA mode while under LPS mode, added by Roger, 2012.09.14. - if(bFwCurrentInPSMode) - return; +#if(defined(CONFIG_SW_ANTENNA_DIVERSITY)) + ODM_InitializeTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer, + (RT_TIMER_CALL_BACK)odm_SwAntDivChkAntSwitchCallback, NULL, "SwAntennaSwitchTimer"); +#endif - RegC50 = (u1Byte)ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0); - RegC58 = (u1Byte)ODM_GetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0); +#if (!(DM_ODM_SUPPORT_TYPE == ODM_CE)) +#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) +#if (RTL8188E_SUPPORT == 1) + ODM_InitializeTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer, + (RT_TIMER_CALL_BACK)odm_FastAntTrainingCallback, NULL, "FastAntTrainingTimer"); +#endif +#endif +#endif +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PSDTimer, + (RT_TIMER_CALL_BACK)dm_PSDMonitorCallback, NULL, "PSDTimer"); + // + //Path Diversity + //Neil Chen--2011--06--16-- / 2012/02/23 MH Revise Arch. + // + ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer, + (RT_TIMER_CALL_BACK)odm_PathDivChkAntSwitchCallback, NULL, "PathDivTimer"); - if((RegC50 > 0x28 && RegC58 > 0x28) || - ((pDM_Odm->SupportICType == ODM_RTL8723A && IS_WIRELESS_MODE_G(pAdapter) && RegC50>0x26)) || - (pDM_Odm->SupportICType == ODM_RTL8188E && RegC50 > 0x28)) - { - if(!pHalData->bPreEdccaEnable) - { - odm_EnableEDCCA(pDM_Odm); - pHalData->bPreEdccaEnable = TRUE; - } - - } - else if((RegC50 < 0x25 && RegC58 < 0x25) || (pDM_Odm->SupportICType == ODM_RTL8188E && RegC50 < 0x25)) - { - if(pHalData->bPreEdccaEnable) - { - odm_DisableEDCCA(pDM_Odm); - pHalData->bPreEdccaEnable = FALSE; - } - } -} + ODM_InitializeTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer, + (RT_TIMER_CALL_BACK)odm_CCKTXPathDiversityCallback, NULL, "CCKPathDiversityTimer"); + ODM_InitializeTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer, + (RT_TIMER_CALL_BACK)odm_MPT_DIGCallback, NULL, "MPT_DIGTimer"); -#endif // end MP platform support + ODM_InitializeTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer, + (RT_TIMER_CALL_BACK)odm_PSD_RXHPCallback, NULL, "PSDRXHPTimer"); +#endif +} VOID -odm_Adaptivity( - IN PDM_ODM_T pDM_Odm, - IN u1Byte IGI -) +ODM_CancelAllTimers( + IN PDM_ODM_T pDM_Odm + ) { - s1Byte TH_L2H_dmc, TH_H2L_dmc; - s1Byte Diff, IGI_target; - BOOLEAN EDCCA_State = 0; - #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - PADAPTER pAdapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - BOOLEAN bFwCurrentInPSMode=FALSE; - PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); - - pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_FW_PSMODE_STATUS, (pu1Byte)(&bFwCurrentInPSMode)); - - // Disable EDCCA mode while under LPS mode, added by Roger, 2012.09.14. - if(bFwCurrentInPSMode) - return; + // + // 2012/01/12 MH Temp BSOD fix. We need to find NIC allocate mem fail reason in + // win7 platform. + // + HAL_ADAPTER_STS_CHK(pDM_Odm) +#endif +#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) +#if (RTL8723B_SUPPORT == 1)||(RTL8821A_SUPPORT == 1) + ODM_CancelTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer_8723B); #endif - - if(!(pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY)) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("Go to odm_DynamicEDCCA() \n")); - // Add by Neil Chen to enable edcca to MP Platform -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - // Adjust EDCCA. - if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) - odm_DynamicEDCCA(pDM_Odm); #endif - return; - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_Adaptivity() =====> \n")); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("ForceEDCCA=%d, IGI_Base=0x%x, TH_L2H_ini = %d, TH_EDCCA_HL_diff = %d, AdapEn_RSSI = %d\n", - pDM_Odm->ForceEDCCA, pDM_Odm->IGI_Base, pDM_Odm->TH_L2H_ini, pDM_Odm->TH_EDCCA_HL_diff, pDM_Odm->AdapEn_RSSI)); +#if(defined(CONFIG_SW_ANTENNA_DIVERSITY)) + ODM_CancelTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer); +#endif - if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) - ODM_SetBBReg(pDM_Odm, 0x800, BIT10, 0); //ADC_mask enable - - if((!pDM_Odm->bLinked)||(*pDM_Odm->pChannel > 149)) // Band4 doesn't need adaptivity - { - if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) - { - ODM_SetBBReg(pDM_Odm,rOFDM0_ECCAThreshold, bMaskByte0, 0x7f); - ODM_SetBBReg(pDM_Odm,rOFDM0_ECCAThreshold, bMaskByte2, 0x7f); - } - else - ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIReadBack, 0xFFFF, (0x7f<<8) | 0x7f); - return; - } +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -#if (DM_ODM_SUPPORT_TYPE==ODM_WIN) - if(pMgntInfo->IOTPeer == HT_IOT_PEER_BROADCOM) - ODM_Write1Byte(pDM_Odm, REG_TRX_SIFS_OFDM, 0x0a); - else - ODM_Write1Byte(pDM_Odm, REG_TRX_SIFS_OFDM, 0x0e); +#if (RTL8188E_SUPPORT == 1) + ODM_CancelTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer); #endif - if(!pDM_Odm->ForceEDCCA) - { - if(pDM_Odm->RSSI_Min > pDM_Odm->AdapEn_RSSI) - EDCCA_State = 1; - else if(pDM_Odm->RSSI_Min < (pDM_Odm->AdapEn_RSSI - 5)) - EDCCA_State = 0; - } - else - EDCCA_State = 1; - //if((pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) && (*pDM_Odm->pBandType == BAND_ON_5G)) - //IGI_target = pDM_Odm->IGI_Base; - //else - { - - if(*pDM_Odm->pBandWidth == ODM_BW20M) //CHANNEL_WIDTH_20 - IGI_target = pDM_Odm->IGI_Base; - else if(*pDM_Odm->pBandWidth == ODM_BW40M) - IGI_target = pDM_Odm->IGI_Base + 2; - else if(*pDM_Odm->pBandWidth == ODM_BW80M) - IGI_target = pDM_Odm->IGI_Base + 6; - else - IGI_target = pDM_Odm->IGI_Base; - } - - pDM_Odm->IGI_target = (u1Byte) IGI_target; + ODM_CancelTimer(pDM_Odm, &pDM_Odm->PSDTimer); + // + //Path Diversity + //Neil Chen--2011--06--16-- / 2012/02/23 MH Revise Arch. + // + ODM_CancelTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("BandWidth=%s, IGI_target=0x%x, EDCCA_State=%d\n", - (*pDM_Odm->pBandWidth==ODM_BW80M)?"80M":((*pDM_Odm->pBandWidth==ODM_BW40M)?"40M":"20M"), IGI_target, EDCCA_State)); + ODM_CancelTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer); - if(EDCCA_State == 1) - { - Diff = IGI_target -(s1Byte)IGI; - TH_L2H_dmc = pDM_Odm->TH_L2H_ini + Diff; - if(TH_L2H_dmc > 10) TH_L2H_dmc = 10; - TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff; - } - else - { - TH_L2H_dmc = 0x7f; - TH_H2L_dmc = 0x7f; - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("IGI=0x%x, TH_L2H_dmc = %d, TH_H2L_dmc = %d\n", - IGI, TH_L2H_dmc, TH_H2L_dmc)); + ODM_CancelTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer); - if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) - { - ODM_SetBBReg(pDM_Odm,rOFDM0_ECCAThreshold, bMaskByte0, (u1Byte)TH_L2H_dmc); - ODM_SetBBReg(pDM_Odm,rOFDM0_ECCAThreshold, bMaskByte2, (u1Byte)TH_H2L_dmc); - } - else - ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIReadBack, 0xFFFF, ((u1Byte)TH_H2L_dmc<<8) | (u1Byte)TH_L2H_dmc); + ODM_CancelTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer); +#endif } + VOID -ODM_DynamicATCSwitch_init( - IN PDM_ODM_T pDM_Odm -) +ODM_ReleaseAllTimers( + IN PDM_ODM_T pDM_Odm + ) { - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN ) - - pDM_Odm->CrystalCap = pHalData->CrystalCap; - pDM_Odm->bATCStatus = (u1Byte)ODM_GetBBReg(pDM_Odm, rOFDM1_CFOTracking, BIT11); - pDM_Odm->CFOThreshold = CFO_Threshold_Xtal; +#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) +#if (RTL8723B_SUPPORT == 1)||(RTL8821A_SUPPORT == 1) + ODM_ReleaseTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer_8723B); +#endif +#endif +#if(defined(CONFIG_SW_ANTENNA_DIVERSITY)) + ODM_ReleaseTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer); #endif -} -VOID -ODM_DynamicATCSwitch( - IN PDM_ODM_T pDM_Odm -) -{ - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u1Byte CrystalCap,ATC_status_temp = 0; - u4Byte packet_count; - int CFO_kHz_A,CFO_kHz_B,CFO_ave = 0, Adjust_Xtal = 0; - int CFO_ave_diff; +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -#if (MP_DRIVER == 1) - if ( *(pDM_Odm->mp_mode) == 1) - pDM_Odm->bLinked = TRUE; -#endif +#if (RTL8188E_SUPPORT == 1) + ODM_ReleaseTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer); +#endif -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN ) + ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PSDTimer); + // + //Path Diversity + //Neil Chen--2011--06--16-- / 2012/02/23 MH Revise Arch. + // + ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer); - if(!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_ATC)) - return; + ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_ATC, ODM_DBG_LOUD, ("=========> ODM_DynamicATCSwitch()\n")); + ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer); + + ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer); +#endif +} - //2 No link! - // - if(!pDM_Odm->bLinked) - { - //3 - //3 1.Enable ATC - if(pDM_Odm->bATCStatus == ATC_Status_Off) - { - if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) - ODM_SetBBReg(pDM_Odm, rOFDM1_CFOTracking, BIT11, ATC_Status_On); - - if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) - ODM_SetBBReg(pDM_Odm, rFc_area_Jaguar, BIT14, ATC_Status_On); - - pDM_Odm->bATCStatus = ATC_Status_On; - } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_ATC, ODM_DBG_LOUD, ("ODM_DynamicATCSwitch(): No link!!\n")); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_ATC, ODM_DBG_LOUD, ("ODM_DynamicATCSwitch(): ATCStatus = %d\n", pDM_Odm->bATCStatus)); +//3============================================================ +//3 Tx Power Tracking +//3============================================================ - //3 2.Disable CFO tracking for BT - if(!pDM_Odm->bBtDisabled) +VOID +odm_IQCalibrate( + IN PDM_ODM_T pDM_Odm + ) +{ + PADAPTER Adapter = pDM_Odm->Adapter; + + if(!IS_HARDWARE_TYPE_JAGUAR(Adapter)) + return; + else if(IS_HARDWARE_TYPE_8812AU(Adapter)) + return; +#if (RTL8821A_SUPPORT == 1) + if(pDM_Odm->bLinked) + { + if((*pDM_Odm->pChannel != pDM_Odm->preChannel) && (!*pDM_Odm->pbScanInProcess)) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_ATC, ODM_DBG_LOUD, ("ODM_DynamicATCSwitch(): Disable CFO tracking for BT!!\n")); - return; + pDM_Odm->preChannel = *pDM_Odm->pChannel; + pDM_Odm->LinkedInterval = 0; } - //3 3.Reset Crystal Cap. - if(pDM_Odm->CrystalCap != pHalData->CrystalCap) + if(pDM_Odm->LinkedInterval < 3) + pDM_Odm->LinkedInterval++; + + if(pDM_Odm->LinkedInterval == 2) { - pDM_Odm->CrystalCap = pHalData->CrystalCap; - CrystalCap = pDM_Odm->CrystalCap & 0x3f; - odm_Write_CrystalCap(pDM_Odm,CrystalCap); + // Mark out IQK flow to prevent tx stuck. by Maddest 20130306 + // Open it verified by James 20130715 + PHY_IQCalibrate_8821A(Adapter, FALSE); } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_ATC, ODM_DBG_LOUD, ("ODM_DynamicATCSwitch(): CrystalCap = 0x%x\n", pDM_Odm->CrystalCap)); - } else - { + pDM_Odm->LinkedInterval = 0; +#endif +} - //2 Initialization - // - //3 1. Calculate CFO for path-A & path-B - CFO_kHz_A = (int)(pDM_Odm->CFO_tail[0] * 3125) / 1280; - CFO_kHz_B = (int)(pDM_Odm->CFO_tail[1] * 3125) / 1280; - packet_count = pDM_Odm->packetCount; - - //3 2.No new packet - if(packet_count == pDM_Odm->packetCount_pre) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_ATC, ODM_DBG_LOUD, ("ODM_DynamicATCSwitch(): packet counter doesn't change\n")); - return; - } - pDM_Odm->packetCount_pre = packet_count; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_ATC, ODM_DBG_LOUD, ("ODM_DynamicATCSwitch(): packet counter = %d\n", pDM_Odm->packetCount)); - - //3 3.Average CFO - if(pDM_Odm->RFType == ODM_1T1R) - CFO_ave = CFO_kHz_A; - else - CFO_ave = (int)(CFO_kHz_A + CFO_kHz_B) >> 1; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_ATC, ODM_DBG_LOUD, ("ODM_DynamicATCSwitch(): CFO_kHz_A = %dkHz, CFO_kHz_B = %dkHz, CFO_ave = %dkHz\n", - CFO_kHz_A, CFO_kHz_B, CFO_ave)); +VOID +odm_TXPowerTrackingInit( + IN PDM_ODM_T pDM_Odm + ) +{ +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + if(!(pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_IC_11N_SERIES))) + return; +#endif - //3 4.Avoid abnormal large CFO - CFO_ave_diff = (pDM_Odm->CFO_ave_pre >= CFO_ave)?(pDM_Odm->CFO_ave_pre - CFO_ave):(CFO_ave - pDM_Odm->CFO_ave_pre); - if(CFO_ave_diff > 20 && pDM_Odm->largeCFOHit == 0) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_ATC, ODM_DBG_LOUD, ("ODM_DynamicATCSwitch(): first large CFO hit\n")); - pDM_Odm->largeCFOHit = 1; - return; - } - else - pDM_Odm->largeCFOHit = 0; - pDM_Odm->CFO_ave_pre = CFO_ave; + odm_TXPowerTrackingThermalMeterInit(pDM_Odm); +} - //2 CFO tracking by adjusting Xtal cap. - // - if (pDM_Odm->bBtDisabled) - { - //3 1.Dynamic Xtal threshold - if(CFO_ave >= -pDM_Odm->CFOThreshold && CFO_ave <= pDM_Odm->CFOThreshold && pDM_Odm->bIsfreeze == 0) - { - if (pDM_Odm->CFOThreshold == CFO_Threshold_Xtal) - { - pDM_Odm->CFOThreshold = CFO_Threshold_Xtal + 10; - pDM_Odm->bIsfreeze = 1; - } - else - pDM_Odm->CFOThreshold = CFO_Threshold_Xtal; - } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_ATC, ODM_DBG_LOUD, ("ODM_DynamicATCSwitch(): Dynamic threshold = %d\n", pDM_Odm->CFOThreshold)); - - //3 2.Calculate Xtal offset - if(CFO_ave > pDM_Odm->CFOThreshold && pDM_Odm->CrystalCap < 0x3f) - Adjust_Xtal = ((CFO_ave - CFO_Threshold_Xtal) >> 2) + 1; - else if(CFO_ave < (-pDM_Odm->CFOThreshold) && pDM_Odm->CrystalCap > 0) - Adjust_Xtal = ((CFO_ave + CFO_Threshold_Xtal) >> 2) - 1; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_ATC, ODM_DBG_LOUD, ("ODM_DynamicATCSwitch(): Crystal cap = 0x%x, Crystal cap offset = %d\n", pDM_Odm->CrystalCap, Adjust_Xtal)); - - //3 3.Adjudt Crystal Cap. - if(Adjust_Xtal != 0) - { - pDM_Odm->bIsfreeze = 0; - pDM_Odm->CrystalCap = pDM_Odm->CrystalCap + Adjust_Xtal; +u1Byte +getSwingIndex( + IN PDM_ODM_T pDM_Odm + ) +{ + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u1Byte i = 0; + u4Byte bbSwing; + u4Byte swingTableSize; + pu4Byte pSwingTable; - if(pDM_Odm->CrystalCap > 0x3f) - pDM_Odm->CrystalCap = 0x3f; - else if (pDM_Odm->CrystalCap < 0) - pDM_Odm->CrystalCap = 0; + if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8723B || + pDM_Odm->SupportICType == ODM_RTL8192E) + { + bbSwing = PHY_QueryBBReg(Adapter, rOFDM0_XATxIQImbalance, 0xFFC00000); - CrystalCap = pDM_Odm->CrystalCap & 0x3f; - odm_Write_CrystalCap(pDM_Odm,CrystalCap); - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_ATC, ODM_DBG_LOUD, ("ODM_DynamicATCSwitch(): New crystal cap = 0x%x \n", pDM_Odm->CrystalCap)); - } - } - else if(pDM_Odm->CrystalCap != pHalData->CrystalCap) + pSwingTable = OFDMSwingTable_New; + swingTableSize = OFDM_TABLE_SIZE; + } else { +#if ((RTL8812A_SUPPORT==1)||(RTL8821A_SUPPORT==1)) + if (pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8821) { - //3 Reset Xtal Cap when BT is enable - pDM_Odm->CrystalCap = pHalData->CrystalCap; - CrystalCap = pDM_Odm->CrystalCap & 0x3f; - odm_Write_CrystalCap(pDM_Odm,CrystalCap); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_ATC, ODM_DBG_LOUD, ("ODM_DynamicATCSwitch(): Disable CFO tracking for BT!! (CrystalCap is reset)\n")); + bbSwing = PHY_GetTxBBSwing_8812A(Adapter, pHalData->CurrentBandType, ODM_RF_PATH_A); + pSwingTable = TxScalingTable_Jaguar; + swingTableSize = TXSCALE_TABLE_SIZE; } else - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_ATC, ODM_DBG_LOUD, ("ODM_DynamicATCSwitch(): Disable CFO tracking for BT!! (CrystalCap is unchanged)\n")); - if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES){ - //2 Dynamic ATC switch - // - //3 1.Enable ATC when CFO is larger then 80kHz - if(CFO_ave < CFO_Threshold_ATC && CFO_ave > -CFO_Threshold_ATC) - { - if(pDM_Odm->bATCStatus == ATC_Status_On) - { - ODM_SetBBReg(pDM_Odm, rOFDM1_CFOTracking, BIT11, ATC_Status_Off); - pDM_Odm->bATCStatus = ATC_Status_Off; - } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_ATC, ODM_DBG_LOUD, ("ODM_DynamicATCSwitch(): Disable ATC!!\n")); - } - else - { - if(pDM_Odm->bATCStatus == ATC_Status_Off) - { - ODM_SetBBReg(pDM_Odm, rOFDM1_CFOTracking, BIT11, ATC_Status_On); - pDM_Odm->bATCStatus = ATC_Status_On; - } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_ATC, ODM_DBG_LOUD, ("ODM_DynamicATCSwitch(): Enable ATC!!\n")); - } +#endif + { + bbSwing = 0; + pSwingTable = OFDMSwingTable; + swingTableSize = OFDM_TABLE_SIZE; } } -#endif + + for (i = 0; i < swingTableSize; ++i) { + u4Byte tableValue = pSwingTable[i]; + + if (tableValue >= 0x100000 ) + tableValue >>= 22; + if (bbSwing == tableValue) + break; + } + return i; } VOID -odm_Write_CrystalCap( - IN PDM_ODM_T pDM_Odm, - IN u1Byte CrystalCap -) +odm_TXPowerTrackingThermalMeterInit( + IN PDM_ODM_T pDM_Odm + ) { + u1Byte defaultSwingIndex = getSwingIndex(pDM_Odm); + u1Byte p = 0; +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) PADAPTER Adapter = pDM_Odm->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - if(IS_HARDWARE_TYPE_8192D(Adapter)) - { - PHY_SetBBReg(Adapter, 0x24, 0xF0, CrystalCap & 0x0F); - PHY_SetBBReg(Adapter, 0x28, 0xF0000000, ((CrystalCap & 0xF0) >> 4)); - } + #if MP_DRIVER != 1 //for mp driver, turn off txpwrtracking as default + pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = pHalData->TxPowerTrackControl = TRUE; + #endif +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + - if(IS_HARDWARE_TYPE_8188E(Adapter)) + if (pDM_Odm->SupportICType >= ODM_RTL8188E) { - // write 0x24[16:11] = 0x24[22:17] = CrystalCap - PHY_SetBBReg(Adapter, REG_AFE_XTAL_CTRL, 0x7ff800, (CrystalCap | (CrystalCap << 6))); + pDM_Odm->RFCalibrateInfo.bTXPowerTracking = _TRUE; + pDM_Odm->RFCalibrateInfo.TXPowercount = 0; + pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = _FALSE; + + if ( *(pDM_Odm->mp_mode) != 1) + pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _TRUE; + else + pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _FALSE; + + MSG_8192C("pDM_Odm TxPowerTrackControl = %d\n", pDM_Odm->RFCalibrateInfo.TxPowerTrackControl); } - - if(IS_HARDWARE_TYPE_8812(Adapter)) - { - // write 0x2C[30:25] = 0x2C[24:19] = CrystalCap - CrystalCap = CrystalCap & 0x3F; - PHY_SetBBReg(Adapter, REG_MAC_PHY_CTRL, 0x7FF80000, (CrystalCap | (CrystalCap << 6))); - } - - //only for B-cut - if ((IS_HARDWARE_TYPE_8723A(Adapter) && pHalData->EEPROMVersion >= 0x01) || - IS_HARDWARE_TYPE_8723B(Adapter) ||IS_HARDWARE_TYPE_8192E(Adapter) || IS_HARDWARE_TYPE_8821(Adapter)) + else { - // 0x2C[23:18] = 0x2C[17:12] = CrystalCap - CrystalCap = CrystalCap & 0x3F; - PHY_SetBBReg(Adapter, REG_MAC_PHY_CTRL, 0xFFF000, (CrystalCap | (CrystalCap << 6))); - } - - if(IS_HARDWARE_TYPE_8723AE(Adapter)) - PHY_SetBBReg(Adapter, REG_LDOA15_CTRL, bMaskDWord, 0x01572505); + struct dm_priv *pdmpriv = &pHalData->dmpriv; -} + pdmpriv->bTXPowerTracking = _TRUE; + pdmpriv->TXPowercount = 0; + pdmpriv->bTXPowerTrackingInit = _FALSE; + //#if (MP_DRIVER != 1) //for mp driver, turn off txpwrtracking as default + if (*(pDM_Odm->mp_mode) != 1) + pdmpriv->TxPowerTrackControl = _TRUE; + else + pdmpriv->TxPowerTrackControl = _FALSE; -VOID -ODM_Write_DIG( - IN PDM_ODM_T pDM_Odm, - IN u1Byte CurrentIGI - ) -{ - pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; - if(pDM_Odm->StopDIG) + //MSG_8192C("pdmpriv->TxPowerTrackControl = %d\n", pdmpriv->TxPowerTrackControl); + } + +#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + #ifdef RTL8188E_SUPPORT { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("Stop Writing IGI\n")); - return; + pDM_Odm->RFCalibrateInfo.bTXPowerTracking = _TRUE; + pDM_Odm->RFCalibrateInfo.TXPowercount = 0; + pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = _FALSE; + pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _TRUE; } + #endif +#endif - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("ODM_REG(IGI_A,pDM_Odm)=0x%x, ODM_BIT(IGI,pDM_Odm)=0x%x \n", - ODM_REG(IGI_A,pDM_Odm),ODM_BIT(IGI,pDM_Odm))); + //pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = TRUE; + pDM_Odm->RFCalibrateInfo.ThermalValue = pHalData->EEPROMThermalMeter; + pDM_Odm->RFCalibrateInfo.ThermalValue_IQK = pHalData->EEPROMThermalMeter; + pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = pHalData->EEPROMThermalMeter; - if(pDM_DigTable->CurIGValue != CurrentIGI)//if(pDM_DigTable->PreIGValue != CurrentIGI) + // The index of "0 dB" in SwingTable. + if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8723B || + pDM_Odm->SupportICType == ODM_RTL8192E) { - if(pDM_Odm->SupportPlatform & (ODM_CE|ODM_WIN)) - { - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); - if(pDM_Odm->RFType != ODM_1T1R) - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); - } - else if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) - { - switch(*(pDM_Odm->pOnePathCCA)) - { - case ODM_CCA_2R: - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); - if(pDM_Odm->RFType != ODM_1T1R) - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); - break; - case ODM_CCA_1R_A: - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); - if(pDM_Odm->RFType != ODM_1T1R) - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), getIGIForDiff(CurrentIGI)); - break; - case ODM_CCA_1R_B: - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), getIGIForDiff(CurrentIGI)); - if(pDM_Odm->RFType != ODM_1T1R) - ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); - break; - } - } - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("CurrentIGI(0x%02x). \n",CurrentIGI)); - //pDM_DigTable->PreIGValue = pDM_DigTable->CurIGValue; - pDM_DigTable->CurIGValue = CurrentIGI; - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("ODM_Write_DIG():CurrentIGI=0x%x \n",CurrentIGI)); + pDM_Odm->DefaultOfdmIndex = (defaultSwingIndex >= OFDM_TABLE_SIZE) ? 30 : defaultSwingIndex; + pDM_Odm->DefaultCckIndex = 20; + } + else + { + pDM_Odm->DefaultOfdmIndex = (defaultSwingIndex >= TXSCALE_TABLE_SIZE) ? 24 : defaultSwingIndex; + pDM_Odm->DefaultCckIndex = 24; + } + + pDM_Odm->BbSwingIdxCckBase = pDM_Odm->DefaultCckIndex; + pDM_Odm->RFCalibrateInfo.CCK_index = pDM_Odm->DefaultCckIndex; + for (p = ODM_RF_PATH_A; p < MAX_RF_PATH; ++p) + { + pDM_Odm->BbSwingIdxOfdmBase[p] = pDM_Odm->DefaultOfdmIndex; + pDM_Odm->RFCalibrateInfo.OFDM_index[p] = pDM_Odm->DefaultOfdmIndex; + pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = 0; + pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[p] = 0; + pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p] = 0; + } + } + VOID -odm_DIGbyRSSI_LPS( +ODM_TXPowerTrackingCheck( IN PDM_ODM_T pDM_Odm ) { - //PADAPTER pAdapter =pDM_Odm->Adapter; - //pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; - PFALSE_ALARM_STATISTICS pFalseAlmCnt = &pDM_Odm->FalseAlmCnt; - -#if 0 //and 2.3.5 coding rule - struct mlme_priv *pmlmepriv = &(pAdapter->mlmepriv); - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; -#endif - - u1Byte RSSI_Lower=DM_DIG_MIN_NIC; //0x1E or 0x1C - u1Byte CurrentIGI=pDM_Odm->RSSI_Min; - - CurrentIGI=CurrentIGI+RSSI_OFFSET_DIG; - - - //ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG_LPS, ODM_DBG_LOUD, ("odm_DIG()==>\n")); - - // Using FW PS mode to make IGI - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("---Neil---odm_DIG is in LPS mode\n")); - //Adjust by FA in LPS MODE - if(pFalseAlmCnt->Cnt_all> DM_DIG_FA_TH2_LPS) - CurrentIGI = CurrentIGI+2; - else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1_LPS) - CurrentIGI = CurrentIGI+1; - else if(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0_LPS) - CurrentIGI = CurrentIGI-1; - - - //Lower bound checking + // + // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate + // at the same time. In the stage2/3, we need to prive universal interface and merge all + // HW dynamic mechanism. + // + switch (pDM_Odm->SupportPlatform) + { + case ODM_WIN: + odm_TXPowerTrackingCheckMP(pDM_Odm); + break; - //RSSI Lower bound check - if((pDM_Odm->RSSI_Min-10) > DM_DIG_MIN_NIC) - RSSI_Lower =(pDM_Odm->RSSI_Min-10); - else - RSSI_Lower =DM_DIG_MIN_NIC; + case ODM_CE: + odm_TXPowerTrackingCheckCE(pDM_Odm); + break; - //Upper and Lower Bound checking - if(CurrentIGI > DM_DIG_MAX_NIC) - CurrentIGI=DM_DIG_MAX_NIC; - else if(CurrentIGI < RSSI_Lower) - CurrentIGI =RSSI_Lower; + case ODM_AP: + odm_TXPowerTrackingCheckAP(pDM_Odm); + break; - ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); + case ODM_ADSL: + //odm_DIGAP(pDM_Odm); + break; + } } VOID -odm_DIGInit( - IN PDM_ODM_T pDM_Odm +odm_TXPowerTrackingCheckCE( + IN PDM_ODM_T pDM_Odm ) { - pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; - - //pDM_DigTable->Dig_Enable_Flag = TRUE; - //pDM_DigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX; - pDM_DigTable->CurIGValue = (u1Byte) ODM_GetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm)); - //pDM_DigTable->PreIGValue = 0x0; - //pDM_DigTable->CurSTAConnectState = pDM_DigTable->PreSTAConnectState = DIG_STA_DISCONNECT; - //pDM_DigTable->CurMultiSTAConnectState = DIG_MultiSTA_DISCONNECT; - pDM_DigTable->RssiLowThresh = DM_DIG_THRESH_LOW; - pDM_DigTable->RssiHighThresh = DM_DIG_THRESH_HIGH; - pDM_DigTable->FALowThresh = DM_FALSEALARM_THRESH_LOW; - pDM_DigTable->FAHighThresh = DM_FALSEALARM_THRESH_HIGH; - if(pDM_Odm->BoardType & (ODM_BOARD_EXT_PA|ODM_BOARD_EXT_LNA)) - { - pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; - pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PADAPTER Adapter = pDM_Odm->Adapter; + #if( (RTL8192C_SUPPORT==1) || (RTL8723A_SUPPORT==1) ) + if(IS_HARDWARE_TYPE_8192C(Adapter)){ + rtl8192c_odm_CheckTXPowerTracking(Adapter); + return; } - else - { - pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; - pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; - } - pDM_DigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; - pDM_DigTable->BackoffVal_range_max = DM_DIG_BACKOFF_MAX; - pDM_DigTable->BackoffVal_range_min = DM_DIG_BACKOFF_MIN; - pDM_DigTable->PreCCK_CCAThres = 0xFF; - pDM_DigTable->CurCCK_CCAThres = 0x83; - pDM_DigTable->ForbiddenIGI = DM_DIG_MIN_NIC; - pDM_DigTable->LargeFAHit = 0; - pDM_DigTable->Recover_cnt = 0; - pDM_DigTable->DIG_Dynamic_MIN_0 = DM_DIG_MIN_NIC; - pDM_DigTable->DIG_Dynamic_MIN_1 = DM_DIG_MIN_NIC; - pDM_DigTable->bMediaConnect_0 = FALSE; - pDM_DigTable->bMediaConnect_1 = FALSE; - - //To Initialize pDM_Odm->bDMInitialGainEnable == FALSE to avoid DIG error - pDM_Odm->bDMInitialGainEnable = TRUE; + #endif - //To Initi BT30 IGI - pDM_DigTable->BT30_CurIGI=0x32; + #if (RTL8192D_SUPPORT==1) + if(IS_HARDWARE_TYPE_8192D(Adapter)){ + #if (RTL8192D_EASY_SMART_CONCURRENT == 1) + if(!Adapter->bSlaveOfDMSP) + #endif + rtl8192d_odm_CheckTXPowerTracking(Adapter); + return; + } + #endif -} + #if(((RTL8188E_SUPPORT==1) || (RTL8812A_SUPPORT==1) || (RTL8821A_SUPPORT==1) || (RTL8192E_SUPPORT==1) || (RTL8723B_SUPPORT==1) )) + if(!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)) + { + return; + } -VOID -odm_DigForBtHsMode( - IN PDM_ODM_T pDM_Odm - ) -{ -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - pDIG_T pDM_DigTable=&pDM_Odm->DM_DigTable; - u1Byte digForBtHs=0; - u1Byte digUpBound=0x5a; - - if(pDM_Odm->bBtConnectProcess) + if(!pDM_Odm->RFCalibrateInfo.TM_Trigger) //at least delay 1 sec { - if(pDM_Odm->SupportICType&(ODM_RTL8723A)) - digForBtHs = 0x28; + //pHalData->TxPowerCheckCnt++; //cosa add for debug + if(IS_HARDWARE_TYPE_8188E(Adapter) || IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8192E(Adapter)||IS_HARDWARE_TYPE_8723B(Adapter)) + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_T_METER_NEW, (BIT17 | BIT16), 0x03); else - digForBtHs = 0x22; + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_T_METER_OLD, bRFRegOffsetMask, 0x60); + + //DBG_871X("Trigger Thermal Meter!!\n"); + + pDM_Odm->RFCalibrateInfo.TM_Trigger = 1; + return; } else { - // - // Decide DIG value by BT HS RSSI. - // - digForBtHs = pDM_Odm->btHsRssi+4; - - //DIG Bound - if(pDM_Odm->SupportICType&(ODM_RTL8723A)) - digUpBound = 0x3e; - - if(digForBtHs > digUpBound) - digForBtHs = digUpBound; - if(digForBtHs < 0x1c) - digForBtHs = 0x1c; - - // update Current IGI - pDM_DigTable->BT30_CurIGI = digForBtHs; + //DBG_871X("Schedule TxPowerTracking direct call!!\n"); + ODM_TXPowerTrackingCallback_ThermalMeter(Adapter); + pDM_Odm->RFCalibrateInfo.TM_Trigger = 0; } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DigForBtHsMode() : set DigValue=0x%x\n", digForBtHs)); -#endif + #endif +#endif } -VOID -odm_DIG( - IN PDM_ODM_T pDM_Odm +VOID +odm_TXPowerTrackingCheckMP( + IN PDM_ODM_T pDM_Odm ) { - pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; - PFALSE_ALARM_STATISTICS pFalseAlmCnt = &pDM_Odm->FalseAlmCnt; - pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; - u1Byte DIG_Dynamic_MIN; - u1Byte DIG_MaxOfMin; - BOOLEAN FirstConnect, FirstDisConnect; - u1Byte dm_dig_max, dm_dig_min, offset; - u1Byte CurrentIGI = pDM_DigTable->CurIGValue; - u1Byte Adap_IGI_Upper = pDM_Odm->IGI_target + 30 + (u1Byte) pDM_Odm->TH_L2H_ini -(u1Byte) pDM_Odm->TH_EDCCA_HL_diff; - #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -// This should be moved out of OUTSRC - PADAPTER pAdapter = pDM_Odm->Adapter; -#if OS_WIN_FROM_WIN7(OS_VERSION) - if(IsAPModeExist( pAdapter) && pAdapter->bInHctTest) + PADAPTER Adapter = pDM_Odm->Adapter; + + if (ODM_CheckPowerStatus(Adapter) == FALSE) { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: Is AP mode or In HCT Test \n")); + RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("===>ODM_CheckPowerStatus() return FALSE\n")); return; } -#endif -/* - if (pDM_Odm->SupportICType==ODM_RTL8723B) + + if(IS_HARDWARE_TYPE_8723A(Adapter)) return; -*/ - if(pDM_Odm->bBtHsOperation) - { - odm_DigForBtHsMode(pDM_Odm); + if(!Adapter->bSlaveOfDMSP || Adapter->DualMacSmartConcurrent == FALSE) + odm_TXPowerTrackingThermalMeterCheck(Adapter); + else { + RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("!Adapter->bSlaveOfDMSP || Adapter->DualMacSmartConcurrent == FALSE\n")); } - - if(!(pDM_Odm->SupportICType &(ODM_RTL8723A|ODM_RTL8188E))) - { - if(pRX_HP_Table->RXHP_flag == 1) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: In RXHP Operation \n")); - return; - } - } #endif -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -#ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV - if((pDM_Odm->bLinked) && (pDM_Odm->Adapter->registrypriv.force_igi !=0)) - { - printk("pDM_Odm->RSSI_Min=%d \n",pDM_Odm->RSSI_Min); - ODM_Write_DIG(pDM_Odm,pDM_Odm->Adapter->registrypriv.force_igi); - return; - } + +} + + +VOID +odm_TXPowerTrackingCheckAP( + IN PDM_ODM_T pDM_Odm + ) +{ +#if (DM_ODM_SUPPORT_TYPE == ODM_AP) + prtl8192cd_priv priv = pDM_Odm->priv; + + if ( (priv->pmib->dot11RFEntry.ther) && ((priv->up_time % priv->pshare->rf_ft_var.tpt_period) == 0)){ +#ifdef CONFIG_RTL_92D_SUPPORT + if (GET_CHIP_VER(priv)==VERSION_8192D){ + tx_power_tracking_92D(priv); + } else #endif + { +#ifdef CONFIG_RTL_92C_SUPPORT + tx_power_tracking(priv); #endif -#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - prtl8192cd_priv priv = pDM_Odm->priv; - if (!((priv->up_time > 5) && (priv->up_time % 2)) ) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: Not In DIG Operation Period \n")); - return; + } } -#endif +#endif + +} + + + +//antenna mapping info +// 1: right-side antenna +// 2/0: left-side antenna +//PDM_SWAT_Table->CCK_Ant1_Cnt /OFDM_Ant1_Cnt: for right-side antenna: Ant:1 RxDefaultAnt1 +//PDM_SWAT_Table->CCK_Ant2_Cnt /OFDM_Ant2_Cnt: for left-side antenna: Ant:0 RxDefaultAnt2 +// We select left antenna as default antenna in initial process, modify it as needed +// + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + +VOID +odm_TXPowerTrackingThermalMeterCheck( + IN PADAPTER Adapter + ) +{ +#ifndef AP_BUILD_WORKAROUND + static u1Byte TM_Trigger = 0; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG()==>\n")); - //if(!(pDM_Odm->SupportAbility & (ODM_BB_DIG|ODM_BB_FA_CNT))) - if((!(pDM_Odm->SupportAbility&ODM_BB_DIG)) ||(!(pDM_Odm->SupportAbility&ODM_BB_FA_CNT))) + if(!(GET_HAL_DATA(Adapter)->DM_OutSrc.SupportAbility & ODM_RF_TX_PWR_TRACK)) { -#if 0 - if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) - { - if ((pDM_Odm->SupportICType == ODM_RTL8192C) && (pDM_Odm->ExtLNA == 1)) - CurrentIGI = 0x30; //pDM_DigTable->CurIGValue = 0x30; - else - CurrentIGI = 0x20; //pDM_DigTable->CurIGValue = 0x20; - ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); - } -#endif - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: SupportAbility ODM_BB_DIG or ODM_BB_FA_CNT is disabled\n")); + RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, + ("===>odm_TXPowerTrackingThermalMeterCheck(),pMgntInfo->bTXPowerTracking is FALSE, return!!\n")); return; } - - if(*(pDM_Odm->pbScanInProcess)) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: In Scan Progress \n")); - return; - } - //add by Neil Chen to avoid PSD is processing - if(pDM_Odm->SupportICType==ODM_RTL8723A) - { - if(pDM_Odm->bDMInitialGainEnable == FALSE) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: PSD is Processing \n")); - return; - } - } - - if(pDM_Odm->SupportICType == ODM_RTL8192D) + if(!TM_Trigger) //at least delay 1 sec { - if(*(pDM_Odm->pMacPhyMode) == ODM_DMSP) - { - if(*(pDM_Odm->pbMasterOfDMSP)) - { - DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; - FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); - } - else - { - DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_1; - FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == FALSE); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == TRUE); - } - } + if(IS_HARDWARE_TYPE_8192D(Adapter)) + PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_T_METER_92D, BIT17 | BIT16, 0x03); + else if(IS_HARDWARE_TYPE_8188E(Adapter) || IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8192E(Adapter) || + IS_HARDWARE_TYPE_8723B(Adapter)) + PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_T_METER_88E, BIT17 | BIT16, 0x03); else - { - if(*(pDM_Odm->pBandType) == ODM_BAND_5G) - { - DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; - FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); - } - else - { - DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_1; - FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == FALSE); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == TRUE); - } - } + PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60); + + RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Trigger Thermal Meter!!\n")); + + TM_Trigger = 1; + return; } else - { - DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; - FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); - FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); - } - - //1 Boundary Decision - if(pDM_Odm->SupportICType & (ODM_RTL8192C) &&(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA))) { - if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) - { - - dm_dig_max = DM_DIG_MAX_AP_HP; - dm_dig_min = DM_DIG_MIN_AP_HP; - } - else - { - dm_dig_max = DM_DIG_MAX_NIC_HP; - dm_dig_min = DM_DIG_MIN_NIC_HP; - } - DIG_MaxOfMin = DM_DIG_MAX_AP_HP; + RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Schedule TxPowerTracking direct call!!\n")); + odm_TXPowerTrackingDirectCall(Adapter); //Using direct call is instead, added by Roger, 2009.06.18. + TM_Trigger = 0; } - else - { - if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) - { -#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -#ifdef DFS - if (!priv->pmib->dot11DFSEntry.disable_DFS && - (OPMODE & WIFI_AP_STATE) && - (((pDM_Odm->ControlChannel >= 52) && - (pDM_Odm->ControlChannel <= 64)) || - ((pDM_Odm->ControlChannel >= 100) && - (pDM_Odm->ControlChannel <= 140)))) - dm_dig_max = 0x24; - else #endif - if (priv->pmib->dot11RFEntry.tx2path) { - if (*(pDM_Odm->pWirelessMode) == ODM_WM_B)//(priv->pmib->dot11BssType.net_work_type == WIRELESS_11B) - dm_dig_max = 0x2A; - else - dm_dig_max = 0x32; - } - else -#endif - dm_dig_max = DM_DIG_MAX_AP; - dm_dig_min = DM_DIG_MIN_AP; - DIG_MaxOfMin = dm_dig_max; - } - else - { - if((pDM_Odm->SupportICType >= ODM_RTL8188E) && (pDM_Odm->SupportPlatform & (ODM_WIN|ODM_CE))) - dm_dig_max = 0x5A; - else - dm_dig_max = DM_DIG_MAX_NIC; - - if(pDM_Odm->SupportICType != ODM_RTL8821) - dm_dig_min = DM_DIG_MIN_NIC; - else - dm_dig_min = 0x1C; +} - DIG_MaxOfMin = DM_DIG_MAX_AP; - } - } +// Only for 8723A SW ANT DIV INIT--2012--07--17 +VOID +odm_SwAntDivInit_NIC_8723A( + IN PDM_ODM_T pDM_Odm) +{ + pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + PADAPTER Adapter = pDM_Odm->Adapter; + + u1Byte btAntNum=BT_GetPgAntNum(Adapter); - if(0 < *pDM_Odm->pu1ForcedIgiLb) + if(IS_HARDWARE_TYPE_8723A(Adapter)) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): force IGI lb to: %u\n", *pDM_Odm->pu1ForcedIgiLb)); - dm_dig_min = *pDM_Odm->pu1ForcedIgiLb; - dm_dig_max = (dm_dig_min <= dm_dig_max) ? (dm_dig_max) : (dm_dig_min + 1); - } + pDM_SWAT_Table->ANTA_ON =TRUE; - if(pDM_Odm->bLinked) - { - if(pDM_Odm->SupportICType&(ODM_RTL8723A/*|ODM_RTL8821*/)) - { - //2 Upper Bound - if(( pDM_Odm->RSSI_Min + 10) > DM_DIG_MAX_NIC ) - pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; - else if(( pDM_Odm->RSSI_Min + 10) < DM_DIG_MIN_NIC ) - pDM_DigTable->rx_gain_range_max = DM_DIG_MIN_NIC; - else - pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + 10; + // Set default antenna B status by PG + if(btAntNum == 2) + pDM_SWAT_Table->ANTB_ON = TRUE; + else if(btAntNum == 1) + pDM_SWAT_Table->ANTB_ON = FALSE; + else + pDM_SWAT_Table->ANTB_ON = TRUE; + } + +} - //BT is Concurrent +#endif //end #ifMP - if(pDM_Odm->bBtLimitedDig) - { - if(pDM_Odm->RSSI_Min>10) - { - if((pDM_Odm->RSSI_Min - 10) > DM_DIG_MAX_NIC) - DIG_Dynamic_MIN = DM_DIG_MAX_NIC; - else if((pDM_Odm->RSSI_Min - 10) < DM_DIG_MIN_NIC) - DIG_Dynamic_MIN = DM_DIG_MIN_NIC; - else - DIG_Dynamic_MIN = pDM_Odm->RSSI_Min - 10; - } - else - DIG_Dynamic_MIN=DM_DIG_MIN_NIC; - } - else - { - if((pDM_Odm->RSSI_Min + 20) > dm_dig_max ) - pDM_DigTable->rx_gain_range_max = dm_dig_max; - else if((pDM_Odm->RSSI_Min + 20) < dm_dig_min ) - pDM_DigTable->rx_gain_range_max = dm_dig_min; - else - pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + 20; - - } - } - else - { - if((pDM_Odm->SupportICType & (ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8812|ODM_RTL8821)) && (pDM_Odm->bBtLimitedDig==1)){ - //2 Modify DIG upper bound for 92E, 8723B, 8821 & 8812 BT - if((pDM_Odm->RSSI_Min + 10) > dm_dig_max ) - pDM_DigTable->rx_gain_range_max = dm_dig_max; - else if((pDM_Odm->RSSI_Min + 10) < dm_dig_min ) - pDM_DigTable->rx_gain_range_max = dm_dig_min; - else - pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + 10; - } - else{ - - //2 Modify DIG upper bound - //2013.03.19 Luke: Modified upper bound for Netgear rental house test - if(pDM_Odm->SupportICType != ODM_RTL8821 && pDM_Odm->SupportICType != ODM_RTL8192E) - offset = 20; - else - offset = 10; - - if((pDM_Odm->RSSI_Min + offset) > dm_dig_max ) - pDM_DigTable->rx_gain_range_max = dm_dig_max; - else if((pDM_Odm->RSSI_Min + offset) < dm_dig_min ) - pDM_DigTable->rx_gain_range_max = dm_dig_min; - else - pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + offset; - - } - //2 Modify DIG lower bound - /* - if((pFalseAlmCnt->Cnt_all > 500)&&(DIG_Dynamic_MIN < 0x25)) - DIG_Dynamic_MIN++; - else if(((pFalseAlmCnt->Cnt_all < 500)||(pDM_Odm->RSSI_Min < 8))&&(DIG_Dynamic_MIN > dm_dig_min)) - DIG_Dynamic_MIN--; - */ - if(pDM_Odm->bOneEntryOnly) - { - if(pDM_Odm->SupportICType != ODM_RTL8723B) - offset = 0; - else - offset = 12; - - if(pDM_Odm->RSSI_Min - offset < dm_dig_min) - DIG_Dynamic_MIN = dm_dig_min; - else if (pDM_Odm->RSSI_Min - offset > DIG_MaxOfMin) - DIG_Dynamic_MIN = DIG_MaxOfMin; - else - DIG_Dynamic_MIN = pDM_Odm->RSSI_Min - offset; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() : bOneEntryOnly=TRUE, DIG_Dynamic_MIN=0x%x\n",DIG_Dynamic_MIN)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() : pDM_Odm->RSSI_Min=%d",pDM_Odm->RSSI_Min)); - } - //1 Lower Bound for 88E AntDiv -#if (defined(CONFIG_HW_ANTENNA_DIVERSITY)) - else if( (pDM_Odm->SupportICType & ODM_ANTDIV_SUPPORT) &&(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV) ) - //else if((pDM_Odm->SupportICType == ODM_RTL8188E)&&(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) - { - if((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV)||(pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) ||pDM_Odm->AntDivType == S0S1_SW_ANTDIV) - { - DIG_Dynamic_MIN = (u1Byte) pDM_DigTable->AntDiv_RSSI_max; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_DIG(): pDM_DigTable->AntDiv_RSSI_max=%d \n",pDM_DigTable->AntDiv_RSSI_max)); - } - } +//3============================================================ +//3 SW Antenna Diversity +//3============================================================ +#if(defined(CONFIG_SW_ANTENNA_DIVERSITY)) +VOID +odm_SwAntDivInit( + IN PDM_ODM_T pDM_Odm + ) +{ +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) + odm_SwAntDivInit_NIC(pDM_Odm); +#elif(DM_ODM_SUPPORT_TYPE == ODM_AP) + dm_SW_AntennaSwitchInit(pDM_Odm->priv); #endif - else - { - DIG_Dynamic_MIN=dm_dig_min; - } - } - } - else +} + +VOID +odm_SwAntDivInit_NIC( + IN PDM_ODM_T pDM_Odm + ) +{ + pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + + +// Init SW ANT DIV mechanism for 8723AE/AU/AS +// Neil Chen--2012--07--17--- +// CE/AP/ADSL no using SW ANT DIV for 8723A Series IC +//#if (DM_ODM_SUPPORT_TYPE==ODM_WIN) +#if (RTL8723A_SUPPORT==1) + if(pDM_Odm->SupportICType == ODM_RTL8723A) { - pDM_DigTable->rx_gain_range_max = dm_dig_max; - DIG_Dynamic_MIN = dm_dig_min; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() : No Link\n")); - } + odm_SwAntDivInit_NIC_8723A(pDM_Odm); + } +#endif + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS:Init SW Antenna Switch\n")); + pDM_SWAT_Table->RSSI_sum_A = 0; + pDM_SWAT_Table->RSSI_cnt_A = 0; + pDM_SWAT_Table->RSSI_sum_B = 0; + pDM_SWAT_Table->RSSI_cnt_B = 0; + pDM_SWAT_Table->CurAntenna = MAIN_ANT; + pDM_SWAT_Table->PreAntenna = MAIN_ANT; + pDM_SWAT_Table->try_flag = 0xff; + pDM_SWAT_Table->PreRSSI = 0; + pDM_SWAT_Table->SWAS_NoLink_State = 0; + pDM_SWAT_Table->bTriggerAntennaSwitch = 0; + pDM_SWAT_Table->SelectAntennaMap=0xAA; + pDM_SWAT_Table->lastTxOkCnt = 0; + pDM_SWAT_Table->lastRxOkCnt = 0; + pDM_SWAT_Table->TXByteCnt_A = 0; + pDM_SWAT_Table->TXByteCnt_B = 0; + pDM_SWAT_Table->RXByteCnt_A = 0; + pDM_SWAT_Table->RXByteCnt_B = 0; + pDM_SWAT_Table->TrafficLoad = TRAFFIC_LOW; + pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ODM_Read4Byte(pDM_Odm, 0x860); - //1 Modify DIG lower bound, deal with abnorally large false alarm - if(pFalseAlmCnt->Cnt_all > 10000) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("dm_DIG(): Abnornally false alarm case. \n")); +} - if(pDM_DigTable->LargeFAHit != 3) - pDM_DigTable->LargeFAHit++; - if(pDM_DigTable->ForbiddenIGI < CurrentIGI)//if(pDM_DigTable->ForbiddenIGI < pDM_DigTable->CurIGValue) - { - pDM_DigTable->ForbiddenIGI = (u1Byte)CurrentIGI;//pDM_DigTable->ForbiddenIGI = pDM_DigTable->CurIGValue; - pDM_DigTable->LargeFAHit = 1; - } +// +// 20100514 Joseph: +// Add new function to reset the state of antenna diversity before link. +// +VOID +ODM_SwAntDivResetBeforeLink( + IN PDM_ODM_T pDM_Odm + ) +{ - if(pDM_DigTable->LargeFAHit >= 3) - { - if((pDM_DigTable->ForbiddenIGI+1) >pDM_DigTable->rx_gain_range_max) - pDM_DigTable->rx_gain_range_min = pDM_DigTable->rx_gain_range_max; - else - pDM_DigTable->rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 1); - pDM_DigTable->Recover_cnt = 3600; //3600=2hr - } + pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + + pDM_SWAT_Table->SWAS_NoLink_State = 0; + +} + +// +// 20100514 Luke/Joseph: +// Add new function to reset antenna diversity state after link. +// +VOID +ODM_SwAntDivRestAfterLink( + IN PDM_ODM_T pDM_Odm + ) +{ + pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; + u4Byte i; + if(pDM_Odm->SupportICType == ODM_RTL8723A) + { + pDM_SWAT_Table->RSSI_cnt_A = 0; + pDM_SWAT_Table->RSSI_cnt_B = 0; + pDM_Odm->RSSI_test = FALSE; + pDM_SWAT_Table->try_flag = 0xff; + pDM_SWAT_Table->RSSI_Trying = 0; + pDM_SWAT_Table->SelectAntennaMap=0xAA; + } - else + else if(pDM_Odm->SupportICType & (ODM_RTL8723B|ODM_RTL8821)) { - //Recovery mechanism for IGI lower bound - if(pDM_DigTable->Recover_cnt != 0) - pDM_DigTable->Recover_cnt --; - else + pDM_Odm->RSSI_test = FALSE; + pDM_SWAT_Table->try_flag = 0xff; + pDM_SWAT_Table->RSSI_Trying = 0; + pDM_SWAT_Table->Double_chk_flag= 0; + + pDM_FatTable->RxIdleAnt=MAIN_ANT; + + for (i=0; iLargeFAHit < 3) - { - if((pDM_DigTable->ForbiddenIGI -1) < DIG_Dynamic_MIN) //DM_DIG_MIN) - { - pDM_DigTable->ForbiddenIGI = DIG_Dynamic_MIN; //DM_DIG_MIN; - pDM_DigTable->rx_gain_range_min = DIG_Dynamic_MIN; //DM_DIG_MIN; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: At Lower Bound\n")); - } - else - { - pDM_DigTable->ForbiddenIGI --; - pDM_DigTable->rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 1); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: Approach Lower Bound\n")); - } - } - else - { - pDM_DigTable->LargeFAHit = 0; - } + pDM_FatTable->MainAnt_Sum[i] = 0; + pDM_FatTable->AuxAnt_Sum[i] = 0; + pDM_FatTable->MainAnt_Cnt[i] = 0; + pDM_FatTable->AuxAnt_Cnt[i] = 0; } - } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): pDM_DigTable->LargeFAHit=%d\n",pDM_DigTable->LargeFAHit)); - #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[0])) //STA mode is linked to AP - pDM_Odm->bsta_state = _TRUE; - #endif - - if((pDM_Odm->SupportPlatform&(ODM_WIN|ODM_CE))&&(pDM_Odm->PhyDbgInfo.NumQryBeaconPkt < 2) && (pDM_Odm->bsta_state) ) - { - pDM_DigTable->rx_gain_range_min = dm_dig_min; } +} + +void +odm_SwAntDetectInit( + IN PDM_ODM_T pDM_Odm + ) +{ + pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; +#if (RTL8723B_SUPPORT == 1) + pDM_SWAT_Table->SWAS_NoLink_BK_Reg92c = ODM_Read4Byte(pDM_Odm, rDPDT_control); +#endif + pDM_SWAT_Table->PreAntenna = MAIN_ANT; + pDM_SWAT_Table->CurAntenna = MAIN_ANT; + pDM_SWAT_Table->SWAS_NoLink_State = 0; +} + +VOID +ODM_SwAntDivChkPerPktRssi( + IN PDM_ODM_T pDM_Odm, + IN u1Byte StationID, + IN PODM_PHY_INFO_T pPhyInfo + ) +{ + SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - if(pDM_DigTable->rx_gain_range_min > pDM_DigTable->rx_gain_range_max) - pDM_DigTable->rx_gain_range_min = pDM_DigTable->rx_gain_range_max; + if(!(pDM_Odm->SupportAbility & (ODM_BB_ANT_DIV))) + return; - //1 Adjust initial gain by false alarm - if(pDM_Odm->bLinked) +// temporary Fix 8723A MP SW ANT DIV Bug --NeilChen--2012--07--11 +#if (DM_ODM_SUPPORT_TYPE==ODM_WIN) + if(pDM_Odm->SupportICType == ODM_RTL8723A) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG AfterLink\n")); - if(FirstConnect) + //if(StationID == pDM_SWAT_Table->RSSI_target) + //{ + //1 RSSI for SW Antenna Switch + if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) { - if(pDM_Odm->RSSI_Min <= DIG_MaxOfMin) - CurrentIGI = pDM_Odm->RSSI_Min; - else - CurrentIGI = DIG_MaxOfMin; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: First Connect\n")); - - ODM_ConfigBBWithHeaderFile(pDM_Odm, CONFIG_BB_AGC_TAB_DIFF); + pDM_SWAT_Table->RSSI_sum_A += pPhyInfo->RxPWDBAll; + pDM_SWAT_Table->RSSI_cnt_A++; } else { - if(pDM_Odm->SupportICType == ODM_RTL8192D) + pDM_SWAT_Table->RSSI_sum_B += pPhyInfo->RxPWDBAll; + pDM_SWAT_Table->RSSI_cnt_B++; + + } + //} + } + else + { + if(StationID == pDM_SWAT_Table->RSSI_target) + { + //1 RSSI for SW Antenna Switch + if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) { - if(pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2_92D) - CurrentIGI = CurrentIGI + 4;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; - else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1_92D) - CurrentIGI = CurrentIGI + 2; //pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; - else if(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0_92D) - CurrentIGI = CurrentIGI - 2;//pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; + pDM_SWAT_Table->RSSI_sum_A += pPhyInfo->RxPWDBAll; + pDM_SWAT_Table->RSSI_cnt_A++; } else { - //FA for Combo IC--NeilChen--2012--09--28 - if(pDM_Odm->SupportICType == ODM_RTL8723A) - { - //WLAN and BT ConCurrent - if(pDM_Odm->bBtLimitedDig) - { - if(pFalseAlmCnt->Cnt_all > 0x300) - CurrentIGI = CurrentIGI + 4; - else if (pFalseAlmCnt->Cnt_all > 0x250) - CurrentIGI = CurrentIGI + 2; - else if(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0) - CurrentIGI = CurrentIGI -2; - } - else //Not Concurrent - { - if(pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2) - CurrentIGI = CurrentIGI + 4;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; - else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1) - CurrentIGI = CurrentIGI + 2;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; - else if(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0) - CurrentIGI = CurrentIGI - 2;//pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; - } - } - else - { - if(pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2) - CurrentIGI = CurrentIGI + 4;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; - else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1) - CurrentIGI = CurrentIGI + 2;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; - else if(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0) - CurrentIGI = CurrentIGI - 2;//pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; - - #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[0])) //STA mode is linked to AP - pDM_Odm->bsta_state = _TRUE; - #endif - - if((pDM_Odm->SupportPlatform&(ODM_WIN|ODM_CE))&&(pDM_Odm->PhyDbgInfo.NumQryBeaconPkt < 2) - &&(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH1) && (pDM_Odm->bsta_state)) - { - CurrentIGI = pDM_DigTable->rx_gain_range_min; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Beacon is less than 10 and FA is less than 768, IGI GOES TO 0x1E!!!!!!!!!!!!\n")); - } - /*{ - u2Byte value16; - value16 = (u2Byte) ODM_GetBBReg(pDM_Odm, 0x664, bMaskLWord); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): NumQryBeaconPkt = %d, OFDM_OK_Cnt = %d\n", - pDM_Odm->PhyDbgInfo.NumQryBeaconPkt, value16)); - }*/ - } + pDM_SWAT_Table->RSSI_sum_B += pPhyInfo->RxPWDBAll; + pDM_SWAT_Table->RSSI_cnt_B++; + } } - } - else + } +#else + if(StationID == pDM_SWAT_Table->RSSI_target) { - //CurrentIGI = pDM_DigTable->rx_gain_range_min;//pDM_DigTable->CurIGValue = pDM_DigTable->rx_gain_range_min - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG BeforeLink\n")); - if(FirstDisConnect) + //1 RSSI for SW Antenna Switch + if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) { - CurrentIGI = pDM_DigTable->rx_gain_range_min; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): First DisConnect \n")); + pDM_SWAT_Table->RSSI_sum_A += pPhyInfo->RxPWDBAll; + pDM_SWAT_Table->RSSI_cnt_A++; } else { - //2012.03.30 LukeLee: enable DIG before link but with very high thresholds - if(pFalseAlmCnt->Cnt_all > 10000) - CurrentIGI = CurrentIGI + 4; - else if (pFalseAlmCnt->Cnt_all > 8000) - CurrentIGI = CurrentIGI + 2; - else if(pFalseAlmCnt->Cnt_all < 500) - CurrentIGI = CurrentIGI - 2; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): England DIG \n")); + pDM_SWAT_Table->RSSI_sum_B += pPhyInfo->RxPWDBAll; + pDM_SWAT_Table->RSSI_cnt_B++; + } } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG End Adjust IGI\n")); - //1 Check initial gain by upper/lower bound +#endif +} - if(CurrentIGI > pDM_DigTable->rx_gain_range_max) - CurrentIGI = pDM_DigTable->rx_gain_range_max; - if(CurrentIGI < pDM_DigTable->rx_gain_range_min) - CurrentIGI = pDM_DigTable->rx_gain_range_min; +// +VOID +odm_SwAntDivChkAntSwitch( + IN PDM_ODM_T pDM_Odm, + IN u1Byte Step + ) +{ + // + // For AP/ADSL use prtl8192cd_priv + // For CE/NIC use PADAPTER + // + prtl8192cd_priv priv = pDM_Odm->priv; - if(pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY) + // + // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate + // at the same time. In the stage2/3, we need to prive universal interface and merge all + // HW dynamic mechanism. + // + switch (pDM_Odm->SupportPlatform) { - if(CurrentIGI > Adap_IGI_Upper) - CurrentIGI = Adap_IGI_Upper; + case ODM_WIN: + odm_SwAntDivChkAntSwitchNIC(pDM_Odm, Step); + break; + case ODM_CE: + odm_SwAntDivChkAntSwitchNIC(pDM_Odm, Step); + break; - if(pDM_Odm->IGI_LowerBound != 0) - { - if(CurrentIGI < pDM_Odm->IGI_LowerBound) - CurrentIGI = pDM_Odm->IGI_LowerBound; - } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): pDM_Odm->IGI_LowerBound = %d\n", pDM_Odm->IGI_LowerBound)); + case ODM_AP: + case ODM_ADSL: +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP |ODM_ADSL)) + if (priv->pshare->rf_ft_var.antSw_enable && (priv->up_time % 4==1)) + dm_SW_AntennaSwitch(priv, SWAW_STEP_PEAK); +#endif + break; } - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): rx_gain_range_max=0x%x, rx_gain_range_min=0x%x\n", - pDM_DigTable->rx_gain_range_max, pDM_DigTable->rx_gain_range_min)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): TotalFA=%d\n", pFalseAlmCnt->Cnt_all)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue=0x%x\n", CurrentIGI)); - //2 High power RSSI threshold -#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pDM_Odm->Adapter); - //PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); - // for LC issue to dymanic modify DIG lower bound----------LC Mocca Issue - u8Byte curTxOkCnt=0, curRxOkCnt=0; - static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; +} - //u8Byte OKCntAll=0; - //static u8Byte TXByteCnt_A=0, TXByteCnt_B=0, RXByteCnt_A=0, RXByteCnt_B=0; - //u8Byte CurByteCnt=0, PreByteCnt=0; - - curTxOkCnt = pAdapter->TxStats.NumTxBytesUnicast - lastTxOkCnt; - curRxOkCnt =pAdapter->RxStats.NumRxBytesUnicast - lastRxOkCnt; - lastTxOkCnt = pAdapter->TxStats.NumTxBytesUnicast; - lastRxOkCnt = pAdapter->RxStats.NumRxBytesUnicast; - //----------------------------------------------------------end for LC Mocca issue - if((pDM_Odm->SupportICType == ODM_RTL8723A)&& (pHalData->UndecoratedSmoothedPWDB > DM_DIG_HIGH_PWR_THRESHOLD)) - { - // High power IGI lower bound - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): UndecoratedSmoothedPWDB(%#x)\n", pHalData->UndecoratedSmoothedPWDB)); - if(CurrentIGI < DM_DIG_HIGH_PWR_IGI_LOWER_BOUND) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue(%#x)\n", pDM_DigTable->CurIGValue)); - //pDM_DigTable->CurIGValue = DM_DIG_HIGH_PWR_IGI_LOWER_BOUND; - CurrentIGI=DM_DIG_HIGH_PWR_IGI_LOWER_BOUND; - } - } - if((pDM_Odm->SupportICType & ODM_RTL8723A) && - IS_WIRELESS_MODE_G(pAdapter)) - { - if(pHalData->UndecoratedSmoothedPWDB > 0x28) - { - if(CurrentIGI < DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND) - { - //pDM_DigTable->CurIGValue = DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND; - CurrentIGI = DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND; - } - } - } -#if 0 - if((pDM_Odm->SupportICType & ODM_RTL8723A)&&(pMgntInfo->CustomerID = RT_CID_LENOVO_CHINA)) - { - OKCntAll = (curTxOkCnt+curRxOkCnt); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue(%#x)\n", CurrentIGI)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): UndecoratedSmoothedPWDB(%#x)\n", pHalData->UndecoratedSmoothedPWDB)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): OKCntAll(%#x)\n", OKCntAll)); - //8723AS_VAU - if(pDM_Odm->SupportInterface==ODM_ITRF_USB) - { - if(pHalData->UndecoratedSmoothedPWDB < 12) - { - if(CurrentIGI > DM_DIG_MIN_NIC) - { - if(OKCntAll >= 1500000) // >=6Mbps - CurrentIGI=0x1B; - else if(OKCntAll >= 1000000) //4Mbps - CurrentIGI=0x1A; - else if(OKCntAll >= 500000) //2Mbps - CurrentIGI=0x19; - else if(OKCntAll >= 250000) //1Mbps - CurrentIGI=0x18; - else - { - CurrentIGI=0x17; //SCAN mode - } - } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("Modify---->CurIGValue(%#x)\n", CurrentIGI)); - } - } - } -#endif -} -#endif - -#if (RTL8192D_SUPPORT==1) - if(pDM_Odm->SupportICType == ODM_RTL8192D) - { - //sherry delete DualMacSmartConncurrent 20110517 - if(*(pDM_Odm->pMacPhyMode) == ODM_DMSP) - { - ODM_Write_DIG_DMSP(pDM_Odm, (u1Byte)CurrentIGI);//ODM_Write_DIG_DMSP(pDM_Odm, pDM_DigTable->CurIGValue); - if(*(pDM_Odm->pbMasterOfDMSP)) - { - pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; - pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; - } - else - { - pDM_DigTable->bMediaConnect_1 = pDM_Odm->bLinked; - pDM_DigTable->DIG_Dynamic_MIN_1 = DIG_Dynamic_MIN; - } - } - else - { - ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); - if(*(pDM_Odm->pBandType) == ODM_BAND_5G) - { - pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; - pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; - } - else - { - pDM_DigTable->bMediaConnect_1 = pDM_Odm->bLinked; - pDM_DigTable->DIG_Dynamic_MIN_1 = DIG_Dynamic_MIN; - } - } - } - else -#endif - { - if(pDM_Odm->bBtHsOperation) - { - if(pDM_Odm->bLinked) - { - if(pDM_DigTable->BT30_CurIGI > (CurrentIGI)) - { - ODM_Write_DIG(pDM_Odm, CurrentIGI); - - } - else - { - ODM_Write_DIG(pDM_Odm, pDM_DigTable->BT30_CurIGI); - } - pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; - pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; - } - else - { - if(pDM_Odm->bLinkInProcess) - { - ODM_Write_DIG(pDM_Odm, 0x1c); - } - else if(pDM_Odm->bBtConnectProcess) - { - ODM_Write_DIG(pDM_Odm, 0x28); - } - else - { - ODM_Write_DIG(pDM_Odm, pDM_DigTable->BT30_CurIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); - } - } - } - else // BT is not using - { - ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); - pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; - pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; - } - } -} +// +// 20100514 Luke/Joseph: +// Add new function for antenna diversity after link. +// This is the main function of antenna diversity after link. +// This function is called in HalDmWatchDog() and ODM_SwAntDivChkAntSwitchCallback(). +// HalDmWatchDog() calls this function with SWAW_STEP_PEAK to initialize the antenna test. +// In SWAW_STEP_PEAK, another antenna and a 500ms timer will be set for testing. +// After 500ms, ODM_SwAntDivChkAntSwitchCallback() calls this function to compare the signal just +// listened on the air with the RSSI of original antenna. +// It chooses the antenna with better RSSI. +// There is also a aged policy for error trying. Each error trying will cost more 5 seconds waiting +// penalty to get next try. -BOOLEAN -odm_DigAbort( - IN PDM_ODM_T pDM_Odm - ) +VOID +ODM_SetAntenna( + IN PDM_ODM_T pDM_Odm, + IN u1Byte Antenna) { -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -// This should be moved out of OUTSRC - PADAPTER pAdapter = pDM_Odm->Adapter; - pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; - -#if OS_WIN_FROM_WIN7(OS_VERSION) - if(IsAPModeExist( pAdapter) && pAdapter->bInHctTest) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: Is AP mode or In HCT Test \n")); - return TRUE; - } -#endif - - if(pRX_HP_Table->RXHP_flag == 1) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: In RXHP Operation \n")); - return TRUE; - } - - return FALSE; -#else // For Other team any special case for DIG? - return FALSE; -#endif - - + ODM_SetBBReg(pDM_Odm, 0x860, BIT8|BIT9, Antenna); } -//3============================================================ -//3 FASLE ALARM CHECK -//3============================================================ - -VOID -odm_FalseAlarmCounterStatistics( - IN PDM_ODM_T pDM_Odm +VOID +odm_SwAntDivChkAntSwitchNIC( + IN PDM_ODM_T pDM_Odm, + IN u1Byte Step ) { - u4Byte ret_value; - PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); - -#if (DM_ODM_SUPPORT_TYPE == ODM_AP) - prtl8192cd_priv priv = pDM_Odm->priv; - if( (priv->auto_channel != 0) && (priv->auto_channel != 2) ) - return; -#endif - -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - if((pDM_Odm->SupportICType == ODM_RTL8192D) && - (*(pDM_Odm->pMacPhyMode)==ODM_DMSP)&& ////modify by Guo.Mingzhi 2011-12-29 - (!(*(pDM_Odm->pbMasterOfDMSP)))) - { - odm_FalseAlarmCounterStatistics_ForSlaveOfDMSP(pDM_Odm); - return; - } -#endif - - if(!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)) - return; - - if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) - { - - //hold ofdm counter - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 1); //hold page C counter - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 1); //hold page D counter - - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord); - FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff); - FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16); - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord); - FalseAlmCnt->Cnt_OFDM_CCA = (ret_value&0xffff); - FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16); - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord); - FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff); - FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16); - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord); - FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff); - - FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal + - FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail + - FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail; - -#if (RTL8188E_SUPPORT==1) - if((pDM_Odm->SupportICType == ODM_RTL8188E)||(pDM_Odm->SupportICType == ODM_RTL8192E)) - { - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_SC_CNT_11N, bMaskDWord); - FalseAlmCnt->Cnt_BW_LSC = (ret_value&0xffff); - FalseAlmCnt->Cnt_BW_USC = ((ret_value&0xffff0000)>>16); - } -#endif - -#if (RTL8192D_SUPPORT==1) - if(pDM_Odm->SupportICType == ODM_RTL8192D) - { - odm_GetCCKFalseAlarm_92D(pDM_Odm); - } - else -#endif - { - //hold cck counter - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT12, 1); - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT14, 1); - - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_LSB_11N, bMaskByte0); - FalseAlmCnt->Cnt_Cck_fail = ret_value; - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_MSB_11N, bMaskByte3); - FalseAlmCnt->Cnt_Cck_fail += (ret_value& 0xff)<<8; - - ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord); - FalseAlmCnt->Cnt_CCK_CCA = ((ret_value&0xFF)<<8) |((ret_value&0xFF00)>>8); - } - - FalseAlmCnt->Cnt_all = ( FalseAlmCnt->Cnt_Fast_Fsync + - FalseAlmCnt->Cnt_SB_Search_fail + - FalseAlmCnt->Cnt_Parity_Fail + - FalseAlmCnt->Cnt_Rate_Illegal + - FalseAlmCnt->Cnt_Crc8_fail + - FalseAlmCnt->Cnt_Mcs_fail + - FalseAlmCnt->Cnt_Cck_fail); - - FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA + FalseAlmCnt->Cnt_CCK_CCA; - -#if (RTL8192C_SUPPORT==1) - if(pDM_Odm->SupportICType == ODM_RTL8192C) - odm_ResetFACounter_92C(pDM_Odm); -#endif +#if ((RTL8192C_SUPPORT==1)||(RTL8723A_SUPPORT==1)) + //PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); -#if (RTL8192D_SUPPORT==1) - if(pDM_Odm->SupportICType == ODM_RTL8192D) - odm_ResetFACounter_92D(pDM_Odm); +#if (DM_ODM_SUPPORT_TYPE==ODM_WIN) + PADAPTER Adapter=pDM_Odm->Adapter; #endif - if(pDM_Odm->SupportICType >=ODM_RTL8723A) - { - //reset false alarm counter registers - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT31, 1); - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT31, 0); - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT27, 1); - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT27, 0); - //update ofdm counter - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 0); //update page C counter - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 0); //update page D counter - - //reset CCK CCA counter - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT13|BIT12, 0); - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT13|BIT12, 2); - //reset CCK FA counter - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT15|BIT14, 0); - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT15|BIT14, 2); - } - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Enter odm_FalseAlarmCounterStatistics\n")); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Fast_Fsync=%d, Cnt_SB_Search_fail=%d\n", - FalseAlmCnt->Cnt_Fast_Fsync, FalseAlmCnt->Cnt_SB_Search_fail)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Parity_Fail=%d, Cnt_Rate_Illegal=%d\n", - FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Crc8_fail=%d, Cnt_Mcs_fail=%d\n", - FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail)); - } - else if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) - { - u4Byte CCKenable; - //read OFDM FA counter - FalseAlmCnt->Cnt_Ofdm_fail = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_11AC, bMaskLWord); - FalseAlmCnt->Cnt_Cck_fail = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_11AC, bMaskLWord); - - CCKenable = ODM_GetBBReg(pDM_Odm, ODM_REG_BB_RX_PATH_11AC, BIT28); - if(CCKenable)//if(*pDM_Odm->pBandType == ODM_BAND_2_4G) - FalseAlmCnt->Cnt_all = FalseAlmCnt->Cnt_Ofdm_fail + FalseAlmCnt->Cnt_Cck_fail; - else - FalseAlmCnt->Cnt_all = FalseAlmCnt->Cnt_Ofdm_fail; - - // reset OFDM FA coutner - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RST_11AC, BIT17, 1); - ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RST_11AC, BIT17, 0); - // reset CCK FA counter - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11AC, BIT15, 0); - ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11AC, BIT15, 1); - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Cck_fail=%d\n", FalseAlmCnt->Cnt_Cck_fail)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Total False Alarm=%d\n", FalseAlmCnt->Cnt_all)); -} - -//3============================================================ -//3 CCK Packet Detect Threshold -//3============================================================ - -VOID -odm_CCKPacketDetectionThresh( - IN PDM_ODM_T pDM_Odm - ) -{ - - u1Byte CurCCK_CCAThres; - PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); - -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -//modify by Guo.Mingzhi 2011-12-29 - if (pDM_Odm->bDualMacSmartConcurrent == TRUE) -// if (pDM_Odm->bDualMacSmartConcurrent == FALSE) - return; + pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + s4Byte curRSSI=100, RSSI_A, RSSI_B; + u1Byte nextAntenna=AUX_ANT; + //static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; + u8Byte curTxOkCnt=0, curRxOkCnt=0; + //static u8Byte TXByteCnt_A=0, TXByteCnt_B=0, RXByteCnt_A=0, RXByteCnt_B=0; + u8Byte CurByteCnt=0, PreByteCnt=0; + //static u1Byte TrafficLoad = TRAFFIC_LOW; + u1Byte Score_A=0, Score_B=0; //A: Main; B: AUX + u1Byte i; - if(pDM_Odm->bBtHsOperation) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_CCKPacketDetectionThresh() write 0xcd for BT HS mode!!\n")); - ODM_Write_CCK_CCA_Thres(pDM_Odm, 0xcd); + if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) return; - } - -#endif - if(!(pDM_Odm->SupportAbility & (ODM_BB_CCK_PD|ODM_BB_FA_CNT))) + if (pDM_Odm->SupportICType & (ODM_RTL8192D|ODM_RTL8188E)) return; - if(pDM_Odm->ExtLNA) + if((pDM_Odm->SupportICType == ODM_RTL8192C) &&(pDM_Odm->RFType == ODM_2T2R)) return; - if(pDM_Odm->bLinked) + if(pDM_Odm->SupportPlatform & ODM_WIN) { - if(pDM_Odm->RSSI_Min > 25) - CurCCK_CCAThres = 0xcd; - else if((pDM_Odm->RSSI_Min <= 25) && (pDM_Odm->RSSI_Min > 10)) - CurCCK_CCAThres = 0x83; - else - { - if(FalseAlmCnt->Cnt_Cck_fail > 1000) - CurCCK_CCAThres = 0x83; - else - CurCCK_CCAThres = 0x40; - } + if(*(pDM_Odm->pAntennaTest)) + return; } - else + + if((pDM_SWAT_Table->ANTA_ON == FALSE) ||(pDM_SWAT_Table->ANTB_ON == FALSE)) { - if(FalseAlmCnt->Cnt_Cck_fail > 1000) - CurCCK_CCAThres = 0x83; - else - CurCCK_CCAThres = 0x40; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, + ("odm_SwAntDivChkAntSwitch(): No AntDiv Mechanism, Antenna A or B is off\n")); + return; } - -#if (RTL8192D_SUPPORT==1) - if((pDM_Odm->SupportICType == ODM_RTL8192D)&&(*pDM_Odm->pBandType == ODM_BAND_2_4G)) - ODM_Write_CCK_CCA_Thres_92D(pDM_Odm, CurCCK_CCAThres); - else -#endif - ODM_Write_CCK_CCA_Thres(pDM_Odm, CurCCK_CCAThres); -} - -VOID -ODM_Write_CCK_CCA_Thres( - IN PDM_ODM_T pDM_Odm, - IN u1Byte CurCCK_CCAThres - ) -{ - pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; - if(pDM_DigTable->CurCCK_CCAThres!=CurCCK_CCAThres) //modify by Guo.Mingzhi 2012-01-03 + // Radio off: Status reset to default and return. + if(*(pDM_Odm->pbPowerSaving)==TRUE) //pHalData->eRFPowerState==eRfOff { - ODM_Write1Byte(pDM_Odm, ODM_REG(CCK_CCA,pDM_Odm), CurCCK_CCAThres); + ODM_SwAntDivRestAfterLink(pDM_Odm); + return; } - pDM_DigTable->PreCCK_CCAThres = pDM_DigTable->CurCCK_CCAThres; - pDM_DigTable->CurCCK_CCAThres = CurCCK_CCAThres; - -} - -//3============================================================ -//3 BB Power Save -//3============================================================ -VOID -odm_DynamicBBPowerSavingInit( - IN PDM_ODM_T pDM_Odm - ) -{ - pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable; - - pDM_PSTable->PreCCAState = CCA_MAX; - pDM_PSTable->CurCCAState = CCA_MAX; - pDM_PSTable->PreRFState = RF_MAX; - pDM_PSTable->CurRFState = RF_MAX; - pDM_PSTable->Rssi_val_min = 0; - pDM_PSTable->initialize = 0; -} - -VOID -odm_DynamicBBPowerSaving( - IN PDM_ODM_T pDM_Odm - ) -{ -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) - if (pDM_Odm->SupportICType != ODM_RTL8723A) - return; - if(!(pDM_Odm->SupportAbility & ODM_BB_PWR_SAVE)) - return; - if(!(pDM_Odm->SupportPlatform & (ODM_WIN|ODM_CE))) - return; - - //1 2.Power Saving for 92C - if((pDM_Odm->SupportICType == ODM_RTL8192C) &&(pDM_Odm->RFType == ODM_2T2R)) - { - odm_1R_CCA(pDM_Odm); - } - - // 20100628 Joseph: Turn off BB power save for 88CE because it makesthroughput unstable. - // 20100831 Joseph: Turn ON BB power save again after modifying AGC delay from 900ns ot 600ns. - //1 3.Power Saving for 88C - else + // Handling step mismatch condition. + // Peak step is not finished at last time. Recover the variable and check again. + if( Step != pDM_SWAT_Table->try_flag ) { - ODM_RF_Saving(pDM_Odm, FALSE); + ODM_SwAntDivRestAfterLink(pDM_Odm); } -#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - -} -VOID -odm_1R_CCA( - IN PDM_ODM_T pDM_Odm - ) -{ - pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable; +#if (DM_ODM_SUPPORT_TYPE &( ODM_WIN| ODM_CE )) - if(pDM_Odm->RSSI_Min!= 0xFF) + if(pDM_SWAT_Table->try_flag == 0xff) { - - if(pDM_PSTable->PreCCAState == CCA_2R) + pDM_SWAT_Table->RSSI_target = 0xff; + + #if(DM_ODM_SUPPORT_TYPE & ODM_CE) { - if(pDM_Odm->RSSI_Min >= 35) - pDM_PSTable->CurCCAState = CCA_1R; - else - pDM_PSTable->CurCCAState = CCA_2R; + u1Byte index = 0; + PSTA_INFO_T pEntry = NULL; - } - else{ - if(pDM_Odm->RSSI_Min <= 30) - pDM_PSTable->CurCCAState = CCA_2R; - else - pDM_PSTable->CurCCAState = CCA_1R; - } - } - else{ - pDM_PSTable->CurCCAState=CCA_MAX; - } - - if(pDM_PSTable->PreCCAState != pDM_PSTable->CurCCAState) - { - if(pDM_PSTable->CurCCAState == CCA_1R) - { - if( pDM_Odm->RFType ==ODM_2T2R ) - { - ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x13); - //PHY_SetBBReg(pAdapter, 0xe70, bMaskByte3, 0x20); - } - else - { - ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x23); - //PHY_SetBBReg(pAdapter, 0xe70, 0x7fc00000, 0x10c); // Set RegE70[30:22] = 9b'100001100 + + for(index=0; indexpODM_StaInfo[index]; + if(IS_STA_VALID(pEntry) ) { + break; + } } - } - else - { - ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x33); - //PHY_SetBBReg(pAdapter,0xe70, bMaskByte3, 0x63); - } - pDM_PSTable->PreCCAState = pDM_PSTable->CurCCAState; - } - //ODM_RT_TRACE(pDM_Odm, COMP_BB_POWERSAVING, DBG_LOUD, ("CCAStage = %s\n",(pDM_PSTable->CurCCAState==0)?"1RCCA":"2RCCA")); -} - -void -ODM_RF_Saving( - IN PDM_ODM_T pDM_Odm, - IN u1Byte bForceInNormal - ) -{ -#if (DM_ODM_SUPPORT_TYPE != ODM_AP) - pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable; - u1Byte Rssi_Up_bound = 30 ; - u1Byte Rssi_Low_bound = 25; - #if (DM_ODM_SUPPORT_TYPE == ODM_CE) - if(pDM_Odm->PatchID == 40 ) //RT_CID_819x_FUNAI_TV - { - Rssi_Up_bound = 50 ; - Rssi_Low_bound = 45; - } - #endif - if(pDM_PSTable->initialize == 0){ - - pDM_PSTable->Reg874 = (ODM_GetBBReg(pDM_Odm, 0x874, bMaskDWord)&0x1CC000)>>14; - pDM_PSTable->RegC70 = (ODM_GetBBReg(pDM_Odm, 0xc70, bMaskDWord)&BIT3)>>3; - pDM_PSTable->Reg85C = (ODM_GetBBReg(pDM_Odm, 0x85c, bMaskDWord)&0xFF000000)>>24; - pDM_PSTable->RegA74 = (ODM_GetBBReg(pDM_Odm, 0xa74, bMaskDWord)&0xF000)>>12; - //Reg818 = PHY_QueryBBReg(pAdapter, 0x818, bMaskDWord); - pDM_PSTable->initialize = 1; - } - - if(!bForceInNormal) - { - if(pDM_Odm->RSSI_Min != 0xFF) - { - if(pDM_PSTable->PreRFState == RF_Normal) + if(pEntry == NULL) { - if(pDM_Odm->RSSI_Min >= Rssi_Up_bound) - pDM_PSTable->CurRFState = RF_Save; - else - pDM_PSTable->CurRFState = RF_Normal; - } - else{ - if(pDM_Odm->RSSI_Min <= Rssi_Low_bound) - pDM_PSTable->CurRFState = RF_Normal; - else - pDM_PSTable->CurRFState = RF_Save; + ODM_SwAntDivRestAfterLink(pDM_Odm); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): No Link.\n")); + return; } - } - else - pDM_PSTable->CurRFState=RF_MAX; - } - else - { - pDM_PSTable->CurRFState = RF_Normal; - } - - if(pDM_PSTable->PreRFState != pDM_PSTable->CurRFState) - { - if(pDM_PSTable->CurRFState == RF_Save) - { - // 8723 RSSI report will be wrong. Set 0x874[5]=1 when enter BB power saving mode. - // Suggested by SD3 Yu-Nan. 2011.01.20. - if(pDM_Odm->SupportICType == ODM_RTL8723A) + else { - ODM_SetBBReg(pDM_Odm, 0x874 , BIT5, 0x1); //Reg874[5]=1b'1 + pDM_SWAT_Table->RSSI_target = index; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): RSSI_target is PEER STA\n")); } - ODM_SetBBReg(pDM_Odm, 0x874 , 0x1C0000, 0x2); //Reg874[20:18]=3'b010 - ODM_SetBBReg(pDM_Odm, 0xc70, BIT3, 0); //RegC70[3]=1'b0 - ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, 0x63); //Reg85C[31:24]=0x63 - ODM_SetBBReg(pDM_Odm, 0x874, 0xC000, 0x2); //Reg874[15:14]=2'b10 - ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, 0x3); //RegA75[7:4]=0x3 - ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); //Reg818[28]=1'b0 - ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x1); //Reg818[28]=1'b1 - //ODM_RT_TRACE(pDM_Odm, COMP_BB_POWERSAVING, DBG_LOUD, (" RF_Save")); - } - else + } + #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) { - ODM_SetBBReg(pDM_Odm, 0x874 , 0x1CC000, pDM_PSTable->Reg874); - ODM_SetBBReg(pDM_Odm, 0xc70, BIT3, pDM_PSTable->RegC70); - ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, pDM_PSTable->Reg85C); - ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, pDM_PSTable->RegA74); - ODM_SetBBReg(pDM_Odm,0x818, BIT28, 0x0); - - if(pDM_Odm->SupportICType == ODM_RTL8723A) + PADAPTER pAdapter = pDM_Odm->Adapter; + PMGNT_INFO pMgntInfo=&pAdapter->MgntInfo; + + // Select RSSI checking target + if(pMgntInfo->mAssoc && !ACTING_AS_AP(pAdapter)) { - ODM_SetBBReg(pDM_Odm,0x874 , BIT5, 0x0); //Reg874[5]=1b'0 + // Target: Infrastructure mode AP. + //pDM_SWAT_Table->RSSI_target = NULL; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("odm_SwAntDivChkAntSwitch(): RSSI_target is DEF AP!\n")); } - //ODM_RT_TRACE(pDM_Odm, COMP_BB_POWERSAVING, DBG_LOUD, (" RF_Normal")); - } - pDM_PSTable->PreRFState =pDM_PSTable->CurRFState; - } -#endif -} - - -//3============================================================ -//3 RATR MASK -//3============================================================ -//3============================================================ -//3 Rate Adaptive -//3============================================================ - -VOID -odm_RateAdaptiveMaskInit( - IN PDM_ODM_T pDM_Odm - ) -{ - PODM_RATE_ADAPTIVE pOdmRA = &pDM_Odm->RateAdaptive; - -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - PMGNT_INFO pMgntInfo = &pDM_Odm->Adapter->MgntInfo; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pDM_Odm->Adapter); - - pMgntInfo->Ratr_State = DM_RATR_STA_INIT; - - if (pMgntInfo->DM_Type == DM_Type_ByDriver) - pHalData->bUseRAMask = TRUE; - else - pHalData->bUseRAMask = FALSE; - -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - pOdmRA->Type = DM_Type_ByDriver; - if (pOdmRA->Type == DM_Type_ByDriver) - pDM_Odm->bUseRAMask = _TRUE; - else - pDM_Odm->bUseRAMask = _FALSE; -#endif - - pOdmRA->RATRState = DM_RATR_STA_INIT; - pOdmRA->LdpcThres = 35; - pOdmRA->bUseLdpc = FALSE; - pOdmRA->HighRSSIThresh = 50; - pOdmRA->LowRSSIThresh = 20; -} - -#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -VOID -ODM_RateAdaptiveStateApInit( - IN PADAPTER Adapter , - IN PRT_WLAN_STA pEntry - ) -{ - pEntry->Ratr_State = DM_RATR_STA_INIT; -} -#endif - -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -u4Byte ODM_Get_Rate_Bitmap( - IN PDM_ODM_T pDM_Odm, - IN u4Byte macid, - IN u4Byte ra_mask, - IN u1Byte rssi_level) -{ - PSTA_INFO_T pEntry; - u4Byte rate_bitmap = 0; - u1Byte WirelessMode; - //u1Byte WirelessMode =*(pDM_Odm->pWirelessMode); - - - pEntry = pDM_Odm->pODM_StaInfo[macid]; - if(!IS_STA_VALID(pEntry)) - return ra_mask; - - WirelessMode = pEntry->wireless_mode; - - switch(WirelessMode) - { - case ODM_WM_B: - if(ra_mask & 0x0000000c) //11M or 5.5M enable - rate_bitmap = 0x0000000d; else - rate_bitmap = 0x0000000f; - break; - - case (ODM_WM_G): - case (ODM_WM_A): - if(rssi_level == DM_RATR_STA_HIGH) - rate_bitmap = 0x00000f00; - else - rate_bitmap = 0x00000ff0; - break; + { + u1Byte index = 0; + PSTA_INFO_T pEntry = NULL; + PADAPTER pTargetAdapter = NULL; - case (ODM_WM_B|ODM_WM_G): - if(rssi_level == DM_RATR_STA_HIGH) - rate_bitmap = 0x00000f00; - else if(rssi_level == DM_RATR_STA_MIDDLE) - rate_bitmap = 0x00000ff0; - else - rate_bitmap = 0x00000ff5; - break; - - case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G) : - case (ODM_WM_B|ODM_WM_N24G) : - case (ODM_WM_G|ODM_WM_N24G) : - case (ODM_WM_A|ODM_WM_N5G) : - { - if ( pDM_Odm->RFType == ODM_1T2R ||pDM_Odm->RFType == ODM_1T1R) + if(pMgntInfo->mIbss ) { - if(rssi_level == DM_RATR_STA_HIGH) - { - rate_bitmap = 0x000f0000; - } - else if(rssi_level == DM_RATR_STA_MIDDLE) - { - rate_bitmap = 0x000ff000; - } - else{ - if (*(pDM_Odm->pBandWidth) == ODM_BW40M) - rate_bitmap = 0x000ff015; - else - rate_bitmap = 0x000ff005; - } + // Target: AP/IBSS peer. + pTargetAdapter = pAdapter; } else { - if(rssi_level == DM_RATR_STA_HIGH) - { - rate_bitmap = 0x0f8f0000; - } - else if(rssi_level == DM_RATR_STA_MIDDLE) - { - rate_bitmap = 0x0f8ff000; - } - else - { - if (*(pDM_Odm->pBandWidth) == ODM_BW40M) - rate_bitmap = 0x0f8ff015; - else - rate_bitmap = 0x0f8ff005; - } + pTargetAdapter = GetFirstAPAdapter(pAdapter); } - } - break; - - case (ODM_WM_AC|ODM_WM_G): - if(rssi_level == 1) - rate_bitmap = 0xfc3f0000; - else if(rssi_level == 2) - rate_bitmap = 0xfffff000; - else - rate_bitmap = 0xffffffff; - break; - case (ODM_WM_AC|ODM_WM_A): + if(pTargetAdapter != NULL) + { + for(index=0; indexbAssociated) + break; + } + + } + + } - if (pDM_Odm->RFType == RF_1T1R) - { - if(rssi_level == 1) // add by Gary for ac-series - rate_bitmap = 0x003f8000; - else if (rssi_level == 2) - rate_bitmap = 0x003ff000; - else - rate_bitmap = 0x003ff010; - } - else - { - if(rssi_level == 1) // add by Gary for ac-series - rate_bitmap = 0xfe3f8000; // VHT 2SS MCS3~9 - else if (rssi_level == 2) - rate_bitmap = 0xfffff000; // VHT 2SS MCS0~9 + if(pEntry == NULL) + { + ODM_SwAntDivRestAfterLink(pDM_Odm); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): No Link.\n")); + return; + } else - rate_bitmap = 0xfffff010; // All - } - break; - - default: - if(pDM_Odm->RFType == RF_1T2R) - rate_bitmap = 0x000fffff; - else - rate_bitmap = 0x0fffffff; - break; - - } - - //printk("%s ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x \n",__FUNCTION__,rssi_level,WirelessMode,rate_bitmap); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x \n",rssi_level,WirelessMode,rate_bitmap)); - - return (ra_mask&rate_bitmap); - -} -#endif + { + //pDM_SWAT_Table->RSSI_target = pEntry; + pDM_SWAT_Table->RSSI_target = index; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): RSSI_target is PEER STA\n")); + } + }//end if(pMgntInfo->mAssoc && !ACTING_AS_AP(Adapter)) + } + #endif -VOID -odm_RefreshBasicRateMask( - IN PDM_ODM_T pDM_Odm - ) -{ -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - PADAPTER Adapter = pDM_Odm->Adapter; - static u1Byte Stage = 0; - u1Byte CurStage = 0; - OCTET_STRING osRateSet; - PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(Adapter); - u1Byte RateSet[5] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M, MGN_6M}; - - if(pDM_Odm->SupportICType != ODM_RTL8812 && pDM_Odm->SupportICType != ODM_RTL8821 ) + pDM_SWAT_Table->RSSI_cnt_A = 0; + pDM_SWAT_Table->RSSI_cnt_B = 0; + pDM_SWAT_Table->try_flag = 0; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("odm_SwAntDivChkAntSwitch(): Set try_flag to 0 prepare for peak!\n")); return; - - if(pDM_Odm->bLinked == FALSE) // unlink Default port information - CurStage = 0; - else if(pDM_Odm->RSSI_Min < 40) // link RSSI < 40% - CurStage = 1; - else if(pDM_Odm->RSSI_Min > 45) // link RSSI > 45% - CurStage = 3; + } else - CurStage = 2; // link 25% <= RSSI <= 30% - - if(CurStage != Stage) { - if(CurStage == 1) + +// To Fix 8723A SW ANT DIV Bug issue +#if (DM_ODM_SUPPORT_TYPE==ODM_WIN) + if (pDM_Odm->SupportICType & ODM_RTL8723A) { - FillOctetString(osRateSet, RateSet, 5); - FilterSupportRate(pMgntInfo->mBrates, &osRateSet, FALSE); - Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_BASIC_RATE, (pu1Byte)&osRateSet); + curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - pDM_SWAT_Table->lastTxOkCnt; + curRxOkCnt =Adapter->RxStats.NumRxBytesUnicast - pDM_SWAT_Table->lastRxOkCnt; + pDM_SWAT_Table->lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; + pDM_SWAT_Table->lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; } - else if(CurStage == 3 && (Stage == 1 || Stage == 2)) +#else + curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast) - pDM_SWAT_Table->lastTxOkCnt; + curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast) - pDM_SWAT_Table->lastRxOkCnt; + pDM_SWAT_Table->lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); + pDM_SWAT_Table->lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); +#endif + if(pDM_SWAT_Table->try_flag == 1) { - Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_BASIC_RATE, (pu1Byte)(&pMgntInfo->mBrates) ); - } - } - - Stage = CurStage; -#endif -} + if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) + { + pDM_SWAT_Table->TXByteCnt_A += curTxOkCnt; + pDM_SWAT_Table->RXByteCnt_A += curRxOkCnt; + } + else + { + pDM_SWAT_Table->TXByteCnt_B += curTxOkCnt; + pDM_SWAT_Table->RXByteCnt_B += curRxOkCnt; + } + + nextAntenna = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? AUX_ANT : MAIN_ANT; + pDM_SWAT_Table->RSSI_Trying--; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("RSSI_Trying = %d\n",pDM_SWAT_Table->RSSI_Trying)); + if(pDM_SWAT_Table->RSSI_Trying == 0) + { + CurByteCnt = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? (pDM_SWAT_Table->TXByteCnt_A+pDM_SWAT_Table->RXByteCnt_A) : (pDM_SWAT_Table->TXByteCnt_B+pDM_SWAT_Table->RXByteCnt_B); + PreByteCnt = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? (pDM_SWAT_Table->TXByteCnt_B+pDM_SWAT_Table->RXByteCnt_B) : (pDM_SWAT_Table->TXByteCnt_A+pDM_SWAT_Table->RXByteCnt_A); + + if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_HIGH) + //CurByteCnt = PlatformDivision64(CurByteCnt, 9); + PreByteCnt = PreByteCnt*9; + else if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_LOW) + //CurByteCnt = PlatformDivision64(CurByteCnt, 2); + PreByteCnt = PreByteCnt*2; -/*----------------------------------------------------------------------------- - * Function: odm_RefreshRateAdaptiveMask() - * - * Overview: Update rate table mask according to rssi - * - * Input: NONE - * - * Output: NONE - * - * Return: NONE - * - * Revised History: - * When Who Remark - * 05/27/2009 hpfan Create Version 0. - * - *---------------------------------------------------------------------------*/ -VOID -odm_RefreshRateAdaptiveMask( - IN PDM_ODM_T pDM_Odm - ) -{ - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("odm_RefreshRateAdaptiveMask()---------->\n")); - if (!(pDM_Odm->SupportAbility & ODM_BB_RA_MASK)) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("odm_RefreshRateAdaptiveMask(): Return cos not supported\n")); - return; - } - // - // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate - // at the same time. In the stage2/3, we need to prive universal interface and merge all - // HW dynamic mechanism. - // - switch (pDM_Odm->SupportPlatform) - { - case ODM_WIN: - odm_RefreshRateAdaptiveMaskMP(pDM_Odm); - break; - - case ODM_CE: - odm_RefreshRateAdaptiveMaskCE(pDM_Odm); - break; - - case ODM_AP: - case ODM_ADSL: - odm_RefreshRateAdaptiveMaskAPADSL(pDM_Odm); - break; - } - -} - -VOID -odm_RefreshRateAdaptiveMaskMP( - IN PDM_ODM_T pDM_Odm - ) -{ -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - PADAPTER pAdapter = pDM_Odm->Adapter; - PADAPTER pTargetAdapter = NULL; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(pAdapter); - PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive; - - if(pAdapter->bDriverStopped) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n")); - return; - } - - if(!pHalData->bUseRAMask) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n")); - return; - } + if(pDM_SWAT_Table->RSSI_cnt_A > 0) + RSSI_A = pDM_SWAT_Table->RSSI_sum_A/pDM_SWAT_Table->RSSI_cnt_A; + else + RSSI_A = 0; + if(pDM_SWAT_Table->RSSI_cnt_B > 0) + RSSI_B = pDM_SWAT_Table->RSSI_sum_B/pDM_SWAT_Table->RSSI_cnt_B; + else + RSSI_B = 0; + curRSSI = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? RSSI_A : RSSI_B; + pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? RSSI_B : RSSI_A; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Luke:PreRSSI = %d, CurRSSI = %d\n",pDM_SWAT_Table->PreRSSI, curRSSI)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: preAntenna= %s, curAntenna= %s \n", + (pDM_SWAT_Table->PreAntenna == MAIN_ANT?"MAIN":"AUX"), (pDM_SWAT_Table->CurAntenna == MAIN_ANT?"MAIN":"AUX"))); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Luke:RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", + RSSI_A, pDM_SWAT_Table->RSSI_cnt_A, RSSI_B, pDM_SWAT_Table->RSSI_cnt_B)); + } - // if default port is connected, update RA table for default port (infrastructure mode only) - if(pMgntInfo->mAssoc && (!ACTING_AS_AP(pAdapter))) - { - - if(pHalData->UndecoratedSmoothedPWDB < pRA->LdpcThres) - { - pRA->bUseLdpc = TRUE; - pRA->bLowerRtsRate = TRUE; - if((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A)) - MgntSet_TX_LDPC(pAdapter,0,TRUE); - //DbgPrint("RSSI=%d, bUseLdpc = TRUE\n", pHalData->UndecoratedSmoothedPWDB); } - else if(pHalData->UndecoratedSmoothedPWDB > (pRA->LdpcThres-5)) + else { - pRA->bUseLdpc = FALSE; - pRA->bLowerRtsRate = FALSE; - if((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A)) - MgntSet_TX_LDPC(pAdapter,0,FALSE); - //DbgPrint("RSSI=%d, bUseLdpc = FALSE\n", pHalData->UndecoratedSmoothedPWDB); + + if(pDM_SWAT_Table->RSSI_cnt_A > 0) + RSSI_A = pDM_SWAT_Table->RSSI_sum_A/pDM_SWAT_Table->RSSI_cnt_A; + else + RSSI_A = 0; + if(pDM_SWAT_Table->RSSI_cnt_B > 0) + RSSI_B = pDM_SWAT_Table->RSSI_sum_B/pDM_SWAT_Table->RSSI_cnt_B; + else + RSSI_B = 0; + curRSSI = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? RSSI_A : RSSI_B; + pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->PreAntenna == MAIN_ANT)? RSSI_A : RSSI_B; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ekul:PreRSSI = %d, CurRSSI = %d\n", pDM_SWAT_Table->PreRSSI, curRSSI)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: preAntenna= %s, curAntenna= %s \n", + (pDM_SWAT_Table->PreAntenna == MAIN_ANT?"MAIN":"AUX"), (pDM_SWAT_Table->CurAntenna == MAIN_ANT?"MAIN":"AUX"))); + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ekul:RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", + RSSI_A, pDM_SWAT_Table->RSSI_cnt_A, RSSI_B, pDM_SWAT_Table->RSSI_cnt_B)); + //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curTxOkCnt = %d\n", curTxOkCnt)); + //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curRxOkCnt = %d\n", curRxOkCnt)); } - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("odm_RefreshRateAdaptiveMask(): Infrasture Mode\n")); - if( ODM_RAStateCheck(pDM_Odm, pHalData->UndecoratedSmoothedPWDB, pMgntInfo->bSetTXPowerTrainingByOid, &pMgntInfo->Ratr_State) ) + + //1 Trying State + if((pDM_SWAT_Table->try_flag == 1)&&(pDM_SWAT_Table->RSSI_Trying == 0)) { - ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pHalData->UndecoratedSmoothedPWDB, pMgntInfo->Ratr_State)); - pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, pMgntInfo->Ratr_State); - } - } - // - // The following part configure AP/VWifi/IBSS rate adaptive mask. - // + if(pDM_SWAT_Table->TestMode == TP_MODE) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: TestMode = TP_MODE")); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("TRY:CurByteCnt = %lld,", CurByteCnt)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("TRY:PreByteCnt = %lld\n",PreByteCnt)); + if(CurByteCnt < PreByteCnt) + { + if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) + pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; + else + pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; + } + else + { + if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) + pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; + else + pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; + } + for (i= 0; i<8; i++) + { + if(((pDM_SWAT_Table->SelectAntennaMap>>i)&BIT0) == 1) + Score_A++; + else + Score_B++; + } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SelectAntennaMap=%x\n ",pDM_SWAT_Table->SelectAntennaMap)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Score_A=%d, Score_B=%d\n", Score_A, Score_B)); + + if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) + { + nextAntenna = (Score_A > Score_B)?MAIN_ANT:AUX_ANT; + } + else + { + nextAntenna = (Score_B > Score_A)?AUX_ANT:MAIN_ANT; + } + //RT_TRACE(COMP_SWAS, DBG_LOUD, ("nextAntenna=%s\n",(nextAntenna==Antenna_A)?"A":"B")); + //RT_TRACE(COMP_SWAS, DBG_LOUD, ("preAntenna= %s, curAntenna= %s \n", + //(DM_SWAT_Table.PreAntenna == Antenna_A?"A":"B"), (DM_SWAT_Table.CurAntenna == Antenna_A?"A":"B"))); - if(pMgntInfo->mIbss) // Target: AP/IBSS peer. - pTargetAdapter = GetDefaultAdapter(pAdapter); - else - pTargetAdapter = GetFirstAPAdapter(pAdapter); + if(nextAntenna != pDM_SWAT_Table->CurAntenna) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: Switch back to another antenna")); + } + else + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: current anntena is good\n")); + } + } - // if extension port (softap) is started, updaet RA table for more than one clients associate - if(pTargetAdapter != NULL) - { - int i; - PRT_WLAN_STA pEntry; + if(pDM_SWAT_Table->TestMode == RSSI_MODE) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: TestMode = RSSI_MODE")); + pDM_SWAT_Table->SelectAntennaMap=0xAA; + if(curRSSI < pDM_SWAT_Table->PreRSSI) //Current antenna is worse than previous antenna + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: Switch back to another antenna")); + nextAntenna = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? AUX_ANT : MAIN_ANT; + } + else // current anntena is good + { + nextAntenna =pDM_SWAT_Table->CurAntenna; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: current anntena is good\n")); + } + } + pDM_SWAT_Table->try_flag = 0; + pDM_Odm->RSSI_test = FALSE; + pDM_SWAT_Table->RSSI_sum_A = 0; + pDM_SWAT_Table->RSSI_cnt_A = 0; + pDM_SWAT_Table->RSSI_sum_B = 0; + pDM_SWAT_Table->RSSI_cnt_B = 0; + pDM_SWAT_Table->TXByteCnt_A = 0; + pDM_SWAT_Table->TXByteCnt_B = 0; + pDM_SWAT_Table->RXByteCnt_A = 0; + pDM_SWAT_Table->RXByteCnt_B = 0; + + } - for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) + //1 Normal State + else if(pDM_SWAT_Table->try_flag == 0) { - pEntry = AsocEntry_EnumStation(pTargetAdapter, i); - if(NULL != pEntry) + if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_HIGH) { - if(pEntry->bAssociated) + if ((curTxOkCnt+curRxOkCnt) > 3750000)//if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000) + pDM_SWAT_Table->TrafficLoad = TRAFFIC_HIGH; + else + pDM_SWAT_Table->TrafficLoad = TRAFFIC_LOW; + } + else if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_LOW) { - if(ODM_RAStateCheck(pDM_Odm, pEntry->rssi_stat.UndecoratedSmoothedPWDB, pMgntInfo->bSetTXPowerTrainingByOid, &pEntry->Ratr_State) ) - { - ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), pEntry->MacAddr); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pEntry->rssi_stat.UndecoratedSmoothedPWDB, pEntry->Ratr_State)); - pAdapter->HalFunc.UpdateHalRAMaskHandler(pTargetAdapter, pEntry->AssociatedMacId, pEntry, pEntry->Ratr_State); - } + if ((curTxOkCnt+curRxOkCnt) > 3750000) //if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000) + pDM_SWAT_Table->TrafficLoad = TRAFFIC_HIGH; + else + pDM_SWAT_Table->TrafficLoad = TRAFFIC_LOW; + } + if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_HIGH) + pDM_SWAT_Table->bTriggerAntennaSwitch = 0; + //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Normal:TrafficLoad = %llu\n", curTxOkCnt+curRxOkCnt)); + + //Prepare To Try Antenna + nextAntenna = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? AUX_ANT : MAIN_ANT; + pDM_SWAT_Table->try_flag = 1; + pDM_Odm->RSSI_test = TRUE; + if((curRxOkCnt+curTxOkCnt) > 1000) + { + pDM_SWAT_Table->RSSI_Trying = 4; + pDM_SWAT_Table->TestMode = TP_MODE; } + else + { + pDM_SWAT_Table->RSSI_Trying = 2; + pDM_SWAT_Table->TestMode = RSSI_MODE; + } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: Normal State -> Begin Trying!\n")); + + + pDM_SWAT_Table->RSSI_sum_A = 0; + pDM_SWAT_Table->RSSI_cnt_A = 0; + pDM_SWAT_Table->RSSI_sum_B = 0; + pDM_SWAT_Table->RSSI_cnt_B = 0; } } - if(pMgntInfo->bSetTXPowerTrainingByOid) - pMgntInfo->bSetTXPowerTrainingByOid = FALSE; -#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -} - - -VOID -odm_RefreshRateAdaptiveMaskCE( - IN PDM_ODM_T pDM_Odm - ) -{ -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) - u1Byte i; - PADAPTER pAdapter = pDM_Odm->Adapter; - PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive; - - if(pAdapter->bDriverStopped) + //1 4.Change TRX antenna + if(nextAntenna != pDM_SWAT_Table->CurAntenna) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n")); - return; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: Change TX Antenna!\n ")); + //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, nextAntenna); + #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + ODM_SetAntenna(pDM_Odm,nextAntenna); + #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) + { + BOOLEAN bEnqueue; + bEnqueue = (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)?FALSE :TRUE; + rtw_antenna_select_cmd(pDM_Odm->Adapter, nextAntenna, bEnqueue); + } + #endif + } - if(!pDM_Odm->bUseRAMask) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n")); - return; - } + //1 5.Reset Statistics + pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; + pDM_SWAT_Table->CurAntenna = nextAntenna; + pDM_SWAT_Table->PreRSSI = curRSSI; - //printk("==> %s \n",__FUNCTION__); + //1 6.Set next timer + { + //PADAPTER pAdapter = pDM_Odm->Adapter; + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + - for(i=0; ipODM_StaInfo[i]; - if(IS_STA_VALID(pstat) ) { - if(IS_MCAST( pstat->hwaddr)) //if(psta->mac_id ==1) - continue; - if(IS_MCAST( pstat->hwaddr)) - continue; + if(pDM_SWAT_Table->RSSI_Trying == 0) + return; - #if((RTL8812A_SUPPORT==1)||(RTL8821A_SUPPORT==1)) - if((pDM_Odm->SupportICType == ODM_RTL8812)||(pDM_Odm->SupportICType == ODM_RTL8821)) + if(pDM_SWAT_Table->RSSI_Trying%2 == 0) + { + if(pDM_SWAT_Table->TestMode == TP_MODE) + { + if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_HIGH) { - if(pstat->rssi_stat.UndecoratedSmoothedPWDB < pRA->LdpcThres) - { - pRA->bUseLdpc = TRUE; - pRA->bLowerRtsRate = TRUE; - if((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A)) - Set_RA_LDPC_8812(pstat, TRUE); - //DbgPrint("RSSI=%d, bUseLdpc = TRUE\n", pHalData->UndecoratedSmoothedPWDB); - } - else if(pstat->rssi_stat.UndecoratedSmoothedPWDB > (pRA->LdpcThres-5)) - { - pRA->bUseLdpc = FALSE; - pRA->bLowerRtsRate = FALSE; - if((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A)) - Set_RA_LDPC_8812(pstat, FALSE); - //DbgPrint("RSSI=%d, bUseLdpc = FALSE\n", pHalData->UndecoratedSmoothedPWDB); - } - } - #endif - - if( TRUE == ODM_RAStateCheck(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, FALSE , &pstat->rssi_level) ) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level)); - //printk("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level); - rtw_hal_update_ra_mask(pstat, pstat->rssi_level); + ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 10 ); //ms + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dm_SW_AntennaSwitch(): Test another antenna for 10 ms\n")); } - - } - } - -#endif -} - -VOID -odm_RefreshRateAdaptiveMaskAPADSL( - IN PDM_ODM_T pDM_Odm - ) -{ -#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - struct rtl8192cd_priv *priv = pDM_Odm->priv; - struct stat_info *pstat; - - if (!priv->pmib->dot11StationConfigEntry.autoRate) - return; - - if (list_empty(&priv->asoc_list)) - return; - - list_for_each_entry(pstat, &priv->asoc_list, asoc_list) { - if(ODM_RAStateCheck(pDM_Odm, (s4Byte)pstat->rssi, FALSE, &pstat->rssi_level) ) { - ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), pstat->hwaddr); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi, pstat->rssi_level)); - -#ifdef CONFIG_RTL_88E_SUPPORT - if (GET_CHIP_VER(priv)==VERSION_8188E) { -#ifdef TXREPORT - add_RATid(priv, pstat); -#endif - } else -#endif + else if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_LOW) { -#if defined(CONFIG_RTL_92D_SUPPORT) || defined(CONFIG_RTL_92C_SUPPORT) - add_update_RATid(priv, pstat); -#endif - } - } - } -#endif -} - -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -VOID -ODM_DynamicARFBSelect( - IN PDM_ODM_T pDM_Odm, - IN u1Byte rate, - IN BOOLEAN Collision_State -) -{ - - if(pDM_Odm->SupportICType != ODM_RTL8192E) - return; - - if (rate >= DESC_RATEMCS8 && rate <= DESC_RATEMCS12){ - if (Collision_State == 1){ - if(rate == DESC_RATEMCS12){ - - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060501); - } - else if(rate == DESC_RATEMCS11){ - - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07070605); - } - else if(rate == DESC_RATEMCS10){ - - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08080706); - } - else if(rate == DESC_RATEMCS9){ - - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08080707); - } - else{ - - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09090808); - } - } - else{ // Collision_State == 0 - if(rate == DESC_RATEMCS12){ - - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x05010000); - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080706); - } - else if(rate == DESC_RATEMCS11){ - - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x06050000); - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080807); - } - else if(rate == DESC_RATEMCS10){ - - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x07060000); - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0a090908); - } - else if(rate == DESC_RATEMCS9){ - - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x07070000); - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0a090808); - } - else{ - - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x08080000); - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0b0a0909); - } - } - } - else{ // MCS13~MCS15, 1SS, G-mode - if (Collision_State == 1){ - if(rate == DESC_RATEMCS15){ - - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000); - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x05040302); - } - else if(rate == DESC_RATEMCS14){ - - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000); - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x06050302); - } - else if(rate == DESC_RATEMCS13){ - - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000); - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060502); - } - else{ - - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000); - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x06050402); + ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 50 ); //ms + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dm_SW_AntennaSwitch(): Test another antenna for 50 ms\n")); } } - else{ // Collision_State == 0 - if(rate == DESC_RATEMCS15){ - - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x03020000); - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060504); - } - else if(rate == DESC_RATEMCS14){ - - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x03020000); - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08070605); - } - else if(rate == DESC_RATEMCS13){ - - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x05020000); - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080706); - } - else{ - - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x04020000); - ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08070605); - } - - + else + { + ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 500 ); //ms + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dm_SW_AntennaSwitch(): Test another antenna for 500 ms\n")); } - - } - -} - -#endif - -// Return Value: BOOLEAN -// - TRUE: RATRState is changed. -BOOLEAN -ODM_RAStateCheck( - IN PDM_ODM_T pDM_Odm, - IN s4Byte RSSI, - IN BOOLEAN bForceUpdate, - OUT pu1Byte pRATRState - ) -{ - PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive; - const u1Byte GoUpGap = 5; - u1Byte HighRSSIThreshForRA = pRA->HighRSSIThresh; - u1Byte LowRSSIThreshForRA = pRA->LowRSSIThresh; - u1Byte RATRState; - - // Threshold Adjustment: - // when RSSI state trends to go up one or two levels, make sure RSSI is high enough. - // Here GoUpGap is added to solve the boundary's level alternation issue. - switch (*pRATRState) - { - case DM_RATR_STA_INIT: - case DM_RATR_STA_HIGH: - break; - - case DM_RATR_STA_MIDDLE: - HighRSSIThreshForRA += GoUpGap; - break; - - case DM_RATR_STA_LOW: - HighRSSIThreshForRA += GoUpGap; - LowRSSIThreshForRA += GoUpGap; - break; - - default: - ODM_RT_ASSERT(pDM_Odm, FALSE, ("wrong rssi level setting %d !", *pRATRState) ); - break; } - - // Decide RATRState by RSSI. - if(RSSI > HighRSSIThreshForRA) - RATRState = DM_RATR_STA_HIGH; - else if(RSSI > LowRSSIThreshForRA) - RATRState = DM_RATR_STA_MIDDLE; else - RATRState = DM_RATR_STA_LOW; - //printk("==>%s,RATRState:0x%02x ,RSSI:%d \n",__FUNCTION__,RATRState,RSSI); - - if( *pRATRState!=RATRState || bForceUpdate) { - ODM_RT_TRACE( pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI Level %d -> %d\n", *pRATRState, RATRState) ); - *pRATRState = RATRState; - return TRUE; + if(pDM_SWAT_Table->TestMode == TP_MODE) + { + if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_HIGH) + ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 90 ); //ms + else if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_LOW) + ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 100 ); //ms + } + else + ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 500 ); //ms } - - return FALSE; + } +#endif // #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) +#endif // #if (RTL8192C_SUPPORT==1) } -//============================================================ +// Remove odm_SwAntDivSelectScanChnl() and odm_SwAntDivConstructScanChnl() to odm_PathDiv.c -//3============================================================ -//3 Dynamic Tx Power -//3============================================================ -VOID -odm_DynamicTxPowerInit( - IN PDM_ODM_T pDM_Odm - ) -{ +// +// 20100514 Luke/Joseph: +// Callback function for 500ms antenna test trying. +// #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - PADAPTER Adapter = pDM_Odm->Adapter; - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - #if DEV_BUS_TYPE==RT_USB_INTERFACE - if(RT_GetInterfaceSelection(Adapter) == INTF_SEL1_USB_High_Power) - { - odm_DynamicTxPowerSavePowerIndex(pDM_Odm); - pMgntInfo->bDynamicTxPowerEnable = TRUE; - } - else - #else - //so 92c pci do not need dynamic tx power? vivi check it later - if(IS_HARDWARE_TYPE_8192D(Adapter)) - pMgntInfo->bDynamicTxPowerEnable = TRUE; - else - pMgntInfo->bDynamicTxPowerEnable = FALSE; - #endif - - - pHalData->LastDTPLvl = TxHighPwrLevel_Normal; - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - PADAPTER Adapter = pDM_Odm->Adapter; +VOID +odm_SwAntDivChkAntSwitchCallback( + PRT_TIMER pTimer +) +{ + PADAPTER Adapter = (PADAPTER)pTimer->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - pdmpriv->bDynamicTxPowerEnable = _FALSE; - - #if (RTL8192C_SUPPORT==1) - #ifdef CONFIG_USB_HCI + pSWAT_T pDM_SWAT_Table = &pHalData->DM_OutSrc.DM_SWAT_Table; - #ifdef CONFIG_INTEL_PROXIM - if((pHalData->BoardType == BOARD_USB_High_PA)||(Adapter->proximity.proxim_support==_TRUE)) + #if DEV_BUS_TYPE==RT_PCI_INTERFACE + #if USE_WORKITEM + ODM_ScheduleWorkItem(&pDM_SWAT_Table->SwAntennaSwitchWorkitem); #else - if(pHalData->BoardType == BOARD_USB_High_PA) + odm_SwAntDivChkAntSwitch(&pHalData->DM_OutSrc, SWAW_STEP_DETERMINE); #endif - - { - //odm_SavePowerIndex(Adapter); - odm_DynamicTxPowerSavePowerIndex(pDM_Odm); - pdmpriv->bDynamicTxPowerEnable = _TRUE; - } - else #else - pdmpriv->bDynamicTxPowerEnable = _FALSE; - #endif + ODM_ScheduleWorkItem(&pDM_SWAT_Table->SwAntennaSwitchWorkitem); #endif - pdmpriv->LastDTPLvl = TxHighPwrLevel_Normal; - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - -#endif - } - VOID -odm_DynamicTxPowerSavePowerIndex( - IN PDM_ODM_T pDM_Odm - ) -{ - u1Byte index; - u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; - -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - for(index = 0; index< 6; index++) - pHalData->PowerIndex_backup[index] = PlatformEFIORead1Byte(Adapter, Power_Index_REG[index]); -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - for(index = 0; index< 6; index++) - pdmpriv->PowerIndex_backup[index] = rtw_read8(Adapter, Power_Index_REG[index]); -#endif -} +odm_SwAntDivChkAntSwitchWorkitemCallback( + IN PVOID pContext + ) +{ -VOID -odm_DynamicTxPowerRestorePowerIndex( - IN PDM_ODM_T pDM_Odm - ) + PADAPTER pAdapter = (PADAPTER)pContext; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + odm_SwAntDivChkAntSwitch(&pHalData->DM_OutSrc, SWAW_STEP_DETERMINE); + +} +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) +VOID odm_SwAntDivChkAntSwitchCallback(void *FunctionContext) { - u1Byte index; - PADAPTER Adapter = pDM_Odm->Adapter; + PDM_ODM_T pDM_Odm= (PDM_ODM_T)FunctionContext; + PADAPTER padapter = pDM_Odm->Adapter; + if(padapter->net_closed == _TRUE) + return; + odm_SwAntDivChkAntSwitch(pDM_Odm, SWAW_STEP_DETERMINE); +} +#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) +VOID odm_SwAntDivChkAntSwitchCallback(void *FunctionContext) +{ + PDM_ODM_T pDM_Odm= (PDM_ODM_T)FunctionContext; + odm_SwAntDivChkAntSwitch(pDM_Odm, SWAW_STEP_DETERMINE); +} +#endif -#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; +#else //#if(defined(CONFIG_SW_ANTENNA_DIVERSITY)) + +VOID odm_SwAntDivInit( IN PDM_ODM_T pDM_Odm ) {} +VOID ODM_SwAntDivChkPerPktRssi( + IN PDM_ODM_T pDM_Odm, + IN u1Byte StationID, + IN PODM_PHY_INFO_T pPhyInfo + ) {} +VOID odm_SwAntDivChkAntSwitch( + IN PDM_ODM_T pDM_Odm, + IN u1Byte Step + ) {} +VOID ODM_SwAntDivResetBeforeLink( IN PDM_ODM_T pDM_Odm ){} +VOID ODM_SwAntDivRestAfterLink( IN PDM_ODM_T pDM_Odm ){} +VOID odm_SwAntDetectInit( IN PDM_ODM_T pDM_Odm){} #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - for(index = 0; index< 6; index++) - PlatformEFIOWrite1Byte(Adapter, Power_Index_REG[index], pHalData->PowerIndex_backup[index]); -#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) - struct dm_priv *pdmpriv = &pHalData->dmpriv; - for(index = 0; index< 6; index++) - rtw_write8(Adapter, Power_Index_REG[index], pdmpriv->PowerIndex_backup[index]); -#endif +VOID odm_SwAntDivChkAntSwitchCallback( PRT_TIMER pTimer){} +VOID odm_SwAntDivChkAntSwitchWorkitemCallback( IN PVOID pContext ){} +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) +VOID odm_SwAntDivChkAntSwitchCallback(void *FunctionContext){} +#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) +VOID odm_SwAntDivChkAntSwitchCallback(void *FunctionContext){} #endif -} - -VOID -odm_DynamicTxPowerWritePowerIndex( - IN PDM_ODM_T pDM_Odm, - IN u1Byte Value) -{ - u1Byte index; - u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; - - for(index = 0; index< 6; index++) - //PlatformEFIOWrite1Byte(Adapter, Power_Index_REG[index], Value); - ODM_Write1Byte(pDM_Odm, Power_Index_REG[index], Value); +#endif //#if(defined(CONFIG_SW_ANTENNA_DIVERSITY)) -} -VOID -odm_DynamicTxPower( +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +BOOLEAN +ODM_SwAntDivCheckBeforeLink( IN PDM_ODM_T pDM_Odm ) { - // - // For AP/ADSL use prtl8192cd_priv - // For CE/NIC use PADAPTER - // - //PADAPTER pAdapter = pDM_Odm->Adapter; -// prtl8192cd_priv priv = pDM_Odm->priv; - if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR)) - return; +#if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) - // - // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate - // at the same time. In the stage2/3, we need to prive universal interface and merge all - // HW dynamic mechanism. - // - switch (pDM_Odm->SupportPlatform) - { - case ODM_WIN: - case ODM_CE: - odm_DynamicTxPowerNIC(pDM_Odm); - break; - case ODM_AP: - odm_DynamicTxPowerAP(pDM_Odm); - break; - - case ODM_ADSL: - //odm_DIGAP(pDM_Odm); - break; - } + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE* pHalData = GET_HAL_DATA(Adapter); + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; + s1Byte Score = 0; + PRT_WLAN_BSS pTmpBssDesc, pTestBssDesc; + s4Byte power_diff = 0, power_target = 10; + u1Byte index, counter = 0; + static u1Byte ScanChannel; + u8Byte tStamp_diff = 0; - -} + if (pDM_Odm->Adapter == NULL) //For BSOD when plug/unplug fast. //By YJ,120413 + { // The ODM structure is not initialized. + return FALSE; + } -VOID -odm_DynamicTxPowerNIC( - IN PDM_ODM_T pDM_Odm - ) -{ - if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR)) - return; - -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) + // Retrieve antenna detection registry info, added by Roger, 2012.11.27. + if(!IS_ANT_DETECT_SUPPORT_RSSI(Adapter)) + return FALSE; - if(pDM_Odm->SupportICType == ODM_RTL8192C) + // Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF. + PlatformAcquireSpinLock(Adapter, RT_RF_STATE_SPINLOCK); + if(pHalData->eRFPowerState!=eRfOn || pMgntInfo->RFChangeInProgress || pMgntInfo->bMediaConnect) { - odm_DynamicTxPower_92C(pDM_Odm); + PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, + ("ODM_SwAntDivCheckBeforeLink(): RFChangeInProgress(%x), eRFPowerState(%x)\n", + pMgntInfo->RFChangeInProgress, pHalData->eRFPowerState)); + + pDM_SWAT_Table->SWAS_NoLink_State = 0; + + return FALSE; } - else if(pDM_Odm->SupportICType == ODM_RTL8192D) + else { - odm_DynamicTxPower_92D(pDM_Odm); + PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); } - else if (pDM_Odm->SupportICType == ODM_RTL8821) + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("pDM_SWAT_Table->SWAS_NoLink_State = %d\n", pDM_SWAT_Table->SWAS_NoLink_State)); + //1 Run AntDiv mechanism "Before Link" part. + if(pDM_SWAT_Table->SWAS_NoLink_State == 0) { -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) - PADAPTER Adapter = pDM_Odm->Adapter; - PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(Adapter); - - if (pMgntInfo->RegRspPwr == 1) - { - if(pDM_Odm->RSSI_Min > 60) - { - ODM_SetMACReg(pDM_Odm, ODM_REG_RESP_TX_11AC, BIT20|BIT19|BIT18, 1); // Resp TXAGC offset = -3dB - - } - else if(pDM_Odm->RSSI_Min < 55) - { - ODM_SetMACReg(pDM_Odm, ODM_REG_RESP_TX_11AC, BIT20|BIT19|BIT18, 0); // Resp TXAGC offset = 0dB - } - } -#endif - } -#endif -} - -VOID -odm_DynamicTxPowerAP( - IN PDM_ODM_T pDM_Odm - - ) -{ -#if (DM_ODM_SUPPORT_TYPE == ODM_AP) - prtl8192cd_priv priv = pDM_Odm->priv; - s4Byte i; + //1 Prepare to do Scan again to check current antenna state. - if(!priv->pshare->rf_ft_var.tx_pwr_ctrl) - return; + // Set check state to next step. + pDM_SWAT_Table->SWAS_NoLink_State = 1; -#ifdef HIGH_POWER_EXT_PA - if(pDM_Odm->ExtPA) - tx_power_control(priv); -#endif - - /* - * Check if station is near by to use lower tx power - */ - - if ((priv->up_time % 3) == 0 ) { - for(i=0; ipODM_StaInfo[i]; - if(IS_STA_VALID(pstat) ) { - if ((pstat->hp_level == 0) && (pstat->rssi > TX_POWER_NEAR_FIELD_THRESH_AP+4)) - pstat->hp_level = 1; - else if ((pstat->hp_level == 1) && (pstat->rssi < TX_POWER_NEAR_FIELD_THRESH_AP)) - pstat->hp_level = 0; - } - } - } - -#endif -} - - -VOID -odm_DynamicTxPower_92C( - IN PDM_ODM_T pDM_Odm - ) -{ -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - PADAPTER Adapter = pDM_Odm->Adapter; - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - s4Byte UndecoratedSmoothedPWDB; - - // 2012/01/12 MH According to Luke's suggestion, only high power will support the feature. - if (pDM_Odm->ExtPA == FALSE) - return; - - // STA not connected and AP not connected - if((!pMgntInfo->bMediaConnect) && - (pHalData->EntryMinUndecoratedSmoothedPWDB == 0)) - { - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("Not connected to any \n")); - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - - //the LastDTPlvl should reset when disconnect, - //otherwise the tx power level wouldn't change when disconnect and connect again. - // Maddest 20091220. - pHalData->LastDTPLvl=TxHighPwrLevel_Normal; - return; - } + // Copy Current Scan list. + pMgntInfo->tmpNumBssDesc = pMgntInfo->NumBssDesc; + PlatformMoveMemory((PVOID)Adapter->MgntInfo.tmpbssDesc, (PVOID)pMgntInfo->bssDesc, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC); + + // Go back to scan function again. + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Scan one more time\n")); + pMgntInfo->ScanStep=0; + pMgntInfo->bScanAntDetect = TRUE; + ScanChannel = odm_SwAntDivSelectScanChnl(Adapter); -#if (INTEL_PROXIMITY_SUPPORT == 1) - // Intel set fixed tx power - if(pMgntInfo->IntelProximityModeInfo.PowerOutput > 0) - { - switch(pMgntInfo->IntelProximityModeInfo.PowerOutput){ - case 1: - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_100; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_100\n")); - break; - case 2: - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_70; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_70\n")); - break; - case 3: - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_50; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_50\n")); - break; - case 4: - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_35; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_35\n")); - break; - case 5: - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_15; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_15\n")); - break; - default: - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_100; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_100\n")); - break; - } - } - else -#endif - { - if( (pMgntInfo->bDynamicTxPowerEnable != TRUE) || - (pHalData->DMFlag & HAL_DM_HIPWR_DISABLE) || - pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - } - else + + if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8821)) { - if(pMgntInfo->bMediaConnect) // Default port + if(pDM_FatTable->RxIdleAnt == MAIN_ANT) + ODM_UpdateRxIdleAnt(pDM_Odm, AUX_ANT); + else + ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); + if(ScanChannel == 0) { - if(ACTING_AS_AP(Adapter) || ACTING_AS_IBSS(Adapter)) + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, + ("ODM_SwAntDivCheckBeforeLink(): No AP List Avaiable, Using Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"AUX_ANT":"MAIN_ANT")); + + if(IS_5G_WIRELESS_MODE(pMgntInfo->dot11CurrentWirelessMode)) { - UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + pDM_SWAT_Table->Ant5G = pDM_FatTable->RxIdleAnt; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant5G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); } else { - UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + pDM_SWAT_Table->Ant2G = pDM_FatTable->RxIdleAnt; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant2G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); } + return FALSE; } - else // associated entry pwdb - { - UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } - - if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); - } - else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && - (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, + ("ODM_SwAntDivCheckBeforeLink: Change to %s for testing.\n", ((pDM_FatTable->RxIdleAnt == MAIN_ANT)?"MAIN_ANT":"AUX_ANT"))); + } + else if(pDM_Odm->SupportICType & (ODM_RTL8192C|ODM_RTL8723B)) + { + // Switch Antenna to another one. + pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; + pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==MAIN_ANT)?AUX_ANT:MAIN_ANT; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, + ("ODM_SwAntDivCheckBeforeLink: Change to Ant(%s) for testing.\n", (pDM_SWAT_Table->CurAntenna==MAIN_ANT)?"MAIN":"AUX")); + //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna); + if(pDM_Odm->SupportICType == ODM_RTL8192C) { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); + pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); + ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); } - else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) + else if(pDM_Odm->SupportICType == ODM_RTL8723B) { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); + pDM_SWAT_Table->SWAS_NoLink_BK_Reg92c = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg92c & 0xfffffffc) | (pDM_SWAT_Table->CurAntenna)); + ODM_SetBBReg(pDM_Odm, rfe_ctrl_anta_src, 0xff, 0x77); + ODM_SetBBReg(pDM_Odm, rDPDT_control, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg92c); } } + + odm_SwAntDivConstructScanChnl(Adapter, ScanChannel); + PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5); + + return TRUE; } - if( pHalData->DynamicTxHighPowerLvl != pHalData->LastDTPLvl ) + else { - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192C() Channel = %d \n" , pHalData->CurrentChannel)); - PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); - if( (pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal) && - (pHalData->LastDTPLvl == TxHighPwrLevel_Level1 || pHalData->LastDTPLvl == TxHighPwrLevel_Level2)) //TxHighPwrLevel_Normal - odm_DynamicTxPowerRestorePowerIndex(pDM_Odm); - else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) - odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x14); - else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) - odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x10); - } - pHalData->LastDTPLvl = pHalData->DynamicTxHighPowerLvl; - - -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - - #if (RTL8192C_SUPPORT==1) - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); - struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; - int UndecoratedSmoothedPWDB; + //1 ScanComple() is called after antenna swiched. + //1 Check scan result and determine which antenna is going + //1 to be used. - if(!pdmpriv->bDynamicTxPowerEnable) - return; + for(index = 0; index < pMgntInfo->tmpNumBssDesc; index++) + { + pTmpBssDesc = &(pMgntInfo->tmpbssDesc[index]); // Antenna 1 + pTestBssDesc = &(pMgntInfo->bssDesc[index]); // Antenna 2 -#ifdef CONFIG_INTEL_PROXIM - if(Adapter->proximity.proxim_on== _TRUE){ - struct proximity_priv *prox_priv=Adapter->proximity.proximity_priv; - // Intel set fixed tx power - printk("\n %s Adapter->proximity.proxim_on=%d prox_priv->proxim_modeinfo->power_output=%d \n",__FUNCTION__,Adapter->proximity.proxim_on,prox_priv->proxim_modeinfo->power_output); - if(prox_priv!=NULL){ - if(prox_priv->proxim_modeinfo->power_output> 0) + if(PlatformCompareMemory(pTestBssDesc->bdBssIdBuf, pTmpBssDesc->bdBssIdBuf, 6)!=0) { - switch(prox_priv->proxim_modeinfo->power_output) - { - case 1: - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_100; - printk("TxHighPwrLevel_100\n"); - break; - case 2: - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_70; - printk("TxHighPwrLevel_70\n"); - break; - case 3: - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_50; - printk("TxHighPwrLevel_50\n"); - break; - case 4: - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_35; - printk("TxHighPwrLevel_35\n"); - break; - case 5: - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_15; - printk("TxHighPwrLevel_15\n"); - break; - default: - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_100; - printk("TxHighPwrLevel_100\n"); - break; - } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): ERROR!! This shall not happen.\n")); + continue; } - } - } - else -#endif - { - // STA not connected and AP not connected - if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) && - (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) - { - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("Not connected to any \n")); - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - //the LastDTPlvl should reset when disconnect, - //otherwise the tx power level wouldn't change when disconnect and connect again. - // Maddest 20091220. - pdmpriv->LastDTPLvl=TxHighPwrLevel_Normal; - return; - } - - if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) // Default port - { - #if 0 - //todo: AP Mode - if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || - (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) + if(pDM_Odm->SupportICType != ODM_RTL8723B) + { + if(pTmpBssDesc->ChannelNumber == ScanChannel) + { + if(pTmpBssDesc->RecvSignalPower > pTestBssDesc->RecvSignalPower) { - UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Compare scan entry: Score++\n")); + RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", pTmpBssDesc->bdSsIdBuf, pTmpBssDesc->bdSsIdLen); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n\n", pTmpBssDesc->ChannelNumber, pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); + + Score++; + PlatformMoveMemory(pTestBssDesc, pTmpBssDesc, sizeof(RT_WLAN_BSS)); } - else + else if(pTmpBssDesc->RecvSignalPower < pTestBssDesc->RecvSignalPower) { - UndecoratedSmoothedPWDB = pdmpriv->UndecoratedSmoothedPWDB; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Compare scan entry: Score--\n")); + RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", pTmpBssDesc->bdSsIdBuf, pTmpBssDesc->bdSsIdLen); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n\n", pTmpBssDesc->ChannelNumber, pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); + Score--; } - #else - UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; - #endif - } - else // associated entry pwdb - { - UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } - - if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) - { - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); - } - else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && - (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) - { - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); - } - else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) - { - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); - } - } - if( (pdmpriv->DynamicTxHighPowerLvl != pdmpriv->LastDTPLvl) ) - { - PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); - if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal) // HP1 -> Normal or HP2 -> Normal - odm_DynamicTxPowerRestorePowerIndex(pDM_Odm); - else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) - odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x14); - else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) - odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x10); - } - pdmpriv->LastDTPLvl = pdmpriv->DynamicTxHighPowerLvl; - #endif -#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - -} - - -VOID -odm_DynamicTxPower_92D( - IN PDM_ODM_T pDM_Odm - ) -{ -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - PADAPTER Adapter = pDM_Odm->Adapter; - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - s4Byte UndecoratedSmoothedPWDB; - - PADAPTER BuddyAdapter = Adapter->BuddyAdapter; - BOOLEAN bGetValueFromBuddyAdapter = dm_DualMacGetParameterFromBuddyAdapter(Adapter); - u1Byte HighPowerLvlBackForMac0 = TxHighPwrLevel_Level1; - - // 2012/01/12 MH According to Luke's suggestion, only high power will support the feature. - if (pDM_Odm->ExtPA == FALSE) - return; - - // If dynamic high power is disabled. - if( (pMgntInfo->bDynamicTxPowerEnable != TRUE) || - (pHalData->DMFlag & HAL_DM_HIPWR_DISABLE) || - pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - return; - } - - // STA not connected and AP not connected - if((!pMgntInfo->bMediaConnect) && - (pHalData->EntryMinUndecoratedSmoothedPWDB == 0)) - { - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("Not connected to any \n")); - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - - //the LastDTPlvl should reset when disconnect, - //otherwise the tx power level wouldn't change when disconnect and connect again. - // Maddest 20091220. - pHalData->LastDTPLvl=TxHighPwrLevel_Normal; - return; - } - - if(pMgntInfo->bMediaConnect) // Default port - { - if(ACTING_AS_AP(Adapter) || pMgntInfo->mIbss) - { - UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } - else - { - UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } - } - else // associated entry pwdb - { - UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } - - if(IS_HARDWARE_TYPE_8192D(Adapter) && GET_HAL_DATA(Adapter)->CurrentBandType == 1){ - if(UndecoratedSmoothedPWDB >= 0x33) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n")); - } - else if((UndecoratedSmoothedPWDB <0x33) && - (UndecoratedSmoothedPWDB >= 0x2b) ) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); - } - else if(UndecoratedSmoothedPWDB < 0x2b) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Normal\n")); - } - - } - else - - { - if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); - } - else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && - (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); - } - else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) - { - pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); - } - - } - -//sherry delete flag 20110517 - if(bGetValueFromBuddyAdapter) - { - ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 1 \n")); - if(Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP) - { - ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() change value \n")); - HighPowerLvlBackForMac0 = pHalData->DynamicTxHighPowerLvl; - pHalData->DynamicTxHighPowerLvl = Adapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP; - PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); - pHalData->DynamicTxHighPowerLvl = HighPowerLvlBackForMac0; - Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = FALSE; - } - } - - if( (pHalData->DynamicTxHighPowerLvl != pHalData->LastDTPLvl) ) - { - ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192S() Channel = %d \n" , pHalData->CurrentChannel)); - if(Adapter->DualMacSmartConcurrent == TRUE) - { - if(BuddyAdapter == NULL) - { - ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter == NULL case \n")); - if(!Adapter->bSlaveOfDMSP) + else { - PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); + if(pTestBssDesc->bdTstamp - pTmpBssDesc->bdTstamp < 5000) + { + RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", pTmpBssDesc->bdSsIdBuf, pTmpBssDesc->bdSsIdLen); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n", pTmpBssDesc->ChannelNumber, pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("The 2nd Antenna didn't get this AP\n\n")); + } } } - else + } + else + { + if(pTmpBssDesc->ChannelNumber == ScanChannel) { - if(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY) + if(pTmpBssDesc->RecvSignalPower > pTestBssDesc->RecvSignalPower) { - ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMSP \n")); - if(Adapter->bSlaveOfDMSP) - { - ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() bslave case \n")); - BuddyAdapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = TRUE; - BuddyAdapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP = pHalData->DynamicTxHighPowerLvl; - } - else - { - ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() master case \n")); - if(!bGetValueFromBuddyAdapter) - { - ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 0 \n")); - PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); - } - } + counter++; + power_diff = power_diff + (pTmpBssDesc->RecvSignalPower - pTestBssDesc->RecvSignalPower); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); + ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), pTmpBssDesc->bdSsIdBuf); + ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), pTmpBssDesc->bdBssIdBuf); + PlatformMoveMemory(pTestBssDesc, pTmpBssDesc, sizeof(RT_WLAN_BSS)); } - else + else if(pTestBssDesc->RecvSignalPower > pTmpBssDesc->RecvSignalPower) + { + counter++; + power_diff = power_diff + (pTestBssDesc->RecvSignalPower - pTmpBssDesc->RecvSignalPower); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); + ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), pTmpBssDesc->bdSsIdBuf); + ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), pTmpBssDesc->bdBssIdBuf) + } + else if(pTestBssDesc->bdTstamp > pTmpBssDesc->bdTstamp) { - ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMDP\n")); - PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("time_diff: %lld\n", (pTestBssDesc->bdTstamp-pTmpBssDesc->bdTstamp)/1000)); + if(pTestBssDesc->bdTstamp - pTmpBssDesc->bdTstamp > 5000) + { + counter++; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); + ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), pTmpBssDesc->bdSsIdBuf); + ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), pTmpBssDesc->bdBssIdBuf) + } } } } - else - { - PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); - } - } - pHalData->LastDTPLvl = pHalData->DynamicTxHighPowerLvl; -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -#if (RTL8192D_SUPPORT==1) - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); - - struct dm_priv *pdmpriv = &pHalData->dmpriv; - DM_ODM_T *podmpriv = &pHalData->odmpriv; - int UndecoratedSmoothedPWDB; - #if (RTL8192D_EASY_SMART_CONCURRENT == 1) - PADAPTER BuddyAdapter = Adapter->BuddyAdapter; - BOOLEAN bGetValueFromBuddyAdapter = DualMacGetParameterFromBuddyAdapter(Adapter); - u8 HighPowerLvlBackForMac0 = TxHighPwrLevel_Level1; - #endif - // If dynamic high power is disabled. - if( (pdmpriv->bDynamicTxPowerEnable != _TRUE) || - (!(podmpriv->SupportAbility& ODM_BB_DYNAMIC_TXPWR)) ) - { - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - return; - } + if(pDM_Odm->SupportICType == ODM_RTL8723B) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("counter: %d power_diff: %d\n", counter, power_diff)); - // STA not connected and AP not connected - if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) && - (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) - { - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("Not connected to any \n")); - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - //the LastDTPlvl should reset when disconnect, - //otherwise the tx power level wouldn't change when disconnect and connect again. - // Maddest 20091220. - pdmpriv->LastDTPLvl=TxHighPwrLevel_Normal; - return; - } - - if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) // Default port - { - #if 0 - //todo: AP Mode - if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || - (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) - { - UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } - else - { - UndecoratedSmoothedPWDB = pdmpriv->UndecoratedSmoothedPWDB; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } - #else - UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; - #endif - } - else // associated entry pwdb - { - UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); - } -#if TX_POWER_FOR_5G_BAND == 1 - if(pHalData->CurrentBandType92D == BAND_ON_5G){ - if(UndecoratedSmoothedPWDB >= 0x33) - { - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n")); - } - else if((UndecoratedSmoothedPWDB <0x33) && - (UndecoratedSmoothedPWDB >= 0x2b) ) - { - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); - } - else if(UndecoratedSmoothedPWDB < 0x2b) - { - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Normal\n")); - } - } - else -#endif - { - if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) - { - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); - } - else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && - (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) - { - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); - } - else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) - { - pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); + if(counter != 0) + power_diff = power_diff / counter; + + if(power_diff <= power_target && counter != 0) + Score++; } - } -#if (RTL8192D_EASY_SMART_CONCURRENT == 1) - if(bGetValueFromBuddyAdapter) - { - //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 1 \n")); - if(Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP) - { - //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() change value \n")); - HighPowerLvlBackForMac0 = pHalData->DynamicTxHighPowerLvl; - pHalData->DynamicTxHighPowerLvl = Adapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP; - PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel); - pHalData->DynamicTxHighPowerLvl = HighPowerLvlBackForMac0; - Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = _FALSE; - } - } -#endif - if( (pdmpriv->DynamicTxHighPowerLvl != pdmpriv->LastDTPLvl) ) - { - //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192S() Channel = %d \n" , pHalData->CurrentChannel)); -#if (RTL8192D_EASY_SMART_CONCURRENT == 1) - if(BuddyAdapter == NULL) + if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8821)) { - //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter == NULL case \n")); - if(!Adapter->bSlaveOfDMSP) + if(pMgntInfo->NumBssDesc!=0 && Score<0) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, + ("ODM_SwAntDivCheckBeforeLink(): Using Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); + } + else + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, + ("ODM_SwAntDivCheckBeforeLink(): Remain Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"AUX_ANT":"MAIN_ANT")); + + if(pDM_FatTable->RxIdleAnt == MAIN_ANT) + ODM_UpdateRxIdleAnt(pDM_Odm, AUX_ANT); + else + ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); + } + + if(IS_5G_WIRELESS_MODE(pMgntInfo->dot11CurrentWirelessMode)) + { + pDM_SWAT_Table->Ant5G = pDM_FatTable->RxIdleAnt; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant5G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); + } + else { - PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel); + pDM_SWAT_Table->Ant2G = pDM_FatTable->RxIdleAnt; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant2G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); } } - else + else if(pDM_Odm->SupportICType == ODM_RTL8723B) { - if(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY) + pDM_SWAT_Table->CurAntenna = pDM_SWAT_Table->PreAntenna; + pDM_SWAT_Table->SWAS_NoLink_BK_Reg92c = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg92c & 0xfffffffc) | (pDM_SWAT_Table->CurAntenna)); + ODM_SetBBReg(pDM_Odm, rfe_ctrl_anta_src, 0xff, 0x77); + ODM_SetBBReg(pDM_Odm, rDPDT_control,bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg92c); + + if(counter != 0) { - //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMSP \n")); - if(Adapter->bSlaveOfDMSP) + if(pMgntInfo->NumBssDesc != 0 && Score > 0) { - //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() bslave case \n")); - BuddyAdapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = _TRUE; - BuddyAdapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP = pHalData->DynamicTxHighPowerLvl; + if(pDM_Odm->DM_SWAT_Table.ANTB_ON == FALSE) + { + pDM_Odm->DM_SWAT_Table.ANTA_ON = TRUE; + pDM_Odm->DM_SWAT_Table.ANTB_ON = TRUE; + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SwAntDivCheckBeforeLink(): Dual antenna\n")); } else { - //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() master case \n")); - if(!bGetValueFromBuddyAdapter) + if(pDM_Odm->DM_SWAT_Table.ANTB_ON == TRUE) { - //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 0 \n")); - PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel); + pDM_Odm->DM_SWAT_Table.ANTA_ON = TRUE; + pDM_Odm->DM_SWAT_Table.ANTB_ON = FALSE; + BT_SetBtCoexAntNum(Adapter, BT_COEX_ANT_TYPE_DETECTED, 1); } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): Single antenna\n")); } } + else + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SwAntDivCheckBeforeLink(): Igone result\n")); + } + else if(pDM_Odm->SupportICType == ODM_RTL8192C) + { + if(pMgntInfo->NumBssDesc!=0 && Score<=0) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, + ("ODM_SwAntDivCheckBeforeLink(): Using Ant(%s)\n", (pDM_SWAT_Table->CurAntenna==MAIN_ANT)?"MAIN":"AUX")); + + pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; + } else { - //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMDP\n")); - PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, + ("ODM_SwAntDivCheckBeforeLink(): Remain Ant(%s)\n", (pDM_SWAT_Table->CurAntenna==MAIN_ANT)?"AUX":"MAIN")); + + pDM_SWAT_Table->CurAntenna = pDM_SWAT_Table->PreAntenna; + + //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna); + pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); + PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); } } + + // Check state reset to default and wait for next time. + pDM_SWAT_Table->SWAS_NoLink_State = 0; + pMgntInfo->bScanAntDetect = FALSE; + + return FALSE; + } + #else - PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel); + return FALSE; #endif - } - pdmpriv->LastDTPLvl = pdmpriv->DynamicTxHighPowerLvl; -#endif -#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +return FALSE; } +#endif //#if(DM_ODM_SUPPORT_TYPE==ODM_WIN) + //3============================================================ -//3 RSSI Monitor +//3 SW Antenna Diversity //3============================================================ +#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) VOID -odm_RSSIDumpToRegister( - IN PDM_ODM_T pDM_Odm +odm_InitHybridAntDiv_88C_92D( + IN PDM_ODM_T pDM_Odm ) { -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - PADAPTER Adapter = pDM_Odm->Adapter; - - if(pDM_Odm->SupportICType == ODM_RTL8812) - { - PlatformEFIOWrite1Byte(Adapter, rA_RSSIDump_Jaguar, Adapter->RxStats.RxRSSIPercentage[0]); - PlatformEFIOWrite1Byte(Adapter, rB_RSSIDump_Jaguar, Adapter->RxStats.RxRSSIPercentage[1]); - - // Rx EVM - PlatformEFIOWrite1Byte(Adapter, rS1_RXevmDump_Jaguar, Adapter->RxStats.RxEVMdbm[0]); - PlatformEFIOWrite1Byte(Adapter, rS2_RXevmDump_Jaguar, Adapter->RxStats.RxEVMdbm[1]); - // Rx SNR - PlatformEFIOWrite1Byte(Adapter, rA_RXsnrDump_Jaguar, (u1Byte)(Adapter->RxStats.RxSNRdB[0])); - PlatformEFIOWrite1Byte(Adapter, rB_RXsnrDump_Jaguar, (u1Byte)(Adapter->RxStats.RxSNRdB[1])); +#if((DM_ODM_SUPPORT_TYPE==ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL)) + struct rtl8192cd_priv *priv=pDM_Odm->priv; +#endif + SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + u1Byte bTxPathSel=0; //0:Path-A 1:Path-B + u1Byte i; - // Rx Cfo_Short - PlatformEFIOWrite2Byte(Adapter, rA_CfoShortDump_Jaguar, Adapter->RxStats.RxCfoShort[0]); - PlatformEFIOWrite2Byte(Adapter, rB_CfoShortDump_Jaguar, Adapter->RxStats.RxCfoShort[1]); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_InitHybridAntDiv==============>\n")); - // Rx Cfo_Tail - PlatformEFIOWrite2Byte(Adapter, rA_CfoLongDump_Jaguar, Adapter->RxStats.RxCfoTail[0]); - PlatformEFIOWrite2Byte(Adapter, rB_CfoLongDump_Jaguar, Adapter->RxStats.RxCfoTail[1]); - } - else if(pDM_Odm->SupportICType == ODM_RTL8192E) - { - PlatformEFIOWrite1Byte(Adapter, rA_RSSIDump_92E, Adapter->RxStats.RxRSSIPercentage[0]); - PlatformEFIOWrite1Byte(Adapter, rB_RSSIDump_92E, Adapter->RxStats.RxRSSIPercentage[1]); - // Rx EVM - PlatformEFIOWrite1Byte(Adapter, rS1_RXevmDump_92E, Adapter->RxStats.RxEVMdbm[0]); - PlatformEFIOWrite1Byte(Adapter, rS2_RXevmDump_92E, Adapter->RxStats.RxEVMdbm[1]); - // Rx SNR - PlatformEFIOWrite1Byte(Adapter, rA_RXsnrDump_92E, (u1Byte)(Adapter->RxStats.RxSNRdB[0])); - PlatformEFIOWrite1Byte(Adapter, rB_RXsnrDump_92E, (u1Byte)(Adapter->RxStats.RxSNRdB[1])); - // Rx Cfo_Short - PlatformEFIOWrite2Byte(Adapter, rA_CfoShortDump_92E, Adapter->RxStats.RxCfoShort[0]); - PlatformEFIOWrite2Byte(Adapter, rB_CfoShortDump_92E, Adapter->RxStats.RxCfoShort[1]); - // Rx Cfo_Tail - PlatformEFIOWrite2Byte(Adapter, rA_CfoLongDump_92E, Adapter->RxStats.RxCfoTail[0]); - PlatformEFIOWrite2Byte(Adapter, rB_CfoLongDump_92E, Adapter->RxStats.RxCfoTail[1]); - } + //whether to do antenna diversity or not +#if(DM_ODM_SUPPORT_TYPE==ODM_AP) + if(priv==NULL) return; + if(!priv->pshare->rf_ft_var.antHw_enable) + return; + + #ifdef SW_ANT_SWITCH + priv->pshare->rf_ft_var.antSw_enable =0; + #endif #endif -} + if((pDM_Odm->SupportICType != ODM_RTL8192C) && (pDM_Odm->SupportICType != ODM_RTL8192D)) + return; -VOID -odm_RSSIMonitorInit( - IN PDM_ODM_T pDM_Odm - ) -{ - pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; - pRA_Table->firstconnect = FALSE; + bTxPathSel=(pDM_Odm->RFType==ODM_1T1R)?FALSE:TRUE; -} - -VOID -odm_RSSIMonitorCheck( - IN PDM_ODM_T pDM_Odm - ) -{ - // - // For AP/ADSL use prtl8192cd_priv - // For CE/NIC use PADAPTER - // + ODM_SetBBReg(pDM_Odm,ODM_REG_BB_PWR_SAV1_11N, BIT23, 0); //No update ANTSEL during GNT_BT=1 + ODM_SetBBReg(pDM_Odm,ODM_REG_TX_ANT_CTRL_11N, BIT21, 1); //TX atenna selection from tx_info + ODM_SetBBReg(pDM_Odm,ODM_REG_ANTSEL_PIN_11N, BIT23, 1); //enable LED[1:0] pin as ANTSEL + ODM_SetBBReg(pDM_Odm,ODM_REG_ANTSEL_CTRL_11N, BIT8|BIT9, 0x01); // 0x01: left antenna, 0x02: right antenna + // check HW setting: ANTSEL pin connection + #if(DM_ODM_SUPPORT_TYPE==ODM_AP) + ODM_Write2Byte(pDM_Odm,ODM_REG_RF_PIN_11N, (ODM_Read2Byte(pDM_Odm,0x804)&0xf0ff )| BIT(8) ); // b11-b8=0001,update RFPin setting + #endif + + // only AP support different path selection temperarly + if(!bTxPathSel){ //PATH-A + ODM_SetBBReg(pDM_Odm,ODM_REG_PIN_CTRL_11N, BIT8|BIT9, 0 ); // ANTSEL as HW control + ODM_SetBBReg(pDM_Odm,ODM_REG_ANTSEL_PATH_11N, BIT13, 1); //select TX ANTESEL from path A + } + else { + ODM_SetBBReg(pDM_Odm,ODM_REG_PIN_CTRL_11N, BIT24|BIT25, 0 ); // ANTSEL as HW control + ODM_SetBBReg(pDM_Odm,ODM_REG_ANTSEL_PATH_11N, BIT13, 0); //select ANTESEL from path B + } - if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR)) - return; + //Set OFDM HW RX Antenna Diversity + ODM_SetBBReg(pDM_Odm,ODM_REG_ANTDIV_PARA1_11N, 0x7FF, 0x0c0); //Pwdb threshold=8dB + ODM_SetBBReg(pDM_Odm,ODM_REG_ANTDIV_PARA1_11N, BIT11, 0); //Switch to another antenna by checking pwdb threshold + ODM_SetBBReg(pDM_Odm,ODM_REG_ANTDIV_PARA3_11N, BIT23, 1); // Decide final antenna by comparing 2 antennas' pwdb - // - // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate - // at the same time. In the stage2/3, we need to prive universal interface and merge all - // HW dynamic mechanism. - // - switch (pDM_Odm->SupportPlatform) - { - case ODM_WIN: - odm_RSSIMonitorCheckMP(pDM_Odm); - break; + //Set CCK HW RX Antenna Diversity + ODM_SetBBReg(pDM_Odm,ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 0); //Antenna diversity decision period = 32 sample + ODM_SetBBReg(pDM_Odm,ODM_REG_CCK_ANTDIV_PARA2_11N, 0xf, 0xf); //Threshold for antenna diversity. Check another antenna power if input power < ANT_lim*4 + ODM_SetBBReg(pDM_Odm,ODM_REG_CCK_ANTDIV_PARA3_11N, BIT13, 1); //polarity ana_A=1 and ana_B=0 + ODM_SetBBReg(pDM_Odm,ODM_REG_CCK_ANTDIV_PARA4_11N, 0x1f, 0x8); //default antenna power = inpwr*(0.5 + r_ant_step/16) - case ODM_CE: - odm_RSSIMonitorCheckCE(pDM_Odm); - break; - case ODM_AP: - odm_RSSIMonitorCheckAP(pDM_Odm); - break; + //Enable HW Antenna Diversity + if(!bTxPathSel) //PATH-A + ODM_SetBBReg(pDM_Odm,ODM_REG_IGI_A_11N, BIT7,1); // Enable Hardware antenna switch + else + ODM_SetBBReg(pDM_Odm,ODM_REG_IGI_B_11N, BIT7,1); // Enable Hardware antenna switch + ODM_SetBBReg(pDM_Odm,ODM_REG_CCK_ANTDIV_PARA1_11N, BIT15, 1);//Enable antenna diversity - case ODM_ADSL: - //odm_DIGAP(pDM_Odm); - break; + pDM_SWAT_Table->CurAntenna=0; //choose left antenna as default antenna + pDM_SWAT_Table->PreAntenna=0; + for(i=0; iCCK_Ant1_Cnt[i] = 0; + pDM_SWAT_Table->CCK_Ant2_Cnt[i] = 0; + pDM_SWAT_Table->OFDM_Ant1_Cnt[i] = 0; + pDM_SWAT_Table->OFDM_Ant2_Cnt[i] = 0; + pDM_SWAT_Table->RSSI_Ant1_Sum[i] = 0; + pDM_SWAT_Table->RSSI_Ant2_Sum[i] = 0; } - -} // odm_RSSIMonitorCheck + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("<==============odm_InitHybridAntDiv\n")); +} VOID -odm_RSSIMonitorCheckMP( - IN PDM_ODM_T pDM_Odm +odm_InitHybridAntDiv( + IN PDM_ODM_T pDM_Odm ) { -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PRT_WLAN_STA pEntry; - u1Byte i; - s4Byte tmpEntryMaxPWDB=0, tmpEntryMinPWDB=0xff; - u1Byte H2C_Parameter[4] ={0}; - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - u8Byte curTxOkCnt = 0, curRxOkCnt = 0; - u1Byte STBC_TX = 0; - BOOLEAN FirstConnect; - pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; -#if (BEAMFORMING_SUPPORT == 1) - BEAMFORMING_CAP Beamform_cap = BEAMFORMING_CAP_NONE; - u1Byte TxBF_EN = 0; + if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("Return: Not Support HW AntDiv\n")); + return; + } + + if(pDM_Odm->SupportICType & (ODM_RTL8192C | ODM_RTL8192D)) + { +#if ((RTL8192C_SUPPORT == 1)||(RTL8192D_SUPPORT == 1)) + odm_InitHybridAntDiv_88C_92D(pDM_Odm); #endif + } +} - RT_DISP(FDM, DM_PWDB, ("pHalData->UndecoratedSmoothedPWDB = 0x%x( %d)\n", - pHalData->UndecoratedSmoothedPWDB, - pHalData->UndecoratedSmoothedPWDB)); - curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - pMgntInfo->lastTxOkCnt; - curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - pMgntInfo->lastRxOkCnt; - pMgntInfo->lastTxOkCnt = curTxOkCnt; - pMgntInfo->lastRxOkCnt = curRxOkCnt; +BOOLEAN +odm_StaDefAntSel( + IN PDM_ODM_T pDM_Odm, + IN u4Byte OFDM_Ant1_Cnt, + IN u4Byte OFDM_Ant2_Cnt, + IN u4Byte CCK_Ant1_Cnt, + IN u4Byte CCK_Ant2_Cnt, + OUT u1Byte *pDefAnt - RT_DISP(FDM, DM_PWDB, ("Tx = %d Rx = %d\n", curTxOkCnt, curRxOkCnt)); + ) +{ +#if 1 + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_StaDefAntSelect==============>\n")); - FirstConnect = (pHalData->bLinked) && (pRA_Table->firstconnect == FALSE); - pRA_Table->firstconnect = pHalData->bLinked; - H2C_Parameter[3] |= FirstConnect << 5; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("OFDM_Ant1_Cnt:%d, OFDM_Ant2_Cnt:%d\n",OFDM_Ant1_Cnt,OFDM_Ant2_Cnt)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("CCK_Ant1_Cnt:%d, CCK_Ant2_Cnt:%d\n",CCK_Ant1_Cnt,CCK_Ant2_Cnt)); - if(pDM_Odm->SupportICType == ODM_RTL8188E && (pMgntInfo->CustomerID==RT_CID_819x_HP)) - { - if(curRxOkCnt >(curTxOkCnt*6)) - PlatformEFIOWrite4Byte(Adapter, REG_ARFR0, 0x8f015); - else - PlatformEFIOWrite4Byte(Adapter, REG_ARFR0, 0xff015); - } + + if(((OFDM_Ant1_Cnt+OFDM_Ant2_Cnt)==0)&&((CCK_Ant1_Cnt + CCK_Ant2_Cnt) <10)){ + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_StaDefAntSelect Fail: No enough packet info!\n")); + return FALSE; + } - if(pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8821) - { - if(curRxOkCnt >(curTxOkCnt*6)) - H2C_Parameter[3]=0x01; + if(OFDM_Ant1_Cnt || OFDM_Ant2_Cnt ) { + //if RX OFDM packet number larger than 0 + if(OFDM_Ant1_Cnt > OFDM_Ant2_Cnt) + (*pDefAnt)=1; else - H2C_Parameter[3]=0x00; + (*pDefAnt)=0; } - - for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) + // else if RX CCK packet number larger than 10 + else if((CCK_Ant1_Cnt + CCK_Ant2_Cnt) >=10 ) { - if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) - { - pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); - } + if(CCK_Ant1_Cnt > (5*CCK_Ant2_Cnt)) + (*pDefAnt)=1; + else if(CCK_Ant2_Cnt > (5*CCK_Ant1_Cnt)) + (*pDefAnt)=0; + else if(CCK_Ant1_Cnt > CCK_Ant2_Cnt) + (*pDefAnt)=0; else - { - pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); - } - - if(pEntry != NULL) - { - if(pEntry->bAssociated) - { - - RT_DISP_ADDR(FDM, DM_PWDB, ("pEntry->MacAddr ="), pEntry->MacAddr); - RT_DISP(FDM, DM_PWDB, ("pEntry->rssi = 0x%x(%d)\n", - pEntry->rssi_stat.UndecoratedSmoothedPWDB, pEntry->rssi_stat.UndecoratedSmoothedPWDB)); + (*pDefAnt)=1; - if(pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8812) - { + } -#if (BEAMFORMING_SUPPORT == 1) - Beamform_cap = Beamforming_GetEntryBeamCapByMacId(pMgntInfo, pEntry->AssociatedMacId); - if(Beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT |BEAMFORMER_CAP_VHT_SU)) - TxBF_EN = 1; - else - TxBF_EN = 0; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("TxAnt = %s\n",((*pDefAnt)==1)?"Ant1":"Ant2")); - H2C_Parameter[3] |= TxBF_EN << 6; - - if(TxBF_EN) - STBC_TX = 0; - else #endif - { - if(IS_WIRELESS_MODE_AC(Adapter)) - STBC_TX = TEST_FLAG(pEntry->VHTInfo.STBC, STBC_VHT_ENABLE_TX); - else - STBC_TX = TEST_FLAG(pEntry->HTInfo.STBC, STBC_HT_ENABLE_TX); - } - - H2C_Parameter[3] |= STBC_TX << 1; - } + //u4Byte antsel = ODM_GetBBReg(pDM_Odm, 0xc88, bMaskByte0); + //(*pDefAnt)= (u1Byte) antsel; + - if(pEntry->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) - tmpEntryMinPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; - if(pEntry->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) - tmpEntryMaxPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; - - H2C_Parameter[2] = (u1Byte)(pEntry->rssi_stat.UndecoratedSmoothedPWDB & 0xFF); - H2C_Parameter[1] = 0x20; // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1 - H2C_Parameter[0] = (pEntry->AssociatedMacId); - if(pDM_Odm->SupportICType == ODM_RTL8812) - ODM_FillH2CCmd(Adapter, ODM_H2C_RSSI_REPORT, 4, H2C_Parameter); - else if(pDM_Odm->SupportICType == ODM_RTL8192E) - ODM_FillH2CCmd(Adapter, ODM_H2C_RSSI_REPORT, 4, H2C_Parameter); - else - ODM_FillH2CCmd(Adapter, ODM_H2C_RSSI_REPORT, 3, H2C_Parameter); - } - } - else - { - break; - } - } - if(tmpEntryMaxPWDB != 0) // If associated entry is found - { - pHalData->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB; - RT_DISP(FDM, DM_PWDB, ("EntryMaxPWDB = 0x%x(%d)\n", tmpEntryMaxPWDB, tmpEntryMaxPWDB)); - } - else - { - pHalData->EntryMaxUndecoratedSmoothedPWDB = 0; - } - if(tmpEntryMinPWDB != 0xff) // If associated entry is found - { - pHalData->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB; - RT_DISP(FDM, DM_PWDB, ("EntryMinPWDB = 0x%x(%d)\n", tmpEntryMinPWDB, tmpEntryMinPWDB)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("<==============odm_StaDefAntSelect\n")); - } - else - { - pHalData->EntryMinUndecoratedSmoothedPWDB = 0; - } + return TRUE; - // Indicate Rx signal strength to FW. - if(pHalData->bUseRAMask) - { - if(pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8812) - { - PRT_HIGH_THROUGHPUT pHTInfo = GET_HT_INFO(pMgntInfo); - PRT_VERY_HIGH_THROUGHPUT pVHTInfo = GET_VHT_INFO(pMgntInfo); + +} -#if (BEAMFORMING_SUPPORT == 1) - - Beamform_cap = Beamforming_GetEntryBeamCapByMacId(pMgntInfo, pMgntInfo->mMacId); - if(Beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT |BEAMFORMER_CAP_VHT_SU)) - TxBF_EN = 1; - else - TxBF_EN = 0; +VOID +odm_SetRxIdleAnt( + IN PDM_ODM_T pDM_Odm, + IN u1Byte Ant, + IN BOOLEAN bDualPath +) +{ + SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - H2C_Parameter[3] |= TxBF_EN << 6; + //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_SetRxIdleAnt==============>\n")); - if(TxBF_EN) - STBC_TX = 0; - else -#endif - { - if(IS_WIRELESS_MODE_AC(Adapter)) - STBC_TX = TEST_FLAG(pVHTInfo->VhtCurStbc, STBC_VHT_ENABLE_TX); - else - STBC_TX = TEST_FLAG(pHTInfo->HtCurStbc, STBC_HT_ENABLE_TX); - } + if(Ant != pDM_SWAT_Table->RxIdleAnt) + { + //for path-A + if(Ant==1) + ODM_SetBBReg(pDM_Odm,ODM_REG_RX_DEFUALT_A_11N, 0xFFFF, 0x65a9); //right-side antenna + else + ODM_SetBBReg(pDM_Odm,ODM_REG_RX_DEFUALT_A_11N, 0xFFFF, 0x569a); //left-side antenna - H2C_Parameter[3] |= STBC_TX << 1; + //for path-B + if(bDualPath){ + if(Ant==0) + ODM_SetBBReg(pDM_Odm,ODM_REG_RX_DEFUALT_A_11N, 0xFFFF0000, 0x65a9); //right-side antenna + else + ODM_SetBBReg(pDM_Odm,ODM_REG_RX_DEFUALT_A_11N, 0xFFFF0000, 0x569a); //left-side antenna } - - H2C_Parameter[2] = (u1Byte)(pHalData->UndecoratedSmoothedPWDB & 0xFF); - H2C_Parameter[1] = 0x20; // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1 - H2C_Parameter[0] = 0; // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1 - if(pDM_Odm->SupportICType == ODM_RTL8812) - ODM_FillH2CCmd(Adapter, ODM_H2C_RSSI_REPORT, 4, H2C_Parameter); - else if(pDM_Odm->SupportICType == ODM_RTL8192E) - ODM_FillH2CCmd(Adapter, ODM_H2C_RSSI_REPORT, 4, H2C_Parameter); - else - ODM_FillH2CCmd(Adapter, ODM_H2C_RSSI_REPORT, 3, H2C_Parameter); } - else - { - PlatformEFIOWrite1Byte(Adapter, 0x4fe, (u1Byte)pHalData->UndecoratedSmoothedPWDB); - } - - if((pDM_Odm->SupportICType == ODM_RTL8812)||(pDM_Odm->SupportICType == ODM_RTL8192E)) - odm_RSSIDumpToRegister(pDM_Odm); + pDM_SWAT_Table->RxIdleAnt = Ant; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("RxIdleAnt: %s Reg858=0x%x\n",(Ant==1)?"Ant1":"Ant2",(Ant==1)?0x65a9:0x569a)); - odm_FindMinimumRSSI(Adapter); - ODM_CmnInfoUpdate(&pHalData->DM_OutSrc ,ODM_CMNINFO_LINK, (u8Byte)pHalData->bLinked); - ODM_CmnInfoUpdate(&pHalData->DM_OutSrc ,ODM_CMNINFO_RSSI_MIN, (u8Byte)pHalData->MinUndecoratedPWDBForDM); -#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -} + //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("<==============odm_SetRxIdleAnt\n")); -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) -// -//sherry move from DUSC to here 20110517 -// -static VOID -FindMinimumRSSI_Dmsp( - IN PADAPTER pAdapter + } + +VOID +ODM_AntselStatistics_88C( + IN PDM_ODM_T pDM_Odm, + IN u1Byte MacId, + IN u4Byte PWDBAll, + IN BOOLEAN isCCKrate ) { -#if 0 - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - s32 Rssi_val_min_back_for_mac0; - BOOLEAN bGetValueFromBuddyAdapter = dm_DualMacGetParameterFromBuddyAdapter(pAdapter); - BOOLEAN bRestoreRssi = _FALSE; - PADAPTER BuddyAdapter = pAdapter->BuddyAdapter; + SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - if(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY) + if(pDM_SWAT_Table->antsel == 1) { - if(BuddyAdapter!= NULL) + if(isCCKrate) + pDM_SWAT_Table->CCK_Ant1_Cnt[MacId]++; + else { - if(pHalData->bSlaveOfDMSP) - { - //ODM_RT_TRACE(pDM_Odm,COMP_EASY_CONCURRENT,DBG_LOUD,("bSlavecase of dmsp\n")); - BuddyAdapter->DualMacDMSPControl.RssiValMinForAnotherMacOfDMSP = pdmpriv->MinUndecoratedPWDBForDM; - } - else - { - if(bGetValueFromBuddyAdapter) - { - //ODM_RT_TRACE(pDM_Odm,COMP_EASY_CONCURRENT,DBG_LOUD,("get new RSSI\n")); - bRestoreRssi = _TRUE; - Rssi_val_min_back_for_mac0 = pdmpriv->MinUndecoratedPWDBForDM; - pdmpriv->MinUndecoratedPWDBForDM = pAdapter->DualMacDMSPControl.RssiValMinForAnotherMacOfDMSP; - } - } + pDM_SWAT_Table->OFDM_Ant1_Cnt[MacId]++; + pDM_SWAT_Table->RSSI_Ant1_Sum[MacId] += PWDBAll; } - } - - if(bRestoreRssi) + else { - bRestoreRssi = _FALSE; - pdmpriv->MinUndecoratedPWDBForDM = Rssi_val_min_back_for_mac0; + if(isCCKrate) + pDM_SWAT_Table->CCK_Ant2_Cnt[MacId]++; + else + { + pDM_SWAT_Table->OFDM_Ant2_Cnt[MacId]++; + pDM_SWAT_Table->RSSI_Ant2_Sum[MacId] += PWDBAll; + } } -#endif + } -static void -FindMinimumRSSI( -IN PADAPTER pAdapter - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); - //1 1.Determine the minimum RSSI - if((pDM_Odm->bLinked != _TRUE) && - (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) - { - pdmpriv->MinUndecoratedPWDBForDM = 0; - //ODM_RT_TRACE(pDM_Odm,COMP_BB_POWERSAVING, DBG_LOUD, ("Not connected to any \n")); - } + +#if(DM_ODM_SUPPORT_TYPE==ODM_WIN) +VOID +ODM_SetTxAntByTxInfo_88C_92D( + IN PDM_ODM_T pDM_Odm, + IN pu1Byte pDesc, + IN u1Byte macId +) +{ + SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + u1Byte antsel; + + if(!(pDM_Odm->SupportAbility&ODM_BB_ANT_DIV)) + return; + + if(pDM_SWAT_Table->RxIdleAnt == 1) + antsel=(pDM_SWAT_Table->TxAnt[macId] == 1)?0:1; else - { - pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB; - } + antsel=(pDM_SWAT_Table->TxAnt[macId] == 1)?1:0; + + SET_TX_DESC_ANTSEL_A_92C(pDesc, antsel); + //SET_TX_DESC_ANTSEL_B_92C(pDesc, antsel); + //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("SET_TX_DESC_ANTSEL_A_92C=%d\n", pDM_SWAT_Table->TxAnt[macId])); +} +#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) +VOID +ODM_SetTxAntByTxInfo_88C_92D( + IN PDM_ODM_T pDM_Odm +) +{ + +} +#elif(DM_ODM_SUPPORT_TYPE==ODM_AP) +VOID +ODM_SetTxAntByTxInfo_88C_92D( + IN PDM_ODM_T pDM_Odm +) +{ - //DBG_8192C("%s=>MinUndecoratedPWDBForDM(%d)\n",__FUNCTION__,pdmpriv->MinUndecoratedPWDBForDM); - //ODM_RT_TRACE(pDM_Odm,COMP_DIG, DBG_LOUD, ("MinUndecoratedPWDBForDM =%d\n",pHalData->MinUndecoratedPWDBForDM)); } #endif VOID -odm_RSSIMonitorCheckCE( - IN PDM_ODM_T pDM_Odm - ) +odm_HwAntDiv_92C_92D( + IN PDM_ODM_T pDM_Odm +) { -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dm_priv *pdmpriv = &pHalData->dmpriv; - struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter); - int i; - int tmpEntryMaxPWDB=0, tmpEntryMinPWDB=0xff; - u8 sta_cnt=0; - u32 UL_DL_STATE = 0, STBC_TX = 0, TxBF_EN = 0; - u32 PWDB_rssi[NUM_STA]={0};//[0~15]:MACID, [16~31]:PWDB_rssi - BOOLEAN FirstConnect = FALSE; - pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; - - if(pDM_Odm->bLinked != _TRUE) - return; + SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + u4Byte RSSI_Min=0xFF, RSSI, RSSI_Ant1, RSSI_Ant2; + u1Byte RxIdleAnt, i; + BOOLEAN bRet=FALSE; + PSTA_INFO_T pEntry; + +#if (DM_ODM_SUPPORT_TYPE==ODM_AP) + struct rtl8192cd_priv *priv=pDM_Odm->priv; + //if test, return + if(priv->pshare->rf_ft_var.CurAntenna & 0x80) + return; +#endif - #if((RTL8812A_SUPPORT==1)||(RTL8821A_SUPPORT==1)) - if((pDM_Odm->SupportICType == ODM_RTL8812)||(pDM_Odm->SupportICType == ODM_RTL8821)) + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_HwAntDiv==============>\n")); + + if(!(pDM_Odm->SupportAbility&ODM_BB_ANT_DIV)) //if don't support antenna diveristy { - u64 curTxOkCnt = pdvobjpriv->traffic_stat.cur_tx_bytes; - u64 curRxOkCnt = pdvobjpriv->traffic_stat.cur_rx_bytes; - - if(curRxOkCnt >(curTxOkCnt*6)) - UL_DL_STATE = 1; - else - UL_DL_STATE = 0; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_HwAntDiv: Not supported!\n")); + return; } - #endif - FirstConnect = (pDM_Odm->bLinked) && (pRA_Table->firstconnect == FALSE); - pRA_Table->firstconnect = pDM_Odm->bLinked; - - //if(check_fwstate(&Adapter->mlmepriv, WIFI_AP_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) + if((pDM_Odm->SupportICType != ODM_RTL8192C) && (pDM_Odm->SupportICType != ODM_RTL8192D)) { - #if 1 - struct sta_info *psta; - - for(i=0; ipODM_StaInfo[i])) - { - if(IS_MCAST( psta->hwaddr)) //if(psta->mac_id ==1) - continue; - - if(psta->rssi_stat.UndecoratedSmoothedPWDB == (-1)) - continue; - - if(psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) - tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; - - if(psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) - tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; - - #if 0 - DBG_871X("%s mac_id:%u, mac:"MAC_FMT", rssi:%d\n", __func__, - psta->mac_id, MAC_ARG(psta->hwaddr), psta->rssi_stat.UndecoratedSmoothedPWDB); - #endif - - if(psta->rssi_stat.UndecoratedSmoothedPWDB != (-1)) { - -#ifdef CONFIG_80211N_HT - if(pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8812) - { -#ifdef CONFIG_BEAMFORMING - BEAMFORMING_CAP Beamform_cap = beamforming_get_entry_beam_cap_by_mac_id(&Adapter->mlmepriv, psta->mac_id); - - if(Beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT |BEAMFORMER_CAP_VHT_SU)) - TxBF_EN = 1; - else - TxBF_EN = 0; - - if (TxBF_EN) { - STBC_TX = 0; - } - else -#endif - { -#ifdef CONFIG_80211AC_VHT - if(IsSupportedVHT(psta->wireless_mode)) - STBC_TX = TEST_FLAG(psta->vhtpriv.stbc_cap, STBC_VHT_ENABLE_TX); - else -#endif - STBC_TX = TEST_FLAG(psta->htpriv.stbc_cap, STBC_HT_ENABLE_TX); - } - } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("Return: IC Type is not 92C or 92D\n")); + return; + } + +#if (DM_ODM_SUPPORT_TYPE&(ODM_WIN|ODM_CE)) + if(!pDM_Odm->bLinked) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("Return: bLinked is FALSE\n")); + return; + } #endif - if(pDM_Odm->SupportICType == ODM_RTL8192D) - PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) | ((Adapter->stapriv.asoc_sta_count+1) << 8)); - else if ((pDM_Odm->SupportICType == ODM_RTL8192E)||(pDM_Odm->SupportICType == ODM_RTL8812)||(pDM_Odm->SupportICType == ODM_RTL8821)) - PWDB_rssi[sta_cnt++] = (((u8)(psta->mac_id&0xFF)) | ((psta->rssi_stat.UndecoratedSmoothedPWDB&0x7F)<<16) |(STBC_TX << 25) | (FirstConnect << 29) | (TxBF_EN << 30)); - else - PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) ); - } - } - } - #else - _irqL irqL; - _list *plist, *phead; - struct sta_info *psta; - struct sta_priv *pstapriv = &Adapter->stapriv; - u8 bcast_addr[ETH_ALEN]= {0xff,0xff,0xff,0xff,0xff,0xff}; + for (i=0; ipODM_StaInfo[i]; + if(IS_STA_VALID(pEntry)) + { - _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); + RSSI_Ant1 = (pDM_SWAT_Table->OFDM_Ant1_Cnt[i] == 0)?0:(pDM_SWAT_Table->RSSI_Ant1_Sum[i]/pDM_SWAT_Table->OFDM_Ant1_Cnt[i]); + RSSI_Ant2 = (pDM_SWAT_Table->OFDM_Ant2_Cnt[i] == 0)?0:(pDM_SWAT_Table->RSSI_Ant2_Sum[i]/pDM_SWAT_Table->OFDM_Ant2_Cnt[i]); - for(i=0; i< NUM_STA; i++) - { - phead = &(pstapriv->sta_hash[i]); - plist = get_next(phead); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("RSSI_Ant1=%d, RSSI_Ant2=%d\n", RSSI_Ant1, RSSI_Ant2)); - while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) + if(RSSI_Ant1 ||RSSI_Ant2) { - psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); - - plist = get_next(plist); - - if(_rtw_memcmp(psta->hwaddr, bcast_addr, ETH_ALEN) || - _rtw_memcmp(psta->hwaddr, myid(&Adapter->eeprompriv), ETH_ALEN)) - continue; - - if(psta->state & WIFI_ASOC_STATE) +#if (DM_ODM_SUPPORT_TYPE==ODM_AP) + if(pDM_Odm->pODM_StaInfo[i]->expire_to) +#endif { - - if(psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) - tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; - - if(psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) - tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; - - if(psta->rssi_stat.UndecoratedSmoothedPWDB != (-1)){ - //printk("%s==> mac_id(%d),rssi(%d)\n",__FUNCTION__,psta->mac_id,psta->rssi_stat.UndecoratedSmoothedPWDB); - #if(RTL8192D_SUPPORT==1) - PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) | ((Adapter->stapriv.asoc_sta_count+1) << 8)); - #else - PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) ); - #endif + RSSI = (RSSI_Ant1 < RSSI_Ant2) ? RSSI_Ant1 : RSSI_Ant2; + if((!RSSI) || ( RSSI < RSSI_Min) ) { + pDM_SWAT_Table->TargetSTA = i; + RSSI_Min = RSSI; } } - - } + } + ///STA: found out default antenna + bRet=odm_StaDefAntSel(pDM_Odm, + pDM_SWAT_Table->OFDM_Ant1_Cnt[i], + pDM_SWAT_Table->OFDM_Ant2_Cnt[i], + pDM_SWAT_Table->CCK_Ant1_Cnt[i], + pDM_SWAT_Table->CCK_Ant2_Cnt[i], + &pDM_SWAT_Table->TxAnt[i]); + //if Tx antenna selection: successful + if(bRet){ + pDM_SWAT_Table->RSSI_Ant1_Sum[i] = 0; + pDM_SWAT_Table->RSSI_Ant2_Sum[i] = 0; + pDM_SWAT_Table->OFDM_Ant1_Cnt[i] = 0; + pDM_SWAT_Table->OFDM_Ant2_Cnt[i] = 0; + pDM_SWAT_Table->CCK_Ant1_Cnt[i] = 0; + pDM_SWAT_Table->CCK_Ant2_Cnt[i] = 0; + } } + } - _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); - #endif - - //printk("%s==> sta_cnt(%d)\n",__FUNCTION__,sta_cnt); + //set RX Idle Ant + RxIdleAnt = pDM_SWAT_Table->TxAnt[pDM_SWAT_Table->TargetSTA]; + odm_SetRxIdleAnt(pDM_Odm, RxIdleAnt, FALSE); - for(i=0; i< sta_cnt; i++) - { - if(PWDB_rssi[i] != (0)){ - if(pHalData->fw_ractrl == _TRUE)// Report every sta's RSSI to FW - { - #if(RTL8192D_SUPPORT==1) - if(pDM_Odm->SupportICType == ODM_RTL8192D){ - FillH2CCmd92D(Adapter, H2C_RSSI_REPORT, 3, (u8 *)(&PWDB_rssi[i])); - } - #endif - - #if((RTL8192C_SUPPORT==1)||(RTL8723A_SUPPORT==1)) - if((pDM_Odm->SupportICType == ODM_RTL8192C)||(pDM_Odm->SupportICType == ODM_RTL8723A)){ - rtl8192c_set_rssi_cmd(Adapter, (u8*)&PWDB_rssi[i]); - } - #endif - - #if((RTL8812A_SUPPORT==1)||(RTL8821A_SUPPORT==1)) - if((pDM_Odm->SupportICType == ODM_RTL8812)||(pDM_Odm->SupportICType == ODM_RTL8821)){ - PWDB_rssi[i] |= (UL_DL_STATE << 24); - rtl8812_set_rssi_cmd(Adapter, (u8 *)(&PWDB_rssi[i])); - } - #endif - #if(RTL8192E_SUPPORT==1) - if(pDM_Odm->SupportICType == ODM_RTL8192E){ - rtl8192e_set_rssi_cmd(Adapter, (u8 *)(&PWDB_rssi[i])); - } - #endif - #if(RTL8723B_SUPPORT==1) - if(pDM_Odm->SupportICType == ODM_RTL8723B){ - rtl8723b_set_rssi_cmd(Adapter, (u8 *)(&PWDB_rssi[i])); - } - #endif - } - else{ - #if((RTL8188E_SUPPORT==1)&&(RATE_ADAPTIVE_SUPPORT == 1)) - if(pDM_Odm->SupportICType == ODM_RTL8188E){ - ODM_RA_SetRSSI_8188E( - &(pHalData->odmpriv), (PWDB_rssi[i]&0xFF), (u8)((PWDB_rssi[i]>>16) & 0xFF)); - } - #endif +#if (DM_ODM_SUPPORT_TYPE==ODM_AP) +#ifdef TX_SHORTCUT + if (!priv->pmib->dot11OperationEntry.disable_txsc) { + plist = phead->next; + while(plist != phead) { + pstat = list_entry(plist, struct stat_info, asoc_list); + if(pstat->expire_to) { + for (i=0; itx_sc_ent[i].hwdesc1); + pdesc->Dword2 &= set_desc(~ (BIT(24)|BIT(25))); + if((pstat->CurAntenna^priv->pshare->rf_ft_var.CurAntenna)&1) + pdesc->Dword2 |= set_desc(BIT(24)|BIT(25)); + pdesc= &(pstat->tx_sc_ent[i].hwdesc2); + pdesc->Dword2 &= set_desc(~ (BIT(24)|BIT(25))); + if((pstat->CurAntenna^priv->pshare->rf_ft_var.CurAntenna)&1) + pdesc->Dword2 |= set_desc(BIT(24)|BIT(25)); } - } - } - } - - - - if(tmpEntryMaxPWDB != 0) // If associated entry is found - { - pdmpriv->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB; - } - else - { - pdmpriv->EntryMaxUndecoratedSmoothedPWDB = 0; - } + } - if(tmpEntryMinPWDB != 0xff) // If associated entry is found - { - pdmpriv->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB; - } - else - { - pdmpriv->EntryMinUndecoratedSmoothedPWDB = 0; + if (plist == plist->next) + break; + plist = plist->next; + }; } - - FindMinimumRSSI(Adapter);//get pdmpriv->MinUndecoratedPWDBForDM - - #if(RTL8192D_SUPPORT==1) - FindMinimumRSSI_Dmsp(Adapter); - #endif - pDM_Odm->RSSI_Min = pdmpriv->MinUndecoratedPWDBForDM; - //ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM); -#endif//if (DM_ODM_SUPPORT_TYPE == ODM_CE) +#endif +#endif + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("<==============odm_HwAntDiv\n")); + } + VOID -odm_RSSIMonitorCheckAP( - IN PDM_ODM_T pDM_Odm - ) -{ -#if (DM_ODM_SUPPORT_TYPE == ODM_AP) -#ifdef CONFIG_RTL_92C_SUPPORT || defined(CONFIG_RTL_92D_SUPPORT) +odm_HwAntDiv( + IN PDM_ODM_T pDM_Odm +) +{ - u4Byte i; - PSTA_INFO_T pstat; + PADAPTER pAdapter = pDM_Odm->Adapter; - for(i=0; ipODM_StaInfo[i]; - if(IS_STA_VALID(pstat) ) - { -#ifdef STA_EXT - if (REMAP_AID(pstat) < (FW_NUM_STAT - 1)) +#if(DM_ODM_SUPPORT_TYPE==ODM_WIN) + if(pAdapter->MgntInfo.AntennaTest) + return; #endif - add_update_rssi(pDM_Odm->priv, pstat); - - } + if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("Return: Not Support HW AntDiv\n")); + return; } + + if(pDM_Odm->SupportICType & (ODM_RTL8192C | ODM_RTL8192D)) + { +#if ((RTL8192C_SUPPORT == 1)||(RTL8192D_SUPPORT == 1)) + odm_HwAntDiv_92C_92D(pDM_Odm); #endif -#endif - + } } - +#if(DM_ODM_SUPPORT_TYPE==ODM_AP) +#if 0 VOID -ODM_InitAllTimers( - IN PDM_ODM_T pDM_Odm - ) +odm_HwAntDiv( + IN PDM_ODM_T pDM_Odm +) { -#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) -#if (RTL8723B_SUPPORT == 1)||(RTL8821A_SUPPORT == 1) - ODM_InitializeTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer_8723B, - (RT_TIMER_CALL_BACK)ODM_SW_AntDiv_Callback, NULL, "SwAntennaSwitchTimer_8723B"); -#endif -#endif + struct rtl8192cd_priv *priv=pDM_Odm->priv; + struct stat_info *pstat, *pstat_min=NULL; + struct list_head *phead, *plist; + int rssi_min= 0xff, i; + u1Byte idleAnt=priv->pshare->rf_ft_var.CurAntenna; + u1Byte nextAnt; + BOOLEAN bRet=FALSE; + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_HwAntDiv==============>\n")); -#if(defined(CONFIG_SW_ANTENNA_DIVERSITY)) - ODM_InitializeTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer, - (RT_TIMER_CALL_BACK)odm_SwAntDivChkAntSwitchCallback, NULL, "SwAntennaSwitchTimer"); -#endif + if((!priv->pshare->rf_ft_var.antHw_enable) ||(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV))) + return; -#if (!(DM_ODM_SUPPORT_TYPE == ODM_CE)) -#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) -#if (RTL8188E_SUPPORT == 1) - ODM_InitializeTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer, - (RT_TIMER_CALL_BACK)odm_FastAntTrainingCallback, NULL, "FastAntTrainingTimer"); -#endif -#endif -#endif + //if test, return + if(priv->pshare->rf_ft_var.CurAntenna & 0x80) + return; + + phead = &priv->asoc_list; + plist = phead->next; + ////========================= + //find mimum rssi sta + ////========================= + while(plist != phead) { + pstat = list_entry(plist, struct stat_info, asoc_list); + if((pstat->expire_to) && (pstat->AntRSSI[0] || pstat->AntRSSI[1])) { + int rssi = (pstat->AntRSSI[0] < pstat->AntRSSI[1]) ? pstat->AntRSSI[0] : pstat->AntRSSI[1]; + if((!pstat_min) || ( rssi < rssi_min) ) { + pstat_min = pstat; + rssi_min = rssi; + } + } + ///STA: found out default antenna + bRet=odm_StaDefAntSel(pDM_Odm, + pstat->hwRxAntSel[1], + pstat->hwRxAntSel[0], + pstat->cckPktCount[1], + pstat->cckPktCount[0], + &nextAnt + ); + + //if default antenna selection: successful + if(bRet){ + pstat->CurAntenna = nextAnt; + //update rssi + for(i=0; i<2; i++) { + if(pstat->cckPktCount[i]==0 && pstat->hwRxAntSel[i]==0) + pstat->AntRSSI[i] = 0; + } + if(pstat->AntRSSI[idleAnt]==0) + pstat->AntRSSI[idleAnt] = pstat->AntRSSI[idleAnt^1]; + // reset variables + pstat->hwRxAntSel[1] = pstat->hwRxAntSel[0] =0; + pstat->cckPktCount[1]= pstat->cckPktCount[0] =0; + } -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PSDTimer, - (RT_TIMER_CALL_BACK)dm_PSDMonitorCallback, NULL, "PSDTimer"); - // - //Path Diversity - //Neil Chen--2011--06--16-- / 2012/02/23 MH Revise Arch. - // - ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer, - (RT_TIMER_CALL_BACK)odm_PathDivChkAntSwitchCallback, NULL, "PathDivTimer"); + if (plist == plist->next) + break; + plist = plist->next; + + }; + ////========================= + //Choose RX Idle antenna according to minmum rssi + ////========================= + if(pstat_min) { + if(priv->pshare->rf_ft_var.CurAntenna!=pstat_min->CurAntenna) + odm_SetRxIdleAnt(pDM_Odm,pstat_min->CurAntenna,TRUE); + priv->pshare->rf_ft_var.CurAntenna = pstat_min->CurAntenna; + } - ODM_InitializeTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer, - (RT_TIMER_CALL_BACK)odm_CCKTXPathDiversityCallback, NULL, "CCKPathDiversityTimer"); - ODM_InitializeTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer, - (RT_TIMER_CALL_BACK)odm_MPT_DIGCallback, NULL, "MPT_DIGTimer"); +#ifdef TX_SHORTCUT + if (!priv->pmib->dot11OperationEntry.disable_txsc) { + plist = phead->next; + while(plist != phead) { + pstat = list_entry(plist, struct stat_info, asoc_list); + if(pstat->expire_to) { + for (i=0; itx_sc_ent[i].hwdesc1); + pdesc->Dword2 &= set_desc(~ (BIT(24)|BIT(25))); + if((pstat->CurAntenna^priv->pshare->rf_ft_var.CurAntenna)&1) + pdesc->Dword2 |= set_desc(BIT(24)|BIT(25)); + pdesc= &(pstat->tx_sc_ent[i].hwdesc2); + pdesc->Dword2 &= set_desc(~ (BIT(24)|BIT(25))); + if((pstat->CurAntenna^priv->pshare->rf_ft_var.CurAntenna)&1) + pdesc->Dword2 |= set_desc(BIT(24)|BIT(25)); + } + } - ODM_InitializeTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer, - (RT_TIMER_CALL_BACK)odm_PSD_RXHPCallback, NULL, "PSDRXHPTimer"); + if (plist == plist->next) + break; + plist = plist->next; + }; + } #endif + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,"<==============odm_HwAntDiv\n"); } +#endif -VOID -ODM_CancelAllTimers( - IN PDM_ODM_T pDM_Odm - ) +u1Byte +ODM_Diversity_AntennaSelect( + IN PDM_ODM_T pDM_Odm, + IN u1Byte *data +) { -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - // - // 2012/01/12 MH Temp BSOD fix. We need to find NIC allocate mem fail reason in - // win7 platform. - // - HAL_ADAPTER_STS_CHK(pDM_Odm) -#endif -#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) -#if (RTL8723B_SUPPORT == 1)||(RTL8821A_SUPPORT == 1) - ODM_CancelTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer_8723B); -#endif -#endif + struct rtl8192cd_priv *priv=pDM_Odm->priv; -#if(defined(CONFIG_SW_ANTENNA_DIVERSITY)) - ODM_CancelTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer); -#endif + int ant = _atoi(data, 16); -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("ODM_Diversity_AntennaSelect==============>\n")); -#if (RTL8188E_SUPPORT == 1) - ODM_CancelTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer); -#endif - ODM_CancelTimer(pDM_Odm, &pDM_Odm->PSDTimer); - // - //Path Diversity - //Neil Chen--2011--06--16-- / 2012/02/23 MH Revise Arch. - // - ODM_CancelTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer); + #ifdef PCIE_POWER_SAVING + PCIeWakeUp(priv, POWER_DOWN_T0); + #endif - ODM_CancelTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer); + if (ant==AUX_ANT || ant==MAIN_ANT) + { + if ( !priv->pshare->rf_ft_var.antSw_select) { + ODM_Write4Byte(pDM_Odm,0x870, ODM_Read4Byte(pDM_Odm,0x870) | BIT(8)| BIT(9) ); // ANTSEL A as SW control + ODM_Write1Byte(pDM_Odm,0xc50, ODM_Read1Byte(pDM_Odm,0xc50) & (~ BIT(7))); // rx OFDM SW control + PHY_SetBBReg(priv, 0x860, 0x300, ant); + } else { + ODM_Write4Byte(pDM_Odm,0x870, ODM_Read4Byte(pDM_Odm,0x870) | BIT(24)| BIT(25) ); // ANTSEL B as HW control + PHY_SetBBReg(priv, 0x864, 0x300, ant); + ODM_Write1Byte(pDM_Odm,0xc58, ODM_Read1Byte(pDM_Odm,0xc58) & (~ BIT(7))); // rx OFDM SW control + } - ODM_CancelTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer); + ODM_Write1Byte(pDM_Odm,0xa01, ODM_Read1Byte(pDM_Odm,0xa01) & (~ BIT(7))); // rx CCK SW control + ODM_Write4Byte(pDM_Odm,0x80c, ODM_Read4Byte(pDM_Odm,0x80c) & (~ BIT(21))); // select ant by tx desc + ODM_Write4Byte(pDM_Odm,0x858, 0x569a569a); - ODM_CancelTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer); -#endif -} + priv->pshare->rf_ft_var.antHw_enable = 0; + priv->pshare->rf_ft_var.CurAntenna = (ant%2); + + #ifdef SW_ANT_SWITCH + priv->pshare->rf_ft_var.antSw_enable = 0; + priv->pshare->DM_SWAT_Table.CurAntenna = ant; + priv->pshare->RSSI_test =0; + #endif + } + else if(ant==0){ + if ( !priv->pshare->rf_ft_var.antSw_select) { + ODM_Write4Byte(pDM_Odm,0x870, ODM_Read4Byte(pDM_Odm,0x870) & ~(BIT(8)| BIT(9)) ); + ODM_Write1Byte(pDM_Odm,0xc50, ODM_Read1Byte(pDM_Odm,0xc50) | BIT(7)); // OFDM HW control + } else { + ODM_Write4Byte(pDM_Odm,0x870, ODM_Read4Byte(pDM_Odm,0x870) & ~(BIT(24)| BIT(25)) ); + ODM_Write1Byte(pDM_Odm,0xc58, ODM_Read1Byte(pDM_Odm,0xc58) | BIT(7)); // OFDM HW control + } -VOID -ODM_ReleaseAllTimers( - IN PDM_ODM_T pDM_Odm - ) -{ -#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) -#if (RTL8723B_SUPPORT == 1)||(RTL8821A_SUPPORT == 1) - ODM_ReleaseTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer_8723B); + ODM_Write1Byte(pDM_Odm,0xa01, ODM_Read1Byte(pDM_Odm,0xa01) | BIT(7)); // CCK HW control + ODM_Write4Byte(pDM_Odm,0x80c, ODM_Read4Byte(pDM_Odm,0x80c) | BIT(21) ); // by tx desc + priv->pshare->rf_ft_var.CurAntenna = 0; + ODM_Write4Byte(pDM_Odm,0x858, 0x569a569a); + priv->pshare->rf_ft_var.antHw_enable = 1; +#ifdef SW_ANT_SWITCH + priv->pshare->rf_ft_var.antSw_enable = 0; + priv->pshare->RSSI_test =0; #endif + } +#ifdef SW_ANT_SWITCH + else if(ant==3) { + if(!priv->pshare->rf_ft_var.antSw_enable) { + + dm_SW_AntennaSwitchInit(priv); + ODM_Write4Byte(pDM_Odm,0x858, 0x569a569a); + priv->pshare->lastTxOkCnt = priv->net_stats.tx_bytes; + priv->pshare->lastRxOkCnt = priv->net_stats.rx_bytes; + } + if ( !priv->pshare->rf_ft_var.antSw_select) + ODM_Write1Byte(pDM_Odm,0xc50, ODM_Read1Byte(pDM_Odm,0xc50) & (~ BIT(7))); // rx OFDM SW control + else + ODM_Write1Byte(pDM_Odm,0xc58, ODM_Read1Byte(pDM_Odm,0xc58) & (~ BIT(7))); // rx OFDM SW control + + ODM_Write1Byte(pDM_Odm,0xa01, ODM_Read1Byte(pDM_Odm,0xa01) & (~ BIT(7))); // rx CCK SW control + ODM_Write4Byte(pDM_Odm,0x80c, ODM_Read4Byte(pDM_Odm,0x80c) & (~ BIT(21))); // select ant by tx desc + priv->pshare->rf_ft_var.antHw_enable = 0; + priv->pshare->rf_ft_var.antSw_enable = 1; + + } #endif + ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("<==============ODM_Diversity_AntennaSelect\n")); -#if(defined(CONFIG_SW_ANTENNA_DIVERSITY)) - ODM_ReleaseTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer); + return 1; +} #endif -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +#else //#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) -#if (RTL8188E_SUPPORT == 1) - ODM_ReleaseTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer); +VOID odm_InitHybridAntDiv( IN PDM_ODM_T pDM_Odm ){} +VOID odm_HwAntDiv( IN PDM_ODM_T pDM_Odm){} +#if(DM_ODM_SUPPORT_TYPE==ODM_WIN) +VOID ODM_SetTxAntByTxInfo_88C_92D( + IN PDM_ODM_T pDM_Odm, + IN pu1Byte pDesc, + IN u1Byte macId +){} +#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) +VOID ODM_SetTxAntByTxInfo_88C_92D( IN PDM_ODM_T pDM_Odm){ } +#elif(DM_ODM_SUPPORT_TYPE==ODM_AP) +VOID ODM_SetTxAntByTxInfo_88C_92D( IN PDM_ODM_T pDM_Odm){ } #endif - ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PSDTimer); - // - //Path Diversity - //Neil Chen--2011--06--16-- / 2012/02/23 MH Revise Arch. - // - ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer); +#endif //#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) - ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer); - ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer); - ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer); -#endif -} +//============================================================ +//EDCA Turbo +//============================================================ +//Remove Edca by Yuchen -//3============================================================ -//3 Tx Power Tracking -//3============================================================ -VOID -odm_IQCalibrate( - IN PDM_ODM_T pDM_Odm - ) -{ - PADAPTER Adapter = pDM_Odm->Adapter; - - if(!IS_HARDWARE_TYPE_JAGUAR(Adapter)) - return; - else if(IS_HARDWARE_TYPE_8812AU(Adapter)) - return; -#if (RTL8821A_SUPPORT == 1) - if(pDM_Odm->bLinked) - { - if((*pDM_Odm->pChannel != pDM_Odm->preChannel) && (!*pDM_Odm->pbScanInProcess)) - { - pDM_Odm->preChannel = *pDM_Odm->pChannel; - pDM_Odm->LinkedInterval = 0; - } - - if(pDM_Odm->LinkedInterval < 3) - pDM_Odm->LinkedInterval++; - - if(pDM_Odm->LinkedInterval == 2) - { - // Mark out IQK flow to prevent tx stuck. by Maddest 20130306 - // Open it verified by James 20130715 - PHY_IQCalibrate_8821A(Adapter, FALSE); - } - } - else - pDM_Odm->LinkedInterval = 0; -#endif -} - - -VOID -odm_TXPowerTrackingInit( - IN PDM_ODM_T pDM_Odm - ) +#if( DM_ODM_SUPPORT_TYPE == ODM_WIN) +// +// 2011/07/26 MH Add an API for testing IQK fail case. +// +BOOLEAN +ODM_CheckPowerStatus( + IN PADAPTER Adapter) { - odm_TXPowerTrackingThermalMeterInit(pDM_Odm); -} -u1Byte -getSwingIndex( - IN PDM_ODM_T pDM_Odm - ) -{ - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u1Byte i = 0; - u4Byte bbSwing; - u4Byte swingTableSize; - pu4Byte pSwingTable; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + RT_RF_POWER_STATE rtState; + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8723B || - pDM_Odm->SupportICType == ODM_RTL8192E) + // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. + if (pMgntInfo->init_adpt_in_progress == TRUE) { - bbSwing = PHY_QueryBBReg(Adapter, rOFDM0_XATxIQImbalance, 0xFFC00000); - - pSwingTable = OFDMSwingTable_New; - swingTableSize = OFDM_TABLE_SIZE; - } else { -#if ((RTL8812A_SUPPORT==1)||(RTL8821A_SUPPORT==1)) - if (pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8821) - { - bbSwing = PHY_GetTxBBSwing_8812A(Adapter, pHalData->CurrentBandType, ODM_RF_PATH_A); - pSwingTable = TxScalingTable_Jaguar; - swingTableSize = TXSCALE_TABLE_SIZE; - } - else -#endif - { - bbSwing = 0; - pSwingTable = OFDMSwingTable; - swingTableSize = OFDM_TABLE_SIZE; - } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter")); + return TRUE; } - - for (i = 0; i < swingTableSize; ++i) { - u4Byte tableValue = pSwingTable[i]; - - if (tableValue >= 0x100000 ) - tableValue >>= 22; - if (bbSwing == tableValue) - break; + + // + // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. + // + Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); + if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n", + Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState)); + return FALSE; } - return i; + return TRUE; } +#endif -VOID -odm_TXPowerTrackingThermalMeterInit( - IN PDM_ODM_T pDM_Odm - ) -{ - u1Byte defaultSwingIndex = getSwingIndex(pDM_Odm); - u1Byte p = 0; -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +// need to ODM CE Platform +//move to here for ANT detection mechanism using - #if MP_DRIVER != 1 //for mp driver, turn off txpwrtracking as default - pHalData->TxPowerTrackControl = TRUE; - #endif -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +#if ((DM_ODM_SUPPORT_TYPE == ODM_WIN)||(DM_ODM_SUPPORT_TYPE == ODM_CE)) +u4Byte +GetPSDData( + IN PDM_ODM_T pDM_Odm, + unsigned int point, + u1Byte initial_gain_psd) +{ + //unsigned int val, rfval; + //int psd_report; + u4Byte psd_report; + + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + //Debug Message + //val = PHY_QueryBBReg(Adapter,0x908, bMaskDWord); + //DbgPrint("Reg908 = 0x%x\n",val); + //val = PHY_QueryBBReg(Adapter,0xDF4, bMaskDWord); + //rfval = PHY_QueryRFReg(Adapter, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask); + //DbgPrint("RegDF4 = 0x%x, RFReg00 = 0x%x\n",val, rfval); + //DbgPrint("PHYTXON = %x, OFDMCCA_PP = %x, CCKCCA_PP = %x, RFReg00 = %x\n", + //(val&BIT25)>>25, (val&BIT14)>>14, (val&BIT15)>>15, rfval); + //Set DCO frequency index, offset=(40MHz/SamplePts)*point + ODM_SetBBReg(pDM_Odm, 0x808, 0x3FF, point); - if (pDM_Odm->SupportICType >= ODM_RTL8188E) - { - pDM_Odm->RFCalibrateInfo.bTXPowerTracking = _TRUE; - pDM_Odm->RFCalibrateInfo.TXPowercount = 0; - pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = _FALSE; - //#if (MP_DRIVER != 1) //for mp driver, turn off txpwrtracking as default - if ( *(pDM_Odm->mp_mode) != 1) - pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _TRUE; - //#endif//#if (MP_DRIVER != 1) - MSG_8192C("pDM_Odm TxPowerTrackControl = %d\n", pDM_Odm->RFCalibrateInfo.TxPowerTrackControl); - } - else - { - struct dm_priv *pdmpriv = &pHalData->dmpriv; + //Start PSD calculation, Reg808[22]=0->1 + ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 1); + //Need to wait for HW PSD report + ODM_StallExecution(1000); + ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 0); + //Read PSD report, Reg8B4[15:0] + psd_report = ODM_GetBBReg(pDM_Odm,0x8B4, bMaskDWord) & 0x0000FFFF; + +#if 1//(DEV_BUS_TYPE == RT_PCI_INTERFACE) && ( (RT_PLATFORM == PLATFORM_LINUX) || (RT_PLATFORM == PLATFORM_MACOSX)) + psd_report = (u4Byte) (ConvertTo_dB(psd_report))+(u4Byte)(initial_gain_psd-0x1c); +#else + psd_report = (int) (20*log10((double)psd_report))+(int)(initial_gain_psd-0x1c); +#endif - pdmpriv->bTXPowerTracking = _TRUE; - pdmpriv->TXPowercount = 0; - pdmpriv->bTXPowerTrackingInit = _FALSE; - //#if (MP_DRIVER != 1) //for mp driver, turn off txpwrtracking as default + return psd_report; + +} - if (*(pDM_Odm->mp_mode) != 1) - pdmpriv->TxPowerTrackControl = _TRUE; - //#endif//#if (MP_DRIVER != 1) +u4Byte +ConvertTo_dB( + u4Byte Value) +{ + u1Byte i; + u1Byte j; + u4Byte dB; - //MSG_8192C("pdmpriv->TxPowerTrackControl = %d\n", pdmpriv->TxPowerTrackControl); - } + Value = Value & 0xFFFF; -#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) - #ifdef RTL8188E_SUPPORT + for (i=0;i<8;i++) { - pDM_Odm->RFCalibrateInfo.bTXPowerTracking = _TRUE; - pDM_Odm->RFCalibrateInfo.TXPowercount = 0; - pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = _FALSE; - pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _TRUE; + if (Value <= dB_Invert_Table[i][11]) + { + break; + } } - #endif -#endif - pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = TRUE; - pDM_Odm->RFCalibrateInfo.ThermalValue = pHalData->EEPROMThermalMeter; - pDM_Odm->RFCalibrateInfo.ThermalValue_IQK = pHalData->EEPROMThermalMeter; - pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = pHalData->EEPROMThermalMeter; - - // The index of "0 dB" in SwingTable. - if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8723B || - pDM_Odm->SupportICType == ODM_RTL8192E) - { - pDM_Odm->DefaultOfdmIndex = (defaultSwingIndex >= OFDM_TABLE_SIZE) ? 30 : defaultSwingIndex; - pDM_Odm->DefaultCckIndex = 20; - } - else + if (i >= 8) { - pDM_Odm->DefaultOfdmIndex = (defaultSwingIndex >= TXSCALE_TABLE_SIZE) ? 24 : defaultSwingIndex; - pDM_Odm->DefaultCckIndex = 24; + return (96); // maximum 96 dB } - pDM_Odm->BbSwingIdxCckBase = pDM_Odm->DefaultCckIndex; - pDM_Odm->RFCalibrateInfo.CCK_index = pDM_Odm->DefaultCckIndex; - - for (p = ODM_RF_PATH_A; p < MAX_RF_PATH; ++p) + for (j=0;j<12;j++) { - pDM_Odm->BbSwingIdxOfdmBase[p] = pDM_Odm->DefaultOfdmIndex; - pDM_Odm->RFCalibrateInfo.OFDM_index[p] = pDM_Odm->DefaultOfdmIndex; - pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = 0; - pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[p] = 0; - pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p] = 0; + if (Value <= dB_Invert_Table[i][j]) + { + break; + } } + dB = i*12 + j + 1; + + return (dB); } +#endif -VOID -ODM_TXPowerTrackingCheck( - IN PDM_ODM_T pDM_Odm - ) -{ - // - // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate - // at the same time. In the stage2/3, we need to prive universal interface and merge all - // HW dynamic mechanism. - // - switch (pDM_Odm->SupportPlatform) - { - case ODM_WIN: - odm_TXPowerTrackingCheckMP(pDM_Odm); - break; +// +// LukeLee: +// PSD function will be moved to FW in future IC, but now is only implemented in MP platform +// So PSD function will not be incorporated to common ODM +// +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - case ODM_CE: - odm_TXPowerTrackingCheckCE(pDM_Odm); - break; +#define AFH_PSD 1 //0:normal PSD scan, 1: only do 20 pts PSD +#define MODE_40M 0 //0:20M, 1:40M +#define PSD_TH2 3 +#define PSD_CHMIN 20 // Minimum channel number for BT AFH +#define SIR_STEP_SIZE 3 +#define Smooth_Size_1 5 +#define Smooth_TH_1 3 +#define Smooth_Size_2 10 +#define Smooth_TH_2 4 +#define Smooth_Size_3 20 +#define Smooth_TH_3 4 +#define Smooth_Step_Size 5 +#define Adaptive_SIR 1 +//#if(RTL8723_FPGA_VERIFICATION == 1) +//#define PSD_RESCAN 1 +//#else +//#define PSD_RESCAN 4 +//#endif +#define SCAN_INTERVAL 1500 //ms +#define SYN_Length 5 // for 92D + +#define LNA_Low_Gain_1 0x64 +#define LNA_Low_Gain_2 0x5A +#define LNA_Low_Gain_3 0x58 - case ODM_AP: - odm_TXPowerTrackingCheckAP(pDM_Odm); - break; +#define pw_th_10dB 0x0 +#define pw_th_16dB 0x3 - case ODM_ADSL: - //odm_DIGAP(pDM_Odm); - break; - } +#define FA_RXHP_TH1 5000 +#define FA_RXHP_TH2 1500 +#define FA_RXHP_TH3 800 +#define FA_RXHP_TH4 600 +#define FA_RXHP_TH5 500 + +#define Idle_Mode 0 +#define High_TP_Mode 1 +#define Low_TP_Mode 2 -} VOID -odm_TXPowerTrackingCheckCE( - IN PDM_ODM_T pDM_Odm - ) +odm_PSDMonitorInit( + IN PDM_ODM_T pDM_Odm) { -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) - PADAPTER Adapter = pDM_Odm->Adapter; - #if( (RTL8192C_SUPPORT==1) || (RTL8723A_SUPPORT==1) ) - if(IS_HARDWARE_TYPE_8192C(Adapter)){ - rtl8192c_odm_CheckTXPowerTracking(Adapter); - return; - } - #endif - - #if (RTL8192D_SUPPORT==1) - if(IS_HARDWARE_TYPE_8192D(Adapter)){ - #if (RTL8192D_EASY_SMART_CONCURRENT == 1) - if(!Adapter->bSlaveOfDMSP) - #endif - rtl8192d_odm_CheckTXPowerTracking(Adapter); - return; - } - #endif - - #if(((RTL8188E_SUPPORT==1) || (RTL8812A_SUPPORT==1) || (RTL8821A_SUPPORT==1) || (RTL8192E_SUPPORT==1) || (RTL8723B_SUPPORT==1) )) - if(!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)) - { - return; - } +#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE) + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + //PSD Monitor Setting + //Which path in ADC/DAC is turnned on for PSD: both I/Q + ODM_SetBBReg(pDM_Odm, ODM_PSDREG, BIT10|BIT11, 0x3); + //Ageraged number: 8 + ODM_SetBBReg(pDM_Odm, ODM_PSDREG, BIT12|BIT13, 0x1); + pDM_Odm->bPSDinProcess = FALSE; + pDM_Odm->bUserAssignLevel = FALSE; + pDM_Odm->bPSDactive = FALSE; + //pDM_Odm->bDMInitialGainEnable=TRUE; //change the initialization to DIGinit + //Set Debug Port + //PHY_SetBBReg(Adapter, 0x908, bMaskDWord, 0x803); + //PHY_SetBBReg(Adapter, 0xB34, bMaskByte0, 0x00); // pause PSD + //PHY_SetBBReg(Adapter, 0xB38, bMaskByte0, 10); //rescan + //PHY_SetBBReg(Adapter, 0xB38, bMaskByte2|bMaskByte3, 100); //interval - if(!pDM_Odm->RFCalibrateInfo.TM_Trigger) //at least delay 1 sec - { - //pHalData->TxPowerCheckCnt++; //cosa add for debug - if(IS_HARDWARE_TYPE_8188E(Adapter) || IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8192E(Adapter)||IS_HARDWARE_TYPE_8723B(Adapter)) - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_T_METER_NEW, (BIT17 | BIT16), 0x03); - else - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_T_METER_OLD, bRFRegOffsetMask, 0x60); - - //DBG_871X("Trigger Thermal Meter!!\n"); - - pDM_Odm->RFCalibrateInfo.TM_Trigger = 1; - return; - } - else - { - //DBG_871X("Schedule TxPowerTracking direct call!!\n"); - ODM_TXPowerTrackingCallback_ThermalMeter(Adapter); - pDM_Odm->RFCalibrateInfo.TM_Trigger = 0; - } - #endif -#endif + //PlatformSetTimer( Adapter, &pHalData->PSDTriggerTimer, 0); //ms +#endif } VOID -odm_TXPowerTrackingCheckMP( - IN PDM_ODM_T pDM_Odm - ) +PatchDCTone( + IN PDM_ODM_T pDM_Odm, + pu4Byte PSD_report, + u1Byte initial_gain_psd +) { -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - PADAPTER Adapter = pDM_Odm->Adapter; + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + //PADAPTER pAdapter; + + u4Byte psd_report; - if (ODM_CheckPowerStatus(Adapter) == FALSE) + //2 Switch to CH11 to patch CH9 and CH13 DC tone + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, 11); + + if(pDM_Odm->SupportICType== ODM_RTL8192D) { - RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("===>ODM_CheckPowerStatus() return FALSE\n")); - return; - } - - if(IS_HARDWARE_TYPE_8723A(Adapter)) - return; - - if(!Adapter->bSlaveOfDMSP || Adapter->DualMacSmartConcurrent == FALSE) - odm_TXPowerTrackingThermalMeterCheck(Adapter); - else { - RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("!Adapter->bSlaveOfDMSP || Adapter->DualMacSmartConcurrent == FALSE\n")); + if((*(pDM_Odm->pMacPhyMode) == ODM_SMSP)||(*(pDM_Odm->pMacPhyMode) == ODM_DMSP)) + { + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_CHNLBW, 0x3FF, 11); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x25, 0xfffff, 0x643BC); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x26, 0xfffff, 0xFC038); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x27, 0xfffff, 0x77C1A); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2B, 0xfffff, 0x41289); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2C, 0xfffff, 0x01840); + } + else + { + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x25, 0xfffff, 0x643BC); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x26, 0xfffff, 0xFC038); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x27, 0xfffff, 0x77C1A); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2B, 0xfffff, 0x41289); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2C, 0xfffff, 0x01840); + } } -#endif -} - - -VOID -odm_TXPowerTrackingCheckAP( - IN PDM_ODM_T pDM_Odm - ) -{ -#if (DM_ODM_SUPPORT_TYPE == ODM_AP) - prtl8192cd_priv priv = pDM_Odm->priv; + //Ch9 DC tone patch + psd_report = GetPSDData(pDM_Odm, 96, initial_gain_psd); + PSD_report[50] = psd_report; + //Ch13 DC tone patch + psd_report = GetPSDData(pDM_Odm, 32, initial_gain_psd); + PSD_report[70] = psd_report; + + //2 Switch to CH3 to patch CH1 and CH5 DC tone + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, 3); - if ( (priv->pmib->dot11RFEntry.ther) && ((priv->up_time % priv->pshare->rf_ft_var.tpt_period) == 0)){ -#ifdef CONFIG_RTL_92D_SUPPORT - if (GET_CHIP_VER(priv)==VERSION_8192D){ - tx_power_tracking_92D(priv); - } else -#endif + + if(pDM_Odm->SupportICType==ODM_RTL8192D) + { + if((*(pDM_Odm->pMacPhyMode) == ODM_SMSP)||(*(pDM_Odm->pMacPhyMode) == ODM_DMSP)) { -#ifdef CONFIG_RTL_92C_SUPPORT - tx_power_tracking(priv); -#endif + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_CHNLBW, 0x3FF, 3); + //PHY_SetRFReg(Adapter, ODM_RF_PATH_B, 0x25, 0xfffff, 0x643BC); + //PHY_SetRFReg(Adapter, ODM_RF_PATH_B, 0x26, 0xfffff, 0xFC038); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x27, 0xfffff, 0x07C1A); + //PHY_SetRFReg(Adapter, ODM_RF_PATH_B, 0x2B, 0xfffff, 0x61289); + //PHY_SetRFReg(Adapter, ODM_RF_PATH_B, 0x2C, 0xfffff, 0x01C41); + } + else + { + //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x25, 0xfffff, 0x643BC); + //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x26, 0xfffff, 0xFC038); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x27, 0xfffff, 0x07C1A); + //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x2B, 0xfffff, 0x61289); + //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x2C, 0xfffff, 0x01C41); } } -#endif + + //Ch1 DC tone patch + psd_report = GetPSDData(pDM_Odm, 96, initial_gain_psd); + PSD_report[10] = psd_report; + //Ch5 DC tone patch + psd_report = GetPSDData(pDM_Odm, 32, initial_gain_psd); + PSD_report[30] = psd_report; } - -//antenna mapping info -// 1: right-side antenna -// 2/0: left-side antenna -//PDM_SWAT_Table->CCK_Ant1_Cnt /OFDM_Ant1_Cnt: for right-side antenna: Ant:1 RxDefaultAnt1 -//PDM_SWAT_Table->CCK_Ant2_Cnt /OFDM_Ant2_Cnt: for left-side antenna: Ant:0 RxDefaultAnt2 -// We select left antenna as default antenna in initial process, modify it as needed -// - -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - VOID -odm_TXPowerTrackingThermalMeterCheck( - IN PADAPTER Adapter - ) +GoodChannelDecision( + PDM_ODM_T pDM_Odm, + pu4Byte PSD_report, + pu1Byte PSD_bitmap, + u1Byte RSSI_BT, + pu1Byte PSD_bitmap_memory) { -#ifndef AP_BUILD_WORKAROUND - static u1Byte TM_Trigger = 0; - - if(!(GET_HAL_DATA(Adapter)->DM_OutSrc.SupportAbility & ODM_RF_TX_PWR_TRACK)) - { - RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, - ("===>odm_TXPowerTrackingThermalMeterCheck(),pMgntInfo->bTXPowerTracking is FALSE, return!!\n")); - return; - } + pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; + //s4Byte TH1 = SSBT-0x15; // modify TH by Neil Chen + s4Byte TH1= RSSI_BT+0x14; + s4Byte TH2 = RSSI_BT+85; + //u2Byte TH3; +// s4Byte RegB34; + u1Byte bitmap, Smooth_size[3], Smooth_TH[3]; + //u1Byte psd_bit; + u4Byte i,n,j, byte_idx, bit_idx, good_cnt, good_cnt_smoothing, Smooth_Interval[3]; + int start_byte_idx,start_bit_idx,cur_byte_idx, cur_bit_idx,NOW_byte_idx ; + +// RegB34 = PHY_QueryBBReg(Adapter,0xB34, bMaskDWord)&0xFF; - if(!TM_Trigger) //at least delay 1 sec - { - if(IS_HARDWARE_TYPE_8192D(Adapter)) - PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_T_METER_92D, BIT17 | BIT16, 0x03); - else if(IS_HARDWARE_TYPE_8188E(Adapter) || IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8192E(Adapter) || - IS_HARDWARE_TYPE_8723B(Adapter)) - PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_T_METER_88E, BIT17 | BIT16, 0x03); - else - PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60); - - RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Trigger Thermal Meter!!\n")); - - TM_Trigger = 1; - return; + if((pDM_Odm->SupportICType == ODM_RTL8192C)||(pDM_Odm->SupportICType == ODM_RTL8192D)) + { + TH1 = RSSI_BT + 0x14; } - else + + Smooth_size[0]=Smooth_Size_1; + Smooth_size[1]=Smooth_Size_2; + Smooth_size[2]=Smooth_Size_3; + Smooth_TH[0]=Smooth_TH_1; + Smooth_TH[1]=Smooth_TH_2; + Smooth_TH[2]=Smooth_TH_3; + Smooth_Interval[0]=16; + Smooth_Interval[1]=15; + Smooth_Interval[2]=13; + good_cnt = 0; + if(pDM_Odm->SupportICType==ODM_RTL8723A) { - RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Schedule TxPowerTracking direct call!!\n")); - odm_TXPowerTrackingDirectCall(Adapter); //Using direct call is instead, added by Roger, 2009.06.18. - TM_Trigger = 0; + //2 Threshold + + if(RSSI_BT >=41) + TH1 = 113; + else if(RSSI_BT >=38) // >= -15dBm + TH1 = 105; //0x69 + else if((RSSI_BT >=33)&(RSSI_BT <38)) + TH1 = 99+(RSSI_BT-33); //0x63 + else if((RSSI_BT >=26)&(RSSI_BT<33)) + TH1 = 99-(33-RSSI_BT)+2; //0x5e + else if((RSSI_BT >=24)&(RSSI_BT<26)) + TH1 = 88-((RSSI_BT-24)*3); //0x58 + else if((RSSI_BT >=18)&(RSSI_BT<24)) + TH1 = 77+((RSSI_BT-18)*2); + else if((RSSI_BT >=14)&(RSSI_BT<18)) + TH1 = 63+((RSSI_BT-14)*2); + else if((RSSI_BT >=8)&(RSSI_BT<14)) + TH1 = 58+((RSSI_BT-8)*2); + else if((RSSI_BT >=3)&(RSSI_BT<8)) + TH1 = 52+(RSSI_BT-3); + else + TH1 = 51; } -#endif -} -// Only for 8723A SW ANT DIV INIT--2012--07--17 -VOID -odm_SwAntDivInit_NIC_8723A( - IN PDM_ODM_T pDM_Odm) -{ - pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - PADAPTER Adapter = pDM_Odm->Adapter; + for (i = 0; i< 10; i++) + PSD_bitmap[i] = 0; - u1Byte btAntNum=BT_GetPgAntNum(Adapter); - if(IS_HARDWARE_TYPE_8723A(Adapter)) + // Add By Gary + for (i=0; i<80; i++) + pRX_HP_Table->PSD_bitmap_RXHP[i] = 0; + // End + + + + if(pDM_Odm->SupportICType==ODM_RTL8723A) { - pDM_SWAT_Table->ANTA_ON =TRUE; - - // Set default antenna B status by PG - if(btAntNum == 2) - pDM_SWAT_Table->ANTB_ON = TRUE; - else if(btAntNum == 1) - pDM_SWAT_Table->ANTB_ON = FALSE; + TH1 =TH1-SIR_STEP_SIZE; + } + while (good_cnt < PSD_CHMIN) + { + good_cnt = 0; + if(pDM_Odm->SupportICType==ODM_RTL8723A) + { + if(TH1 ==TH2) + break; + if((TH1+SIR_STEP_SIZE) < TH2) + TH1 += SIR_STEP_SIZE; else - pDM_SWAT_Table->ANTB_ON = TRUE; - } + TH1 = TH2; + } + else + { + if(TH1==(RSSI_BT+0x1E)) + break; + if((TH1+2) < (RSSI_BT+0x1E)) + TH1+=3; + else + TH1 = RSSI_BT+0x1E; + + } + ODM_RT_TRACE(pDM_Odm,COMP_PSD,DBG_LOUD,("PSD: decision threshold is: %d", TH1)); + + for (i = 0; i< 80; i++) + { + if((s4Byte)(PSD_report[i]) < TH1) + { + byte_idx = i / 8; + bit_idx = i -8*byte_idx; + bitmap = PSD_bitmap[byte_idx]; + PSD_bitmap[byte_idx] = bitmap | (u1Byte) (1 << bit_idx); + } + } + +#if DBG + ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: before smoothing\n")); + for(n=0;n<10;n++) + { + //DbgPrint("PSD_bitmap[%u]=%x\n", n, PSD_bitmap[n]); + for (i = 0; i<8; i++) + ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD_bitmap[%u] = %d\n", 2402+n*8+i, (PSD_bitmap[n]&BIT(i))>>i)); + } +#endif -} + //1 Start of smoothing function -#endif //end #ifMP + for (j=0;j<3;j++) + { + start_byte_idx=0; + start_bit_idx=0; + for(n=0; n 7 ) + { + start_byte_idx= start_byte_idx+start_bit_idx/8; + start_bit_idx = start_bit_idx%8; + } + } -//3============================================================ -//3 SW Antenna Diversity -//3============================================================ -#if(defined(CONFIG_SW_ANTENNA_DIVERSITY)) -VOID -odm_SwAntDivInit( - IN PDM_ODM_T pDM_Odm - ) -{ -#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) - odm_SwAntDivInit_NIC(pDM_Odm); -#elif(DM_ODM_SUPPORT_TYPE == ODM_AP) - dm_SW_AntennaSwitchInit(pDM_Odm->priv); -#endif -} + ODM_RT_TRACE( pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: after %u smoothing", j+1)); + for(n=0;n<10;n++) + { + for (i = 0; i<8; i++) + { + ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD_bitmap[%u] = %d\n", 2402+n*8+i, (PSD_bitmap[n]&BIT(i))>>i)); + + if ( ((PSD_bitmap[n]&BIT(i))>>i) ==1) //----- Add By Gary + { + pRX_HP_Table->PSD_bitmap_RXHP[8*n+i] = 1; + } // ------end by Gary + } + } -VOID -odm_SwAntDivInit_NIC( - IN PDM_ODM_T pDM_Odm - ) -{ - pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + } + + good_cnt = 0; + for ( i = 0; i < 10; i++) + { + for (n = 0; n < 8; n++) + if((PSD_bitmap[i]& BIT(n)) != 0) + good_cnt++; + } + ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: good channel cnt = %u",good_cnt)); + } -// Init SW ANT DIV mechanism for 8723AE/AU/AS -// Neil Chen--2012--07--17--- -// CE/AP/ADSL no using SW ANT DIV for 8723A Series IC -//#if (DM_ODM_SUPPORT_TYPE==ODM_WIN) -#if (RTL8723A_SUPPORT==1) - if(pDM_Odm->SupportICType == ODM_RTL8723A) + //RT_TRACE(COMP_PSD, DBG_LOUD,("PSD: SSBT=%d, TH2=%d, TH1=%d",SSBT,TH2,TH1)); + for (i = 0; i <10; i++) + ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: PSD_bitmap[%u]=%x",i,PSD_bitmap[i])); +/* + //Update bitmap memory + for(i = 0; i < 80; i++) { - odm_SwAntDivInit_NIC_8723A(pDM_Odm); - } -#endif - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS:Init SW Antenna Switch\n")); - pDM_SWAT_Table->RSSI_sum_A = 0; - pDM_SWAT_Table->RSSI_cnt_A = 0; - pDM_SWAT_Table->RSSI_sum_B = 0; - pDM_SWAT_Table->RSSI_cnt_B = 0; - pDM_SWAT_Table->CurAntenna = MAIN_ANT; - pDM_SWAT_Table->PreAntenna = MAIN_ANT; - pDM_SWAT_Table->try_flag = 0xff; - pDM_SWAT_Table->PreRSSI = 0; - pDM_SWAT_Table->SWAS_NoLink_State = 0; - pDM_SWAT_Table->bTriggerAntennaSwitch = 0; - pDM_SWAT_Table->SelectAntennaMap=0xAA; - pDM_SWAT_Table->lastTxOkCnt = 0; - pDM_SWAT_Table->lastRxOkCnt = 0; - pDM_SWAT_Table->TXByteCnt_A = 0; - pDM_SWAT_Table->TXByteCnt_B = 0; - pDM_SWAT_Table->RXByteCnt_A = 0; - pDM_SWAT_Table->RXByteCnt_B = 0; - pDM_SWAT_Table->TrafficLoad = TRAFFIC_LOW; - pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ODM_Read4Byte(pDM_Odm, 0x860); - + byte_idx = i / 8; + bit_idx = i -8*byte_idx; + psd_bit = (PSD_bitmap[byte_idx] & BIT(bit_idx)) >> bit_idx; + bitmap = PSD_bitmap_memory[i]; + PSD_bitmap_memory[i] = (bitmap << 1) |psd_bit; + } +*/ } -// -// 20100514 Joseph: -// Add new function to reset the state of antenna diversity before link. -// -VOID -ODM_SwAntDivResetBeforeLink( - IN PDM_ODM_T pDM_Odm - ) -{ - - pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - pDM_SWAT_Table->SWAS_NoLink_State = 0; - -} -// -// 20100514 Luke/Joseph: -// Add new function to reset antenna diversity state after link. -// VOID -ODM_SwAntDivRestAfterLink( - IN PDM_ODM_T pDM_Odm - ) +odm_PSD_Monitor( + PDM_ODM_T pDM_Odm +) { - pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; - u4Byte i; + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + //PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - if(pDM_Odm->SupportICType == ODM_RTL8723A) - { - pDM_SWAT_Table->RSSI_cnt_A = 0; - pDM_SWAT_Table->RSSI_cnt_B = 0; - pDM_Odm->RSSI_test = FALSE; - pDM_SWAT_Table->try_flag = 0xff; - pDM_SWAT_Table->RSSI_Trying = 0; - pDM_SWAT_Table->SelectAntennaMap=0xAA; + unsigned int pts, start_point, stop_point; + u1Byte initial_gain ; + static u1Byte PSD_bitmap_memory[80], init_memory = 0; + static u1Byte psd_cnt=0; + static u4Byte PSD_report[80], PSD_report_tmp; + static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; + u1Byte H2C_PSD_DATA[5]={0,0,0,0,0}; + static u1Byte H2C_PSD_DATA_last[5] ={0,0,0,0,0}; + u1Byte idx[20]={96,99,102,106,109,112,115,118,122,125, + 0,3,6,10,13,16,19,22,26,29}; + u1Byte n, i, channel, BBReset,tone_idx; + u1Byte PSD_bitmap[10], SSBT=0,initial_gain_psd=0, RSSI_BT=0, initialGainUpper; + s4Byte PSD_skip_start, PSD_skip_stop; + u4Byte CurrentChannel, RXIQI, RxIdleLowPwr, wlan_channel; + u4Byte ReScan, Interval, Is40MHz; + u8Byte curTxOkCnt, curRxOkCnt; + int cur_byte_idx, cur_bit_idx; + PADAPTER Adapter = pDM_Odm->Adapter; + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - } - else if(pDM_Odm->SupportICType & (ODM_RTL8723B|ODM_RTL8821)) + if( (*(pDM_Odm->pbScanInProcess)) || + pDM_Odm->bLinkInProcess) { - pDM_Odm->RSSI_test = FALSE; - pDM_SWAT_Table->try_flag = 0xff; - pDM_SWAT_Table->RSSI_Trying = 0; - pDM_SWAT_Table->Double_chk_flag= 0; - - pDM_FatTable->RxIdleAnt=MAIN_ANT; - - for (i=0; iSupportICType==ODM_RTL8723A)&(pDM_Odm->SupportInterface==ODM_ITRF_PCIE)) { - pDM_FatTable->MainAnt_Sum[i] = 0; - pDM_FatTable->AuxAnt_Sum[i] = 0; - pDM_FatTable->MainAnt_Cnt[i] = 0; - pDM_FatTable->AuxAnt_Cnt[i] = 0; + ODM_SetTimer( pDM_Odm, &pDM_Odm->PSDTimer, 1500); //ms + //psd_cnt=0; } - - } -} - -void -odm_SwAntDetectInit( - IN PDM_ODM_T pDM_Odm - ) -{ - pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; -#if (RTL8723B_SUPPORT == 1) - pDM_SWAT_Table->SWAS_NoLink_BK_Reg92c = ODM_Read4Byte(pDM_Odm, rDPDT_control); -#endif - pDM_SWAT_Table->PreAntenna = MAIN_ANT; - pDM_SWAT_Table->CurAntenna = MAIN_ANT; - pDM_SWAT_Table->SWAS_NoLink_State = 0; -} - -VOID -ODM_SwAntDivChkPerPktRssi( - IN PDM_ODM_T pDM_Odm, - IN u1Byte StationID, - IN PODM_PHY_INFO_T pPhyInfo - ) -{ - SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - - if(!(pDM_Odm->SupportAbility & (ODM_BB_ANT_DIV))) return; + } -// temporary Fix 8723A MP SW ANT DIV Bug --NeilChen--2012--07--11 -#if (DM_ODM_SUPPORT_TYPE==ODM_WIN) - if(pDM_Odm->SupportICType == ODM_RTL8723A) + if(pDM_Odm->bBtHsOperation) { - //if(StationID == pDM_SWAT_Table->RSSI_target) - //{ - //1 RSSI for SW Antenna Switch - if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) - { - pDM_SWAT_Table->RSSI_sum_A += pPhyInfo->RxPWDBAll; - pDM_SWAT_Table->RSSI_cnt_A++; - } - else - { - pDM_SWAT_Table->RSSI_sum_B += pPhyInfo->RxPWDBAll; - pDM_SWAT_Table->RSSI_cnt_B++; - - } - //} + ReScan = 1; + Interval = SCAN_INTERVAL; } else { - if(StationID == pDM_SWAT_Table->RSSI_target) - { - //1 RSSI for SW Antenna Switch - if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) - { - pDM_SWAT_Table->RSSI_sum_A += pPhyInfo->RxPWDBAll; - pDM_SWAT_Table->RSSI_cnt_A++; - } - else - { - pDM_SWAT_Table->RSSI_sum_B += pPhyInfo->RxPWDBAll; - pDM_SWAT_Table->RSSI_cnt_B++; + ReScan = PSD_RESCAN; + Interval = SCAN_INTERVAL; + } - } - } + //1 Initialization + if(init_memory == 0) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Init memory\n")); + for(i = 0; i < 80; i++) + PSD_bitmap_memory[i] = 0xFF; // channel is always good + init_memory = 1; } -#else - if(StationID == pDM_SWAT_Table->RSSI_target) + if(psd_cnt == 0) { - //1 RSSI for SW Antenna Switch - if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Enter dm_PSD_Monitor\n")); + for(i = 0; i < 80; i++) + PSD_report[i] = 0; + } + + //1 Backup Current Settings + CurrentChannel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); +/* + if(pDM_Odm->SupportICType==ODM_RTL8192D) + { + //2 Record Current synthesizer parameters based on current channel + if((*pDM_Odm->MacPhyMode92D == SINGLEMAC_SINGLEPHY)||(*pDM_Odm->MacPhyMode92D == DUALMAC_SINGLEPHY)) { - pDM_SWAT_Table->RSSI_sum_A += pPhyInfo->RxPWDBAll; - pDM_SWAT_Table->RSSI_cnt_A++; - } - else + SYN_RF25 = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x25, bMaskDWord); + SYN_RF26 = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x26, bMaskDWord); + SYN_RF27 = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x27, bMaskDWord); + SYN_RF2B = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x2B, bMaskDWord); + SYN_RF2C = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x2C, bMaskDWord); + } + else // DualMAC_DualPHY 2G { - pDM_SWAT_Table->RSSI_sum_B += pPhyInfo->RxPWDBAll; - pDM_SWAT_Table->RSSI_cnt_B++; - + SYN_RF25 = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x25, bMaskDWord); + SYN_RF26 = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x26, bMaskDWord); + SYN_RF27 = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x27, bMaskDWord); + SYN_RF2B = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x2B, bMaskDWord); + SYN_RF2C = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x2C, bMaskDWord); } } -#endif -} +*/ + //RXIQI = PHY_QueryBBReg(Adapter, 0xC14, bMaskDWord); + RXIQI = ODM_GetBBReg(pDM_Odm, 0xC14, bMaskDWord); -// -VOID -odm_SwAntDivChkAntSwitch( - IN PDM_ODM_T pDM_Odm, - IN u1Byte Step - ) -{ - // - // For AP/ADSL use prtl8192cd_priv - // For CE/NIC use PADAPTER - // - prtl8192cd_priv priv = pDM_Odm->priv; + //RxIdleLowPwr = (PHY_QueryBBReg(Adapter, 0x818, bMaskDWord)&BIT28)>>28; + RxIdleLowPwr = (ODM_GetBBReg(pDM_Odm, 0x818, bMaskDWord)&BIT28)>>28; - // - // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate - // at the same time. In the stage2/3, we need to prive universal interface and merge all - // HW dynamic mechanism. - // - switch (pDM_Odm->SupportPlatform) - { - case ODM_WIN: - odm_SwAntDivChkAntSwitchNIC(pDM_Odm, Step); - break; - case ODM_CE: - odm_SwAntDivChkAntSwitchNIC(pDM_Odm, Step); - break; + //2??? + if(CHNL_RUN_ABOVE_40MHZ(pMgntInfo)) + Is40MHz = TRUE; + else + Is40MHz = FALSE; - case ODM_AP: - case ODM_ADSL: -#if (DM_ODM_SUPPORT_TYPE & (ODM_AP |ODM_ADSL)) - if (priv->pshare->rf_ft_var.antSw_enable && (priv->up_time % 4==1)) - dm_SW_AntennaSwitch(priv, SWAW_STEP_PEAK); -#endif - break; - } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_PSD, DBG_LOUD,("PSD Scan Start\n")); + //1 Turn off CCK + //PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT24, 0); + ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0); + //1 Turn off TX + //Pause TX Queue + //PlatformEFIOWrite1Byte(Adapter, REG_TXPAUSE, 0xFF); + ODM_Write1Byte(pDM_Odm,REG_TXPAUSE, 0xFF); + + //Force RX to stop TX immediately + //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13); -} - -// -// 20100514 Luke/Joseph: -// Add new function for antenna diversity after link. -// This is the main function of antenna diversity after link. -// This function is called in HalDmWatchDog() and ODM_SwAntDivChkAntSwitchCallback(). -// HalDmWatchDog() calls this function with SWAW_STEP_PEAK to initialize the antenna test. -// In SWAW_STEP_PEAK, another antenna and a 500ms timer will be set for testing. -// After 500ms, ODM_SwAntDivChkAntSwitchCallback() calls this function to compare the signal just -// listened on the air with the RSSI of original antenna. -// It chooses the antenna with better RSSI. -// There is also a aged policy for error trying. Each error trying will cost more 5 seconds waiting -// penalty to get next try. + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13); + //1 Turn off RX + //Rx AGC off RegC70[0]=0, RegC7C[20]=0 + //PHY_SetBBReg(Adapter, 0xC70, BIT0, 0); + //PHY_SetBBReg(Adapter, 0xC7C, BIT20, 0); + ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 0); + ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 0); -VOID -ODM_SetAntenna( - IN PDM_ODM_T pDM_Odm, - IN u1Byte Antenna) -{ - ODM_SetBBReg(pDM_Odm, 0x860, BIT8|BIT9, Antenna); -} + + //Turn off CCA + //PHY_SetBBReg(Adapter, 0xC14, bMaskDWord, 0x0); + ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, 0x0); + + //BB Reset + //BBReset = PlatformEFIORead1Byte(Adapter, 0x02); + BBReset = ODM_Read1Byte(pDM_Odm, 0x02); + + //PlatformEFIOWrite1Byte(Adapter, 0x02, BBReset&(~BIT0)); + //PlatformEFIOWrite1Byte(Adapter, 0x02, BBReset|BIT0); + ODM_SetBBReg(pDM_Odm, 0x87C, BIT31, 1); //clock gated to prevent from AGC table mess + ODM_Write1Byte(pDM_Odm, 0x02, BBReset&(~BIT0)); + ODM_Write1Byte(pDM_Odm, 0x02, BBReset|BIT0); + ODM_SetBBReg(pDM_Odm, 0x87C, BIT31, 0); + + //1 Leave RX idle low power + //PHY_SetBBReg(Adapter, 0x818, BIT28, 0x0); -VOID -odm_SwAntDivChkAntSwitchNIC( - IN PDM_ODM_T pDM_Odm, - IN u1Byte Step - ) -{ -#if ((RTL8192C_SUPPORT==1)||(RTL8723A_SUPPORT==1)) - //PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); + //1 Fix initial gain + //if (IS_HARDWARE_TYPE_8723AE(Adapter)) + //RSSI_BT = pHalData->RSSI_BT; + //else if((IS_HARDWARE_TYPE_8192C(Adapter))||(IS_HARDWARE_TYPE_8192D(Adapter))) // Add by Gary + // RSSI_BT = RSSI_BT_new; -#if (DM_ODM_SUPPORT_TYPE==ODM_WIN) - PADAPTER Adapter=pDM_Odm->Adapter; -#endif + if((pDM_Odm->SupportICType==ODM_RTL8723A)&(pDM_Odm->SupportInterface==ODM_ITRF_PCIE)) + RSSI_BT=pDM_Odm->RSSI_BT; //need to check C2H to pDM_Odm RSSI BT - pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - s4Byte curRSSI=100, RSSI_A, RSSI_B; - u1Byte nextAntenna=AUX_ANT; - //static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; - u8Byte curTxOkCnt=0, curRxOkCnt=0; - //static u8Byte TXByteCnt_A=0, TXByteCnt_B=0, RXByteCnt_A=0, RXByteCnt_B=0; - u8Byte CurByteCnt=0, PreByteCnt=0; - //static u1Byte TrafficLoad = TRAFFIC_LOW; - u1Byte Score_A=0, Score_B=0; //A: Main; B: AUX - u1Byte i; + if(RSSI_BT>=47) + RSSI_BT=47; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); + + if(pDM_Odm->SupportICType==ODM_RTL8723A) + { + //Neil add--2011--10--12 + //2 Initial Gain index + if(RSSI_BT >=35) // >= -15dBm + initial_gain_psd = RSSI_BT*2; + else if((RSSI_BT >=33)&(RSSI_BT<35)) + initial_gain_psd = RSSI_BT*2+6; + else if((RSSI_BT >=24)&(RSSI_BT<33)) + initial_gain_psd = 70-(33-RSSI_BT); + else if((RSSI_BT >=19)&(RSSI_BT<24)) + initial_gain_psd = 64-((24-RSSI_BT)*4); + else if((RSSI_BT >=14)&(RSSI_BT<19)) + initial_gain_psd = 44-((18-RSSI_BT)*2); + else if((RSSI_BT >=8)&(RSSI_BT<14)) + initial_gain_psd = 35-(14-RSSI_BT); + else + initial_gain_psd = 0x1B; + } + else + { + + //need to do + initial_gain_psd = pDM_Odm->RSSI_Min; // PSD report based on RSSI + //} + } + //if(RSSI_BT<0x17) + // RSSI_BT +=3; + //DbgPrint("PSD: RSSI_BT= %d\n", RSSI_BT); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); - if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) - return; + //initialGainUpper = 0x5E; //Modify by neil chen + + if(pDM_Odm->bUserAssignLevel) + { + pDM_Odm->bUserAssignLevel = FALSE; + initialGainUpper = 0x7f; + } + else + { + initialGainUpper = 0x5E; + } + + /* + if (initial_gain_psd < 0x1a) + initial_gain_psd = 0x1a; + if (initial_gain_psd > initialGainUpper) + initial_gain_psd = initialGainUpper; + */ - if (pDM_Odm->SupportICType & (ODM_RTL8192D|ODM_RTL8188E)) - return; + //if(pDM_Odm->SupportICType==ODM_RTL8723A) + SSBT = RSSI_BT * 2 +0x3E; + + + //if(IS_HARDWARE_TYPE_8723AE(Adapter)) + // SSBT = RSSI_BT * 2 +0x3E; + //else if((IS_HARDWARE_TYPE_8192C(Adapter))||(IS_HARDWARE_TYPE_8192D(Adapter))) // Add by Gary + //{ + // RSSI_BT = initial_gain_psd; + // SSBT = RSSI_BT; + //} + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: SSBT= %d\n", SSBT)); + ODM_RT_TRACE( pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: initial gain= 0x%x\n", initial_gain_psd)); + //DbgPrint("PSD: SSBT= %d", SSBT); + //need to do + //pMgntInfo->bDMInitialGainEnable = FALSE; + pDM_Odm->bDMInitialGainEnable = FALSE; + initial_gain =(u1Byte) (ODM_GetBBReg(pDM_Odm, 0xc50, bMaskDWord) & 0x7F); + + // make sure the initial gain is under the correct range. + //initial_gain_psd &= 0x7f; + ODM_Write_DIG(pDM_Odm, initial_gain_psd); + //1 Turn off 3-wire + ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0xF); - if((pDM_Odm->SupportICType == ODM_RTL8192C) &&(pDM_Odm->RFType == ODM_2T2R)) - return; + //pts value = 128, 256, 512, 1024 + pts = 128; - if(pDM_Odm->SupportPlatform & ODM_WIN) + if(pts == 128) { - if(*(pDM_Odm->pAntennaTest)) - return; + ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x0); + start_point = 64; + stop_point = 192; } - - if((pDM_SWAT_Table->ANTA_ON == FALSE) ||(pDM_SWAT_Table->ANTB_ON == FALSE)) + else if(pts == 256) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("odm_SwAntDivChkAntSwitch(): No AntDiv Mechanism, Antenna A or B is off\n")); - return; + ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x1); + start_point = 128; + stop_point = 384; } - - // Radio off: Status reset to default and return. - if(*(pDM_Odm->pbPowerSaving)==TRUE) //pHalData->eRFPowerState==eRfOff + else if(pts == 512) { - ODM_SwAntDivRestAfterLink(pDM_Odm); - return; + ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x2); + start_point = 256; + stop_point = 768; } - - - // Handling step mismatch condition. - // Peak step is not finished at last time. Recover the variable and check again. - if( Step != pDM_SWAT_Table->try_flag ) + else { - ODM_SwAntDivRestAfterLink(pDM_Odm); + ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x3); + start_point = 512; + stop_point = 1536; } + -#if (DM_ODM_SUPPORT_TYPE &( ODM_WIN| ODM_CE )) +//3 Skip WLAN channels if WLAN busy - if(pDM_SWAT_Table->try_flag == 0xff) + curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast) - lastTxOkCnt; + curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast) - lastRxOkCnt; + lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); + lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); + + PSD_skip_start=80; + PSD_skip_stop = 0; + wlan_channel = CurrentChannel & 0x0f; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD,DBG_LOUD,("PSD: current channel: %x, BW:%d \n", wlan_channel, Is40MHz)); + if(pDM_Odm->SupportICType==ODM_RTL8723A) { - pDM_SWAT_Table->RSSI_target = 0xff; - - #if(DM_ODM_SUPPORT_TYPE & ODM_CE) + if(pDM_Odm->bBtHsOperation) { - u1Byte index = 0; - PSTA_INFO_T pEntry = NULL; - - - for(index=0; indexpODM_StaInfo[index]; - if(IS_STA_VALID(pEntry) ) { - break; - } - } - if(pEntry == NULL) + if(pDM_Odm->bLinked) { - ODM_SwAntDivRestAfterLink(pDM_Odm); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): No Link.\n")); - return; + if(Is40MHz) + { + PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2; // Modify by Neil to add 10 chs to mask + PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4; + } + else + { + PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-10; // Modify by Neil to add 10 chs to mask + PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+18; + } } else { - pDM_SWAT_Table->RSSI_target = index; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): RSSI_target is PEER STA\n")); + // mask for 40MHz + PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2; // Modify by Neil to add 10 chs to mask + PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4; } - } - #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) + if(PSD_skip_start < 0) + PSD_skip_start = 0; + if(PSD_skip_stop >80) + PSD_skip_stop = 80; + } + else { - PADAPTER pAdapter = pDM_Odm->Adapter; - PMGNT_INFO pMgntInfo=&pAdapter->MgntInfo; - - // Select RSSI checking target - if(pMgntInfo->mAssoc && !ACTING_AS_AP(pAdapter)) - { - // Target: Infrastructure mode AP. - //pDM_SWAT_Table->RSSI_target = NULL; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("odm_SwAntDivChkAntSwitch(): RSSI_target is DEF AP!\n")); - } - else + if((curRxOkCnt+curTxOkCnt) > 5) { - u1Byte index = 0; - PSTA_INFO_T pEntry = NULL; - PADAPTER pTargetAdapter = NULL; - - if(pMgntInfo->mIbss ) + if(Is40MHz) { - // Target: AP/IBSS peer. - pTargetAdapter = pAdapter; - } - else - { - pTargetAdapter = GetFirstAPAdapter(pAdapter); - } - - if(pTargetAdapter != NULL) - { - for(index=0; indexbAssociated) - break; - } - - } - - } - - if(pEntry == NULL) - { - ODM_SwAntDivRestAfterLink(pDM_Odm); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): No Link.\n")); - return; + PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2; // Modify by Neil to add 10 chs to mask + PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4; } else { - //pDM_SWAT_Table->RSSI_target = pEntry; - pDM_SWAT_Table->RSSI_target = index; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): RSSI_target is PEER STA\n")); + PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-10; // Modify by Neil to add 10 chs to mask + PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+18; } - }//end if(pMgntInfo->mAssoc && !ACTING_AS_AP(Adapter)) - + + if(PSD_skip_start < 0) + PSD_skip_start = 0; + if(PSD_skip_stop >80) + PSD_skip_stop = 80; + } } - #endif - - pDM_SWAT_Table->RSSI_cnt_A = 0; - pDM_SWAT_Table->RSSI_cnt_B = 0; - pDM_SWAT_Table->try_flag = 0; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("odm_SwAntDivChkAntSwitch(): Set try_flag to 0 prepare for peak!\n")); - return; } +#if 0 else { - -// To Fix 8723A SW ANT DIV Bug issue -#if (DM_ODM_SUPPORT_TYPE==ODM_WIN) - if (pDM_Odm->SupportICType & ODM_RTL8723A) + if((curRxOkCnt+curTxOkCnt) > 1000) { - curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - pDM_SWAT_Table->lastTxOkCnt; - curRxOkCnt =Adapter->RxStats.NumRxBytesUnicast - pDM_SWAT_Table->lastRxOkCnt; - pDM_SWAT_Table->lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; - pDM_SWAT_Table->lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; + PSD_skip_start = (wlan_channel-1)*5 -Is40MHz*10; + PSD_skip_stop = PSD_skip_start + (1+Is40MHz)*20; } -#else - curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast) - pDM_SWAT_Table->lastTxOkCnt; - curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast) - pDM_SWAT_Table->lastRxOkCnt; - pDM_SWAT_Table->lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); - pDM_SWAT_Table->lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); -#endif - if(pDM_SWAT_Table->try_flag == 1) - { - if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) - { - pDM_SWAT_Table->TXByteCnt_A += curTxOkCnt; - pDM_SWAT_Table->RXByteCnt_A += curRxOkCnt; - } - else - { - pDM_SWAT_Table->TXByteCnt_B += curTxOkCnt; - pDM_SWAT_Table->RXByteCnt_B += curRxOkCnt; - } - - nextAntenna = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? AUX_ANT : MAIN_ANT; - pDM_SWAT_Table->RSSI_Trying--; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("RSSI_Trying = %d\n",pDM_SWAT_Table->RSSI_Trying)); - if(pDM_SWAT_Table->RSSI_Trying == 0) - { - CurByteCnt = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? (pDM_SWAT_Table->TXByteCnt_A+pDM_SWAT_Table->RXByteCnt_A) : (pDM_SWAT_Table->TXByteCnt_B+pDM_SWAT_Table->RXByteCnt_B); - PreByteCnt = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? (pDM_SWAT_Table->TXByteCnt_B+pDM_SWAT_Table->RXByteCnt_B) : (pDM_SWAT_Table->TXByteCnt_A+pDM_SWAT_Table->RXByteCnt_A); - - if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_HIGH) - //CurByteCnt = PlatformDivision64(CurByteCnt, 9); - PreByteCnt = PreByteCnt*9; - else if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_LOW) - //CurByteCnt = PlatformDivision64(CurByteCnt, 2); - PreByteCnt = PreByteCnt*2; - - if(pDM_SWAT_Table->RSSI_cnt_A > 0) - RSSI_A = pDM_SWAT_Table->RSSI_sum_A/pDM_SWAT_Table->RSSI_cnt_A; - else - RSSI_A = 0; - if(pDM_SWAT_Table->RSSI_cnt_B > 0) - RSSI_B = pDM_SWAT_Table->RSSI_sum_B/pDM_SWAT_Table->RSSI_cnt_B; - else - RSSI_B = 0; - curRSSI = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? RSSI_A : RSSI_B; - pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? RSSI_B : RSSI_A; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Luke:PreRSSI = %d, CurRSSI = %d\n",pDM_SWAT_Table->PreRSSI, curRSSI)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: preAntenna= %s, curAntenna= %s \n", - (pDM_SWAT_Table->PreAntenna == MAIN_ANT?"MAIN":"AUX"), (pDM_SWAT_Table->CurAntenna == MAIN_ANT?"MAIN":"AUX"))); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Luke:RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", - RSSI_A, pDM_SWAT_Table->RSSI_cnt_A, RSSI_B, pDM_SWAT_Table->RSSI_cnt_B)); - } + } +#endif //Reove RXHP Issue + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD,DBG_LOUD,("PSD: Skip tone from %d to %d \n", PSD_skip_start, PSD_skip_stop)); + for (n=0;n<80;n++) + { + if((n%20)==0) + { + channel = (n/20)*4 + 1; + + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, channel); + } + tone_idx = n%20; + if ((n>=PSD_skip_start) && (nRSSI_cnt_A > 0) - RSSI_A = pDM_SWAT_Table->RSSI_sum_A/pDM_SWAT_Table->RSSI_cnt_A; - else - RSSI_A = 0; - if(pDM_SWAT_Table->RSSI_cnt_B > 0) - RSSI_B = pDM_SWAT_Table->RSSI_sum_B/pDM_SWAT_Table->RSSI_cnt_B; - else - RSSI_B = 0; - curRSSI = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? RSSI_A : RSSI_B; - pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->PreAntenna == MAIN_ANT)? RSSI_A : RSSI_B; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ekul:PreRSSI = %d, CurRSSI = %d\n", pDM_SWAT_Table->PreRSSI, curRSSI)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: preAntenna= %s, curAntenna= %s \n", - (pDM_SWAT_Table->PreAntenna == MAIN_ANT?"MAIN":"AUX"), (pDM_SWAT_Table->CurAntenna == MAIN_ANT?"MAIN":"AUX"))); + PSD_report_tmp = GetPSDData(pDM_Odm, idx[tone_idx], initial_gain_psd); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ekul:RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", - RSSI_A, pDM_SWAT_Table->RSSI_cnt_A, RSSI_B, pDM_SWAT_Table->RSSI_cnt_B)); - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curTxOkCnt = %d\n", curTxOkCnt)); - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curRxOkCnt = %d\n", curRxOkCnt)); + if ( PSD_report_tmp > PSD_report[n]) + PSD_report[n] = PSD_report_tmp; + } + } - //1 Trying State - if((pDM_SWAT_Table->try_flag == 1)&&(pDM_SWAT_Table->RSSI_Trying == 0)) + PatchDCTone(pDM_Odm, PSD_report, initial_gain_psd); + + //----end + //1 Turn on RX + //Rx AGC on + ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 1); + ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 1); + //CCK on + ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 1); + //1 Turn on TX + //Resume TX Queue + + ODM_Write1Byte(pDM_Odm,REG_TXPAUSE, 0x00); + //Turn on 3-wire + ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0x0); + //1 Restore Current Settings + //Resume DIG + pDM_Odm->bDMInitialGainEnable = TRUE; + + ODM_Write_DIG(pDM_Odm, initial_gain); + + // restore originl center frequency + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, CurrentChannel); + + //Turn on CCA + ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, RXIQI); + //Restore RX idle low power + if(RxIdleLowPwr == TRUE) + ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 1); + + psd_cnt++; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD:psd_cnt = %d \n",psd_cnt)); + if (psd_cnt < ReScan) + ODM_SetTimer(pDM_Odm, &pDM_Odm->PSDTimer, Interval); + else + { + psd_cnt = 0; + for(i=0;i<80;i++) + //DbgPrint("psd_report[%d]= %d \n", 2402+i, PSD_report[i]); + RT_TRACE( COMP_PSD, DBG_LOUD,("psd_report[%d]= %d \n", 2402+i, PSD_report[i])); + + + GoodChannelDecision(pDM_Odm, PSD_report, PSD_bitmap,RSSI_BT, PSD_bitmap_memory); + + if(pDM_Odm->SupportICType==ODM_RTL8723A) { + cur_byte_idx=0; + cur_bit_idx=0; - if(pDM_SWAT_Table->TestMode == TP_MODE) + //2 Restore H2C PSD Data to Last Data + H2C_PSD_DATA_last[0] = H2C_PSD_DATA[0]; + H2C_PSD_DATA_last[1] = H2C_PSD_DATA[1]; + H2C_PSD_DATA_last[2] = H2C_PSD_DATA[2]; + H2C_PSD_DATA_last[3] = H2C_PSD_DATA[3]; + H2C_PSD_DATA_last[4] = H2C_PSD_DATA[4]; + + + //2 Translate 80bit channel map to 40bit channel + for ( i=0;i<5;i++) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: TestMode = TP_MODE")); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("TRY:CurByteCnt = %lld,", CurByteCnt)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("TRY:PreByteCnt = %lld\n",PreByteCnt)); - if(CurByteCnt < PreByteCnt) - { - if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) - pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; - else - pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; - } - else - { - if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) - pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; - else - pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; - } - for (i= 0; i<8; i++) + for(n=0;n<8;n++) { - if(((pDM_SWAT_Table->SelectAntennaMap>>i)&BIT0) == 1) - Score_A++; - else - Score_B++; + cur_byte_idx = i*2 + n/4; + cur_bit_idx = (n%4)*2; + if ( ((PSD_bitmap[cur_byte_idx]& BIT(cur_bit_idx)) != 0) && ((PSD_bitmap[cur_byte_idx]& BIT(cur_bit_idx+1)) != 0)) + H2C_PSD_DATA[i] = H2C_PSD_DATA[i] | (u1Byte) (1 << n); } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SelectAntennaMap=%x\n ",pDM_SWAT_Table->SelectAntennaMap)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Score_A=%d, Score_B=%d\n", Score_A, Score_B)); - - if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("H2C_PSD_DATA[%d]=0x%x\n" ,i, H2C_PSD_DATA[i])); + } + + //3 To Compare the difference + for ( i=0;i<5;i++) + { + if(H2C_PSD_DATA[i] !=H2C_PSD_DATA_last[i]) { - nextAntenna = (Score_A > Score_B)?MAIN_ANT:AUX_ANT; + FillH2CCmd(Adapter, H2C_92C_PSD_RESULT, 5, H2C_PSD_DATA); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_PSD, DBG_LOUD,("Need to Update the AFH Map \n")); + break; } else { - nextAntenna = (Score_B > Score_A)?AUX_ANT:MAIN_ANT; - } - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("nextAntenna=%s\n",(nextAntenna==Antenna_A)?"A":"B")); - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("preAntenna= %s, curAntenna= %s \n", - //(DM_SWAT_Table.PreAntenna == Antenna_A?"A":"B"), (DM_SWAT_Table.CurAntenna == Antenna_A?"A":"B"))); - - if(nextAntenna != pDM_SWAT_Table->CurAntenna) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: Switch back to another antenna")); - } - else - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: current anntena is good\n")); - } - } - - if(pDM_SWAT_Table->TestMode == RSSI_MODE) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: TestMode = RSSI_MODE")); - pDM_SWAT_Table->SelectAntennaMap=0xAA; - if(curRSSI < pDM_SWAT_Table->PreRSSI) //Current antenna is worse than previous antenna - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: Switch back to another antenna")); - nextAntenna = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? AUX_ANT : MAIN_ANT; - } - else // current anntena is good - { - nextAntenna =pDM_SWAT_Table->CurAntenna; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: current anntena is good\n")); + if(i==5) + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Not need to Update\n")); } } - pDM_SWAT_Table->try_flag = 0; - pDM_Odm->RSSI_test = FALSE; - pDM_SWAT_Table->RSSI_sum_A = 0; - pDM_SWAT_Table->RSSI_cnt_A = 0; - pDM_SWAT_Table->RSSI_sum_B = 0; - pDM_SWAT_Table->RSSI_cnt_B = 0; - pDM_SWAT_Table->TXByteCnt_A = 0; - pDM_SWAT_Table->TXByteCnt_B = 0; - pDM_SWAT_Table->RXByteCnt_A = 0; - pDM_SWAT_Table->RXByteCnt_B = 0; - - } - - //1 Normal State - else if(pDM_SWAT_Table->try_flag == 0) - { - if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_HIGH) + if(pDM_Odm->bBtHsOperation) { - if ((curTxOkCnt+curRxOkCnt) > 3750000)//if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000) - pDM_SWAT_Table->TrafficLoad = TRAFFIC_HIGH; - else - pDM_SWAT_Table->TrafficLoad = TRAFFIC_LOW; - } - else if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_LOW) - { - if ((curTxOkCnt+curRxOkCnt) > 3750000) //if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000) - pDM_SWAT_Table->TrafficLoad = TRAFFIC_HIGH; - else - pDM_SWAT_Table->TrafficLoad = TRAFFIC_LOW; + ODM_SetTimer(pDM_Odm, &pDM_Odm->PSDTimer, 10000); + ODM_RT_TRACE( pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Leave dm_PSD_Monitor\n")); } - if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_HIGH) - pDM_SWAT_Table->bTriggerAntennaSwitch = 0; - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Normal:TrafficLoad = %llu\n", curTxOkCnt+curRxOkCnt)); - - //Prepare To Try Antenna - nextAntenna = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? AUX_ANT : MAIN_ANT; - pDM_SWAT_Table->try_flag = 1; - pDM_Odm->RSSI_test = TRUE; - if((curRxOkCnt+curTxOkCnt) > 1000) + else { - pDM_SWAT_Table->RSSI_Trying = 4; - pDM_SWAT_Table->TestMode = TP_MODE; - } - else - { - pDM_SWAT_Table->RSSI_Trying = 2; - pDM_SWAT_Table->TestMode = RSSI_MODE; - - } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: Normal State -> Begin Trying!\n")); - - - pDM_SWAT_Table->RSSI_sum_A = 0; - pDM_SWAT_Table->RSSI_cnt_A = 0; - pDM_SWAT_Table->RSSI_sum_B = 0; - pDM_SWAT_Table->RSSI_cnt_B = 0; - } - } - - //1 4.Change TRX antenna - if(nextAntenna != pDM_SWAT_Table->CurAntenna) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: Change TX Antenna!\n ")); - //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, nextAntenna); - #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - ODM_SetAntenna(pDM_Odm,nextAntenna); - #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) - { - BOOLEAN bEnqueue; - bEnqueue = (pDM_Odm->SupportInterface == ODM_ITRF_PCIE)?FALSE :TRUE; - rtw_antenna_select_cmd(pDM_Odm->Adapter, nextAntenna, bEnqueue); + ODM_SetTimer(pDM_Odm, &pDM_Odm->PSDTimer, 1500); + ODM_RT_TRACE( pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Leave dm_PSD_Monitor\n")); } - #endif - } + } +} +/* +//Neil for Get BT RSSI +// Be Triggered by BT C2H CMD +VOID +ODM_PSDGetRSSI( + IN u1Byte RSSI_BT) +{ - //1 5.Reset Statistics - pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; - pDM_SWAT_Table->CurAntenna = nextAntenna; - pDM_SWAT_Table->PreRSSI = curRSSI; - - //1 6.Set next timer - { - //PADAPTER pAdapter = pDM_Odm->Adapter; - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - - if(pDM_SWAT_Table->RSSI_Trying == 0) - return; - if(pDM_SWAT_Table->RSSI_Trying%2 == 0) - { - if(pDM_SWAT_Table->TestMode == TP_MODE) - { - if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_HIGH) - { - ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 10 ); //ms - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dm_SW_AntennaSwitch(): Test another antenna for 10 ms\n")); - } - else if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_LOW) - { - ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 50 ); //ms - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dm_SW_AntennaSwitch(): Test another antenna for 50 ms\n")); - } - } - else - { - ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 500 ); //ms - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dm_SW_AntennaSwitch(): Test another antenna for 500 ms\n")); - } - } - else - { - if(pDM_SWAT_Table->TestMode == TP_MODE) - { - if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_HIGH) - ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 90 ); //ms - else if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_LOW) - ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 100 ); //ms - } - else - ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 500 ); //ms - } - } -#endif // #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) -#endif // #if (RTL8192C_SUPPORT==1) } +*/ -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - -u1Byte -odm_SwAntDivSelectScanChnl( - IN PADAPTER Adapter +VOID +ODM_PSDMonitor( + IN PDM_ODM_T pDM_Odm ) { -#if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) - PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - u1Byte i, j, ScanChannel = 0, ChannelNum = 0; - PRT_CHANNEL_LIST pChannelList = GET_RT_CHANNEL_LIST(pMgntInfo); - u1Byte EachChannelSTAs[MAX_SCAN_CHANNEL_NUM] = {0}; - - if(pMgntInfo->tmpNumBssDesc == 0) - return 0; - - for(i = 0; i < pMgntInfo->tmpNumBssDesc; i++) - { - ChannelNum = pMgntInfo->tmpbssDesc[i].ChannelNumber; - for(j = 0; j < pChannelList->ChannelLen; j++) + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + //if(IS_HARDWARE_TYPE_8723AE(Adapter)) + + if(pDM_Odm->SupportICType == ODM_RTL8723A) //may need to add other IC type + { + if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE) { - if(pChannelList->ChnlListEntry[j].ChannelNum == ChannelNum) + if(!pDM_Odm->bBtEnabled) //need to check upper layer connection { - EachChannelSTAs[j]++; - break; + pDM_Odm->bPSDactive=FALSE; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD, ("odm_PSDMonitor, return for BT is disabled!!!\n")); + return; } - } - } - - for(i = 0; i < MAX_SCAN_CHANNEL_NUM; i++) - { - if(EachChannelSTAs[i] > EachChannelSTAs[ScanChannel]) - ScanChannel = i; - } - if(EachChannelSTAs[ScanChannel] == 0) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("odm_SwAntDivSelectScanChnl(): Scan List is empty.\n")); - return 0; - } - - ScanChannel = pChannelList->ChnlListEntry[ScanChannel].ChannelNum; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD, ("odm_PSDMonitor\n")); + //{ + pDM_Odm->bPSDinProcess = TRUE; + pDM_Odm->bPSDactive=TRUE; + odm_PSD_Monitor(pDM_Odm); + pDM_Odm->bPSDinProcess = FALSE; + } + } - +} +VOID +odm_PSDMonitorCallback( + PRT_TIMER pTimer +) +{ + PADAPTER Adapter = (PADAPTER)pTimer->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, - ("odm_SwAntDivSelectScanChnl(): Channel %d is select as scan channel.\n", ScanChannel)); + PlatformScheduleWorkItem(&pHalData->PSDMonitorWorkitem); +} - return ScanChannel; -#else - return 0; -#endif +VOID +odm_PSDMonitorWorkItemCallback( + IN PVOID pContext + ) +{ + PADAPTER Adapter = (PADAPTER)pContext; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + + ODM_PSDMonitor(pDM_Odm); } +//Remove by Yuchen (seperate to odm_DIG.c) + + //cosa debug tool need to modify VOID -odm_SwAntDivConstructScanChnl( +ODM_PSDDbgControl( IN PADAPTER Adapter, - IN u1Byte ScanChnl + IN u4Byte mode, + IN u4Byte btRssi ) { +#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - - if(ScanChnl == 0) + ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD, (" Monitor mode=%d, btRssi=%d\n", mode, btRssi)); + if(mode) { - u1Byte i; - PRT_CHANNEL_LIST pChannelList = GET_RT_CHANNEL_LIST(pMgntInfo); - - // 20100519 Joseph: Original antenna scanned nothing. - // Test antenna shall scan all channel with half period in this condition. - RtActChannelList(Adapter, RT_CHNL_LIST_ACTION_CONSTRUCT_SCAN_LIST, NULL, NULL); - for(i = 0; i < pChannelList->ChannelLen; i++) - pChannelList->ChnlListEntry[i].ScanPeriod /= 2; + pDM_Odm->RSSI_BT = (u1Byte)btRssi; + pDM_Odm->bUserAssignLevel = TRUE; + ODM_SetTimer( pDM_Odm, &pDM_Odm->PSDTimer, 0); //ms } else { - // The using of this CustomizedScanRequest is a trick to rescan the two channels - // under the NORMAL scanning process. It will not affect MGNT_INFO.CustomizedScanRequest. - CUSTOMIZED_SCAN_REQUEST CustomScanReq; + ODM_CancelTimer(pDM_Odm, &pDM_Odm->PSDTimer); + } +#endif +} - CustomScanReq.bEnabled = TRUE; - CustomScanReq.Channels[0] = ScanChnl; - CustomScanReq.Channels[1] = pMgntInfo->dot11CurrentChannelNumber; - CustomScanReq.nChannels = 2; - CustomScanReq.ScanType = SCAN_ACTIVE; - CustomScanReq.Duration = DEFAULT_PASSIVE_SCAN_PERIOD; - RtActChannelList(Adapter, RT_CHNL_LIST_ACTION_CONSTRUCT_SCAN_LIST, &CustomScanReq, NULL); - } +//#if(DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE) -} -#endif //#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +void odm_RXHPInit( + IN PDM_ODM_T pDM_Odm) +{ +#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE) + pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; + u1Byte index; -// -// 20100514 Luke/Joseph: -// Callback function for 500ms antenna test trying. -// -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -VOID -odm_SwAntDivChkAntSwitchCallback( - PRT_TIMER pTimer -) -{ - PADAPTER Adapter = (PADAPTER)pTimer->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - pSWAT_T pDM_SWAT_Table = &pHalData->DM_OutSrc.DM_SWAT_Table; - - #if DEV_BUS_TYPE==RT_PCI_INTERFACE - #if USE_WORKITEM - ODM_ScheduleWorkItem(&pDM_SWAT_Table->SwAntennaSwitchWorkitem); - #else - odm_SwAntDivChkAntSwitch(&pHalData->DM_OutSrc, SWAW_STEP_DETERMINE); - #endif - #else - ODM_ScheduleWorkItem(&pDM_SWAT_Table->SwAntennaSwitchWorkitem); - #endif - -} -VOID -odm_SwAntDivChkAntSwitchWorkitemCallback( - IN PVOID pContext - ) -{ - - PADAPTER pAdapter = (PADAPTER)pContext; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - - odm_SwAntDivChkAntSwitch(&pHalData->DM_OutSrc, SWAW_STEP_DETERMINE); + pRX_HP_Table->RXHP_enable = TRUE; + pRX_HP_Table->RXHP_flag = 0; + pRX_HP_Table->PSD_func_trigger = 0; + pRX_HP_Table->Pre_IGI = 0x20; + pRX_HP_Table->Cur_IGI = 0x20; + pRX_HP_Table->Cur_pw_th = pw_th_10dB; + pRX_HP_Table->Pre_pw_th = pw_th_10dB; + for(index=0; index<80; index++) + pRX_HP_Table->PSD_bitmap_RXHP[index] = 1; -} -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -VOID odm_SwAntDivChkAntSwitchCallback(void *FunctionContext) -{ - PDM_ODM_T pDM_Odm= (PDM_ODM_T)FunctionContext; - PADAPTER padapter = pDM_Odm->Adapter; - if(padapter->net_closed == _TRUE) - return; - odm_SwAntDivChkAntSwitch(pDM_Odm, SWAW_STEP_DETERMINE); -} -#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -VOID odm_SwAntDivChkAntSwitchCallback(void *FunctionContext) -{ - PDM_ODM_T pDM_Odm= (PDM_ODM_T)FunctionContext; - odm_SwAntDivChkAntSwitch(pDM_Odm, SWAW_STEP_DETERMINE); -} +#if(DEV_BUS_TYPE == RT_USB_INTERFACE) + pRX_HP_Table->TP_Mode = Idle_Mode; #endif - -#else //#if(defined(CONFIG_SW_ANTENNA_DIVERSITY)) - -VOID odm_SwAntDivInit( IN PDM_ODM_T pDM_Odm ) {} -VOID ODM_SwAntDivChkPerPktRssi( - IN PDM_ODM_T pDM_Odm, - IN u1Byte StationID, - IN PODM_PHY_INFO_T pPhyInfo - ) {} -VOID odm_SwAntDivChkAntSwitch( - IN PDM_ODM_T pDM_Odm, - IN u1Byte Step - ) {} -VOID ODM_SwAntDivResetBeforeLink( IN PDM_ODM_T pDM_Odm ){} -VOID ODM_SwAntDivRestAfterLink( IN PDM_ODM_T pDM_Odm ){} -VOID odm_SwAntDetectInit( IN PDM_ODM_T pDM_Odm){} -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -VOID odm_SwAntDivChkAntSwitchCallback( PRT_TIMER pTimer){} -VOID odm_SwAntDivChkAntSwitchWorkitemCallback( IN PVOID pContext ){} -#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) -VOID odm_SwAntDivChkAntSwitchCallback(void *FunctionContext){} -#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -VOID odm_SwAntDivChkAntSwitchCallback(void *FunctionContext){} #endif +} -#endif //#if(defined(CONFIG_SW_ANTENNA_DIVERSITY)) - - - -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -BOOLEAN -ODM_SwAntDivCheckBeforeLink( - IN PDM_ODM_T pDM_Odm - ) +void odm_RXHP( + IN PDM_ODM_T pDM_Odm) { +#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN)) +#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) | (DEV_BUS_TYPE == RT_USB_INTERFACE) + PADAPTER Adapter = pDM_Odm->Adapter; + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; + pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; + PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); + + u1Byte i, j, sum; + u1Byte Is40MHz; + s1Byte Intf_diff_idx, MIN_Intf_diff_idx = 16; + s4Byte cur_channel; + u1Byte ch_map_intf_5M[17] = {0}; + static u4Byte FA_TH = 0; + static u1Byte psd_intf_flag = 0; + static s4Byte curRssi = 0; + static s4Byte preRssi = 0; + static u1Byte PSDTriggerCnt = 1; + + u1Byte RX_HP_enable = (u1Byte)(ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore2, bMaskDWord)>>31); // for debug!! -#if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) +#if(DEV_BUS_TYPE == RT_USB_INTERFACE) + static s8Byte lastTxOkCnt = 0, lastRxOkCnt = 0; + s8Byte curTxOkCnt, curRxOkCnt; + s8Byte curTPOkCnt; + s8Byte TP_Acc3, TP_Acc5; + static s8Byte TP_Buff[5] = {0}; + static u1Byte pre_state = 0, pre_state_flag = 0; + static u1Byte Intf_HighTP_flag = 0, De_counter = 16; + static u1Byte TP_Degrade_flag = 0; +#endif + static u1Byte LatchCnt = 0; + + if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8188E)) + return; + //AGC RX High Power Mode is only applied on 2G band in 92D!!! + if(pDM_Odm->SupportICType == ODM_RTL8192D) + { + if(*(pDM_Odm->pBandType) != ODM_BAND_2_4G) + return; + } - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE* pHalData = GET_HAL_DATA(Adapter); - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; - s1Byte Score = 0; - PRT_WLAN_BSS pTmpBssDesc, pTestBssDesc; - s4Byte power_diff = 0, power_target = 10; - u1Byte index, counter = 0; - static u1Byte ScanChannel; - u8Byte tStamp_diff = 0; + if(!(pDM_Odm->SupportAbility==ODM_BB_RXHP)) + return; - if (pDM_Odm->Adapter == NULL) //For BSOD when plug/unplug fast. //By YJ,120413 - { // The ODM structure is not initialized. - return FALSE; + //RX HP ON/OFF + if(RX_HP_enable == 1) + pRX_HP_Table->RXHP_enable = FALSE; + else + pRX_HP_Table->RXHP_enable = TRUE; + + if(pRX_HP_Table->RXHP_enable == FALSE) + { + if(pRX_HP_Table->RXHP_flag == 1) + { + pRX_HP_Table->RXHP_flag = 0; + psd_intf_flag = 0; + } + return; } - // Retrieve antenna detection registry info, added by Roger, 2012.11.27. - if(!IS_ANT_DETECT_SUPPORT_RSSI(Adapter)) - return FALSE; +#if(DEV_BUS_TYPE == RT_USB_INTERFACE) + //2 Record current TP for USB interface + curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast)-lastTxOkCnt; + curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast)-lastRxOkCnt; + lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); + lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); - // Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF. - PlatformAcquireSpinLock(Adapter, RT_RF_STATE_SPINLOCK); - if(pHalData->eRFPowerState!=eRfOn || pMgntInfo->RFChangeInProgress || pMgntInfo->bMediaConnect) - { - PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_SwAntDivCheckBeforeLink(): RFChangeInProgress(%x), eRFPowerState(%x)\n", - pMgntInfo->RFChangeInProgress, pHalData->eRFPowerState)); + curTPOkCnt = curTxOkCnt+curRxOkCnt; + TP_Buff[0] = curTPOkCnt; // current TP + TP_Acc3 = PlatformDivision64((TP_Buff[1]+TP_Buff[2]+TP_Buff[3]), 3); + TP_Acc5 = PlatformDivision64((TP_Buff[0]+TP_Buff[1]+TP_Buff[2]+TP_Buff[3]+TP_Buff[4]), 5); - pDM_SWAT_Table->SWAS_NoLink_State = 0; - - return FALSE; - } + if(TP_Acc5 < 1000) + pRX_HP_Table->TP_Mode = Idle_Mode; + else if((1000 < TP_Acc5)&&(TP_Acc5 < 3750000)) + pRX_HP_Table->TP_Mode = Low_TP_Mode; else + pRX_HP_Table->TP_Mode = High_TP_Mode; + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP TP Mode = %d\n", pRX_HP_Table->TP_Mode)); + // Since TP result would be sampled every 2 sec, it needs to delay 4sec to wait PSD processing. + // When LatchCnt = 0, we would Get PSD result. + if(TP_Degrade_flag == 1) { - PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); + LatchCnt--; + if(LatchCnt == 0) + { + TP_Degrade_flag = 0; + } } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("pDM_SWAT_Table->SWAS_NoLink_State = %d\n", pDM_SWAT_Table->SWAS_NoLink_State)); - //1 Run AntDiv mechanism "Before Link" part. - if(pDM_SWAT_Table->SWAS_NoLink_State == 0) + // When PSD function triggered by TP degrade 20%, and Interference Flag = 1 + // Set a De_counter to wait IGI = upper bound. If time is UP, the Interference flag will be pull down. + if(Intf_HighTP_flag == 1) { - //1 Prepare to do Scan again to check current antenna state. - - // Set check state to next step. - pDM_SWAT_Table->SWAS_NoLink_State = 1; - - // Copy Current Scan list. - pMgntInfo->tmpNumBssDesc = pMgntInfo->NumBssDesc; - PlatformMoveMemory((PVOID)Adapter->MgntInfo.tmpbssDesc, (PVOID)pMgntInfo->bssDesc, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC); - - // Go back to scan function again. - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Scan one more time\n")); - pMgntInfo->ScanStep=0; - pMgntInfo->bScanAntDetect = TRUE; - ScanChannel = odm_SwAntDivSelectScanChnl(Adapter); - - - if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8821)) + De_counter--; + if(De_counter == 0) { - if(pDM_FatTable->RxIdleAnt == MAIN_ANT) - ODM_UpdateRxIdleAnt(pDM_Odm, AUX_ANT); - else - ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); - if(ScanChannel == 0) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_SwAntDivCheckBeforeLink(): No AP List Avaiable, Using Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"AUX_ANT":"MAIN_ANT")); + Intf_HighTP_flag = 0; + psd_intf_flag = 0; + } + } +#endif - if(IS_5G_WIRELESS_MODE(pMgntInfo->dot11CurrentWirelessMode)) - { - pDM_SWAT_Table->Ant5G = pDM_FatTable->RxIdleAnt; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant5G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); - } - else - { - pDM_SWAT_Table->Ant2G = pDM_FatTable->RxIdleAnt; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant2G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); - } - return FALSE; - } - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_SwAntDivCheckBeforeLink: Change to %s for testing.\n", ((pDM_FatTable->RxIdleAnt == MAIN_ANT)?"MAIN_ANT":"AUX_ANT"))); - } - else if(pDM_Odm->SupportICType & (ODM_RTL8192C|ODM_RTL8723B)) - { - // Switch Antenna to another one. - pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; - pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==MAIN_ANT)?AUX_ANT:MAIN_ANT; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_SwAntDivCheckBeforeLink: Change to Ant(%s) for testing.\n", (pDM_SWAT_Table->CurAntenna==MAIN_ANT)?"MAIN":"AUX")); - //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna); - if(pDM_Odm->SupportICType == ODM_RTL8192C) - { - pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); - ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); - } - else if(pDM_Odm->SupportICType == ODM_RTL8723B) - { - pDM_SWAT_Table->SWAS_NoLink_BK_Reg92c = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg92c & 0xfffffffc) | (pDM_SWAT_Table->CurAntenna)); - ODM_SetBBReg(pDM_Odm, rfe_ctrl_anta_src, 0xff, 0x77); - ODM_SetBBReg(pDM_Odm, rDPDT_control, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg92c); - } - } - - odm_SwAntDivConstructScanChnl(Adapter, ScanChannel); - PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5); - - return TRUE; - } - else - { - //1 ScanComple() is called after antenna swiched. - //1 Check scan result and determine which antenna is going - //1 to be used. - - for(index = 0; index < pMgntInfo->tmpNumBssDesc; index++) + //2 AGC RX High Power Mode by PSD only applied to STA Mode + //3 NOT applied 1. Ad Hoc Mode. + //3 NOT applied 2. AP Mode + if ((pMgntInfo->mAssoc) && (!pMgntInfo->mIbss) && (!ACTING_AS_AP(Adapter))) + { + Is40MHz = *(pDM_Odm->pBandWidth); + curRssi = pDM_Odm->RSSI_Min; + cur_channel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x0fff) & 0x0f; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP RX HP flag = %d\n", pRX_HP_Table->RXHP_flag)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP FA = %d\n", FalseAlmCnt->Cnt_all)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP cur RSSI = %d, pre RSSI=%d\n", curRssi, preRssi)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP current CH = %d\n", cur_channel)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP Is 40MHz = %d\n", Is40MHz)); + //2 PSD function would be triggered + //3 1. Every 4 sec for PCIE + //3 2. Before TP Mode (Idle TP<4kbps) for USB + //3 3. After TP Mode (High TP) for USB + if((curRssi > 68) && (pRX_HP_Table->RXHP_flag == 0)) // Only RSSI>TH and RX_HP_flag=0 will Do PSD process { - pTmpBssDesc = &(pMgntInfo->tmpbssDesc[index]); // Antenna 1 - pTestBssDesc = &(pMgntInfo->bssDesc[index]); // Antenna 2 - - if(PlatformCompareMemory(pTestBssDesc->bdBssIdBuf, pTmpBssDesc->bdBssIdBuf, 6)!=0) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): ERROR!! This shall not happen.\n")); - continue; - } - - if(pDM_Odm->SupportICType != ODM_RTL8723B) +#if (DEV_BUS_TYPE == RT_USB_INTERFACE) + //2 Before TP Mode ==> PSD would be trigger every 4 sec + if(pRX_HP_Table->TP_Mode == Idle_Mode) //2.1 less wlan traffic <4kbps { - if(pTmpBssDesc->ChannelNumber == ScanChannel) +#endif + if(PSDTriggerCnt == 1) + { + odm_PSD_RXHP(pDM_Odm); + pRX_HP_Table->PSD_func_trigger = 1; + PSDTriggerCnt = 0; + } + else { - if(pTmpBssDesc->RecvSignalPower > pTestBssDesc->RecvSignalPower) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Compare scan entry: Score++\n")); - RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", pTmpBssDesc->bdSsIdBuf, pTmpBssDesc->bdSsIdLen); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n\n", pTmpBssDesc->ChannelNumber, pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); - - Score++; - PlatformMoveMemory(pTestBssDesc, pTmpBssDesc, sizeof(RT_WLAN_BSS)); - } - else if(pTmpBssDesc->RecvSignalPower < pTestBssDesc->RecvSignalPower) + PSDTriggerCnt++; + } +#if(DEV_BUS_TYPE == RT_USB_INTERFACE) + } + //2 After TP Mode ==> Check if TP degrade larger than 20% would trigger PSD function + if(pRX_HP_Table->TP_Mode == High_TP_Mode) { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Compare scan entry: Score--\n")); - RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", pTmpBssDesc->bdSsIdBuf, pTmpBssDesc->bdSsIdLen); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n\n", pTmpBssDesc->ChannelNumber, pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); - Score--; - } - else + if((pre_state_flag == 0)&&(LatchCnt == 0)) + { + // TP var < 5% + if((((curTPOkCnt-TP_Acc3)*20)<(TP_Acc3))&&(((curTPOkCnt-TP_Acc3)*20)>(-TP_Acc3))) { - if(pTestBssDesc->bdTstamp - pTmpBssDesc->bdTstamp < 5000) + pre_state++; + if(pre_state == 3) // hit pre_state condition => consecutive 3 times { - RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", pTmpBssDesc->bdSsIdBuf, pTmpBssDesc->bdSsIdLen); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n", pTmpBssDesc->ChannelNumber, pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("The 2nd Antenna didn't get this AP\n\n")); + pre_state_flag = 1; + pre_state = 0; } + + } + else + { + pre_state = 0; } } - } - else - { - if(pTmpBssDesc->ChannelNumber == ScanChannel) + //3 If pre_state_flag=1 ==> start to monitor TP degrade 20% + if(pre_state_flag == 1) { - if(pTmpBssDesc->RecvSignalPower > pTestBssDesc->RecvSignalPower) + if(((TP_Acc3-curTPOkCnt)*5)>(TP_Acc3)) // degrade 20% { - counter++; - power_diff = power_diff + (pTmpBssDesc->RecvSignalPower - pTestBssDesc->RecvSignalPower); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); - ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), pTmpBssDesc->bdSsIdBuf); - ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), pTmpBssDesc->bdBssIdBuf); - PlatformMoveMemory(pTestBssDesc, pTmpBssDesc, sizeof(RT_WLAN_BSS)); + odm_PSD_RXHP(pDM_Odm); + pRX_HP_Table->PSD_func_trigger = 1; + TP_Degrade_flag = 1; + LatchCnt = 2; + pre_state_flag = 0; } - else if(pTestBssDesc->RecvSignalPower > pTmpBssDesc->RecvSignalPower) + else if(((TP_Buff[2]-curTPOkCnt)*5)>TP_Buff[2]) { - counter++; - power_diff = power_diff + (pTestBssDesc->RecvSignalPower - pTmpBssDesc->RecvSignalPower); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); - ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), pTmpBssDesc->bdSsIdBuf); - ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), pTmpBssDesc->bdBssIdBuf) + odm_PSD_RXHP(pDM_Odm); + pRX_HP_Table->PSD_func_trigger = 1; + TP_Degrade_flag = 1; + LatchCnt = 2; + pre_state_flag = 0; } - else if(pTestBssDesc->bdTstamp > pTmpBssDesc->bdTstamp) + else if(((TP_Buff[3]-curTPOkCnt)*5)>TP_Buff[3]) { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("time_diff: %lld\n", (pTestBssDesc->bdTstamp-pTmpBssDesc->bdTstamp)/1000)); - if(pTestBssDesc->bdTstamp - pTmpBssDesc->bdTstamp > 5000) - { - counter++; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); - ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), pTmpBssDesc->bdSsIdBuf); - ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), pTmpBssDesc->bdBssIdBuf) - } + odm_PSD_RXHP(pDM_Odm); + pRX_HP_Table->PSD_func_trigger = 1; + TP_Degrade_flag = 1; + LatchCnt = 2; + pre_state_flag = 0; } } } - } - - if(pDM_Odm->SupportICType == ODM_RTL8723B) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("counter: %d power_diff: %d\n", counter, power_diff)); - - if(counter != 0) - power_diff = power_diff / counter; - - if(power_diff <= power_target && counter != 0) - Score++; - } +#endif +} - if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8821)) +#if (DEV_BUS_TYPE == RT_USB_INTERFACE) + for (i=0;i<4;i++) { - if(pMgntInfo->NumBssDesc!=0 && Score<0) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_SwAntDivCheckBeforeLink(): Using Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); - } - else - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_SwAntDivCheckBeforeLink(): Remain Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"AUX_ANT":"MAIN_ANT")); - - if(pDM_FatTable->RxIdleAnt == MAIN_ANT) - ODM_UpdateRxIdleAnt(pDM_Odm, AUX_ANT); - else - ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT); - } - - if(IS_5G_WIRELESS_MODE(pMgntInfo->dot11CurrentWirelessMode)) - { - pDM_SWAT_Table->Ant5G = pDM_FatTable->RxIdleAnt; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant5G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); - } - else - { - pDM_SWAT_Table->Ant2G = pDM_FatTable->RxIdleAnt; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant2G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT")); - } + TP_Buff[4-i] = TP_Buff[3-i]; } - else if(pDM_Odm->SupportICType == ODM_RTL8723B) - { - pDM_SWAT_Table->CurAntenna = pDM_SWAT_Table->PreAntenna; - pDM_SWAT_Table->SWAS_NoLink_BK_Reg92c = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg92c & 0xfffffffc) | (pDM_SWAT_Table->CurAntenna)); - ODM_SetBBReg(pDM_Odm, rfe_ctrl_anta_src, 0xff, 0x77); - ODM_SetBBReg(pDM_Odm, rDPDT_control,bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg92c); - - if(counter != 0) +#endif + //2 Update PSD bitmap according to PSD report + if((pRX_HP_Table->PSD_func_trigger == 1)&&(LatchCnt == 0)) + { + //2 Separate 80M bandwidth into 16 group with smaller 5M BW. + for (i = 0 ; i < 16 ; i++) + { + sum = 0; + for(j = 0; j < 5 ; j++) + sum += pRX_HP_Table->PSD_bitmap_RXHP[5*i + j]; + + if(sum < 5) + { + ch_map_intf_5M[i] = 1; // interference flag + } + } + //=============just for debug========================= + //for(i=0;i<16;i++) + //DbgPrint("RX HP: ch_map_intf_5M[%d] = %d\n", i, ch_map_intf_5M[i]); + //=============================================== + //2 Mask target channel 5M index + for(i = 0; i < (4+4*Is40MHz) ; i++) + { + ch_map_intf_5M[cur_channel - (1+2*Is40MHz) + i] = 0; + } + + psd_intf_flag = 0; + for(i = 0; i < 16; i++) + { + if(ch_map_intf_5M[i] == 1) + { + psd_intf_flag = 1; // interference is detected!!! + break; + } + } + +#if (DEV_BUS_TYPE == RT_USB_INTERFACE) + if(pRX_HP_Table->TP_Mode!=Idle_Mode) { - if(pMgntInfo->NumBssDesc != 0 && Score > 0) + if(psd_intf_flag == 1) // to avoid psd_intf_flag always 1 { - if(pDM_Odm->DM_SWAT_Table.ANTB_ON == FALSE) - { - pDM_Odm->DM_SWAT_Table.ANTA_ON = TRUE; - pDM_Odm->DM_SWAT_Table.ANTB_ON = TRUE; - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SwAntDivCheckBeforeLink(): Dual antenna\n")); - } - else - { - if(pDM_Odm->DM_SWAT_Table.ANTB_ON == TRUE) - { - pDM_Odm->DM_SWAT_Table.ANTA_ON = TRUE; - pDM_Odm->DM_SWAT_Table.ANTB_ON = FALSE; - BT_SetBtCoexAntNum(Adapter, BT_COEX_ANT_TYPE_DETECTED, 1); - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): Single antenna\n")); + Intf_HighTP_flag = 1; + De_counter = 32; // 0x1E -> 0x3E needs 32 times by each IGI step =1 } } - else - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SwAntDivCheckBeforeLink(): Igone result\n")); +#endif + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP psd_intf_flag = %d\n", psd_intf_flag)); + //2 Distance between target channel and interference + for(i = 0; i < 16; i++) + { + if(ch_map_intf_5M[i] == 1) + { + Intf_diff_idx = ((cur_channel+Is40MHz-(i+1))>0) ? (s1Byte)(cur_channel-2*Is40MHz-(i-2)) : (s1Byte)((i+1)-(cur_channel+2*Is40MHz)); + if(Intf_diff_idx < MIN_Intf_diff_idx) + MIN_Intf_diff_idx = Intf_diff_idx; // the min difference index between interference and target + } + } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP MIN_Intf_diff_idx = %d\n", MIN_Intf_diff_idx)); + //2 Choose False Alarm Threshold + switch (MIN_Intf_diff_idx){ + case 0: + case 1: + case 2: + case 3: + FA_TH = FA_RXHP_TH1; + break; + case 4: // CH5 + case 5: // CH6 + FA_TH = FA_RXHP_TH2; + break; + case 6: // CH7 + case 7: // CH8 + FA_TH = FA_RXHP_TH3; + break; + case 8: // CH9 + case 9: //CH10 + FA_TH = FA_RXHP_TH4; + break; + case 10: + case 11: + case 12: + case 13: + case 14: + case 15: + FA_TH = FA_RXHP_TH5; + break; + } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP FA_TH = %d\n", FA_TH)); + pRX_HP_Table->PSD_func_trigger = 0; } - else if(pDM_Odm->SupportICType == ODM_RTL8192C) - { - if(pMgntInfo->NumBssDesc!=0 && Score<=0) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_SwAntDivCheckBeforeLink(): Using Ant(%s)\n", (pDM_SWAT_Table->CurAntenna==MAIN_ANT)?"MAIN":"AUX")); - - pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; + //1 Monitor RSSI variation to choose the suitable IGI or Exit AGC RX High Power Mode + if(pRX_HP_Table->RXHP_flag == 1) + { + if ((curRssi > 80)&&(preRssi < 80)) + { + pRX_HP_Table->Cur_IGI = LNA_Low_Gain_1; + } + else if ((curRssi < 80)&&(preRssi > 80)) + { + pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2; } - else + else if ((curRssi > 72)&&(preRssi < 72)) + { + pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2; + } + else if ((curRssi < 72)&&( preRssi > 72)) + { + pRX_HP_Table->Cur_IGI = LNA_Low_Gain_3; + } + else if (curRssi < 68) //RSSI is NOT large enough!!==> Exit AGC RX High Power Mode + { + pRX_HP_Table->Cur_pw_th = pw_th_10dB; + pRX_HP_Table->RXHP_flag = 0; // Back to Normal DIG Mode + psd_intf_flag = 0; + } + } + else // pRX_HP_Table->RXHP_flag == 0 + { + //1 Decide whether to enter AGC RX High Power Mode + if ((curRssi > 70) && (psd_intf_flag == 1) && (FalseAlmCnt->Cnt_all > FA_TH) && + (pDM_DigTable->CurIGValue == pDM_DigTable->rx_gain_range_max)) { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, - ("ODM_SwAntDivCheckBeforeLink(): Remain Ant(%s)\n", (pDM_SWAT_Table->CurAntenna==MAIN_ANT)?"AUX":"MAIN")); - - pDM_SWAT_Table->CurAntenna = pDM_SWAT_Table->PreAntenna; - - //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna); - pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); - PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); + if (curRssi > 80) + { + pRX_HP_Table->Cur_IGI = LNA_Low_Gain_1; + } + else if (curRssi > 72) + { + pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2; + } + else + { + pRX_HP_Table->Cur_IGI = LNA_Low_Gain_3; + } + pRX_HP_Table->Cur_pw_th = pw_th_16dB; //RegC54[9:8]=2'b11: to enter AGC Flow 3 + pRX_HP_Table->First_time_enter = TRUE; + pRX_HP_Table->RXHP_flag = 1; // RXHP_flag=1: AGC RX High Power Mode, RXHP_flag=0: Normal DIG Mode } } - - // Check state reset to default and wait for next time. - pDM_SWAT_Table->SWAS_NoLink_State = 0; - pMgntInfo->bScanAntDetect = FALSE; - - return FALSE; + preRssi = curRssi; + odm_Write_RXHP(pDM_Odm); } - -#else - return FALSE; -#endif - -return FALSE; +#endif //#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN)) +#endif //#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) | (DEV_BUS_TYPE == RT_USB_INTERFACE) } -#endif //#if(DM_ODM_SUPPORT_TYPE==ODM_WIN) - - -//3============================================================ -//3 SW Antenna Diversity -//3============================================================ - -#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) -VOID -odm_InitHybridAntDiv_88C_92D( - IN PDM_ODM_T pDM_Odm - ) +void odm_Write_RXHP( + IN PDM_ODM_T pDM_Odm) { + pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; + u4Byte currentIGI; -#if((DM_ODM_SUPPORT_TYPE==ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL)) - struct rtl8192cd_priv *priv=pDM_Odm->priv; -#endif - SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - u1Byte bTxPathSel=0; //0:Path-A 1:Path-B - u1Byte i; - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_InitHybridAntDiv==============>\n")); - - //whether to do antenna diversity or not -#if(DM_ODM_SUPPORT_TYPE==ODM_AP) - if(priv==NULL) return; - if(!priv->pshare->rf_ft_var.antHw_enable) - return; - - #ifdef SW_ANT_SWITCH - priv->pshare->rf_ft_var.antSw_enable =0; - #endif -#endif - - if((pDM_Odm->SupportICType != ODM_RTL8192C) && (pDM_Odm->SupportICType != ODM_RTL8192D)) - return; - - - bTxPathSel=(pDM_Odm->RFType==ODM_1T1R)?FALSE:TRUE; - - ODM_SetBBReg(pDM_Odm,ODM_REG_BB_PWR_SAV1_11N, BIT23, 0); //No update ANTSEL during GNT_BT=1 - ODM_SetBBReg(pDM_Odm,ODM_REG_TX_ANT_CTRL_11N, BIT21, 1); //TX atenna selection from tx_info - ODM_SetBBReg(pDM_Odm,ODM_REG_ANTSEL_PIN_11N, BIT23, 1); //enable LED[1:0] pin as ANTSEL - ODM_SetBBReg(pDM_Odm,ODM_REG_ANTSEL_CTRL_11N, BIT8|BIT9, 0x01); // 0x01: left antenna, 0x02: right antenna - // check HW setting: ANTSEL pin connection - #if(DM_ODM_SUPPORT_TYPE==ODM_AP) - ODM_Write2Byte(pDM_Odm,ODM_REG_RF_PIN_11N, (ODM_Read2Byte(pDM_Odm,0x804)&0xf0ff )| BIT(8) ); // b11-b8=0001,update RFPin setting - #endif - - // only AP support different path selection temperarly - if(!bTxPathSel){ //PATH-A - ODM_SetBBReg(pDM_Odm,ODM_REG_PIN_CTRL_11N, BIT8|BIT9, 0 ); // ANTSEL as HW control - ODM_SetBBReg(pDM_Odm,ODM_REG_ANTSEL_PATH_11N, BIT13, 1); //select TX ANTESEL from path A - } - else { - ODM_SetBBReg(pDM_Odm,ODM_REG_PIN_CTRL_11N, BIT24|BIT25, 0 ); // ANTSEL as HW control - ODM_SetBBReg(pDM_Odm,ODM_REG_ANTSEL_PATH_11N, BIT13, 0); //select ANTESEL from path B + if(pRX_HP_Table->Cur_IGI != pRX_HP_Table->Pre_IGI) + { + ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); + ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); } - - //Set OFDM HW RX Antenna Diversity - ODM_SetBBReg(pDM_Odm,ODM_REG_ANTDIV_PARA1_11N, 0x7FF, 0x0c0); //Pwdb threshold=8dB - ODM_SetBBReg(pDM_Odm,ODM_REG_ANTDIV_PARA1_11N, BIT11, 0); //Switch to another antenna by checking pwdb threshold - ODM_SetBBReg(pDM_Odm,ODM_REG_ANTDIV_PARA3_11N, BIT23, 1); // Decide final antenna by comparing 2 antennas' pwdb - //Set CCK HW RX Antenna Diversity - ODM_SetBBReg(pDM_Odm,ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 0); //Antenna diversity decision period = 32 sample - ODM_SetBBReg(pDM_Odm,ODM_REG_CCK_ANTDIV_PARA2_11N, 0xf, 0xf); //Threshold for antenna diversity. Check another antenna power if input power < ANT_lim*4 - ODM_SetBBReg(pDM_Odm,ODM_REG_CCK_ANTDIV_PARA3_11N, BIT13, 1); //polarity ana_A=1 and ana_B=0 - ODM_SetBBReg(pDM_Odm,ODM_REG_CCK_ANTDIV_PARA4_11N, 0x1f, 0x8); //default antenna power = inpwr*(0.5 + r_ant_step/16) - + if(pRX_HP_Table->Cur_pw_th != pRX_HP_Table->Pre_pw_th) +{ + ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore2, BIT8|BIT9, pRX_HP_Table->Cur_pw_th); // RegC54[9:8]=2'b11: AGC Flow 3 + } - //Enable HW Antenna Diversity - if(!bTxPathSel) //PATH-A - ODM_SetBBReg(pDM_Odm,ODM_REG_IGI_A_11N, BIT7,1); // Enable Hardware antenna switch + if(pRX_HP_Table->RXHP_flag == 0) + { + pRX_HP_Table->Cur_IGI = 0x20; + } else - ODM_SetBBReg(pDM_Odm,ODM_REG_IGI_B_11N, BIT7,1); // Enable Hardware antenna switch - ODM_SetBBReg(pDM_Odm,ODM_REG_CCK_ANTDIV_PARA1_11N, BIT15, 1);//Enable antenna diversity - - pDM_SWAT_Table->CurAntenna=0; //choose left antenna as default antenna - pDM_SWAT_Table->PreAntenna=0; - for(i=0; iCCK_Ant1_Cnt[i] = 0; - pDM_SWAT_Table->CCK_Ant2_Cnt[i] = 0; - pDM_SWAT_Table->OFDM_Ant1_Cnt[i] = 0; - pDM_SWAT_Table->OFDM_Ant2_Cnt[i] = 0; - pDM_SWAT_Table->RSSI_Ant1_Sum[i] = 0; - pDM_SWAT_Table->RSSI_Ant2_Sum[i] = 0; + currentIGI = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0); + if(currentIGI<0x50) + { + ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); + ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); + } } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("<==============odm_InitHybridAntDiv\n")); -} + pRX_HP_Table->Pre_IGI = pRX_HP_Table->Cur_IGI; + pRX_HP_Table->Pre_pw_th = pRX_HP_Table->Cur_pw_th; +} VOID -odm_InitHybridAntDiv( - IN PDM_ODM_T pDM_Odm - ) +odm_PSD_RXHP( + IN PDM_ODM_T pDM_Odm +) { - if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("Return: Not Support HW AntDiv\n")); - return; - } + pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; + PADAPTER Adapter = pDM_Odm->Adapter; + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + unsigned int pts, start_point, stop_point, initial_gain ; + static u1Byte PSD_bitmap_memory[80], init_memory = 0; + static u1Byte psd_cnt=0; + static u4Byte PSD_report[80], PSD_report_tmp; + static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; + u1Byte idx[20]={96,99,102,106,109,112,115,118,122,125, + 0,3,6,10,13,16,19,22,26,29}; + u1Byte n, i, channel, BBReset,tone_idx; + u1Byte PSD_bitmap[10]/*, SSBT=0*/,initial_gain_psd=0, RSSI_BT=0, initialGainUpper; + s4Byte PSD_skip_start, PSD_skip_stop; + u4Byte CurrentChannel, RXIQI, RxIdleLowPwr, wlan_channel; + u4Byte ReScan, Interval, Is40MHz; + u8Byte curTxOkCnt, curRxOkCnt; + //--------------2G band synthesizer for 92D switch RF channel using----------------- + u1Byte group_idx=0; + u4Byte SYN_RF25=0, SYN_RF26=0, SYN_RF27=0, SYN_RF2B=0, SYN_RF2C=0; + u4Byte SYN[5] = {0x25, 0x26, 0x27, 0x2B, 0x2C}; // synthesizer RF register for 2G channel + u4Byte SYN_group[3][5] = {{0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840}, // For CH1,2,4,9,10.11.12 {0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840} + {0x643BC, 0xFC038, 0x07C1A, 0x41289, 0x01840}, // For CH3,13,14 + {0x243BC, 0xFC438, 0x07C1A, 0x4128B, 0x0FC41}}; // For Ch5,6,7,8 + //--------------------- Add by Gary for Debug setting ---------------------- + u1Byte RSSI_BT_new = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xB9C, 0xFF); + u1Byte rssi_ctrl = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xB38, 0xFF); + //--------------------------------------------------------------------- - if(pDM_Odm->SupportICType & (ODM_RTL8192C | ODM_RTL8192D)) + if(pMgntInfo->bScanInProgress) { -#if ((RTL8192C_SUPPORT == 1)||(RTL8192D_SUPPORT == 1)) - odm_InitHybridAntDiv_88C_92D(pDM_Odm); -#endif + return; } -} - - -BOOLEAN -odm_StaDefAntSel( - IN PDM_ODM_T pDM_Odm, - IN u4Byte OFDM_Ant1_Cnt, - IN u4Byte OFDM_Ant2_Cnt, - IN u4Byte CCK_Ant1_Cnt, - IN u4Byte CCK_Ant2_Cnt, - OUT u1Byte *pDefAnt - ) -{ -#if 1 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_StaDefAntSelect==============>\n")); - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("OFDM_Ant1_Cnt:%d, OFDM_Ant2_Cnt:%d\n",OFDM_Ant1_Cnt,OFDM_Ant2_Cnt)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("CCK_Ant1_Cnt:%d, CCK_Ant2_Cnt:%d\n",CCK_Ant1_Cnt,CCK_Ant2_Cnt)); + ReScan = PSD_RESCAN; + Interval = SCAN_INTERVAL; - - if(((OFDM_Ant1_Cnt+OFDM_Ant2_Cnt)==0)&&((CCK_Ant1_Cnt + CCK_Ant2_Cnt) <10)){ - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_StaDefAntSelect Fail: No enough packet info!\n")); - return FALSE; - } - if(OFDM_Ant1_Cnt || OFDM_Ant2_Cnt ) { - //if RX OFDM packet number larger than 0 - if(OFDM_Ant1_Cnt > OFDM_Ant2_Cnt) - (*pDefAnt)=1; - else - (*pDefAnt)=0; - } - // else if RX CCK packet number larger than 10 - else if((CCK_Ant1_Cnt + CCK_Ant2_Cnt) >=10 ) + //1 Initialization + if(init_memory == 0) { - if(CCK_Ant1_Cnt > (5*CCK_Ant2_Cnt)) - (*pDefAnt)=1; - else if(CCK_Ant2_Cnt > (5*CCK_Ant1_Cnt)) - (*pDefAnt)=0; - else if(CCK_Ant1_Cnt > CCK_Ant2_Cnt) - (*pDefAnt)=0; - else - (*pDefAnt)=1; - + RT_TRACE( COMP_PSD, DBG_LOUD,("Init memory\n")); + for(i = 0; i < 80; i++) + PSD_bitmap_memory[i] = 0xFF; // channel is always good + init_memory = 1; } - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("TxAnt = %s\n",((*pDefAnt)==1)?"Ant1":"Ant2")); - -#endif - //u4Byte antsel = ODM_GetBBReg(pDM_Odm, 0xc88, bMaskByte0); - //(*pDefAnt)= (u1Byte) antsel; - - - - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("<==============odm_StaDefAntSelect\n")); - - return TRUE; - - -} - - -VOID -odm_SetRxIdleAnt( - IN PDM_ODM_T pDM_Odm, - IN u1Byte Ant, - IN BOOLEAN bDualPath -) -{ - SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - - //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_SetRxIdleAnt==============>\n")); - - if(Ant != pDM_SWAT_Table->RxIdleAnt) + if(psd_cnt == 0) { - //for path-A - if(Ant==1) - ODM_SetBBReg(pDM_Odm,ODM_REG_RX_DEFUALT_A_11N, 0xFFFF, 0x65a9); //right-side antenna - else - ODM_SetBBReg(pDM_Odm,ODM_REG_RX_DEFUALT_A_11N, 0xFFFF, 0x569a); //left-side antenna - - //for path-B - if(bDualPath){ - if(Ant==0) - ODM_SetBBReg(pDM_Odm,ODM_REG_RX_DEFUALT_A_11N, 0xFFFF0000, 0x65a9); //right-side antenna - else - ODM_SetBBReg(pDM_Odm,ODM_REG_RX_DEFUALT_A_11N, 0xFFFF0000, 0x569a); //left-side antenna - } - } - pDM_SWAT_Table->RxIdleAnt = Ant; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("RxIdleAnt: %s Reg858=0x%x\n",(Ant==1)?"Ant1":"Ant2",(Ant==1)?0x65a9:0x569a)); - - //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("<==============odm_SetRxIdleAnt\n")); - + RT_TRACE(COMP_PSD, DBG_LOUD,("Enter dm_PSD_Monitor\n")); + for(i = 0; i < 80; i++) + PSD_report[i] = 0; } - -VOID -ODM_AntselStatistics_88C( - IN PDM_ODM_T pDM_Odm, - IN u1Byte MacId, - IN u4Byte PWDBAll, - IN BOOLEAN isCCKrate -) -{ - SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - if(pDM_SWAT_Table->antsel == 1) + //1 Backup Current Settings + CurrentChannel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); + if(pDM_Odm->SupportICType == ODM_RTL8192D) { - if(isCCKrate) - pDM_SWAT_Table->CCK_Ant1_Cnt[MacId]++; - else + //2 Record Current synthesizer parameters based on current channel + if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP)) { - pDM_SWAT_Table->OFDM_Ant1_Cnt[MacId]++; - pDM_SWAT_Table->RSSI_Ant1_Sum[MacId] += PWDBAll; - } - } - else - { - if(isCCKrate) - pDM_SWAT_Table->CCK_Ant2_Cnt[MacId]++; - else + SYN_RF25 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x25, bMaskDWord); + SYN_RF26 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x26, bMaskDWord); + SYN_RF27 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x27, bMaskDWord); + SYN_RF2B = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2B, bMaskDWord); + SYN_RF2C = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2C, bMaskDWord); + } + else // DualMAC_DualPHY 2G { - pDM_SWAT_Table->OFDM_Ant2_Cnt[MacId]++; - pDM_SWAT_Table->RSSI_Ant2_Sum[MacId] += PWDBAll; + SYN_RF25 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x25, bMaskDWord); + SYN_RF26 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x26, bMaskDWord); + SYN_RF27 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x27, bMaskDWord); + SYN_RF2B = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2B, bMaskDWord); + SYN_RF2C = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2C, bMaskDWord); } } - -} - - - - -#if(DM_ODM_SUPPORT_TYPE==ODM_WIN) -VOID -ODM_SetTxAntByTxInfo_88C_92D( - IN PDM_ODM_T pDM_Odm, - IN pu1Byte pDesc, - IN u1Byte macId -) -{ - SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - u1Byte antsel; - - if(!(pDM_Odm->SupportAbility&ODM_BB_ANT_DIV)) - return; - - if(pDM_SWAT_Table->RxIdleAnt == 1) - antsel=(pDM_SWAT_Table->TxAnt[macId] == 1)?0:1; - else - antsel=(pDM_SWAT_Table->TxAnt[macId] == 1)?1:0; + RXIQI = ODM_GetBBReg(pDM_Odm, 0xC14, bMaskDWord); + RxIdleLowPwr = (ODM_GetBBReg(pDM_Odm, 0x818, bMaskDWord)&BIT28)>>28; + Is40MHz = *(pDM_Odm->pBandWidth); + ODM_RT_TRACE(pDM_Odm, COMP_PSD, DBG_LOUD,("PSD Scan Start\n")); + //1 Turn off CCK + ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0); + //1 Turn off TX + //Pause TX Queue + ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0xFF); + //Force RX to stop TX immediately + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13); + //1 Turn off RX + //Rx AGC off RegC70[0]=0, RegC7C[20]=0 + ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 0); + ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 0); + //Turn off CCA + ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, 0x0); + //BB Reset + ODM_SetBBReg(pDM_Odm, 0x87C, BIT31, 1); //clock gated to prevent from AGC table mess + BBReset = ODM_Read1Byte(pDM_Odm, 0x02); + ODM_Write1Byte(pDM_Odm, 0x02, BBReset&(~BIT0)); + ODM_Write1Byte(pDM_Odm, 0x02, BBReset|BIT0); + ODM_SetBBReg(pDM_Odm, 0x87C, BIT31, 0); + //1 Leave RX idle low power + ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); + //1 Fix initial gain + RSSI_BT = RSSI_BT_new; + RT_TRACE(COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); - SET_TX_DESC_ANTSEL_A_92C(pDesc, antsel); - //SET_TX_DESC_ANTSEL_B_92C(pDesc, antsel); - //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("SET_TX_DESC_ANTSEL_A_92C=%d\n", pDM_SWAT_Table->TxAnt[macId])); -} -#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) -VOID -ODM_SetTxAntByTxInfo_88C_92D( - IN PDM_ODM_T pDM_Odm -) -{ - -} -#elif(DM_ODM_SUPPORT_TYPE==ODM_AP) -VOID -ODM_SetTxAntByTxInfo_88C_92D( - IN PDM_ODM_T pDM_Odm -) -{ - -} -#endif - -VOID -odm_HwAntDiv_92C_92D( - IN PDM_ODM_T pDM_Odm -) -{ - SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - u4Byte RSSI_Min=0xFF, RSSI, RSSI_Ant1, RSSI_Ant2; - u1Byte RxIdleAnt, i; - BOOLEAN bRet=FALSE; - PSTA_INFO_T pEntry; - -#if (DM_ODM_SUPPORT_TYPE==ODM_AP) - struct rtl8192cd_priv *priv=pDM_Odm->priv; - //if test, return - if(priv->pshare->rf_ft_var.CurAntenna & 0x80) - return; -#endif - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_HwAntDiv==============>\n")); - - if(!(pDM_Odm->SupportAbility&ODM_BB_ANT_DIV)) //if don't support antenna diveristy - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_HwAntDiv: Not supported!\n")); - return; - } - - if((pDM_Odm->SupportICType != ODM_RTL8192C) && (pDM_Odm->SupportICType != ODM_RTL8192D)) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("Return: IC Type is not 92C or 92D\n")); - return; - } - -#if (DM_ODM_SUPPORT_TYPE&(ODM_WIN|ODM_CE)) - if(!pDM_Odm->bLinked) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("Return: bLinked is FALSE\n")); - return; - } -#endif - - for (i=0; ipODM_StaInfo[i]; - if(IS_STA_VALID(pEntry)) - { - - RSSI_Ant1 = (pDM_SWAT_Table->OFDM_Ant1_Cnt[i] == 0)?0:(pDM_SWAT_Table->RSSI_Ant1_Sum[i]/pDM_SWAT_Table->OFDM_Ant1_Cnt[i]); - RSSI_Ant2 = (pDM_SWAT_Table->OFDM_Ant2_Cnt[i] == 0)?0:(pDM_SWAT_Table->RSSI_Ant2_Sum[i]/pDM_SWAT_Table->OFDM_Ant2_Cnt[i]); - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("RSSI_Ant1=%d, RSSI_Ant2=%d\n", RSSI_Ant1, RSSI_Ant2)); - - if(RSSI_Ant1 ||RSSI_Ant2) - { -#if (DM_ODM_SUPPORT_TYPE==ODM_AP) - if(pDM_Odm->pODM_StaInfo[i]->expire_to) -#endif - { - RSSI = (RSSI_Ant1 < RSSI_Ant2) ? RSSI_Ant1 : RSSI_Ant2; - if((!RSSI) || ( RSSI < RSSI_Min) ) { - pDM_SWAT_Table->TargetSTA = i; - RSSI_Min = RSSI; - } - } - } - ///STA: found out default antenna - bRet=odm_StaDefAntSel(pDM_Odm, - pDM_SWAT_Table->OFDM_Ant1_Cnt[i], - pDM_SWAT_Table->OFDM_Ant2_Cnt[i], - pDM_SWAT_Table->CCK_Ant1_Cnt[i], - pDM_SWAT_Table->CCK_Ant2_Cnt[i], - &pDM_SWAT_Table->TxAnt[i]); - - //if Tx antenna selection: successful - if(bRet){ - pDM_SWAT_Table->RSSI_Ant1_Sum[i] = 0; - pDM_SWAT_Table->RSSI_Ant2_Sum[i] = 0; - pDM_SWAT_Table->OFDM_Ant1_Cnt[i] = 0; - pDM_SWAT_Table->OFDM_Ant2_Cnt[i] = 0; - pDM_SWAT_Table->CCK_Ant1_Cnt[i] = 0; - pDM_SWAT_Table->CCK_Ant2_Cnt[i] = 0; - } - } - } - - //set RX Idle Ant - RxIdleAnt = pDM_SWAT_Table->TxAnt[pDM_SWAT_Table->TargetSTA]; - odm_SetRxIdleAnt(pDM_Odm, RxIdleAnt, FALSE); - -#if (DM_ODM_SUPPORT_TYPE==ODM_AP) -#ifdef TX_SHORTCUT - if (!priv->pmib->dot11OperationEntry.disable_txsc) { - plist = phead->next; - while(plist != phead) { - pstat = list_entry(plist, struct stat_info, asoc_list); - if(pstat->expire_to) { - for (i=0; itx_sc_ent[i].hwdesc1); - pdesc->Dword2 &= set_desc(~ (BIT(24)|BIT(25))); - if((pstat->CurAntenna^priv->pshare->rf_ft_var.CurAntenna)&1) - pdesc->Dword2 |= set_desc(BIT(24)|BIT(25)); - pdesc= &(pstat->tx_sc_ent[i].hwdesc2); - pdesc->Dword2 &= set_desc(~ (BIT(24)|BIT(25))); - if((pstat->CurAntenna^priv->pshare->rf_ft_var.CurAntenna)&1) - pdesc->Dword2 |= set_desc(BIT(24)|BIT(25)); - } - } - - if (plist == plist->next) - break; - plist = plist->next; - }; - } -#endif -#endif - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("<==============odm_HwAntDiv\n")); - -} - -VOID -odm_HwAntDiv( - IN PDM_ODM_T pDM_Odm -) -{ - - PADAPTER pAdapter = pDM_Odm->Adapter; - -#if(DM_ODM_SUPPORT_TYPE==ODM_WIN) - if(pAdapter->MgntInfo.AntennaTest) - return; -#endif - if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("Return: Not Support HW AntDiv\n")); - return; - } - - if(pDM_Odm->SupportICType & (ODM_RTL8192C | ODM_RTL8192D)) - { -#if ((RTL8192C_SUPPORT == 1)||(RTL8192D_SUPPORT == 1)) - odm_HwAntDiv_92C_92D(pDM_Odm); -#endif - } -} - - -#if(DM_ODM_SUPPORT_TYPE==ODM_AP) -#if 0 -VOID -odm_HwAntDiv( - IN PDM_ODM_T pDM_Odm -) -{ - struct rtl8192cd_priv *priv=pDM_Odm->priv; - struct stat_info *pstat, *pstat_min=NULL; - struct list_head *phead, *plist; - int rssi_min= 0xff, i; - u1Byte idleAnt=priv->pshare->rf_ft_var.CurAntenna; - u1Byte nextAnt; - BOOLEAN bRet=FALSE; + if(rssi_ctrl == 1) // just for debug!! + initial_gain_psd = RSSI_BT_new; + else + initial_gain_psd = pDM_Odm->RSSI_Min; // PSD report based on RSSI - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_HwAntDiv==============>\n")); - - if((!priv->pshare->rf_ft_var.antHw_enable) ||(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV))) - return; + RT_TRACE(COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); - //if test, return - if(priv->pshare->rf_ft_var.CurAntenna & 0x80) - return; + initialGainUpper = 0x54; - phead = &priv->asoc_list; - plist = phead->next; - ////========================= - //find mimum rssi sta - ////========================= - while(plist != phead) { - pstat = list_entry(plist, struct stat_info, asoc_list); - if((pstat->expire_to) && (pstat->AntRSSI[0] || pstat->AntRSSI[1])) { - int rssi = (pstat->AntRSSI[0] < pstat->AntRSSI[1]) ? pstat->AntRSSI[0] : pstat->AntRSSI[1]; - if((!pstat_min) || ( rssi < rssi_min) ) { - pstat_min = pstat; - rssi_min = rssi; - } - } - ///STA: found out default antenna - bRet=odm_StaDefAntSel(pDM_Odm, - pstat->hwRxAntSel[1], - pstat->hwRxAntSel[0], - pstat->cckPktCount[1], - pstat->cckPktCount[0], - &nextAnt - ); - - //if default antenna selection: successful - if(bRet){ - pstat->CurAntenna = nextAnt; - //update rssi - for(i=0; i<2; i++) { - if(pstat->cckPktCount[i]==0 && pstat->hwRxAntSel[i]==0) - pstat->AntRSSI[i] = 0; - } - if(pstat->AntRSSI[idleAnt]==0) - pstat->AntRSSI[idleAnt] = pstat->AntRSSI[idleAnt^1]; - // reset variables - pstat->hwRxAntSel[1] = pstat->hwRxAntSel[0] =0; - pstat->cckPktCount[1]= pstat->cckPktCount[0] =0; - } - - if (plist == plist->next) - break; - plist = plist->next; - - }; - ////========================= - //Choose RX Idle antenna according to minmum rssi - ////========================= - if(pstat_min) { - if(priv->pshare->rf_ft_var.CurAntenna!=pstat_min->CurAntenna) - odm_SetRxIdleAnt(pDM_Odm,pstat_min->CurAntenna,TRUE); - priv->pshare->rf_ft_var.CurAntenna = pstat_min->CurAntenna; - } - - -#ifdef TX_SHORTCUT - if (!priv->pmib->dot11OperationEntry.disable_txsc) { - plist = phead->next; - while(plist != phead) { - pstat = list_entry(plist, struct stat_info, asoc_list); - if(pstat->expire_to) { - for (i=0; itx_sc_ent[i].hwdesc1); - pdesc->Dword2 &= set_desc(~ (BIT(24)|BIT(25))); - if((pstat->CurAntenna^priv->pshare->rf_ft_var.CurAntenna)&1) - pdesc->Dword2 |= set_desc(BIT(24)|BIT(25)); - pdesc= &(pstat->tx_sc_ent[i].hwdesc2); - pdesc->Dword2 &= set_desc(~ (BIT(24)|BIT(25))); - if((pstat->CurAntenna^priv->pshare->rf_ft_var.CurAntenna)&1) - pdesc->Dword2 |= set_desc(BIT(24)|BIT(25)); - } - } - - if (plist == plist->next) - break; - plist = plist->next; - }; - } -#endif - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,"<==============odm_HwAntDiv\n"); -} -#endif - -u1Byte -ODM_Diversity_AntennaSelect( - IN PDM_ODM_T pDM_Odm, - IN u1Byte *data -) -{ - struct rtl8192cd_priv *priv=pDM_Odm->priv; - - int ant = _atoi(data, 16); - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("ODM_Diversity_AntennaSelect==============>\n")); - - #ifdef PCIE_POWER_SAVING - PCIeWakeUp(priv, POWER_DOWN_T0); - #endif - - if (ant==AUX_ANT || ant==MAIN_ANT) - { - if ( !priv->pshare->rf_ft_var.antSw_select) { - ODM_Write4Byte(pDM_Odm,0x870, ODM_Read4Byte(pDM_Odm,0x870) | BIT(8)| BIT(9) ); // ANTSEL A as SW control - ODM_Write1Byte(pDM_Odm,0xc50, ODM_Read1Byte(pDM_Odm,0xc50) & (~ BIT(7))); // rx OFDM SW control - PHY_SetBBReg(priv, 0x860, 0x300, ant); - } else { - ODM_Write4Byte(pDM_Odm,0x870, ODM_Read4Byte(pDM_Odm,0x870) | BIT(24)| BIT(25) ); // ANTSEL B as HW control - PHY_SetBBReg(priv, 0x864, 0x300, ant); - ODM_Write1Byte(pDM_Odm,0xc58, ODM_Read1Byte(pDM_Odm,0xc58) & (~ BIT(7))); // rx OFDM SW control - } - - ODM_Write1Byte(pDM_Odm,0xa01, ODM_Read1Byte(pDM_Odm,0xa01) & (~ BIT(7))); // rx CCK SW control - ODM_Write4Byte(pDM_Odm,0x80c, ODM_Read4Byte(pDM_Odm,0x80c) & (~ BIT(21))); // select ant by tx desc - ODM_Write4Byte(pDM_Odm,0x858, 0x569a569a); - - priv->pshare->rf_ft_var.antHw_enable = 0; - priv->pshare->rf_ft_var.CurAntenna = (ant%2); - - #ifdef SW_ANT_SWITCH - priv->pshare->rf_ft_var.antSw_enable = 0; - priv->pshare->DM_SWAT_Table.CurAntenna = ant; - priv->pshare->RSSI_test =0; - #endif - } - else if(ant==0){ - - if ( !priv->pshare->rf_ft_var.antSw_select) { - ODM_Write4Byte(pDM_Odm,0x870, ODM_Read4Byte(pDM_Odm,0x870) & ~(BIT(8)| BIT(9)) ); - ODM_Write1Byte(pDM_Odm,0xc50, ODM_Read1Byte(pDM_Odm,0xc50) | BIT(7)); // OFDM HW control - } else { - ODM_Write4Byte(pDM_Odm,0x870, ODM_Read4Byte(pDM_Odm,0x870) & ~(BIT(24)| BIT(25)) ); - ODM_Write1Byte(pDM_Odm,0xc58, ODM_Read1Byte(pDM_Odm,0xc58) | BIT(7)); // OFDM HW control - } - - ODM_Write1Byte(pDM_Odm,0xa01, ODM_Read1Byte(pDM_Odm,0xa01) | BIT(7)); // CCK HW control - ODM_Write4Byte(pDM_Odm,0x80c, ODM_Read4Byte(pDM_Odm,0x80c) | BIT(21) ); // by tx desc - priv->pshare->rf_ft_var.CurAntenna = 0; - ODM_Write4Byte(pDM_Odm,0x858, 0x569a569a); - priv->pshare->rf_ft_var.antHw_enable = 1; -#ifdef SW_ANT_SWITCH - priv->pshare->rf_ft_var.antSw_enable = 0; - priv->pshare->RSSI_test =0; -#endif - } -#ifdef SW_ANT_SWITCH - else if(ant==3) { - if(!priv->pshare->rf_ft_var.antSw_enable) { - - dm_SW_AntennaSwitchInit(priv); - ODM_Write4Byte(pDM_Odm,0x858, 0x569a569a); - priv->pshare->lastTxOkCnt = priv->net_stats.tx_bytes; - priv->pshare->lastRxOkCnt = priv->net_stats.rx_bytes; - } - if ( !priv->pshare->rf_ft_var.antSw_select) - ODM_Write1Byte(pDM_Odm,0xc50, ODM_Read1Byte(pDM_Odm,0xc50) & (~ BIT(7))); // rx OFDM SW control - else - ODM_Write1Byte(pDM_Odm,0xc58, ODM_Read1Byte(pDM_Odm,0xc58) & (~ BIT(7))); // rx OFDM SW control - - ODM_Write1Byte(pDM_Odm,0xa01, ODM_Read1Byte(pDM_Odm,0xa01) & (~ BIT(7))); // rx CCK SW control - ODM_Write4Byte(pDM_Odm,0x80c, ODM_Read4Byte(pDM_Odm,0x80c) & (~ BIT(21))); // select ant by tx desc - priv->pshare->rf_ft_var.antHw_enable = 0; - priv->pshare->rf_ft_var.antSw_enable = 1; - - } -#endif - ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("<==============ODM_Diversity_AntennaSelect\n")); - - return 1; -} -#endif - -#else //#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) - -VOID odm_InitHybridAntDiv( IN PDM_ODM_T pDM_Odm ){} -VOID odm_HwAntDiv( IN PDM_ODM_T pDM_Odm){} -#if(DM_ODM_SUPPORT_TYPE==ODM_WIN) -VOID ODM_SetTxAntByTxInfo_88C_92D( - IN PDM_ODM_T pDM_Odm, - IN pu1Byte pDesc, - IN u1Byte macId -){} -#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) -VOID ODM_SetTxAntByTxInfo_88C_92D( IN PDM_ODM_T pDM_Odm){ } -#elif(DM_ODM_SUPPORT_TYPE==ODM_AP) -VOID ODM_SetTxAntByTxInfo_88C_92D( IN PDM_ODM_T pDM_Odm){ } -#endif - -#endif //#if(defined(CONFIG_HW_ANTENNA_DIVERSITY)) - - - -//============================================================ -//EDCA Turbo -//============================================================ -VOID -ODM_EdcaTurboInit( - IN PDM_ODM_T pDM_Odm) -{ - -#if ((DM_ODM_SUPPORT_TYPE == ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL)) - odm_EdcaParaInit(pDM_Odm); -#elif (DM_ODM_SUPPORT_TYPE==ODM_WIN) - PADAPTER Adapter = NULL; - HAL_DATA_TYPE *pHalData = NULL; - - if(pDM_Odm->Adapter==NULL) { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EdcaTurboInit fail!!!\n")); - return; - } - - Adapter=pDM_Odm->Adapter; - pHalData=GET_HAL_DATA(Adapter); - - pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE; - pDM_Odm->DM_EDCA_Table.bIsCurRDLState = FALSE; - pHalData->bIsAnyNonBEPkts = FALSE; - -#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) - PADAPTER Adapter = pDM_Odm->Adapter; - pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE; - pDM_Odm->DM_EDCA_Table.bIsCurRDLState = FALSE; - Adapter->recvpriv.bIsAnyNonBEPkts =FALSE; - -#endif - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial VO PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_VO_PARAM))); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial VI PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_VI_PARAM))); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BE PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BE_PARAM))); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BK PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BK_PARAM))); - - -} // ODM_InitEdcaTurbo - -VOID -odm_EdcaTurboCheck( - IN PDM_ODM_T pDM_Odm - ) -{ - // - // For AP/ADSL use prtl8192cd_priv - // For CE/NIC use PADAPTER - // - - // - // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate - // at the same time. In the stage2/3, we need to prive universal interface and merge all - // HW dynamic mechanism. - // - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("odm_EdcaTurboCheck========================>\n")); - - if(!(pDM_Odm->SupportAbility& ODM_MAC_EDCA_TURBO )) - return; - - switch (pDM_Odm->SupportPlatform) - { - case ODM_WIN: - -#if(DM_ODM_SUPPORT_TYPE==ODM_WIN) - odm_EdcaTurboCheckMP(pDM_Odm); -#endif - break; - - case ODM_CE: -#if(DM_ODM_SUPPORT_TYPE==ODM_CE) - odm_EdcaTurboCheckCE(pDM_Odm); -#endif - break; - - case ODM_AP: - case ODM_ADSL: - -#if ((DM_ODM_SUPPORT_TYPE == ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL)) - odm_IotEngine(pDM_Odm); -#endif - break; - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("<========================odm_EdcaTurboCheck\n")); - -} // odm_CheckEdcaTurbo - -#if(DM_ODM_SUPPORT_TYPE==ODM_CE) - - -VOID -odm_EdcaTurboCheckCE( - IN PDM_ODM_T pDM_Odm - ) -{ - -#if(DM_ODM_SUPPORT_TYPE==ODM_CE) - - PADAPTER Adapter = pDM_Odm->Adapter; - u32 EDCA_BE_UL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[pMgntInfo->IOTPeer]; - u32 EDCA_BE_DL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[pMgntInfo->IOTPeer]; - u32 ICType=pDM_Odm->SupportICType; - u32 IOTPeer=0; - u8 WirelessMode=0xFF; //invalid value - u32 trafficIndex; - u32 edca_param; - u64 cur_tx_bytes = 0; - u64 cur_rx_bytes = 0; - u8 bbtchange = _FALSE; - u8 bBiasOnRx = _FALSE; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter); - struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); - struct recv_priv *precvpriv = &(Adapter->recvpriv); - struct registry_priv *pregpriv = &Adapter->registrypriv; - struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - - if(pDM_Odm->bLinked != _TRUE) - goto dm_CheckEdcaTurbo_EXIT; - - if ((pregpriv->wifi_spec == 1) )//|| (pmlmeinfo->HT_enable == 0)) - { - goto dm_CheckEdcaTurbo_EXIT; - } - - if(pDM_Odm->pWirelessMode!=NULL) - WirelessMode=*(pDM_Odm->pWirelessMode); - - IOTPeer = pmlmeinfo->assoc_AP_vendor; - - if (IOTPeer >= HT_IOT_PEER_MAX) - { - goto dm_CheckEdcaTurbo_EXIT; - } - - if( (pDM_Odm->SupportICType == ODM_RTL8192C) || - (pDM_Odm->SupportICType == ODM_RTL8723A) || - (pDM_Odm->SupportICType == ODM_RTL8188E)) - { - if((IOTPeer == HT_IOT_PEER_RALINK)||(IOTPeer == HT_IOT_PEER_ATHEROS)) - bBiasOnRx = _TRUE; - } - - // Check if the status needs to be changed. - if((bbtchange) || (!precvpriv->bIsAnyNonBEPkts) ) - { - cur_tx_bytes = pdvobjpriv->traffic_stat.cur_tx_bytes; - cur_rx_bytes = pdvobjpriv->traffic_stat.cur_rx_bytes; - - //traffic, TX or RX - if(bBiasOnRx) - { - if (cur_tx_bytes > (cur_rx_bytes << 2)) - { // Uplink TP is present. - trafficIndex = UP_LINK; - } - else - { // Balance TP is present. - trafficIndex = DOWN_LINK; - } - } - else - { - if (cur_rx_bytes > (cur_tx_bytes << 2)) - { // Downlink TP is present. - trafficIndex = DOWN_LINK; - } - else - { // Balance TP is present. - trafficIndex = UP_LINK; - } - } - - //if ((pDM_Odm->DM_EDCA_Table.prv_traffic_idx != trafficIndex) || (!pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA)) - { - if(ICType==ODM_RTL8192D) - { - // Single PHY - if(pDM_Odm->RFType==ODM_2T2R) - { - EDCA_BE_UL = 0x60a42b; //0x5ea42b; - EDCA_BE_DL = 0x60a42b; //0x5ea42b; - } - else - { - EDCA_BE_UL = 0x6ea42b; - EDCA_BE_DL = 0x6ea42b; - } - } - else - { - if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE) { - if((ICType==ODM_RTL8192C)&&(pDM_Odm->RFType==ODM_2T2R)) { - EDCA_BE_UL = 0x60a42b; - EDCA_BE_DL = 0x60a42b; - } - else - { - EDCA_BE_UL = 0x6ea42b; - EDCA_BE_DL = 0x6ea42b; - } - } - } - - //92D txop can't be set to 0x3e for cisco1250 - if((ICType!=ODM_RTL8192D) && (IOTPeer== HT_IOT_PEER_CISCO) &&(WirelessMode==ODM_WM_N24G)) - { - EDCA_BE_DL = edca_setting_DL[IOTPeer]; - EDCA_BE_UL = edca_setting_UL[IOTPeer]; - } - //merge from 92s_92c_merge temp brunch v2445 20120215 - else if((IOTPeer == HT_IOT_PEER_CISCO) &&((WirelessMode==ODM_WM_G)||(WirelessMode==(ODM_WM_B|ODM_WM_G))||(WirelessMode==ODM_WM_A)||(WirelessMode==ODM_WM_B))) - { - EDCA_BE_DL = edca_setting_DL_GMode[IOTPeer]; - } - else if((IOTPeer== HT_IOT_PEER_AIRGO )&& ((WirelessMode==ODM_WM_G)||(WirelessMode==ODM_WM_A))) - { - EDCA_BE_DL = 0xa630; - } - else if(IOTPeer == HT_IOT_PEER_MARVELL) - { - EDCA_BE_DL = edca_setting_DL[IOTPeer]; - EDCA_BE_UL = edca_setting_UL[IOTPeer]; - } - else if(IOTPeer == HT_IOT_PEER_ATHEROS) - { - // Set DL EDCA for Atheros peer to 0x3ea42b. Suggested by SD3 Wilson for ASUS TP issue. - EDCA_BE_DL = edca_setting_DL[IOTPeer]; - } - - if((ICType==ODM_RTL8812)||(ICType==ODM_RTL8821)||(ICType==ODM_RTL8192E)) //add 8812AU/8812AE - { - EDCA_BE_UL = 0x5ea42b; - EDCA_BE_DL = 0x5ea42b; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("8812A: EDCA_BE_UL=0x%x EDCA_BE_DL =0x%x",EDCA_BE_UL,EDCA_BE_DL)); - } - - if (trafficIndex == DOWN_LINK) - edca_param = EDCA_BE_DL; - else - edca_param = EDCA_BE_UL; - - rtw_write32(Adapter, REG_EDCA_BE_PARAM, edca_param); - - pDM_Odm->DM_EDCA_Table.prv_traffic_idx = trafficIndex; - } - - pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = _TRUE; - } - else - { - // - // Turn Off EDCA turbo here. - // Restore original EDCA according to the declaration of AP. - // - if(pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) - { - rtw_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE); - pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = _FALSE; - } - } - -dm_CheckEdcaTurbo_EXIT: - // Set variables for next time. - precvpriv->bIsAnyNonBEPkts = _FALSE; -#endif -} - - -#elif(DM_ODM_SUPPORT_TYPE==ODM_WIN) -VOID -odm_EdcaTurboCheckMP( - IN PDM_ODM_T pDM_Odm - ) -{ - - - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - PADAPTER pDefaultAdapter = GetDefaultAdapter(Adapter); - PADAPTER pExtAdapter = GetFirstExtAdapter(Adapter);//NULL; - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - PSTA_QOS pStaQos = Adapter->MgntInfo.pStaQos; - //[Win7 Count Tx/Rx statistic for Extension Port] odm_CheckEdcaTurbo's Adapter is always Default. 2009.08.20, by Bohn - u8Byte Ext_curTxOkCnt = 0; - u8Byte Ext_curRxOkCnt = 0; - //For future Win7 Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn. - u1Byte TwoPortStatus = (u1Byte)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE; - - // Keep past Tx/Rx packet count for RT-to-RT EDCA turbo. - u8Byte curTxOkCnt = 0; - u8Byte curRxOkCnt = 0; - u4Byte EDCA_BE_UL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[pMgntInfo->IOTPeer]; - u4Byte EDCA_BE_DL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[pMgntInfo->IOTPeer]; - u4Byte EDCA_BE = 0x5ea42b; - u1Byte IOTPeer=0; - BOOLEAN *pbIsCurRDLState=NULL; - BOOLEAN bLastIsCurRDLState=FALSE; - BOOLEAN bBiasOnRx=FALSE; - BOOLEAN bEdcaTurboOn=FALSE; - u1Byte TxRate = 0xFF; - u8Byte value64; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("odm_EdcaTurboCheckMP========================>")); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BE PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BE_PARAM))); - -////=============================== -////list paramter for different platform -////=============================== - bLastIsCurRDLState=pDM_Odm->DM_EDCA_Table.bIsCurRDLState; - pbIsCurRDLState=&(pDM_Odm->DM_EDCA_Table.bIsCurRDLState); - - //2012/09/14 MH Add - if (pMgntInfo->NumNonBePkt > pMgntInfo->RegEdcaThresh && !Adapter->MgntInfo.bWiFiConfg) - pHalData->bIsAnyNonBEPkts = TRUE; - - pMgntInfo->NumNonBePkt = 0; - - // Caculate TX/RX TP: - //curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - pMgntInfo->lastTxOkCnt; - //curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - pMgntInfo->lastRxOkCnt; - curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - pDM_Odm->lastTxOkCnt; - curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - pDM_Odm->lastRxOkCnt; - pDM_Odm->lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; - pDM_Odm->lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; - - if(pExtAdapter == NULL) - pExtAdapter = pDefaultAdapter; - - Ext_curTxOkCnt = pExtAdapter->TxStats.NumTxBytesUnicast - pMgntInfo->Ext_lastTxOkCnt; - Ext_curRxOkCnt = pExtAdapter->RxStats.NumRxBytesUnicast - pMgntInfo->Ext_lastRxOkCnt; - GetTwoPortSharedResource(Adapter,TWO_PORT_SHARED_OBJECT__STATUS,NULL,&TwoPortStatus); - //For future Win7 Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn. - if(TwoPortStatus == TWO_PORT_STATUS__EXTENSION_ONLY) - { - curTxOkCnt = Ext_curTxOkCnt ; - curRxOkCnt = Ext_curRxOkCnt ; - } - // - IOTPeer=pMgntInfo->IOTPeer; - bBiasOnRx=(pMgntInfo->IOTAction & HT_IOT_ACT_EDCA_BIAS_ON_RX)?TRUE:FALSE; - bEdcaTurboOn=((!pHalData->bIsAnyNonBEPkts) && (!pMgntInfo->bDisableFrameBursting))?TRUE:FALSE; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bIsAnyNonBEPkts : 0x%lx bDisableFrameBursting : 0x%lx \n",pHalData->bIsAnyNonBEPkts,pMgntInfo->bDisableFrameBursting)); - - -////=============================== -////check if edca turbo is disabled -////=============================== - if(odm_IsEdcaTurboDisable(pDM_Odm)) - goto dm_CheckEdcaTurbo_EXIT; - - -////=============================== -////remove iot case out -////=============================== - ODM_EdcaParaSelByIot(pDM_Odm, &EDCA_BE_UL, &EDCA_BE_DL); - - -////=============================== -////Check if the status needs to be changed. -////=============================== - if(bEdcaTurboOn) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bEdcaTurboOn : 0x%x bBiasOnRx : 0x%x\n",bEdcaTurboOn,bBiasOnRx)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("curTxOkCnt : 0x%lx \n",curTxOkCnt)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("curRxOkCnt : 0x%lx \n",curRxOkCnt)); - if(bBiasOnRx) - odm_EdcaChooseTrafficIdx(pDM_Odm,curTxOkCnt, curRxOkCnt, TRUE, pbIsCurRDLState); - else - odm_EdcaChooseTrafficIdx(pDM_Odm,curTxOkCnt, curRxOkCnt, FALSE, pbIsCurRDLState); - -//modify by Guo.Mingzhi 2011-12-29 - EDCA_BE=((*pbIsCurRDLState)==TRUE)?EDCA_BE_DL:EDCA_BE_UL; - if(IS_HARDWARE_TYPE_8821U(Adapter)) - { - if(pMgntInfo->RegTxDutyEnable) - { - //2013.01.23 LukeLee: debug for 8811AU thermal issue (reduce Tx duty cycle) - if(!pMgntInfo->ForcedDataRate) //auto rate - { - if(pDM_Odm->TxRate != 0xFF) - TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate); - } - else //force rate - { - TxRate = (u1Byte) pMgntInfo->ForcedDataRate; - } - - value64 = (curRxOkCnt<<2); - if(curTxOkCnt < value64) //Downlink - ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); - else //Uplink - { - //DbgPrint("pDM_Odm->RFCalibrateInfo.ThermalValue = 0x%X\n", pDM_Odm->RFCalibrateInfo.ThermalValue); - //if(pDM_Odm->RFCalibrateInfo.ThermalValue < pHalData->EEPROMThermalMeter) - if((pDM_Odm->RFCalibrateInfo.ThermalValue < 0x2c) || (*pDM_Odm->pBandType == BAND_ON_2_4G)) - ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); - else - { - switch (TxRate) - { - case MGN_VHT1SS_MCS6: - case MGN_VHT1SS_MCS5: - case MGN_MCS6: - case MGN_MCS5: - case MGN_48M: - case MGN_54M: - ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0x1ea42b); - break; - case MGN_VHT1SS_MCS4: - case MGN_MCS4: - case MGN_36M: - ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa42b); - break; - case MGN_VHT1SS_MCS3: - case MGN_MCS3: - case MGN_24M: - ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa47f); - break; - case MGN_VHT1SS_MCS2: - case MGN_MCS2: - case MGN_18M: - ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa57f); - break; - case MGN_VHT1SS_MCS1: - case MGN_MCS1: - case MGN_9M: - case MGN_12M: - ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa77f); - break; - case MGN_VHT1SS_MCS0: - case MGN_MCS0: - case MGN_6M: - ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa87f); - break; - default: - ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); - break; - } - } - } - } - else - { - ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); - } - - } - else if (IS_HARDWARE_TYPE_8812AU(Adapter)){ - if(pMgntInfo->RegTxDutyEnable) - { - //2013.07.26 Wilson: debug for 8812AU thermal issue (reduce Tx duty cycle) - // it;s the same issue as 8811AU - if(!pMgntInfo->ForcedDataRate) //auto rate - { - if(pDM_Odm->TxRate != 0xFF) - TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate); - } - else //force rate - { - TxRate = (u1Byte) pMgntInfo->ForcedDataRate; - } - - value64 = (curRxOkCnt<<2); - if(curTxOkCnt < value64) //Downlink - ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); - else //Uplink - { - //DbgPrint("pDM_Odm->RFCalibrateInfo.ThermalValue = 0x%X\n", pDM_Odm->RFCalibrateInfo.ThermalValue); - //if(pDM_Odm->RFCalibrateInfo.ThermalValue < pHalData->EEPROMThermalMeter) - if((pDM_Odm->RFCalibrateInfo.ThermalValue < 0x2c) || (*pDM_Odm->pBandType == BAND_ON_2_4G)) - ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); - else - { - switch (TxRate) - { - case MGN_VHT2SS_MCS9: - case MGN_VHT1SS_MCS9: - case MGN_VHT1SS_MCS8: - case MGN_MCS15: - case MGN_MCS7: - ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0x1ea44f); - case MGN_VHT2SS_MCS8: - case MGN_VHT1SS_MCS7: - case MGN_MCS14: - case MGN_MCS6: - case MGN_54M: - ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa44f); - case MGN_VHT2SS_MCS7: - case MGN_VHT2SS_MCS6: - case MGN_VHT1SS_MCS6: - case MGN_VHT1SS_MCS5: - case MGN_MCS13: - case MGN_MCS5: - case MGN_48M: - ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa630); - break; - case MGN_VHT2SS_MCS5: - case MGN_VHT2SS_MCS4: - case MGN_VHT1SS_MCS4: - case MGN_VHT1SS_MCS3: - case MGN_MCS12: - case MGN_MCS4: - case MGN_MCS3: - case MGN_36M: - case MGN_24M: - ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa730); - break; - case MGN_VHT2SS_MCS3: - case MGN_VHT2SS_MCS2: - case MGN_VHT2SS_MCS1: - case MGN_VHT1SS_MCS2: - case MGN_VHT1SS_MCS1: - case MGN_MCS11: - case MGN_MCS10: - case MGN_MCS9: - case MGN_MCS2: - case MGN_MCS1: - case MGN_18M: - case MGN_12M: - ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa830); - break; - case MGN_VHT2SS_MCS0: - case MGN_VHT1SS_MCS0: - case MGN_MCS0: - case MGN_MCS8: - case MGN_9M: - case MGN_6M: - ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa87f); - break; - default: - ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); - break; - } - } - } - } - else - { - ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); - } - } - else - ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EDCA Turbo on: EDCA_BE:0x%lx\n",EDCA_BE)); - - pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = TRUE; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EDCA_BE_DL : 0x%lx EDCA_BE_UL : 0x%lx EDCA_BE : 0x%lx \n",EDCA_BE_DL,EDCA_BE_UL,EDCA_BE)); - - } - else - { - // Turn Off EDCA turbo here. - // Restore original EDCA according to the declaration of AP. - if(pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) - { - Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_AC_PARAM, GET_WMM_PARAM_ELE_SINGLE_AC_PARAM(pStaQos->WMMParamEle, AC0_BE) ); - - pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Restore EDCA BE: 0x%lx \n",pDM_Odm->WMMEDCA_BE)); - - } - } - -////=============================== -////Set variables for next time. -////=============================== -dm_CheckEdcaTurbo_EXIT: -#if (DM_ODM_SUPPORT_TYPE==ODM_WIN) - pHalData->bIsAnyNonBEPkts = FALSE; - pMgntInfo->lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; - pMgntInfo->lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; - pMgntInfo->Ext_lastTxOkCnt = pExtAdapter->TxStats.NumTxBytesUnicast; - pMgntInfo->Ext_lastRxOkCnt = pExtAdapter->RxStats.NumRxBytesUnicast; -#elif (DM_ODM_SUPPORT_TYPE==ODM_CE) - precvpriv->bIsAnyNonBEPkts = FALSE; - pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes; - precvpriv->last_rx_bytes = precvpriv->rx_bytes; -#endif - -} - - -//check if edca turbo is disabled -BOOLEAN -odm_IsEdcaTurboDisable( - IN PDM_ODM_T pDM_Odm -) -{ - PADAPTER Adapter = pDM_Odm->Adapter; - -#if(DM_ODM_SUPPORT_TYPE==ODM_WIN) - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - u4Byte IOTPeer=pMgntInfo->IOTPeer; -#elif (DM_ODM_SUPPORT_TYPE==ODM_CE) - struct registry_priv *pregpriv = &Adapter->registrypriv; - struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - u4Byte IOTPeer=pmlmeinfo->assoc_AP_vendor; - u1Byte WirelessMode=0xFF; //invalid value - - if(pDM_Odm->pWirelessMode!=NULL) - WirelessMode=*(pDM_Odm->pWirelessMode); - -#endif - - if(pDM_Odm->bBtDisableEdcaTurbo) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("EdcaTurboDisable for BT!!\n")); - return TRUE; - } - - if((!(pDM_Odm->SupportAbility& ODM_MAC_EDCA_TURBO ))|| - (pDM_Odm->bWIFITest)|| - (IOTPeer>= HT_IOT_PEER_MAX)) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("EdcaTurboDisable\n")); - return TRUE; - } - - -#if (DM_ODM_SUPPORT_TYPE ==ODM_WIN) - // 1. We do not turn on EDCA turbo mode for some AP that has IOT issue - // 2. User may disable EDCA Turbo mode with OID settings. - if(pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_EDCA_TURBO){ - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("IOTAction:EdcaTurboDisable\n")); - return TRUE; - } - -#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) - //suggested by Jr.Luke: open TXOP for B/G/BG/A mode 2012-0215 - if((WirelessMode==ODM_WM_B)||(WirelessMode==(ODM_WM_B|ODM_WM_G)||(WirelessMode==ODM_WM_G)||(WirelessMode=ODM_WM_A)) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, ODM_Read4Byte(pDM_Odm, ODM_EDCA_BE_PARAM)|0x5E0000); - - if(pDM_Odm->SupportICType==ODM_RTL8192D) { - if ((pregpriv->wifi_spec == 1) || (pmlmeext->cur_wireless_mode == WIRELESS_11B)) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("92D:EdcaTurboDisable\n")); - return TRUE; - } - } - else - { - if((pregpriv->wifi_spec == 1) || (pmlmeinfo->HT_enable == 0)){ - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("Others:EdcaTurboDisable\n")); - return TRUE; - } - } - -#endif - - return FALSE; - - -} - -//add iot case here: for MP/CE -VOID -ODM_EdcaParaSelByIot( - IN PDM_ODM_T pDM_Odm, - OUT u4Byte *EDCA_BE_UL, - OUT u4Byte *EDCA_BE_DL - ) -{ - - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u4Byte IOTPeer=0; - u4Byte ICType=pDM_Odm->SupportICType; - u1Byte WirelessMode=0xFF; //invalid value - u4Byte RFType=pDM_Odm->RFType; - u4Byte IOTPeerSubType=0; - -#if(DM_ODM_SUPPORT_TYPE==ODM_WIN) - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - u1Byte TwoPortStatus = (u1Byte)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE; - -#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - #ifdef CONFIG_BT_COEXIST - struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); - #endif - u1Byte bbtchange =FALSE; -#endif - - if(pDM_Odm->pWirelessMode!=NULL) - WirelessMode=*(pDM_Odm->pWirelessMode); - -/////////////////////////////////////////////////////////// -////list paramter for different platform -#if (DM_ODM_SUPPORT_TYPE==ODM_WIN) - IOTPeer=pMgntInfo->IOTPeer; - IOTPeerSubType=pMgntInfo->IOTPeerSubtype; - GetTwoPortSharedResource(Adapter,TWO_PORT_SHARED_OBJECT__STATUS,NULL,&TwoPortStatus); - -#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) - IOTPeer=pmlmeinfo->assoc_AP_vendor; - #ifdef CONFIG_BT_COEXIST - if(pbtpriv->BT_Coexist) - { - if( (pbtpriv->BT_EDCA[UP_LINK]!=0) || (pbtpriv->BT_EDCA[DOWN_LINK]!=0)) - bbtchange = TRUE; - } - #endif - -#endif - - if(ICType==ODM_RTL8192D) - { - // Single PHY - if(pDM_Odm->RFType==ODM_2T2R) - { - (*EDCA_BE_UL) = 0x60a42b; //0x5ea42b; - (*EDCA_BE_DL) = 0x60a42b; //0x5ea42b; - - } - else - { - (*EDCA_BE_UL) = 0x6ea42b; - (*EDCA_BE_DL) = 0x6ea42b; - } - - } -////============================ -/// IOT case for MP -////============================ -#if (DM_ODM_SUPPORT_TYPE==ODM_WIN) - else - { - - if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE){ - if((ICType==ODM_RTL8192C)&&(pDM_Odm->RFType==ODM_2T2R)) { - (*EDCA_BE_UL) = 0x60a42b; - (*EDCA_BE_DL) = 0x60a42b; - } - else - { - (*EDCA_BE_UL) = 0x6ea42b; - (*EDCA_BE_DL) = 0x6ea42b; - } - } - } - - if(TwoPortStatus == TWO_PORT_STATUS__EXTENSION_ONLY) - { - (*EDCA_BE_UL) = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[ExtAdapter->MgntInfo.IOTPeer]; - (*EDCA_BE_DL) = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[ExtAdapter->MgntInfo.IOTPeer]; - } - - #if (INTEL_PROXIMITY_SUPPORT == 1) - if(pMgntInfo->IntelClassModeInfo.bEnableCA == TRUE) - { - (*EDCA_BE_UL) = (*EDCA_BE_DL) = 0xa44f; - } - else - #endif - { - if((!pMgntInfo->bDisableFrameBursting) && - (pMgntInfo->IOTAction & (HT_IOT_ACT_FORCED_ENABLE_BE_TXOP|HT_IOT_ACT_AMSDU_ENABLE))) - {// To check whether we shall force turn on TXOP configuration. - if(!((*EDCA_BE_UL) & 0xffff0000)) - (*EDCA_BE_UL) |= 0x005e0000; // Force TxOP limit to 0x005e for UL. - if(!((*EDCA_BE_DL) & 0xffff0000)) - (*EDCA_BE_DL) |= 0x005e0000; // Force TxOP limit to 0x005e for DL. - } - - //92D txop can't be set to 0x3e for cisco1250 - if((ICType!=ODM_RTL8192D) && (IOTPeer== HT_IOT_PEER_CISCO) &&(WirelessMode==ODM_WM_N24G)) - { - (*EDCA_BE_DL) = edca_setting_DL[IOTPeer]; - (*EDCA_BE_UL) = edca_setting_UL[IOTPeer]; - } - //merge from 92s_92c_merge temp brunch v2445 20120215 - else if((IOTPeer == HT_IOT_PEER_CISCO) &&((WirelessMode==ODM_WM_G)||(WirelessMode==(ODM_WM_B|ODM_WM_G))||(WirelessMode==ODM_WM_A)||(WirelessMode==ODM_WM_B))) - { - (*EDCA_BE_DL) = edca_setting_DL_GMode[IOTPeer]; - } - else if((IOTPeer== HT_IOT_PEER_AIRGO )&& ((WirelessMode==ODM_WM_G)||(WirelessMode==ODM_WM_A))) - { - (*EDCA_BE_DL) = 0xa630; - } - - else if(IOTPeer == HT_IOT_PEER_MARVELL) - { - (*EDCA_BE_DL) = edca_setting_DL[IOTPeer]; - (*EDCA_BE_UL) = edca_setting_UL[IOTPeer]; - } - else if(IOTPeer == HT_IOT_PEER_ATHEROS) - { - // Set DL EDCA for Atheros peer to 0x3ea42b. Suggested by SD3 Wilson for ASUS TP issue. - (*EDCA_BE_DL) = edca_setting_DL[IOTPeer]; - - if(ICType == ODM_RTL8821) - (*EDCA_BE_DL) = 0x5ea630; - - } - } - - if((ICType == ODM_RTL8192D)&&(IOTPeerSubType == HT_IOT_PEER_LINKSYS_E4200_V1)&&((WirelessMode==ODM_WM_N5G))) - { - (*EDCA_BE_DL) = 0x432b; - (*EDCA_BE_UL) = 0x432b; - } - - - - if((ICType==ODM_RTL8812)||(ICType==ODM_RTL8192E)) //add 8812AU/8812AE - { - (*EDCA_BE_UL) = 0x5ea42b; - (*EDCA_BE_DL) = 0x5ea42b; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("8812A: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx",(*EDCA_BE_UL),(*EDCA_BE_DL))); - } - - // Revised for Atheros DIR-655 IOT issue to improve down link TP, added by Roger, 2013.03.22. - if((ICType == ODM_RTL8723A) && (IOTPeerSubType== HT_IOT_PEER_ATHEROS_DIR655) && - (pMgntInfo->dot11CurrentChannelNumber == 6)) - { - (*EDCA_BE_DL) = 0xa92b; - } - -////============================ -/// IOT case for CE -////============================ -#elif (DM_ODM_SUPPORT_TYPE==ODM_CE) - - if(RFType==ODM_RTL8192D) - { - if((IOTPeer == HT_IOT_PEER_CISCO) &&(WirelessMode==ODM_WM_N24G)) - { - (*EDCA_BE_UL) = EDCAParam[IOTPeer][UP_LINK]; - (*EDCA_BE_DL)=EDCAParam[IOTPeer][DOWN_LINK]; - } - else if((IOTPeer == HT_IOT_PEER_AIRGO) && - ((WirelessMode==ODM_WM_B)||(WirelessMode==(ODM_WM_B|ODM_WM_G)))) - (*EDCA_BE_DL)=0x00a630; - - else if((IOTPeer== HT_IOT_PEER_ATHEROS) && - (WirelessMode&ODM_WM_N5G) && - (Adapter->securitypriv.dot11PrivacyAlgrthm == _AES_ )) - (*EDCA_BE_DL)=0xa42b; - - } - //92C IOT case: - else - { - #ifdef CONFIG_BT_COEXIST - if(bbtchange) - { - (*EDCA_BE_UL) = pbtpriv->BT_EDCA[UP_LINK]; - (*EDCA_BE_DL) = pbtpriv->BT_EDCA[DOWN_LINK]; - } - else - #endif - { - if((IOTPeer == HT_IOT_PEER_CISCO) &&(WirelessMode==ODM_WM_N24G)) - { - (*EDCA_BE_UL) = EDCAParam[IOTPeer][UP_LINK]; - (*EDCA_BE_DL)=EDCAParam[IOTPeer][DOWN_LINK]; - } - else - { - (*EDCA_BE_UL)=EDCAParam[HT_IOT_PEER_UNKNOWN][UP_LINK]; - (*EDCA_BE_DL)=EDCAParam[HT_IOT_PEER_UNKNOWN][DOWN_LINK]; - } - } - if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE){ - if((ICType==ODM_RTL8192C)&&(pDM_Odm->RFType==ODM_2T2R)) - { - (*EDCA_BE_UL) = 0x60a42b; - (*EDCA_BE_DL) = 0x60a42b; - } - else - { - (*EDCA_BE_UL) = 0x6ea42b; - (*EDCA_BE_DL) = 0x6ea42b; - } - } - - } -#endif - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Special: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx",(*EDCA_BE_UL),(*EDCA_BE_DL))); - -} - - -VOID -odm_EdcaChooseTrafficIdx( - IN PDM_ODM_T pDM_Odm, - IN u8Byte cur_tx_bytes, - IN u8Byte cur_rx_bytes, - IN BOOLEAN bBiasOnRx, - OUT BOOLEAN *pbIsCurRDLState - ) -{ - - - if(bBiasOnRx) - { - - if(cur_tx_bytes>(cur_rx_bytes*4)) - { - *pbIsCurRDLState=FALSE; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Uplink Traffic\n ")); - - } - else - { - *pbIsCurRDLState=TRUE; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Balance Traffic\n")); - - } - } - else - { - if(cur_rx_bytes>(cur_tx_bytes*4)) - { - *pbIsCurRDLState=TRUE; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Downlink Traffic\n")); - - } - else - { - *pbIsCurRDLState=FALSE; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Balance Traffic\n")); - } - } - - return ; -} - -#endif - -#if((DM_ODM_SUPPORT_TYPE==ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL)) - -void odm_EdcaParaInit( - IN PDM_ODM_T pDM_Odm - ) -{ - prtl8192cd_priv priv = pDM_Odm->priv; - int mode=priv->pmib->dot11BssType.net_work_type; - - static unsigned int slot_time, VO_TXOP, VI_TXOP, sifs_time; - struct ParaRecord EDCA[4]; - - memset(EDCA, 0, 4*sizeof(struct ParaRecord)); - - sifs_time = 10; - slot_time = 20; - - if (mode & (ODM_WM_N24G|ODM_WM_N5G)) - sifs_time = 16; - - if (mode & (ODM_WM_N24G|ODM_WM_N5G| ODM_WM_G|ODM_WM_A)) - slot_time = 9; - - -#if((defined(RTL_MANUAL_EDCA))&&(DM_ODM_SUPPORT_TYPE==ODM_AP)) - if( priv->pmib->dot11QosEntry.ManualEDCA ) { - if( OPMODE & WIFI_AP_STATE ) - memcpy(EDCA, priv->pmib->dot11QosEntry.AP_manualEDCA, 4*sizeof(struct ParaRecord)); - else - memcpy(EDCA, priv->pmib->dot11QosEntry.STA_manualEDCA, 4*sizeof(struct ParaRecord)); - - #ifdef WIFI_WMM - if (QOS_ENABLE) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[VI].TXOPlimit<< 16) | (EDCA[VI].ECWmax<< 12) | (EDCA[VI].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time)); - else - #endif - ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[BE].TXOPlimit<< 16) | (EDCA[BE].ECWmax<< 12) | (EDCA[BE].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time)); - - }else - #endif //RTL_MANUAL_EDCA - { - - if(OPMODE & WIFI_AP_STATE) - { - memcpy(EDCA, rtl_ap_EDCA, 2*sizeof(struct ParaRecord)); - - if(mode & (ODM_WM_A|ODM_WM_G|ODM_WM_N24G|ODM_WM_N5G)) - memcpy(&EDCA[VI], &rtl_ap_EDCA[VI_AG], 2*sizeof(struct ParaRecord)); - else - memcpy(&EDCA[VI], &rtl_ap_EDCA[VI], 2*sizeof(struct ParaRecord)); - } - else - { - memcpy(EDCA, rtl_sta_EDCA, 2*sizeof(struct ParaRecord)); - - if(mode & (ODM_WM_A|ODM_WM_G|ODM_WM_N24G|ODM_WM_N5G)) - memcpy(&EDCA[VI], &rtl_sta_EDCA[VI_AG], 2*sizeof(struct ParaRecord)); - else - memcpy(&EDCA[VI], &rtl_sta_EDCA[VI], 2*sizeof(struct ParaRecord)); - } - - #ifdef WIFI_WMM - if (QOS_ENABLE) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[VI].TXOPlimit<< 16) | (EDCA[VI].ECWmax<< 12) | (EDCA[VI].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time)); - else - #endif - -#if (DM_ODM_SUPPORT_TYPE==ODM_AP) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[BK].ECWmax<< 12) | (EDCA[BK].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time)); -#elif(DM_ODM_SUPPORT_TYPE==ODM_ADSL) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[BK].ECWmax<< 12) | (EDCA[BK].ECWmin<< 8) | (sifs_time + 2* slot_time)); -#endif - - - } - - ODM_Write4Byte(pDM_Odm, ODM_EDCA_VO_PARAM, (EDCA[VO].TXOPlimit<< 16) | (EDCA[VO].ECWmax<< 12) | (EDCA[VO].ECWmin<< 8) | (sifs_time + EDCA[VO].AIFSN* slot_time)); - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (EDCA[BE].TXOPlimit<< 16) | (EDCA[BE].ECWmax<< 12) | (EDCA[BE].ECWmin<< 8) | (sifs_time + EDCA[BE].AIFSN* slot_time)); - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BK_PARAM, (EDCA[BK].TXOPlimit<< 16) | (EDCA[BK].ECWmax<< 12) | (EDCA[BK].ECWmin<< 8) | (sifs_time + EDCA[BK].AIFSN* slot_time)); -// ODM_Write1Byte(pDM_Odm,ACMHWCTRL, 0x00); - - priv->pshare->iot_mode_enable = 0; -#if(DM_ODM_SUPPORT_TYPE==ODM_AP) - if (priv->pshare->rf_ft_var.wifi_beq_iot) - priv->pshare->iot_mode_VI_exist = 0; - - #ifdef WMM_VIBE_PRI - priv->pshare->iot_mode_BE_exist = 0; - #endif - - #ifdef LOW_TP_TXOP - priv->pshare->BE_cwmax_enhance = 0; - #endif - -#elif (DM_ODM_SUPPORT_TYPE==ODM_ADSL) - priv->pshare->iot_mode_BE_exist = 0; -#endif - priv->pshare->iot_mode_VO_exist = 0; -} - -BOOLEAN -ODM_ChooseIotMainSTA( - IN PDM_ODM_T pDM_Odm, - IN PSTA_INFO_T pstat - ) -{ - prtl8192cd_priv priv = pDM_Odm->priv; - BOOLEAN bhighTP_found_pstat=FALSE; - - if ((GET_ROOT(priv)->up_time % 2) == 0) { - unsigned int tx_2s_avg = 0; - unsigned int rx_2s_avg = 0; - int i=0, aggReady=0; - unsigned long total_sum = (priv->pshare->current_tx_bytes+priv->pshare->current_rx_bytes); - - pstat->current_tx_bytes += pstat->tx_byte_cnt; - pstat->current_rx_bytes += pstat->rx_byte_cnt; - - if (total_sum != 0) { - if (total_sum <= 100) { - tx_2s_avg = (unsigned int)((pstat->current_tx_bytes*100) / total_sum); - rx_2s_avg = (unsigned int)((pstat->current_rx_bytes*100) / total_sum); - } else { - tx_2s_avg = (unsigned int)(pstat->current_tx_bytes / (total_sum / 100)); - rx_2s_avg = (unsigned int)(pstat->current_rx_bytes / (total_sum / 100)); - } - - } - -#if(DM_ODM_SUPPORT_TYPE==ODM_ADSL) - if (pstat->ht_cap_len) { - if ((tx_2s_avg + rx_2s_avg) >=25 /*50*/) { - - priv->pshare->highTP_found_pstat = pstat; - bhighTP_found_pstat=TRUE; - } - } -#elif(DM_ODM_SUPPORT_TYPE==ODM_AP) - for(i=0; i<8; i++) - aggReady += (pstat->ADDBA_ready[i]); - if (pstat->ht_cap_len && aggReady) - { - if ((tx_2s_avg + rx_2s_avg >= 25)) { - priv->pshare->highTP_found_pstat = pstat; - } - - #ifdef CLIENT_MODE - if (OPMODE & WIFI_STATION_STATE) { -#if (DM_ODM_SUPPORT_TYPE &ODM_AP) && defined(USE_OUT_SRC) - if ((pstat->IOTPeer==HT_IOT_PEER_RALINK) && ((tx_2s_avg + rx_2s_avg) >= 45)) -#else - if(pstat->is_ralink_sta && ((tx_2s_avg + rx_2s_avg) >= 45)) -#endif - priv->pshare->highTP_found_pstat = pstat; - } - #endif - } -#endif - } else { - pstat->current_tx_bytes = pstat->tx_byte_cnt; - pstat->current_rx_bytes = pstat->rx_byte_cnt; - } - - return bhighTP_found_pstat; -} - - -#ifdef WIFI_WMM -VOID -ODM_IotEdcaSwitch( - IN PDM_ODM_T pDM_Odm, - IN unsigned char enable - ) -{ - prtl8192cd_priv priv = pDM_Odm->priv; - int mode=priv->pmib->dot11BssType.net_work_type; - unsigned int slot_time = 20, sifs_time = 10, BE_TXOP = 47, VI_TXOP = 94; - unsigned int vi_cw_max = 4, vi_cw_min = 3, vi_aifs; - -#if (DM_ODM_SUPPORT_TYPE==ODM_AP) - if (!(!priv->pmib->dot11OperationEntry.wifi_specific || - ((OPMODE & WIFI_AP_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2)) - #ifdef CLIENT_MODE - || ((OPMODE & WIFI_STATION_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2)) - #endif - )) - return; -#endif - - if ((mode & (ODM_WM_N24G|ODM_WM_N5G)) && (priv->pshare->ht_sta_num - #ifdef WDS - || ((OPMODE & WIFI_AP_STATE) && priv->pmib->dot11WdsInfo.wdsEnabled && priv->pmib->dot11WdsInfo.wdsNum) - #endif - )) - sifs_time = 16; - - if (mode & (ODM_WM_N24G|ODM_WM_N5G|ODM_WM_G|ODM_WM_A)) { - slot_time = 9; - } - else - { - BE_TXOP = 94; - VI_TXOP = 188; - } - -#if (DM_ODM_SUPPORT_TYPE==ODM_ADSL) - if (priv->pshare->iot_mode_VO_exist) { - // to separate AC_VI and AC_BE to avoid using the same EDCA settings - if (priv->pshare->iot_mode_BE_exist) { - vi_cw_max = 5; - vi_cw_min = 3; - } else { - vi_cw_max = 6; - vi_cw_min = 4; - } - } - vi_aifs = (sifs_time + ((OPMODE & WIFI_AP_STATE)?1:2) * slot_time); - - ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, ((VI_TXOP*(1-priv->pshare->iot_mode_VO_exist)) << 16)| (vi_cw_max << 12) | (vi_cw_min << 8) | vi_aifs); - - -#elif (DM_ODM_SUPPORT_TYPE==ODM_AP) - if ((OPMODE & WIFI_AP_STATE) && priv->pmib->dot11OperationEntry.wifi_specific) { - if (priv->pshare->iot_mode_VO_exist) { - #ifdef WMM_VIBE_PRI - if (priv->pshare->iot_mode_BE_exist) - { - vi_cw_max = 5; - vi_cw_min = 3; - vi_aifs = (sifs_time + ((OPMODE & WIFI_AP_STATE)?1:2) * slot_time); - } - else - #endif - { - vi_cw_max = 6; - vi_cw_min = 4; - vi_aifs = 0x2b; - } - } - else { - vi_aifs = (sifs_time + ((OPMODE & WIFI_AP_STATE)?1:2) * slot_time); - } - - ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, ((VI_TXOP*(1-priv->pshare->iot_mode_VO_exist)) << 16) - | (vi_cw_max << 12) | (vi_cw_min << 8) | vi_aifs); - } -#endif - - - -#if (DM_ODM_SUPPORT_TYPE==ODM_AP) - if (priv->pshare->rf_ft_var.wifi_beq_iot && priv->pshare->iot_mode_VI_exist) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (10 << 12) | (4 << 8) | 0x4f); - else if(!enable) -#elif(DM_ODM_SUPPORT_TYPE==ODM_ADSL) - if(!enable) //if iot is disable ,maintain original BEQ PARAM -#endif - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (((OPMODE & WIFI_AP_STATE)?6:10) << 12) | (4 << 8) - | (sifs_time + 3 * slot_time)); - else - { - int txop_enlarge; - int txop; - unsigned int cw_max; - unsigned int txop_close; - - #if((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined LOW_TP_TXOP)) - cw_max = ((priv->pshare->BE_cwmax_enhance) ? 10 : 6); - txop_close = ((priv->pshare->rf_ft_var.low_tp_txop && priv->pshare->rf_ft_var.low_tp_txop_close) ? 1 : 0); - - if(priv->pshare->txop_enlarge == 0xe) //if intel case - txop = (txop_close ? 0 : (BE_TXOP*2)); - else //if other case - txop = (txop_close ? 0: (BE_TXOP*priv->pshare->txop_enlarge)); - #else - cw_max=6; - if((priv->pshare->txop_enlarge==0xe)||(priv->pshare->txop_enlarge==0xd)) - txop=BE_TXOP*2; - else - txop=BE_TXOP*priv->pshare->txop_enlarge; - - #endif - - if (priv->pshare->ht_sta_num - #ifdef WDS - || ((OPMODE & WIFI_AP_STATE) && (mode & (ODM_WM_N24G|ODM_WM_N5G)) && - priv->pmib->dot11WdsInfo.wdsEnabled && priv->pmib->dot11WdsInfo.wdsNum) - #endif - ) - { - - if (priv->pshare->txop_enlarge == 0xe) { - // is intel client, use a different edca value - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop<< 16) | (cw_max<< 12) | (4 << 8) | 0x1f); - priv->pshare->txop_enlarge = 2; - } -#if(DM_ODM_SUPPORT_TYPE==ODM_AP) - #ifndef LOW_TP_TXOP - else if (priv->pshare->txop_enlarge == 0xd) { - // is intel ralink, use a different edca value - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | (4 << 12) | (3 << 8) | 0x19); - priv->pshare->txop_enlarge = 2; - } - #endif -#endif - else - { - if (pDM_Odm->RFType==ODM_2T2R) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | - (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time)); - else - #if(DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined LOW_TP_TXOP) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | - (((priv->pshare->BE_cwmax_enhance) ? 10 : 5) << 12) | (3 << 8) | (sifs_time + 2 * slot_time)); - #else - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | - (5 << 12) | (3 << 8) | (sifs_time + 2 * slot_time)); - - #endif - } - } - else - { - #if((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined LOW_TP_TXOP)) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (BE_TXOP << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time)); - #else - #if defined(CONFIG_RTL_8196D) || defined(CONFIG_RTL_8196E) || (defined(CONFIG_RTL_8197D) && !defined(CONFIG_PORT0_EXT_GIGA)) - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (BE_TXOP*2 << 16) | (cw_max << 12) | (5 << 8) | (sifs_time + 3 * slot_time)); - #else - ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (BE_TXOP*2 << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time)); - #endif - - #endif - } - - } -} -#endif - -VOID -odm_IotEngine( - IN PDM_ODM_T pDM_Odm - ) -{ - - struct rtl8192cd_priv *priv=pDM_Odm->priv; - PSTA_INFO_T pstat = NULL; - u4Byte i; - -#ifdef WIFI_WMM - unsigned int switch_turbo = 0; -#endif -//////////////////////////////////////////////////////// -// if EDCA Turbo function is not supported or Manual EDCA Setting -// then return -//////////////////////////////////////////////////////// - if(!(pDM_Odm->SupportAbility&ODM_MAC_EDCA_TURBO)){ - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("ODM_MAC_EDCA_TURBO NOT SUPPORTED\n")); - return; - } - -#if((DM_ODM_SUPPORT_TYPE==ODM_AP)&& defined(RTL_MANUAL_EDCA) && defined(WIFI_WMM)) - if(priv->pmib->dot11QosEntry.ManualEDCA){ - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("ODM_MAC_EDCA_TURBO OFF: MANUAL SETTING\n")); - return ; - } -#endif - -#if !(DM_ODM_SUPPORT_TYPE &ODM_AP) - ////////////////////////////////////////////////////// - //find high TP STA every 2s -////////////////////////////////////////////////////// - if ((GET_ROOT(priv)->up_time % 2) == 0) - priv->pshare->highTP_found_pstat==NULL; - -#if 0 - phead = &priv->asoc_list; - plist = phead->next; - while(plist != phead) { - pstat = list_entry(plist, struct stat_info, asoc_list); - - if(ODM_ChooseIotMainSTA(pDM_Odm, pstat)); //find the correct station - break; - if (plist == plist->next) //the last plist - break; - plist = plist->next; - }; -#endif - - //find highTP STA - for(i=0; ipODM_StaInfo[i]; - if(IS_STA_VALID(pstat) && (ODM_ChooseIotMainSTA(pDM_Odm, pstat))) //find the correct station - break; - } - - ////////////////////////////////////////////////////// - //if highTP STA is not found, then return - ////////////////////////////////////////////////////// - if(priv->pshare->highTP_found_pstat==NULL) { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("ODM_MAC_EDCA_TURBO OFF: NO HT STA FOUND\n")); - return; - } -#endif - - pstat=priv->pshare->highTP_found_pstat; - - -#ifdef WIFI_WMM - if (QOS_ENABLE) { - if (!priv->pmib->dot11OperationEntry.wifi_specific - #if(DM_ODM_SUPPORT_TYPE==ODM_AP) - ||((OPMODE & WIFI_AP_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2)) - #elif(DM_ODM_SUPPORT_TYPE==ODM_ADSL) - || (priv->pmib->dot11OperationEntry.wifi_specific == 2) - #endif - ) { - if (priv->pshare->iot_mode_enable && - ((priv->pshare->phw->VO_pkt_count > 50) || - (priv->pshare->phw->VI_pkt_count > 50) || - (priv->pshare->phw->BK_pkt_count > 50))) { - priv->pshare->iot_mode_enable = 0; - switch_turbo++; - } else if ((!priv->pshare->iot_mode_enable) && - ((priv->pshare->phw->VO_pkt_count < 50) && - (priv->pshare->phw->VI_pkt_count < 50) && - (priv->pshare->phw->BK_pkt_count < 50))) { - priv->pshare->iot_mode_enable++; - switch_turbo++; - } - } - - - #if(DM_ODM_SUPPORT_TYPE==ODM_AP) - if ((OPMODE & WIFI_AP_STATE) && priv->pmib->dot11OperationEntry.wifi_specific) - #elif (DM_ODM_SUPPORT_TYPE==ODM_ADSL) - if (priv->pmib->dot11OperationEntry.wifi_specific) - #endif - { - if (!priv->pshare->iot_mode_VO_exist && (priv->pshare->phw->VO_pkt_count > 50)) { - priv->pshare->iot_mode_VO_exist++; - switch_turbo++; - } else if (priv->pshare->iot_mode_VO_exist && (priv->pshare->phw->VO_pkt_count < 50)) { - priv->pshare->iot_mode_VO_exist = 0; - switch_turbo++; - } -#if((DM_ODM_SUPPORT_TYPE==ODM_ADSL)||((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined WMM_VIBE_PRI))) - if (priv->pshare->iot_mode_VO_exist) { - //printk("[%s %d] BE_pkt_count=%d\n", __FUNCTION__, __LINE__, priv->pshare->phw->BE_pkt_count); - if (!priv->pshare->iot_mode_BE_exist && (priv->pshare->phw->BE_pkt_count > 250)) { - priv->pshare->iot_mode_BE_exist++; - switch_turbo++; - } else if (priv->pshare->iot_mode_BE_exist && (priv->pshare->phw->BE_pkt_count < 250)) { - priv->pshare->iot_mode_BE_exist = 0; - switch_turbo++; - } - } -#endif - -#if (DM_ODM_SUPPORT_TYPE==ODM_AP) - if (priv->pshare->rf_ft_var.wifi_beq_iot) - { - if (!priv->pshare->iot_mode_VI_exist && (priv->pshare->phw->VI_rx_pkt_count > 50)) { - priv->pshare->iot_mode_VI_exist++; - switch_turbo++; - } else if (priv->pshare->iot_mode_VI_exist && (priv->pshare->phw->VI_rx_pkt_count < 50)) { - priv->pshare->iot_mode_VI_exist = 0; - switch_turbo++; - } - } -#endif - - } - else if (!pstat || pstat->rssi < priv->pshare->rf_ft_var.txop_enlarge_lower) { - if (priv->pshare->txop_enlarge) { - priv->pshare->txop_enlarge = 0; - if (priv->pshare->iot_mode_enable) - switch_turbo++; - } - } - -#if(defined(CLIENT_MODE) && (DM_ODM_SUPPORT_TYPE==ODM_AP)) - if ((OPMODE & WIFI_STATION_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2)) - { - if (priv->pshare->iot_mode_enable && - (((priv->pshare->phw->VO_pkt_count > 50) || - (priv->pshare->phw->VI_pkt_count > 50) || - (priv->pshare->phw->BK_pkt_count > 50)) || - (pstat && (!pstat->ADDBA_ready[0]) & (!pstat->ADDBA_ready[3])))) - { - priv->pshare->iot_mode_enable = 0; - switch_turbo++; - } - else if ((!priv->pshare->iot_mode_enable) && - (((priv->pshare->phw->VO_pkt_count < 50) && - (priv->pshare->phw->VI_pkt_count < 50) && - (priv->pshare->phw->BK_pkt_count < 50)) && - (pstat && (pstat->ADDBA_ready[0] | pstat->ADDBA_ready[3])))) - { - priv->pshare->iot_mode_enable++; - switch_turbo++; - } - } -#endif - - priv->pshare->phw->VO_pkt_count = 0; - priv->pshare->phw->VI_pkt_count = 0; - priv->pshare->phw->BK_pkt_count = 0; - - #if((DM_ODM_SUPPORT_TYPE==ODM_ADSL)||((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined WMM_VIBE_PRI))) - priv->pshare->phw->BE_pkt_count = 0; - #endif - - #if(DM_ODM_SUPPORT_TYPE==ODM_AP) - if (priv->pshare->rf_ft_var.wifi_beq_iot) - priv->pshare->phw->VI_rx_pkt_count = 0; - #endif - - } -#endif - - if ((priv->up_time % 2) == 0) { - /* - * decide EDCA content for different chip vendor - */ -#ifdef WIFI_WMM - #if(DM_ODM_SUPPORT_TYPE==ODM_ADSL) - if (QOS_ENABLE && (!priv->pmib->dot11OperationEntry.wifi_specific || (priv->pmib->dot11OperationEntry.wifi_specific == 2) - - #elif(DM_ODM_SUPPORT_TYPE==ODM_AP) - if (QOS_ENABLE && (!priv->pmib->dot11OperationEntry.wifi_specific || - ((OPMODE & WIFI_AP_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2)) - #ifdef CLIENT_MODE - || ((OPMODE & WIFI_STATION_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2)) - #endif - #endif - )) - - { - - if (pstat && pstat->rssi >= priv->pshare->rf_ft_var.txop_enlarge_upper) { -#ifdef LOW_TP_TXOP -#if (DM_ODM_SUPPORT_TYPE &ODM_AP) && defined(USE_OUT_SRC) - if (pstat->IOTPeer==HT_IOT_PEER_INTEL) -#else - if (pstat->is_intel_sta) -#endif - { - if (priv->pshare->txop_enlarge != 0xe) - { - priv->pshare->txop_enlarge = 0xe; - - if (priv->pshare->iot_mode_enable) - switch_turbo++; - } - } - else if (priv->pshare->txop_enlarge != 2) - { - priv->pshare->txop_enlarge = 2; - if (priv->pshare->iot_mode_enable) - switch_turbo++; - } -#else - if (priv->pshare->txop_enlarge != 2) - { -#if (DM_ODM_SUPPORT_TYPE &ODM_AP) && defined(USE_OUT_SRC) - if (pstat->IOTPeer==HT_IOT_PEER_INTEL) -#else - if (pstat->is_intel_sta) -#endif - priv->pshare->txop_enlarge = 0xe; -#if (DM_ODM_SUPPORT_TYPE &ODM_AP) && defined(USE_OUT_SRC) - else if (pstat->IOTPeer==HT_IOT_PEER_RALINK) -#else - else if (pstat->is_ralink_sta) -#endif - priv->pshare->txop_enlarge = 0xd; - else - priv->pshare->txop_enlarge = 2; - - if (priv->pshare->iot_mode_enable) - switch_turbo++; - } -#endif -#if 0 - if (priv->pshare->txop_enlarge != 2) - { - #if(DM_ODM_SUPPORT_TYPE==ODM_AP) - if (pstat->IOTPeer==HT_IOT_PEER_INTEL) - #else - if (pstat->is_intel_sta) - #endif - priv->pshare->txop_enlarge = 0xe; - #if(DM_ODM_SUPPORT_TYPE==ODM_AP) - else if (pstat->IOTPeer==HT_IOT_PEER_RALINK) - priv->pshare->txop_enlarge = 0xd; - #endif - else - priv->pshare->txop_enlarge = 2; - if (priv->pshare->iot_mode_enable) - switch_turbo++; - } -#endif - } - else if (!pstat || pstat->rssi < priv->pshare->rf_ft_var.txop_enlarge_lower) - { - if (priv->pshare->txop_enlarge) { - priv->pshare->txop_enlarge = 0; - if (priv->pshare->iot_mode_enable) - switch_turbo++; - } - } - -#if((DM_ODM_SUPPORT_TYPE==ODM_AP)&&( defined LOW_TP_TXOP)) - // for Intel IOT, need to enlarge CW MAX from 6 to 10 - if (pstat && pstat->is_intel_sta && (((pstat->tx_avarage+pstat->rx_avarage)>>10) < - priv->pshare->rf_ft_var.cwmax_enhance_thd)) - { - if (!priv->pshare->BE_cwmax_enhance && priv->pshare->iot_mode_enable) - { - priv->pshare->BE_cwmax_enhance = 1; - switch_turbo++; - } - } else { - if (priv->pshare->BE_cwmax_enhance) { - priv->pshare->BE_cwmax_enhance = 0; - switch_turbo++; - } - } -#endif - } -#endif - priv->pshare->current_tx_bytes = 0; - priv->pshare->current_rx_bytes = 0; - } - -#if((DM_ODM_SUPPORT_TYPE==ODM_AP)&& defined( SW_TX_QUEUE)) - if ((priv->assoc_num > 1) && (AMPDU_ENABLE)) - { - if (priv->swq_txmac_chg >= priv->pshare->rf_ft_var.swq_en_highthd){ - if ((priv->swq_en == 0)){ - switch_turbo++; - if (priv->pshare->txop_enlarge == 0) - priv->pshare->txop_enlarge = 2; - priv->swq_en = 1; - } - else - { - if ((switch_turbo > 0) && (priv->pshare->txop_enlarge == 0) && (priv->pshare->iot_mode_enable != 0)) - { - priv->pshare->txop_enlarge = 2; - switch_turbo--; - } - } - } - else if(priv->swq_txmac_chg <= priv->pshare->rf_ft_var.swq_dis_lowthd){ - priv->swq_en = 0; - } - else if ((priv->swq_en == 1) && (switch_turbo > 0) && (priv->pshare->txop_enlarge == 0) && (priv->pshare->iot_mode_enable != 0)) { - priv->pshare->txop_enlarge = 2; - switch_turbo--; - } - } -#if ((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined CONFIG_RTL_819XD)) - else if( (priv->assoc_num == 1) && (AMPDU_ENABLE)) { - if (pstat) { - int en_thd = 14417920>>(priv->up_time % 2); - if ((priv->swq_en == 0) && (pstat->current_tx_bytes > en_thd) && (pstat->current_rx_bytes > en_thd) ) { //50Mbps - priv->swq_en = 1; - priv->swqen_keeptime = priv->up_time; - } - else if ((priv->swq_en == 1) && ((pstat->tx_avarage < 4587520) || (pstat->rx_avarage < 4587520))) { //35Mbps - priv->swq_en = 0; - priv->swqen_keeptime = 0; - } - } - else { - priv->swq_en = 0; - priv->swqen_keeptime = 0; - } - } -#endif -#endif - -#ifdef WIFI_WMM -#ifdef LOW_TP_TXOP - if ((!priv->pmib->dot11OperationEntry.wifi_specific || (priv->pmib->dot11OperationEntry.wifi_specific == 2)) - && QOS_ENABLE) { - if (switch_turbo || priv->pshare->rf_ft_var.low_tp_txop) { - unsigned int thd_tp; - unsigned char under_thd; - unsigned int curr_tp; - - if (priv->pmib->dot11BssType.net_work_type & (ODM_WM_N24G|ODM_WM_N5G| ODM_WM_G)) - { - // Determine the upper bound throughput threshold. - if (priv->pmib->dot11BssType.net_work_type & (ODM_WM_N24G|ODM_WM_N5G)) { - if (priv->assoc_num && priv->assoc_num != priv->pshare->ht_sta_num) - thd_tp = priv->pshare->rf_ft_var.low_tp_txop_thd_g; - else - thd_tp = priv->pshare->rf_ft_var.low_tp_txop_thd_n; - } - else - thd_tp = priv->pshare->rf_ft_var.low_tp_txop_thd_g; - - // Determine to close txop. - curr_tp = (unsigned int)(priv->ext_stats.tx_avarage>>17) + (unsigned int)(priv->ext_stats.rx_avarage>>17); - if (curr_tp <= thd_tp && curr_tp >= priv->pshare->rf_ft_var.low_tp_txop_thd_low) - under_thd = 1; - else - under_thd = 0; - } - else - { - under_thd = 0; - } - - if (switch_turbo) - { - priv->pshare->rf_ft_var.low_tp_txop_close = under_thd; - priv->pshare->rf_ft_var.low_tp_txop_count = 0; - } - else if (priv->pshare->iot_mode_enable && (priv->pshare->rf_ft_var.low_tp_txop_close != under_thd)) { - priv->pshare->rf_ft_var.low_tp_txop_count++; - if (priv->pshare->rf_ft_var.low_tp_txop_close) { - priv->pshare->rf_ft_var.low_tp_txop_count = priv->pshare->rf_ft_var.low_tp_txop_delay; - } - if (priv->pshare->rf_ft_var.low_tp_txop_count ==priv->pshare->rf_ft_var.low_tp_txop_delay) - - { - priv->pshare->rf_ft_var.low_tp_txop_count = 0; - priv->pshare->rf_ft_var.low_tp_txop_close = under_thd; - switch_turbo++; - } - } - else - { - priv->pshare->rf_ft_var.low_tp_txop_count = 0; - } - } - } -#endif - - if (switch_turbo) - ODM_IotEdcaSwitch( pDM_Odm, priv->pshare->iot_mode_enable ); -#endif -} -#endif - - -#if( DM_ODM_SUPPORT_TYPE == ODM_WIN) -// -// 2011/07/26 MH Add an API for testing IQK fail case. -// -BOOLEAN -ODM_CheckPowerStatus( - IN PADAPTER Adapter) -{ - - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - RT_RF_POWER_STATE rtState; - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - - // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. - if (pMgntInfo->init_adpt_in_progress == TRUE) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter")); - return TRUE; - } - - // - // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. - // - Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); - if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n", - Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState)); - return FALSE; - } - return TRUE; -} -#endif - -// need to ODM CE Platform -//move to here for ANT detection mechanism using - -#if ((DM_ODM_SUPPORT_TYPE == ODM_WIN)||(DM_ODM_SUPPORT_TYPE == ODM_CE)) -u4Byte -GetPSDData( - IN PDM_ODM_T pDM_Odm, - unsigned int point, - u1Byte initial_gain_psd) -{ - //unsigned int val, rfval; - //int psd_report; - u4Byte psd_report; - - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - //Debug Message - //val = PHY_QueryBBReg(Adapter,0x908, bMaskDWord); - //DbgPrint("Reg908 = 0x%x\n",val); - //val = PHY_QueryBBReg(Adapter,0xDF4, bMaskDWord); - //rfval = PHY_QueryRFReg(Adapter, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask); - //DbgPrint("RegDF4 = 0x%x, RFReg00 = 0x%x\n",val, rfval); - //DbgPrint("PHYTXON = %x, OFDMCCA_PP = %x, CCKCCA_PP = %x, RFReg00 = %x\n", - //(val&BIT25)>>25, (val&BIT14)>>14, (val&BIT15)>>15, rfval); - - //Set DCO frequency index, offset=(40MHz/SamplePts)*point - ODM_SetBBReg(pDM_Odm, 0x808, 0x3FF, point); - - //Start PSD calculation, Reg808[22]=0->1 - ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 1); - //Need to wait for HW PSD report - ODM_StallExecution(1000); - ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 0); - //Read PSD report, Reg8B4[15:0] - psd_report = ODM_GetBBReg(pDM_Odm,0x8B4, bMaskDWord) & 0x0000FFFF; - -#if 1//(DEV_BUS_TYPE == RT_PCI_INTERFACE) && ( (RT_PLATFORM == PLATFORM_LINUX) || (RT_PLATFORM == PLATFORM_MACOSX)) - psd_report = (u4Byte) (ConvertTo_dB(psd_report))+(u4Byte)(initial_gain_psd-0x1c); -#else - psd_report = (int) (20*log10((double)psd_report))+(int)(initial_gain_psd-0x1c); -#endif - - return psd_report; - -} - -u4Byte -ConvertTo_dB( - u4Byte Value) -{ - u1Byte i; - u1Byte j; - u4Byte dB; - - Value = Value & 0xFFFF; - - for (i=0;i<8;i++) - { - if (Value <= dB_Invert_Table[i][11]) - { - break; - } - } - - if (i >= 8) - { - return (96); // maximum 96 dB - } - - for (j=0;j<12;j++) - { - if (Value <= dB_Invert_Table[i][j]) - { - break; - } - } - - dB = i*12 + j + 1; - - return (dB); -} - -#endif - -// -// LukeLee: -// PSD function will be moved to FW in future IC, but now is only implemented in MP platform -// So PSD function will not be incorporated to common ODM -// -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - -#define AFH_PSD 1 //0:normal PSD scan, 1: only do 20 pts PSD -#define MODE_40M 0 //0:20M, 1:40M -#define PSD_TH2 3 -#define PSD_CHMIN 20 // Minimum channel number for BT AFH -#define SIR_STEP_SIZE 3 -#define Smooth_Size_1 5 -#define Smooth_TH_1 3 -#define Smooth_Size_2 10 -#define Smooth_TH_2 4 -#define Smooth_Size_3 20 -#define Smooth_TH_3 4 -#define Smooth_Step_Size 5 -#define Adaptive_SIR 1 -//#if(RTL8723_FPGA_VERIFICATION == 1) -//#define PSD_RESCAN 1 -//#else -//#define PSD_RESCAN 4 -//#endif -#define SCAN_INTERVAL 1500 //ms -#define SYN_Length 5 // for 92D - -#define LNA_Low_Gain_1 0x64 -#define LNA_Low_Gain_2 0x5A -#define LNA_Low_Gain_3 0x58 - -#define pw_th_10dB 0x0 -#define pw_th_16dB 0x3 - -#define FA_RXHP_TH1 5000 -#define FA_RXHP_TH2 1500 -#define FA_RXHP_TH3 800 -#define FA_RXHP_TH4 600 -#define FA_RXHP_TH5 500 - -#define Idle_Mode 0 -#define High_TP_Mode 1 -#define Low_TP_Mode 2 - - -VOID -odm_PSDMonitorInit( - IN PDM_ODM_T pDM_Odm) -{ -#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE) - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - //PSD Monitor Setting - //Which path in ADC/DAC is turnned on for PSD: both I/Q - ODM_SetBBReg(pDM_Odm, ODM_PSDREG, BIT10|BIT11, 0x3); - //Ageraged number: 8 - ODM_SetBBReg(pDM_Odm, ODM_PSDREG, BIT12|BIT13, 0x1); - pDM_Odm->bPSDinProcess = FALSE; - pDM_Odm->bUserAssignLevel = FALSE; - pDM_Odm->bPSDactive = FALSE; - //pDM_Odm->bDMInitialGainEnable=TRUE; //change the initialization to DIGinit - //Set Debug Port - //PHY_SetBBReg(Adapter, 0x908, bMaskDWord, 0x803); - //PHY_SetBBReg(Adapter, 0xB34, bMaskByte0, 0x00); // pause PSD - //PHY_SetBBReg(Adapter, 0xB38, bMaskByte0, 10); //rescan - //PHY_SetBBReg(Adapter, 0xB38, bMaskByte2|bMaskByte3, 100); //interval - - //PlatformSetTimer( Adapter, &pHalData->PSDTriggerTimer, 0); //ms -#endif -} - -VOID -PatchDCTone( - IN PDM_ODM_T pDM_Odm, - pu4Byte PSD_report, - u1Byte initial_gain_psd -) -{ - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - //PADAPTER pAdapter; - - u4Byte psd_report; - - //2 Switch to CH11 to patch CH9 and CH13 DC tone - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, 11); - - if(pDM_Odm->SupportICType== ODM_RTL8192D) - { - if((*(pDM_Odm->pMacPhyMode) == ODM_SMSP)||(*(pDM_Odm->pMacPhyMode) == ODM_DMSP)) - { - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_CHNLBW, 0x3FF, 11); - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x25, 0xfffff, 0x643BC); - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x26, 0xfffff, 0xFC038); - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x27, 0xfffff, 0x77C1A); - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2B, 0xfffff, 0x41289); - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2C, 0xfffff, 0x01840); - } - else - { - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x25, 0xfffff, 0x643BC); - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x26, 0xfffff, 0xFC038); - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x27, 0xfffff, 0x77C1A); - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2B, 0xfffff, 0x41289); - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2C, 0xfffff, 0x01840); - } - } - - //Ch9 DC tone patch - psd_report = GetPSDData(pDM_Odm, 96, initial_gain_psd); - PSD_report[50] = psd_report; - //Ch13 DC tone patch - psd_report = GetPSDData(pDM_Odm, 32, initial_gain_psd); - PSD_report[70] = psd_report; - - //2 Switch to CH3 to patch CH1 and CH5 DC tone - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, 3); - - - if(pDM_Odm->SupportICType==ODM_RTL8192D) - { - if((*(pDM_Odm->pMacPhyMode) == ODM_SMSP)||(*(pDM_Odm->pMacPhyMode) == ODM_DMSP)) - { - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_CHNLBW, 0x3FF, 3); - //PHY_SetRFReg(Adapter, ODM_RF_PATH_B, 0x25, 0xfffff, 0x643BC); - //PHY_SetRFReg(Adapter, ODM_RF_PATH_B, 0x26, 0xfffff, 0xFC038); - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x27, 0xfffff, 0x07C1A); - //PHY_SetRFReg(Adapter, ODM_RF_PATH_B, 0x2B, 0xfffff, 0x61289); - //PHY_SetRFReg(Adapter, ODM_RF_PATH_B, 0x2C, 0xfffff, 0x01C41); - } - else - { - //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x25, 0xfffff, 0x643BC); - //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x26, 0xfffff, 0xFC038); - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x27, 0xfffff, 0x07C1A); - //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x2B, 0xfffff, 0x61289); - //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x2C, 0xfffff, 0x01C41); - } - } - - //Ch1 DC tone patch - psd_report = GetPSDData(pDM_Odm, 96, initial_gain_psd); - PSD_report[10] = psd_report; - //Ch5 DC tone patch - psd_report = GetPSDData(pDM_Odm, 32, initial_gain_psd); - PSD_report[30] = psd_report; - -} - - -VOID -GoodChannelDecision( - PDM_ODM_T pDM_Odm, - pu4Byte PSD_report, - pu1Byte PSD_bitmap, - u1Byte RSSI_BT, - pu1Byte PSD_bitmap_memory) -{ - pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; - //s4Byte TH1 = SSBT-0x15; // modify TH by Neil Chen - s4Byte TH1= RSSI_BT+0x14; - s4Byte TH2 = RSSI_BT+85; - //u2Byte TH3; -// s4Byte RegB34; - u1Byte bitmap, Smooth_size[3], Smooth_TH[3]; - //u1Byte psd_bit; - u4Byte i,n,j, byte_idx, bit_idx, good_cnt, good_cnt_smoothing, Smooth_Interval[3]; - int start_byte_idx,start_bit_idx,cur_byte_idx, cur_bit_idx,NOW_byte_idx ; - -// RegB34 = PHY_QueryBBReg(Adapter,0xB34, bMaskDWord)&0xFF; - - if((pDM_Odm->SupportICType == ODM_RTL8192C)||(pDM_Odm->SupportICType == ODM_RTL8192D)) - { - TH1 = RSSI_BT + 0x14; - } - - Smooth_size[0]=Smooth_Size_1; - Smooth_size[1]=Smooth_Size_2; - Smooth_size[2]=Smooth_Size_3; - Smooth_TH[0]=Smooth_TH_1; - Smooth_TH[1]=Smooth_TH_2; - Smooth_TH[2]=Smooth_TH_3; - Smooth_Interval[0]=16; - Smooth_Interval[1]=15; - Smooth_Interval[2]=13; - good_cnt = 0; - if(pDM_Odm->SupportICType==ODM_RTL8723A) - { - //2 Threshold - - if(RSSI_BT >=41) - TH1 = 113; - else if(RSSI_BT >=38) // >= -15dBm - TH1 = 105; //0x69 - else if((RSSI_BT >=33)&(RSSI_BT <38)) - TH1 = 99+(RSSI_BT-33); //0x63 - else if((RSSI_BT >=26)&(RSSI_BT<33)) - TH1 = 99-(33-RSSI_BT)+2; //0x5e - else if((RSSI_BT >=24)&(RSSI_BT<26)) - TH1 = 88-((RSSI_BT-24)*3); //0x58 - else if((RSSI_BT >=18)&(RSSI_BT<24)) - TH1 = 77+((RSSI_BT-18)*2); - else if((RSSI_BT >=14)&(RSSI_BT<18)) - TH1 = 63+((RSSI_BT-14)*2); - else if((RSSI_BT >=8)&(RSSI_BT<14)) - TH1 = 58+((RSSI_BT-8)*2); - else if((RSSI_BT >=3)&(RSSI_BT<8)) - TH1 = 52+(RSSI_BT-3); - else - TH1 = 51; - } - - for (i = 0; i< 10; i++) - PSD_bitmap[i] = 0; - - - // Add By Gary - for (i=0; i<80; i++) - pRX_HP_Table->PSD_bitmap_RXHP[i] = 0; - // End - - - - if(pDM_Odm->SupportICType==ODM_RTL8723A) - { - TH1 =TH1-SIR_STEP_SIZE; - } - while (good_cnt < PSD_CHMIN) - { - good_cnt = 0; - if(pDM_Odm->SupportICType==ODM_RTL8723A) - { - if(TH1 ==TH2) - break; - if((TH1+SIR_STEP_SIZE) < TH2) - TH1 += SIR_STEP_SIZE; - else - TH1 = TH2; - } - else - { - if(TH1==(RSSI_BT+0x1E)) - break; - if((TH1+2) < (RSSI_BT+0x1E)) - TH1+=3; - else - TH1 = RSSI_BT+0x1E; - - } - ODM_RT_TRACE(pDM_Odm,COMP_PSD,DBG_LOUD,("PSD: decision threshold is: %d", TH1)); - - for (i = 0; i< 80; i++) - { - if((s4Byte)(PSD_report[i]) < TH1) - { - byte_idx = i / 8; - bit_idx = i -8*byte_idx; - bitmap = PSD_bitmap[byte_idx]; - PSD_bitmap[byte_idx] = bitmap | (u1Byte) (1 << bit_idx); - } - } - -#if DBG - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: before smoothing\n")); - for(n=0;n<10;n++) - { - //DbgPrint("PSD_bitmap[%u]=%x\n", n, PSD_bitmap[n]); - for (i = 0; i<8; i++) - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD_bitmap[%u] = %d\n", 2402+n*8+i, (PSD_bitmap[n]&BIT(i))>>i)); - } -#endif - - //1 Start of smoothing function - - for (j=0;j<3;j++) - { - start_byte_idx=0; - start_bit_idx=0; - for(n=0; n 7 ) - { - start_byte_idx= start_byte_idx+start_bit_idx/8; - start_bit_idx = start_bit_idx%8; - } - } - - ODM_RT_TRACE( pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: after %u smoothing", j+1)); - for(n=0;n<10;n++) - { - for (i = 0; i<8; i++) - { - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD_bitmap[%u] = %d\n", 2402+n*8+i, (PSD_bitmap[n]&BIT(i))>>i)); - - if ( ((PSD_bitmap[n]&BIT(i))>>i) ==1) //----- Add By Gary - { - pRX_HP_Table->PSD_bitmap_RXHP[8*n+i] = 1; - } // ------end by Gary - } - } - - } - - - good_cnt = 0; - for ( i = 0; i < 10; i++) - { - for (n = 0; n < 8; n++) - if((PSD_bitmap[i]& BIT(n)) != 0) - good_cnt++; - } - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: good channel cnt = %u",good_cnt)); - } - - //RT_TRACE(COMP_PSD, DBG_LOUD,("PSD: SSBT=%d, TH2=%d, TH1=%d",SSBT,TH2,TH1)); - for (i = 0; i <10; i++) - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: PSD_bitmap[%u]=%x",i,PSD_bitmap[i])); -/* - //Update bitmap memory - for(i = 0; i < 80; i++) - { - byte_idx = i / 8; - bit_idx = i -8*byte_idx; - psd_bit = (PSD_bitmap[byte_idx] & BIT(bit_idx)) >> bit_idx; - bitmap = PSD_bitmap_memory[i]; - PSD_bitmap_memory[i] = (bitmap << 1) |psd_bit; - } -*/ -} - - - -VOID -odm_PSD_Monitor( - PDM_ODM_T pDM_Odm -) -{ - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - //PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - - unsigned int pts, start_point, stop_point; - u1Byte initial_gain ; - static u1Byte PSD_bitmap_memory[80], init_memory = 0; - static u1Byte psd_cnt=0; - static u4Byte PSD_report[80], PSD_report_tmp; - static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; - u1Byte H2C_PSD_DATA[5]={0,0,0,0,0}; - static u1Byte H2C_PSD_DATA_last[5] ={0,0,0,0,0}; - u1Byte idx[20]={96,99,102,106,109,112,115,118,122,125, - 0,3,6,10,13,16,19,22,26,29}; - u1Byte n, i, channel, BBReset,tone_idx; - u1Byte PSD_bitmap[10], SSBT=0,initial_gain_psd=0, RSSI_BT=0, initialGainUpper; - s4Byte PSD_skip_start, PSD_skip_stop; - u4Byte CurrentChannel, RXIQI, RxIdleLowPwr, wlan_channel; - u4Byte ReScan, Interval, Is40MHz; - u8Byte curTxOkCnt, curRxOkCnt; - int cur_byte_idx, cur_bit_idx; - PADAPTER Adapter = pDM_Odm->Adapter; - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - - if( (*(pDM_Odm->pbScanInProcess)) || - pDM_Odm->bLinkInProcess) - { - if((pDM_Odm->SupportICType==ODM_RTL8723A)&(pDM_Odm->SupportInterface==ODM_ITRF_PCIE)) - { - ODM_SetTimer( pDM_Odm, &pDM_Odm->PSDTimer, 1500); //ms - //psd_cnt=0; - } - return; - } - - if(pDM_Odm->bBtHsOperation) - { - ReScan = 1; - Interval = SCAN_INTERVAL; - } - else - { - ReScan = PSD_RESCAN; - Interval = SCAN_INTERVAL; - } - - //1 Initialization - if(init_memory == 0) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Init memory\n")); - for(i = 0; i < 80; i++) - PSD_bitmap_memory[i] = 0xFF; // channel is always good - init_memory = 1; - } - if(psd_cnt == 0) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Enter dm_PSD_Monitor\n")); - for(i = 0; i < 80; i++) - PSD_report[i] = 0; - } - - //1 Backup Current Settings - CurrentChannel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); -/* - if(pDM_Odm->SupportICType==ODM_RTL8192D) - { - //2 Record Current synthesizer parameters based on current channel - if((*pDM_Odm->MacPhyMode92D == SINGLEMAC_SINGLEPHY)||(*pDM_Odm->MacPhyMode92D == DUALMAC_SINGLEPHY)) - { - SYN_RF25 = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x25, bMaskDWord); - SYN_RF26 = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x26, bMaskDWord); - SYN_RF27 = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x27, bMaskDWord); - SYN_RF2B = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x2B, bMaskDWord); - SYN_RF2C = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x2C, bMaskDWord); - } - else // DualMAC_DualPHY 2G - { - SYN_RF25 = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x25, bMaskDWord); - SYN_RF26 = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x26, bMaskDWord); - SYN_RF27 = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x27, bMaskDWord); - SYN_RF2B = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x2B, bMaskDWord); - SYN_RF2C = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x2C, bMaskDWord); - } - } -*/ - //RXIQI = PHY_QueryBBReg(Adapter, 0xC14, bMaskDWord); - RXIQI = ODM_GetBBReg(pDM_Odm, 0xC14, bMaskDWord); - - //RxIdleLowPwr = (PHY_QueryBBReg(Adapter, 0x818, bMaskDWord)&BIT28)>>28; - RxIdleLowPwr = (ODM_GetBBReg(pDM_Odm, 0x818, bMaskDWord)&BIT28)>>28; - - //2??? - if(CHNL_RUN_ABOVE_40MHZ(pMgntInfo)) - Is40MHz = TRUE; - else - Is40MHz = FALSE; - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_PSD, DBG_LOUD,("PSD Scan Start\n")); - //1 Turn off CCK - //PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT24, 0); - ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0); - //1 Turn off TX - //Pause TX Queue - //PlatformEFIOWrite1Byte(Adapter, REG_TXPAUSE, 0xFF); - ODM_Write1Byte(pDM_Odm,REG_TXPAUSE, 0xFF); - - //Force RX to stop TX immediately - //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13); - - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13); - //1 Turn off RX - //Rx AGC off RegC70[0]=0, RegC7C[20]=0 - //PHY_SetBBReg(Adapter, 0xC70, BIT0, 0); - //PHY_SetBBReg(Adapter, 0xC7C, BIT20, 0); - - ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 0); - ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 0); - - - //Turn off CCA - //PHY_SetBBReg(Adapter, 0xC14, bMaskDWord, 0x0); - ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, 0x0); - - //BB Reset - //BBReset = PlatformEFIORead1Byte(Adapter, 0x02); - BBReset = ODM_Read1Byte(pDM_Odm, 0x02); - - //PlatformEFIOWrite1Byte(Adapter, 0x02, BBReset&(~BIT0)); - //PlatformEFIOWrite1Byte(Adapter, 0x02, BBReset|BIT0); - ODM_SetBBReg(pDM_Odm, 0x87C, BIT31, 1); //clock gated to prevent from AGC table mess - ODM_Write1Byte(pDM_Odm, 0x02, BBReset&(~BIT0)); - ODM_Write1Byte(pDM_Odm, 0x02, BBReset|BIT0); - ODM_SetBBReg(pDM_Odm, 0x87C, BIT31, 0); - - //1 Leave RX idle low power - //PHY_SetBBReg(Adapter, 0x818, BIT28, 0x0); - - ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); - //1 Fix initial gain - //if (IS_HARDWARE_TYPE_8723AE(Adapter)) - //RSSI_BT = pHalData->RSSI_BT; - //else if((IS_HARDWARE_TYPE_8192C(Adapter))||(IS_HARDWARE_TYPE_8192D(Adapter))) // Add by Gary - // RSSI_BT = RSSI_BT_new; - - if((pDM_Odm->SupportICType==ODM_RTL8723A)&(pDM_Odm->SupportInterface==ODM_ITRF_PCIE)) - RSSI_BT=pDM_Odm->RSSI_BT; //need to check C2H to pDM_Odm RSSI BT - - if(RSSI_BT>=47) - RSSI_BT=47; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); - - if(pDM_Odm->SupportICType==ODM_RTL8723A) - { - //Neil add--2011--10--12 - //2 Initial Gain index - if(RSSI_BT >=35) // >= -15dBm - initial_gain_psd = RSSI_BT*2; - else if((RSSI_BT >=33)&(RSSI_BT<35)) - initial_gain_psd = RSSI_BT*2+6; - else if((RSSI_BT >=24)&(RSSI_BT<33)) - initial_gain_psd = 70-(33-RSSI_BT); - else if((RSSI_BT >=19)&(RSSI_BT<24)) - initial_gain_psd = 64-((24-RSSI_BT)*4); - else if((RSSI_BT >=14)&(RSSI_BT<19)) - initial_gain_psd = 44-((18-RSSI_BT)*2); - else if((RSSI_BT >=8)&(RSSI_BT<14)) - initial_gain_psd = 35-(14-RSSI_BT); - else - initial_gain_psd = 0x1B; - } - else - { - - //need to do - initial_gain_psd = pDM_Odm->RSSI_Min; // PSD report based on RSSI - //} - } - //if(RSSI_BT<0x17) - // RSSI_BT +=3; - //DbgPrint("PSD: RSSI_BT= %d\n", RSSI_BT); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); - - //initialGainUpper = 0x5E; //Modify by neil chen - - if(pDM_Odm->bUserAssignLevel) - { - pDM_Odm->bUserAssignLevel = FALSE; - initialGainUpper = 0x7f; - } - else - { - initialGainUpper = 0x5E; - } - - /* - if (initial_gain_psd < 0x1a) - initial_gain_psd = 0x1a; - if (initial_gain_psd > initialGainUpper) - initial_gain_psd = initialGainUpper; - */ - - //if(pDM_Odm->SupportICType==ODM_RTL8723A) - SSBT = RSSI_BT * 2 +0x3E; - - - //if(IS_HARDWARE_TYPE_8723AE(Adapter)) - // SSBT = RSSI_BT * 2 +0x3E; - //else if((IS_HARDWARE_TYPE_8192C(Adapter))||(IS_HARDWARE_TYPE_8192D(Adapter))) // Add by Gary - //{ - // RSSI_BT = initial_gain_psd; - // SSBT = RSSI_BT; - //} - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: SSBT= %d\n", SSBT)); - ODM_RT_TRACE( pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: initial gain= 0x%x\n", initial_gain_psd)); - //DbgPrint("PSD: SSBT= %d", SSBT); - //need to do - //pMgntInfo->bDMInitialGainEnable = FALSE; - pDM_Odm->bDMInitialGainEnable = FALSE; - initial_gain =(u1Byte) (ODM_GetBBReg(pDM_Odm, 0xc50, bMaskDWord) & 0x7F); - - // make sure the initial gain is under the correct range. - //initial_gain_psd &= 0x7f; - ODM_Write_DIG(pDM_Odm, initial_gain_psd); - //1 Turn off 3-wire - ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0xF); - - //pts value = 128, 256, 512, 1024 - pts = 128; - - if(pts == 128) - { - ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x0); - start_point = 64; - stop_point = 192; - } - else if(pts == 256) - { - ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x1); - start_point = 128; - stop_point = 384; - } - else if(pts == 512) - { - ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x2); - start_point = 256; - stop_point = 768; - } - else - { - ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x3); - start_point = 512; - stop_point = 1536; - } - - -//3 Skip WLAN channels if WLAN busy - - curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast) - lastTxOkCnt; - curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast) - lastRxOkCnt; - lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); - lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); - - PSD_skip_start=80; - PSD_skip_stop = 0; - wlan_channel = CurrentChannel & 0x0f; - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD,DBG_LOUD,("PSD: current channel: %x, BW:%d \n", wlan_channel, Is40MHz)); - if(pDM_Odm->SupportICType==ODM_RTL8723A) - { - if(pDM_Odm->bBtHsOperation) - { - if(pDM_Odm->bLinked) - { - if(Is40MHz) - { - PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2; // Modify by Neil to add 10 chs to mask - PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4; - } - else - { - PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-10; // Modify by Neil to add 10 chs to mask - PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+18; - } - } - else - { - // mask for 40MHz - PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2; // Modify by Neil to add 10 chs to mask - PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4; - } - if(PSD_skip_start < 0) - PSD_skip_start = 0; - if(PSD_skip_stop >80) - PSD_skip_stop = 80; - } - else - { - if((curRxOkCnt+curTxOkCnt) > 5) - { - if(Is40MHz) - { - PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2; // Modify by Neil to add 10 chs to mask - PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4; - } - else - { - PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-10; // Modify by Neil to add 10 chs to mask - PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+18; - } - - if(PSD_skip_start < 0) - PSD_skip_start = 0; - if(PSD_skip_stop >80) - PSD_skip_stop = 80; - } - } - } -#if 0 - else - { - if((curRxOkCnt+curTxOkCnt) > 1000) - { - PSD_skip_start = (wlan_channel-1)*5 -Is40MHz*10; - PSD_skip_stop = PSD_skip_start + (1+Is40MHz)*20; - } - } -#endif //Reove RXHP Issue - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD,DBG_LOUD,("PSD: Skip tone from %d to %d \n", PSD_skip_start, PSD_skip_stop)); - - for (n=0;n<80;n++) - { - if((n%20)==0) - { - channel = (n/20)*4 + 1; - - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, channel); - } - tone_idx = n%20; - if ((n>=PSD_skip_start) && (n PSD_report[n]) - PSD_report[n] = PSD_report_tmp; - - } - } - - PatchDCTone(pDM_Odm, PSD_report, initial_gain_psd); - - //----end - //1 Turn on RX - //Rx AGC on - ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 1); - ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 1); - //CCK on - ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 1); - //1 Turn on TX - //Resume TX Queue - - ODM_Write1Byte(pDM_Odm,REG_TXPAUSE, 0x00); - //Turn on 3-wire - ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0x0); - //1 Restore Current Settings - //Resume DIG - pDM_Odm->bDMInitialGainEnable = TRUE; - - ODM_Write_DIG(pDM_Odm, initial_gain); - - // restore originl center frequency - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, CurrentChannel); - - //Turn on CCA - ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, RXIQI); - //Restore RX idle low power - if(RxIdleLowPwr == TRUE) - ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 1); - - psd_cnt++; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD:psd_cnt = %d \n",psd_cnt)); - if (psd_cnt < ReScan) - ODM_SetTimer(pDM_Odm, &pDM_Odm->PSDTimer, Interval); - else - { - psd_cnt = 0; - for(i=0;i<80;i++) - //DbgPrint("psd_report[%d]= %d \n", 2402+i, PSD_report[i]); - RT_TRACE( COMP_PSD, DBG_LOUD,("psd_report[%d]= %d \n", 2402+i, PSD_report[i])); - - - GoodChannelDecision(pDM_Odm, PSD_report, PSD_bitmap,RSSI_BT, PSD_bitmap_memory); - - if(pDM_Odm->SupportICType==ODM_RTL8723A) - { - cur_byte_idx=0; - cur_bit_idx=0; - - //2 Restore H2C PSD Data to Last Data - H2C_PSD_DATA_last[0] = H2C_PSD_DATA[0]; - H2C_PSD_DATA_last[1] = H2C_PSD_DATA[1]; - H2C_PSD_DATA_last[2] = H2C_PSD_DATA[2]; - H2C_PSD_DATA_last[3] = H2C_PSD_DATA[3]; - H2C_PSD_DATA_last[4] = H2C_PSD_DATA[4]; - - - //2 Translate 80bit channel map to 40bit channel - for ( i=0;i<5;i++) - { - for(n=0;n<8;n++) - { - cur_byte_idx = i*2 + n/4; - cur_bit_idx = (n%4)*2; - if ( ((PSD_bitmap[cur_byte_idx]& BIT(cur_bit_idx)) != 0) && ((PSD_bitmap[cur_byte_idx]& BIT(cur_bit_idx+1)) != 0)) - H2C_PSD_DATA[i] = H2C_PSD_DATA[i] | (u1Byte) (1 << n); - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("H2C_PSD_DATA[%d]=0x%x\n" ,i, H2C_PSD_DATA[i])); - } - - //3 To Compare the difference - for ( i=0;i<5;i++) - { - if(H2C_PSD_DATA[i] !=H2C_PSD_DATA_last[i]) - { - FillH2CCmd(Adapter, H2C_92C_PSD_RESULT, 5, H2C_PSD_DATA); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_PSD, DBG_LOUD,("Need to Update the AFH Map \n")); - break; - } - else - { - if(i==5) - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Not need to Update\n")); - } - } - if(pDM_Odm->bBtHsOperation) - { - ODM_SetTimer(pDM_Odm, &pDM_Odm->PSDTimer, 10000); - ODM_RT_TRACE( pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Leave dm_PSD_Monitor\n")); - } - else - { - ODM_SetTimer(pDM_Odm, &pDM_Odm->PSDTimer, 1500); - ODM_RT_TRACE( pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Leave dm_PSD_Monitor\n")); - } - } - } -} -/* -//Neil for Get BT RSSI -// Be Triggered by BT C2H CMD -VOID -ODM_PSDGetRSSI( - IN u1Byte RSSI_BT) -{ - - -} - -*/ - -VOID -ODM_PSDMonitor( - IN PDM_ODM_T pDM_Odm - ) -{ - //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - //if(IS_HARDWARE_TYPE_8723AE(Adapter)) - - if(pDM_Odm->SupportICType == ODM_RTL8723A) //may need to add other IC type - { - if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE) - { - if(pDM_Odm->bBtDisabled) //need to check upper layer connection - { - pDM_Odm->bPSDactive=FALSE; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD, ("odm_PSDMonitor, return for BT is disabled!!!\n")); - return; - } - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD, ("odm_PSDMonitor\n")); - //{ - pDM_Odm->bPSDinProcess = TRUE; - pDM_Odm->bPSDactive=TRUE; - odm_PSD_Monitor(pDM_Odm); - pDM_Odm->bPSDinProcess = FALSE; - } - } - -} -VOID -odm_PSDMonitorCallback( - PRT_TIMER pTimer -) -{ - PADAPTER Adapter = (PADAPTER)pTimer->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - - PlatformScheduleWorkItem(&pHalData->PSDMonitorWorkitem); -} - -VOID -odm_PSDMonitorWorkItemCallback( - IN PVOID pContext - ) -{ - PADAPTER Adapter = (PADAPTER)pContext; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - - ODM_PSDMonitor(pDM_Odm); -} - -// <20130108, Kordan> E.g., With LNA used, we make the Rx power smaller to have a better EVM. (Asked by Willis) -VOID -odm_RFEControl( - IN PDM_ODM_T pDM_Odm, - IN u8Byte RSSIVal - ) -{ - PADAPTER Adapter = (PADAPTER)pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - static u1Byte TRSW_HighPwr = 0; - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, DBG_LOUD, ("===> odm_RFEControl, RSSI = %d, TRSW_HighPwr = 0x%X, pHalData->RFEType = %d\n", - RSSIVal, TRSW_HighPwr, pHalData->RFEType )); - - if (pHalData->RFEType == 3) { - - pDM_Odm->RSSI_TRSW = RSSIVal; - - if (pDM_Odm->RSSI_TRSW >= pDM_Odm->RSSI_TRSW_H) - { - TRSW_HighPwr = 1; // Switch to - PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar, BIT1|BIT0, 0x1); // Set ANTSW=1/ANTSWB=0 for SW control - PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar, BIT9|BIT8, 0x3); // Set ANTSW=1/ANTSWB=0 for SW control - - } - else if (pDM_Odm->RSSI_TRSW <= pDM_Odm->RSSI_TRSW_L) - { - TRSW_HighPwr = 0; // Switched back - PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar, BIT1|BIT0, 0x1); // Set ANTSW=1/ANTSWB=0 for SW control - PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar, BIT9|BIT8, 0x0); // Set ANTSW=1/ANTSWB=0 for SW control - - } - } - - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, DBG_LOUD, ("(pDM_Odm->RSSI_TRSW_H, pDM_Odm->RSSI_TRSW_L) = (%d, %d)\n", pDM_Odm->RSSI_TRSW_H, pDM_Odm->RSSI_TRSW_L)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, DBG_LOUD, ("(RSSIVal, RSSIVal, pDM_Odm->RSSI_TRSW_iso) = (%d, %d, %d)\n", - RSSIVal, pDM_Odm->RSSI_TRSW_iso, pDM_Odm->RSSI_TRSW)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, DBG_LOUD, ("<=== odm_RFEControl, RSSI = %d, TRSW_HighPwr = 0x%X\n", RSSIVal, TRSW_HighPwr)); -} - -VOID -ODM_MPT_DIG( - IN PDM_ODM_T pDM_Odm - ) -{ - pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; - PFALSE_ALARM_STATISTICS pFalseAlmCnt = &pDM_Odm->FalseAlmCnt; - u1Byte CurrentIGI = (u1Byte)pDM_DigTable->CurIGValue; - u1Byte DIG_Upper = 0x40, DIG_Lower = 0x20, C50, E50; - u8Byte RXOK_cal; - u1Byte IGI_A = 0x20, IGI_B = 0x20; - -#if ODM_FIX_2G_DIG - IGI_A = 0x22; - IGI_B = 0x24; -#endif - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_MP, DBG_LOUD, ("===> ODM_MPT_DIG, pBandType = %d\n", *pDM_Odm->pBandType)); - - odm_FalseAlarmCounterStatistics( pDM_Odm); - pDM_Odm->LastNumQryPhyStatusAll = pDM_Odm->NumQryPhyStatusAll; - pDM_Odm->NumQryPhyStatusAll = pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK + pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM; - RXOK_cal = pDM_Odm->NumQryPhyStatusAll - pDM_Odm->LastNumQryPhyStatusAll; - - if (RXOK_cal == 0) - pDM_Odm->RxPWDBAve_final= 0; - else - pDM_Odm->RxPWDBAve_final= pDM_Odm->RxPWDBAve/RXOK_cal; - - pDM_Odm->RxPWDBAve = 0; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, DBG_LOUD, ("RX OK = %d\n", RXOK_cal)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, DBG_LOUD, ("pDM_Odm->RxPWDBAve_final = %d\n", pDM_Odm->RxPWDBAve_final)); - - // <20130315, Kordan> Except Cameo, we should always trun on 2.4G/5G DIG. - // (Cameo fixes the IGI of 2.4G, so only DIG on 5G. Asked by James.) -#if ODM_FIX_2G_DIG - if (*pDM_Odm->pBandType == BAND_ON_5G){ // for 5G -#else - if (1){ // for both 2G/5G -#endif - pDM_Odm->MPDIG_2G = FALSE; - pDM_Odm->Times_2G = 0; - - if (RXOK_cal >= 70 && pDM_Odm->RxPWDBAve_final<= 30) - { - if (CurrentIGI > 0x24){ - ODM_Write1Byte( pDM_Odm, rA_IGI_Jaguar, 0x24); - ODM_Write1Byte( pDM_Odm, rB_IGI_Jaguar, 0x24); - } - } - else - { - if(pFalseAlmCnt->Cnt_all > 1000){ - CurrentIGI = CurrentIGI + 8; - } - else if(pFalseAlmCnt->Cnt_all > 200){ - CurrentIGI = CurrentIGI + 4; - } - else if (pFalseAlmCnt->Cnt_all > 50){ - CurrentIGI = CurrentIGI + 2; - } - else if (pFalseAlmCnt->Cnt_all < 2){ - CurrentIGI = CurrentIGI - 2; - } - - if (CurrentIGI < DIG_Lower ){ - CurrentIGI = DIG_Lower; - } - else if(CurrentIGI > DIG_Upper){ - CurrentIGI = DIG_Upper; - } - - pDM_DigTable->CurIGValue = CurrentIGI; - - ODM_Write1Byte( pDM_Odm, rA_IGI_Jaguar, (u1Byte)CurrentIGI); - ODM_Write1Byte( pDM_Odm, rB_IGI_Jaguar, (u1Byte)CurrentIGI); - - C50 = ODM_Read1Byte( pDM_Odm, 0xc50); - E50 = ODM_Read1Byte( pDM_Odm, 0xe50); - //pDM_Odm->MPDIG_2G = FALSE; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_MP, DBG_LOUD, ("DIG = (%x, %x), Cnt_all = %d, Cnt_Ofdm_fail = %d, Cnt_Cck_fail = %d\n", C50, E50, pFalseAlmCnt->Cnt_all, pFalseAlmCnt->Cnt_Ofdm_fail, pFalseAlmCnt->Cnt_Cck_fail)); - } - - } - else - { //2G - ODM_RT_TRACE(pDM_Odm,ODM_COMP_MP, DBG_LOUD, ("MPDIG_2G = %d,\n", pDM_Odm->MPDIG_2G)); - - if(pDM_Odm->MPDIG_2G == FALSE){ - ODM_RT_TRACE(pDM_Odm,ODM_COMP_MP, DBG_LOUD, ("===> Fix IGI\n")); - ODM_Write1Byte( pDM_Odm, rA_IGI_Jaguar, (u1Byte)IGI_A); - ODM_Write1Byte( pDM_Odm, rB_IGI_Jaguar, (u1Byte)IGI_B); - } - if (pDM_Odm->Times_2G == 2) - pDM_Odm->MPDIG_2G = TRUE; - pDM_Odm->Times_2G++; - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, DBG_LOUD, ("pDM_Odm->RxPWDBAve_final = %d\n", pDM_Odm->RxPWDBAve_final)); - - if (pDM_Odm->SupportICType == ODM_RTL8812) - odm_RFEControl(pDM_Odm, pDM_Odm->RxPWDBAve_final); - - ODM_SetTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer, 700); - -} - -VOID -odm_MPT_DIGCallback( - PRT_TIMER pTimer -) -{ - PADAPTER Adapter = (PADAPTER)pTimer->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - - - #if DEV_BUS_TYPE==RT_PCI_INTERFACE - #if USE_WORKITEM - PlatformScheduleWorkItem(&pDM_Odm->MPT_DIGWorkitem); - #else - ODM_MPT_DIG(pDM_Odm); - #endif - #else - PlatformScheduleWorkItem(&pDM_Odm->MPT_DIGWorkitem); - #endif - -} - -VOID -odm_MPT_DIGWorkItemCallback( - IN PVOID pContext - ) -{ - PADAPTER Adapter = (PADAPTER)pContext; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - - ODM_MPT_DIG(pDM_Odm); -} - - - - - //cosa debug tool need to modify - -VOID -ODM_PSDDbgControl( - IN PADAPTER Adapter, - IN u4Byte mode, - IN u4Byte btRssi - ) -{ -#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD, (" Monitor mode=%d, btRssi=%d\n", mode, btRssi)); - if(mode) - { - pDM_Odm->RSSI_BT = (u1Byte)btRssi; - pDM_Odm->bUserAssignLevel = TRUE; - ODM_SetTimer( pDM_Odm, &pDM_Odm->PSDTimer, 0); //ms - } - else - { - ODM_CancelTimer(pDM_Odm, &pDM_Odm->PSDTimer); - } -#endif -} - - -//#if(DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE) - -void odm_RXHPInit( - IN PDM_ODM_T pDM_Odm) -{ -#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE) - pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; - u1Byte index; - - pRX_HP_Table->RXHP_enable = TRUE; - pRX_HP_Table->RXHP_flag = 0; - pRX_HP_Table->PSD_func_trigger = 0; - pRX_HP_Table->Pre_IGI = 0x20; - pRX_HP_Table->Cur_IGI = 0x20; - pRX_HP_Table->Cur_pw_th = pw_th_10dB; - pRX_HP_Table->Pre_pw_th = pw_th_10dB; - for(index=0; index<80; index++) - pRX_HP_Table->PSD_bitmap_RXHP[index] = 1; - -#if(DEV_BUS_TYPE == RT_USB_INTERFACE) - pRX_HP_Table->TP_Mode = Idle_Mode; -#endif -#endif -} - -void odm_RXHP( - IN PDM_ODM_T pDM_Odm) -{ -#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) | (DEV_BUS_TYPE == RT_USB_INTERFACE) - PADAPTER Adapter = pDM_Odm->Adapter; - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; - pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; - PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); - - u1Byte i, j, sum; - u1Byte Is40MHz; - s1Byte Intf_diff_idx, MIN_Intf_diff_idx = 16; - s4Byte cur_channel; - u1Byte ch_map_intf_5M[17] = {0}; - static u4Byte FA_TH = 0; - static u1Byte psd_intf_flag = 0; - static s4Byte curRssi = 0; - static s4Byte preRssi = 0; - static u1Byte PSDTriggerCnt = 1; - - u1Byte RX_HP_enable = (u1Byte)(ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore2, bMaskDWord)>>31); // for debug!! - -#if(DEV_BUS_TYPE == RT_USB_INTERFACE) - static s8Byte lastTxOkCnt = 0, lastRxOkCnt = 0; - s8Byte curTxOkCnt, curRxOkCnt; - s8Byte curTPOkCnt; - s8Byte TP_Acc3, TP_Acc5; - static s8Byte TP_Buff[5] = {0}; - static u1Byte pre_state = 0, pre_state_flag = 0; - static u1Byte Intf_HighTP_flag = 0, De_counter = 16; - static u1Byte TP_Degrade_flag = 0; -#endif - static u1Byte LatchCnt = 0; - - if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8188E)) - return; - //AGC RX High Power Mode is only applied on 2G band in 92D!!! - if(pDM_Odm->SupportICType == ODM_RTL8192D) - { - if(*(pDM_Odm->pBandType) != ODM_BAND_2_4G) - return; - } - - if(!(pDM_Odm->SupportAbility==ODM_BB_RXHP)) - return; - - - //RX HP ON/OFF - if(RX_HP_enable == 1) - pRX_HP_Table->RXHP_enable = FALSE; - else - pRX_HP_Table->RXHP_enable = TRUE; - - if(pRX_HP_Table->RXHP_enable == FALSE) - { - if(pRX_HP_Table->RXHP_flag == 1) - { - pRX_HP_Table->RXHP_flag = 0; - psd_intf_flag = 0; - } - return; - } - -#if(DEV_BUS_TYPE == RT_USB_INTERFACE) - //2 Record current TP for USB interface - curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast)-lastTxOkCnt; - curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast)-lastRxOkCnt; - lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); - lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); - - curTPOkCnt = curTxOkCnt+curRxOkCnt; - TP_Buff[0] = curTPOkCnt; // current TP - TP_Acc3 = PlatformDivision64((TP_Buff[1]+TP_Buff[2]+TP_Buff[3]), 3); - TP_Acc5 = PlatformDivision64((TP_Buff[0]+TP_Buff[1]+TP_Buff[2]+TP_Buff[3]+TP_Buff[4]), 5); - - if(TP_Acc5 < 1000) - pRX_HP_Table->TP_Mode = Idle_Mode; - else if((1000 < TP_Acc5)&&(TP_Acc5 < 3750000)) - pRX_HP_Table->TP_Mode = Low_TP_Mode; - else - pRX_HP_Table->TP_Mode = High_TP_Mode; - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP TP Mode = %d\n", pRX_HP_Table->TP_Mode)); - // Since TP result would be sampled every 2 sec, it needs to delay 4sec to wait PSD processing. - // When LatchCnt = 0, we would Get PSD result. - if(TP_Degrade_flag == 1) - { - LatchCnt--; - if(LatchCnt == 0) - { - TP_Degrade_flag = 0; - } - } - // When PSD function triggered by TP degrade 20%, and Interference Flag = 1 - // Set a De_counter to wait IGI = upper bound. If time is UP, the Interference flag will be pull down. - if(Intf_HighTP_flag == 1) - { - De_counter--; - if(De_counter == 0) - { - Intf_HighTP_flag = 0; - psd_intf_flag = 0; - } - } -#endif - - //2 AGC RX High Power Mode by PSD only applied to STA Mode - //3 NOT applied 1. Ad Hoc Mode. - //3 NOT applied 2. AP Mode - if ((pMgntInfo->mAssoc) && (!pMgntInfo->mIbss) && (!ACTING_AS_AP(Adapter))) - { - Is40MHz = *(pDM_Odm->pBandWidth); - curRssi = pDM_Odm->RSSI_Min; - cur_channel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x0fff) & 0x0f; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP RX HP flag = %d\n", pRX_HP_Table->RXHP_flag)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP FA = %d\n", FalseAlmCnt->Cnt_all)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP cur RSSI = %d, pre RSSI=%d\n", curRssi, preRssi)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP current CH = %d\n", cur_channel)); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP Is 40MHz = %d\n", Is40MHz)); - //2 PSD function would be triggered - //3 1. Every 4 sec for PCIE - //3 2. Before TP Mode (Idle TP<4kbps) for USB - //3 3. After TP Mode (High TP) for USB - if((curRssi > 68) && (pRX_HP_Table->RXHP_flag == 0)) // Only RSSI>TH and RX_HP_flag=0 will Do PSD process - { -#if (DEV_BUS_TYPE == RT_USB_INTERFACE) - //2 Before TP Mode ==> PSD would be trigger every 4 sec - if(pRX_HP_Table->TP_Mode == Idle_Mode) //2.1 less wlan traffic <4kbps - { -#endif - if(PSDTriggerCnt == 1) - { - odm_PSD_RXHP(pDM_Odm); - pRX_HP_Table->PSD_func_trigger = 1; - PSDTriggerCnt = 0; - } - else - { - PSDTriggerCnt++; - } -#if(DEV_BUS_TYPE == RT_USB_INTERFACE) - } - //2 After TP Mode ==> Check if TP degrade larger than 20% would trigger PSD function - if(pRX_HP_Table->TP_Mode == High_TP_Mode) - { - if((pre_state_flag == 0)&&(LatchCnt == 0)) - { - // TP var < 5% - if((((curTPOkCnt-TP_Acc3)*20)<(TP_Acc3))&&(((curTPOkCnt-TP_Acc3)*20)>(-TP_Acc3))) - { - pre_state++; - if(pre_state == 3) // hit pre_state condition => consecutive 3 times - { - pre_state_flag = 1; - pre_state = 0; - } - - } - else - { - pre_state = 0; - } - } - //3 If pre_state_flag=1 ==> start to monitor TP degrade 20% - if(pre_state_flag == 1) - { - if(((TP_Acc3-curTPOkCnt)*5)>(TP_Acc3)) // degrade 20% - { - odm_PSD_RXHP(pDM_Odm); - pRX_HP_Table->PSD_func_trigger = 1; - TP_Degrade_flag = 1; - LatchCnt = 2; - pre_state_flag = 0; - } - else if(((TP_Buff[2]-curTPOkCnt)*5)>TP_Buff[2]) - { - odm_PSD_RXHP(pDM_Odm); - pRX_HP_Table->PSD_func_trigger = 1; - TP_Degrade_flag = 1; - LatchCnt = 2; - pre_state_flag = 0; - } - else if(((TP_Buff[3]-curTPOkCnt)*5)>TP_Buff[3]) - { - odm_PSD_RXHP(pDM_Odm); - pRX_HP_Table->PSD_func_trigger = 1; - TP_Degrade_flag = 1; - LatchCnt = 2; - pre_state_flag = 0; - } - } - } -#endif -} - -#if (DEV_BUS_TYPE == RT_USB_INTERFACE) - for (i=0;i<4;i++) - { - TP_Buff[4-i] = TP_Buff[3-i]; - } -#endif - //2 Update PSD bitmap according to PSD report - if((pRX_HP_Table->PSD_func_trigger == 1)&&(LatchCnt == 0)) - { - //2 Separate 80M bandwidth into 16 group with smaller 5M BW. - for (i = 0 ; i < 16 ; i++) - { - sum = 0; - for(j = 0; j < 5 ; j++) - sum += pRX_HP_Table->PSD_bitmap_RXHP[5*i + j]; - - if(sum < 5) - { - ch_map_intf_5M[i] = 1; // interference flag - } - } - //=============just for debug========================= - //for(i=0;i<16;i++) - //DbgPrint("RX HP: ch_map_intf_5M[%d] = %d\n", i, ch_map_intf_5M[i]); - //=============================================== - //2 Mask target channel 5M index - for(i = 0; i < (4+4*Is40MHz) ; i++) - { - ch_map_intf_5M[cur_channel - (1+2*Is40MHz) + i] = 0; - } - - psd_intf_flag = 0; - for(i = 0; i < 16; i++) - { - if(ch_map_intf_5M[i] == 1) - { - psd_intf_flag = 1; // interference is detected!!! - break; - } - } - -#if (DEV_BUS_TYPE == RT_USB_INTERFACE) - if(pRX_HP_Table->TP_Mode!=Idle_Mode) - { - if(psd_intf_flag == 1) // to avoid psd_intf_flag always 1 - { - Intf_HighTP_flag = 1; - De_counter = 32; // 0x1E -> 0x3E needs 32 times by each IGI step =1 - } - } -#endif - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP psd_intf_flag = %d\n", psd_intf_flag)); - //2 Distance between target channel and interference - for(i = 0; i < 16; i++) - { - if(ch_map_intf_5M[i] == 1) - { - Intf_diff_idx = ((cur_channel+Is40MHz-(i+1))>0) ? (s1Byte)(cur_channel-2*Is40MHz-(i-2)) : (s1Byte)((i+1)-(cur_channel+2*Is40MHz)); - if(Intf_diff_idx < MIN_Intf_diff_idx) - MIN_Intf_diff_idx = Intf_diff_idx; // the min difference index between interference and target - } - } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP MIN_Intf_diff_idx = %d\n", MIN_Intf_diff_idx)); - //2 Choose False Alarm Threshold - switch (MIN_Intf_diff_idx){ - case 0: - case 1: - case 2: - case 3: - FA_TH = FA_RXHP_TH1; - break; - case 4: // CH5 - case 5: // CH6 - FA_TH = FA_RXHP_TH2; - break; - case 6: // CH7 - case 7: // CH8 - FA_TH = FA_RXHP_TH3; - break; - case 8: // CH9 - case 9: //CH10 - FA_TH = FA_RXHP_TH4; - break; - case 10: - case 11: - case 12: - case 13: - case 14: - case 15: - FA_TH = FA_RXHP_TH5; - break; - } - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP FA_TH = %d\n", FA_TH)); - pRX_HP_Table->PSD_func_trigger = 0; - } - //1 Monitor RSSI variation to choose the suitable IGI or Exit AGC RX High Power Mode - if(pRX_HP_Table->RXHP_flag == 1) - { - if ((curRssi > 80)&&(preRssi < 80)) - { - pRX_HP_Table->Cur_IGI = LNA_Low_Gain_1; - } - else if ((curRssi < 80)&&(preRssi > 80)) - { - pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2; - } - else if ((curRssi > 72)&&(preRssi < 72)) - { - pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2; - } - else if ((curRssi < 72)&&( preRssi > 72)) - { - pRX_HP_Table->Cur_IGI = LNA_Low_Gain_3; - } - else if (curRssi < 68) //RSSI is NOT large enough!!==> Exit AGC RX High Power Mode - { - pRX_HP_Table->Cur_pw_th = pw_th_10dB; - pRX_HP_Table->RXHP_flag = 0; // Back to Normal DIG Mode - psd_intf_flag = 0; - } - } - else // pRX_HP_Table->RXHP_flag == 0 - { - //1 Decide whether to enter AGC RX High Power Mode - if ((curRssi > 70) && (psd_intf_flag == 1) && (FalseAlmCnt->Cnt_all > FA_TH) && - (pDM_DigTable->CurIGValue == pDM_DigTable->rx_gain_range_max)) - { - if (curRssi > 80) - { - pRX_HP_Table->Cur_IGI = LNA_Low_Gain_1; - } - else if (curRssi > 72) - { - pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2; - } - else - { - pRX_HP_Table->Cur_IGI = LNA_Low_Gain_3; - } - pRX_HP_Table->Cur_pw_th = pw_th_16dB; //RegC54[9:8]=2'b11: to enter AGC Flow 3 - pRX_HP_Table->First_time_enter = TRUE; - pRX_HP_Table->RXHP_flag = 1; // RXHP_flag=1: AGC RX High Power Mode, RXHP_flag=0: Normal DIG Mode - } - } - preRssi = curRssi; - odm_Write_RXHP(pDM_Odm); - } -#endif //#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN)) -#endif //#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) | (DEV_BUS_TYPE == RT_USB_INTERFACE) -} - -void odm_Write_RXHP( - IN PDM_ODM_T pDM_Odm) -{ - pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; - u4Byte currentIGI; - - if(pRX_HP_Table->Cur_IGI != pRX_HP_Table->Pre_IGI) - { - ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); - ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); - } - - if(pRX_HP_Table->Cur_pw_th != pRX_HP_Table->Pre_pw_th) -{ - ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore2, BIT8|BIT9, pRX_HP_Table->Cur_pw_th); // RegC54[9:8]=2'b11: AGC Flow 3 - } - - if(pRX_HP_Table->RXHP_flag == 0) - { - pRX_HP_Table->Cur_IGI = 0x20; - } - else - { - currentIGI = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0); - if(currentIGI<0x50) - { - ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); - ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI); - } - } - pRX_HP_Table->Pre_IGI = pRX_HP_Table->Cur_IGI; - pRX_HP_Table->Pre_pw_th = pRX_HP_Table->Cur_pw_th; - -} - -VOID -odm_PSD_RXHP( - IN PDM_ODM_T pDM_Odm -) -{ - pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; - PADAPTER Adapter = pDM_Odm->Adapter; - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - unsigned int pts, start_point, stop_point, initial_gain ; - static u1Byte PSD_bitmap_memory[80], init_memory = 0; - static u1Byte psd_cnt=0; - static u4Byte PSD_report[80], PSD_report_tmp; - static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; - u1Byte idx[20]={96,99,102,106,109,112,115,118,122,125, - 0,3,6,10,13,16,19,22,26,29}; - u1Byte n, i, channel, BBReset,tone_idx; - u1Byte PSD_bitmap[10]/*, SSBT=0*/,initial_gain_psd=0, RSSI_BT=0, initialGainUpper; - s4Byte PSD_skip_start, PSD_skip_stop; - u4Byte CurrentChannel, RXIQI, RxIdleLowPwr, wlan_channel; - u4Byte ReScan, Interval, Is40MHz; - u8Byte curTxOkCnt, curRxOkCnt; - //--------------2G band synthesizer for 92D switch RF channel using----------------- - u1Byte group_idx=0; - u4Byte SYN_RF25=0, SYN_RF26=0, SYN_RF27=0, SYN_RF2B=0, SYN_RF2C=0; - u4Byte SYN[5] = {0x25, 0x26, 0x27, 0x2B, 0x2C}; // synthesizer RF register for 2G channel - u4Byte SYN_group[3][5] = {{0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840}, // For CH1,2,4,9,10.11.12 {0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840} - {0x643BC, 0xFC038, 0x07C1A, 0x41289, 0x01840}, // For CH3,13,14 - {0x243BC, 0xFC438, 0x07C1A, 0x4128B, 0x0FC41}}; // For Ch5,6,7,8 - //--------------------- Add by Gary for Debug setting ---------------------- - u1Byte RSSI_BT_new = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xB9C, 0xFF); - u1Byte rssi_ctrl = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xB38, 0xFF); - //--------------------------------------------------------------------- - - if(pMgntInfo->bScanInProgress) - { - return; - } - - ReScan = PSD_RESCAN; - Interval = SCAN_INTERVAL; - - - //1 Initialization - if(init_memory == 0) - { - RT_TRACE( COMP_PSD, DBG_LOUD,("Init memory\n")); - for(i = 0; i < 80; i++) - PSD_bitmap_memory[i] = 0xFF; // channel is always good - init_memory = 1; - } - if(psd_cnt == 0) - { - RT_TRACE(COMP_PSD, DBG_LOUD,("Enter dm_PSD_Monitor\n")); - for(i = 0; i < 80; i++) - PSD_report[i] = 0; - } - - //1 Backup Current Settings - CurrentChannel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); - if(pDM_Odm->SupportICType == ODM_RTL8192D) - { - //2 Record Current synthesizer parameters based on current channel - if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP)) - { - SYN_RF25 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x25, bMaskDWord); - SYN_RF26 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x26, bMaskDWord); - SYN_RF27 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x27, bMaskDWord); - SYN_RF2B = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2B, bMaskDWord); - SYN_RF2C = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2C, bMaskDWord); - } - else // DualMAC_DualPHY 2G - { - SYN_RF25 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x25, bMaskDWord); - SYN_RF26 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x26, bMaskDWord); - SYN_RF27 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x27, bMaskDWord); - SYN_RF2B = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2B, bMaskDWord); - SYN_RF2C = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2C, bMaskDWord); - } - } - RXIQI = ODM_GetBBReg(pDM_Odm, 0xC14, bMaskDWord); - RxIdleLowPwr = (ODM_GetBBReg(pDM_Odm, 0x818, bMaskDWord)&BIT28)>>28; - Is40MHz = *(pDM_Odm->pBandWidth); - ODM_RT_TRACE(pDM_Odm, COMP_PSD, DBG_LOUD,("PSD Scan Start\n")); - //1 Turn off CCK - ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0); - //1 Turn off TX - //Pause TX Queue - ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0xFF); - //Force RX to stop TX immediately - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13); - //1 Turn off RX - //Rx AGC off RegC70[0]=0, RegC7C[20]=0 - ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 0); - ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 0); - //Turn off CCA - ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, 0x0); - //BB Reset - ODM_SetBBReg(pDM_Odm, 0x87C, BIT31, 1); //clock gated to prevent from AGC table mess - BBReset = ODM_Read1Byte(pDM_Odm, 0x02); - ODM_Write1Byte(pDM_Odm, 0x02, BBReset&(~BIT0)); - ODM_Write1Byte(pDM_Odm, 0x02, BBReset|BIT0); - ODM_SetBBReg(pDM_Odm, 0x87C, BIT31, 0); - //1 Leave RX idle low power - ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); - //1 Fix initial gain - RSSI_BT = RSSI_BT_new; - RT_TRACE(COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); - - if(rssi_ctrl == 1) // just for debug!! - initial_gain_psd = RSSI_BT_new; - else - initial_gain_psd = pDM_Odm->RSSI_Min; // PSD report based on RSSI - - RT_TRACE(COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT)); - - initialGainUpper = 0x54; - - RSSI_BT = initial_gain_psd; - //SSBT = RSSI_BT; - - //RT_TRACE( COMP_PSD, DBG_LOUD,("PSD: SSBT= %d\n", SSBT)); - RT_TRACE( COMP_PSD, DBG_LOUD,("PSD: initial gain= 0x%x\n", initial_gain_psd)); - - pDM_Odm->bDMInitialGainEnable = FALSE; - initial_gain = ODM_GetBBReg(pDM_Odm, 0xc50, bMaskDWord) & 0x7F; - //ODM_SetBBReg(pDM_Odm, 0xc50, 0x7F, initial_gain_psd); - ODM_Write_DIG(pDM_Odm, initial_gain_psd); - //1 Turn off 3-wire - ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0xF); - - //pts value = 128, 256, 512, 1024 - pts = 128; - - if(pts == 128) - { - ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x0); - start_point = 64; - stop_point = 192; - } - else if(pts == 256) - { - ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x1); - start_point = 128; - stop_point = 384; - } - else if(pts == 512) - { - ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x2); - start_point = 256; - stop_point = 768; - } - else - { - ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x3); - start_point = 512; - stop_point = 1536; - } - - -//3 Skip WLAN channels if WLAN busy - curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast) - lastTxOkCnt; - curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast) - lastRxOkCnt; - lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); - lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); - - PSD_skip_start=80; - PSD_skip_stop = 0; - wlan_channel = CurrentChannel & 0x0f; - - RT_TRACE(COMP_PSD,DBG_LOUD,("PSD: current channel: %x, BW:%d \n", wlan_channel, Is40MHz)); - - if((curRxOkCnt+curTxOkCnt) > 1000) - { - PSD_skip_start = (wlan_channel-1)*5 -Is40MHz*10; - PSD_skip_stop = PSD_skip_start + (1+Is40MHz)*20; - } - - RT_TRACE(COMP_PSD,DBG_LOUD,("PSD: Skip tone from %d to %d \n", PSD_skip_start, PSD_skip_stop)); - - for (n=0;n<80;n++) - { - if((n%20)==0) - { - channel = (n/20)*4 + 1; - if(pDM_Odm->SupportICType == ODM_RTL8192D) - { - switch(channel) - { - case 1: - case 9: - group_idx = 0; - break; - case 5: - group_idx = 2; - break; - case 13: - group_idx = 1; - break; - } - if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP)) - { - for(i = 0; i < SYN_Length; i++) - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, SYN[i], bMaskDWord, SYN_group[group_idx][i]); - - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, channel); - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_CHNLBW, 0x3FF, channel); - } - else // DualMAC_DualPHY 2G - { - for(i = 0; i < SYN_Length; i++) - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, SYN[i], bMaskDWord, SYN_group[group_idx][i]); - - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, channel); - } - } - else - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, channel); - } - tone_idx = n%20; - if ((n>=PSD_skip_start) && (n PSD_report[n]) - PSD_report[n] = PSD_report_tmp; - - } - } - - PatchDCTone(pDM_Odm, PSD_report, initial_gain_psd); - - //----end - //1 Turn on RX - //Rx AGC on - ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 1); - ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 1); - //CCK on - ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 1); - //1 Turn on TX - //Resume TX Queue - ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0x00); - //Turn on 3-wire - ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0x0); - //1 Restore Current Settings - //Resume DIG - pDM_Odm->bDMInitialGainEnable= TRUE; - //ODM_SetBBReg(pDM_Odm, 0xc50, 0x7F, initial_gain); - ODM_Write_DIG(pDM_Odm,(u1Byte) initial_gain); - // restore originl center frequency - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, CurrentChannel); - if(pDM_Odm->SupportICType == ODM_RTL8192D) - { - if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP)) - { - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_CHNLBW, bMaskDWord, CurrentChannel); - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x25, bMaskDWord, SYN_RF25); - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x26, bMaskDWord, SYN_RF26); - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x27, bMaskDWord, SYN_RF27); - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2B, bMaskDWord, SYN_RF2B); - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2C, bMaskDWord, SYN_RF2C); - } - else // DualMAC_DualPHY - { - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x25, bMaskDWord, SYN_RF25); - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x26, bMaskDWord, SYN_RF26); - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x27, bMaskDWord, SYN_RF27); - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2B, bMaskDWord, SYN_RF2B); - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2C, bMaskDWord, SYN_RF2C); - } - } - //Turn on CCA - ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, RXIQI); - //Restore RX idle low power - if(RxIdleLowPwr == TRUE) - ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 1); - - psd_cnt++; - //gPrint("psd cnt=%d\n", psd_cnt); - ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD:psd_cnt = %d \n",psd_cnt)); - if (psd_cnt < ReScan) - { - ODM_SetTimer(pDM_Odm, &pRX_HP_Table->PSDTimer, Interval); //ms - } - else - { - psd_cnt = 0; - for(i=0;i<80;i++) - RT_TRACE( COMP_PSD, DBG_LOUD,("psd_report[%d]= %d \n", 2402+i, PSD_report[i])); - //DbgPrint("psd_report[%d]= %d \n", 2402+i, PSD_report[i]); - - GoodChannelDecision(pDM_Odm, PSD_report, PSD_bitmap,RSSI_BT, PSD_bitmap_memory); - - } - } - -VOID -odm_PSD_RXHPCallback( - PRT_TIMER pTimer -) -{ - PADAPTER Adapter = (PADAPTER)pTimer->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; - -#if DEV_BUS_TYPE==RT_PCI_INTERFACE - #if USE_WORKITEM - ODM_ScheduleWorkItem(&pRX_HP_Table->PSDTimeWorkitem); - #else - odm_PSD_RXHP(pDM_Odm); - #endif -#else - ODM_ScheduleWorkItem(&pRX_HP_Table->PSDTimeWorkitem); -#endif - - } - -VOID -odm_PSD_RXHPWorkitemCallback( - IN PVOID pContext - ) -{ - PADAPTER pAdapter = (PADAPTER)pContext; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - - odm_PSD_RXHP(pDM_Odm); -} - -#endif //#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) - -VOID -odm_PathDiversityInit( - IN PDM_ODM_T pDM_Odm -) -{ - if(!(pDM_Odm->SupportAbility & ODM_BB_PATH_DIV)) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_PATH_DIV,ODM_DBG_LOUD,("Return: Not Support PathDiv\n")); - return; - } - -#if RTL8812A_SUPPORT - - if(pDM_Odm->SupportICType & ODM_RTL8812) - ODM_PathDiversityInit_8812A(pDM_Odm); -#endif -} - - -VOID -odm_PathDiversity( - IN PDM_ODM_T pDM_Odm -) -{ - if(!(pDM_Odm->SupportAbility & ODM_BB_PATH_DIV)) - { - ODM_RT_TRACE(pDM_Odm, ODM_COMP_PATH_DIV,ODM_DBG_LOUD,("Return: Not Support PathDiv\n")); - return; - } - -#if RTL8812A_SUPPORT - - if(pDM_Odm->SupportICType & ODM_RTL8812) - ODM_PathDiversity_8812A(pDM_Odm); -#endif -} - - -// -// 2011/12/02 MH Copy from MP oursrc for temporarily test. -// -#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) -VOID -odm_OFDMTXPathDiversity_92C( - IN PADAPTER Adapter) -{ -// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - PRT_WLAN_STA pEntry; - u1Byte i, DefaultRespPath = 0; - s4Byte MinRSSI = 0xFF; - pPD_T pDM_PDTable = &Adapter->DM_PDTable; - pDM_PDTable->OFDMTXPath = 0; - - //1 Default Port - if(pMgntInfo->mAssoc) - { - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: Default port RSSI[0]=%d, RSSI[1]=%d\n", - Adapter->RxStats.RxRSSIPercentage[0], Adapter->RxStats.RxRSSIPercentage[1])); - if(Adapter->RxStats.RxRSSIPercentage[0] > Adapter->RxStats.RxRSSIPercentage[1]) - { - pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath & (~BIT0); - MinRSSI = Adapter->RxStats.RxRSSIPercentage[1]; - DefaultRespPath = 0; - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: Default port Select Path-0\n")); - } - else - { - pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath | BIT0; - MinRSSI = Adapter->RxStats.RxRSSIPercentage[0]; - DefaultRespPath = 1; - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: Default port Select Path-1\n")); - } - //RT_TRACE( COMP_SWAS, DBG_LOUD, ("pDM_PDTable->OFDMTXPath =0x%x\n",pDM_PDTable->OFDMTXPath)); - } - //1 Extension Port - for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) - { - if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) - pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); - else - pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); - - if(pEntry!=NULL) - { - if(pEntry->bAssociated) - { - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: MACID=%d, RSSI_0=%d, RSSI_1=%d\n", - pEntry->AssociatedMacId, pEntry->rssi_stat.RxRSSIPercentage[0], pEntry->rssi_stat.RxRSSIPercentage[1])); - - if(pEntry->rssi_stat.RxRSSIPercentage[0] > pEntry->rssi_stat.RxRSSIPercentage[1]) - { - pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath & ~(BIT(pEntry->AssociatedMacId)); - //pHalData->TXPath = pHalData->TXPath & ~(1<<(pEntry->AssociatedMacId)); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: MACID=%d Select Path-0\n", pEntry->AssociatedMacId)); - if(pEntry->rssi_stat.RxRSSIPercentage[1] < MinRSSI) - { - MinRSSI = pEntry->rssi_stat.RxRSSIPercentage[1]; - DefaultRespPath = 0; - } - } - else - { - pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath | BIT(pEntry->AssociatedMacId); - //pHalData->TXPath = pHalData->TXPath | (1 << (pEntry->AssociatedMacId)); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: MACID=%d Select Path-1\n", pEntry->AssociatedMacId)); - if(pEntry->rssi_stat.RxRSSIPercentage[0] < MinRSSI) - { - MinRSSI = pEntry->rssi_stat.RxRSSIPercentage[0]; - DefaultRespPath = 1; - } - } - } - } - else - { - break; - } - } - - pDM_PDTable->OFDMDefaultRespPath = DefaultRespPath; -} - - -BOOLEAN -odm_IsConnected_92C( - IN PADAPTER Adapter -) -{ - PRT_WLAN_STA pEntry; - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - u4Byte i; - BOOLEAN bConnected=FALSE; - - if(pMgntInfo->mAssoc) - { - bConnected = TRUE; - } - else - { - for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) - { - if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) - pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); - else - pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); - - if(pEntry!=NULL) - { - if(pEntry->bAssociated) - { - bConnected = TRUE; - break; - } - } - else - { - break; - } - } - } - return bConnected; -} - - -VOID -odm_ResetPathDiversity_92C( - IN PADAPTER Adapter -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - pPD_T pDM_PDTable = &Adapter->DM_PDTable; - PRT_WLAN_STA pEntry; - u4Byte i,j; - - pHalData->RSSI_test = FALSE; - pDM_PDTable->CCK_Pkt_Cnt = 0; - pDM_PDTable->OFDM_Pkt_Cnt = 0; - pHalData->CCK_Pkt_Cnt =0; - pHalData->OFDM_Pkt_Cnt =0; - - if(pDM_PDTable->CCKPathDivEnable == TRUE) - PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x01); //RX path = PathAB - - for(i=0; i<2; i++) - { - pDM_PDTable->RSSI_CCK_Path_cnt[i]=0; - pDM_PDTable->RSSI_CCK_Path[i] = 0; - } - for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) - { - if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) - pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); - else - pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); - - if(pEntry!=NULL) - { - pEntry->rssi_stat.CCK_Pkt_Cnt = 0; - pEntry->rssi_stat.OFDM_Pkt_Cnt = 0; - for(j=0; j<2; j++) - { - pEntry->rssi_stat.RSSI_CCK_Path_cnt[j] = 0; - pEntry->rssi_stat.RSSI_CCK_Path[j] = 0; - } - } - else - break; - } -} - - -VOID -odm_CCKTXPathDiversity_92C( - IN PADAPTER Adapter -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); - PRT_WLAN_STA pEntry; - s4Byte MinRSSI = 0xFF; - u1Byte i, DefaultRespPath = 0; -// BOOLEAN bBModePathDiv = FALSE; - pPD_T pDM_PDTable = &Adapter->DM_PDTable; - - //1 Default Port - if(pMgntInfo->mAssoc) - { - if(pHalData->OFDM_Pkt_Cnt == 0) - { - for(i=0; i<2; i++) - { - if(pDM_PDTable->RSSI_CCK_Path_cnt[i] > 1) //Because the first packet is discarded - pDM_PDTable->RSSI_CCK_Path[i] = pDM_PDTable->RSSI_CCK_Path[i] / (pDM_PDTable->RSSI_CCK_Path_cnt[i]-1); - else - pDM_PDTable->RSSI_CCK_Path[i] = 0; - } - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: pDM_PDTable->RSSI_CCK_Path[0]=%d, pDM_PDTable->RSSI_CCK_Path[1]=%d\n", - pDM_PDTable->RSSI_CCK_Path[0], pDM_PDTable->RSSI_CCK_Path[1])); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: pDM_PDTable->RSSI_CCK_Path_cnt[0]=%d, pDM_PDTable->RSSI_CCK_Path_cnt[1]=%d\n", - pDM_PDTable->RSSI_CCK_Path_cnt[0], pDM_PDTable->RSSI_CCK_Path_cnt[1])); - - if(pDM_PDTable->RSSI_CCK_Path[0] > pDM_PDTable->RSSI_CCK_Path[1]) - { - pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & (~BIT0); - MinRSSI = pDM_PDTable->RSSI_CCK_Path[1]; - DefaultRespPath = 0; - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port Select CCK Path-0\n")); - } - else if(pDM_PDTable->RSSI_CCK_Path[0] < pDM_PDTable->RSSI_CCK_Path[1]) - { - pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath | BIT0; - MinRSSI = pDM_PDTable->RSSI_CCK_Path[0]; - DefaultRespPath = 1; - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port Select CCK Path-1\n")); - } - else - { - if((pDM_PDTable->RSSI_CCK_Path[0] != 0) && (pDM_PDTable->RSSI_CCK_Path[0] < MinRSSI)) - { - pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & (~BIT0); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port Select CCK Path-0\n")); - MinRSSI = pDM_PDTable->RSSI_CCK_Path[1]; - DefaultRespPath = 0; - } - else - { - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port unchange CCK Path\n")); - } - } - } - else //Follow OFDM decision - { - pDM_PDTable->CCKTXPath = (pDM_PDTable->CCKTXPath & (~BIT0)) | (pDM_PDTable->OFDMTXPath &BIT0); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Follow OFDM decision, Default port Select CCK Path-%d\n", - pDM_PDTable->CCKTXPath &BIT0)); - } - } - //1 Extension Port - for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) - { - if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) - pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); - else - pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); - - if(pEntry!=NULL) - { - if(pEntry->bAssociated) - { - if(pEntry->rssi_stat.OFDM_Pkt_Cnt == 0) - { - u1Byte j=0; - for(j=0; j<2; j++) - { - if(pEntry->rssi_stat.RSSI_CCK_Path_cnt[j] > 1) - pEntry->rssi_stat.RSSI_CCK_Path[j] = pEntry->rssi_stat.RSSI_CCK_Path[j] / (pEntry->rssi_stat.RSSI_CCK_Path_cnt[j]-1); - else - pEntry->rssi_stat.RSSI_CCK_Path[j] = 0; - } - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d, RSSI_CCK0=%d, RSSI_CCK1=%d\n", - pEntry->AssociatedMacId, pEntry->rssi_stat.RSSI_CCK_Path[0], pEntry->rssi_stat.RSSI_CCK_Path[1])); - - if(pEntry->rssi_stat.RSSI_CCK_Path[0] >pEntry->rssi_stat.RSSI_CCK_Path[1]) - { - pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & ~(BIT(pEntry->AssociatedMacId)); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d Select CCK Path-0\n", pEntry->AssociatedMacId)); - if(pEntry->rssi_stat.RSSI_CCK_Path[1] < MinRSSI) - { - MinRSSI = pEntry->rssi_stat.RSSI_CCK_Path[1]; - DefaultRespPath = 0; - } - } - else if(pEntry->rssi_stat.RSSI_CCK_Path[0] rssi_stat.RSSI_CCK_Path[1]) - { - pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath | BIT(pEntry->AssociatedMacId); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d Select CCK Path-1\n", pEntry->AssociatedMacId)); - if(pEntry->rssi_stat.RSSI_CCK_Path[0] < MinRSSI) - { - MinRSSI = pEntry->rssi_stat.RSSI_CCK_Path[0]; - DefaultRespPath = 1; - } - } - else - { - if((pEntry->rssi_stat.RSSI_CCK_Path[0] != 0) && (pEntry->rssi_stat.RSSI_CCK_Path[0] < MinRSSI)) - { - pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & ~(BIT(pEntry->AssociatedMacId)); - MinRSSI = pEntry->rssi_stat.RSSI_CCK_Path[1]; - DefaultRespPath = 0; - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d Select CCK Path-0\n", pEntry->AssociatedMacId)); - } - else - { - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d unchange CCK Path\n", pEntry->AssociatedMacId)); - } - } - } - else //Follow OFDM decision - { - pDM_PDTable->CCKTXPath = (pDM_PDTable->CCKTXPath & (~(BIT(pEntry->AssociatedMacId)))) | (pDM_PDTable->OFDMTXPath & BIT(pEntry->AssociatedMacId)); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Follow OFDM decision, MACID=%d Select CCK Path-%d\n", - pEntry->AssociatedMacId, (pDM_PDTable->CCKTXPath & BIT(pEntry->AssociatedMacId))>>(pEntry->AssociatedMacId))); - } - } - } - else - { - break; - } - } - - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C:MinRSSI=%d\n",MinRSSI)); - - if(MinRSSI == 0xFF) - DefaultRespPath = pDM_PDTable->CCKDefaultRespPath; - - pDM_PDTable->CCKDefaultRespPath = DefaultRespPath; -} - - - -VOID -odm_PathDiversityAfterLink_92C( - IN PADAPTER Adapter -) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - pPD_T pDM_PDTable = &Adapter->DM_PDTable; - u1Byte DefaultRespPath=0; - - if((!IS_92C_SERIAL(pHalData->VersionID)) || (pHalData->PathDivCfg != 1) || (pHalData->eRFPowerState == eRfOff)) - { - if(pHalData->PathDivCfg == 0) - { - RT_TRACE( COMP_SWAS, DBG_LOUD, ("No ODM_TXPathDiversity()\n")); - } - else - { - RT_TRACE( COMP_SWAS, DBG_LOUD, ("2T ODM_TXPathDiversity()\n")); - } - return; - } - if(!odm_IsConnected_92C(Adapter)) - { - RT_TRACE( COMP_SWAS, DBG_LOUD, ("ODM_TXPathDiversity(): No Connections\n")); - return; - } - - - if(pDM_PDTable->TrainingState == 0) - { - RT_TRACE( COMP_SWAS, DBG_LOUD, ("ODM_TXPathDiversity() ==>\n")); - odm_OFDMTXPathDiversity_92C(Adapter); - - if((pDM_PDTable->CCKPathDivEnable == TRUE) && (pDM_PDTable->OFDM_Pkt_Cnt < 100)) - { - //RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: TrainingState=0\n")); - - if(pDM_PDTable->CCK_Pkt_Cnt > 300) - pDM_PDTable->Timer = 20; - else if(pDM_PDTable->CCK_Pkt_Cnt > 100) - pDM_PDTable->Timer = 60; - else - pDM_PDTable->Timer = 250; - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: timer=%d\n",pDM_PDTable->Timer)); - - PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x00); // RX path = PathA - pDM_PDTable->TrainingState = 1; - pHalData->RSSI_test = TRUE; - ODM_SetTimer( pDM_Odm, &pDM_Odm->CCKPathDiversityTimer, pDM_PDTable->Timer); //ms - } - else - { - pDM_PDTable->CCKTXPath = pDM_PDTable->OFDMTXPath; - DefaultRespPath = pDM_PDTable->OFDMDefaultRespPath; - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_SetRespPath_92C: Skip odm_CCKTXPathDiversity_92C, DefaultRespPath is OFDM\n")); - odm_SetRespPath_92C(Adapter, DefaultRespPath); - odm_ResetPathDiversity_92C(Adapter); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("ODM_TXPathDiversity() <==\n")); - } - } - else if(pDM_PDTable->TrainingState == 1) - { - //RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: TrainingState=1\n")); - PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x05); // RX path = PathB - pDM_PDTable->TrainingState = 2; - ODM_SetTimer( pDM_Odm, &pDM_Odm->CCKPathDiversityTimer, pDM_PDTable->Timer); //ms - } - else - { - //RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: TrainingState=2\n")); - pDM_PDTable->TrainingState = 0; - odm_CCKTXPathDiversity_92C(Adapter); - if(pDM_PDTable->OFDM_Pkt_Cnt != 0) - { - DefaultRespPath = pDM_PDTable->OFDMDefaultRespPath; - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_SetRespPath_92C: DefaultRespPath is OFDM\n")); - } - else - { - DefaultRespPath = pDM_PDTable->CCKDefaultRespPath; - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_SetRespPath_92C: DefaultRespPath is CCK\n")); - } - odm_SetRespPath_92C(Adapter, DefaultRespPath); - odm_ResetPathDiversity_92C(Adapter); - RT_TRACE( COMP_SWAS, DBG_LOUD, ("ODM_TXPathDiversity() <==\n")); - } - -} - - - -VOID -odm_CCKTXPathDiversityCallback( - PRT_TIMER pTimer -) -{ -#if USE_WORKITEM - PADAPTER Adapter = (PADAPTER)pTimer->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; -#else - PADAPTER Adapter = (PADAPTER)pTimer->Adapter; -#endif - -#if DEV_BUS_TYPE==RT_PCI_INTERFACE -#if USE_WORKITEM - PlatformScheduleWorkItem(&pDM_Odm->CCKPathDiversityWorkitem); -#else - odm_PathDiversityAfterLink_92C(Adapter); -#endif -#else - PlatformScheduleWorkItem(&pDM_Odm->CCKPathDiversityWorkitem); -#endif - -} - - -VOID -odm_CCKTXPathDiversityWorkItemCallback( - IN PVOID pContext - ) -{ - PADAPTER Adapter = (PADAPTER)pContext; - - odm_CCKTXPathDiversity_92C(Adapter); -} - - -VOID -ODM_CCKPathDiversityChkPerPktRssi( - PADAPTER Adapter, - BOOLEAN bIsDefPort, - BOOLEAN bMatchBSSID, - PRT_WLAN_STA pEntry, - PRT_RFD pRfd, - pu1Byte pDesc - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - BOOLEAN bCount = FALSE; - pPD_T pDM_PDTable = &Adapter->DM_PDTable; - //BOOLEAN isCCKrate = RX_HAL_IS_CCK_RATE_92C(pDesc); -#if DEV_BUS_TYPE != RT_SDIO_INTERFACE - BOOLEAN isCCKrate = RX_HAL_IS_CCK_RATE(Adapter, pDesc); -#else //below code would be removed if we have verified SDIO - BOOLEAN isCCKrate = IS_HARDWARE_TYPE_8188E(Adapter) ? RX_HAL_IS_CCK_RATE_88E(pDesc) : RX_HAL_IS_CCK_RATE_92C(pDesc); -#endif - - if((pHalData->PathDivCfg != 1) || (pHalData->RSSI_test == FALSE)) - return; - - if(pHalData->RSSI_target==NULL && bIsDefPort && bMatchBSSID) - bCount = TRUE; - else if(pHalData->RSSI_target!=NULL && pEntry!=NULL && pHalData->RSSI_target==pEntry) - bCount = TRUE; - - if(bCount && isCCKrate) - { - if(pDM_PDTable->TrainingState == 1 ) - { - if(pEntry) - { - if(pEntry->rssi_stat.RSSI_CCK_Path_cnt[0] != 0) - pEntry->rssi_stat.RSSI_CCK_Path[0] += pRfd->Status.RxPWDBAll; - pEntry->rssi_stat.RSSI_CCK_Path_cnt[0]++; - } - else - { - if(pDM_PDTable->RSSI_CCK_Path_cnt[0] != 0) - pDM_PDTable->RSSI_CCK_Path[0] += pRfd->Status.RxPWDBAll; - pDM_PDTable->RSSI_CCK_Path_cnt[0]++; - } - } - else if(pDM_PDTable->TrainingState == 2 ) - { - if(pEntry) - { - if(pEntry->rssi_stat.RSSI_CCK_Path_cnt[1] != 0) - pEntry->rssi_stat.RSSI_CCK_Path[1] += pRfd->Status.RxPWDBAll; - pEntry->rssi_stat.RSSI_CCK_Path_cnt[1]++; - } - else - { - if(pDM_PDTable->RSSI_CCK_Path_cnt[1] != 0) - pDM_PDTable->RSSI_CCK_Path[1] += pRfd->Status.RxPWDBAll; - pDM_PDTable->RSSI_CCK_Path_cnt[1]++; - } - } - } -} - - -BOOLEAN -ODM_PathDiversityBeforeLink92C( - //IN PADAPTER Adapter - IN PDM_ODM_T pDM_Odm - ) -{ -#if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE* pHalData = NULL; - PMGNT_INFO pMgntInfo = NULL; - //pSWAT_T pDM_SWAT_Table = &Adapter->DM_SWAT_Table; - pPD_T pDM_PDTable = NULL; - - s1Byte Score = 0; - PRT_WLAN_BSS pTmpBssDesc; - PRT_WLAN_BSS pTestBssDesc; - - u1Byte target_chnl = 0; - u1Byte index; - - if (pDM_Odm->Adapter == NULL) //For BSOD when plug/unplug fast. //By YJ,120413 - { // The ODM structure is not initialized. - return FALSE; - } - pHalData = GET_HAL_DATA(Adapter); - pMgntInfo = &Adapter->MgntInfo; - pDM_PDTable = &Adapter->DM_PDTable; - - // Condition that does not need to use path diversity. - if((!IS_92C_SERIAL(pHalData->VersionID)) || (pHalData->PathDivCfg!=1) || pMgntInfo->AntennaTest ) - { - RT_TRACE(COMP_SWAS, DBG_LOUD, - ("ODM_PathDiversityBeforeLink92C(): No PathDiv Mechanism before link.\n")); - return FALSE; - } - - // Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF. - PlatformAcquireSpinLock(Adapter, RT_RF_STATE_SPINLOCK); - if(pHalData->eRFPowerState!=eRfOn || pMgntInfo->RFChangeInProgress || pMgntInfo->bMediaConnect) - { - PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); - - RT_TRACE(COMP_SWAS, DBG_LOUD, - ("ODM_PathDiversityBeforeLink92C(): RFChangeInProgress(%x), eRFPowerState(%x)\n", - pMgntInfo->RFChangeInProgress, - pHalData->eRFPowerState)); - - //pDM_SWAT_Table->SWAS_NoLink_State = 0; - pDM_PDTable->PathDiv_NoLink_State = 0; - - return FALSE; - } - else - { - PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); - } - - //1 Run AntDiv mechanism "Before Link" part. - //if(pDM_SWAT_Table->SWAS_NoLink_State == 0) - if(pDM_PDTable->PathDiv_NoLink_State == 0) - { - //1 Prepare to do Scan again to check current antenna state. - - // Set check state to next step. - //pDM_SWAT_Table->SWAS_NoLink_State = 1; - pDM_PDTable->PathDiv_NoLink_State = 1; - - // Copy Current Scan list. - Adapter->MgntInfo.tmpNumBssDesc = pMgntInfo->NumBssDesc; - PlatformMoveMemory((PVOID)Adapter->MgntInfo.tmpbssDesc, (PVOID)pMgntInfo->bssDesc, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC); - - // Switch Antenna to another one. - if(pDM_PDTable->DefaultRespPath == 0) - { - PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x05); // TRX path = PathB - odm_SetRespPath_92C(Adapter, 1); - pDM_PDTable->OFDMTXPath = 0xFFFFFFFF; - pDM_PDTable->CCKTXPath = 0xFFFFFFFF; - } - else - { - PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x00); // TRX path = PathA - odm_SetRespPath_92C(Adapter, 0); - pDM_PDTable->OFDMTXPath = 0x0; - pDM_PDTable->CCKTXPath = 0x0; - } -#if 0 - - pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; - pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==Antenna_A)?Antenna_B:Antenna_A; - - RT_TRACE(COMP_SWAS, DBG_LOUD, - ("ODM_SwAntDivCheckBeforeLink: Change to Ant(%s) for testing.\n", (pDM_SWAT_Table->CurAntenna==Antenna_A)?"A":"B")); - //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna); - pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); - PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); -#endif - - // Go back to scan function again. - RT_TRACE(COMP_SWAS, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C: Scan one more time\n")); - pMgntInfo->ScanStep=0; - target_chnl = odm_SwAntDivSelectScanChnl(Adapter); - odm_SwAntDivConstructScanChnl(Adapter, target_chnl); - PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5); - - return TRUE; - } - else - { - //1 ScanComple() is called after antenna swiched. - //1 Check scan result and determine which antenna is going - //1 to be used. - - for(index=0; indexMgntInfo.tmpNumBssDesc; index++) - { - pTmpBssDesc = &(Adapter->MgntInfo.tmpbssDesc[index]); - pTestBssDesc = &(pMgntInfo->bssDesc[index]); - - if(PlatformCompareMemory(pTestBssDesc->bdBssIdBuf, pTmpBssDesc->bdBssIdBuf, 6)!=0) - { - RT_TRACE(COMP_SWAS, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C(): ERROR!! This shall not happen.\n")); - continue; - } - - if(pTmpBssDesc->RecvSignalPower > pTestBssDesc->RecvSignalPower) - { - RT_TRACE(COMP_SWAS, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C: Compare scan entry: Score++\n")); - RT_PRINT_STR(COMP_SWAS, DBG_LOUD, "SSID: ", pTestBssDesc->bdSsIdBuf, pTestBssDesc->bdSsIdLen); - RT_TRACE(COMP_SWAS, DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); - - Score++; - PlatformMoveMemory(pTestBssDesc, pTmpBssDesc, sizeof(RT_WLAN_BSS)); - } - else if(pTmpBssDesc->RecvSignalPower < pTestBssDesc->RecvSignalPower) - { - RT_TRACE(COMP_SWAS, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C: Compare scan entry: Score--\n")); - RT_PRINT_STR(COMP_SWAS, DBG_LOUD, "SSID: ", pTestBssDesc->bdSsIdBuf, pTestBssDesc->bdSsIdLen); - RT_TRACE(COMP_SWAS, DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); - Score--; - } - - } - - if(pMgntInfo->NumBssDesc!=0 && Score<=0) - { - RT_TRACE(COMP_SWAS, DBG_LOUD, - ("ODM_PathDiversityBeforeLink92C(): DefaultRespPath=%d\n", pDM_PDTable->DefaultRespPath)); - - //pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; - } - else - { - RT_TRACE(COMP_SWAS, DBG_LOUD, - ("ODM_PathDiversityBeforeLink92C(): DefaultRespPath=%d\n", pDM_PDTable->DefaultRespPath)); - - if(pDM_PDTable->DefaultRespPath == 0) - { - pDM_PDTable->OFDMTXPath = 0xFFFFFFFF; - pDM_PDTable->CCKTXPath = 0xFFFFFFFF; - odm_SetRespPath_92C(Adapter, 1); - } - else - { - pDM_PDTable->OFDMTXPath = 0x0; - pDM_PDTable->CCKTXPath = 0x0; - odm_SetRespPath_92C(Adapter, 0); - } - PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x01); // RX path = PathAB - - //pDM_SWAT_Table->CurAntenna = pDM_SWAT_Table->PreAntenna; - - //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna); - //pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); - //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); - } - - // Check state reset to default and wait for next time. - //pDM_SWAT_Table->SWAS_NoLink_State = 0; - pDM_PDTable->PathDiv_NoLink_State = 0; - - return FALSE; - } -#else - return FALSE; -#endif - -} - - -//Neil Chen---2011--06--22 -//----92D Path Diversity----// -//#ifdef PathDiv92D -//================================== -//3 Path Diversity -//================================== -// -// 20100514 Luke/Joseph: -// Add new function for antenna diversity after link. -// This is the main function of antenna diversity after link. -// This function is called in HalDmWatchDog() and ODM_SwAntDivChkAntSwitchCallback(). -// HalDmWatchDog() calls this function with SWAW_STEP_PEAK to initialize the antenna test. -// In SWAW_STEP_PEAK, another antenna and a 500ms timer will be set for testing. -// After 500ms, ODM_SwAntDivChkAntSwitchCallback() calls this function to compare the signal just -// listened on the air with the RSSI of original antenna. -// It chooses the antenna with better RSSI. -// There is also a aged policy for error trying. Each error trying will cost more 5 seconds waiting -// penalty to get next try. -// -// -// 20100503 Joseph: -// Add new function SwAntDivCheck8192C(). -// This is the main function of Antenna diversity function before link. -// Mainly, it just retains last scan result and scan again. -// After that, it compares the scan result to see which one gets better RSSI. -// It selects antenna with better receiving power and returns better scan result. -// - - -// -// 20100514 Luke/Joseph: -// This function is used to gather the RSSI information for antenna testing. -// It selects the RSSI of the peer STA that we want to know. -// -VOID -ODM_PathDivChkPerPktRssi( - PADAPTER Adapter, - BOOLEAN bIsDefPort, - BOOLEAN bMatchBSSID, - PRT_WLAN_STA pEntry, - PRT_RFD pRfd - ) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - BOOLEAN bCount = FALSE; - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - - if(pHalData->RSSI_target==NULL && bIsDefPort && bMatchBSSID) - bCount = TRUE; - else if(pHalData->RSSI_target!=NULL && pEntry!=NULL && pHalData->RSSI_target==pEntry) - bCount = TRUE; - - if(bCount) - { - //1 RSSI for SW Antenna Switch - if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) - { - pHalData->RSSI_sum_A += pRfd->Status.RxPWDBAll; - pHalData->RSSI_cnt_A++; - } - else - { - pHalData->RSSI_sum_B += pRfd->Status.RxPWDBAll; - pHalData->RSSI_cnt_B++; - - } - } -} - - - -// -// 20100514 Luke/Joseph: -// Add new function to reset antenna diversity state after link. -// -VOID -ODM_PathDivRestAfterLink( - IN PDM_ODM_T pDM_Odm - ) -{ - PADAPTER Adapter=pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - - pHalData->RSSI_cnt_A = 0; - pHalData->RSSI_cnt_B = 0; - pHalData->RSSI_test = FALSE; - pDM_SWAT_Table->try_flag = 0x0; // NOT 0xff - pDM_SWAT_Table->RSSI_Trying = 0; - pDM_SWAT_Table->SelectAntennaMap=0xAA; - pDM_SWAT_Table->CurAntenna = MAIN_ANT; -} - - -// -// 20100514 Luke/Joseph: -// Callback function for 500ms antenna test trying. -// -VOID -odm_PathDivChkAntSwitchCallback( - PRT_TIMER pTimer -) -{ - PADAPTER Adapter = (PADAPTER)pTimer->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - -#if DEV_BUS_TYPE==RT_PCI_INTERFACE - -#if USE_WORKITEM - PlatformScheduleWorkItem(&pDM_Odm->PathDivSwitchWorkitem); -#else - odm_PathDivChkAntSwitch(pDM_Odm); -#endif -#else - PlatformScheduleWorkItem(&pDM_Odm->PathDivSwitchWorkitem); -#endif - -//odm_SwAntDivChkAntSwitch(Adapter, SWAW_STEP_DETERMINE); - -} - - -VOID -odm_PathDivChkAntSwitchWorkitemCallback( - IN PVOID pContext - ) -{ - PADAPTER pAdapter = (PADAPTER)pContext; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; - - odm_PathDivChkAntSwitch(pDM_Odm); -} - - - //MAC0_ACCESS_PHY1 - -// 2011-06-22 Neil Chen & Gary Hsin -// Refer to Jr.Luke's SW ANT DIV -// 92D Path Diversity Main function -// refer to 88C software antenna diversity -// -VOID -odm_PathDivChkAntSwitch( - PDM_ODM_T pDM_Odm - //PADAPTER Adapter, - //u1Byte Step -) -{ - PADAPTER Adapter = pDM_Odm->Adapter; - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; - - - pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; - s4Byte curRSSI=100, RSSI_A, RSSI_B; - u1Byte nextAntenna=AUX_ANT; - static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; - u8Byte curTxOkCnt, curRxOkCnt; - static u8Byte TXByteCnt_A=0, TXByteCnt_B=0, RXByteCnt_A=0, RXByteCnt_B=0; - u8Byte CurByteCnt=0, PreByteCnt=0; - static u1Byte TrafficLoad = TRAFFIC_LOW; - u1Byte Score_A=0, Score_B=0; - u1Byte i=0x0; - // Neil Chen - static u1Byte pathdiv_para=0x0; - static u1Byte switchfirsttime=0x00; - // u1Byte regB33 = (u1Byte) PHY_QueryBBReg(Adapter, 0xB30,BIT27); - u1Byte regB33 = (u1Byte)ODM_GetBBReg(pDM_Odm, PATHDIV_REG, BIT27); - - - //u1Byte reg637 =0x0; - static u1Byte fw_value=0x0; - //u8Byte curTxOkCnt_tmp, curRxOkCnt_tmp; - PADAPTER BuddyAdapter = Adapter->BuddyAdapter; // another adapter MAC - // Path Diversity //Neil Chen--2011--06--22 - - //u1Byte PathDiv_Trigger = (u1Byte) PHY_QueryBBReg(Adapter, 0xBA0,BIT31); - u1Byte PathDiv_Trigger = (u1Byte) ODM_GetBBReg(pDM_Odm, PATHDIV_TRI,BIT31); - u1Byte PathDiv_Enable = pHalData->bPathDiv_Enable; - - - //DbgPrint("Path Div PG Value:%x \n",PathDiv_Enable); - if((BuddyAdapter==NULL)||(!PathDiv_Enable)||(PathDiv_Trigger)||(pHalData->CurrentBandType == BAND_ON_2_4G)) - { - return; - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD,("===================>odm_PathDivChkAntSwitch()\n")); - - // The first time to switch path excluding 2nd, 3rd, ....etc.... - if(switchfirsttime==0) - { - if(regB33==0) - { - pDM_SWAT_Table->CurAntenna = MAIN_ANT; // Default MAC0_5G-->Path A (current antenna) - } - } - - // Condition that does not need to use antenna diversity. - if(pDM_Odm->SupportICType != ODM_RTL8192D) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_PathDiversityMechanims(): No PathDiv Mechanism.\n")); - return; - } - - // Radio off: Status reset to default and return. - if(pHalData->eRFPowerState==eRfOff) - { - //ODM_SwAntDivRestAfterLink(Adapter); - return; - } - - /* - // Handling step mismatch condition. - // Peak step is not finished at last time. Recover the variable and check again. - if( Step != pDM_SWAT_Table->try_flag ) - { - ODM_SwAntDivRestAfterLink(Adapter); - } */ - - if(pDM_SWAT_Table->try_flag == 0xff) - { - // Select RSSI checking target - if(pMgntInfo->mAssoc && !ACTING_AS_AP(Adapter)) - { - // Target: Infrastructure mode AP. - pHalData->RSSI_target = NULL; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_PathDivMechanism(): RSSI_target is DEF AP!\n")); - } - else - { - u1Byte index = 0; - PRT_WLAN_STA pEntry = NULL; - PADAPTER pTargetAdapter = NULL; - - if( pMgntInfo->mIbss || ACTING_AS_AP(Adapter) ) - { - // Target: AP/IBSS peer. - pTargetAdapter = Adapter; - } - else if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) - { - // Target: VWIFI peer. - pTargetAdapter = GetFirstExtAdapter(Adapter); - } - - if(pTargetAdapter != NULL) - { - for(index=0; indexbAssociated) - break; - } - } - } - - if(pEntry == NULL) - { - ODM_PathDivRestAfterLink(pDM_Odm); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): No Link.\n")); - return; - } - else - { - pHalData->RSSI_target = pEntry; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): RSSI_target is PEER STA\n")); - } - } - - pHalData->RSSI_cnt_A = 0; - pHalData->RSSI_cnt_B = 0; - pDM_SWAT_Table->try_flag = 0; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): Set try_flag to 0 prepare for peak!\n")); - return; - } - else - { - // 1st step - curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - lastTxOkCnt; - curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - lastRxOkCnt; - lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; - lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; - - if(pDM_SWAT_Table->try_flag == 1) // Training State - { - if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) - { - TXByteCnt_A += curTxOkCnt; - RXByteCnt_A += curRxOkCnt; - } - else - { - TXByteCnt_B += curTxOkCnt; - RXByteCnt_B += curRxOkCnt; - } - - nextAntenna = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? AUX_ANT : MAIN_ANT; - pDM_SWAT_Table->RSSI_Trying--; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: RSSI_Trying = %d\n",pDM_SWAT_Table->RSSI_Trying)); - if(pDM_SWAT_Table->RSSI_Trying == 0) - { - CurByteCnt = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? (TXByteCnt_A+RXByteCnt_A) : (TXByteCnt_B+RXByteCnt_B); - PreByteCnt = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? (TXByteCnt_B+RXByteCnt_B) : (TXByteCnt_A+RXByteCnt_A); - - if(TrafficLoad == TRAFFIC_HIGH) - { - //CurByteCnt = PlatformDivision64(CurByteCnt, 9); - PreByteCnt =PreByteCnt*9; - } - else if(TrafficLoad == TRAFFIC_LOW) - { - //CurByteCnt = PlatformDivision64(CurByteCnt, 2); - PreByteCnt =PreByteCnt*2; - } - if(pHalData->RSSI_cnt_A > 0) - RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; - else - RSSI_A = 0; - if(pHalData->RSSI_cnt_B > 0) - RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; - else - RSSI_B = 0; - curRSSI = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? RSSI_A : RSSI_B; - pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? RSSI_B : RSSI_A; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: PreRSSI = %d, CurRSSI = %d\n",pDM_SWAT_Table->PreRSSI, curRSSI)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: preAntenna= %s, curAntenna= %s \n", - (pDM_SWAT_Table->PreAntenna == MAIN_ANT?"MAIN":"AUX"), (pDM_SWAT_Table->CurAntenna == MAIN_ANT?"MAIN":"AUX"))); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", - RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B)); - } - - } - else // try_flag=0 - { - - if(pHalData->RSSI_cnt_A > 0) - RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; - else - RSSI_A = 0; - if(pHalData->RSSI_cnt_B > 0) - RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; - else - RSSI_B = 0; - curRSSI = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? RSSI_A : RSSI_B; - pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->PreAntenna == MAIN_ANT)? RSSI_A : RSSI_B; - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: PreRSSI = %d, CurRSSI = %d\n", pDM_SWAT_Table->PreRSSI, curRSSI)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: preAntenna= %s, curAntenna= %s \n", - (pDM_SWAT_Table->PreAntenna == MAIN_ANT?"MAIN":"AUX"), (pDM_SWAT_Table->CurAntenna == MAIN_ANT?"MAIN":"AUX"))); - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", - RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B)); - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curTxOkCnt = %d\n", curTxOkCnt)); - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curRxOkCnt = %d\n", curRxOkCnt)); - } - - //1 Trying State - if((pDM_SWAT_Table->try_flag == 1)&&(pDM_SWAT_Table->RSSI_Trying == 0)) - { - - if(pDM_SWAT_Table->TestMode == TP_MODE) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: TestMode = TP_MODE")); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH= TRY:CurByteCnt = %"i64fmt"d,", CurByteCnt)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH= TRY:PreByteCnt = %"i64fmt"d\n",PreByteCnt)); - if(CurByteCnt < PreByteCnt) - { - if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) - pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; - else - pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; - } - else - { - if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) - pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; - else - pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; - } - for (i= 0; i<8; i++) - { - if(((pDM_SWAT_Table->SelectAntennaMap>>i)&BIT0) == 1) - Score_A++; - else - Score_B++; - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("SelectAntennaMap=%x\n ",pDM_SWAT_Table->SelectAntennaMap)); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Score_A=%d, Score_B=%d\n", Score_A, Score_B)); - - if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) - { - nextAntenna = (Score_A >= Score_B)?MAIN_ANT:AUX_ANT; - } - else - { - nextAntenna = (Score_B >= Score_A)?AUX_ANT:MAIN_ANT; - } - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: nextAntenna=%s\n",(nextAntenna==MAIN_ANT)?"MAIN":"AUX")); - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: preAntenna= %s, curAntenna= %s \n", - (pDM_SWAT_Table->PreAntenna == MAIN_ANT?"MAIN":"AUX"), (pDM_SWAT_Table->CurAntenna == MAIN_ANT?"MAIN":"AUX"))); - - if(nextAntenna != pDM_SWAT_Table->CurAntenna) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Switch back to another antenna")); - } - else - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: current anntena is good\n")); - } - } - - - if(pDM_SWAT_Table->TestMode == RSSI_MODE) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: TestMode = RSSI_MODE")); - pDM_SWAT_Table->SelectAntennaMap=0xAA; - if(curRSSI < pDM_SWAT_Table->PreRSSI) //Current antenna is worse than previous antenna - { - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("SWAS: Switch back to another antenna")); - nextAntenna = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)?AUX_ANT : MAIN_ANT; - } - else // current anntena is good - { - nextAntenna =pDM_SWAT_Table->CurAntenna; - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("SWAS: current anntena is good\n")); - } - } - - pDM_SWAT_Table->try_flag = 0; - pHalData->RSSI_test = FALSE; - pHalData->RSSI_sum_A = 0; - pHalData->RSSI_cnt_A = 0; - pHalData->RSSI_sum_B = 0; - pHalData->RSSI_cnt_B = 0; - TXByteCnt_A = 0; - TXByteCnt_B = 0; - RXByteCnt_A = 0; - RXByteCnt_B = 0; - - } - - //1 Normal State - else if(pDM_SWAT_Table->try_flag == 0) - { - if(TrafficLoad == TRAFFIC_HIGH) - { - if ((curTxOkCnt+curRxOkCnt) > 3750000)//if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000) - TrafficLoad = TRAFFIC_HIGH; - else - TrafficLoad = TRAFFIC_LOW; - } - else if(TrafficLoad == TRAFFIC_LOW) - { - if ((curTxOkCnt+curRxOkCnt) > 3750000)//if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000) - TrafficLoad = TRAFFIC_HIGH; - else - TrafficLoad = TRAFFIC_LOW; - } - if(TrafficLoad == TRAFFIC_HIGH) - pDM_SWAT_Table->bTriggerAntennaSwitch = 0; - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Normal:TrafficLoad = %llu\n", curTxOkCnt+curRxOkCnt)); + RSSI_BT = initial_gain_psd; + //SSBT = RSSI_BT; + + //RT_TRACE( COMP_PSD, DBG_LOUD,("PSD: SSBT= %d\n", SSBT)); + RT_TRACE( COMP_PSD, DBG_LOUD,("PSD: initial gain= 0x%x\n", initial_gain_psd)); + + pDM_Odm->bDMInitialGainEnable = FALSE; + initial_gain = ODM_GetBBReg(pDM_Odm, 0xc50, bMaskDWord) & 0x7F; + //ODM_SetBBReg(pDM_Odm, 0xc50, 0x7F, initial_gain_psd); + ODM_Write_DIG(pDM_Odm, initial_gain_psd); + //1 Turn off 3-wire + ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0xF); - //Prepare To Try Antenna - nextAntenna = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? AUX_ANT : MAIN_ANT; - pDM_SWAT_Table->try_flag = 1; - pHalData->RSSI_test = TRUE; - if((curRxOkCnt+curTxOkCnt) > 1000) - { -#if DEV_BUS_TYPE==RT_PCI_INTERFACE - pDM_SWAT_Table->RSSI_Trying = 4; -#else - pDM_SWAT_Table->RSSI_Trying = 2; -#endif - pDM_SWAT_Table->TestMode = TP_MODE; - } - else - { - pDM_SWAT_Table->RSSI_Trying = 2; - pDM_SWAT_Table->TestMode = RSSI_MODE; + //pts value = 128, 256, 512, 1024 + pts = 128; - } - - //RT_TRACE(COMP_SWAS, DBG_LOUD, ("SWAS: Normal State -> Begin Trying!\n")); - pHalData->RSSI_sum_A = 0; - pHalData->RSSI_cnt_A = 0; - pHalData->RSSI_sum_B = 0; - pHalData->RSSI_cnt_B = 0; - } // end of try_flag=0 + if(pts == 128) + { + ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x0); + start_point = 64; + stop_point = 192; } - - //1 4.Change TRX antenna - if(nextAntenna != pDM_SWAT_Table->CurAntenna) + else if(pts == 256) { - - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Change TX Antenna!\n ")); - //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, nextAntenna); for 88C - if(nextAntenna==MAIN_ANT) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Next Antenna is RF PATH A\n ")); - pathdiv_para = 0x02; //02 to switchback to RF path A - fw_value = 0x03; -#if DEV_BUS_TYPE==RT_PCI_INTERFACE - odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); -#else - ODM_FillH2CCmd(Adapter, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); -#endif - } - else if(nextAntenna==AUX_ANT) - { - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Next Antenna is RF PATH B\n ")); - if(switchfirsttime==0) // First Time To Enter Path Diversity - { - switchfirsttime=0x01; - pathdiv_para = 0x00; - fw_value=0x00; // to backup RF Path A Releated Registers - -#if DEV_BUS_TYPE==RT_PCI_INTERFACE - odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); -#else - ODM_FillH2CCmd(Adapter, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); - //for(u1Byte n=0; n<80,n++) - //{ - //delay_us(500); - ODM_delay_ms(500); - odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); - - fw_value=0x01; // to backup RF Path A Releated Registers - ODM_FillH2CCmd(Adapter, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); -#endif - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: FIRST TIME To DO PATH SWITCH!\n ")); - } - else - { - pathdiv_para = 0x01; - fw_value = 0x02; -#if DEV_BUS_TYPE==RT_PCI_INTERFACE - odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); -#else - ODM_FillH2CCmd(Adapter, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); -#endif - } - } - // odm_PathDiversity_8192D(Adapter, pathdiv_para); + ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x1); + start_point = 128; + stop_point = 384; + } + else if(pts == 512) + { + ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x2); + start_point = 256; + stop_point = 768; + } + else + { + ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x3); + start_point = 512; + stop_point = 1536; } + - //1 5.Reset Statistics - pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; - pDM_SWAT_Table->CurAntenna = nextAntenna; - pDM_SWAT_Table->PreRSSI = curRSSI; +//3 Skip WLAN channels if WLAN busy + curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast) - lastTxOkCnt; + curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast) - lastRxOkCnt; + lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast); + lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast); + + PSD_skip_start=80; + PSD_skip_stop = 0; + wlan_channel = CurrentChannel & 0x0f; - //1 6.Set next timer + RT_TRACE(COMP_PSD,DBG_LOUD,("PSD: current channel: %x, BW:%d \n", wlan_channel, Is40MHz)); + + if((curRxOkCnt+curTxOkCnt) > 1000) + { + PSD_skip_start = (wlan_channel-1)*5 -Is40MHz*10; + PSD_skip_stop = PSD_skip_start + (1+Is40MHz)*20; + } - if(pDM_SWAT_Table->RSSI_Trying == 0) - return; + RT_TRACE(COMP_PSD,DBG_LOUD,("PSD: Skip tone from %d to %d \n", PSD_skip_start, PSD_skip_stop)); - if(pDM_SWAT_Table->RSSI_Trying%2 == 0) - { - if(pDM_SWAT_Table->TestMode == TP_MODE) - { - if(TrafficLoad == TRAFFIC_HIGH) + for (n=0;n<80;n++) + { + if((n%20)==0) + { + channel = (n/20)*4 + 1; + if(pDM_Odm->SupportICType == ODM_RTL8192D) { -#if DEV_BUS_TYPE==RT_PCI_INTERFACE - ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 10 ); //ms - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 10 ms\n")); -#else - ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 20 ); //ms - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 20 ms\n")); -#endif - } - else if(TrafficLoad == TRAFFIC_LOW) + switch(channel) + { + case 1: + case 9: + group_idx = 0; + break; + case 5: + group_idx = 2; + break; + case 13: + group_idx = 1; + break; + } + if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP)) + { + for(i = 0; i < SYN_Length; i++) + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, SYN[i], bMaskDWord, SYN_group[group_idx][i]); + + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, channel); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_CHNLBW, 0x3FF, channel); + } + else // DualMAC_DualPHY 2G { - ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 50 ); //ms - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 50 ms\n")); + for(i = 0; i < SYN_Length; i++) + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, SYN[i], bMaskDWord, SYN_group[group_idx][i]); + + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, channel); + } } + else + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, channel); + } + tone_idx = n%20; + if ((n>=PSD_skip_start) && (nPathDivSwitchTimer, 500 ); //ms - ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 500 ms\n")); - } - } - else - { - if(pDM_SWAT_Table->TestMode == TP_MODE) + else { - if(TrafficLoad == TRAFFIC_HIGH) + PSD_report_tmp = GetPSDData(pDM_Odm, idx[tone_idx], initial_gain_psd); + + if ( PSD_report_tmp > PSD_report[n]) + PSD_report[n] = PSD_report_tmp; -#if DEV_BUS_TYPE==RT_PCI_INTERFACE - ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 90 ); //ms - //ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 90 ms\n")); -#else - ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 180); //ms -#endif - else if(TrafficLoad == TRAFFIC_LOW) - ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 100 ); //ms } - else - ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 500 ); //ms } -} - -//================================================== -//3 PathDiv End -//================================================== - -VOID -odm_SetRespPath_92C( - IN PADAPTER Adapter, - IN u1Byte DefaultRespPath - ) -{ - pPD_T pDM_PDTable = &Adapter->DM_PDTable; - RT_TRACE( COMP_SWAS, DBG_LOUD, ("odm_SetRespPath_92C: Select Response Path=%d\n",DefaultRespPath)); - if(DefaultRespPath != pDM_PDTable->DefaultRespPath) + PatchDCTone(pDM_Odm, PSD_report, initial_gain_psd); + + //----end + //1 Turn on RX + //Rx AGC on + ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 1); + ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 1); + //CCK on + ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 1); + //1 Turn on TX + //Resume TX Queue + ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0x00); + //Turn on 3-wire + ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0x0); + //1 Restore Current Settings + //Resume DIG + pDM_Odm->bDMInitialGainEnable= TRUE; + //ODM_SetBBReg(pDM_Odm, 0xc50, 0x7F, initial_gain); + ODM_Write_DIG(pDM_Odm,(u1Byte) initial_gain); + // restore originl center frequency + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, CurrentChannel); + if(pDM_Odm->SupportICType == ODM_RTL8192D) { - if(DefaultRespPath == 0) + if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP)) { - PlatformEFIOWrite1Byte(Adapter, 0x6D8, (PlatformEFIORead1Byte(Adapter, 0x6D8)&0xc0)|0x15); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_CHNLBW, bMaskDWord, CurrentChannel); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x25, bMaskDWord, SYN_RF25); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x26, bMaskDWord, SYN_RF26); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x27, bMaskDWord, SYN_RF27); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2B, bMaskDWord, SYN_RF2B); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2C, bMaskDWord, SYN_RF2C); } - else + else // DualMAC_DualPHY { - PlatformEFIOWrite1Byte(Adapter, 0x6D8, (PlatformEFIORead1Byte(Adapter, 0x6D8)&0xc0)|0x2A); - } + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x25, bMaskDWord, SYN_RF25); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x26, bMaskDWord, SYN_RF26); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x27, bMaskDWord, SYN_RF27); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2B, bMaskDWord, SYN_RF2B); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2C, bMaskDWord, SYN_RF2C); + } } - pDM_PDTable->DefaultRespPath = DefaultRespPath; -} + //Turn on CCA + ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, RXIQI); + //Restore RX idle low power + if(RxIdleLowPwr == TRUE) + ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 1); + + psd_cnt++; + //gPrint("psd cnt=%d\n", psd_cnt); + ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD:psd_cnt = %d \n",psd_cnt)); + if (psd_cnt < ReScan) + { + ODM_SetTimer(pDM_Odm, &pRX_HP_Table->PSDTimer, Interval); //ms + } + else + { + psd_cnt = 0; + for(i=0;i<80;i++) + RT_TRACE( COMP_PSD, DBG_LOUD,("psd_report[%d]= %d \n", 2402+i, PSD_report[i])); + //DbgPrint("psd_report[%d]= %d \n", 2402+i, PSD_report[i]); + + GoodChannelDecision(pDM_Odm, PSD_report, PSD_bitmap,RSSI_BT, PSD_bitmap_memory); + } + } VOID -ODM_FillTXPathInTXDESC( - IN PADAPTER Adapter, - IN PRT_TCB pTcb, - IN pu1Byte pDesc +odm_PSD_RXHPCallback( + PRT_TIMER pTimer ) { + PADAPTER Adapter = (PADAPTER)pTimer->Adapter; HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u4Byte TXPath; - pPD_T pDM_PDTable = &Adapter->DM_PDTable; - - //2011.09.05 Add by Luke Lee for path diversity - if(pHalData->PathDivCfg == 1) - { - TXPath = (pDM_PDTable->OFDMTXPath >> pTcb->macId) & BIT0; - //RT_TRACE( COMP_SWAS, DBG_LOUD, ("Fill TXDESC: macID=%d, TXPath=%d\n", pTcb->macId, TXPath)); - //SET_TX_DESC_TX_ANT_CCK(pDesc,TXPath); - if(TXPath == 0) - { - SET_TX_DESC_TX_ANTL_92C(pDesc,1); - SET_TX_DESC_TX_ANT_HT_92C(pDesc,1); - } - else - { - SET_TX_DESC_TX_ANTL_92C(pDesc,2); - SET_TX_DESC_TX_ANT_HT_92C(pDesc,2); - } - TXPath = (pDM_PDTable->CCKTXPath >> pTcb->macId) & BIT0; - if(TXPath == 0) - { - SET_TX_DESC_TX_ANT_CCK_92C(pDesc,1); - } - else - { - SET_TX_DESC_TX_ANT_CCK_92C(pDesc,2); - } + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; + +#if DEV_BUS_TYPE==RT_PCI_INTERFACE + #if USE_WORKITEM + ODM_ScheduleWorkItem(&pRX_HP_Table->PSDTimeWorkitem); + #else + odm_PSD_RXHP(pDM_Odm); + #endif +#else + ODM_ScheduleWorkItem(&pRX_HP_Table->PSDTimeWorkitem); +#endif + } -} -//Only for MP //Neil Chen--2012--0502-- VOID -odm_PathDivInit_92D( -IN PDM_ODM_T pDM_Odm) +odm_PSD_RXHPWorkitemCallback( + IN PVOID pContext + ) { - pPATHDIV_PARA pathIQK = &pDM_Odm->pathIQK; - - pathIQK->org_2g_RegC14=0x0; - pathIQK->org_2g_RegC4C=0x0; - pathIQK->org_2g_RegC80=0x0; - pathIQK->org_2g_RegC94=0x0; - pathIQK->org_2g_RegCA0=0x0; - pathIQK->org_5g_RegC14=0x0; - pathIQK->org_5g_RegCA0=0x0; - pathIQK->org_5g_RegE30=0x0; - pathIQK->swt_2g_RegC14=0x0; - pathIQK->swt_2g_RegC4C=0x0; - pathIQK->swt_2g_RegC80=0x0; - pathIQK->swt_2g_RegC94=0x0; - pathIQK->swt_2g_RegCA0=0x0; - pathIQK->swt_5g_RegC14=0x0; - pathIQK->swt_5g_RegCA0=0x0; - pathIQK->swt_5g_RegE30=0x0; - + PADAPTER pAdapter = (PADAPTER)pContext; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + + odm_PSD_RXHP(pDM_Odm); } -#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +#endif //#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + +//Remove PathDiversity related function to odm_PathDiv.c #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN| ODM_CE)) @@ -13625,7 +5971,7 @@ ODM_SingleDualAntennaDetection( ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x0, 0xFFFFF, 0x50008); //IQK Single tone start - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80800000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x808000); ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000); @@ -13679,7 +6025,7 @@ ODM_SingleDualAntennaDetection( } //Close IQK Single Tone function - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); //1 Return to antanna A if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C)) diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm.h old mode 100644 new mode 100755 index 5b198608dc73..3144724646de --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm.h @@ -22,6 +22,16 @@ #ifndef __HALDMOUTSRC_H__ #define __HALDMOUTSRC_H__ + +#include "odm_EdcaTurboCheck.h" +#include "odm_DIG.h" +#include "odm_PathDiv.h" +#include "odm_RaInfo.h" +#include "odm_DynamicBBPowerSaving.h" +#include "odm_DynamicTxPower.h" +#include "odm_CfoTracking.h" +#include "odm_NoiseMonitor.h" + //============================================================ // Definition //============================================================ @@ -110,14 +120,6 @@ #define ANTTESTA 0x01 //Ant A will be Testing #define ANTTESTB 0x02 //Ant B will be testing -// LPS define -#define DM_DIG_FA_TH0_LPS 4 //-> 4 in lps -#define DM_DIG_FA_TH1_LPS 15 //-> 15 lps -#define DM_DIG_FA_TH2_LPS 30 //-> 30 lps -#define RSSI_OFFSET_DIG 0x05; - - - //for 8723A Ant Definition--2012--06--07 due to different IC may be different ANT define #define MAIN_ANT 1 //Ant A or Ant Main #define AUX_ANT 2 //AntB or Ant Aux @@ -161,82 +163,11 @@ typedef struct _WLAN_STA{ #endif -typedef struct _Dynamic_Initial_Gain_Threshold_ -{ - u1Byte Dig_Enable_Flag; - u1Byte Dig_Ext_Port_Stage; - - int RssiLowThresh; - int RssiHighThresh; - - u4Byte FALowThresh; - u4Byte FAHighThresh; - - u1Byte CurSTAConnectState; - u1Byte PreSTAConnectState; - u1Byte CurMultiSTAConnectState; - - u1Byte PreIGValue; - u1Byte CurIGValue; - u1Byte BT30_CurIGI; - u1Byte BackupIGValue; - - s1Byte BackoffVal; - s1Byte BackoffVal_range_max; - s1Byte BackoffVal_range_min; - u1Byte rx_gain_range_max; - u1Byte rx_gain_range_min; - u1Byte Rssi_val_min; - - u1Byte PreCCK_CCAThres; - u1Byte CurCCK_CCAThres; - u1Byte PreCCKPDState; - u1Byte CurCCKPDState; - - u1Byte LargeFAHit; - u1Byte ForbiddenIGI; - u4Byte Recover_cnt; - - u1Byte DIG_Dynamic_MIN_0; - u1Byte DIG_Dynamic_MIN_1; - BOOLEAN bMediaConnect_0; - BOOLEAN bMediaConnect_1; - - u4Byte AntDiv_RSSI_max; - u4Byte RSSI_max; -}DIG_T,*pDIG_T; - -typedef struct _Dynamic_Power_Saving_ -{ - u1Byte PreCCAState; - u1Byte CurCCAState; +//Remove DIG by Yuchen - u1Byte PreRFState; - u1Byte CurRFState; +//Remoce BB power saving by Yuchn - int Rssi_val_min; - - u1Byte initialize; - u4Byte Reg874,RegC70,Reg85C,RegA74; - -}PS_T,*pPS_T; - -typedef struct _FALSE_ALARM_STATISTICS{ - u4Byte Cnt_Parity_Fail; - u4Byte Cnt_Rate_Illegal; - u4Byte Cnt_Crc8_fail; - u4Byte Cnt_Mcs_fail; - u4Byte Cnt_Ofdm_fail; - u4Byte Cnt_Cck_fail; - u4Byte Cnt_all; - u4Byte Cnt_Fast_Fsync; - u4Byte Cnt_SB_Search_fail; - u4Byte Cnt_OFDM_CCA; - u4Byte Cnt_CCK_CCA; - u4Byte Cnt_CCA_all; - u4Byte Cnt_BW_USC; //Gary - u4Byte Cnt_BW_LSC; //Gary -}FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS; +//Remove DIG by yuchen typedef struct _Dynamic_Primary_CCA{ u1Byte PriCCA_flag; @@ -248,9 +179,7 @@ typedef struct _Dynamic_Primary_CCA{ u1Byte MF_state; }Pri_CCA_T, *pPri_CCA_T; -typedef struct _Rate_Adaptive_Table_{ - u1Byte firstconnect; -}RA_T, *pRA_T; +//Remove RA_T,*pRA_T by RS_James typedef struct _RX_High_Power_ { @@ -382,29 +311,9 @@ typedef struct _SW_Antenna_Switch_ }SWAT_T, *pSWAT_T; //#endif -typedef struct _EDCA_TURBO_ -{ - BOOLEAN bCurrentTurboEDCA; - BOOLEAN bIsCurRDLState; - - #if(DM_ODM_SUPPORT_TYPE == ODM_CE ) - u4Byte prv_traffic_idx; // edca turbo - #endif - -}EDCA_T,*pEDCA_T; - -typedef struct _ODM_RATE_ADAPTIVE -{ - u1Byte Type; // DM_Type_ByFW/DM_Type_ByDriver - u1Byte LdpcThres; // if RSSI > LdpcThres => switch from LPDC to BCC - BOOLEAN bUseLdpc; - BOOLEAN bLowerRtsRate; - u1Byte HighRSSIThresh; // if RSSI > HighRSSIThresh => RATRState is DM_RATR_STA_HIGH - u1Byte LowRSSIThresh; // if RSSI <= LowRSSIThresh => RATRState is DM_RATR_STA_LOW - u1Byte RATRState; // Current RSSI level, DM_RATR_STA_HIGH/DM_RATR_STA_MIDDLE/DM_RATR_STA_LOW - -} ODM_RATE_ADAPTIVE, *PODM_RATE_ADAPTIVE; +//Remove Edca by YuChen +//Remove ODM_RATE_ADAPTIVE by RS_James #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) @@ -520,9 +429,9 @@ typedef struct _ODM_Phy_Dbg_Info_ { //ODM Write,debug info s1Byte RxSNRdB[4]; - u8Byte NumQryPhyStatus; - u8Byte NumQryPhyStatusCCK; - u8Byte NumQryPhyStatusOFDM; + u4Byte NumQryPhyStatus; + u4Byte NumQryPhyStatusCCK; + u4Byte NumQryPhyStatusOFDM; u1Byte NumQryBeaconPkt; //Others s4Byte RxEVM[4]; @@ -659,6 +568,8 @@ typedef enum _ODM_Common_Info_Definition ODM_CMNINFO_BINHCT_TEST, ODM_CMNINFO_BWIFI_TEST, ODM_CMNINFO_SMART_CONCURRENT, + ODM_CMNINFO_DOMAIN_CODE_2G, + ODM_CMNINFO_DOMAIN_CODE_5G, //-----------HOOK BEFORE REG INIT-----------// @@ -705,7 +616,7 @@ typedef enum _ODM_Common_Info_Definition ODM_CMNINFO_RA_THRESHOLD_HIGH, // u1Byte ODM_CMNINFO_RA_THRESHOLD_LOW, // u1Byte ODM_CMNINFO_RF_ANTENNA_TYPE, // u1Byte - ODM_CMNINFO_BT_DISABLED, + ODM_CMNINFO_BT_ENABLED, ODM_CMNINFO_BT_HS_CONNECT_PROCESS, ODM_CMNINFO_BT_HS_RSSI, ODM_CMNINFO_BT_OPERATION, @@ -747,7 +658,7 @@ typedef enum _ODM_Support_Ability_Definition ODM_BB_PSD = BIT11, ODM_BB_RXHP = BIT12, ODM_BB_ADAPTIVITY = BIT13, - ODM_BB_DYNAMIC_ATC = BIT14, + ODM_BB_CFO_TRACKING = BIT14, // // MAC DM section BIT 16-23 @@ -785,12 +696,13 @@ typedef enum tag_ODM_Support_IC_Type_Definition ODM_RTL8821 = BIT6, ODM_RTL8192E = BIT7, ODM_RTL8723B = BIT8, - ODM_RTL8813A = BIT9, - ODM_RTL8881A = BIT10 + ODM_RTL8814A = BIT9, + ODM_RTL8881A = BIT10, + ODM_RTL8821B = BIT11 }ODM_IC_TYPE_E; #define ODM_IC_11N_SERIES (ODM_RTL8192S|ODM_RTL8192C|ODM_RTL8192D|ODM_RTL8723A|ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B) -#define ODM_IC_11AC_SERIES (ODM_RTL8812|ODM_RTL8821|ODM_RTL8813A|ODM_RTL8881A) +#define ODM_IC_11AC_SERIES (ODM_RTL8812|ODM_RTL8821|ODM_RTL8814A|ODM_RTL8881A) #if (DM_ODM_SUPPORT_TYPE == ODM_AP) #ifdef RTK_AC_SUPPORT @@ -1067,30 +979,8 @@ typedef struct _IQK_MATRIX_REGS_SETTING{ BOOLEAN bBWIqkResultSaved[3]; }IQK_MATRIX_REGS_SETTING,*PIQK_MATRIX_REGS_SETTING; -#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) -typedef struct _PathDiv_Parameter_define_ -{ - u4Byte org_5g_RegE30; - u4Byte org_5g_RegC14; - u4Byte org_5g_RegCA0; - u4Byte swt_5g_RegE30; - u4Byte swt_5g_RegC14; - u4Byte swt_5g_RegCA0; - //for 2G IQK information - u4Byte org_2g_RegC80; - u4Byte org_2g_RegC4C; - u4Byte org_2g_RegC94; - u4Byte org_2g_RegC14; - u4Byte org_2g_RegCA0; - - u4Byte swt_2g_RegC80; - u4Byte swt_2g_RegC4C; - u4Byte swt_2g_RegC94; - u4Byte swt_2g_RegC14; - u4Byte swt_2g_RegCA0; -}PATHDIV_PARA,*pPATHDIV_PARA; -#endif +//Remove PATHDIV_PARA struct to odm_PathDiv.h typedef struct ODM_RF_Calibration_Structure { @@ -1306,10 +1196,9 @@ typedef struct DM_Out_Source_Dynamic_Mechanism_Structure u8Byte DebugComponents; u4Byte DebugLevel; - u8Byte NumQryPhyStatusAll; //CCK + OFDM - u8Byte LastNumQryPhyStatusAll; - u8Byte RxPWDBAve; - u8Byte RxPWDBAve_final; + u4Byte NumQryPhyStatusAll; //CCK + OFDM + u4Byte LastNumQryPhyStatusAll; + u4Byte RxPWDBAve; BOOLEAN MPDIG_2G; //off MPDIG u1Byte Times_2G; @@ -1374,6 +1263,9 @@ typedef struct DM_Out_Source_Dynamic_Mechanism_Structure BOOLEAN bDualMacSmartConcurrent; u4Byte BK_SupportAbility; u1Byte AntDivType; + + u1Byte odm_Regulation2_4G; + u1Byte odm_Regulation5G; //-----------HOOK BEFORE REG INIT-----------// // @@ -1434,7 +1326,7 @@ typedef struct DM_Out_Source_Dynamic_Mechanism_Structure BOOLEAN bIsMPChip; BOOLEAN bOneEntryOnly; // Common info for BTDM - BOOLEAN bBtDisabled; // BT is disabled + BOOLEAN bBtEnabled; // BT is disabled BOOLEAN bBtConnectProcess; // BT HS is under connection progress. u1Byte btHsRssi; // BT HS mode wifi rssi value. BOOLEAN bBtHsOperation; // BT HS mode is under progress @@ -1449,7 +1341,6 @@ typedef struct DM_Out_Source_Dynamic_Mechanism_Structure u8Byte RSSI_TRSW_iso; u1Byte RxRate; - BOOLEAN StopDIG; BOOLEAN bNoisyState; u1Byte TxRate; u1Byte LinkedInterval; @@ -1478,6 +1369,28 @@ typedef struct DM_Out_Source_Dynamic_Mechanism_Structure u1Byte pre_AntType; u1Byte antdiv_period; u1Byte antdiv_select; + u1Byte NdpaPeriod; + + // add by Yu Cehn for adaptivtiy + BOOLEAN adaptivity_flag; + BOOLEAN NHM_disable; + BOOLEAN TxHangFlg; + BOOLEAN Carrier_Sense_enable; + u1Byte tolerance_cnt; + u8Byte NHMCurTxOkcnt; + u8Byte NHMCurRxOkcnt; + u8Byte NHMLastTxOkcnt; + u8Byte NHMLastRxOkcnt; + u1Byte txEdcca1; + u1Byte txEdcca0; + s1Byte H2L_lb; + s1Byte L2H_lb; + u1Byte Adaptivity_IGI_upper; + u1Byte NHM_cnt_0; + + + ODM_NOISE_MONITOR noise_level;//[ODM_MAX_CHANNEL_NUM]; + // //2 Define STA info. // _ODM_STA_INFO // 2012/01/12 MH For MP, we need to reduce one array pointer for default port.?? @@ -1513,17 +1426,18 @@ typedef struct DM_Out_Source_Dynamic_Mechanism_Structure // //ODM Structure // - FAT_T DM_FatTable; - DIG_T DM_DigTable; - PS_T DM_PSTable; - Pri_CCA_T DM_PriCCA; - RXHP_T DM_RXHP_Table; - RA_T DM_RA_Table; - FALSE_ALARM_STATISTICS FalseAlmCnt; - FALSE_ALARM_STATISTICS FlaseAlmCntBuddyAdapter; + FAT_T DM_FatTable; + DIG_T DM_DigTable; + PS_T DM_PSTable; + Pri_CCA_T DM_PriCCA; + RXHP_T DM_RXHP_Table; + RA_T DM_RA_Table; + FALSE_ALARM_STATISTICS FalseAlmCnt; + FALSE_ALARM_STATISTICS FlaseAlmCntBuddyAdapter; //#ifdef CONFIG_ANTENNA_DIVERSITY - SWAT_T DM_SWAT_Table; - BOOLEAN RSSI_test; + SWAT_T DM_SWAT_Table; + BOOLEAN RSSI_test; + CFO_TRACKING DM_CfoTrack; //#endif #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) @@ -1595,19 +1509,6 @@ typedef struct DM_Out_Source_Dynamic_Mechanism_Structure BOOLEAN Modify_TxAGC_Flag_PathA; BOOLEAN Modify_TxAGC_Flag_PathB; BOOLEAN Modify_TxAGC_Flag_PathA_CCK; - - // - // Dynamic ATC switch - // - BOOLEAN bATCStatus; - BOOLEAN largeCFOHit; - BOOLEAN bIsfreeze; - int CFO_tail[2]; - int CFO_ave_pre; - int CrystalCap; - u1Byte CFOThreshold; - u4Byte packetCount; - u4Byte packetCount_pre; // // ODM system resource. @@ -1725,88 +1626,7 @@ typedef enum _RT_STATUS{ //3 DIG //3=========================================================== -typedef enum tag_Dynamic_Init_Gain_Operation_Type_Definition -{ - DIG_TYPE_THRESH_HIGH = 0, - DIG_TYPE_THRESH_LOW = 1, - DIG_TYPE_BACKOFF = 2, - DIG_TYPE_RX_GAIN_MIN = 3, - DIG_TYPE_RX_GAIN_MAX = 4, - DIG_TYPE_ENABLE = 5, - DIG_TYPE_DISABLE = 6, - DIG_OP_TYPE_MAX -}DM_DIG_OP_E; -/* -typedef enum tag_CCK_Packet_Detection_Threshold_Type_Definition -{ - CCK_PD_STAGE_LowRssi = 0, - CCK_PD_STAGE_HighRssi = 1, - CCK_PD_STAGE_MAX = 3, -}DM_CCK_PDTH_E; - -typedef enum tag_DIG_EXT_PORT_ALGO_Definition -{ - DIG_EXT_PORT_STAGE_0 = 0, - DIG_EXT_PORT_STAGE_1 = 1, - DIG_EXT_PORT_STAGE_2 = 2, - DIG_EXT_PORT_STAGE_3 = 3, - DIG_EXT_PORT_STAGE_MAX = 4, -}DM_DIG_EXT_PORT_ALG_E; - -typedef enum tag_DIG_Connect_Definition -{ - DIG_STA_DISCONNECT = 0, - DIG_STA_CONNECT = 1, - DIG_STA_BEFORE_CONNECT = 2, - DIG_MultiSTA_DISCONNECT = 3, - DIG_MultiSTA_CONNECT = 4, - DIG_CONNECT_MAX -}DM_DIG_CONNECT_E; - - -#define DM_MultiSTA_InitGainChangeNotify(Event) {DM_DigTable.CurMultiSTAConnectState = Event;} - -#define DM_MultiSTA_InitGainChangeNotify_CONNECT(_ADAPTER) \ - DM_MultiSTA_InitGainChangeNotify(DIG_MultiSTA_CONNECT) - -#define DM_MultiSTA_InitGainChangeNotify_DISCONNECT(_ADAPTER) \ - DM_MultiSTA_InitGainChangeNotify(DIG_MultiSTA_DISCONNECT) -*/ -#define DM_DIG_THRESH_HIGH 40 -#define DM_DIG_THRESH_LOW 35 - -#define DM_FALSEALARM_THRESH_LOW 400 -#define DM_FALSEALARM_THRESH_HIGH 1000 - -#define DM_DIG_MAX_NIC 0x3e -#define DM_DIG_MIN_NIC 0x1e //0x22//0x1c - -#define DM_DIG_MAX_AP 0x32 -#define DM_DIG_MIN_AP 0x20 - -#define DM_DIG_MAX_NIC_HP 0x46 -#define DM_DIG_MIN_NIC_HP 0x2e - -#define DM_DIG_MAX_AP_HP 0x42 -#define DM_DIG_MIN_AP_HP 0x30 - -//vivi 92c&92d has different definition, 20110504 -//this is for 92c -#ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV -#define DM_DIG_FA_TH0 0x80//0x20 -#else -#define DM_DIG_FA_TH0 0x200//0x20 -#endif -#define DM_DIG_FA_TH1 0x300//0x100 -#define DM_DIG_FA_TH2 0x400//0x200 -//this is for 92d -#define DM_DIG_FA_TH0_92D 0x100 -#define DM_DIG_FA_TH1_92D 0x400 -#define DM_DIG_FA_TH2_92D 0x600 - -#define DM_DIG_BACKOFF_MAX 12 -#define DM_DIG_BACKOFF_MIN -4 -#define DM_DIG_BACKOFF_DEFAULT 10 +//Remove DIG by Yuchen //3=========================================================== //3 AGC RX High Power Mode @@ -1829,20 +1649,8 @@ typedef enum tag_DIG_Connect_Definition //3 Dynamic Tx Power //3=========================================================== //Dynamic Tx Power Control Threshold -#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 -#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67 -#define TX_POWER_NEAR_FIELD_THRESH_AP 0x3F - -#define TxHighPwrLevel_Normal 0 -#define TxHighPwrLevel_Level1 1 -#define TxHighPwrLevel_Level2 2 -#define TxHighPwrLevel_BT1 3 -#define TxHighPwrLevel_BT2 4 -#define TxHighPwrLevel_15 5 -#define TxHighPwrLevel_35 6 -#define TxHighPwrLevel_50 7 -#define TxHighPwrLevel_70 8 -#define TxHighPwrLevel_100 9 + +//Remove By YuChen //3=========================================================== //3 Tx Power Tracking @@ -1856,24 +1664,12 @@ typedef enum tag_DIG_Connect_Definition //3=========================================================== //3 Rate Adaptive //3=========================================================== -#define DM_RATR_STA_INIT 0 -#define DM_RATR_STA_HIGH 1 -#define DM_RATR_STA_MIDDLE 2 -#define DM_RATR_STA_LOW 3 +//Remove to odm_RaInfo.h by RS_James //3=========================================================== //3 BB Power Save //3=========================================================== - -//3=========================================================== -//3 Dynamic ATC switch -//3=========================================================== -#define ATC_Status_Off 0x0 // enable -#define ATC_Status_On 0x1 // disable -#define CFO_Threshold_Xtal 10 // kHz -#define CFO_Threshold_ATC 80 // kHz - typedef enum tag_1R_CCA_Type_Definition { CCA_1R =0, @@ -1937,8 +1733,7 @@ static u1Byte DeltaSwingTableIdx_2GA_N_8188E[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, #define SWAW_STEP_PEAK 0 #define SWAW_STEP_DETERMINE 1 -VOID ODM_Write_DIG(IN PDM_ODM_T pDM_Odm, IN u1Byte CurrentIGI); -VOID ODM_Write_CCK_CCA_Thres(IN PDM_ODM_T pDM_Odm, IN u1Byte CurCCK_CCAThres); +//Remove DIG by yuchen VOID ODM_SetAntenna( @@ -1946,9 +1741,7 @@ ODM_SetAntenna( IN u1Byte Antenna); -#define dm_RF_Saving ODM_RF_Saving -void ODM_RF_Saving( IN PDM_ODM_T pDM_Odm, - IN u1Byte bForceInNormal ); +//Remove BB power saving by Yuchen #define SwAntDivRestAfterLink ODM_SwAntDivRestAfterLink VOID ODM_SwAntDivRestAfterLink( IN PDM_ODM_T pDM_Odm); @@ -1959,13 +1752,7 @@ ODM_TXPowerTrackingCheck( IN PDM_ODM_T pDM_Odm ); -BOOLEAN -ODM_RAStateCheck( - IN PDM_ODM_T pDM_Odm, - IN s4Byte RSSI, - IN BOOLEAN bForceUpdate, - OUT pu1Byte pRATRState - ); +//Remove ODM_RAStateCheck() by RS_James #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_AP|ODM_ADSL)) //============================================================ @@ -1975,12 +1762,9 @@ ODM_RAStateCheck( //void ODM_ChangeDynamicInitGainThresh(IN PADAPTER pAdapter, // IN INT32 DM_Type, // IN INT32 DM_Value); -VOID -ODM_ChangeDynamicInitGainThresh( - IN PDM_ODM_T pDM_Odm, - IN u4Byte DM_Type, - IN u4Byte DM_Value - ); + +//Remove DIG by yuchen + BOOLEAN ODM_CheckPowerStatus( @@ -1988,31 +1772,9 @@ ODM_CheckPowerStatus( ); -#if (DM_ODM_SUPPORT_TYPE != ODM_ADSL) -VOID -ODM_RateAdaptiveStateApInit( - IN PADAPTER Adapter , - IN PRT_WLAN_STA pEntry - ); -#endif -#define AP_InitRateAdaptiveState ODM_RateAdaptiveStateApInit - - -#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) -#ifdef WIFI_WMM -VOID -ODM_IotEdcaSwitch( - IN PDM_ODM_T pDM_Odm, - IN unsigned char enable - ); -#endif +//Remove ODM_RateAdaptiveStateApInit() by RS_James -BOOLEAN -ODM_ChooseIotMainSTA( - IN PDM_ODM_T pDM_Odm, - IN PSTA_INFO_T pstat - ); -#endif +//Remove Edca by Yuchen #if(DM_ODM_SUPPORT_TYPE==ODM_AP) #ifdef HW_ANT_SWITCH @@ -2056,21 +1818,7 @@ GetPSDData( #endif -#if (DM_ODM_SUPPORT_TYPE == ODM_CE) - -VOID -odm_DIGbyRSSI_LPS( - IN PDM_ODM_T pDM_Odm - ); - -u4Byte ODM_Get_Rate_Bitmap( - IN PDM_ODM_T pDM_Odm, - IN u4Byte macid, - IN u4Byte ra_mask, - IN u1Byte rssi_level); - -#endif - +//Remove ODM_Get_Rate_Bitmap() by RS_James #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) #define dm_PSDMonitorCallback odm_PSDMonitorCallback @@ -2081,11 +1829,6 @@ odm_PSDMonitorWorkItemCallback( IN PVOID pContext ); -VOID -ODM_MPT_DIG( - IN PDM_ODM_T pDM_Odm -); - VOID PatchDCTone( IN PDM_ODM_T pDM_Odm, @@ -2117,7 +1860,10 @@ Beamforming_GetEntryBeamCapByMacId( ); #endif - +VOID +odm_TXPowerTrackingInit( + IN PDM_ODM_T pDM_Odm + ); VOID ODM_DMInit( IN PDM_ODM_T pDM_Odm); @@ -2180,11 +1926,6 @@ ODM_ResetIQKResult( VOID ODM_InitAllWorkItems(IN PDM_ODM_T pDM_Odm ); VOID ODM_FreeAllWorkItems(IN PDM_ODM_T pDM_Odm ); -VOID odm_PathDivChkAntSwitch(PDM_ODM_T pDM_Odm); -VOID ODM_PathDivRestAfterLink( - IN PDM_ODM_T pDM_Odm - ); - //===========================================// // Neil Chen----2011--06--15-- @@ -2198,18 +1939,7 @@ VOID ODM_PathDivRestAfterLink( #define TRAFFIC_HIGH 1 //#define PATHDIV_ENABLE 1 - -//VOID odm_PathDivChkAntSwitch(PADAPTER Adapter,u1Byte Step); -VOID ODM_PathDivRestAfterLink( - IN PDM_ODM_T pDM_Odm - ); - -#define dm_PathDiv_RSSI_Check ODM_PathDivChkPerPktRssi -VOID ODM_PathDivChkPerPktRssi(PADAPTER Adapter, - BOOLEAN bIsDefPort, - BOOLEAN bMatchBSSID, - PRT_WLAN_STA pEntry, - PRT_RFD pRfd ); +//#define dm_PathDiv_RSSI_Check ODM_PathDivChkPerPktRssi u8Byte PlatformDivision64( @@ -2230,12 +1960,7 @@ PlatformDivision64( //3 PathDiV End //==================================================== -#define PathDivCheckBeforeLink8192C ODM_PathDiversityBeforeLink92C -BOOLEAN -ODM_PathDiversityBeforeLink92C( - //IN PADAPTER Adapter - IN PDM_ODM_T pDM_Odm - ); +//#define PathDivCheckBeforeLink8192C ODM_PathDiversityBeforeLink92C #define DM_ChangeDynamicInitGainThresh ODM_ChangeDynamicInitGainThresh //void ODM_ChangeDynamicInitGainThresh(IN PADAPTER pAdapter, @@ -2244,17 +1969,6 @@ ODM_PathDiversityBeforeLink92C( // -VOID -ODM_CCKPathDiversityChkPerPktRssi( - PADAPTER Adapter, - BOOLEAN bIsDefPort, - BOOLEAN bMatchBSSID, - PRT_WLAN_STA pEntry, - PRT_RFD pRfd, - pu1Byte pDesc - ); - - typedef enum tag_DIG_Connect_Definition { DIG_STA_DISCONNECT = 0, @@ -2266,14 +1980,6 @@ typedef enum tag_DIG_Connect_Definition }DM_DIG_CONNECT_E; -VOID -ODM_FillTXPathInTXDESC( - IN PADAPTER Adapter, - IN PRT_TCB pTcb, - IN pu1Byte pDesc -); - - #define dm_SWAW_RSSI_Check ODM_SwAntDivChkPerPktRssi // @@ -2324,12 +2030,6 @@ ODM_SingleDualAntennaDetection( IN u1Byte mode ); -VOID -ODM_DynamicATCSwitch( - IN PDM_ODM_T pDM_Odm -); - - #endif // #if((DM_ODM_SUPPORT_TYPE==ODM_WIN)||(DM_ODM_SUPPORT_TYPE==ODM_CE)) VOID ODM_UpdateNoisyState( @@ -2351,12 +2051,7 @@ ODM_UpdateInitRate( IN u1Byte Rate ); -VOID -ODM_DynamicARFBSelect( - IN PDM_ODM_T pDM_Odm, - IN u1Byte rate, - IN BOOLEAN Collision_State - ); +//Remove ODM_DynamicARFBSelect() by RS_James #if (DM_ODM_SUPPORT_TYPE == ODM_CE) void odm_dtc(PDM_ODM_T pDM_Odm); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_AntDiv.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_AntDiv.c old mode 100644 new mode 100755 index 4b361e2c5d5e..1f21d6c5c00e --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_AntDiv.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_AntDiv.c @@ -163,12 +163,12 @@ odm_RX_HWAntDiv_Init_88E( pDM_Odm->AntType = ODM_AUTO_ANT; - #if (MP_DRIVER == 1) +#if (MP_DRIVER == 1) pDM_Odm->AntDivType = CGCS_RX_SW_ANTDIV; ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N , BIT7, 0); // disable HW AntDiv ODM_SetBBReg(pDM_Odm, ODM_REG_LNA_SWITCH_11N , BIT31, 1); // 1:CG, 0:CS return; - #endif +#else ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8188E AntDiv_Init => AntDivType=[CGCS_RX_HW_ANTDIV]\n")); @@ -188,6 +188,7 @@ odm_RX_HWAntDiv_Init_88E( ODM_SetBBReg(pDM_Odm, ODM_REG_ANT_MAPPING1_11N , 0xFFFF, 0x0102); //antenna mapping table +#endif } VOID @@ -197,12 +198,12 @@ odm_TRX_HWAntDiv_Init_88E( { u4Byte value32; - #if (MP_DRIVER == 1) +#if (MP_DRIVER == 1) pDM_Odm->AntDivType = CGCS_RX_SW_ANTDIV; ODM_SetBBReg(pDM_Odm, ODM_REG_IGI_A_11N , BIT7, 0); // disable HW AntDiv ODM_SetBBReg(pDM_Odm, ODM_REG_RX_ANT_CTRL_11N , BIT5|BIT4|BIT3, 0); //Default RX (0/1) return; - #endif +#else ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***8188E AntDiv_Init => AntDivType=[CG_TRX_HW_ANTDIV (SPDT)]\n")); @@ -228,6 +229,7 @@ odm_TRX_HWAntDiv_Init_88E( } else //MPchip ODM_SetBBReg(pDM_Odm, ODM_REG_ANT_MAPPING1_11N , bMaskDWord, 0x0201); //Reg914=3'b010, Reg915=3'b001 +#endif } VOID @@ -244,7 +246,7 @@ odm_Smart_HWAntDiv_Init_88E( #if (MP_DRIVER == 1) ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("pDM_Odm->AntDivType: %d\n", pDM_Odm->AntDivType)); return; -#endif +#else for(i=0; i<6; i++) { @@ -335,6 +337,8 @@ odm_Smart_HWAntDiv_Init_88E( //PHY_SetBBReg(Adapter, 0x864 , BIT11, 1); //PHY_SetBBReg(Adapter, 0x860 , BIT9, 0); //PHY_SetBBReg(Adapter, 0x860 , BIT8, 0); + +#endif } #endif //#if (RTL8188E_SUPPORT == 1) @@ -2017,7 +2021,7 @@ ODM_AntDiv( #if (RTL8821A_SUPPORT == 1) else if(pDM_Odm->SupportICType == ODM_RTL8821) { - if(pDM_Odm->bBtDisabled) //BT disabled + if(!pDM_Odm->bBtEnabled) //BT disabled { if(pDM_Odm->AntDivType == S0S1_SW_ANTDIV) { diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_AntDiv.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_AntDiv.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_CfoTracking.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_CfoTracking.c new file mode 100755 index 000000000000..e0c2a58ef088 --- /dev/null +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_CfoTracking.c @@ -0,0 +1,363 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +#include "odm_precomp.h" + +VOID +odm_SetCrystalCap( + IN PVOID pDM_VOID, + IN u1Byte CrystalCap +) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + PCFO_TRACKING pCfoTrack = &pDM_Odm->DM_CfoTrack; + BOOLEAN bEEPROMCheck; +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + bEEPROMCheck = (pHalData->EEPROMVersion >= 0x01)?TRUE:FALSE; +#else + bEEPROMCheck = TRUE; +#endif + + if(pCfoTrack->CrystalCap == CrystalCap) + return; + + pCfoTrack->CrystalCap = CrystalCap; + + if(pDM_Odm->SupportICType & ODM_RTL8192D) + { + ODM_SetBBReg(pDM_Odm, REG_AFE_XTAL_CTRL, 0x000000F0, CrystalCap & 0x0F); + ODM_SetBBReg(pDM_Odm, REG_AFE_PLL_CTRL, 0xF0000000, ((CrystalCap & 0xF0) >> 4)); + } + else if(pDM_Odm->SupportICType & ODM_RTL8188E) + { + // write 0x24[22:17] = 0x24[16:11] = CrystalCap + CrystalCap = CrystalCap & 0x3F; + ODM_SetBBReg(pDM_Odm, REG_AFE_XTAL_CTRL, 0x007ff800, (CrystalCap | (CrystalCap << 6))); + } + else if(pDM_Odm->SupportICType & ODM_RTL8812) + { + // write 0x2C[30:25] = 0x2C[24:19] = CrystalCap + CrystalCap = CrystalCap & 0x3F; + ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0x7FF80000, (CrystalCap | (CrystalCap << 6))); + } + else if (((pDM_Odm->SupportICType & ODM_RTL8723A) && bEEPROMCheck) || + (pDM_Odm->SupportICType & ODM_RTL8723B) ||(pDM_Odm->SupportICType & ODM_RTL8192E) || + (pDM_Odm->SupportICType & ODM_RTL8821)) + { + // 0x2C[23:18] = 0x2C[17:12] = CrystalCap + CrystalCap = CrystalCap & 0x3F; + ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0x00FFF000, (CrystalCap | (CrystalCap << 6))); + } + else if(pDM_Odm->SupportICType & ODM_RTL8821B) + { + // write 0x28[6:1] = 0x24[30:25] = CrystalCap + CrystalCap = CrystalCap & 0x3F; + ODM_SetBBReg(pDM_Odm, REG_AFE_XTAL_CTRL, 0x7E000000, CrystalCap); + ODM_SetBBReg(pDM_Odm, REG_AFE_PLL_CTRL, 0x7E, CrystalCap); + } + else if(pDM_Odm->SupportICType & ODM_RTL8814A) + { + // write 0x2C[26:21] = 0x2C[20:15] = CrystalCap + CrystalCap = CrystalCap & 0x3F; + ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0x07FF8000, (CrystalCap | (CrystalCap << 6))); + } + else + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("odm_SetCrystalCap(): Use default setting.\n")); + ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0xFFF000, (CrystalCap | (CrystalCap << 6))); + } + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("odm_SetCrystalCap(): CrystalCap = 0x%x\n", CrystalCap)); +} + +u1Byte +odm_GetDefaultCrytaltalCap( + IN PVOID pDM_VOID +) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + u1Byte CrystalCap = 0x20; + +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + CrystalCap = pHalData->CrystalCap; +#else + prtl8192cd_priv priv = pDM_Odm->priv; + + if(priv->pmib->dot11RFEntry.xcap > 0) + CrystalCap = priv->pmib->dot11RFEntry.xcap; +#endif + + CrystalCap = CrystalCap & 0x3f; + + return CrystalCap; +} + +VOID +odm_SetATCStatus( + IN PVOID pDM_VOID, + IN BOOLEAN ATCStatus +) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + PCFO_TRACKING pCfoTrack = &pDM_Odm->DM_CfoTrack; + + if(pCfoTrack->bATCStatus == ATCStatus) + return; + + ODM_SetBBReg(pDM_Odm, ODM_REG(BB_ATC,pDM_Odm), ODM_BIT(BB_ATC,pDM_Odm), ATCStatus); + pCfoTrack->bATCStatus = ATCStatus; +} + +BOOLEAN +odm_GetATCStatus( + IN PVOID pDM_VOID +) +{ + BOOLEAN ATCStatus; + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + + ATCStatus = (BOOLEAN)ODM_GetBBReg(pDM_Odm, ODM_REG(BB_ATC,pDM_Odm), ODM_BIT(BB_ATC,pDM_Odm)); + return ATCStatus; +} + +VOID +ODM_CfoTrackingReset( + IN PVOID pDM_VOID +) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + PCFO_TRACKING pCfoTrack = &pDM_Odm->DM_CfoTrack; + u1Byte CrystalCap; + + pCfoTrack->DefXCap = odm_GetDefaultCrytaltalCap(pDM_Odm); + pCfoTrack->bAdjust = TRUE; + +#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) + odm_SetCrystalCap(pDM_Odm, pCfoTrack->DefXCap); + odm_SetATCStatus(pDM_Odm, TRUE); +#else + if(pCfoTrack->CrystalCap > pCfoTrack->DefXCap) + { + for(CrystalCap = pCfoTrack->CrystalCap; CrystalCap >= pCfoTrack->DefXCap; CrystalCap--) + odm_SetCrystalCap(pDM_Odm, CrystalCap); + } + else + { + for(CrystalCap = pCfoTrack->CrystalCap; CrystalCap <= pCfoTrack->DefXCap; CrystalCap++) + odm_SetCrystalCap(pDM_Odm, CrystalCap); + } +#endif +} + +VOID +ODM_CfoTrackingInit( + IN PVOID pDM_VOID +) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + PCFO_TRACKING pCfoTrack = &pDM_Odm->DM_CfoTrack; + + pCfoTrack->DefXCap = pCfoTrack->CrystalCap = odm_GetDefaultCrytaltalCap(pDM_Odm); + pCfoTrack->bATCStatus = odm_GetATCStatus(pDM_Odm); + pCfoTrack->bAdjust = TRUE; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking_init()=========> \n")); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking_init(): bATCStatus = %d, CrystalCap = 0x%x \n",pCfoTrack->bATCStatus, pCfoTrack->DefXCap)); +} + +VOID +ODM_CfoTracking( + IN PVOID pDM_VOID +) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + PCFO_TRACKING pCfoTrack = &pDM_Odm->DM_CfoTrack; + int CFO_kHz_A, CFO_kHz_B, CFO_ave = 0; + int CFO_ave_diff; + int CrystalCap = (int)pCfoTrack->CrystalCap; + u1Byte Adjust_Xtal = 1; + + //4 Support ability + if(!(pDM_Odm->SupportAbility & ODM_BB_CFO_TRACKING)) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Return: SupportAbility ODM_BB_CFO_TRACKING is disabled\n")); + return; + } + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking()=========> \n")); + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN && MP_DRIVER == 1) + if(0) +#else + if(!pDM_Odm->bLinked || !pDM_Odm->bOneEntryOnly) +#endif + { + //4 No link or more than one entry + ODM_CfoTrackingReset(pDM_Odm); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Reset: bLinked = %d, bOneEntryOnly = %d\n", + pDM_Odm->bLinked, pDM_Odm->bOneEntryOnly)); + } + else + { + //3 1. CFO Tracking + //4 1.1 No new packet + if(pCfoTrack->packetCount == pCfoTrack->packetCount_pre) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): packet counter doesn't change\n")); + return; + } + pCfoTrack->packetCount_pre = pCfoTrack->packetCount; + + //4 1.2 Calculate CFO + CFO_kHz_A = (int)(pCfoTrack->CFO_tail[0] * 3125) / 1280; + CFO_kHz_B = (int)(pCfoTrack->CFO_tail[1] * 3125) / 1280; + + if(pDM_Odm->RFType < ODM_2T2R) + CFO_ave = CFO_kHz_A; + else + CFO_ave = (int)(CFO_kHz_A + CFO_kHz_B) >> 1; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): CFO_kHz_A = %dkHz, CFO_kHz_B = %dkHz, CFO_ave = %dkHz\n", + CFO_kHz_A, CFO_kHz_B, CFO_ave)); + + //4 1.3 Avoid abnormal large CFO + CFO_ave_diff = (pCfoTrack->CFO_ave_pre >= CFO_ave)?(pCfoTrack->CFO_ave_pre - CFO_ave):(CFO_ave - pCfoTrack->CFO_ave_pre); + if(CFO_ave_diff > 20 && pCfoTrack->largeCFOHit == 0 && !pCfoTrack->bAdjust) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): first large CFO hit\n")); + pCfoTrack->largeCFOHit = 1; + return; + } + else + pCfoTrack->largeCFOHit = 0; + pCfoTrack->CFO_ave_pre = CFO_ave; + + //4 1.4 Dynamic Xtal threshold + if(pCfoTrack->bAdjust == FALSE) + { + if(CFO_ave > CFO_TH_XTAL_HIGH || CFO_ave < (-CFO_TH_XTAL_HIGH)) + pCfoTrack->bAdjust = TRUE; + } + else + { + if(CFO_ave < CFO_TH_XTAL_LOW && CFO_ave > (-CFO_TH_XTAL_LOW)) + pCfoTrack->bAdjust = FALSE; + } + +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) + //4 1.5 BT case: Disable CFO tracking + if(pDM_Odm->bBtEnabled) + { + pCfoTrack->bAdjust = FALSE; + odm_SetCrystalCap(pDM_Odm, pCfoTrack->DefXCap); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Disable CFO tracking for BT!!\n")); + } + + //4 1.6 Big jump + if(pCfoTrack->bAdjust) + { + if(CFO_ave > CFO_TH_XTAL_LOW) + Adjust_Xtal = Adjust_Xtal + ((CFO_ave - CFO_TH_XTAL_LOW) >> 2); + else if(CFO_ave < (-CFO_TH_XTAL_LOW)) + Adjust_Xtal = Adjust_Xtal + ((CFO_TH_XTAL_LOW - CFO_ave) >> 2); + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Crystal cap offset = %d\n", Adjust_Xtal)); + } +#endif + + //4 1.7 Adjust Crystal Cap. + if(pCfoTrack->bAdjust) + { + if(CFO_ave > CFO_TH_XTAL_LOW) + CrystalCap = CrystalCap + Adjust_Xtal; + else if(CFO_ave < (-CFO_TH_XTAL_LOW)) + CrystalCap = CrystalCap - Adjust_Xtal; + + if(CrystalCap > 0x3f) + CrystalCap = 0x3f; + else if (CrystalCap < 0) + CrystalCap = 0; + + odm_SetCrystalCap(pDM_Odm, (u1Byte)CrystalCap); + } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Crystal cap = 0x%x, Default Crystal cap = 0x%x\n", + pCfoTrack->CrystalCap, pCfoTrack->DefXCap)); + +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) + if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) + return; + + //3 2. Dynamic ATC switch + if(CFO_ave < CFO_TH_ATC && CFO_ave > -CFO_TH_ATC) + { + odm_SetATCStatus(pDM_Odm, FALSE); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Disable ATC!!\n")); + } + else + { + odm_SetATCStatus(pDM_Odm, TRUE); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Enable ATC!!\n")); + } +#endif + } +} + +VOID +ODM_ParsingCFO( + IN PVOID pDM_VOID, + IN PVOID pPktinfo_VOID, + IN s1Byte* pcfotail + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + PODM_PACKET_INFO_T pPktinfo = (PODM_PACKET_INFO_T)pPktinfo_VOID; + PCFO_TRACKING pCfoTrack = &pDM_Odm->DM_CfoTrack; + u1Byte i; + + if(!(pDM_Odm->SupportAbility & ODM_BB_CFO_TRACKING)) + return; + +#if ((DM_ODM_SUPPORT_TYPE == ODM_WIN) && (MP_DRIVER == 1)) + if(1) +#elif(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) + if(pPktinfo->bPacketMatchBSSID) +#else + if(pPktinfo->StationID != 0) +#endif + { + //3 Update CFO report for path-A & path-B + // Only paht-A and path-B have CFO tail and short CFO + for(i = ODM_RF_PATH_A; i <= ODM_RF_PATH_B; i++) + { + pCfoTrack->CFO_tail[i] = (int)pcfotail[i]; + } + + //3 Update packet counter + if(pCfoTrack->packetCount == 0xffffffff) + pCfoTrack->packetCount = 0; + else + pCfoTrack->packetCount++; + } +} + diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_CfoTracking.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_CfoTracking.h new file mode 100755 index 000000000000..48ead72c3217 --- /dev/null +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_CfoTracking.h @@ -0,0 +1,66 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +#ifndef __ODMCFOTRACK_H__ +#define __ODMCFOTRACK_H__ + +#define CFO_TH_XTAL_HIGH 20 // kHz +#define CFO_TH_XTAL_LOW 10 // kHz +#define CFO_TH_ATC 80 // kHz + +typedef struct _CFO_TRACKING_ +{ + BOOLEAN bATCStatus; + BOOLEAN largeCFOHit; + BOOLEAN bAdjust; + u1Byte CrystalCap; + u1Byte DefXCap; + int CFO_tail[2]; + int CFO_ave_pre; + u4Byte packetCount; + u4Byte packetCount_pre; + + BOOLEAN bForceXtalCap; + BOOLEAN bReset; +}CFO_TRACKING, *PCFO_TRACKING; + +VOID +ODM_CfoTrackingReset( + IN PVOID pDM_VOID +); + +VOID +ODM_CfoTrackingInit( + IN PVOID pDM_VOID +); + +VOID +ODM_CfoTracking( + IN PVOID pDM_VOID +); + +VOID +ODM_ParsingCFO( + IN PVOID pDM_VOID, + IN PVOID pPktinfo_VOID, + IN s1Byte* pcfotail +); + +#endif \ No newline at end of file diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_DIG.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_DIG.c new file mode 100755 index 000000000000..09a3c8f18705 --- /dev/null +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_DIG.c @@ -0,0 +1,2647 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +//============================================================ +// include files +//============================================================ + +#include "odm_precomp.h" +#define ADAPTIVITY_VERSION "5.0" + + +VOID +ODM_ChangeDynamicInitGainThresh( + IN PVOID pDM_VOID, + IN u4Byte DM_Type, + IN u4Byte DM_Value + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; + + if (DM_Type == DIG_TYPE_THRESH_HIGH) + { + pDM_DigTable->RssiHighThresh = DM_Value; + } + else if (DM_Type == DIG_TYPE_THRESH_LOW) + { + pDM_DigTable->RssiLowThresh = DM_Value; + } + else if (DM_Type == DIG_TYPE_ENABLE) + { + pDM_DigTable->Dig_Enable_Flag = TRUE; + } + else if (DM_Type == DIG_TYPE_DISABLE) + { + pDM_DigTable->Dig_Enable_Flag = FALSE; + } + else if (DM_Type == DIG_TYPE_BACKOFF) + { + if(DM_Value > 30) + DM_Value = 30; + pDM_DigTable->BackoffVal = (u1Byte)DM_Value; + } + else if(DM_Type == DIG_TYPE_RX_GAIN_MIN) + { + if(DM_Value == 0) + DM_Value = 0x1; + pDM_DigTable->rx_gain_range_min = (u1Byte)DM_Value; + } + else if(DM_Type == DIG_TYPE_RX_GAIN_MAX) + { + if(DM_Value > 0x50) + DM_Value = 0x50; + pDM_DigTable->rx_gain_range_max = (u1Byte)DM_Value; + } +} // DM_ChangeDynamicInitGainThresh // + +VOID +odm_NHMCounterStatisticsInit( + IN PVOID pDM_VOID + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + + if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) + { + //PHY parameters initialize for ac series + ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11AC+2, 0x2710); //0x990[31:16]=0x2710 Time duration for NHM unit: 4us, 0x2710=40ms + ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC+2, 0xffff); //0x994[31:16]=0xffff th_9, th_10 + //ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, 0xffffff5c); //0x998=0xffffff5c th_3, th_2, th_1, th_0 + ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, 0xffffff52); //0x998=0xffffff52 th_3, th_2, th_1, th_0 + ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC, 0xffffffff); //0x99c=0xffffffff th_7, th_6, th_5, th_4 + ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH8_11AC, bMaskByte0, 0xff); //0x9a0[7:0]=0xff th_8 + ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT8|BIT9|BIT10, 0x7); //0x994[9:8]=3 enable CCX + ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_9E8_11AC, BIT0, 0x1); //0x9e8[7]=1 max power among all RX ants + + //panic_printk("RTL8812AU phy parameters init %s,%d\n", __FUNCTION__, __LINE__); + } + else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) + { + //PHY parameters initialize for n series + ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11N+2, 0x2710); //0x894[31:16]=0x2710 Time duration for NHM unit: 4us, 0x2710=40ms + //ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11N+2, 0x4e20); //0x894[31:16]=0x4e20 Time duration for NHM unit: 4us, 0x4e20=80ms + ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N+2, 0xffff); //0x890[31:16]=0xffff th_9, th_10 + //ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, 0xffffff5c); //0x898=0xffffff5c th_3, th_2, th_1, th_0 + ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, 0xffffff52); //0x898=0xffffff52 th_3, th_2, th_1, th_0 + ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N, 0xffffffff); //0x89c=0xffffffff th_7, th_6, th_5, th_4 + ODM_SetBBReg(pDM_Odm, ODM_REG_FPGA0_IQK_11N, bMaskByte0, 0xff); //0xe28[7:0]=0xff th_8 + ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT10|BIT9|BIT8, 0x7); //0x890[9:8]=3 enable CCX + ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT7, 0x1); //0xc0c[7]=1 max power among all RX ants + } +} + +VOID +odm_NHMCounterStatistics( + IN PVOID pDM_VOID + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + + // Get NHM report + odm_GetNHMCounterStatistics(pDM_Odm); + + // Reset NHM counter + odm_NHMCounterStatisticsReset(pDM_Odm); +} + +VOID +odm_GetNHMCounterStatistics( + IN PVOID pDM_VOID + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + u4Byte value32 = 0; + + if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) + value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_CNT_11AC, bMaskDWord); + else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) + value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_CNT_11N, bMaskDWord); + + pDM_Odm->NHM_cnt_0 = (u1Byte)(value32 & bMaskByte0); +} + +VOID +odm_NHMCounterStatisticsReset( + IN PVOID pDM_VOID + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + + if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) + { + ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT1, 0); + ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT1, 1); + } + else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) + { + ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT1, 0); + ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT1, 1); + } +} + +VOID +odm_NHMBBInit( + IN PVOID pDM_VOID +) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + + pDM_Odm->adaptivity_flag = 0; + pDM_Odm->tolerance_cnt = 3; + pDM_Odm->NHMLastTxOkcnt = 0; + pDM_Odm->NHMLastRxOkcnt = 0; + pDM_Odm->NHMCurTxOkcnt = 0; + pDM_Odm->NHMCurRxOkcnt = 0; +} + +// +VOID +odm_NHMBB( + IN PVOID pDM_VOID +) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + u4Byte value32; + //u1Byte test_status; + //PFALSE_ALARM_STATISTICS pFalseAlmCnt = &(pDM_Odm->FalseAlmCnt); + + pDM_Odm->NHMCurTxOkcnt = *(pDM_Odm->pNumTxBytesUnicast) - pDM_Odm->NHMLastTxOkcnt; + pDM_Odm->NHMCurRxOkcnt = *(pDM_Odm->pNumRxBytesUnicast) - pDM_Odm->NHMLastRxOkcnt; + pDM_Odm->NHMLastTxOkcnt = *(pDM_Odm->pNumTxBytesUnicast); + pDM_Odm->NHMLastRxOkcnt = *(pDM_Odm->pNumRxBytesUnicast); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("NHM_cnt_0=%d, NHMCurTxOkcnt = %llu, NHMCurRxOkcnt = %llu\n", + pDM_Odm->NHM_cnt_0, pDM_Odm->NHMCurTxOkcnt, pDM_Odm->NHMCurRxOkcnt)); + + + if ( (pDM_Odm->NHMCurTxOkcnt) + 1 > (u8Byte)(pDM_Odm->NHMCurRxOkcnt<<2) + 1) //Tx > 4*Rx possible for adaptivity test + { + if(pDM_Odm->NHM_cnt_0 >= 190 || pDM_Odm->adaptivity_flag == TRUE) + { + //Enable EDCCA since it is possible running Adaptivity testing + //test_status = 1; + pDM_Odm->adaptivity_flag = TRUE; + ODM_SetMACReg(pDM_Odm, REG_TX_PTCL_CTRL, BIT15, 0); //don't ignore EDCCA reg520[15]=0 + ODM_SetMACReg(pDM_Odm, REG_RD_CTRL, BIT11, 1); //reg524[11]=1 + pDM_Odm->tolerance_cnt = 0; +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_backup; + pDM_Odm->TH_EDCCA_HL_diff = pDM_Odm->TH_EDCCA_HL_diff_backup ; +#endif + } + else + { + if(pDM_Odm->tolerance_cnt<3) + pDM_Odm->tolerance_cnt = pDM_Odm->tolerance_cnt + 1; + else + pDM_Odm->tolerance_cnt = 4; + //test_status = 5; + if(pDM_Odm->tolerance_cnt > 3) + { + //test_status = 3; +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_mode2; + pDM_Odm->TH_EDCCA_HL_diff = pDM_Odm->TH_EDCCA_HL_diff_mode2 ; +#else + ODM_SetMACReg(pDM_Odm, REG_TX_PTCL_CTRL, BIT15, 1); //ignore EDCCA reg520[15]=1 + ODM_SetMACReg(pDM_Odm, REG_RD_CTRL, BIT11, 0); //reg524[11]=0 +#endif + pDM_Odm->adaptivity_flag = FALSE; + } + } + } + else // TXadaptivity_flag == TRUE && pDM_Odm->NHM_cnt_0 <= 200) + { + //test_status = 2; + ODM_SetMACReg(pDM_Odm, REG_TX_PTCL_CTRL, BIT15, 0); //don't ignore EDCCA reg520[15]=0 + ODM_SetMACReg(pDM_Odm, REG_RD_CTRL, BIT11, 1); //reg524[11]=1 + pDM_Odm->tolerance_cnt = 0; +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_backup; + pDM_Odm->TH_EDCCA_HL_diff = pDM_Odm->TH_EDCCA_HL_diff_backup ; +#endif + } + else + { + if(pDM_Odm->tolerance_cnt<3) + pDM_Odm->tolerance_cnt = pDM_Odm->tolerance_cnt + 1; + else + pDM_Odm->tolerance_cnt = 4; + //test_status = 5; + if(pDM_Odm->tolerance_cnt >3) + { + //test_status = 4; +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_mode2; + pDM_Odm->TH_EDCCA_HL_diff = pDM_Odm->TH_EDCCA_HL_diff_mode2 ; +#else + ODM_SetMACReg(pDM_Odm, REG_TX_PTCL_CTRL, BIT15, 1); //ignore EDCCA reg520[15]=1 + ODM_SetMACReg(pDM_Odm, REG_RD_CTRL, BIT11, 0); //reg524[11]=0 +#endif + pDM_Odm->adaptivity_flag = FALSE; + } + } + } + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("adaptivity_flag = %d\n ", pDM_Odm->adaptivity_flag)); +} + +VOID +odm_SearchPwdBLowerBound( + IN PVOID pDM_VOID, + IN u1Byte IGI_target +) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + u4Byte value32 =0; + u1Byte cnt, IGI; + BOOLEAN bAdjust=TRUE; + s1Byte TH_L2H_dmc, TH_H2L_dmc; + s1Byte TH_L2H, TH_H2L, Diff; + + IGI = 0x50; // find H2L, L2H lower bound + ODM_Write_DIG(pDM_Odm, IGI); + + + Diff = IGI_target -(s1Byte)IGI; + TH_L2H_dmc = pDM_Odm->TH_L2H_ini + Diff; + if(TH_L2H_dmc > 10) + TH_L2H_dmc = 10; + TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff; + if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) + { + ODM_SetBBReg(pDM_Odm,rOFDM0_ECCAThreshold, bMaskByte0, (u1Byte)TH_L2H_dmc); + ODM_SetBBReg(pDM_Odm,rOFDM0_ECCAThreshold, bMaskByte2, (u1Byte)TH_H2L_dmc); + } + else + ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIReadBack, 0xFFFF, ((u1Byte)TH_H2L_dmc<<8) | (u1Byte)TH_L2H_dmc); + + ODM_delay_ms(5); + + while(bAdjust) + { + for(cnt=0; cnt<20; cnt ++) + { + if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) + value32 = ODM_GetBBReg(pDM_Odm,ODM_REG_RPT_11N, bMaskDWord); + else if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) + value32 = ODM_GetBBReg(pDM_Odm,ODM_REG_RPT_11AC, bMaskDWord); + + if (value32 & BIT30 && (pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8723B|ODM_RTL8188E))) + pDM_Odm->txEdcca1 = pDM_Odm->txEdcca1 + 1; + else if(value32 & BIT29) + pDM_Odm->txEdcca1 = pDM_Odm->txEdcca1 + 1; + else + pDM_Odm->txEdcca0 = pDM_Odm->txEdcca0 + 1; + } + //DbgPrint("txEdcca1 = %d, txEdcca0 = %d\n", pDM_Odm->txEdcca1, pDM_Odm->txEdcca0); + + if(pDM_Odm->txEdcca1 > 5 ) + { + IGI = IGI -1; + TH_L2H_dmc = TH_L2H_dmc + 1; + if(TH_L2H_dmc > 10) + TH_L2H_dmc = 10; + TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff; + if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) + { + ODM_SetBBReg(pDM_Odm,rOFDM0_ECCAThreshold, bMaskByte0, (u1Byte)TH_L2H_dmc); + ODM_SetBBReg(pDM_Odm,rOFDM0_ECCAThreshold, bMaskByte2, (u1Byte)TH_H2L_dmc); + } + else + ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIReadBack, 0xFFFF, ((u1Byte)TH_H2L_dmc<<8) | (u1Byte)TH_L2H_dmc); + + pDM_Odm->TxHangFlg = TRUE; + pDM_Odm->txEdcca1 = 0; + pDM_Odm->txEdcca0 = 0; + + if(TH_L2H_dmc == 10) + { + bAdjust = FALSE; + pDM_Odm->TxHangFlg = FALSE; + pDM_Odm->txEdcca1 = 0; + pDM_Odm->txEdcca0 = 0; + pDM_Odm->H2L_lb = TH_H2L_dmc; + pDM_Odm->L2H_lb = TH_L2H_dmc; + pDM_Odm->Adaptivity_IGI_upper = IGI; + } + } + else + { + bAdjust = FALSE; + pDM_Odm->TxHangFlg = FALSE; + pDM_Odm->txEdcca1 = 0; + pDM_Odm->txEdcca0 = 0; + pDM_Odm->H2L_lb = TH_H2L_dmc; + pDM_Odm->L2H_lb = TH_L2H_dmc; + pDM_Odm->Adaptivity_IGI_upper = IGI; + } + } + + +ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("IGI = 0x%x, H2L_lb = 0x%x, L2H_lb = 0x%x\n", IGI, pDM_Odm->H2L_lb , pDM_Odm->L2H_lb)); + +} + +VOID +odm_AdaptivityInit( + IN PVOID pDM_VOID +) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; +#if(DM_ODM_SUPPORT_TYPE == ODM_WIN) + PADAPTER pAdapter = pDM_Odm->Adapter; + PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); + pDM_Odm->Carrier_Sense_enable = (BOOLEAN)pMgntInfo->RegEnableCarrierSense; +#endif + +#if(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) + + if(pDM_Odm->Carrier_Sense_enable == FALSE) + { + pDM_Odm->TH_L2H_ini = 0xf7; // -7 + } + else + pDM_Odm->TH_L2H_ini = 0xa; + + pDM_Odm->AdapEn_RSSI = 20; + pDM_Odm->TH_EDCCA_HL_diff = 7; + +#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + + if(pDM_Odm->Carrier_Sense_enable){ + pDM_Odm->TH_L2H_ini = 10; + pDM_Odm->TH_EDCCA_HL_diff = 3; + pDM_Odm->AdapEn_RSSI = 30; + } + else + { + pDM_Odm->TH_L2H_ini = 0xf7; + pDM_Odm->TH_EDCCA_HL_diff = 7; + pDM_Odm->AdapEn_RSSI = 20; + } + + pDM_Odm->TH_L2H_ini_mode2 = 20; + pDM_Odm->TH_EDCCA_HL_diff_mode2 = 8; + pDM_Odm->TH_L2H_ini_backup = pDM_Odm->TH_L2H_ini; + pDM_Odm->TH_EDCCA_HL_diff_backup = pDM_Odm->TH_EDCCA_HL_diff ; + +#endif + + pDM_Odm->IGI_Base = 0x32; + pDM_Odm->IGI_target = 0x1c; + pDM_Odm->ForceEDCCA = 0; + pDM_Odm->NHM_disable = FALSE; + pDM_Odm->TxHangFlg = TRUE; + pDM_Odm->txEdcca0 = 0; + pDM_Odm->txEdcca1 = 0; + pDM_Odm->H2L_lb= 0; + pDM_Odm->L2H_lb= 0; + pDM_Odm->Adaptivity_IGI_upper = 0; + odm_NHMBBInit(pDM_Odm); + + ODM_SetBBReg(pDM_Odm, REG_RD_CTRL, BIT11, 1); // stop counting if EDCCA is asserted +} + + +VOID +odm_Adaptivity( + IN PVOID pDM_VOID, + IN u1Byte IGI +) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + s1Byte TH_L2H_dmc, TH_H2L_dmc; + s1Byte Diff, IGI_target; + BOOLEAN EDCCA_State = FALSE; + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PADAPTER pAdapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + BOOLEAN bFwCurrentInPSMode=FALSE; + PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo); + + pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_FW_PSMODE_STATUS, (pu1Byte)(&bFwCurrentInPSMode)); + + // Disable EDCCA mode while under LPS mode, added by Roger, 2012.09.14. + if(bFwCurrentInPSMode) + return; +#endif + + if(!(pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY)) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("Go to odm_DynamicEDCCA() \n")); + // Add by Neil Chen to enable edcca to MP Platform +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + // Adjust EDCCA. + if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) + odm_DynamicEDCCA(pDM_Odm); +#endif + return; + } + +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + if(pMgntInfo->RegEnableAdaptivity== 2) +#else + if (pDM_Odm->Adapter->registrypriv.adaptivity_en == 2) +#endif + { + if(pDM_Odm->Carrier_Sense_enable == FALSE) // check domain Code for Adaptivity or CarrierSense + { + if ((*pDM_Odm->pBandType == ODM_BAND_5G) && + !(pDM_Odm->odm_Regulation5G == REGULATION_ETSI || pDM_Odm->odm_Regulation5G == REGULATION_WW)) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("Adaptivity skip 5G domain code : %d \n", pDM_Odm->odm_Regulation5G)); + return; + } + + else if((*pDM_Odm->pBandType == ODM_BAND_2_4G) && + !(pDM_Odm->odm_Regulation2_4G == REGULATION_ETSI || pDM_Odm->odm_Regulation2_4G == REGULATION_WW)) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("Adaptivity skip 2.4G domain code : %d \n", pDM_Odm->odm_Regulation2_4G)); + return; + + } + else if ((*pDM_Odm->pBandType != ODM_BAND_2_4G) && (*pDM_Odm->pBandType != ODM_BAND_5G)) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("Adaptivity neither 2G nor 5G band, return\n")); + return; + } + } + else + { + if ((*pDM_Odm->pBandType == ODM_BAND_5G) && + !(pDM_Odm->odm_Regulation5G == REGULATION_ETSI || pDM_Odm->odm_Regulation5G == REGULATION_WW)) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("CarrierSense skip 5G domain code : %d\n", pDM_Odm->odm_Regulation5G)); + return; + } + + else if((*pDM_Odm->pBandType == ODM_BAND_2_4G) && + !(pDM_Odm->odm_Regulation2_4G == REGULATION_ETSI || pDM_Odm->odm_Regulation2_4G == REGULATION_WW)) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("CarrierSense skip 2.4G domain code : %d\n", pDM_Odm->odm_Regulation2_4G)); + return; + + } + else if ((*pDM_Odm->pBandType != ODM_BAND_2_4G) && (*pDM_Odm->pBandType != ODM_BAND_5G)) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("CarrierSense neither 2G nor 5G band, return\n")); + return; + } + } + } +#endif + + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_Adaptivity() =====> \n")); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("ForceEDCCA=%d, IGI_Base=0x%x, TH_L2H_ini = %d, TH_EDCCA_HL_diff = %d, AdapEn_RSSI = %d\n", + pDM_Odm->ForceEDCCA, pDM_Odm->IGI_Base, pDM_Odm->TH_L2H_ini, pDM_Odm->TH_EDCCA_HL_diff, pDM_Odm->AdapEn_RSSI)); + + if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) + ODM_SetBBReg(pDM_Odm, 0x800, BIT10, 0); //ADC_mask enable + + if(*pDM_Odm->pBandWidth == ODM_BW20M) //CHANNEL_WIDTH_20 + IGI_target = pDM_Odm->IGI_Base; + else if(*pDM_Odm->pBandWidth == ODM_BW40M) + IGI_target = pDM_Odm->IGI_Base + 2; + else if(*pDM_Odm->pBandWidth == ODM_BW80M) + IGI_target = pDM_Odm->IGI_Base + 2; + else + IGI_target = pDM_Odm->IGI_Base; + pDM_Odm->IGI_target = (u1Byte) IGI_target; + + //Search pwdB lower bound + if(pDM_Odm->TxHangFlg == TRUE) + { + if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) + ODM_SetBBReg(pDM_Odm,ODM_REG_DBG_RPT_11N, bMaskDWord, 0x208); + else if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) + ODM_SetBBReg(pDM_Odm,ODM_REG_DBG_RPT_11AC, bMaskDWord, 0x209); + odm_SearchPwdBLowerBound(pDM_Odm, pDM_Odm->IGI_target ); + } + + if((!pDM_Odm->bLinked)||(*pDM_Odm->pChannel > 149)) // Band4 doesn't need adaptivity + { + if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) + { + ODM_SetBBReg(pDM_Odm,rOFDM0_ECCAThreshold, bMaskByte0, 0x7f); + ODM_SetBBReg(pDM_Odm,rOFDM0_ECCAThreshold, bMaskByte2, 0x7f); + } + else + ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIReadBack, 0xFFFF, (0x7f<<8) | 0x7f); + return; + } + + if(!pDM_Odm->ForceEDCCA) + { + if(pDM_Odm->RSSI_Min > pDM_Odm->AdapEn_RSSI) + EDCCA_State = 1; + else if(pDM_Odm->RSSI_Min < (pDM_Odm->AdapEn_RSSI - 5)) + EDCCA_State = 0; + } + else + EDCCA_State = 1; + + if(pDM_Odm->bLinked && pDM_Odm->Carrier_Sense_enable == FALSE && pDM_Odm->NHM_disable == FALSE &&pDM_Odm->TxHangFlg == FALSE) + odm_NHMBB(pDM_Odm); + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("BandWidth=%s, IGI_target=0x%x, EDCCA_State=%d\n", + (*pDM_Odm->pBandWidth==ODM_BW80M)?"80M":((*pDM_Odm->pBandWidth==ODM_BW40M)?"40M":"20M"), IGI_target, EDCCA_State)); + + if(EDCCA_State == 1) + { + Diff = IGI_target -(s1Byte)IGI; + TH_L2H_dmc = pDM_Odm->TH_L2H_ini + Diff; + if(TH_L2H_dmc > 10) + TH_L2H_dmc = 10; + + TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff; + + //replace lower bound to prevent EDCCA always equal 1 + if(TH_H2L_dmc < pDM_Odm->H2L_lb) + TH_H2L_dmc = pDM_Odm->H2L_lb; + if(TH_L2H_dmc < pDM_Odm->L2H_lb) + TH_L2H_dmc = pDM_Odm->L2H_lb; + } + else + { + TH_L2H_dmc = 0x7f; + TH_H2L_dmc = 0x7f; + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("IGI=0x%x, TH_L2H_dmc = %d, TH_H2L_dmc = %d\n", + IGI, TH_L2H_dmc, TH_H2L_dmc)); + if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) + { + ODM_SetBBReg(pDM_Odm,rOFDM0_ECCAThreshold, bMaskByte0, (u1Byte)TH_L2H_dmc); + ODM_SetBBReg(pDM_Odm,rOFDM0_ECCAThreshold, bMaskByte2, (u1Byte)TH_H2L_dmc); + } + else + ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIReadBack, 0xFFFF, ((u1Byte)TH_H2L_dmc<<8) | (u1Byte)TH_L2H_dmc); +} + +int +getIGIForDiff(int value_IGI) +{ + #define ONERCCA_LOW_TH 0x30 + #define ONERCCA_LOW_DIFF 8 + + if (value_IGI < ONERCCA_LOW_TH) { + if ((ONERCCA_LOW_TH - value_IGI) < ONERCCA_LOW_DIFF) + return ONERCCA_LOW_TH; + else + return value_IGI + ONERCCA_LOW_DIFF; + } else { + return value_IGI; + } +} + +VOID +ODM_Write_DIG( + IN PVOID pDM_VOID, + IN u1Byte CurrentIGI + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; + + if(pDM_DigTable->bStopDIG) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("Stop Writing IGI\n")); + return; + } + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_TRACE, ("ODM_REG(IGI_A,pDM_Odm)=0x%x, ODM_BIT(IGI,pDM_Odm)=0x%x \n", + ODM_REG(IGI_A,pDM_Odm),ODM_BIT(IGI,pDM_Odm))); + + if(pDM_DigTable->CurIGValue != CurrentIGI) + { + //1 Check initial gain by upper bound + if(!pDM_DigTable->bPSDInProgress) + { + if(CurrentIGI > pDM_DigTable->rx_gain_range_max) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_TRACE, ("CurrentIGI(0x%02x) is larger than upper bound !!\n",pDM_DigTable->rx_gain_range_max)); + CurrentIGI = pDM_DigTable->rx_gain_range_max; + } + + } + + //1 Set IGI value + if(pDM_Odm->SupportPlatform & (ODM_WIN|ODM_CE)) + { + ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); + + if(pDM_Odm->RFType > ODM_1T1R) + ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); + + if((pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) && (pDM_Odm->RFType > ODM_2T2R)) + { + ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_C,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); + ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_D,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); + } + } + else if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) + { + switch(*(pDM_Odm->pOnePathCCA)) + { + case ODM_CCA_2R: + ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); + + if(pDM_Odm->RFType > ODM_1T1R) + ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); + + if((pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) && (pDM_Odm->RFType > ODM_2T2R)) + { + ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_C,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); + ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_D,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); + } + break; + case ODM_CCA_1R_A: + ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); + if(pDM_Odm->RFType != ODM_1T1R) + ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), getIGIForDiff(CurrentIGI)); + break; + case ODM_CCA_1R_B: + ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm), getIGIForDiff(CurrentIGI)); + if(pDM_Odm->RFType != ODM_1T1R) + ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_B,pDM_Odm), ODM_BIT(IGI,pDM_Odm), CurrentIGI); + break; + } + } + pDM_DigTable->CurIGValue = CurrentIGI; + } + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_TRACE, ("CurrentIGI(0x%02x). \n",CurrentIGI)); + +} + +VOID +odm_PauseDIG( + IN PVOID pDM_VOID, + IN ODM_Pause_DIG_TYPE PauseType, + IN u1Byte IGIValue +) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; + static BOOLEAN bPaused = FALSE; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG()=========>\n")); + +#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + if(*pDM_DigTable->pbP2pLinkInProgress) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): P2P in progress !!\n")); + return; + } +#endif + + if((pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY) && pDM_Odm->TxHangFlg == TRUE) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Dynamic adjust threshold in progress !!\n")); + return; + } + + if(!bPaused && (!(pDM_Odm->SupportAbility & ODM_BB_DIG) || !(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Return: SupportAbility ODM_BB_DIG or ODM_BB_FA_CNT is disabled\n")); + return; + } + + switch(PauseType) + { + //1 Pause DIG + case ODM_PAUSE_DIG: + //2 Disable DIG + ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_ABILITY, pDM_Odm->SupportAbility & (~ODM_BB_DIG)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Pause DIG !!\n")); + + //2 Backup IGI value + if(!bPaused) + { + pDM_DigTable->IGIBackup = pDM_DigTable->CurIGValue; + bPaused = TRUE; + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Backup IGI = 0x%x\n", pDM_DigTable->IGIBackup)); + + //2 Write new IGI value + ODM_Write_DIG(pDM_Odm, IGIValue); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Write new IGI = 0x%x\n", IGIValue)); + break; + + //1 Resume DIG + case ODM_RESUME_DIG: + if(bPaused) + { + //2 Write backup IGI value + ODM_Write_DIG(pDM_Odm, pDM_DigTable->IGIBackup); + bPaused = FALSE; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Write original IGI = 0x%x\n", pDM_DigTable->IGIBackup)); + + //2 Enable DIG + ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_ABILITY, pDM_Odm->SupportAbility | ODM_BB_DIG); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Resume DIG !!\n")); + } + break; + + default: + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Wrong type !!\n")); + break; + } +} + +BOOLEAN +odm_DigAbort( + IN PVOID pDM_VOID + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + prtl8192cd_priv priv = pDM_Odm->priv; +#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) + PADAPTER pAdapter = pDM_Odm->Adapter; + pRXHP_T pRX_HP_Table = &pDM_Odm->DM_RXHP_Table; +#endif + + //SupportAbility + if(!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: SupportAbility ODM_BB_FA_CNT is disabled\n")); + return TRUE; + } + + //SupportAbility + if(!(pDM_Odm->SupportAbility & ODM_BB_DIG)) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: SupportAbility ODM_BB_DIG is disabled\n")); + return TRUE; + } + + //ScanInProcess + if(*(pDM_Odm->pbScanInProcess)) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: In Scan Progress \n")); + return TRUE; + } + + //add by Neil Chen to avoid PSD is processing + if(pDM_Odm->bDMInitialGainEnable == FALSE) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: PSD is Processing \n")); + return TRUE; + } + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + #if OS_WIN_FROM_WIN7(OS_VERSION) + if(IsAPModeExist( pAdapter) && pAdapter->bInHctTest) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: Is AP mode or In HCT Test \n")); + return TRUE; + } + #endif + + if(pDM_Odm->bBtHsOperation) + { + odm_DigForBtHsMode(pDM_Odm); + } + + if(!(pDM_Odm->SupportICType &(ODM_RTL8723A|ODM_RTL8188E))) + { + if(pRX_HP_Table->RXHP_flag == 1) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: In RXHP Operation \n")); + return TRUE; + } + } +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) + #ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV + if((pDM_Odm->bLinked) && (pDM_Odm->Adapter->registrypriv.force_igi !=0)) + { + printk("pDM_Odm->RSSI_Min=%d \n",pDM_Odm->RSSI_Min); + ODM_Write_DIG(pDM_Odm,pDM_Odm->Adapter->registrypriv.force_igi); + return TRUE; + } + #endif +#else + if (!(priv->up_time > 5)) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: Not In DIG Operation Period \n")); + return TRUE; + } +#endif + + return FALSE; +} + +VOID +odm_DIGInit( + IN PVOID pDM_VOID + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; + PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); + + pDM_DigTable->bStopDIG = FALSE; + pDM_DigTable->bPSDInProgress = FALSE; + pDM_DigTable->CurIGValue = (u1Byte) ODM_GetBBReg(pDM_Odm, ODM_REG(IGI_A,pDM_Odm), ODM_BIT(IGI,pDM_Odm)); + pDM_DigTable->RssiLowThresh = DM_DIG_THRESH_LOW; + pDM_DigTable->RssiHighThresh = DM_DIG_THRESH_HIGH; + pDM_DigTable->FALowThresh = DM_FALSEALARM_THRESH_LOW; + pDM_DigTable->FAHighThresh = DM_FALSEALARM_THRESH_HIGH; + pDM_DigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; + pDM_DigTable->BackoffVal_range_max = DM_DIG_BACKOFF_MAX; + pDM_DigTable->BackoffVal_range_min = DM_DIG_BACKOFF_MIN; + pDM_DigTable->PreCCK_CCAThres = 0xFF; + pDM_DigTable->CurCCK_CCAThres = 0x83; + pDM_DigTable->ForbiddenIGI = DM_DIG_MIN_NIC; + pDM_DigTable->LargeFAHit = 0; + pDM_DigTable->Recover_cnt = 0; + pDM_DigTable->bMediaConnect_0 = FALSE; + pDM_DigTable->bMediaConnect_1 = FALSE; + + //To Initialize pDM_Odm->bDMInitialGainEnable == FALSE to avoid DIG error + pDM_Odm->bDMInitialGainEnable = TRUE; + +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + pDM_DigTable->DIG_Dynamic_MIN_0 = 0x25; + pDM_DigTable->DIG_Dynamic_MIN_1 = 0x25; + + // For AP\ ADSL modified DIG + pDM_DigTable->bTpTarget = FALSE; + pDM_DigTable->bNoiseEst = TRUE; + pDM_DigTable->IGIOffset_A = 0; + pDM_DigTable->IGIOffset_B = 0; + pDM_DigTable->TpTrainTH_min = 0; + + // For RTL8881A + FalseAlmCnt->Cnt_Ofdm_fail_pre = 0; + + //Dyanmic EDCCA + if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) + { + ODM_SetBBReg(pDM_Odm, 0xC50, 0xFFFF0000, 0xfafd); + } +#else + pDM_DigTable->DIG_Dynamic_MIN_0 = DM_DIG_MIN_NIC; + pDM_DigTable->DIG_Dynamic_MIN_1 = DM_DIG_MIN_NIC; + + //To Initi BT30 IGI + pDM_DigTable->BT30_CurIGI=0x32; + + #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + *pDM_DigTable->pbP2pLinkInProgress= FALSE; + #endif +#endif + + if(pDM_Odm->BoardType & (ODM_BOARD_EXT_PA|ODM_BOARD_EXT_LNA)) + { + pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; + pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; + } + else + { + pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; + pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; + } + +} + + +VOID +odm_DIG( + IN PVOID pDM_VOID + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; +#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + PADAPTER pAdapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pDM_Odm->Adapter); +#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + prtl8192cd_priv priv = pDM_Odm->priv; + PSTA_INFO_T pEntry; +#endif + + // Common parameters + pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; + PFALSE_ALARM_STATISTICS pFalseAlmCnt = &pDM_Odm->FalseAlmCnt; + BOOLEAN FirstConnect,FirstDisConnect; + u1Byte DIG_MaxOfMin, DIG_Dynamic_MIN, i; + u1Byte dm_dig_max, dm_dig_min; + u1Byte CurrentIGI = pDM_DigTable->CurIGValue; + u1Byte offset; + u4Byte dm_FA_thres[3]; + u1Byte Adap_IGI_Upper = 0; + u4Byte TxTp = 0, RxTp = 0; + BOOLEAN bDFSBand = FALSE; + BOOLEAN bPerformance = TRUE, bFirstTpTarget = FALSE, bFirstCoverage = FALSE; +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + u4Byte TpTrainTH_MIN = DM_DIG_TP_Target_TH0; + static u1Byte TimeCnt = 0; +#endif + + if(odm_DigAbort(pDM_Odm) == TRUE) + return; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG()===========================>\n\n")); + + if(pDM_Odm->adaptivity_flag == TRUE) + Adap_IGI_Upper = pDM_Odm->Adaptivity_IGI_upper; + + + //1 Update status + if(pDM_Odm->SupportICType == ODM_RTL8192D) + { + if(*(pDM_Odm->pMacPhyMode) == ODM_DMSP) + { + if(*(pDM_Odm->pbMasterOfDMSP)) + { + DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; + FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); + FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); + } + else + { + DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_1; + FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == FALSE); + FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == TRUE); + } + } + else + { + if(*(pDM_Odm->pBandType) == ODM_BAND_5G) + { + DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; + FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); + FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); + } + else + { + DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_1; + FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == FALSE); + FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_1 == TRUE); + } + } + } + else + { + DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; + FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); + FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == TRUE); + } + +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + //1 Noise Floor Estimate + //pDM_DigTable->bNoiseEst = (FirstConnect)?TRUE:pDM_DigTable->bNoiseEst; + //odm_InbandNoiseCalculate (pDM_Odm); + + //1 Mode decision + if(pDM_Odm->bLinked) + { + //2 Calculate total TP + for (i=0; ipODM_StaInfo[i]; + if(IS_STA_VALID(pEntry)) + { + RxTp += (u4Byte)(pEntry->rx_byte_cnt_LowMAW>>7); + TxTp += (u4Byte)(pEntry->tx_byte_cnt_LowMAW>>7); //Kbps + } + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): TX TP = %dkbps, RX TP = %dkbps\n", TxTp, RxTp)); + } + + switch(pDM_Odm->priv->pshare->rf_ft_var.dig_cov_enable) + { + case 0: + { + bPerformance = TRUE; + break; + } + case 1: + { + bPerformance = FALSE; + break; + } + case 2: + { + if(pDM_Odm->bLinked) + { + if(pDM_DigTable->TpTrainTH_min > DM_DIG_TP_Target_TH0) + TpTrainTH_MIN = pDM_DigTable->TpTrainTH_min; + + if(pDM_DigTable->TpTrainTH_min > DM_DIG_TP_Target_TH1) + TpTrainTH_MIN = DM_DIG_TP_Target_TH1; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): TP training mode lower bound = %dkbps\n", TpTrainTH_MIN)); + + //2 Decide DIG mode by total TP + if((TxTp + RxTp) > DM_DIG_TP_Target_TH1) // change to performance mode + { + bFirstTpTarget = (!pDM_DigTable->bTpTarget)?TRUE:FALSE; + pDM_DigTable->bTpTarget = TRUE; + bPerformance = TRUE; + } + else if((TxTp + RxTp) < TpTrainTH_MIN) // change to coverage mode + { + bFirstCoverage = (pDM_DigTable->bTpTarget)?TRUE:FALSE; + + if(TimeCnt < DM_DIG_TP_Training_Period) + { + pDM_DigTable->bTpTarget = FALSE; + bPerformance = FALSE; + TimeCnt++; + } + else + { + pDM_DigTable->bTpTarget = TRUE; + bPerformance = TRUE; + bFirstTpTarget = TRUE; + TimeCnt = 0; + } + } + else // remain previous mode + { + bPerformance = pDM_DigTable->bTpTarget; + + if(!bPerformance) + { + if(TimeCnt < DM_DIG_TP_Training_Period) + TimeCnt++; + else + { + pDM_DigTable->bTpTarget = TRUE; + bPerformance = TRUE; + bFirstTpTarget = TRUE; + TimeCnt = 0; + } + } + } + + if(!bPerformance) + pDM_DigTable->TpTrainTH_min = RxTp + TxTp; + + } + else + { + bPerformance = FALSE; + pDM_DigTable->TpTrainTH_min = 0; + } + break; + } + default: + bPerformance = TRUE; + } + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("====== DIG mode = %d ======\n", pDM_Odm->priv->pshare->rf_ft_var.dig_cov_enable)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("====== bPerformance = %d ======\n", bPerformance)); +#endif + + //1 Boundary Decision + if((pDM_Odm->SupportICType & ODM_RTL8192C) && (pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA))) + { + //2 High power case + if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) + { + dm_dig_max = DM_DIG_MAX_AP_HP; + dm_dig_min = DM_DIG_MIN_AP_HP; + } + else + { + dm_dig_max = DM_DIG_MAX_NIC_HP; + dm_dig_min = DM_DIG_MIN_NIC_HP; + } + DIG_MaxOfMin = DM_DIG_MAX_AP_HP; + } + else + { +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + //2 For AP\ADSL + if(!bPerformance) + { + dm_dig_max = DM_DIG_MAX_AP_COVERAGR; + dm_dig_min = DM_DIG_MIN_AP_COVERAGE; + DIG_MaxOfMin = DM_DIG_MAX_OF_MIN_COVERAGE; + } + else + { + dm_dig_max = DM_DIG_MAX_AP; + dm_dig_min = DM_DIG_MIN_AP; + DIG_MaxOfMin = DM_DIG_MAX_OF_MIN; + } + + //4 DFS band + if (((*pDM_Odm->pChannel>= 52) &&(*pDM_Odm->pChannel <= 64)) || + ((*pDM_Odm->pChannel >= 100) && (*pDM_Odm->pChannel <= 140))) + { + bDFSBand = TRUE; + dm_dig_min = DM_DIG_MIN_AP_DFS; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): ====== In DFS band ======\n")); + } + + //4 TX2path + if (priv->pmib->dot11RFEntry.tx2path && !bDFSBand && (*(pDM_Odm->pWirelessMode) == ODM_WM_B)) + dm_dig_max = 0x2A; + +#if RTL8192E_SUPPORT +#ifdef HIGH_POWER_EXT_LNA + if ((pDM_Odm->SupportICType & (ODM_RTL8192E)) && (pDM_Odm->ExtLNA)) + dm_dig_max = 0x42; +#endif +#endif + +#else + //2 For WIN\CE + if(pDM_Odm->SupportICType >= ODM_RTL8188E) + dm_dig_max = 0x5A; + else + dm_dig_max = DM_DIG_MAX_NIC; + + if(pDM_Odm->SupportICType != ODM_RTL8821) + dm_dig_min = DM_DIG_MIN_NIC; + else + dm_dig_min = 0x1C; + + DIG_MaxOfMin = DM_DIG_MAX_AP; +#endif + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Absolutly upper bound = 0x%x, lower bound = 0x%x\n",dm_dig_max, dm_dig_min)); + +#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + // for P2P case + if(0 < *pDM_Odm->pu1ForcedIgiLb) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): P2P case: Force IGI lb to: %u !!!!!!\n", *pDM_Odm->pu1ForcedIgiLb)); + dm_dig_min = *pDM_Odm->pu1ForcedIgiLb; + dm_dig_max = (dm_dig_min <= dm_dig_max) ? (dm_dig_max) : (dm_dig_min + 1); + } +#endif + + //1 Adjust boundary by RSSI + if(pDM_Odm->bLinked && bPerformance) + { + //2 Modify DIG upper bound +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + offset = 15; +#else + //4 Modify DIG upper bound for 92E, 8723A\B, 8821 & 8812 BT + if((pDM_Odm->SupportICType & (ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8812|ODM_RTL8821|ODM_RTL8723A)) && (pDM_Odm->bBtLimitedDig==1)) + { + offset = 10; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Coex. case: Force upper bound to RSSI + %d !!!!!!\n", offset)); + } + else + offset = 15; +#endif + + if((pDM_Odm->RSSI_Min + offset) > dm_dig_max ) + pDM_DigTable->rx_gain_range_max = dm_dig_max; + else if((pDM_Odm->RSSI_Min + offset) < dm_dig_min ) + pDM_DigTable->rx_gain_range_max = dm_dig_min; + else + pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + offset; + +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) + //2 Modify DIG lower bound + //if(pDM_Odm->bOneEntryOnly) + { + if(pDM_Odm->RSSI_Min < dm_dig_min) + DIG_Dynamic_MIN = dm_dig_min; + else if (pDM_Odm->RSSI_Min > DIG_MaxOfMin) + DIG_Dynamic_MIN = DIG_MaxOfMin; + else + DIG_Dynamic_MIN = pDM_Odm->RSSI_Min; + } +#else + { + //4 For AP +#ifdef __ECOS + HAL_REORDER_BARRIER(); +#else + rmb(); +#endif + if (bDFSBand) + { + DIG_Dynamic_MIN = dm_dig_min; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DFS band: Force lower bound to 0x%x after link !!!!!!\n", dm_dig_min)); + } + else + { + if(pDM_Odm->RSSI_Min < dm_dig_min) + DIG_Dynamic_MIN = dm_dig_min; + else if (pDM_Odm->RSSI_Min > DIG_MaxOfMin) + DIG_Dynamic_MIN = DIG_MaxOfMin; + else + DIG_Dynamic_MIN = pDM_Odm->RSSI_Min; + } + } +#endif + } + else + { +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + if(bPerformance && bDFSBand) + { + pDM_DigTable->rx_gain_range_max = 0x28; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DFS band: Force upper bound to 0x%x before link !!!!!!\n", pDM_DigTable->rx_gain_range_max)); + } + else +#endif + { + pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_AP; + } + DIG_Dynamic_MIN = dm_dig_min; + } + + //1 Force Lower Bound for AntDiv + if(pDM_Odm->bLinked && !pDM_Odm->bOneEntryOnly) + { + if((pDM_Odm->SupportICType & ODM_ANTDIV_SUPPORT) && (pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) + { + if(pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV || pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV ||pDM_Odm->AntDivType == S0S1_SW_ANTDIV) + { + if(pDM_DigTable->AntDiv_RSSI_max > DIG_MaxOfMin) + DIG_Dynamic_MIN = DIG_MaxOfMin; + else + DIG_Dynamic_MIN = (u1Byte) pDM_DigTable->AntDiv_RSSI_max; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_DIG(): Antenna diversity case: Force lower bound to 0x%x !!!!!!\n", DIG_Dynamic_MIN)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_DIG(): Antenna diversity case: RSSI_max = 0x%x !!!!!!\n", pDM_DigTable->AntDiv_RSSI_max)); + } + } + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Adjust boundary by RSSI Upper bound = 0x%x, Lower bound = 0x%x\n", + pDM_DigTable->rx_gain_range_max, DIG_Dynamic_MIN)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Link status: bLinked = %d, RSSI = %d, bFirstConnect = %d, bFirsrDisConnect = %d\n\n", + pDM_Odm->bLinked, pDM_Odm->RSSI_Min, FirstConnect, FirstDisConnect)); + + //1 Modify DIG lower bound, deal with abnormal case + //2 Abnormal false alarm case +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + if(bDFSBand) + { + pDM_DigTable->rx_gain_range_min = DIG_Dynamic_MIN; + } + else +#endif + { + if(FirstDisConnect) + { + pDM_DigTable->rx_gain_range_min = DIG_Dynamic_MIN; + pDM_DigTable->ForbiddenIGI = DIG_Dynamic_MIN; + } + else + pDM_DigTable->rx_gain_range_min = odm_ForbiddenIGICheck(pDM_Odm, DIG_Dynamic_MIN, CurrentIGI); + } + + //2 Abnormal # beacon case +#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[0]) && !ACTING_AS_AP(pAdapter)) + pDM_Odm->bsta_state = TRUE; +#endif + + +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) + if(pDM_Odm->bLinked && !FirstConnect) + { + if((pDM_Odm->PhyDbgInfo.NumQryBeaconPkt < 5) && (pDM_Odm->bsta_state)) + { + pDM_DigTable->rx_gain_range_min = dm_dig_min; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnrormal #beacon (%d) case in STA mode: Force lower bound to 0x%x !!!!!!\n\n", + pDM_Odm->PhyDbgInfo.NumQryBeaconPkt, pDM_DigTable->rx_gain_range_min)); + } + } +#endif + + //2 Abnormal lower bound case + if(pDM_DigTable->rx_gain_range_min > pDM_DigTable->rx_gain_range_max) + { + pDM_DigTable->rx_gain_range_min = pDM_DigTable->rx_gain_range_max; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnrormal lower bound case: Force lower bound to 0x%x !!!!!!\n\n",pDM_DigTable->rx_gain_range_min)); + } + + + //1 False alarm threshold decision + odm_FAThresholdCheck(pDM_Odm, bDFSBand, bPerformance, RxTp, TxTp, dm_FA_thres); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): False alarm threshold = %d, %d, %d \n\n", dm_FA_thres[0], dm_FA_thres[1], dm_FA_thres[2])); + + //1 Adjust initial gain by false alarm + if(pDM_Odm->bLinked && bPerformance) + { + //2 After link + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Adjust IGI after link\n")); + + if(bFirstTpTarget || (FirstConnect && bPerformance)) + { + pDM_DigTable->LargeFAHit = 0; + +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + if(bDFSBand) + { + if(pDM_Odm->RSSI_Min > 0x28) + CurrentIGI = 0x28; + else + CurrentIGI = pDM_Odm->RSSI_Min; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DFS band: One-shot to 0x28 upmost!!!!!!\n")); + } + else +#endif + { + if(pDM_Odm->RSSI_Min < DIG_MaxOfMin) + { + if(CurrentIGI < pDM_Odm->RSSI_Min) + CurrentIGI = pDM_Odm->RSSI_Min; + } + else + { + if(CurrentIGI < DIG_MaxOfMin) + CurrentIGI = DIG_MaxOfMin; + } + +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) + if(pDM_Odm->SupportICType == ODM_RTL8812) + ODM_ConfigBBWithHeaderFile(pDM_Odm, CONFIG_BB_AGC_TAB_DIFF); +#endif + } + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): First connect case: IGI does on-shot to 0x%x\n", CurrentIGI)); + + } + else + { + if(pFalseAlmCnt->Cnt_all > dm_FA_thres[2]) + CurrentIGI = CurrentIGI + 4; + else if (pFalseAlmCnt->Cnt_all > dm_FA_thres[1]) + CurrentIGI = CurrentIGI + 2; + else if(pFalseAlmCnt->Cnt_all < dm_FA_thres[0]) + CurrentIGI = CurrentIGI - 2; + + //4 Abnormal # beacon case +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[0]) && !ACTING_AS_AP(pAdapter)) //STA mode is linked to AP + pDM_Odm->bsta_state = _TRUE; +#endif + +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) + if((pDM_Odm->PhyDbgInfo.NumQryBeaconPkt < 5) && (pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH1) && (pDM_Odm->bsta_state)) + { + CurrentIGI = pDM_DigTable->rx_gain_range_min; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnormal #beacon (%d) case: IGI does one-shot to 0x%x\n", + pDM_Odm->PhyDbgInfo.NumQryBeaconPkt, CurrentIGI)); + } +#endif + } + } + else + { + //2 Before link + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Adjust IGI before link\n")); + + if(FirstDisConnect || bFirstCoverage) + { + CurrentIGI = dm_dig_min; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): First disconnect case: IGI does on-shot to lower bound\n")); + } + else + { + if(pFalseAlmCnt->Cnt_all > dm_FA_thres[2]) + CurrentIGI = CurrentIGI + 4; + else if (pFalseAlmCnt->Cnt_all > dm_FA_thres[1]) + CurrentIGI = CurrentIGI + 2; + else if(pFalseAlmCnt->Cnt_all < dm_FA_thres[0]) + CurrentIGI = CurrentIGI - 2; + } + } + + //1 Check initial gain by upper/lower bound + if(CurrentIGI < pDM_DigTable->rx_gain_range_min) + CurrentIGI = pDM_DigTable->rx_gain_range_min; + + if(CurrentIGI > pDM_DigTable->rx_gain_range_max) + CurrentIGI = pDM_DigTable->rx_gain_range_max; + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue=0x%x, TotalFA = %d\n\n", CurrentIGI, pFalseAlmCnt->Cnt_all)); + + //1 Force upper bound and lower bound for adaptivity + if(pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY && pDM_Odm->adaptivity_flag == TRUE) + { + if(CurrentIGI > Adap_IGI_Upper) + CurrentIGI = Adap_IGI_Upper; + + if(pDM_Odm->IGI_LowerBound != 0) + { + if(CurrentIGI < pDM_Odm->IGI_LowerBound) + CurrentIGI = pDM_Odm->IGI_LowerBound; + } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Adaptivity case: Force upper bound to 0x%x !!!!!!\n", Adap_IGI_Upper)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Adaptivity case: Force lower bound to 0x%x !!!!!!\n\n", pDM_Odm->IGI_LowerBound)); + } + + + //1 High power RSSI threshold +#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + if((pDM_Odm->SupportICType == ODM_RTL8723A)&& (pHalData->UndecoratedSmoothedPWDB > DM_DIG_HIGH_PWR_THRESHOLD)) + { + // High power IGI lower bound + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): UndecoratedSmoothedPWDB(%#x)\n", pHalData->UndecoratedSmoothedPWDB)); + if(CurrentIGI < DM_DIG_HIGH_PWR_IGI_LOWER_BOUND) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue(%#x)\n", pDM_DigTable->CurIGValue)); + //pDM_DigTable->CurIGValue = DM_DIG_HIGH_PWR_IGI_LOWER_BOUND; + CurrentIGI=DM_DIG_HIGH_PWR_IGI_LOWER_BOUND; + } + } + if((pDM_Odm->SupportICType & ODM_RTL8723A) && IS_WIRELESS_MODE_G(pAdapter)) + { + if(pHalData->UndecoratedSmoothedPWDB > 0x28) + { + if(CurrentIGI < DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND) + { + //pDM_DigTable->CurIGValue = DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND; + CurrentIGI = DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND; + } + } + } +#endif + + //1 Update status +#if (RTL8192D_SUPPORT==1) + if(pDM_Odm->SupportICType == ODM_RTL8192D) + { + //sherry delete DualMacSmartConncurrent 20110517 + if(*(pDM_Odm->pMacPhyMode) == ODM_DMSP) + { + ODM_Write_DIG_DMSP(pDM_Odm, CurrentIGI);//ODM_Write_DIG_DMSP(pDM_Odm, pDM_DigTable->CurIGValue); + if(*(pDM_Odm->pbMasterOfDMSP)) + { + pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; + pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; + } + else + { + pDM_DigTable->bMediaConnect_1 = pDM_Odm->bLinked; + pDM_DigTable->DIG_Dynamic_MIN_1 = DIG_Dynamic_MIN; + } + } + else + { + ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); + if(*(pDM_Odm->pBandType) == ODM_BAND_5G) + { + pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; + pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; + } + else + { + pDM_DigTable->bMediaConnect_1 = pDM_Odm->bLinked; + pDM_DigTable->DIG_Dynamic_MIN_1 = DIG_Dynamic_MIN; + } + } + } + else +#endif + { +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) + if(pDM_Odm->bBtHsOperation) + { + if(pDM_Odm->bLinked) + { + if(pDM_DigTable->BT30_CurIGI > (CurrentIGI)) + ODM_Write_DIG(pDM_Odm, CurrentIGI); + else + ODM_Write_DIG(pDM_Odm, pDM_DigTable->BT30_CurIGI); + + pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; + pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; + } + else + { + if(pDM_Odm->bLinkInProcess) + ODM_Write_DIG(pDM_Odm, 0x1c); + else if(pDM_Odm->bBtConnectProcess) + ODM_Write_DIG(pDM_Odm, 0x28); + else + ODM_Write_DIG(pDM_Odm, pDM_DigTable->BT30_CurIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); + } + } + else // BT is not using +#endif + { + ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); + pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; + pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; + } + } +} + +VOID +odm_DIGbyRSSI_LPS( + IN PVOID pDM_VOID + ) +{ +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + PFALSE_ALARM_STATISTICS pFalseAlmCnt = &pDM_Odm->FalseAlmCnt; + +#if (DM_ODM_SUPPORT_TYPE & ODM_CE) +#if 0 //and 2.3.5 coding rule + struct mlme_priv *pmlmepriv = &(pAdapter->mlmepriv); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; +#endif +#endif + + u1Byte RSSI_Lower=DM_DIG_MIN_NIC; //0x1E or 0x1C + u1Byte CurrentIGI=pDM_Odm->RSSI_Min; + + CurrentIGI=CurrentIGI+RSSI_OFFSET_DIG; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIGbyRSSI_LPS()==>\n")); + + // Using FW PS mode to make IGI + //Adjust by FA in LPS MODE + if(pFalseAlmCnt->Cnt_all> DM_DIG_FA_TH2_LPS) + CurrentIGI = CurrentIGI+4; + else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1_LPS) + CurrentIGI = CurrentIGI+2; + else if(pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0_LPS) + CurrentIGI = CurrentIGI-2; + + + //Lower bound checking + + //RSSI Lower bound check + if((pDM_Odm->RSSI_Min-10) > DM_DIG_MIN_NIC) + RSSI_Lower =(pDM_Odm->RSSI_Min-10); + else + RSSI_Lower =DM_DIG_MIN_NIC; + + //Upper and Lower Bound checking + if(CurrentIGI > DM_DIG_MAX_NIC) + CurrentIGI=DM_DIG_MAX_NIC; + else if(CurrentIGI < RSSI_Lower) + CurrentIGI =RSSI_Lower; + + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIGbyRSSI_LPS(): pFalseAlmCnt->Cnt_all = %d\n",pFalseAlmCnt->Cnt_all)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIGbyRSSI_LPS(): pDM_Odm->RSSI_Min = %d\n",pDM_Odm->RSSI_Min)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIGbyRSSI_LPS(): CurrentIGI = 0x%x\n",CurrentIGI)); + + ODM_Write_DIG(pDM_Odm, CurrentIGI);//ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); +#endif +} + +VOID +odm_DigForBtHsMode( + IN PVOID pDM_VOID + ) +{ +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + pDIG_T pDM_DigTable=&pDM_Odm->DM_DigTable; + u1Byte digForBtHs=0; + u1Byte digUpBound=0x5a; + + if(pDM_Odm->bBtConnectProcess) + { + if(pDM_Odm->SupportICType&(ODM_RTL8723A)) + digForBtHs = 0x28; + else + digForBtHs = 0x22; + } + else + { + // + // Decide DIG value by BT HS RSSI. + // + digForBtHs = pDM_Odm->btHsRssi+4; + + //DIG Bound + if(pDM_Odm->SupportICType&(ODM_RTL8723A)) + digUpBound = 0x3e; + + if(digForBtHs > digUpBound) + digForBtHs = digUpBound; + if(digForBtHs < 0x1c) + digForBtHs = 0x1c; + + // update Current IGI + pDM_DigTable->BT30_CurIGI = digForBtHs; + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DigForBtHsMode() : set DigValue=0x%x\n", digForBtHs)); +#endif +} + + +//3============================================================ +//3 FASLE ALARM CHECK +//3============================================================ + +VOID +odm_FalseAlarmCounterStatistics( + IN PVOID pDM_VOID + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); + u4Byte ret_value; + +#if (DM_ODM_SUPPORT_TYPE == ODM_AP) +//Mark there, and check this in odm_DMWatchDog +#if 0 //(DM_ODM_SUPPORT_TYPE == ODM_AP) + prtl8192cd_priv priv = pDM_Odm->priv; + if( (priv->auto_channel != 0) && (priv->auto_channel != 2) ) + return; +#endif +#endif + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + if((pDM_Odm->SupportICType == ODM_RTL8192D) && + (*(pDM_Odm->pMacPhyMode)==ODM_DMSP)&& ////modify by Guo.Mingzhi 2011-12-29 + (!(*(pDM_Odm->pbMasterOfDMSP)))) + { + odm_FalseAlarmCounterStatistics_ForSlaveOfDMSP(pDM_Odm); + return; + } +#endif + + if(!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)) + return; + + if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) + { + + //hold ofdm counter + ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 1); //hold page C counter + ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 1); //hold page D counter + + ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord); + FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff); + FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16); + + ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord); + FalseAlmCnt->Cnt_OFDM_CCA = (ret_value&0xffff); + FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16); + + ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord); + FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff); + FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16); + + ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord); + FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff); + + FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal + + FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail + + FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail; + +#if (RTL8188E_SUPPORT==1) + if(pDM_Odm->SupportICType == ODM_RTL8188E) + { + ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_SC_CNT_11N, bMaskDWord); + FalseAlmCnt->Cnt_BW_LSC = (ret_value&0xffff); + FalseAlmCnt->Cnt_BW_USC = ((ret_value&0xffff0000)>>16); + } +#endif + +#if (RTL8192D_SUPPORT==1) + if(pDM_Odm->SupportICType == ODM_RTL8192D) + { + odm_GetCCKFalseAlarm_92D(pDM_Odm); + } + else +#endif + { + //hold cck counter + ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT12, 1); + ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT14, 1); + + ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_LSB_11N, bMaskByte0); + FalseAlmCnt->Cnt_Cck_fail = ret_value; + + ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_MSB_11N, bMaskByte3); + FalseAlmCnt->Cnt_Cck_fail += (ret_value& 0xff)<<8; + + ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord); + FalseAlmCnt->Cnt_CCK_CCA = ((ret_value&0xFF)<<8) |((ret_value&0xFF00)>>8); + } + + FalseAlmCnt->Cnt_all = ( FalseAlmCnt->Cnt_Fast_Fsync + + FalseAlmCnt->Cnt_SB_Search_fail + + FalseAlmCnt->Cnt_Parity_Fail + + FalseAlmCnt->Cnt_Rate_Illegal + + FalseAlmCnt->Cnt_Crc8_fail + + FalseAlmCnt->Cnt_Mcs_fail + + FalseAlmCnt->Cnt_Cck_fail); + + FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA + FalseAlmCnt->Cnt_CCK_CCA; + +#if (RTL8192C_SUPPORT==1) + if(pDM_Odm->SupportICType == ODM_RTL8192C) + odm_ResetFACounter_92C(pDM_Odm); +#endif + +#if (RTL8192D_SUPPORT==1) + if(pDM_Odm->SupportICType == ODM_RTL8192D) + odm_ResetFACounter_92D(pDM_Odm); +#endif + + if(pDM_Odm->SupportICType >=ODM_RTL8723A) + { + //reset false alarm counter registers + ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT31, 1); + ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT31, 0); + ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT27, 1); + ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT27, 0); + + //update ofdm counter + ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 0); //update page C counter + ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 0); //update page D counter + + //reset CCK CCA counter + ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT13|BIT12, 0); + ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT13|BIT12, 2); + //reset CCK FA counter + ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT15|BIT14, 0); + ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT15|BIT14, 2); + } + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Enter odm_FalseAlarmCounterStatistics\n")); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Fast_Fsync=%d, Cnt_SB_Search_fail=%d\n", + FalseAlmCnt->Cnt_Fast_Fsync, FalseAlmCnt->Cnt_SB_Search_fail)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Parity_Fail=%d, Cnt_Rate_Illegal=%d\n", + FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Crc8_fail=%d, Cnt_Mcs_fail=%d\n", + FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail)); + } + else if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) + { + u4Byte CCKenable; + u4Byte Cnt_Ofdm_fail_temp = 0; + + //read OFDM FA counter + FalseAlmCnt->Cnt_Ofdm_fail = ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_11AC, bMaskLWord); + FalseAlmCnt->Cnt_Cck_fail = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_11AC, bMaskLWord); + + //read CCK/OFDM CCA counter + ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_CCA_CNT_11AC, bMaskDWord); + FalseAlmCnt->Cnt_OFDM_CCA = (ret_value & 0xffff0000) >> 16; + FalseAlmCnt->Cnt_CCK_CCA = ret_value & 0xffff; + + // For 8881A + if(pDM_Odm->SupportICType == ODM_RTL8881A) + { + if(FalseAlmCnt->Cnt_Ofdm_fail >= FalseAlmCnt->Cnt_Ofdm_fail_pre) + { + Cnt_Ofdm_fail_temp = FalseAlmCnt->Cnt_Ofdm_fail_pre; + FalseAlmCnt->Cnt_Ofdm_fail_pre = FalseAlmCnt->Cnt_Ofdm_fail; + FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Ofdm_fail - Cnt_Ofdm_fail_temp; + } + else + FalseAlmCnt->Cnt_Ofdm_fail_pre = FalseAlmCnt->Cnt_Ofdm_fail; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail_pre)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Ofdm_fail_pre=%d\n", Cnt_Ofdm_fail_temp)); + + // Reset FA counter by enable/disable OFDM + if(FalseAlmCnt->Cnt_Ofdm_fail_pre >= 0x7fff) + { + // reset OFDM + ODM_SetBBReg(pDM_Odm, ODM_REG_BB_RX_PATH_11AC, BIT29,0); + ODM_SetBBReg(pDM_Odm, ODM_REG_BB_RX_PATH_11AC, BIT29,1); + FalseAlmCnt->Cnt_Ofdm_fail_pre = 0; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Reset false alarm counter\n")); + } + } + + // reset OFDM FA coutner + ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RST_11AC, BIT17, 1); + ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RST_11AC, BIT17, 0); + + // reset CCK FA counter + ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11AC, BIT15, 0); + ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11AC, BIT15, 1); + + // reset CCA counter + ODM_SetBBReg(pDM_Odm, ODM_REG_RST_RPT_11AC, BIT0, 1); + ODM_SetBBReg(pDM_Odm, ODM_REG_RST_RPT_11AC, BIT0, 0); + + CCKenable = ODM_GetBBReg(pDM_Odm, ODM_REG_BB_RX_PATH_11AC, BIT28); + if(CCKenable)//if(*pDM_Odm->pBandType == ODM_BAND_2_4G) + { + FalseAlmCnt->Cnt_all = FalseAlmCnt->Cnt_Ofdm_fail + FalseAlmCnt->Cnt_Cck_fail; + FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_CCK_CCA + FalseAlmCnt->Cnt_OFDM_CCA; + } + else + { + FalseAlmCnt->Cnt_all = FalseAlmCnt->Cnt_Ofdm_fail; + FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA; + } + + } + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_OFDM_CCA=%d\n", FalseAlmCnt->Cnt_OFDM_CCA)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_CCK_CCA=%d\n", FalseAlmCnt->Cnt_CCK_CCA)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_CCA_all=%d\n", FalseAlmCnt->Cnt_CCA_all)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Cck_fail=%d\n", FalseAlmCnt->Cnt_Cck_fail)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Total False Alarm=%d\n", FalseAlmCnt->Cnt_all)); +} + + +VOID +odm_FAThresholdCheck( + IN PVOID pDM_VOID, + IN BOOLEAN bDFSBand, + IN BOOLEAN bPerformance, + IN u4Byte RxTp, + IN u4Byte TxTp, + OUT u4Byte* dm_FA_thres + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + + if(pDM_Odm->bLinked && (bPerformance||bDFSBand)) + { + if(pDM_Odm->SupportICType == ODM_RTL8192D) + { + // 8192D special case + dm_FA_thres[0] = DM_DIG_FA_TH0_92D; + dm_FA_thres[1] = DM_DIG_FA_TH1_92D; + dm_FA_thres[2] = DM_DIG_FA_TH2_92D; + } +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + else if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL)) + { + // For AP + if((RxTp>>2) > TxTp && RxTp < 10000 && RxTp > 500) // 10Mbps & 0.5Mbps + { + dm_FA_thres[0] = 0x080; + dm_FA_thres[1] = 0x100; + dm_FA_thres[2] = 0x200; + } + else + { + dm_FA_thres[0] = 0x100; + dm_FA_thres[1] = 0x200; + dm_FA_thres[2] = 0x300; + } + } +#else + else if(pDM_Odm->SupportICType == ODM_RTL8723A && pDM_Odm->bBtLimitedDig) + { + // 8723A BT special case + dm_FA_thres[0] = DM_DIG_FA_TH0; + dm_FA_thres[1] = 0x250; + dm_FA_thres[2] = 0x300; + } +#endif + else + { + // For NIC + dm_FA_thres[0] = DM_DIG_FA_TH0; + dm_FA_thres[1] = DM_DIG_FA_TH1; + dm_FA_thres[2] = DM_DIG_FA_TH2; + } + } + else + { +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + if(bDFSBand) + { + // For DFS band and no link + dm_FA_thres[0] = 250; + dm_FA_thres[1] = 1000; + dm_FA_thres[2] = 2000; + } + else +#endif + { + dm_FA_thres[0] = 2000; + dm_FA_thres[1] = 4000; + dm_FA_thres[2] = 5000; + } + } + return; +} + +u1Byte +odm_ForbiddenIGICheck( + IN PVOID pDM_VOID, + IN u1Byte DIG_Dynamic_MIN, + IN u1Byte CurrentIGI + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; + PFALSE_ALARM_STATISTICS pFalseAlmCnt = &(pDM_Odm->FalseAlmCnt); + u1Byte rx_gain_range_min = pDM_DigTable->rx_gain_range_min; + + if(pFalseAlmCnt->Cnt_all > 10000) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnormally false alarm case. \n")); + + if(pDM_DigTable->LargeFAHit != 3) + pDM_DigTable->LargeFAHit++; + + if(pDM_DigTable->ForbiddenIGI < CurrentIGI)//if(pDM_DigTable->ForbiddenIGI < pDM_DigTable->CurIGValue) + { + pDM_DigTable->ForbiddenIGI = CurrentIGI;//pDM_DigTable->ForbiddenIGI = pDM_DigTable->CurIGValue; + pDM_DigTable->LargeFAHit = 1; + } + + if(pDM_DigTable->LargeFAHit >= 3) + { + if((pDM_DigTable->ForbiddenIGI + 2) > pDM_DigTable->rx_gain_range_max) + rx_gain_range_min = pDM_DigTable->rx_gain_range_max; + else + rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 2); + pDM_DigTable->Recover_cnt = 1800; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnormally false alarm case: Recover_cnt = %d \n", pDM_DigTable->Recover_cnt)); + } + } + else + { + if(pDM_DigTable->Recover_cnt != 0) + { + pDM_DigTable->Recover_cnt --; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: Recover_cnt = %d \n", pDM_DigTable->Recover_cnt)); + } + else + { + if(pDM_DigTable->LargeFAHit < 3) + { + if((pDM_DigTable->ForbiddenIGI - 2) < DIG_Dynamic_MIN) //DM_DIG_MIN) + { + pDM_DigTable->ForbiddenIGI = DIG_Dynamic_MIN; //DM_DIG_MIN; + rx_gain_range_min = DIG_Dynamic_MIN; //DM_DIG_MIN; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: At Lower Bound\n")); + } + else + { + pDM_DigTable->ForbiddenIGI -= 2; + rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 2); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: Approach Lower Bound\n")); + } + } + else + { + pDM_DigTable->LargeFAHit = 0; + } + } + } + + return rx_gain_range_min; + +} + +VOID +odm_InbandNoiseCalculate ( + IN PVOID pDM_VOID + ) +{ +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; + u1Byte IGIBackup, TimeCnt = 0, ValidCnt = 0; + BOOLEAN bTimeout = TRUE; + s1Byte sNoise_A, sNoise_B; + s4Byte NoiseRpt_A = 0,NoiseRpt_B = 0; + u4Byte tmp = 0; + static u1Byte failCnt = 0; + + if(!(pDM_Odm->SupportICType & (ODM_RTL8192E))) + return; + + if(pDM_Odm->RFType == ODM_1T1R || *(pDM_Odm->pOnePathCCA) != ODM_CCA_2R) + return; + + if(!pDM_DigTable->bNoiseEst) + return; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_InbandNoiseEstimate()========>\n")); + + //1 Set initial gain. + IGIBackup = pDM_DigTable->CurIGValue; + pDM_DigTable->IGIOffset_A = 0; + pDM_DigTable->IGIOffset_B = 0; + ODM_Write_DIG(pDM_Odm, 0x24); + + //1 Update idle time power report + if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) + ODM_SetBBReg(pDM_Odm, ODM_REG_TX_ANT_CTRL_11N, BIT25, 0x0); + + delay_ms(2); + + //1 Get noise power level + while(1) + { + //2 Read Noise Floor Report + if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) + tmp = ODM_GetBBReg(pDM_Odm, 0x8f8, bMaskLWord); + + sNoise_A = (s1Byte)(tmp & 0xff); + sNoise_B = (s1Byte)((tmp & 0xff00)>>8); + + //ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("sNoise_A = %d, sNoise_B = %d\n",sNoise_A, sNoise_B)); + + if((sNoise_A < 20 && sNoise_A >= -70) && (sNoise_B < 20 && sNoise_B >= -70)) + { + ValidCnt++; + NoiseRpt_A += sNoise_A; + NoiseRpt_B += sNoise_B; + //ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("sNoise_A = %d, sNoise_B = %d\n",sNoise_A, sNoise_B)); + } + + TimeCnt++; + bTimeout = (TimeCnt >= 150)?TRUE:FALSE; + + if(ValidCnt == 20 || bTimeout) + break; + + delay_ms(2); + + } + + //1 Keep idle time power report + if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES) + ODM_SetBBReg(pDM_Odm, ODM_REG_TX_ANT_CTRL_11N, BIT25, 0x1); + + //1 Recover IGI + ODM_Write_DIG(pDM_Odm, IGIBackup); + + //1 Calculate Noise Floor + if(ValidCnt != 0) + { + NoiseRpt_A /= (ValidCnt<<1); + NoiseRpt_B /= (ValidCnt<<1); + } + + if(bTimeout) + { + NoiseRpt_A = 0; + NoiseRpt_B = 0; + + failCnt ++; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("Noise estimate fail time = %d\n", failCnt)); + + if(failCnt == 3) + { + failCnt = 0; + pDM_DigTable->bNoiseEst = FALSE; + } + } + else + { + NoiseRpt_A = -110 + 0x24 + NoiseRpt_A -6; + NoiseRpt_B = -110 + 0x24 + NoiseRpt_B -6; + pDM_DigTable->bNoiseEst = FALSE; + failCnt = 0; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("NoiseRpt_A = %d, NoiseRpt_B = %d\n", NoiseRpt_A, NoiseRpt_B)); + } + + //1 Calculate IGI Offset + if(NoiseRpt_A > NoiseRpt_B) + { + pDM_DigTable->IGIOffset_A = NoiseRpt_A - NoiseRpt_B; + pDM_DigTable->IGIOffset_B = 0; + } + else + { + pDM_DigTable->IGIOffset_A = 0; + pDM_DigTable->IGIOffset_B = NoiseRpt_B - NoiseRpt_A; + } + +#endif + return; +} + +//3============================================================ +//3 CCK Packet Detect Threshold +//3============================================================ + +VOID +odm_PauseCCKPacketDetection( + IN PVOID pDM_VOID, + IN ODM_Pause_CCKPD_TYPE PauseType, + IN u1Byte CCKPDThreshold +) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; + static BOOLEAN bPaused = FALSE; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_PauseCCKPacketDetection()=========>\n")); + +#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + if(*pDM_DigTable->pbP2pLinkInProgress) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("P2P in progress !!\n")); + return; + } +#endif + + if(!bPaused && (!(pDM_Odm->SupportAbility & ODM_BB_CCK_PD) || !(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("Return: SupportAbility ODM_BB_CCK_PD or ODM_BB_FA_CNT is disabled\n")); + return; + } + + switch(PauseType) + { + //1 Pause CCK Packet Detection Threshold + case ODM_PAUSE_CCKPD: + //2 Disable DIG + ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_ABILITY, pDM_Odm->SupportAbility & (~ODM_BB_CCK_PD)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("Pause CCK packet detection threshold !!\n")); + + //2 Backup CCK Packet Detection Threshold value + if(!bPaused) + { + pDM_DigTable->CCKPDBackup = pDM_DigTable->CurCCK_CCAThres; + bPaused = TRUE; + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("Backup CCK packet detection tgreshold = %d\n", pDM_DigTable->CCKPDBackup)); + + //2 Write new CCK Packet Detection Threshold value + ODM_Write_CCK_CCA_Thres(pDM_Odm, CCKPDThreshold); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("Write new CCK packet detection tgreshold = %d\n", CCKPDThreshold)); + break; + + //1 Resume CCK Packet Detection Threshold + case ODM_RESUME_CCKPD: + if(bPaused) + { + //2 Write backup CCK Packet Detection Threshold value + ODM_Write_CCK_CCA_Thres(pDM_Odm, pDM_DigTable->CCKPDBackup); + bPaused = FALSE; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("Write original CCK packet detection tgreshold = %d\n", pDM_DigTable->CCKPDBackup)); + + //2 Enable CCK Packet Detection Threshold + ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_ABILITY, pDM_Odm->SupportAbility | ODM_BB_CCK_PD); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("Resume CCK packet detection threshold !!\n")); + } + break; + + default: + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("Wrong type !!\n")); + break; + } + return; +} + + +VOID +odm_CCKPacketDetectionThresh( + IN PVOID pDM_VOID + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); + u1Byte CurCCK_CCAThres; + + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +//modify by Guo.Mingzhi 2011-12-29 + if (pDM_Odm->bDualMacSmartConcurrent == TRUE) +// if (pDM_Odm->bDualMacSmartConcurrent == FALSE) + return; + if(pDM_Odm->bBtHsOperation) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_CCKPacketDetectionThresh() write 0xcd for BT HS mode!!\n")); + ODM_Write_CCK_CCA_Thres(pDM_Odm, 0xcd); + return; + } +#endif + + if((!(pDM_Odm->SupportAbility & ODM_BB_CCK_PD)) ||(!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_CCKPacketDetectionThresh() return==========\n")); + return; + } + +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) + if(pDM_Odm->ExtLNA) + return; +#endif + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_CCKPacketDetectionThresh() ==========>\n")); + + if(pDM_Odm->bLinked) + { + if(pDM_Odm->RSSI_Min > 25) + CurCCK_CCAThres = 0xcd; + else if((pDM_Odm->RSSI_Min <= 25) && (pDM_Odm->RSSI_Min > 10)) + CurCCK_CCAThres = 0x83; + else + { + if(FalseAlmCnt->Cnt_Cck_fail > 1000) + CurCCK_CCAThres = 0x83; + else + CurCCK_CCAThres = 0x40; + } + } + else + { + if(FalseAlmCnt->Cnt_Cck_fail > 1000) + CurCCK_CCAThres = 0x83; + else + CurCCK_CCAThres = 0x40; + } + +#if (RTL8192D_SUPPORT==1) + if((pDM_Odm->SupportICType == ODM_RTL8192D) && (*pDM_Odm->pBandType == ODM_BAND_2_4G)) + ODM_Write_CCK_CCA_Thres_92D(pDM_Odm, CurCCK_CCAThres); + else +#endif + ODM_Write_CCK_CCA_Thres(pDM_Odm, CurCCK_CCAThres); + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CCK_PD, ODM_DBG_LOUD, ("odm_CCKPacketDetectionThresh() CurCCK_CCAThres = 0x%x\n",CurCCK_CCAThres)); +} + +VOID +ODM_Write_CCK_CCA_Thres( + IN PVOID pDM_VOID, + IN u1Byte CurCCK_CCAThres + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; + + if(pDM_DigTable->CurCCK_CCAThres!=CurCCK_CCAThres) //modify by Guo.Mingzhi 2012-01-03 + { + ODM_Write1Byte(pDM_Odm, ODM_REG(CCK_CCA,pDM_Odm), CurCCK_CCAThres); + } + pDM_DigTable->PreCCK_CCAThres = pDM_DigTable->CurCCK_CCAThres; + pDM_DigTable->CurCCK_CCAThres = CurCCK_CCAThres; +} + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + +VOID +odm_EnableEDCCA( + IN PVOID pDM_VOID +) +{ + + // This should be moved out of OUTSRC + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + PADAPTER pAdapter = pDM_Odm->Adapter; + // Enable EDCCA. The value is suggested by SD3 Wilson. + + // + // Revised for ASUS 11b/g performance issues, suggested by BB Neil, 2012.04.13. + // + if((pDM_Odm->SupportICType == ODM_RTL8723A)&&(IS_WIRELESS_MODE_G(pAdapter))) + { + //PlatformEFIOWrite1Byte(Adapter, rOFDM0_ECCAThreshold, 0x00); + ODM_Write1Byte(pDM_Odm,rOFDM0_ECCAThreshold,0x00); + ODM_Write1Byte(pDM_Odm,rOFDM0_ECCAThreshold+2,0xFD); + + } + else + { + //PlatformEFIOWrite1Byte(Adapter, rOFDM0_ECCAThreshold, 0x03); + ODM_Write1Byte(pDM_Odm,rOFDM0_ECCAThreshold,0x03); + ODM_Write1Byte(pDM_Odm,rOFDM0_ECCAThreshold+2,0x00); + } + + //PlatformEFIOWrite1Byte(Adapter, rOFDM0_ECCAThreshold+2, 0x00); +} + +VOID +odm_DisableEDCCA( + IN PVOID pDM_VOID +) +{ + // Disable EDCCA.. + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + ODM_Write1Byte(pDM_Odm, rOFDM0_ECCAThreshold, 0x7f); + ODM_Write1Byte(pDM_Odm, rOFDM0_ECCAThreshold+2, 0x7f); +} + +// +// Description: According to initial gain value to determine to enable or disable EDCCA. +// +// Suggested by SD3 Wilson. Added by tynli. 2011.11.25. +// +VOID +odm_DynamicEDCCA( + IN PVOID pDM_VOID +) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + PADAPTER pAdapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + u1Byte RegC50, RegC58; + BOOLEAN bEDCCAenable = FALSE; + +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) + BOOLEAN bFwCurrentInPSMode=FALSE; + + pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_FW_PSMODE_STATUS, (pu1Byte)(&bFwCurrentInPSMode)); + + // Disable EDCCA mode while under LPS mode, added by Roger, 2012.09.14. + if(bFwCurrentInPSMode) + return; +#endif + // + // 2013/11/14 Ken According to BB team Jame's suggestion, we need to disable soft AP mode EDCCA. + // 2014/01/08 MH For Miracst AP mode test. We need to disable EDCCA. Otherwise, we may stop + // to send beacon in noisy environment or platform. + // + if(ACTING_AS_AP(pAdapter) || ACTING_AS_AP(GetFirstAPAdapter(pAdapter))) + //if(ACTING_AS_AP(pAdapter)) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("At least One Port as AP disable EDCCA\n")); + odm_DisableEDCCA(pDM_Odm); + if(pHalData->bPreEdccaEnable) + odm_DisableEDCCA(pDM_Odm); + pHalData->bPreEdccaEnable = FALSE; + return; + } + + RegC50 = (u1Byte)ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0); + RegC58 = (u1Byte)ODM_GetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0); + + + if((RegC50 > 0x28 && RegC58 > 0x28) || + ((pDM_Odm->SupportICType == ODM_RTL8723A && IS_WIRELESS_MODE_G(pAdapter) && RegC50>0x26)) || + (pDM_Odm->SupportICType == ODM_RTL8188E && RegC50 > 0x28)) + { + if(!pHalData->bPreEdccaEnable) + { + odm_EnableEDCCA(pDM_Odm); + pHalData->bPreEdccaEnable = TRUE; + } + + } + else if((RegC50 < 0x25 && RegC58 < 0x25) || (pDM_Odm->SupportICType == ODM_RTL8188E && RegC50 < 0x25)) + { + if(pHalData->bPreEdccaEnable) + { + odm_DisableEDCCA(pDM_Odm); + pHalData->bPreEdccaEnable = FALSE; + } + } +} + +// <20130108, Kordan> E.g., With LNA used, we make the Rx power smaller to have a better EVM. (Asked by Willis) +VOID +odm_RFEControl( + IN PDM_ODM_T pDM_Odm, + IN u8Byte RSSIVal + ) +{ + PADAPTER Adapter = (PADAPTER)pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + static u1Byte TRSW_HighPwr = 0; + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("===> odm_RFEControl, RSSI = %d, TRSW_HighPwr = 0x%X, pHalData->RFEType = %d\n", + RSSIVal, TRSW_HighPwr, pHalData->RFEType )); + + if (pHalData->RFEType == 3) { + + pDM_Odm->RSSI_TRSW = RSSIVal; + + if (pDM_Odm->RSSI_TRSW >= pDM_Odm->RSSI_TRSW_H) + { + TRSW_HighPwr = 1; // Switch to + PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar, BIT1|BIT0, 0x1); // Set ANTSW=1/ANTSWB=0 for SW control + PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar, BIT9|BIT8, 0x3); // Set ANTSW=1/ANTSWB=0 for SW control + + } + else if (pDM_Odm->RSSI_TRSW <= pDM_Odm->RSSI_TRSW_L) + { + TRSW_HighPwr = 0; // Switched back + PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar, BIT1|BIT0, 0x1); // Set ANTSW=1/ANTSWB=0 for SW control + PHY_SetBBReg(Adapter, r_ANTSEL_SW_Jaguar, BIT9|BIT8, 0x0); // Set ANTSW=1/ANTSWB=0 for SW control + + } + } + + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("(pDM_Odm->RSSI_TRSW_H, pDM_Odm->RSSI_TRSW_L) = (%d, %d)\n", pDM_Odm->RSSI_TRSW_H, pDM_Odm->RSSI_TRSW_L)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("(RSSIVal, RSSIVal, pDM_Odm->RSSI_TRSW_iso) = (%d, %d, %d)\n", + RSSIVal, pDM_Odm->RSSI_TRSW_iso, pDM_Odm->RSSI_TRSW)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("<=== odm_RFEControl, RSSI = %d, TRSW_HighPwr = 0x%X\n", RSSIVal, TRSW_HighPwr)); +} + +VOID +odm_MPT_DIGWorkItemCallback( + IN PVOID pContext + ) +{ + PADAPTER Adapter = (PADAPTER)pContext; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + + ODM_MPT_DIG(pDM_Odm); +} + +VOID +odm_MPT_DIGCallback( + PRT_TIMER pTimer +) +{ + PADAPTER Adapter = (PADAPTER)pTimer->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + + + #if DEV_BUS_TYPE==RT_PCI_INTERFACE + #if USE_WORKITEM + PlatformScheduleWorkItem(&pDM_Odm->MPT_DIGWorkitem); + #else + ODM_MPT_DIG(pDM_Odm); + #endif + #else + PlatformScheduleWorkItem(&pDM_Odm->MPT_DIGWorkitem); + #endif + +} + +#endif + +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) +VOID +odm_MPT_DIGCallback( + IN PVOID pDM_VOID +) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; +#if USE_WORKITEM + PlatformScheduleWorkItem(&pDM_Odm->MPT_DIGWorkitem); +#else + ODM_MPT_DIG(pDM_Odm); +#endif +} +#endif + +#if (DM_ODM_SUPPORT_TYPE != ODM_CE) +VOID +odm_MPT_Write_DIG( + IN PVOID pDM_VOID, + IN u1Byte CurIGValue +) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; + + ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_A,pDM_Odm), CurIGValue); + + if(pDM_Odm->RFType > ODM_1T1R) + ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_B,pDM_Odm), CurIGValue); + + if((pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) && (pDM_Odm->RFType > ODM_2T2R)) + { + ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_C,pDM_Odm), CurIGValue); + ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_D,pDM_Odm), CurIGValue); + } + + pDM_DigTable->CurIGValue = CurIGValue; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("CurIGValue = 0x%x\n", CurIGValue)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("pDM_Odm->RFType = 0x%x\n", pDM_Odm->RFType)); +} + +VOID +ODM_MPT_DIG( + IN PVOID pDM_VOID + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; + PFALSE_ALARM_STATISTICS pFalseAlmCnt = &pDM_Odm->FalseAlmCnt; + u1Byte CurrentIGI = pDM_DigTable->CurIGValue; + u1Byte DIG_Upper = 0x40, DIG_Lower = 0x20; + u4Byte RXOK_cal; + u4Byte RxPWDBAve_final; + u1Byte IGI_A = 0x20, IGI_B = 0x20; + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + + #if ODM_FIX_2G_DIG + IGI_A = 0x22; + IGI_B = 0x24; + #endif + +#else + if (!(pDM_Odm->priv->pshare->rf_ft_var.mp_specific && pDM_Odm->priv->pshare->mp_dig_on)) + return; + + if (*pDM_Odm->pBandType == ODM_BAND_5G) + DIG_Lower = 0x22; +#endif + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("===> ODM_MPT_DIG, pBandType = %d\n", *pDM_Odm->pBandType)); + +#if (ODM_FIX_2G_DIG || (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))) + if (*pDM_Odm->pBandType == ODM_BAND_5G || (pDM_Odm->SupportICType & ODM_RTL8814A)) // for 5G or 8814 +#else + if (1) // for both 2G/5G +#endif + { + odm_FalseAlarmCounterStatistics(pDM_Odm); + + RXOK_cal = pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK + pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM; + RxPWDBAve_final = (RXOK_cal != 0)?pDM_Odm->RxPWDBAve/RXOK_cal:0; + + pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0; + pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0; + pDM_Odm->RxPWDBAve = 0; + pDM_Odm->MPDIG_2G = FALSE; + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + pDM_Odm->Times_2G = 0; +#endif + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("RX OK = %d\n", RXOK_cal)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("RSSI = %d\n", RxPWDBAve_final)); + + if (RXOK_cal >= 70 && RxPWDBAve_final <= 40) + { + if (CurrentIGI > 0x24) + odm_MPT_Write_DIG(pDM_Odm, 0x24); + } + else + { + if(pFalseAlmCnt->Cnt_all > 1000){ + CurrentIGI = CurrentIGI + 8; + } + else if(pFalseAlmCnt->Cnt_all > 200){ + CurrentIGI = CurrentIGI + 4; + } + else if (pFalseAlmCnt->Cnt_all > 50){ + CurrentIGI = CurrentIGI + 2; + } + else if (pFalseAlmCnt->Cnt_all < 2){ + CurrentIGI = CurrentIGI - 2; + } + + if (CurrentIGI < DIG_Lower ){ + CurrentIGI = DIG_Lower; + } + + if(CurrentIGI > DIG_Upper){ + CurrentIGI = DIG_Upper; + } + + odm_MPT_Write_DIG(pDM_Odm, CurrentIGI); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG = 0x%x, Cnt_all = %d, Cnt_Ofdm_fail = %d, Cnt_Cck_fail = %d\n", + CurrentIGI, pFalseAlmCnt->Cnt_all, pFalseAlmCnt->Cnt_Ofdm_fail, pFalseAlmCnt->Cnt_Cck_fail)); + } + } + else + { + if(pDM_Odm->MPDIG_2G == FALSE) + { + if((pDM_Odm->SupportPlatform & ODM_WIN) && !(pDM_Odm->SupportICType & ODM_RTL8814A)) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("===> Fix IGI\n")); + ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_A,pDM_Odm), IGI_A); + ODM_Write1Byte( pDM_Odm, ODM_REG(IGI_B,pDM_Odm), IGI_B); + pDM_DigTable->CurIGValue = IGI_B; + } + else + odm_MPT_Write_DIG(pDM_Odm, IGI_A); + } + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + pDM_Odm->Times_2G++; + + if (pDM_Odm->Times_2G == 3) +#endif + { + pDM_Odm->MPDIG_2G = TRUE; + } + } + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + if (pDM_Odm->SupportICType == ODM_RTL8812) + odm_RFEControl(pDM_Odm, RxPWDBAve_final); +#endif + + ODM_SetTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer, 700); +} +#endif diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_DIG.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_DIG.h new file mode 100755 index 000000000000..a112fdb8662f --- /dev/null +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_DIG.h @@ -0,0 +1,406 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +#ifndef __ODMDIG_H__ +#define __ODMDIG_H__ + +typedef struct _Dynamic_Initial_Gain_Threshold_ +{ + BOOLEAN bStopDIG; + BOOLEAN bPSDInProgress; + + u1Byte Dig_Enable_Flag; + u1Byte Dig_Ext_Port_Stage; + + int RssiLowThresh; + int RssiHighThresh; + + u4Byte FALowThresh; + u4Byte FAHighThresh; + + u1Byte CurSTAConnectState; + u1Byte PreSTAConnectState; + u1Byte CurMultiSTAConnectState; + + u1Byte PreIGValue; + u1Byte CurIGValue; + u1Byte BackupIGValue; //MP DIG + u1Byte BT30_CurIGI; + u1Byte IGIBackup; + + s1Byte BackoffVal; + s1Byte BackoffVal_range_max; + s1Byte BackoffVal_range_min; + u1Byte rx_gain_range_max; + u1Byte rx_gain_range_min; + u1Byte Rssi_val_min; + + u1Byte PreCCK_CCAThres; + u1Byte CurCCK_CCAThres; + u1Byte PreCCKPDState; + u1Byte CurCCKPDState; + u1Byte CCKPDBackup; + + u1Byte LargeFAHit; + u1Byte ForbiddenIGI; + u4Byte Recover_cnt; + + u1Byte DIG_Dynamic_MIN_0; + u1Byte DIG_Dynamic_MIN_1; + BOOLEAN bMediaConnect_0; + BOOLEAN bMediaConnect_1; + + u4Byte AntDiv_RSSI_max; + u4Byte RSSI_max; + + u1Byte *pbP2pLinkInProgress; + +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + BOOLEAN bTpTarget; + BOOLEAN bNoiseEst; + u4Byte TpTrainTH_min; + u1Byte IGIOffset_A; + u1Byte IGIOffset_B; +#endif +}DIG_T,*pDIG_T; + +typedef struct _FALSE_ALARM_STATISTICS{ + u4Byte Cnt_Parity_Fail; + u4Byte Cnt_Rate_Illegal; + u4Byte Cnt_Crc8_fail; + u4Byte Cnt_Mcs_fail; + u4Byte Cnt_Ofdm_fail; + u4Byte Cnt_Ofdm_fail_pre; //For RTL8881A + u4Byte Cnt_Cck_fail; + u4Byte Cnt_all; + u4Byte Cnt_Fast_Fsync; + u4Byte Cnt_SB_Search_fail; + u4Byte Cnt_OFDM_CCA; + u4Byte Cnt_CCK_CCA; + u4Byte Cnt_CCA_all; + u4Byte Cnt_BW_USC; //Gary + u4Byte Cnt_BW_LSC; //Gary +}FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS; + +typedef enum tag_Dynamic_Init_Gain_Operation_Type_Definition +{ + DIG_TYPE_THRESH_HIGH = 0, + DIG_TYPE_THRESH_LOW = 1, + DIG_TYPE_BACKOFF = 2, + DIG_TYPE_RX_GAIN_MIN = 3, + DIG_TYPE_RX_GAIN_MAX = 4, + DIG_TYPE_ENABLE = 5, + DIG_TYPE_DISABLE = 6, + DIG_OP_TYPE_MAX +}DM_DIG_OP_E; + +typedef enum tag_ODM_PauseDIG_Type { + ODM_PAUSE_DIG = BIT0, + ODM_RESUME_DIG = BIT1 +} ODM_Pause_DIG_TYPE; + +typedef enum tag_ODM_PauseCCKPD_Type { + ODM_PAUSE_CCKPD = BIT0, + ODM_RESUME_CCKPD = BIT1 +} ODM_Pause_CCKPD_TYPE; + +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) +typedef enum _tag_ODM_REGULATION_Type { + REGULATION_FCC = 0, + REGULATION_MKK = 1, + REGULATION_ETSI = 2, + REGULATION_WW = 3, + + MAX_REGULATION_NUM = 4 +} ODM_REGULATION_TYPE; +#endif + +/* +typedef enum tag_CCK_Packet_Detection_Threshold_Type_Definition +{ + CCK_PD_STAGE_LowRssi = 0, + CCK_PD_STAGE_HighRssi = 1, + CCK_PD_STAGE_MAX = 3, +}DM_CCK_PDTH_E; + +typedef enum tag_DIG_EXT_PORT_ALGO_Definition +{ + DIG_EXT_PORT_STAGE_0 = 0, + DIG_EXT_PORT_STAGE_1 = 1, + DIG_EXT_PORT_STAGE_2 = 2, + DIG_EXT_PORT_STAGE_3 = 3, + DIG_EXT_PORT_STAGE_MAX = 4, +}DM_DIG_EXT_PORT_ALG_E; + +typedef enum tag_DIG_Connect_Definition +{ + DIG_STA_DISCONNECT = 0, + DIG_STA_CONNECT = 1, + DIG_STA_BEFORE_CONNECT = 2, + DIG_MultiSTA_DISCONNECT = 3, + DIG_MultiSTA_CONNECT = 4, + DIG_CONNECT_MAX +}DM_DIG_CONNECT_E; + + +#define DM_MultiSTA_InitGainChangeNotify(Event) {DM_DigTable.CurMultiSTAConnectState = Event;} + +#define DM_MultiSTA_InitGainChangeNotify_CONNECT(_ADAPTER) \ + DM_MultiSTA_InitGainChangeNotify(DIG_MultiSTA_CONNECT) + +#define DM_MultiSTA_InitGainChangeNotify_DISCONNECT(_ADAPTER) \ + DM_MultiSTA_InitGainChangeNotify(DIG_MultiSTA_DISCONNECT) +*/ +#define DM_DIG_THRESH_HIGH 40 +#define DM_DIG_THRESH_LOW 35 + +#define DM_FALSEALARM_THRESH_LOW 400 +#define DM_FALSEALARM_THRESH_HIGH 1000 + +#define DM_DIG_MAX_NIC 0x3e +#define DM_DIG_MIN_NIC 0x1e //0x22//0x1c +#define DM_DIG_MAX_OF_MIN_NIC 0x3e + +#define DM_DIG_MAX_AP 0x3e +#define DM_DIG_MIN_AP 0x1c +#define DM_DIG_MAX_OF_MIN 0x2A //0x32 +#define DM_DIG_MIN_AP_DFS 0x20 + +#define DM_DIG_MAX_NIC_HP 0x46 +#define DM_DIG_MIN_NIC_HP 0x2e + +#define DM_DIG_MAX_AP_HP 0x42 +#define DM_DIG_MIN_AP_HP 0x30 + +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) +#define DM_DIG_MAX_AP_COVERAGR 0x26 +#define DM_DIG_MIN_AP_COVERAGE 0x1c +#define DM_DIG_MAX_OF_MIN_COVERAGE 0x22 + +#define DM_DIG_TP_Target_TH0 500 +#define DM_DIG_TP_Target_TH1 1000 +#define DM_DIG_TP_Training_Period 10 +#endif + +//vivi 92c&92d has different definition, 20110504 +//this is for 92c +#if (DM_ODM_SUPPORT_TYPE & ODM_CE) + #ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV + #define DM_DIG_FA_TH0 0x80//0x20 + #else + #define DM_DIG_FA_TH0 0x200//0x20 + #endif +#else + #define DM_DIG_FA_TH0 0x200//0x20 +#endif + +#define DM_DIG_FA_TH1 0x300 +#define DM_DIG_FA_TH2 0x400 +//this is for 92d +#define DM_DIG_FA_TH0_92D 0x100 +#define DM_DIG_FA_TH1_92D 0x400 +#define DM_DIG_FA_TH2_92D 0x600 + +#define DM_DIG_BACKOFF_MAX 12 +#define DM_DIG_BACKOFF_MIN -4 +#define DM_DIG_BACKOFF_DEFAULT 10 + +#define DM_DIG_FA_TH0_LPS 4 //-> 4 in lps +#define DM_DIG_FA_TH1_LPS 15 //-> 15 lps +#define DM_DIG_FA_TH2_LPS 30 //-> 30 lps +#define RSSI_OFFSET_DIG 0x05 + +VOID +ODM_ChangeDynamicInitGainThresh( + IN PVOID pDM_VOID, + IN u4Byte DM_Type, + IN u4Byte DM_Value + ); + +VOID +odm_NHMCounterStatisticsInit( + IN PVOID pDM_VOID + ); + +VOID +odm_NHMCounterStatistics( + IN PVOID pDM_VOID + ); + +VOID +odm_NHMBBInit( + IN PVOID pDM_VOID +); + +VOID +odm_NHMBB( + IN PVOID pDM_VOID +); + +VOID +odm_NHMCounterStatisticsReset( + IN PVOID pDM_VOID +); + +VOID +odm_GetNHMCounterStatistics( + IN PVOID pDM_VOID +); + +VOID +odm_SearchPwdBLowerBound( + IN PVOID pDM_VOID, + IN u1Byte IGI_target +); + +VOID +odm_AdaptivityInit( + IN PVOID pDM_VOID + ); + +VOID +odm_Adaptivity( + IN PVOID pDM_VOID, + IN u1Byte IGI + ); + +VOID +ODM_Write_DIG( + IN PVOID pDM_VOID, + IN u1Byte CurrentIGI + ); + +VOID +odm_PauseDIG( + IN PVOID pDM_VOID, + IN ODM_Pause_DIG_TYPE PauseType, + IN u1Byte IGIValue + ); + +VOID +odm_DIGInit( + IN PVOID pDM_VOID + ); + +VOID +odm_DIG( + IN PVOID pDM_VOID + ); + +VOID +odm_DIGbyRSSI_LPS( + IN PVOID pDM_VOID + ); + +VOID +odm_DigForBtHsMode( + IN PVOID pDM_VOID + ); + +VOID +odm_FalseAlarmCounterStatistics( + IN PVOID pDM_VOID + ); + +VOID +odm_FAThresholdCheck( + IN PVOID pDM_VOID, + IN BOOLEAN bDFSBand, + IN BOOLEAN bPerformance, + IN u4Byte RxTp, + IN u4Byte TxTp, + OUT u4Byte* dm_FA_thres + ); + +u1Byte +odm_ForbiddenIGICheck( + IN PVOID pDM_VOID, + IN u1Byte DIG_Dynamic_MIN, + IN u1Byte CurrentIGI + ); + +VOID +odm_InbandNoiseCalculate ( + IN PVOID pDM_VOID + ); + +BOOLEAN +odm_DigAbort( + IN PVOID pDM_VOID + ); + +VOID +odm_PauseCCKPacketDetection( + IN PVOID pDM_VOID, + IN ODM_Pause_CCKPD_TYPE PauseType, + IN u1Byte CCKPDThreshold + ); + +VOID +odm_CCKPacketDetectionThresh( + IN PVOID pDM_VOID + ); + +VOID +ODM_Write_CCK_CCA_Thres( + IN PVOID pDM_VOID, + IN u1Byte CurCCK_CCAThres + ); + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + +VOID +odm_DisableEDCCA( + IN PVOID pDM_VOID +); + +VOID +odm_DynamicEDCCA( + IN PVOID pDM_VOID +); + +VOID +odm_MPT_DIGCallback( + PRT_TIMER pTimer +); + +VOID +odm_MPT_DIGWorkItemCallback( + IN PVOID pContext + ); + +#endif + +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) +VOID +odm_MPT_DIGCallback( + IN PVOID pDM_VOID +); +#endif + +#if (DM_ODM_SUPPORT_TYPE != ODM_CE) +VOID +ODM_MPT_DIG( + IN PVOID pDM_VOID +); +#endif + + +#endif diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_DynamicBBPowerSaving.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_DynamicBBPowerSaving.c new file mode 100755 index 000000000000..9ceb2fdc5edf --- /dev/null +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_DynamicBBPowerSaving.c @@ -0,0 +1,218 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +//============================================================ +// include files +//============================================================ + +#include "odm_precomp.h" + +VOID +odm_DynamicBBPowerSavingInit( + IN PVOID pDM_VOID + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable; + + pDM_PSTable->PreCCAState = CCA_MAX; + pDM_PSTable->CurCCAState = CCA_MAX; + pDM_PSTable->PreRFState = RF_MAX; + pDM_PSTable->CurRFState = RF_MAX; + pDM_PSTable->Rssi_val_min = 0; + pDM_PSTable->initialize = 0; +} + + +VOID +odm_DynamicBBPowerSaving( + IN PVOID pDM_VOID + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) + + if (pDM_Odm->SupportICType != ODM_RTL8723A) + return; + if(!(pDM_Odm->SupportAbility & ODM_BB_PWR_SAVE)) + return; + if(!(pDM_Odm->SupportPlatform & (ODM_WIN|ODM_CE))) + return; + + //1 2.Power Saving for 92C + if((pDM_Odm->SupportICType == ODM_RTL8192C) &&(pDM_Odm->RFType == ODM_2T2R)) + { + odm_1R_CCA(pDM_Odm); + } + + // 20100628 Joseph: Turn off BB power save for 88CE because it makesthroughput unstable. + // 20100831 Joseph: Turn ON BB power save again after modifying AGC delay from 900ns ot 600ns. + //1 3.Power Saving for 88C + else + { + ODM_RF_Saving(pDM_Odm, FALSE); + } +#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + +} + +VOID +odm_1R_CCA( + IN PVOID pDM_VOID + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable; + + if(pDM_Odm->RSSI_Min!= 0xFF) + { + + if(pDM_PSTable->PreCCAState == CCA_2R) + { + if(pDM_Odm->RSSI_Min >= 35) + pDM_PSTable->CurCCAState = CCA_1R; + else + pDM_PSTable->CurCCAState = CCA_2R; + + } + else{ + if(pDM_Odm->RSSI_Min <= 30) + pDM_PSTable->CurCCAState = CCA_2R; + else + pDM_PSTable->CurCCAState = CCA_1R; + } + } + else{ + pDM_PSTable->CurCCAState=CCA_MAX; + } + + if(pDM_PSTable->PreCCAState != pDM_PSTable->CurCCAState) + { + if(pDM_PSTable->CurCCAState == CCA_1R) + { + if( pDM_Odm->RFType ==ODM_2T2R ) + { + ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x13); + //PHY_SetBBReg(pAdapter, 0xe70, bMaskByte3, 0x20); + } + else + { + ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x23); + //PHY_SetBBReg(pAdapter, 0xe70, 0x7fc00000, 0x10c); // Set RegE70[30:22] = 9b'100001100 + } + } + else + { + ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x33); + //PHY_SetBBReg(pAdapter,0xe70, bMaskByte3, 0x63); + } + pDM_PSTable->PreCCAState = pDM_PSTable->CurCCAState; + } +} + +void +ODM_RF_Saving( + IN PVOID pDM_VOID, + IN u1Byte bForceInNormal + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; +#if (DM_ODM_SUPPORT_TYPE != ODM_AP) + pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable; + u1Byte Rssi_Up_bound = 30 ; + u1Byte Rssi_Low_bound = 25; +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + if(pDM_Odm->PatchID == 40 ) //RT_CID_819x_FUNAI_TV + { + Rssi_Up_bound = 50 ; + Rssi_Low_bound = 45; + } +#endif + if(pDM_PSTable->initialize == 0){ + + pDM_PSTable->Reg874 = (ODM_GetBBReg(pDM_Odm, 0x874, bMaskDWord)&0x1CC000)>>14; + pDM_PSTable->RegC70 = (ODM_GetBBReg(pDM_Odm, 0xc70, bMaskDWord)&BIT3)>>3; + pDM_PSTable->Reg85C = (ODM_GetBBReg(pDM_Odm, 0x85c, bMaskDWord)&0xFF000000)>>24; + pDM_PSTable->RegA74 = (ODM_GetBBReg(pDM_Odm, 0xa74, bMaskDWord)&0xF000)>>12; + //Reg818 = PHY_QueryBBReg(pAdapter, 0x818, bMaskDWord); + pDM_PSTable->initialize = 1; + } + + if(!bForceInNormal) + { + if(pDM_Odm->RSSI_Min != 0xFF) + { + if(pDM_PSTable->PreRFState == RF_Normal) + { + if(pDM_Odm->RSSI_Min >= Rssi_Up_bound) + pDM_PSTable->CurRFState = RF_Save; + else + pDM_PSTable->CurRFState = RF_Normal; + } + else{ + if(pDM_Odm->RSSI_Min <= Rssi_Low_bound) + pDM_PSTable->CurRFState = RF_Normal; + else + pDM_PSTable->CurRFState = RF_Save; + } + } + else + pDM_PSTable->CurRFState=RF_MAX; + } + else + { + pDM_PSTable->CurRFState = RF_Normal; + } + + if(pDM_PSTable->PreRFState != pDM_PSTable->CurRFState) + { + if(pDM_PSTable->CurRFState == RF_Save) + { + // 8723 RSSI report will be wrong. Set 0x874[5]=1 when enter BB power saving mode. + // Suggested by SD3 Yu-Nan. 2011.01.20. + if(pDM_Odm->SupportICType == ODM_RTL8723A) + { + ODM_SetBBReg(pDM_Odm, 0x874 , BIT5, 0x1); //Reg874[5]=1b'1 + } + ODM_SetBBReg(pDM_Odm, 0x874 , 0x1C0000, 0x2); //Reg874[20:18]=3'b010 + ODM_SetBBReg(pDM_Odm, 0xc70, BIT3, 0); //RegC70[3]=1'b0 + ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, 0x63); //Reg85C[31:24]=0x63 + ODM_SetBBReg(pDM_Odm, 0x874, 0xC000, 0x2); //Reg874[15:14]=2'b10 + ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, 0x3); //RegA75[7:4]=0x3 + ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); //Reg818[28]=1'b0 + ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x1); //Reg818[28]=1'b1 + } + else + { + ODM_SetBBReg(pDM_Odm, 0x874 , 0x1CC000, pDM_PSTable->Reg874); + ODM_SetBBReg(pDM_Odm, 0xc70, BIT3, pDM_PSTable->RegC70); + ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, pDM_PSTable->Reg85C); + ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, pDM_PSTable->RegA74); + ODM_SetBBReg(pDM_Odm,0x818, BIT28, 0x0); + + if(pDM_Odm->SupportICType == ODM_RTL8723A) + { + ODM_SetBBReg(pDM_Odm,0x874 , BIT5, 0x0); //Reg874[5]=1b'0 + } + } + pDM_PSTable->PreRFState =pDM_PSTable->CurRFState; + } +#endif +} \ No newline at end of file diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_DynamicBBPowerSaving.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_DynamicBBPowerSaving.h new file mode 100755 index 000000000000..2fdcd6e6d5bf --- /dev/null +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_DynamicBBPowerSaving.h @@ -0,0 +1,61 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +#ifndef __ODMDYNAMICBBPOWERSAVING_H__ +#define __ODMDYNAMICBBPOWERSAVING_H__ + +typedef struct _Dynamic_Power_Saving_ +{ + u1Byte PreCCAState; + u1Byte CurCCAState; + + u1Byte PreRFState; + u1Byte CurRFState; + + int Rssi_val_min; + + u1Byte initialize; + u4Byte Reg874,RegC70,Reg85C,RegA74; + +}PS_T,*pPS_T; + +#define dm_RF_Saving ODM_RF_Saving + +void ODM_RF_Saving( + IN PVOID pDM_VOID, + IN u1Byte bForceInNormal + ); + +VOID +odm_DynamicBBPowerSavingInit( + IN PVOID pDM_VOID + ); + +VOID +odm_DynamicBBPowerSaving( + IN PVOID pDM_VOID + ); + +VOID +odm_1R_CCA( + IN PVOID pDM_VOID + ); + +#endif \ No newline at end of file diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_DynamicTxPower.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_DynamicTxPower.c new file mode 100755 index 000000000000..7fbeb9fac350 --- /dev/null +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_DynamicTxPower.c @@ -0,0 +1,884 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +//============================================================ +// include files +//============================================================ + +#include "odm_precomp.h" + +VOID +odm_DynamicTxPowerInit( + IN PVOID pDM_VOID + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PADAPTER Adapter = pDM_Odm->Adapter; + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + #if DEV_BUS_TYPE==RT_USB_INTERFACE + if(RT_GetInterfaceSelection(Adapter) == INTF_SEL1_USB_High_Power) + { + odm_DynamicTxPowerSavePowerIndex(pDM_Odm); + pMgntInfo->bDynamicTxPowerEnable = TRUE; + } + else + #else + //so 92c pci do not need dynamic tx power? vivi check it later + if(IS_HARDWARE_TYPE_8192D(Adapter)) + pMgntInfo->bDynamicTxPowerEnable = TRUE; + else + pMgntInfo->bDynamicTxPowerEnable = FALSE; + #endif + + + pHalData->LastDTPLvl = TxHighPwrLevel_Normal; + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + pdmpriv->bDynamicTxPowerEnable = _FALSE; + + #if (RTL8192C_SUPPORT==1) + #ifdef CONFIG_USB_HCI + + #ifdef CONFIG_INTEL_PROXIM + if((pHalData->BoardType == BOARD_USB_High_PA)||(Adapter->proximity.proxim_support==_TRUE)) + #else + if(pHalData->BoardType == BOARD_USB_High_PA) + #endif + + { + //odm_SavePowerIndex(Adapter); + odm_DynamicTxPowerSavePowerIndex(pDM_Odm); + pdmpriv->bDynamicTxPowerEnable = _TRUE; + } + else + #else + pdmpriv->bDynamicTxPowerEnable = _FALSE; + #endif + #endif + + pdmpriv->LastDTPLvl = TxHighPwrLevel_Normal; + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + +#endif + +} + +VOID +odm_DynamicTxPowerSavePowerIndex( + IN PVOID pDM_VOID + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; +#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) + u1Byte index; + u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + for(index = 0; index< 6; index++) + pHalData->PowerIndex_backup[index] = PlatformEFIORead1Byte(Adapter, Power_Index_REG[index]); +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + for(index = 0; index< 6; index++) + pdmpriv->PowerIndex_backup[index] = rtw_read8(Adapter, Power_Index_REG[index]); +#endif +#endif +} + +VOID +odm_DynamicTxPowerRestorePowerIndex( + IN PVOID pDM_VOID + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; +#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN)) + u1Byte index; + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + for(index = 0; index< 6; index++) + PlatformEFIOWrite1Byte(Adapter, Power_Index_REG[index], pHalData->PowerIndex_backup[index]); +#elif(DM_ODM_SUPPORT_TYPE == ODM_CE) + struct dm_priv *pdmpriv = &pHalData->dmpriv; + for(index = 0; index< 6; index++) + rtw_write8(Adapter, Power_Index_REG[index], pdmpriv->PowerIndex_backup[index]); +#endif +#endif +} + +VOID +odm_DynamicTxPowerWritePowerIndex( + IN PVOID pDM_VOID, + IN u1Byte Value) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + u1Byte index; + u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; + + for(index = 0; index< 6; index++) + //PlatformEFIOWrite1Byte(Adapter, Power_Index_REG[index], Value); + ODM_Write1Byte(pDM_Odm, Power_Index_REG[index], Value); + +} + + +VOID +odm_DynamicTxPower( + IN PVOID pDM_VOID + ) +{ + // + // For AP/ADSL use prtl8192cd_priv + // For CE/NIC use PADAPTER + // + //PADAPTER pAdapter = pDM_Odm->Adapter; +// prtl8192cd_priv priv = pDM_Odm->priv; + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR)) + return; + // + // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate + // at the same time. In the stage2/3, we need to prive universal interface and merge all + // HW dynamic mechanism. + // + switch (pDM_Odm->SupportPlatform) + { + case ODM_WIN: + case ODM_CE: + odm_DynamicTxPowerNIC(pDM_Odm); + break; + case ODM_AP: + odm_DynamicTxPowerAP(pDM_Odm); + break; + + case ODM_ADSL: + //odm_DIGAP(pDM_Odm); + break; + } + + +} + + +VOID +odm_DynamicTxPowerNIC( + IN PVOID pDM_VOID + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + + if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR)) + return; + +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) + + if(pDM_Odm->SupportICType == ODM_RTL8192C) + { + odm_DynamicTxPower_92C(pDM_Odm); + } + else if(pDM_Odm->SupportICType == ODM_RTL8192D) + { + odm_DynamicTxPower_92D(pDM_Odm); + } + else if (pDM_Odm->SupportICType == ODM_RTL8821) + { +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) + PADAPTER Adapter = pDM_Odm->Adapter; + PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(Adapter); + + if (pMgntInfo->RegRspPwr == 1) + { + if(pDM_Odm->RSSI_Min > 60) + { + ODM_SetMACReg(pDM_Odm, ODM_REG_RESP_TX_11AC, BIT20|BIT19|BIT18, 1); // Resp TXAGC offset = -3dB + + } + else if(pDM_Odm->RSSI_Min < 55) + { + ODM_SetMACReg(pDM_Odm, ODM_REG_RESP_TX_11AC, BIT20|BIT19|BIT18, 0); // Resp TXAGC offset = 0dB + } + } +#endif + } +#endif +} + +VOID +odm_DynamicTxPowerAP( + IN PVOID pDM_VOID + + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; +#if (DM_ODM_SUPPORT_TYPE == ODM_AP) + +//#if ((RTL8192C_SUPPORT==1) || (RTL8192D_SUPPORT==1) || (RTL8188E_SUPPORT==1) || (RTL8812E_SUPPORT==1)) + + + prtl8192cd_priv priv = pDM_Odm->priv; + s4Byte i; + s2Byte pwr_thd = TX_POWER_NEAR_FIELD_THRESH_AP; + + if(!priv->pshare->rf_ft_var.tx_pwr_ctrl) + return; + +#if ((RTL8812E_SUPPORT==1) || (RTL8881A_SUPPORT==1)) + if (pDM_Odm->SupportICType & (ODM_RTL8812 | ODM_RTL8881A)) + pwr_thd = TX_POWER_NEAR_FIELD_THRESH_8812; +#endif + +#if defined(CONFIG_RTL_92D_SUPPORT) || defined(CONFIG_RTL_92C_SUPPORT) + if(CHIP_VER_92X_SERIES(priv)) + { +#ifdef HIGH_POWER_EXT_PA + if(pDM_Odm->ExtPA) + tx_power_control(priv); +#endif + } +#endif + /* + * Check if station is near by to use lower tx power + */ + + if ((priv->up_time % 3) == 0 ) { + int disable_pwr_ctrl = ((pDM_Odm->FalseAlmCnt.Cnt_all > 1000 ) || ((pDM_Odm->FalseAlmCnt.Cnt_all > 300 ) && ((RTL_R8(0xc50) & 0x7f) >= 0x32))) ? 1 : 0; + + for(i=0; ipODM_StaInfo[i]; + if(IS_STA_VALID(pstat) ) { + if(disable_pwr_ctrl) + pstat->hp_level = 0; + else if ((pstat->hp_level == 0) && (pstat->rssi > pwr_thd)) + pstat->hp_level = 1; + else if ((pstat->hp_level == 1) && (pstat->rssi < (pwr_thd-8))) + pstat->hp_level = 0; + } + } + +#if defined(CONFIG_WLAN_HAL_8192EE) + if (GET_CHIP_VER(priv) == VERSION_8192E) { + if( !disable_pwr_ctrl && (pDM_Odm->RSSI_Min != 0xff) ) { + if(pDM_Odm->RSSI_Min > pwr_thd) + RRSR_power_control_11n(priv, 1 ); + else if(pDM_Odm->RSSI_Min < (pwr_thd-8)) + RRSR_power_control_11n(priv, 0 ); + } else { + RRSR_power_control_11n(priv, 0 ); + } + } +#endif + } +//#endif + +#endif +} + + +VOID +odm_DynamicTxPower_92C( + IN PVOID pDM_VOID + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PADAPTER Adapter = pDM_Odm->Adapter; + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + s4Byte UndecoratedSmoothedPWDB; + + // 2012/01/12 MH According to Luke's suggestion, only high power will support the feature. + if (pDM_Odm->ExtPA == FALSE) + return; + + // STA not connected and AP not connected + if((!pMgntInfo->bMediaConnect) && + (pHalData->EntryMinUndecoratedSmoothedPWDB == 0)) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("Not connected to any \n")); + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + + //the LastDTPlvl should reset when disconnect, + //otherwise the tx power level wouldn't change when disconnect and connect again. + // Maddest 20091220. + pHalData->LastDTPLvl=TxHighPwrLevel_Normal; + return; + } + +#if (INTEL_PROXIMITY_SUPPORT == 1) + // Intel set fixed tx power + if(pMgntInfo->IntelProximityModeInfo.PowerOutput > 0) + { + switch(pMgntInfo->IntelProximityModeInfo.PowerOutput){ + case 1: + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_100; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_100\n")); + break; + case 2: + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_70; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_70\n")); + break; + case 3: + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_50; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_50\n")); + break; + case 4: + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_35; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_35\n")); + break; + case 5: + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_15; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_15\n")); + break; + default: + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_100; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_100\n")); + break; + } + } + else +#endif + { + if( (pMgntInfo->bDynamicTxPowerEnable != TRUE) || + (pHalData->DMFlag & HAL_DM_HIPWR_DISABLE) || + pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER) + { + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + } + else + { + if(pMgntInfo->bMediaConnect) // Default port + { + if(ACTING_AS_AP(Adapter) || ACTING_AS_IBSS(Adapter)) + { + UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + } + else + { + UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + } + } + else // associated entry pwdb + { + UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + } + + if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) + { + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); + } + else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && + (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) + { + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); + } + else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) + { + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); + } + } + } + if( pHalData->DynamicTxHighPowerLvl != pHalData->LastDTPLvl ) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192C() Channel = %d \n" , pHalData->CurrentChannel)); + PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); + if( (pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal) && + (pHalData->LastDTPLvl == TxHighPwrLevel_Level1 || pHalData->LastDTPLvl == TxHighPwrLevel_Level2)) //TxHighPwrLevel_Normal + odm_DynamicTxPowerRestorePowerIndex(pDM_Odm); + else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) + odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x14); + else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) + odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x10); + } + pHalData->LastDTPLvl = pHalData->DynamicTxHighPowerLvl; + + +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) + + #if (RTL8192C_SUPPORT==1) + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; + int UndecoratedSmoothedPWDB; + + if(!pdmpriv->bDynamicTxPowerEnable) + return; + +#ifdef CONFIG_INTEL_PROXIM + if(Adapter->proximity.proxim_on== _TRUE){ + struct proximity_priv *prox_priv=Adapter->proximity.proximity_priv; + // Intel set fixed tx power + printk("\n %s Adapter->proximity.proxim_on=%d prox_priv->proxim_modeinfo->power_output=%d \n",__FUNCTION__,Adapter->proximity.proxim_on,prox_priv->proxim_modeinfo->power_output); + if(prox_priv!=NULL){ + if(prox_priv->proxim_modeinfo->power_output> 0) + { + switch(prox_priv->proxim_modeinfo->power_output) + { + case 1: + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_100; + printk("TxHighPwrLevel_100\n"); + break; + case 2: + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_70; + printk("TxHighPwrLevel_70\n"); + break; + case 3: + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_50; + printk("TxHighPwrLevel_50\n"); + break; + case 4: + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_35; + printk("TxHighPwrLevel_35\n"); + break; + case 5: + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_15; + printk("TxHighPwrLevel_15\n"); + break; + default: + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_100; + printk("TxHighPwrLevel_100\n"); + break; + } + } + } + } + else +#endif + { + // STA not connected and AP not connected + if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) && + (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) + { + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("Not connected to any \n")); + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + + //the LastDTPlvl should reset when disconnect, + //otherwise the tx power level wouldn't change when disconnect and connect again. + // Maddest 20091220. + pdmpriv->LastDTPLvl=TxHighPwrLevel_Normal; + return; + } + + if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) // Default port + { + #if 0 + //todo: AP Mode + if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || + (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) + { + UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + } + else + { + UndecoratedSmoothedPWDB = pdmpriv->UndecoratedSmoothedPWDB; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + } + #else + UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; + #endif + } + else // associated entry pwdb + { + UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + } + + if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) + { + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); + } + else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && + (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) + { + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); + } + else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) + { + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); + } + } + if( (pdmpriv->DynamicTxHighPowerLvl != pdmpriv->LastDTPLvl) ) + { + PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); + if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal) // HP1 -> Normal or HP2 -> Normal + odm_DynamicTxPowerRestorePowerIndex(pDM_Odm); + else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) + odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x14); + else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) + odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x10); + } + pdmpriv->LastDTPLvl = pdmpriv->DynamicTxHighPowerLvl; + #endif +#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + +} + + +VOID +odm_DynamicTxPower_92D( + IN PVOID pDM_VOID + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PADAPTER Adapter = pDM_Odm->Adapter; + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + s4Byte UndecoratedSmoothedPWDB; + + PADAPTER BuddyAdapter = Adapter->BuddyAdapter; + BOOLEAN bGetValueFromBuddyAdapter = dm_DualMacGetParameterFromBuddyAdapter(Adapter); + u1Byte HighPowerLvlBackForMac0 = TxHighPwrLevel_Level1; + + // 2012/01/12 MH According to Luke's suggestion, only high power will support the feature. + if (pDM_Odm->ExtPA == FALSE) + return; + + // If dynamic high power is disabled. + if( (pMgntInfo->bDynamicTxPowerEnable != TRUE) || + (pHalData->DMFlag & HAL_DM_HIPWR_DISABLE) || + pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER) + { + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + return; + } + + // STA not connected and AP not connected + if((!pMgntInfo->bMediaConnect) && + (pHalData->EntryMinUndecoratedSmoothedPWDB == 0)) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("Not connected to any \n")); + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + + //the LastDTPlvl should reset when disconnect, + //otherwise the tx power level wouldn't change when disconnect and connect again. + // Maddest 20091220. + pHalData->LastDTPLvl=TxHighPwrLevel_Normal; + return; + } + + if(pMgntInfo->bMediaConnect) // Default port + { + if(ACTING_AS_AP(Adapter) || pMgntInfo->mIbss) + { + UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + } + else + { + UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + } + } + else // associated entry pwdb + { + UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + } + + if(IS_HARDWARE_TYPE_8192D(Adapter) && GET_HAL_DATA(Adapter)->CurrentBandType == 1){ + if(UndecoratedSmoothedPWDB >= 0x33) + { + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n")); + } + else if((UndecoratedSmoothedPWDB <0x33) && + (UndecoratedSmoothedPWDB >= 0x2b) ) + { + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); + } + else if(UndecoratedSmoothedPWDB < 0x2b) + { + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Normal\n")); + } + + } + else + + { + if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) + { + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); + } + else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && + (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) + { + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); + } + else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) + { + pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); + } + + } + +//sherry delete flag 20110517 + if(bGetValueFromBuddyAdapter) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 1 \n")); + if(Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() change value \n")); + HighPowerLvlBackForMac0 = pHalData->DynamicTxHighPowerLvl; + pHalData->DynamicTxHighPowerLvl = Adapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP; + PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); + pHalData->DynamicTxHighPowerLvl = HighPowerLvlBackForMac0; + Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = FALSE; + } + } + + if( (pHalData->DynamicTxHighPowerLvl != pHalData->LastDTPLvl) ) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192S() Channel = %d \n" , pHalData->CurrentChannel)); + if(Adapter->DualMacSmartConcurrent == TRUE) + { + if(BuddyAdapter == NULL) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter == NULL case \n")); + if(!Adapter->bSlaveOfDMSP) + { + PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); + } + } + else + { + if(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMSP \n")); + if(Adapter->bSlaveOfDMSP) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() bslave case \n")); + BuddyAdapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = TRUE; + BuddyAdapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP = pHalData->DynamicTxHighPowerLvl; + } + else + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() master case \n")); + if(!bGetValueFromBuddyAdapter) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 0 \n")); + PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); + } + } + } + else + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMDP\n")); + PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); + } + } + } + else + { + PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); + } + + } + pHalData->LastDTPLvl = pHalData->DynamicTxHighPowerLvl; +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) +#if (RTL8192D_SUPPORT==1) + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + + struct dm_priv *pdmpriv = &pHalData->dmpriv; + DM_ODM_T *podmpriv = &pHalData->odmpriv; + int UndecoratedSmoothedPWDB; + #if (RTL8192D_EASY_SMART_CONCURRENT == 1) + PADAPTER BuddyAdapter = Adapter->BuddyAdapter; + BOOLEAN bGetValueFromBuddyAdapter = DualMacGetParameterFromBuddyAdapter(Adapter); + u8 HighPowerLvlBackForMac0 = TxHighPwrLevel_Level1; + #endif + + // If dynamic high power is disabled. + if( (pdmpriv->bDynamicTxPowerEnable != _TRUE) || + (!(podmpriv->SupportAbility& ODM_BB_DYNAMIC_TXPWR)) ) + { + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + return; + } + + // STA not connected and AP not connected + if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) && + (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) + { + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("Not connected to any \n")); + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + //the LastDTPlvl should reset when disconnect, + //otherwise the tx power level wouldn't change when disconnect and connect again. + // Maddest 20091220. + pdmpriv->LastDTPLvl=TxHighPwrLevel_Normal; + return; + } + + if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) // Default port + { + #if 0 + //todo: AP Mode + if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || + (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) + { + UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + } + else + { + UndecoratedSmoothedPWDB = pdmpriv->UndecoratedSmoothedPWDB; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + } + #else + UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; + #endif + } + else // associated entry pwdb + { + UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); + } +#if TX_POWER_FOR_5G_BAND == 1 + if(pHalData->CurrentBandType92D == BAND_ON_5G){ + if(UndecoratedSmoothedPWDB >= 0x33) + { + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n")); + } + else if((UndecoratedSmoothedPWDB <0x33) && + (UndecoratedSmoothedPWDB >= 0x2b) ) + { + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); + } + else if(UndecoratedSmoothedPWDB < 0x2b) + { + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Normal\n")); + } + } + else +#endif + { + if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) + { + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); + } + else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && + (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) + { + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); + } + else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) + { + pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); + } + } +#if (RTL8192D_EASY_SMART_CONCURRENT == 1) + if(bGetValueFromBuddyAdapter) + { + //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 1 \n")); + if(Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP) + { + //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() change value \n")); + HighPowerLvlBackForMac0 = pHalData->DynamicTxHighPowerLvl; + pHalData->DynamicTxHighPowerLvl = Adapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP; + PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel); + pHalData->DynamicTxHighPowerLvl = HighPowerLvlBackForMac0; + Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = _FALSE; + } + } +#endif + + if( (pdmpriv->DynamicTxHighPowerLvl != pdmpriv->LastDTPLvl) ) + { + //ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192S() Channel = %d \n" , pHalData->CurrentChannel)); +#if (RTL8192D_EASY_SMART_CONCURRENT == 1) + if(BuddyAdapter == NULL) + { + //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter == NULL case \n")); + if(!Adapter->bSlaveOfDMSP) + { + PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel); + } + } + else + { + if(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY) + { + //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMSP \n")); + if(Adapter->bSlaveOfDMSP) + { + //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() bslave case \n")); + BuddyAdapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = _TRUE; + BuddyAdapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP = pHalData->DynamicTxHighPowerLvl; + } + else + { + //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() master case \n")); + if(!bGetValueFromBuddyAdapter) + { + //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 0 \n")); + PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel); + } + } + } + else + { + //ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMDP\n")); + PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel); + } + } +#else + PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel); +#endif + } + pdmpriv->LastDTPLvl = pdmpriv->DynamicTxHighPowerLvl; +#endif +#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + +} + diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_DynamicTxPower.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_DynamicTxPower.h new file mode 100755 index 000000000000..67221e51c3bd --- /dev/null +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_DynamicTxPower.h @@ -0,0 +1,87 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +#ifndef __ODMDYNAMICTXPOWER_H__ +#define __ODMDYNAMICTXPOWER_H__ + +#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 +#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67 +#define TX_POWER_NEAR_FIELD_THRESH_AP 0x3F +#define TX_POWER_NEAR_FIELD_THRESH_8812 60 + +#define TxHighPwrLevel_Normal 0 +#define TxHighPwrLevel_Level1 1 +#define TxHighPwrLevel_Level2 2 +#define TxHighPwrLevel_BT1 3 +#define TxHighPwrLevel_BT2 4 +#define TxHighPwrLevel_15 5 +#define TxHighPwrLevel_35 6 +#define TxHighPwrLevel_50 7 +#define TxHighPwrLevel_70 8 +#define TxHighPwrLevel_100 9 + +VOID +odm_DynamicTxPowerInit( + IN PVOID pDM_VOID + ); + +VOID +odm_DynamicTxPowerRestorePowerIndex( + IN PVOID pDM_VOID + ); + +VOID +odm_DynamicTxPowerNIC( + IN PVOID pDM_VOID + ); + +#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) +VOID +odm_DynamicTxPowerSavePowerIndex( + IN PVOID pDM_VOID + ); + +VOID +odm_DynamicTxPowerWritePowerIndex( + IN PVOID pDM_VOID, + IN u1Byte Value); + +VOID +odm_DynamicTxPower_92C( + IN PVOID pDM_VOID + ); + +VOID +odm_DynamicTxPower_92D( + IN PVOID pDM_VOID + ); +#endif + +VOID +odm_DynamicTxPower( + IN PVOID pDM_VOID + ); + +VOID +odm_DynamicTxPowerAP( + IN PVOID pDM_VOID + ); + +#endif diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_EdcaTurboCheck.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_EdcaTurboCheck.c new file mode 100755 index 000000000000..34bfd08ff809 --- /dev/null +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_EdcaTurboCheck.c @@ -0,0 +1,1915 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +//============================================================ +// include files +//============================================================ +//#include "Mp_Precomp.h" +#include "odm_precomp.h" + +VOID +ODM_EdcaTurboInit( + IN PVOID pDM_VOID) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; +#if ((DM_ODM_SUPPORT_TYPE == ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL)) + odm_EdcaParaInit(pDM_Odm); +#elif (DM_ODM_SUPPORT_TYPE==ODM_WIN) + PADAPTER Adapter = NULL; + HAL_DATA_TYPE *pHalData = NULL; + + if(pDM_Odm->Adapter==NULL) { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EdcaTurboInit fail!!!\n")); + return; + } + + Adapter=pDM_Odm->Adapter; + pHalData=GET_HAL_DATA(Adapter); + + pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE; + pDM_Odm->DM_EDCA_Table.bIsCurRDLState = FALSE; + pHalData->bIsAnyNonBEPkts = FALSE; + +#elif(DM_ODM_SUPPORT_TYPE==ODM_CE) + PADAPTER Adapter = pDM_Odm->Adapter; + pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE; + pDM_Odm->DM_EDCA_Table.bIsCurRDLState = FALSE; + Adapter->recvpriv.bIsAnyNonBEPkts =FALSE; + +#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial VO PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_VO_PARAM))); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial VI PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_VI_PARAM))); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BE PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BE_PARAM))); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BK PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BK_PARAM))); + + +} // ODM_InitEdcaTurbo + +VOID +odm_EdcaTurboCheck( + IN PVOID pDM_VOID + ) +{ + // + // For AP/ADSL use prtl8192cd_priv + // For CE/NIC use PADAPTER + // + + // + // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate + // at the same time. In the stage2/3, we need to prive universal interface and merge all + // HW dynamic mechanism. + // + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("odm_EdcaTurboCheck========================>\n")); + + if(!(pDM_Odm->SupportAbility& ODM_MAC_EDCA_TURBO )) + return; + + switch (pDM_Odm->SupportPlatform) + { + case ODM_WIN: + +#if(DM_ODM_SUPPORT_TYPE==ODM_WIN) + odm_EdcaTurboCheckMP(pDM_Odm); +#endif + break; + + case ODM_CE: +#if(DM_ODM_SUPPORT_TYPE==ODM_CE) + odm_EdcaTurboCheckCE(pDM_Odm); +#endif + break; + + case ODM_AP: + case ODM_ADSL: + +#if ((DM_ODM_SUPPORT_TYPE == ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL)) + odm_IotEngine(pDM_Odm); +#endif + break; + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("<========================odm_EdcaTurboCheck\n")); + +} // odm_CheckEdcaTurbo + +#if(DM_ODM_SUPPORT_TYPE==ODM_CE) + + +VOID +odm_EdcaTurboCheckCE( + IN PVOID pDM_VOID + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + PADAPTER Adapter = pDM_Odm->Adapter; + u32 EDCA_BE_UL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[pMgntInfo->IOTPeer]; + u32 EDCA_BE_DL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[pMgntInfo->IOTPeer]; + u32 ICType=pDM_Odm->SupportICType; + u32 IOTPeer=0; + u8 WirelessMode=0xFF; //invalid value + u32 trafficIndex; + u32 edca_param; + u64 cur_tx_bytes = 0; + u64 cur_rx_bytes = 0; + u8 bbtchange = _FALSE; + u8 bBiasOnRx = _FALSE; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter); + struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); + struct recv_priv *precvpriv = &(Adapter->recvpriv); + struct registry_priv *pregpriv = &Adapter->registrypriv; + struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + if(pDM_Odm->bLinked != _TRUE) + { + precvpriv->bIsAnyNonBEPkts = _FALSE; + return; + } + + if ((pregpriv->wifi_spec == 1) )//|| (pmlmeinfo->HT_enable == 0)) + { + precvpriv->bIsAnyNonBEPkts = _FALSE; + return; + } + + if(pDM_Odm->pWirelessMode!=NULL) + WirelessMode=*(pDM_Odm->pWirelessMode); + + IOTPeer = pmlmeinfo->assoc_AP_vendor; + + if (IOTPeer >= HT_IOT_PEER_MAX) + { + precvpriv->bIsAnyNonBEPkts = _FALSE; + return; + } + + if( (pDM_Odm->SupportICType == ODM_RTL8192C) || + (pDM_Odm->SupportICType == ODM_RTL8723A) || + (pDM_Odm->SupportICType == ODM_RTL8188E)) + { + if((IOTPeer == HT_IOT_PEER_RALINK)||(IOTPeer == HT_IOT_PEER_ATHEROS)) + bBiasOnRx = _TRUE; + } + + // Check if the status needs to be changed. + if((bbtchange) || (!precvpriv->bIsAnyNonBEPkts) ) + { + cur_tx_bytes = pdvobjpriv->traffic_stat.cur_tx_bytes; + cur_rx_bytes = pdvobjpriv->traffic_stat.cur_rx_bytes; + + //traffic, TX or RX + if(bBiasOnRx) + { + if (cur_tx_bytes > (cur_rx_bytes << 2)) + { // Uplink TP is present. + trafficIndex = UP_LINK; + } + else + { // Balance TP is present. + trafficIndex = DOWN_LINK; + } + } + else + { + if (cur_rx_bytes > (cur_tx_bytes << 2)) + { // Downlink TP is present. + trafficIndex = DOWN_LINK; + } + else + { // Balance TP is present. + trafficIndex = UP_LINK; + } + } + + //if ((pDM_Odm->DM_EDCA_Table.prv_traffic_idx != trafficIndex) || (!pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA)) + { + if(ICType==ODM_RTL8192D) + { + // Single PHY + if(pDM_Odm->RFType==ODM_2T2R) + { + EDCA_BE_UL = 0x60a42b; //0x5ea42b; + EDCA_BE_DL = 0x60a42b; //0x5ea42b; + } + else + { + EDCA_BE_UL = 0x6ea42b; + EDCA_BE_DL = 0x6ea42b; + } + } + else + { + if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE) { + if((ICType==ODM_RTL8192C)&&(pDM_Odm->RFType==ODM_2T2R)) { + EDCA_BE_UL = 0x60a42b; + EDCA_BE_DL = 0x60a42b; + } + else + { + EDCA_BE_UL = 0x6ea42b; + EDCA_BE_DL = 0x6ea42b; + } + } + } + + //92D txop can't be set to 0x3e for cisco1250 + if((ICType!=ODM_RTL8192D) && (IOTPeer== HT_IOT_PEER_CISCO) &&(WirelessMode==ODM_WM_N24G)) + { + EDCA_BE_DL = edca_setting_DL[IOTPeer]; + EDCA_BE_UL = edca_setting_UL[IOTPeer]; + } + //merge from 92s_92c_merge temp brunch v2445 20120215 + else if((IOTPeer == HT_IOT_PEER_CISCO) &&((WirelessMode==ODM_WM_G)||(WirelessMode==(ODM_WM_B|ODM_WM_G))||(WirelessMode==ODM_WM_A)||(WirelessMode==ODM_WM_B))) + { + EDCA_BE_DL = edca_setting_DL_GMode[IOTPeer]; + } + else if((IOTPeer== HT_IOT_PEER_AIRGO )&& ((WirelessMode==ODM_WM_G)||(WirelessMode==ODM_WM_A))) + { + EDCA_BE_DL = 0xa630; + } + else if(IOTPeer == HT_IOT_PEER_MARVELL) + { + EDCA_BE_DL = edca_setting_DL[IOTPeer]; + EDCA_BE_UL = edca_setting_UL[IOTPeer]; + } + else if(IOTPeer == HT_IOT_PEER_ATHEROS) + { + // Set DL EDCA for Atheros peer to 0x3ea42b. Suggested by SD3 Wilson for ASUS TP issue. + EDCA_BE_DL = edca_setting_DL[IOTPeer]; + } + + if((ICType==ODM_RTL8812)||(ICType==ODM_RTL8821)||(ICType==ODM_RTL8192E)) //add 8812AU/8812AE + { + EDCA_BE_UL = 0x5ea42b; + EDCA_BE_DL = 0x5ea42b; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("8812A: EDCA_BE_UL=0x%x EDCA_BE_DL =0x%x",EDCA_BE_UL,EDCA_BE_DL)); + } + + if (trafficIndex == DOWN_LINK) + edca_param = EDCA_BE_DL; + else + edca_param = EDCA_BE_UL; + + rtw_write32(Adapter, REG_EDCA_BE_PARAM, edca_param); + + pDM_Odm->DM_EDCA_Table.prv_traffic_idx = trafficIndex; + } + + pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = _TRUE; + } + else + { + // + // Turn Off EDCA turbo here. + // Restore original EDCA according to the declaration of AP. + // + if(pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) + { + rtw_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE); + pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = _FALSE; + } + } + +} + + +#elif(DM_ODM_SUPPORT_TYPE==ODM_WIN) +VOID +odm_EdcaTurboCheckMP( + IN PVOID pDM_VOID + ) +{ + + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + PADAPTER pDefaultAdapter = GetDefaultAdapter(Adapter); + PADAPTER pExtAdapter = GetFirstExtAdapter(Adapter);//NULL; + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + PSTA_QOS pStaQos = Adapter->MgntInfo.pStaQos; + //[Win7 Count Tx/Rx statistic for Extension Port] odm_CheckEdcaTurbo's Adapter is always Default. 2009.08.20, by Bohn + u8Byte Ext_curTxOkCnt = 0; + u8Byte Ext_curRxOkCnt = 0; + //For future Win7 Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn. + u1Byte TwoPortStatus = (u1Byte)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE; + + // Keep past Tx/Rx packet count for RT-to-RT EDCA turbo. + u8Byte curTxOkCnt = 0; + u8Byte curRxOkCnt = 0; + u4Byte EDCA_BE_UL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[pMgntInfo->IOTPeer]; + u4Byte EDCA_BE_DL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[pMgntInfo->IOTPeer]; + u4Byte EDCA_BE = 0x5ea42b; + u1Byte IOTPeer=0; + BOOLEAN *pbIsCurRDLState=NULL; + BOOLEAN bLastIsCurRDLState=FALSE; + BOOLEAN bBiasOnRx=FALSE; + BOOLEAN bEdcaTurboOn=FALSE; + u1Byte TxRate = 0xFF; + u8Byte value64; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("odm_EdcaTurboCheckMP========================>")); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BE PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BE_PARAM))); + +////=============================== +////list paramter for different platform +////=============================== + bLastIsCurRDLState=pDM_Odm->DM_EDCA_Table.bIsCurRDLState; + pbIsCurRDLState=&(pDM_Odm->DM_EDCA_Table.bIsCurRDLState); + + //2012/09/14 MH Add + if (pMgntInfo->NumNonBePkt > pMgntInfo->RegEdcaThresh && !Adapter->MgntInfo.bWiFiConfg) + pHalData->bIsAnyNonBEPkts = TRUE; + + pMgntInfo->NumNonBePkt = 0; + + // Caculate TX/RX TP: + //curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - pMgntInfo->lastTxOkCnt; + //curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - pMgntInfo->lastRxOkCnt; + curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - pDM_Odm->lastTxOkCnt; + curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - pDM_Odm->lastRxOkCnt; + pDM_Odm->lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; + pDM_Odm->lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; + + if(pExtAdapter == NULL) + pExtAdapter = pDefaultAdapter; + + Ext_curTxOkCnt = pExtAdapter->TxStats.NumTxBytesUnicast - pMgntInfo->Ext_lastTxOkCnt; + Ext_curRxOkCnt = pExtAdapter->RxStats.NumRxBytesUnicast - pMgntInfo->Ext_lastRxOkCnt; + GetTwoPortSharedResource(Adapter,TWO_PORT_SHARED_OBJECT__STATUS,NULL,&TwoPortStatus); + //For future Win7 Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn. + if(TwoPortStatus == TWO_PORT_STATUS__EXTENSION_ONLY) + { + curTxOkCnt = Ext_curTxOkCnt ; + curRxOkCnt = Ext_curRxOkCnt ; + } + // + IOTPeer=pMgntInfo->IOTPeer; + bBiasOnRx=(pMgntInfo->IOTAction & HT_IOT_ACT_EDCA_BIAS_ON_RX)?TRUE:FALSE; + bEdcaTurboOn=((!pHalData->bIsAnyNonBEPkts))?TRUE:FALSE; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bIsAnyNonBEPkts : 0x%lx \n",pHalData->bIsAnyNonBEPkts)); + + +////=============================== +////check if edca turbo is disabled +////=============================== + if(odm_IsEdcaTurboDisable(pDM_Odm)) + { + pHalData->bIsAnyNonBEPkts = FALSE; + pMgntInfo->lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; + pMgntInfo->lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; + pMgntInfo->Ext_lastTxOkCnt = pExtAdapter->TxStats.NumTxBytesUnicast; + pMgntInfo->Ext_lastRxOkCnt = pExtAdapter->RxStats.NumRxBytesUnicast; + + } + +////=============================== +////remove iot case out +////=============================== + ODM_EdcaParaSelByIot(pDM_Odm, &EDCA_BE_UL, &EDCA_BE_DL); + + +////=============================== +////Check if the status needs to be changed. +////=============================== + if(bEdcaTurboOn) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bEdcaTurboOn : 0x%x bBiasOnRx : 0x%x\n",bEdcaTurboOn,bBiasOnRx)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("curTxOkCnt : 0x%lx \n",curTxOkCnt)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("curRxOkCnt : 0x%lx \n",curRxOkCnt)); + if(bBiasOnRx) + odm_EdcaChooseTrafficIdx(pDM_Odm,curTxOkCnt, curRxOkCnt, TRUE, pbIsCurRDLState); + else + odm_EdcaChooseTrafficIdx(pDM_Odm,curTxOkCnt, curRxOkCnt, FALSE, pbIsCurRDLState); + +//modify by Guo.Mingzhi 2011-12-29 + EDCA_BE=((*pbIsCurRDLState)==TRUE)?EDCA_BE_DL:EDCA_BE_UL; + if(IS_HARDWARE_TYPE_8821U(Adapter)) + { + if(pMgntInfo->RegTxDutyEnable) + { + //2013.01.23 LukeLee: debug for 8811AU thermal issue (reduce Tx duty cycle) + if(!pMgntInfo->ForcedDataRate) //auto rate + { + if(pDM_Odm->TxRate != 0xFF) + TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate); + } + else //force rate + { + TxRate = (u1Byte) pMgntInfo->ForcedDataRate; + } + + value64 = (curRxOkCnt<<2); + if(curTxOkCnt < value64) //Downlink + ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); + else //Uplink + { + //DbgPrint("pDM_Odm->RFCalibrateInfo.ThermalValue = 0x%X\n", pDM_Odm->RFCalibrateInfo.ThermalValue); + //if(pDM_Odm->RFCalibrateInfo.ThermalValue < pHalData->EEPROMThermalMeter) + if((pDM_Odm->RFCalibrateInfo.ThermalValue < 0x2c) || (*pDM_Odm->pBandType == BAND_ON_2_4G)) + ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); + else + { + switch (TxRate) + { + case MGN_VHT1SS_MCS6: + case MGN_VHT1SS_MCS5: + case MGN_MCS6: + case MGN_MCS5: + case MGN_48M: + case MGN_54M: + ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0x1ea42b); + break; + case MGN_VHT1SS_MCS4: + case MGN_MCS4: + case MGN_36M: + ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa42b); + break; + case MGN_VHT1SS_MCS3: + case MGN_MCS3: + case MGN_24M: + ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa47f); + break; + case MGN_VHT1SS_MCS2: + case MGN_MCS2: + case MGN_18M: + ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa57f); + break; + case MGN_VHT1SS_MCS1: + case MGN_MCS1: + case MGN_9M: + case MGN_12M: + ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa77f); + break; + case MGN_VHT1SS_MCS0: + case MGN_MCS0: + case MGN_6M: + ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa87f); + break; + default: + ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); + break; + } + } + } + } + else + { + ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); + } + + } + else if (IS_HARDWARE_TYPE_8812AU(Adapter)){ + if(pMgntInfo->RegTxDutyEnable) + { + //2013.07.26 Wilson: debug for 8812AU thermal issue (reduce Tx duty cycle) + // it;s the same issue as 8811AU + if(!pMgntInfo->ForcedDataRate) //auto rate + { + if(pDM_Odm->TxRate != 0xFF) + TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate); + } + else //force rate + { + TxRate = (u1Byte) pMgntInfo->ForcedDataRate; + } + + value64 = (curRxOkCnt<<2); + if(curTxOkCnt < value64) //Downlink + ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); + else //Uplink + { + //DbgPrint("pDM_Odm->RFCalibrateInfo.ThermalValue = 0x%X\n", pDM_Odm->RFCalibrateInfo.ThermalValue); + //if(pDM_Odm->RFCalibrateInfo.ThermalValue < pHalData->EEPROMThermalMeter) + if((pDM_Odm->RFCalibrateInfo.ThermalValue < 0x2c) || (*pDM_Odm->pBandType == BAND_ON_2_4G)) + ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); + else + { + switch (TxRate) + { + case MGN_VHT2SS_MCS9: + case MGN_VHT1SS_MCS9: + case MGN_VHT1SS_MCS8: + case MGN_MCS15: + case MGN_MCS7: + ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0x1ea44f); + case MGN_VHT2SS_MCS8: + case MGN_VHT1SS_MCS7: + case MGN_MCS14: + case MGN_MCS6: + case MGN_54M: + ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa44f); + case MGN_VHT2SS_MCS7: + case MGN_VHT2SS_MCS6: + case MGN_VHT1SS_MCS6: + case MGN_VHT1SS_MCS5: + case MGN_MCS13: + case MGN_MCS5: + case MGN_48M: + ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa630); + break; + case MGN_VHT2SS_MCS5: + case MGN_VHT2SS_MCS4: + case MGN_VHT1SS_MCS4: + case MGN_VHT1SS_MCS3: + case MGN_MCS12: + case MGN_MCS4: + case MGN_MCS3: + case MGN_36M: + case MGN_24M: + ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa730); + break; + case MGN_VHT2SS_MCS3: + case MGN_VHT2SS_MCS2: + case MGN_VHT2SS_MCS1: + case MGN_VHT1SS_MCS2: + case MGN_VHT1SS_MCS1: + case MGN_MCS11: + case MGN_MCS10: + case MGN_MCS9: + case MGN_MCS2: + case MGN_MCS1: + case MGN_18M: + case MGN_12M: + ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa830); + break; + case MGN_VHT2SS_MCS0: + case MGN_VHT1SS_MCS0: + case MGN_MCS0: + case MGN_MCS8: + case MGN_9M: + case MGN_6M: + ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa87f); + break; + default: + ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); + break; + } + } + } + } + else + { + ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); + } + } + else + ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE); + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EDCA Turbo on: EDCA_BE:0x%lx\n",EDCA_BE)); + + pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = TRUE; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EDCA_BE_DL : 0x%lx EDCA_BE_UL : 0x%lx EDCA_BE : 0x%lx \n",EDCA_BE_DL,EDCA_BE_UL,EDCA_BE)); + + } + else + { + // Turn Off EDCA turbo here. + // Restore original EDCA according to the declaration of AP. + if(pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) + { + Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_AC_PARAM, GET_WMM_PARAM_ELE_SINGLE_AC_PARAM(pStaQos->WMMParamEle, AC0_BE) ); + + pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Restore EDCA BE: 0x%lx \n",pDM_Odm->WMMEDCA_BE)); + + } + } + +} + + +//check if edca turbo is disabled +BOOLEAN +odm_IsEdcaTurboDisable( + IN PVOID pDM_VOID +) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + PADAPTER Adapter = pDM_Odm->Adapter; + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + u4Byte IOTPeer=pMgntInfo->IOTPeer; + + if(pDM_Odm->bBtDisableEdcaTurbo) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("EdcaTurboDisable for BT!!\n")); + return TRUE; + } + + if((!(pDM_Odm->SupportAbility& ODM_MAC_EDCA_TURBO ))|| + (pDM_Odm->bWIFITest)|| + (IOTPeer>= HT_IOT_PEER_MAX)) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("EdcaTurboDisable\n")); + return TRUE; + } + + + // 1. We do not turn on EDCA turbo mode for some AP that has IOT issue + // 2. User may disable EDCA Turbo mode with OID settings. + if(pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_EDCA_TURBO){ + ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("IOTAction:EdcaTurboDisable\n")); + return TRUE; + } + + return FALSE; + + +} + +//add iot case here: for MP/CE +VOID +ODM_EdcaParaSelByIot( + IN PVOID pDM_VOID, + OUT u4Byte *EDCA_BE_UL, + OUT u4Byte *EDCA_BE_DL + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u4Byte IOTPeer=0; + u4Byte ICType=pDM_Odm->SupportICType; + u1Byte WirelessMode=0xFF; //invalid value + u4Byte RFType=pDM_Odm->RFType; + u4Byte IOTPeerSubType=0; + + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + u1Byte TwoPortStatus = (u1Byte)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE; + + if(pDM_Odm->pWirelessMode!=NULL) + WirelessMode=*(pDM_Odm->pWirelessMode); + +/////////////////////////////////////////////////////////// +////list paramter for different platform + + IOTPeer=pMgntInfo->IOTPeer; + IOTPeerSubType=pMgntInfo->IOTPeerSubtype; + GetTwoPortSharedResource(Adapter,TWO_PORT_SHARED_OBJECT__STATUS,NULL,&TwoPortStatus); + + + if(ICType==ODM_RTL8192D) + { + // Single PHY + if(pDM_Odm->RFType==ODM_2T2R) + { + (*EDCA_BE_UL) = 0x60a42b; //0x5ea42b; + (*EDCA_BE_DL) = 0x60a42b; //0x5ea42b; + + } + else + { + (*EDCA_BE_UL) = 0x6ea42b; + (*EDCA_BE_DL) = 0x6ea42b; + } + + } +////============================ +/// IOT case for MP +////============================ + + else + { + + if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE){ + if((ICType==ODM_RTL8192C)&&(pDM_Odm->RFType==ODM_2T2R)) { + (*EDCA_BE_UL) = 0x60a42b; + (*EDCA_BE_DL) = 0x60a42b; + } + else + { + (*EDCA_BE_UL) = 0x6ea42b; + (*EDCA_BE_DL) = 0x6ea42b; + } + } + } + + if(TwoPortStatus == TWO_PORT_STATUS__EXTENSION_ONLY) + { + (*EDCA_BE_UL) = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[ExtAdapter->MgntInfo.IOTPeer]; + (*EDCA_BE_DL) = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[ExtAdapter->MgntInfo.IOTPeer]; + } + + #if (INTEL_PROXIMITY_SUPPORT == 1) + if(pMgntInfo->IntelClassModeInfo.bEnableCA == TRUE) + { + (*EDCA_BE_UL) = (*EDCA_BE_DL) = 0xa44f; + } + else + #endif + { + if((pMgntInfo->IOTAction & (HT_IOT_ACT_FORCED_ENABLE_BE_TXOP|HT_IOT_ACT_AMSDU_ENABLE))) + {// To check whether we shall force turn on TXOP configuration. + if(!((*EDCA_BE_UL) & 0xffff0000)) + (*EDCA_BE_UL) |= 0x005e0000; // Force TxOP limit to 0x005e for UL. + if(!((*EDCA_BE_DL) & 0xffff0000)) + (*EDCA_BE_DL) |= 0x005e0000; // Force TxOP limit to 0x005e for DL. + } + + //92D txop can't be set to 0x3e for cisco1250 + if((ICType!=ODM_RTL8192D) && (IOTPeer== HT_IOT_PEER_CISCO) &&(WirelessMode==ODM_WM_N24G)) + { + (*EDCA_BE_DL) = edca_setting_DL[IOTPeer]; + (*EDCA_BE_UL) = edca_setting_UL[IOTPeer]; + } + //merge from 92s_92c_merge temp brunch v2445 20120215 + else if((IOTPeer == HT_IOT_PEER_CISCO) &&((WirelessMode==ODM_WM_G)||(WirelessMode==(ODM_WM_B|ODM_WM_G))||(WirelessMode==ODM_WM_A)||(WirelessMode==ODM_WM_B))) + { + (*EDCA_BE_DL) = edca_setting_DL_GMode[IOTPeer]; + } + else if((IOTPeer== HT_IOT_PEER_AIRGO )&& ((WirelessMode==ODM_WM_G)||(WirelessMode==ODM_WM_A))) + { + (*EDCA_BE_DL) = 0xa630; + } + + else if(IOTPeer == HT_IOT_PEER_MARVELL) + { + (*EDCA_BE_DL) = edca_setting_DL[IOTPeer]; + (*EDCA_BE_UL) = edca_setting_UL[IOTPeer]; + } + else if(IOTPeer == HT_IOT_PEER_ATHEROS) + { + // Set DL EDCA for Atheros peer to 0x3ea42b. Suggested by SD3 Wilson for ASUS TP issue. + if(WirelessMode==ODM_WM_G) + (*EDCA_BE_DL) = edca_setting_DL_GMode[IOTPeer]; + else + (*EDCA_BE_DL) = edca_setting_DL[IOTPeer]; + + if(ICType == ODM_RTL8821) + (*EDCA_BE_DL) = 0x5ea630; + + } + } + + if((ICType == ODM_RTL8192D)&&(IOTPeerSubType == HT_IOT_PEER_LINKSYS_E4200_V1)&&((WirelessMode==ODM_WM_N5G))) + { + (*EDCA_BE_DL) = 0x432b; + (*EDCA_BE_UL) = 0x432b; + } + + + + if((ICType==ODM_RTL8812)||(ICType==ODM_RTL8192E)) //add 8812AU/8812AE + { + (*EDCA_BE_UL) = 0x5ea42b; + (*EDCA_BE_DL) = 0x5ea42b; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("8812A: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx",(*EDCA_BE_UL),(*EDCA_BE_DL))); + } + + // Revised for Atheros DIR-655 IOT issue to improve down link TP, added by Roger, 2013.03.22. + if((ICType == ODM_RTL8723A) && (IOTPeerSubType== HT_IOT_PEER_ATHEROS_DIR655) && + (pMgntInfo->dot11CurrentChannelNumber == 6)) + { + (*EDCA_BE_DL) = 0xa92b; + } + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Special: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx",(*EDCA_BE_UL),(*EDCA_BE_DL))); + +} + + +VOID +odm_EdcaChooseTrafficIdx( + IN PVOID pDM_VOID, + IN u8Byte cur_tx_bytes, + IN u8Byte cur_rx_bytes, + IN BOOLEAN bBiasOnRx, + OUT BOOLEAN *pbIsCurRDLState + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + + if(bBiasOnRx) + { + + if(cur_tx_bytes>(cur_rx_bytes*4)) + { + *pbIsCurRDLState=FALSE; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Uplink Traffic\n ")); + + } + else + { + *pbIsCurRDLState=TRUE; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Balance Traffic\n")); + + } + } + else + { + if(cur_rx_bytes>(cur_tx_bytes*4)) + { + *pbIsCurRDLState=TRUE; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Downlink Traffic\n")); + + } + else + { + *pbIsCurRDLState=FALSE; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Balance Traffic\n")); + } + } + + return ; +} + +#endif + +#if((DM_ODM_SUPPORT_TYPE==ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL)) + +void odm_EdcaParaInit( + IN PVOID pDM_VOID + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + prtl8192cd_priv priv = pDM_Odm->priv; + int mode=priv->pmib->dot11BssType.net_work_type; + + static unsigned int slot_time, sifs_time; + struct ParaRecord EDCA[4]; + + memset(EDCA, 0, 4*sizeof(struct ParaRecord)); + + sifs_time = 10; + slot_time = 20; + + if (mode & (ODM_WM_N24G|ODM_WM_N5G)) + sifs_time = 16; + + if (mode & (ODM_WM_N24G|ODM_WM_N5G| ODM_WM_G|ODM_WM_A)) + slot_time = 9; + + +#ifdef RTK_AC_SUPPORT //for 11ac logo, edit aifs time for cca test cases + if(AC_SIGMA_MODE != AC_SIGMA_NONE) + sifs_time = 10; +#endif + + +#if((defined(RTL_MANUAL_EDCA))&&(DM_ODM_SUPPORT_TYPE==ODM_AP)) + if( priv->pmib->dot11QosEntry.ManualEDCA ) { + if( OPMODE & WIFI_AP_STATE ) + memcpy(EDCA, priv->pmib->dot11QosEntry.AP_manualEDCA, 4*sizeof(struct ParaRecord)); + else + memcpy(EDCA, priv->pmib->dot11QosEntry.STA_manualEDCA, 4*sizeof(struct ParaRecord)); + + #ifdef WIFI_WMM + if (QOS_ENABLE) + ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[VI].TXOPlimit<< 16) | (EDCA[VI].ECWmax<< 12) | (EDCA[VI].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time)); + else + #endif + ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[BE].TXOPlimit<< 16) | (EDCA[BE].ECWmax<< 12) | (EDCA[BE].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time)); + + }else + #endif //RTL_MANUAL_EDCA + { + + if(OPMODE & WIFI_AP_STATE) + { + memcpy(EDCA, rtl_ap_EDCA, 2*sizeof(struct ParaRecord)); + + if(mode & (ODM_WM_A|ODM_WM_G|ODM_WM_N24G|ODM_WM_N5G)) + memcpy(&EDCA[VI], &rtl_ap_EDCA[VI_AG], 2*sizeof(struct ParaRecord)); + else + memcpy(&EDCA[VI], &rtl_ap_EDCA[VI], 2*sizeof(struct ParaRecord)); + } + else + { + memcpy(EDCA, rtl_sta_EDCA, 2*sizeof(struct ParaRecord)); + + if(mode & (ODM_WM_A|ODM_WM_G|ODM_WM_N24G|ODM_WM_N5G)) + memcpy(&EDCA[VI], &rtl_sta_EDCA[VI_AG], 2*sizeof(struct ParaRecord)); + else + memcpy(&EDCA[VI], &rtl_sta_EDCA[VI], 2*sizeof(struct ParaRecord)); + } + + #ifdef WIFI_WMM + if (QOS_ENABLE) + ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[VI].TXOPlimit<< 16) | (EDCA[VI].ECWmax<< 12) | (EDCA[VI].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time)); + else + #endif + +#if (DM_ODM_SUPPORT_TYPE==ODM_AP) + ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[BK].ECWmax<< 12) | (EDCA[BK].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time)); +#elif(DM_ODM_SUPPORT_TYPE==ODM_ADSL) + ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[BK].ECWmax<< 12) | (EDCA[BK].ECWmin<< 8) | (sifs_time + 2* slot_time)); +#endif + + + } + + ODM_Write4Byte(pDM_Odm, ODM_EDCA_VO_PARAM, (EDCA[VO].TXOPlimit<< 16) | (EDCA[VO].ECWmax<< 12) | (EDCA[VO].ECWmin<< 8) | (sifs_time + EDCA[VO].AIFSN* slot_time)); + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (EDCA[BE].TXOPlimit<< 16) | (EDCA[BE].ECWmax<< 12) | (EDCA[BE].ECWmin<< 8) | (sifs_time + EDCA[BE].AIFSN* slot_time)); + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BK_PARAM, (EDCA[BK].TXOPlimit<< 16) | (EDCA[BK].ECWmax<< 12) | (EDCA[BK].ECWmin<< 8) | (sifs_time + EDCA[BK].AIFSN* slot_time)); + +#if defined(RTK_AC_SUPPORT) && defined(RTL_MANUAL_EDCA) //for 11ac logo, make BK worse to seperate with BE. + if((AC_SIGMA_MODE != AC_SIGMA_NONE) && (priv->pmib->dot11QosEntry.ManualEDCA)) + { + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BK_PARAM, (EDCA[BK].TXOPlimit<< 16) | (EDCA[BK].ECWmax<< 12) | (EDCA[BK].ECWmin<< 8) | 0xa4 ); + } +#endif + +// ODM_Write1Byte(pDM_Odm,ACMHWCTRL, 0x00); + + priv->pshare->iot_mode_enable = 0; +#if(DM_ODM_SUPPORT_TYPE==ODM_AP) + if (priv->pshare->rf_ft_var.wifi_beq_iot) + priv->pshare->iot_mode_VI_exist = 0; + + #ifdef WMM_VIBE_PRI + priv->pshare->iot_mode_BE_exist = 0; + #endif + +#ifdef WMM_BEBK_PRI + priv->pshare->iot_mode_BK_exist = 0; +#endif + + #ifdef LOW_TP_TXOP + priv->pshare->BE_cwmax_enhance = 0; + #endif + +#elif (DM_ODM_SUPPORT_TYPE==ODM_ADSL) + priv->pshare->iot_mode_BE_exist = 0; +#endif + priv->pshare->iot_mode_VO_exist = 0; +} + +BOOLEAN +ODM_ChooseIotMainSTA( + IN PVOID pDM_VOID, + IN PSTA_INFO_T pstat + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + prtl8192cd_priv priv = pDM_Odm->priv; + BOOLEAN bhighTP_found_pstat=FALSE; + + if ((GET_ROOT(priv)->up_time % 2) == 0) { + unsigned int tx_2s_avg = 0; + unsigned int rx_2s_avg = 0; + int i=0, aggReady=0; + unsigned long total_sum = (priv->pshare->current_tx_bytes+priv->pshare->current_rx_bytes); + int assoc_num = GET_ROOT(priv)->assoc_num; +#ifdef MBSSID + if (GET_ROOT(priv)->pmib->miscEntry.vap_enable){ + for (i=0; ipvap_priv[i]-> assoc_num; + } +#endif +#ifdef UNIVERSAL_REPEATER + if (IS_DRV_OPEN(GET_VXD_PRIV(GET_ROOT(priv)))) + assoc_num += GET_VXD_PRIV(GET_ROOT(priv))-> assoc_num; +#endif +#ifdef WDS + if(GET_ROOT(priv)->pmib->dot11WdsInfo.wdsEnabled) + assoc_num ++; +#endif + + + pstat->current_tx_bytes += pstat->tx_byte_cnt; + pstat->current_rx_bytes += pstat->rx_byte_cnt; + + if (total_sum != 0) { + if (total_sum <= 1000000) { + tx_2s_avg = (unsigned int)((pstat->current_tx_bytes*100) / total_sum); + rx_2s_avg = (unsigned int)((pstat->current_rx_bytes*100) / total_sum); + } else { + tx_2s_avg = (unsigned int)(pstat->current_tx_bytes / (total_sum / 100)); + rx_2s_avg = (unsigned int)(pstat->current_rx_bytes / (total_sum / 100)); + } + + } + +#if(DM_ODM_SUPPORT_TYPE==ODM_ADSL) + if (pstat->ht_cap_len) { + if ((tx_2s_avg + rx_2s_avg) >=25 ) {//50// + + priv->pshare->highTP_found_pstat = pstat; + bhighTP_found_pstat=TRUE; + } + } +#elif(DM_ODM_SUPPORT_TYPE==ODM_AP) + for(i=0; i<8; i++) + aggReady += (pstat->ADDBA_ready[i]); + + if ((pstat->ht_cap_len && ( +#ifdef SUPPORT_TX_AMSDU + AMSDU_ENABLE || +#endif + aggReady)) || (pstat->IOTPeer==HT_IOT_PEER_INTEL)) + { + if ((assoc_num==1) || (tx_2s_avg + rx_2s_avg >= 25)) { + priv->pshare->highTP_found_pstat = pstat; + } + + #ifdef CLIENT_MODE + if (OPMODE & WIFI_STATION_STATE) { + if ((tx_2s_avg + rx_2s_avg) >= 20) + priv->pshare->highTP_found_pstat = pstat; + } + #endif + } +#endif + } + else { + pstat->current_tx_bytes = pstat->tx_byte_cnt; + pstat->current_rx_bytes = pstat->rx_byte_cnt; + } + + return bhighTP_found_pstat; +} + + +#ifdef WIFI_WMM +VOID +ODM_IotEdcaSwitch( + IN PVOID pDM_VOID, + IN unsigned char enable + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + prtl8192cd_priv priv = pDM_Odm->priv; + int mode=priv->pmib->dot11BssType.net_work_type; + unsigned int slot_time = 20, sifs_time = 10, BE_TXOP = 47, VI_TXOP = 94; + unsigned int vi_cw_max = 4, vi_cw_min = 3, vi_aifs; +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + u32 be_edca, vi_edca; + u16 disable_cfe; +#endif + +#if (DM_ODM_SUPPORT_TYPE==ODM_AP) + if (!(!priv->pmib->dot11OperationEntry.wifi_specific || + ((OPMODE & WIFI_AP_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific)) + #ifdef CLIENT_MODE + || ((OPMODE & WIFI_STATION_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific)) + #endif + )) + return; +#endif + +#ifdef RTK_AC_SUPPORT //for 11ac logo, do not dynamic switch edca + if(AC_SIGMA_MODE != AC_SIGMA_NONE) + return; +#endif + + if ((mode & (ODM_WM_N24G|ODM_WM_N5G)) && (priv->pshare->ht_sta_num + #ifdef WDS + || ((OPMODE & WIFI_AP_STATE) && priv->pmib->dot11WdsInfo.wdsEnabled && priv->pmib->dot11WdsInfo.wdsNum) + #endif + )) + sifs_time = 16; + + if (mode & (ODM_WM_N24G|ODM_WM_N5G|ODM_WM_G|ODM_WM_A)) { + slot_time = 9; + } + else + { + BE_TXOP = 94; + VI_TXOP = 188; + } + +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + vi_edca = -1; + disable_cfe = -1; +#endif + +#if (DM_ODM_SUPPORT_TYPE==ODM_ADSL) + if (priv->pshare->iot_mode_VO_exist) { + // to separate AC_VI and AC_BE to avoid using the same EDCA settings + if (priv->pshare->iot_mode_BE_exist) { + vi_cw_max = 5; + vi_cw_min = 3; + } else { + vi_cw_max = 6; + vi_cw_min = 4; + } + } + vi_aifs = (sifs_time + ((OPMODE & WIFI_AP_STATE)?1:2) * slot_time); + +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + vi_edca = ((VI_TXOP*(1-priv->pshare->iot_mode_VO_exist)) << 16)| (vi_cw_max << 12) | (vi_cw_min << 8) | vi_aifs; +#else + ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, ((VI_TXOP*(1-priv->pshare->iot_mode_VO_exist)) << 16)| (vi_cw_max << 12) | (vi_cw_min << 8) | vi_aifs); +#endif + +#elif (DM_ODM_SUPPORT_TYPE==ODM_AP) + if ((OPMODE & WIFI_AP_STATE) && priv->pmib->dot11OperationEntry.wifi_specific) { + if (priv->pshare->iot_mode_VO_exist) { + #ifdef WMM_VIBE_PRI + if (priv->pshare->iot_mode_BE_exist) + { + vi_cw_max = 5; + vi_cw_min = 3; + vi_aifs = (sifs_time + ((OPMODE & WIFI_AP_STATE)?1:2) * slot_time); + } + else + #endif + { + vi_cw_max = 6; + vi_cw_min = 4; + vi_aifs = 0x2b; + } + } + else { + vi_aifs = (sifs_time + ((OPMODE & WIFI_AP_STATE)?1:2) * slot_time); + } + +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + vi_edca = ((VI_TXOP*(1-priv->pshare->iot_mode_VO_exist)) << 16) + | (vi_cw_max << 12) | (vi_cw_min << 8) | vi_aifs; +#else + ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, ((VI_TXOP*(1-priv->pshare->iot_mode_VO_exist)) << 16) + | (vi_cw_max << 12) | (vi_cw_min << 8) | vi_aifs); +#endif + + #ifdef WMM_BEBK_PRI + #ifdef CONFIG_RTL_88E_SUPPORT + if ((GET_CHIP_VER(priv) == VERSION_8188E) && priv->pshare->iot_mode_BK_exist) { +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + be_edca = (10 << 12) | (6 << 8) | 0x4f; +#else + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BK_PARAM, (10 << 12) | (6 << 8) | 0x4f); +#endif + } + #endif + #endif +#if defined(CONFIG_WLAN_HAL_8881A) + if (GET_CHIP_VER(priv) == VERSION_8881A) + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BK_PARAM, 0xa64f); +#endif + } +#endif + + + +#if (DM_ODM_SUPPORT_TYPE==ODM_AP) + if (priv->pshare->rf_ft_var.wifi_beq_iot && priv->pshare->iot_mode_VI_exist) { +#if defined(CONFIG_RTL_88E_SUPPORT) || defined(CONFIG_RTL_8812_SUPPORT) + if (GET_CHIP_VER(priv) == VERSION_8188E || GET_CHIP_VER(priv) == VERSION_8812E) { +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + be_edca = (10 << 12) | (6 << 8) | 0x4f; +#else + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (10 << 12) | (6 << 8) | 0x4f); +#endif + } + else +#endif + { +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + be_edca = (10 << 12) | (4 << 8) | 0x4f; +#else + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (10 << 12) | (4 << 8) | 0x4f); +#endif + } + } else if(!enable) +#elif(DM_ODM_SUPPORT_TYPE==ODM_ADSL) + if(!enable) //if iot is disable ,maintain original BEQ PARAM +#endif + { +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + be_edca = (((OPMODE & WIFI_AP_STATE)?6:10) << 12) | (4 << 8) + | (sifs_time + 3 * slot_time); + disable_cfe = 1; +#else + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (((OPMODE & WIFI_AP_STATE)?6:10) << 12) | (4 << 8) + | (sifs_time + 3 * slot_time)); +#endif +#ifdef CONFIG_PCI_HCI +// ODM_Write2Byte(pDM_Odm, RD_CTRL, ODM_Read2Byte(pDM_Odm, RD_CTRL) | (DIS_TXOP_CFE)); +#endif + } + else + { + int txop; + unsigned int cw_max; +#ifdef LOW_TP_TXOP + unsigned int txop_close; +#endif + + #if((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined LOW_TP_TXOP)) + cw_max = ((priv->pshare->BE_cwmax_enhance) ? 10 : 6); + txop_close = ((priv->pshare->rf_ft_var.low_tp_txop && priv->pshare->rf_ft_var.low_tp_txop_close) ? 1 : 0); + + if(priv->pshare->txop_enlarge == 0xe) //if intel case + txop = (txop_close ? 0 : (BE_TXOP*2)); + else //if other case + txop = (txop_close ? 0: (BE_TXOP*priv->pshare->txop_enlarge)); + #else + cw_max=6; + if((priv->pshare->txop_enlarge==0xe)||(priv->pshare->txop_enlarge==0xd)) + txop=BE_TXOP*2; + else + txop=BE_TXOP*priv->pshare->txop_enlarge; + + #endif + + if (priv->pshare->ht_sta_num + #ifdef WDS + || ((OPMODE & WIFI_AP_STATE) && (mode & (ODM_WM_N24G|ODM_WM_N5G)) && + priv->pmib->dot11WdsInfo.wdsEnabled && priv->pmib->dot11WdsInfo.wdsNum) + #endif + ) + { + + if (priv->pshare->txop_enlarge == 0xe) { + // is intel client, use a different edca value + //ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop<< 16) | (cw_max<< 12) | (4 << 8) | 0x1f); + if (pDM_Odm->RFType==ODM_1T1R) { +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + be_edca = (txop << 16) | (5 << 12) | (3 << 8) | 0x1f; +#else + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | (5 << 12) | (3 << 8) | 0x1f); +#endif + } + else { +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + be_edca = (txop << 16) | (8 << 12) | (5 << 8) | 0x1f; +#else + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | (8 << 12) | (5 << 8) | 0x1f); +#endif + } + +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + disable_cfe = 0; +#endif +#ifdef CONFIG_PCI_HCI +// ODM_Write2Byte(pDM_Odm, RD_CTRL, ODM_Read2Byte(pDM_Odm, RD_CTRL) & ~(DIS_TXOP_CFE)); +#endif + priv->pshare->txop_enlarge = 2; + } +#if(DM_ODM_SUPPORT_TYPE==ODM_AP) + #ifndef LOW_TP_TXOP + else if (priv->pshare->txop_enlarge == 0xd) { + // is intel ralink, use a different edca value +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + be_edca = (txop << 16) | (6 << 12) | (5 << 8) | 0x2b; +#else + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | (6 << 12) | (5 << 8) | 0x2b); +#endif + priv->pshare->txop_enlarge = 2; + } + #endif +#endif + else + { +// if (txop == 0) { +//#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) +// disable_cfe = 1; +//#endif +//#ifdef CONFIG_PCI_HCI +// ODM_Write2Byte(pDM_Odm, RD_CTRL, ODM_Read2Byte(pDM_Odm, RD_CTRL) | (DIS_TXOP_CFE)); +//#endif +// } + + if (pDM_Odm->RFType==ODM_2T2R) { +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + be_edca = (txop << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time); +#else + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | + (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time)); +#endif + } + else + #if(DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined LOW_TP_TXOP) + { +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + be_edca = (txop << 16) | + (((priv->pshare->BE_cwmax_enhance) ? 10 : 5) << 12) | (3 << 8) | (sifs_time + 2 * slot_time); +#else + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | + (((priv->pshare->BE_cwmax_enhance) ? 10 : 5) << 12) | (3 << 8) | (sifs_time + 2 * slot_time)); +#endif + } + #else + { + PSTA_INFO_T pstat = priv->pshare->highTP_found_pstat; + if ((GET_CHIP_VER(priv)==VERSION_8881A) && pstat && (pstat->IOTPeer == HT_IOT_PEER_HTC)) + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, 0x642b); + else { +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + be_edca = (txop << 16) | (5 << 12) | (3 << 8) | (sifs_time + 2 * slot_time); + #else + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | + (5 << 12) | (3 << 8) | (sifs_time + 2 * slot_time)); +#endif + } + } + #endif + } + } + else + { + #if((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined LOW_TP_TXOP)) +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + be_edca = (BE_TXOP << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time); +#else + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (BE_TXOP << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time)); +#endif + #else + #if defined(CONFIG_RTL_8196D) || defined(CONFIG_RTL_8197DL) || defined(CONFIG_RTL_8196E) || (defined(CONFIG_RTL_8197D) && !defined(CONFIG_PORT0_EXT_GIGA)) +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + be_edca = (BE_TXOP*2 << 16) | (cw_max << 12) | (5 << 8) | (sifs_time + 3 * slot_time); + #else + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (BE_TXOP*2 << 16) | (cw_max << 12) | (5 << 8) | (sifs_time + 3 * slot_time)); +#endif + #else +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + be_edca = (BE_TXOP*2 << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time); + #else + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (BE_TXOP*2 << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time)); + #endif + #endif +/* + if (priv->pshare->txop_enlarge == 0xe) { +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + disable_cfe = 0; +#endif + #ifdef CONFIG_PCI_HCI + ODM_Write2Byte(pDM_Odm, RD_CTRL, ODM_Read2Byte(pDM_Odm, RD_CTRL) & ~(DIS_TXOP_CFE)); + #endif + } else { +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + disable_cfe = 1; +#endif + #ifdef CONFIG_PCI_HCI + ODM_Write2Byte(pDM_Odm, RD_CTRL, ODM_Read2Byte(pDM_Odm, RD_CTRL) | (DIS_TXOP_CFE)); + #endif + } +*/ + #endif + } + + } + +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + notify_IOT_EDCA_switch(priv, be_edca, vi_edca, disable_cfe); +#endif +} +#endif + +VOID +odm_IotEngine( + IN PVOID pDM_VOID + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + struct rtl8192cd_priv *priv=pDM_Odm->priv; + PSTA_INFO_T pstat = NULL; + u4Byte i; + +#ifdef WIFI_WMM + unsigned int switch_turbo = 0, avg_tp; +#endif +//////////////////////////////////////////////////////// +// if EDCA Turbo function is not supported or Manual EDCA Setting +// then return +//////////////////////////////////////////////////////// + if(!(pDM_Odm->SupportAbility&ODM_MAC_EDCA_TURBO)){ + ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("ODM_MAC_EDCA_TURBO NOT SUPPORTED\n")); + return; + } + +#if((DM_ODM_SUPPORT_TYPE==ODM_AP)&& defined(RTL_MANUAL_EDCA) && defined(WIFI_WMM)) + if(priv->pmib->dot11QosEntry.ManualEDCA){ + ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("ODM_MAC_EDCA_TURBO OFF: MANUAL SETTING\n")); + return ; + } +#endif + +#if !(DM_ODM_SUPPORT_TYPE &ODM_AP) + ////////////////////////////////////////////////////// + //find high TP STA every 2s +////////////////////////////////////////////////////// + if ((GET_ROOT(priv)->up_time % 2) == 0) + priv->pshare->highTP_found_pstat==NULL; + +#if 0 + phead = &priv->asoc_list; + plist = phead->next; + while(plist != phead) { + pstat = list_entry(plist, struct stat_info, asoc_list); + + if(ODM_ChooseIotMainSTA(pDM_Odm, pstat)); //find the correct station + break; + if (plist == plist->next) //the last plist + break; + plist = plist->next; + }; +#endif + + //find highTP STA + for(i=0; ipODM_StaInfo[i]; + if(IS_STA_VALID(pstat) && (ODM_ChooseIotMainSTA(pDM_Odm, pstat))) //find the correct station + break; + } + + ////////////////////////////////////////////////////// + //if highTP STA is not found, then return + ////////////////////////////////////////////////////// + if(priv->pshare->highTP_found_pstat==NULL) { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("ODM_MAC_EDCA_TURBO OFF: NO HT STA FOUND\n")); + return; + } +#endif + + pstat=priv->pshare->highTP_found_pstat; + if(pstat) { + if((pstat->tx_avarage + pstat->rx_avarage) < (1<<17)) // 1M bps + pstat = NULL; + } + +#ifdef WIFI_WMM + if (QOS_ENABLE) { + if (!priv->pmib->dot11OperationEntry.wifi_specific + #if(DM_ODM_SUPPORT_TYPE==ODM_AP) + ||((OPMODE & WIFI_AP_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific)) + #elif(DM_ODM_SUPPORT_TYPE==ODM_ADSL) + || (priv->pmib->dot11OperationEntry.wifi_specific == 2) + #endif + ) { + if (priv->pshare->iot_mode_enable && + ((priv->pshare->phw->VO_pkt_count > 50) || + (priv->pshare->phw->VI_pkt_count > 50) || + (priv->pshare->phw->BK_pkt_count > 50))) { + priv->pshare->iot_mode_enable = 0; + switch_turbo++; +#ifdef CONFIG_WLAN_HAL_8881A + if (GET_CHIP_VER(priv) == VERSION_8881A) { + RTL_W32(0x460, 0x03086666); + } +#endif //CONFIG_WLAN_HAL_8881A + } else if ((!priv->pshare->iot_mode_enable) && + ((priv->pshare->phw->VO_pkt_count < 50) && + (priv->pshare->phw->VI_pkt_count < 50) && + (priv->pshare->phw->BK_pkt_count < 50))) { + priv->pshare->iot_mode_enable++; + switch_turbo++; +//#ifdef CONFIG_WLAN_HAL_8881A +#if 0 + if (GET_CHIP_VER(priv) == VERSION_8881A) { + if (get_bonding_type_8881A()==BOND_8881AB) { + RTL_W32(0x460, 0x03086666); + } + else { + RTL_W32(0x460, 0x0320ffff); + } + } +#endif //CONFIG_WLAN_HAL_8881A + } + } + + + #if(DM_ODM_SUPPORT_TYPE==ODM_AP) + if ((OPMODE & WIFI_AP_STATE) && priv->pmib->dot11OperationEntry.wifi_specific) + #elif (DM_ODM_SUPPORT_TYPE==ODM_ADSL) + if (priv->pmib->dot11OperationEntry.wifi_specific) + #endif + { + if (!priv->pshare->iot_mode_VO_exist && (priv->pshare->phw->VO_pkt_count > 50)) { + priv->pshare->iot_mode_VO_exist++; + switch_turbo++; + } else if (priv->pshare->iot_mode_VO_exist && (priv->pshare->phw->VO_pkt_count < 50)) { + priv->pshare->iot_mode_VO_exist = 0; + switch_turbo++; + } +#if((DM_ODM_SUPPORT_TYPE==ODM_ADSL)||((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined WMM_VIBE_PRI))) + if (priv->pshare->iot_mode_VO_exist) { + //printk("[%s %d] BE_pkt_count=%d\n", __FUNCTION__, __LINE__, priv->pshare->phw->BE_pkt_count); + if (!priv->pshare->iot_mode_BE_exist && (priv->pshare->phw->BE_pkt_count > 250)) { + priv->pshare->iot_mode_BE_exist++; + switch_turbo++; + } else if (priv->pshare->iot_mode_BE_exist && (priv->pshare->phw->BE_pkt_count < 250)) { + priv->pshare->iot_mode_BE_exist = 0; + switch_turbo++; + } + } +#endif + +#if((DM_ODM_SUPPORT_TYPE==ODM_ADSL)||((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined WMM_BEBK_PRI))) + if (priv->pshare->phw->BE_pkt_count) { + //printk("[%s %d] BK_pkt_count=%d\n", __FUNCTION__, __LINE__, priv->pshare->phw->BK_pkt_count); + if (!priv->pshare->iot_mode_BK_exist && (priv->pshare->phw->BK_pkt_count > 250)) { + priv->pshare->iot_mode_BK_exist++; + switch_turbo++; + } else if (priv->pshare->iot_mode_BK_exist && (priv->pshare->phw->BK_pkt_count < 250)) { + priv->pshare->iot_mode_BK_exist = 0; + switch_turbo++; + } + } +#endif + +#if (DM_ODM_SUPPORT_TYPE==ODM_AP) + if (priv->pshare->rf_ft_var.wifi_beq_iot) + { + if (!priv->pshare->iot_mode_VI_exist && (priv->pshare->phw->VI_rx_pkt_count > 50)) { + priv->pshare->iot_mode_VI_exist++; + switch_turbo++; + } else if (priv->pshare->iot_mode_VI_exist && (priv->pshare->phw->VI_rx_pkt_count < 50)) { + priv->pshare->iot_mode_VI_exist = 0; + switch_turbo++; + } + } +#endif + + } + else if (!pstat || pstat->rssi < priv->pshare->rf_ft_var.txop_enlarge_lower) { + if (priv->pshare->txop_enlarge) { + priv->pshare->txop_enlarge = 0; + if (priv->pshare->iot_mode_enable) + switch_turbo++; + } + } + +#if(defined(CLIENT_MODE) && (DM_ODM_SUPPORT_TYPE==ODM_AP)) + if ((OPMODE & WIFI_STATION_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific)) + { + if (priv->pshare->iot_mode_enable && + (((priv->pshare->phw->VO_pkt_count > 50) || + (priv->pshare->phw->VI_pkt_count > 50) || + (priv->pshare->phw->BK_pkt_count > 50)) || + (pstat && (!pstat->ADDBA_ready[0]) & (!pstat->ADDBA_ready[3])))) + { + priv->pshare->iot_mode_enable = 0; + switch_turbo++; + } + else if ((!priv->pshare->iot_mode_enable) && + (((priv->pshare->phw->VO_pkt_count < 50) && + (priv->pshare->phw->VI_pkt_count < 50) && + (priv->pshare->phw->BK_pkt_count < 50)) && + (pstat && (pstat->ADDBA_ready[0] | pstat->ADDBA_ready[3])))) + { + priv->pshare->iot_mode_enable++; + switch_turbo++; + } + } +#endif + + priv->pshare->phw->VO_pkt_count = 0; + priv->pshare->phw->VI_pkt_count = 0; + priv->pshare->phw->BK_pkt_count = 0; + + #if((DM_ODM_SUPPORT_TYPE==ODM_ADSL)||((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined WMM_VIBE_PRI))) + priv->pshare->phw->BE_pkt_count = 0; + #endif + + #if(DM_ODM_SUPPORT_TYPE==ODM_AP) + if (priv->pshare->rf_ft_var.wifi_beq_iot) + priv->pshare->phw->VI_rx_pkt_count = 0; + #endif + + } +#endif + + if ((priv->up_time % 2) == 0) { + /* + * decide EDCA content for different chip vendor + */ +#ifdef WIFI_WMM + #if(DM_ODM_SUPPORT_TYPE==ODM_ADSL) + if (QOS_ENABLE && (!priv->pmib->dot11OperationEntry.wifi_specific || (priv->pmib->dot11OperationEntry.wifi_specific == 2) + + #elif(DM_ODM_SUPPORT_TYPE==ODM_AP) + if (QOS_ENABLE && (!priv->pmib->dot11OperationEntry.wifi_specific || + ((OPMODE & WIFI_AP_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2)) + #ifdef CLIENT_MODE + || ((OPMODE & WIFI_STATION_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2)) + #endif + #endif + )) + + { + + if (pstat && pstat->rssi >= priv->pshare->rf_ft_var.txop_enlarge_upper) { +#ifdef LOW_TP_TXOP + if (pstat->IOTPeer==HT_IOT_PEER_INTEL) + { + if (priv->pshare->txop_enlarge != 0xe) + { + priv->pshare->txop_enlarge = 0xe; + + if (priv->pshare->iot_mode_enable) + switch_turbo++; + } + } + else if (priv->pshare->txop_enlarge != 2) + { + priv->pshare->txop_enlarge = 2; + if (priv->pshare->iot_mode_enable) + switch_turbo++; + } +#else + if (priv->pshare->txop_enlarge != 2) + { + if (pstat->IOTPeer==HT_IOT_PEER_INTEL) + priv->pshare->txop_enlarge = 0xe; + else if (pstat->IOTPeer==HT_IOT_PEER_RALINK) + priv->pshare->txop_enlarge = 0xd; + else if (pstat->IOTPeer==HT_IOT_PEER_HTC) + priv->pshare->txop_enlarge = 0; + else + priv->pshare->txop_enlarge = 2; + + if (priv->pshare->iot_mode_enable) + switch_turbo++; + } +#endif + } + else if (!pstat || pstat->rssi < priv->pshare->rf_ft_var.txop_enlarge_lower) + { + if (priv->pshare->txop_enlarge) { + priv->pshare->txop_enlarge = 0; + if (priv->pshare->iot_mode_enable) + switch_turbo++; + } + } + +#if((DM_ODM_SUPPORT_TYPE==ODM_AP)&&( defined LOW_TP_TXOP)) + // for Intel IOT, need to enlarge CW MAX from 6 to 10 + if (pstat && pstat->IOTPeer==HT_IOT_PEER_INTEL && (((pstat->tx_avarage+pstat->rx_avarage)>>10) < + priv->pshare->rf_ft_var.cwmax_enhance_thd)) + { + if (!priv->pshare->BE_cwmax_enhance && priv->pshare->iot_mode_enable) + { + priv->pshare->BE_cwmax_enhance = 1; + switch_turbo++; + } + } else { + if (priv->pshare->BE_cwmax_enhance) { + priv->pshare->BE_cwmax_enhance = 0; + switch_turbo++; + } + } +#endif + } +#endif + priv->pshare->current_tx_bytes = 0; + priv->pshare->current_rx_bytes = 0; + }else { + if ((GET_CHIP_VER(priv) == VERSION_8881A)||(GET_CHIP_VER(priv) == VERSION_8192E)|| (GET_CHIP_VER(priv) == VERSION_8188E) ){ + unsigned int uldl_tp = (priv->pshare->current_tx_bytes+priv->pshare->current_rx_bytes)>>17; + if((uldl_tp > 40) && (priv->pshare->agg_to!= 1)) { + RTL_W8(0x462, 0x08); + priv->pshare->agg_to = 1; + } else if((uldl_tp < 35) && (priv->pshare->agg_to !=0)) { + RTL_W8(0x462, 0x02); + priv->pshare->agg_to = 0; + } + } + } + +#if((DM_ODM_SUPPORT_TYPE==ODM_AP)&& defined( SW_TX_QUEUE)) + if(AMPDU_ENABLE) { +#ifdef TX_EARLY_MODE + if (GET_TX_EARLY_MODE) { + if (!GET_EM_SWQ_ENABLE && + ((priv->assoc_num > 1) || + (pstat && pstat->IOTPeer != HT_IOT_PEER_UNKNOWN))) { + if ((priv->pshare->em_tx_byte_cnt >> 17) > EM_TP_UP_BOUND) + priv->pshare->reach_tx_limit_cnt++; + else + priv->pshare->reach_tx_limit_cnt = 0; + + if (priv->pshare->txop_enlarge && priv->pshare->reach_tx_limit_cnt) { //>= WAIT_TP_TIME// + GET_EM_SWQ_ENABLE = 1; + priv->pshare->reach_tx_limit_cnt = 0; + + if (pstat->IOTPeer == HT_IOT_PEER_INTEL) + MAX_EM_QUE_NUM = 12; + else if (pstat->IOTPeer == HT_IOT_PEER_RALINK) + MAX_EM_QUE_NUM = 10; + + enable_em(priv); + } + } + else if (GET_EM_SWQ_ENABLE) { + if ((priv->pshare->em_tx_byte_cnt >> 17) < EM_TP_LOW_BOUND) + priv->pshare->reach_tx_limit_cnt++; + else + priv->pshare->reach_tx_limit_cnt = 0; + + if (!priv->pshare->txop_enlarge || priv->pshare->reach_tx_limit_cnt >= WAIT_TP_TIME) { + GET_EM_SWQ_ENABLE = 0; + priv->pshare->reach_tx_limit_cnt = 0; + disable_em(priv); + } + } + } +#endif + +#if defined(CONFIG_WLAN_HAL_8881A) || defined(CONFIG_WLAN_HAL_8192EE) || defined(CONFIG_RTL_8812_SUPPORT) + if (pDM_Odm->SupportICType == ODM_RTL8881A || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8812) { + if (priv->assoc_num > 9) + { + if (priv->swq_txmac_chg >= priv->pshare->rf_ft_var.swq_en_highthd){ + if ((priv->swq_decision == 0)){ + switch_turbo++; + if (priv->pshare->txop_enlarge == 0) + priv->pshare->txop_enlarge = 2; + priv->swq_decision = 1; + } + else + { + if ((switch_turbo > 0) && (priv->pshare->txop_enlarge == 0) && (priv->pshare->iot_mode_enable != 0)) + { + priv->pshare->txop_enlarge = 2; + switch_turbo--; + } + } + } + else if(priv->swq_txmac_chg <= priv->pshare->rf_ft_var.swq_dis_lowthd){ + priv->swq_decision = 0; + } + else if ((priv->swq_decision == 1) && (switch_turbo > 0) && (priv->pshare->txop_enlarge == 0) && (priv->pshare->iot_mode_enable != 0)) { + priv->pshare->txop_enlarge = 2; + switch_turbo--; + } + } else { + priv->swq_decision = 0; + } + } else if(CONFIG_WLAN_NOT_HAL_EXIST) +#endif + { + if (priv->assoc_num > 1) + { + if (priv->swq_txmac_chg >= priv->pshare->rf_ft_var.swq_en_highthd){ + if ((priv->swq_decision == 0)){ + switch_turbo++; + if (priv->pshare->txop_enlarge == 0) + priv->pshare->txop_enlarge = 2; + priv->swq_decision = 1; + } + else + { + if ((switch_turbo > 0) && (priv->pshare->txop_enlarge == 0) && (priv->pshare->iot_mode_enable != 0)) + { + priv->pshare->txop_enlarge = 2; + switch_turbo--; + } + } + } + else if(priv->swq_txmac_chg <= priv->pshare->rf_ft_var.swq_dis_lowthd){ + priv->swq_decision = 0; + } + else if ((priv->swq_decision == 1) && (switch_turbo > 0) && (priv->pshare->txop_enlarge == 0) && (priv->pshare->iot_mode_enable != 0)) { + priv->pshare->txop_enlarge = 2; + switch_turbo--; + } + } + //#if (defined CONFIG_RTL_819XD)) + else if (priv->assoc_num == 1 && (priv->up_time % 2 == 0) +#if (DM_ODM_SUPPORT_TYPE==ODM_AP) && defined(TX_EARLY_MODE) + && (!GET_TX_EARLY_MODE || !GET_EM_SWQ_ENABLE) +#endif + ) { + if ((pstat) && (pstat->ADDBA_ready[0] | pstat->ADDBA_ready[3])) { + //int en_thd = 14417920>>(priv->up_time % 2); + avg_tp = (pstat->current_tx_bytes >> 17); + + //if ((priv->swq_decision == 0) && (pstat->current_tx_bytes > en_thd) && (pstat->current_rx_bytes > en_thd) ) { //50Mbps + if ((priv->swq_decision == 0) && (avg_tp > TP_HIGH_WATER_MARK)) { //55Mbps + //printk("[%s:%d] swq_decision=1 current_tp: %d Mbps\n", __FUNCTION__, __LINE__, avg_tp); + priv->swq_decision = 1; + } + //else if ((priv->swq_decision == 1) && ((pstat->tx_avarage < 4587520) || (pstat->rx_avarage < 4587520))) { //35Mbps + else if ((priv->swq_decision == 1) && (avg_tp < TP_LOW_WATER_MARK)) { //35Mbps + //printk("[%s:%d] swq_decision=0 current_tp: %d Mbps\n", __FUNCTION__, __LINE__, avg_tp); + priv->swq_decision = 0; + } + } else { + priv->swq_decision = 0; + } + } + } + if( (priv->swq_decision == 1) +#if (DM_ODM_SUPPORT_TYPE==ODM_AP) && defined(TX_EARLY_MODE) + || (GET_EM_SWQ_ENABLE == 1) +#endif + ) { + priv->swq_en = 1; + priv->swqen_keeptime = priv->up_time; + } else { + priv->swq_en = 0; + priv->swqen_keeptime = 0; + } + } +#endif + +#ifdef WIFI_WMM +#ifdef LOW_TP_TXOP + if ((!priv->pmib->dot11OperationEntry.wifi_specific || (priv->pmib->dot11OperationEntry.wifi_specific == 2)) + && QOS_ENABLE) { + if (switch_turbo || priv->pshare->rf_ft_var.low_tp_txop) { + unsigned int thd_tp; + unsigned char under_thd; + unsigned int curr_tp; + + if (priv->pmib->dot11BssType.net_work_type & (ODM_WM_N24G|ODM_WM_N5G| ODM_WM_G)) + { + // Determine the upper bound throughput threshold. + if (priv->pmib->dot11BssType.net_work_type & (ODM_WM_N24G|ODM_WM_N5G)) { + if (priv->assoc_num && priv->assoc_num != priv->pshare->ht_sta_num) + thd_tp = priv->pshare->rf_ft_var.low_tp_txop_thd_g; + else + thd_tp = priv->pshare->rf_ft_var.low_tp_txop_thd_n; + } + else + thd_tp = priv->pshare->rf_ft_var.low_tp_txop_thd_g; + + // Determine to close txop. +#if defined(UNIVERSAL_REPEATER) || defined(MBSSID) + if(IS_STA_VALID(pstat)) + { + struct rtl8192cd_priv *tmppriv; + struct aid_obj *aidarray; + aidarray = container_of(pstat, struct aid_obj, station); + tmppriv = aidarray->priv; + + curr_tp = (unsigned int)(tmppriv->ext_stats.tx_avarage>>17) + (unsigned int)(tmppriv->ext_stats.rx_avarage>>17); + } + else +#endif + curr_tp = (unsigned int)(priv->ext_stats.tx_avarage>>17) + (unsigned int)(priv->ext_stats.rx_avarage>>17); + if (curr_tp <= thd_tp && curr_tp >= priv->pshare->rf_ft_var.low_tp_txop_thd_low) + under_thd = 1; + else + under_thd = 0; + } + else + { + under_thd = 0; + } + + if (switch_turbo) + { + priv->pshare->rf_ft_var.low_tp_txop_close = under_thd; + priv->pshare->rf_ft_var.low_tp_txop_count = 0; + } + else if (priv->pshare->iot_mode_enable && (priv->pshare->rf_ft_var.low_tp_txop_close != under_thd)) { + priv->pshare->rf_ft_var.low_tp_txop_count++; + if (priv->pshare->rf_ft_var.low_tp_txop_close) { + priv->pshare->rf_ft_var.low_tp_txop_count = priv->pshare->rf_ft_var.low_tp_txop_delay; + } + if (priv->pshare->rf_ft_var.low_tp_txop_count ==priv->pshare->rf_ft_var.low_tp_txop_delay) + + { + priv->pshare->rf_ft_var.low_tp_txop_count = 0; + priv->pshare->rf_ft_var.low_tp_txop_close = under_thd; + switch_turbo++; + } + } + else + { + priv->pshare->rf_ft_var.low_tp_txop_count = 0; + } + } + } +#endif + +#ifdef WMM_DSCP_C42 + if (switch_turbo) { + if (!priv->pshare->iot_mode_enable && !priv->pshare->aggrmax_change) { + RTL_W16(0x4ca, 0x0404); + priv->pshare->aggrmax_change = 1; + } + else if (priv->pshare->iot_mode_enable && priv->pshare->aggrmax_change) { + RTL_W16(0x4ca, priv->pshare->aggrmax_bak); + priv->pshare->aggrmax_change = 0; + } + } +#endif +#ifdef TX_EARLY_MODE + unsigned int em_tp = ((priv->ext_stats.tx_avarage>>17) + (priv->ext_stats.rx_avarage>>17)); + if (em_tp > 80) + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (0x5e << 16) | (4 << 12) | (3 << 8) | 0x19); + else //if (em_tp < 75) + ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (0x5e << 16) | (6 << 12) | (5 << 8) | 0x2b); +#endif + if (switch_turbo) + ODM_IotEdcaSwitch( pDM_Odm, priv->pshare->iot_mode_enable ); +#endif +} +#endif + diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_EdcaTurboCheck.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_EdcaTurboCheck.h new file mode 100755 index 000000000000..8fba8a264529 --- /dev/null +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_EdcaTurboCheck.h @@ -0,0 +1,150 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +#ifndef __ODMEDCATURBOCHECK_H__ +#define __ODMEDCATURBOCHECK_H__ + +typedef struct _EDCA_TURBO_ +{ + BOOLEAN bCurrentTurboEDCA; + BOOLEAN bIsCurRDLState; + + #if(DM_ODM_SUPPORT_TYPE == ODM_CE ) + u4Byte prv_traffic_idx; // edca turbo + #endif + +}EDCA_T,*pEDCA_T; + +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) +static u4Byte edca_setting_UL[HT_IOT_PEER_MAX] = +// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU MARVELL 92U_AP SELF_AP(DownLink/Tx) +{ 0x5e4322, 0xa44f, 0x5e4322, 0x5ea32b, 0x5ea422, 0x5ea322, 0x3ea430, 0x5ea42b, 0x5ea44f, 0x5e4322, 0x5e4322}; + + +static u4Byte edca_setting_DL[HT_IOT_PEER_MAX] = +// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU, MARVELL 92U_AP SELF_AP(UpLink/Rx) +{ 0xa44f, 0x5ea44f, 0x5e4322, 0x5ea42b, 0xa44f, 0xa630, 0x5ea630, 0x5ea42b, 0xa44f, 0xa42b, 0xa42b}; + +static u4Byte edca_setting_DL_GMode[HT_IOT_PEER_MAX] = +// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU, MARVELL 92U_AP SELF_AP +{ 0x4322, 0xa44f, 0x5e4322, 0xa42b, 0x5e4322, 0x4322, 0xa42b, 0x5ea42b, 0xa44f, 0x5e4322, 0x5ea42b}; + + +//============================================================ +// EDCA Paramter for AP/ADSL by Mingzhi 2011-11-22 +//============================================================ +#elif (DM_ODM_SUPPORT_TYPE &ODM_ADSL) +enum qos_prio { BK, BE, VI, VO, VI_AG, VO_AG }; + +static const struct ParaRecord rtl_ap_EDCA[] = +{ +//ACM,AIFSN, ECWmin, ECWmax, TXOplimit + {0, 7, 4, 10, 0}, //BK + {0, 3, 4, 6, 0}, //BE + {0, 1, 3, 4, 188}, //VI + {0, 1, 2, 3, 102}, //VO + {0, 1, 3, 4, 94}, //VI_AG + {0, 1, 2, 3, 47}, //VO_AG +}; + +static const struct ParaRecord rtl_sta_EDCA[] = +{ +//ACM,AIFSN, ECWmin, ECWmax, TXOplimit + {0, 7, 4, 10, 0}, + {0, 3, 4, 10, 0}, + {0, 2, 3, 4, 188}, + {0, 2, 2, 3, 102}, + {0, 2, 3, 4, 94}, + {0, 2, 2, 3, 47}, +}; +#endif + + +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) +#ifdef WIFI_WMM +VOID +ODM_IotEdcaSwitch( + IN PVOID pDM_VOID, + IN unsigned char enable + ); +#endif + +BOOLEAN +ODM_ChooseIotMainSTA( + IN PVOID pDM_VOID, + IN PSTA_INFO_T pstat + ); +#endif + +VOID +odm_EdcaTurboCheck( + IN PVOID pDM_VOID + ); +VOID +ODM_EdcaTurboInit( + IN PVOID pDM_VOID +); + +#if(DM_ODM_SUPPORT_TYPE==ODM_WIN) +VOID +odm_EdcaTurboCheckMP( + IN PVOID pDM_VOID + ); + +//check if edca turbo is disabled +BOOLEAN +odm_IsEdcaTurboDisable( + IN PVOID pDM_VOID +); +//choose edca paramter for special IOT case +VOID +ODM_EdcaParaSelByIot( + IN PVOID pDM_VOID, + OUT u4Byte *EDCA_BE_UL, + OUT u4Byte *EDCA_BE_DL + ); +//check if it is UL or DL +VOID +odm_EdcaChooseTrafficIdx( + IN PVOID pDM_VOID, + IN u8Byte cur_tx_bytes, + IN u8Byte cur_rx_bytes, + IN BOOLEAN bBiasOnRx, + OUT BOOLEAN *pbIsCurRDLState + ); + +#elif (DM_ODM_SUPPORT_TYPE==ODM_CE) +VOID +odm_EdcaTurboCheckCE( + IN PVOID pDM_VOID + ); +#else +VOID +odm_IotEngine( + IN PVOID pDM_VOID + ); + +VOID +odm_EdcaParaInit( + IN PVOID pDM_VOID + ); +#endif + +#endif diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_HWConfig.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_HWConfig.c old mode 100644 new mode 100755 index 0e4396cc9ec8..b37efd10f455 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_HWConfig.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_HWConfig.c @@ -57,13 +57,7 @@ #define GET_VERSION_MP(ic, txt) (ODM_GetVersion_MP_##ic##txt()) #define GET_VERSION_TC(ic, txt) (ODM_GetVersion_TC_##ic##txt()) - -#define GET_VERSION(ic, txt) do {\ - if (pDM_Odm->bIsMPChip)\ - GET_VERSION_MP(ic,txt);\ - else\ - GET_VERSION_TC(ic,txt);\ - } while(0) +#define GET_VERSION(ic, txt) (pDM_Odm->bIsMPChip?GET_VERSION_MP(ic,txt):GET_VERSION_TC(ic,txt)) u1Byte @@ -987,29 +981,7 @@ odm_RxPhyStatus92CSeries_Parsing( } } - //2 For dynamic ATC switch - if(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_ATC) - { - if(pPktinfo->bPacketMatchBSSID && ( *(pDM_Odm->mp_mode) == 0)) - { - // TODO: - - //3 Update CFO report for path-A & path-B - for(i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++) - { - pDM_Odm->CFO_tail[i] = (int)pPhyStaRpt->path_cfotail[i]; - } - - //3 Update packet counter - if(pDM_Odm->packetCount == 0xffffffff) - pDM_Odm->packetCount = 0; - else - pDM_Odm->packetCount++; - - //ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_ATC, ODM_DBG_LOUD, - //("pPhyStaRpt->path_cfotail[i] = 0x%x, pDM_Odm->CFO_tail[i] = 0x%x\n", pPhyStaRpt->path_cfotail[0], pDM_Odm->CFO_tail[1])); - } - } + ODM_ParsingCFO(pDM_Odm, pPktinfo, pPhyStaRpt->path_cfotail); } #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) @@ -1020,8 +992,12 @@ odm_RxPhyStatus92CSeries_Parsing( #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, PWDB_ALL));//PWDB_ALL; +#else +#ifdef CONFIG_SKIP_SIGNAL_SCALE_MAPPING + pPhyInfo->SignalStrength = (u1Byte)PWDB_ALL; #else pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));//PWDB_ALL; +#endif #endif } else @@ -1031,8 +1007,13 @@ odm_RxPhyStatus92CSeries_Parsing( #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) // 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/ pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, total_rssi/=rf_rx_num));//PWDB_ALL; +#else +#ifdef CONFIG_SKIP_SIGNAL_SCALE_MAPPING + total_rssi/=rf_rx_num; + pPhyInfo->SignalStrength = (u1Byte)total_rssi; #else pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, total_rssi/=rf_rx_num)); +#endif #endif } } @@ -1398,27 +1379,9 @@ odm_RxPhyStatusJaguarSeries_Parsing( } } } - //2 For dynamic ATC switch - if(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_ATC) - { - if(pPktinfo->bPacketMatchBSSID && ( *(pDM_Odm->mp_mode) == 0) ) - { - //3 Update CFO report for path-A & path-B - for(i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++) - { - pDM_Odm->CFO_tail[i] = (int)pPhyStaRpt->cfotail[i]; - } - //3 Update packet counter - if(pDM_Odm->packetCount == 0xffffffff) - pDM_Odm->packetCount = 0; - else - pDM_Odm->packetCount++; - - //ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_ATC, ODM_DBG_LOUD, - //("pPhyStaRpt->path_cfotail[i] = 0x%x, pDM_Odm->CFO_tail[i] = 0x%x\n", pPhyStaRpt->path_cfotail[0], pDM_Odm->CFO_tail[1])); - } - } + ODM_ParsingCFO(pDM_Odm, pPktinfo, pPhyStaRpt->cfotail); + } //DbgPrint("isCCKrate= %d, pPhyInfo->SignalStrength=%d % PWDB_AL=%d rf_rx_num=%d\n", isCCKrate, pPhyInfo->SignalStrength, PWDB_ALL, rf_rx_num); @@ -1812,7 +1775,7 @@ ODM_ConfigRFWithHeaderFile( { if(ConfigType == CONFIG_RF_RADIO) { if(eRFPath == ODM_RF_PATH_A) - READ_AND_CONFIG_MP(8723A,_RadioA_1T); + READ_AND_CONFIG_MP(8723A,_RadioA); } } #endif @@ -1821,15 +1784,11 @@ ODM_ConfigRFWithHeaderFile( if (pDM_Odm->SupportICType == ODM_RTL8188E) { if(ConfigType == CONFIG_RF_RADIO) { - if(eRFPath == ODM_RF_PATH_A){ - if(IS_VENDOR_8188E_I_CUT_SERIES(Adapter)) - READ_AND_CONFIG(8188E,_RadioA_1T_ICUT); - else - READ_AND_CONFIG(8188E,_RadioA_1T); - } + if(eRFPath == ODM_RF_PATH_A) + READ_AND_CONFIG_MP(8188E,_RadioA); } else if(ConfigType == CONFIG_RF_TXPWR_LMT) { - READ_AND_CONFIG(8188E,_TXPWR_LMT); + READ_AND_CONFIG_MP(8188E,_TXPWR_LMT); } } #endif @@ -1859,18 +1818,18 @@ ODM_ConfigRFWithHeaderFile( if(ConfigType == CONFIG_RF_RADIO) { if(eRFPath == ODM_RF_PATH_A) { - READ_AND_CONFIG(8821A,_RadioA); + READ_AND_CONFIG_MP(8821A,_RadioA); } } else if(ConfigType == CONFIG_RF_TXPWR_LMT) { if (pDM_Odm->SupportInterface == ODM_ITRF_USB) { if (pDM_Odm->ExtPA5G || pDM_Odm->ExtLNA5G) - READ_AND_CONFIG(8821A,_TXPWR_LMT_8811AU_FEM); + READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8811AU_FEM); else - READ_AND_CONFIG(8821A,_TXPWR_LMT_8811AU_IPA); + READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8811AU_IPA); } else { - READ_AND_CONFIG(8821A,_TXPWR_LMT_8821A); + READ_AND_CONFIG_MP(8821A,_TXPWR_LMT_8821A); } } ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("<===8821_ODM_ConfigRFWithHeaderFile\n")); @@ -1894,18 +1853,18 @@ ODM_ConfigRFWithHeaderFile( { if(ConfigType == CONFIG_RF_RADIO) { if(eRFPath == ODM_RF_PATH_A) - READ_AND_CONFIG(8192E,_RadioA); + READ_AND_CONFIG_MP(8192E,_RadioA); else if(eRFPath == ODM_RF_PATH_B) - READ_AND_CONFIG(8192E,_RadioB); + READ_AND_CONFIG_MP(8192E,_RadioB); } else if(ConfigType == CONFIG_RF_TXPWR_LMT) { - READ_AND_CONFIG(8192E,_TXPWR_LMT); + READ_AND_CONFIG_MP(8192E,_TXPWR_LMT); } } #endif -#if (RTL8813A_SUPPORT == 1) - if (pDM_Odm->SupportICType == ODM_RTL8813A) +#if (RTL8814A_SUPPORT == 1) + if (pDM_Odm->SupportICType == ODM_RTL8814A) { /* if(ConfigType == CONFIG_RF_TXPWR_LMT) { @@ -1936,11 +1895,11 @@ ODM_ConfigRFWithTxPwrTrackHeaderFile( else if(pDM_Odm->SupportICType == ODM_RTL8821) { if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) - READ_AND_CONFIG(8821A,_TxPowerTrack_PCIE); + READ_AND_CONFIG_MP(8821A,_TxPowerTrack_PCIE); else if (pDM_Odm->SupportInterface == ODM_ITRF_USB) - READ_AND_CONFIG(8821A,_TxPowerTrack_USB); + READ_AND_CONFIG_MP(8821A,_TxPowerTrack_USB); else - READ_AND_CONFIG(8821A,_TxPowerTrack_PCIE); + READ_AND_CONFIG_MP(8821A,_TxPowerTrack_PCIE); } #endif #if (RTL8812A_SUPPORT == 1) @@ -1961,9 +1920,9 @@ ODM_ConfigRFWithTxPwrTrackHeaderFile( else if(pDM_Odm->SupportICType == ODM_RTL8192E) { if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) - READ_AND_CONFIG(8192E,_TxPowerTrack_PCIE); + READ_AND_CONFIG_MP(8192E,_TxPowerTrack_PCIE); else if (pDM_Odm->SupportInterface == ODM_ITRF_USB) - READ_AND_CONFIG(8192E,_TxPowerTrack_USB); + READ_AND_CONFIG_MP(8192E,_TxPowerTrack_USB); } #endif #if RTL8723B_SUPPORT @@ -1981,11 +1940,11 @@ ODM_ConfigRFWithTxPwrTrackHeaderFile( else if(pDM_Odm->SupportICType == ODM_RTL8188E) { if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) - READ_AND_CONFIG(8188E,_TxPowerTrack_PCIE); + READ_AND_CONFIG_MP(8188E,_TxPowerTrack_PCIE); else if (pDM_Odm->SupportInterface == ODM_ITRF_USB) - READ_AND_CONFIG(8188E,_TxPowerTrack_USB); + READ_AND_CONFIG_MP(8188E,_TxPowerTrack_USB); else - READ_AND_CONFIG(8188E,_TxPowerTrack_PCIE); + READ_AND_CONFIG_MP(8188E,_TxPowerTrack_PCIE); } #endif @@ -2016,11 +1975,11 @@ ODM_ConfigBBWithHeaderFile( { if(ConfigType == CONFIG_BB_PHY_REG) { - READ_AND_CONFIG_MP(8723A,_PHY_REG_1T); + READ_AND_CONFIG_MP(8723A,_PHY_REG); } else if(ConfigType == CONFIG_BB_AGC_TAB) { - READ_AND_CONFIG_MP(8723A,_AGC_TAB_1T); + READ_AND_CONFIG_MP(8723A,_AGC_TAB); } } #endif @@ -2030,21 +1989,15 @@ ODM_ConfigBBWithHeaderFile( { if(ConfigType == CONFIG_BB_PHY_REG) { - if(IS_VENDOR_8188E_I_CUT_SERIES(Adapter)) - READ_AND_CONFIG(8188E,_PHY_REG_1T_ICUT); - else - READ_AND_CONFIG(8188E,_PHY_REG_1T); + READ_AND_CONFIG_MP(8188E,_PHY_REG); } else if(ConfigType == CONFIG_BB_AGC_TAB) { - if(IS_VENDOR_8188E_I_CUT_SERIES(Adapter)) - READ_AND_CONFIG(8188E,_AGC_TAB_1T_ICUT); - else - READ_AND_CONFIG(8188E,_AGC_TAB_1T); + READ_AND_CONFIG_MP(8188E,_AGC_TAB); } else if(ConfigType == CONFIG_BB_PHY_REG_PG) { - READ_AND_CONFIG(8188E,_PHY_REG_PG); + READ_AND_CONFIG_MP(8188E,_PHY_REG_PG); } } #endif @@ -2090,15 +2043,15 @@ ODM_ConfigBBWithHeaderFile( { if(ConfigType == CONFIG_BB_PHY_REG) { - READ_AND_CONFIG(8821A,_PHY_REG); + READ_AND_CONFIG_MP(8821A,_PHY_REG); } else if(ConfigType == CONFIG_BB_AGC_TAB) { - READ_AND_CONFIG(8821A,_AGC_TAB); + READ_AND_CONFIG_MP(8821A,_AGC_TAB); } else if(ConfigType == CONFIG_BB_PHY_REG_PG) { - READ_AND_CONFIG(8821A,_PHY_REG_PG); + READ_AND_CONFIG_MP(8821A,_PHY_REG_PG); } } #endif @@ -2126,20 +2079,20 @@ ODM_ConfigBBWithHeaderFile( if(ConfigType == CONFIG_BB_PHY_REG) { - READ_AND_CONFIG(8192E,_PHY_REG); + READ_AND_CONFIG_MP(8192E,_PHY_REG); } else if(ConfigType == CONFIG_BB_AGC_TAB) { - READ_AND_CONFIG(8192E,_AGC_TAB); + READ_AND_CONFIG_MP(8192E,_AGC_TAB); } else if(ConfigType == CONFIG_BB_PHY_REG_PG) { - READ_AND_CONFIG(8192E,_PHY_REG_PG); + READ_AND_CONFIG_MP(8192E,_PHY_REG_PG); } } #endif -#if (RTL8813A_SUPPORT == 1) - if(pDM_Odm->SupportICType == ODM_RTL8813A) +#if (RTL8814A_SUPPORT == 1) + if(pDM_Odm->SupportICType == ODM_RTL8814A) { if(ConfigType == CONFIG_BB_PHY_REG) @@ -2184,10 +2137,7 @@ ODM_ConfigMACWithHeaderFile( #if (RTL8188E_SUPPORT == 1) if (pDM_Odm->SupportICType == ODM_RTL8188E) { - if(IS_VENDOR_8188E_I_CUT_SERIES(Adapter)) - result = READ_AND_CONFIG(8188E,_MAC_REG_ICUT); - else - result = READ_AND_CONFIG(8188E,_MAC_REG); + READ_AND_CONFIG_MP(8188E,_MAC_REG); } #endif #if (RTL8812A_SUPPORT == 1) @@ -2199,7 +2149,7 @@ ODM_ConfigMACWithHeaderFile( #if (RTL8821A_SUPPORT == 1) if (pDM_Odm->SupportICType == ODM_RTL8821) { - READ_AND_CONFIG(8821A,_MAC_REG); + READ_AND_CONFIG_MP(8821A,_MAC_REG); ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("<===8821_ODM_ConfigMACwithHeaderFile\n")); } @@ -2213,7 +2163,7 @@ ODM_ConfigMACWithHeaderFile( #if (RTL8192E_SUPPORT == 1) if (pDM_Odm->SupportICType == ODM_RTL8192E) { - READ_AND_CONFIG(8192E,_MAC_REG); + READ_AND_CONFIG_MP(8192E,_MAC_REG); } #endif @@ -2234,19 +2184,19 @@ ODM_ConfigFWWithHeaderFile( { if (ConfigType == CONFIG_FW_NIC) { - READ_FIRMWARE(8188E,_FW_NIC_T); + READ_FIRMWARE_MP(8188E,_FW_NIC_T); } else if (ConfigType == CONFIG_FW_WoWLAN) { - READ_FIRMWARE(8188E,_FW_WoWLAN_T); + READ_FIRMWARE_MP(8188E,_FW_WoWLAN_T); } else if(ConfigType == CONFIG_FW_NIC_2) { - READ_FIRMWARE(8188E,_FW_NIC_S); + READ_FIRMWARE_MP(8188E,_FW_NIC_S); } else if (ConfigType == CONFIG_FW_WoWLAN_2) { - READ_FIRMWARE(8188E,_FW_WoWLAN_S); + READ_FIRMWARE_MP(8188E,_FW_WoWLAN_S); } } #endif @@ -2304,7 +2254,7 @@ ODM_ConfigFWWithHeaderFile( } else if (ConfigType == CONFIG_FW_WoWLAN) { - READ_FIRMWARE(8821A,_FW_WoWLAN); + READ_FIRMWARE_MP(8821A,_FW_WoWLAN); } else if (ConfigType == CONFIG_FW_BT) { @@ -2317,16 +2267,16 @@ ODM_ConfigFWWithHeaderFile( { if (ConfigType == CONFIG_FW_NIC) { - READ_FIRMWARE(8192E,_FW_NIC); + READ_FIRMWARE_MP(8192E,_FW_NIC); } else if (ConfigType == CONFIG_FW_WoWLAN) { - READ_FIRMWARE(8192E,_FW_WoWLAN); + READ_FIRMWARE_MP(8192E,_FW_WoWLAN); } #ifdef CONFIG_AP_WOWLAN else if (ConfigType == CONFIG_FW_AP_WoWLAN) { - READ_FIRMWARE(8192E,_FW_AP_WoWLAN); + READ_FIRMWARE_MP(8192E,_FW_AP_WoWLAN); } #endif @@ -2341,13 +2291,34 @@ ODM_GetHWImgVersion( IN PDM_ODM_T pDM_Odm ) { + u4Byte Version=0; + +#if (RTL8723A_SUPPORT == 1) + if (pDM_Odm->SupportICType == ODM_RTL8723A) + Version = GET_VERSION_MP(8723A,_MAC_REG); +#endif + +#if (RTL8188E_SUPPORT == 1) + if (pDM_Odm->SupportICType == ODM_RTL8188E) + Version = GET_VERSION_MP(8188E,_MAC_REG); +#endif + +#if (RTL8821A_SUPPORT == 1) + if (pDM_Odm->SupportICType == ODM_RTL8821) + Version = GET_VERSION_MP(8821A,_MAC_REG); +#endif + +#if (RTL8192E_SUPPORT == 1) + if (pDM_Odm->SupportICType == ODM_RTL8192E) + Version = GET_VERSION_MP(8192E,_MAC_REG); +#endif #if (RTL8812A_SUPPORT == 1) if (pDM_Odm->SupportICType == ODM_RTL8812) - return GET_VERSION_MP(8812A,_MAC_REG); + Version = GET_VERSION_MP(8812A,_MAC_REG); #endif - return 0; + return Version; } diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_HWConfig.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_HWConfig.h old mode 100644 new mode 100755 index 16a26f6da780..da0e5fc1cfce --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_HWConfig.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_HWConfig.h @@ -24,7 +24,7 @@ /*--------------------------Define -------------------------------------------*/ -#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) +//#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) #define AGC_DIFF_CONFIG_MP(ic, band) (ODM_ReadAndConfig_MP_##ic##_AGC_TAB_DIFF(pDM_Odm, Array_MP_##ic##_AGC_TAB_DIFF_##band, \ sizeof(Array_MP_##ic##_AGC_TAB_DIFF_##band)/sizeof(u4Byte))) #define AGC_DIFF_CONFIG_TC(ic, band) (ODM_ReadAndConfig_TC_##ic##_AGC_TAB_DIFF(pDM_Odm, Array_TC_##ic##_AGC_TAB_DIFF_##band, \ @@ -225,6 +225,12 @@ ODM_GetHWImgVersion( IN PDM_ODM_T pDM_Odm ); +s4Byte +odm_SignalScaleMapping( + IN OUT PDM_ODM_T pDM_Odm, + IN s4Byte CurrSig + ); + #endif #endif diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_NoiseMonitor.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_NoiseMonitor.c new file mode 100755 index 000000000000..cda06bdaac84 --- /dev/null +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_NoiseMonitor.c @@ -0,0 +1,197 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +//============================================================ +// include files +//============================================================ +//#include "Mp_Precomp.h" +#include "odm_precomp.h" + +//================================================= +// This function is for inband noise test utility only +// To obtain the inband noise level(dbm), do the following. +// 1. disable DIG and Power Saving +// 2. Set initial gain = 0x1a +// 3. Stop updating idle time pwer report (for driver read) +// - 0x80c[25] +// +//================================================= + +#define Valid_Min -35 +#define Valid_Max 10 +#define ValidCnt 5 + +s2Byte odm_InbandNoise_Monitor_NSeries(PDM_ODM_T pDM_Odm,u8 bPauseDIG,u8 IGIValue,u32 max_time) +{ + u4Byte tmp4b; + u1Byte max_rf_path=0,rf_path; + u1Byte reg_c50, reg_c58,valid_done=0; + struct noise_level noise_data; + u32 start = 0, func_start=0, func_end = 0; + + func_start = ODM_GetCurrentTime(pDM_Odm); + pDM_Odm->noise_level.noise_all = 0; + + if((pDM_Odm->RFType == ODM_1T2R) ||(pDM_Odm->RFType == ODM_2T2R)) + max_rf_path = 2; + else + max_rf_path = 1; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("odm_DebugControlInbandNoise_Nseries() ==> \n")); + + ODM_Memory_Set(pDM_Odm,&noise_data,0,sizeof(struct noise_level)); + + // + // Step 1. Disable DIG && Set initial gain. + // + + if(bPauseDIG) + { + odm_PauseDIG(pDM_Odm,ODM_PAUSE_DIG,IGIValue); + } + // + // Step 2. Disable all power save for read registers + // + //dcmd_DebugControlPowerSave(pAdapter, PSDisable); + + // + // Step 3. Get noise power level + // + start = ODM_GetCurrentTime(pDM_Odm); + while(1) + { + + //Stop updating idle time pwer report (for driver read) + ODM_SetBBReg(pDM_Odm, rFPGA0_TxGainStage, BIT25, 1); + + //Read Noise Floor Report + tmp4b = ODM_GetBBReg(pDM_Odm, 0x8f8,bMaskDWord ); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("Noise Floor Report (0x8f8) = 0x%08x\n", tmp4b)); + + //ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, TestInitialGain); + //if(max_rf_path == 2) + // ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, TestInitialGain); + + //update idle time pwer report per 5us + ODM_SetBBReg(pDM_Odm, rFPGA0_TxGainStage, BIT25, 0); + + noise_data.value[ODM_RF_PATH_A] = (u1Byte)(tmp4b&0xff); + noise_data.value[ODM_RF_PATH_B] = (u1Byte)((tmp4b&0xff00)>>8); + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("value_a = 0x%x(%d), value_b = 0x%x(%d)\n", + noise_data.value[ODM_RF_PATH_A], noise_data.value[ODM_RF_PATH_A], noise_data.value[ODM_RF_PATH_B], noise_data.value[ODM_RF_PATH_B])); + + for(rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++) + { + noise_data.sval[rf_path] = (s1Byte)noise_data.value[rf_path]; + noise_data.sval[rf_path] /= 2; + } + + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("sval_a = %d, sval_b = %d\n", + noise_data.sval[ODM_RF_PATH_A], noise_data.sval[ODM_RF_PATH_B])); + //ODM_delay_ms(10); + //ODM_sleep_ms(10); + + for(rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++) + { + if( (noise_data.valid_cnt[rf_path] < ValidCnt) && (noise_data.sval[rf_path] < Valid_Max && noise_data.sval[rf_path] >= Valid_Min)) + { + noise_data.valid_cnt[rf_path]++; + noise_data.sum[rf_path] += noise_data.sval[rf_path]; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("RF_Path:%d Valid sval = %d\n", rf_path,noise_data.sval[rf_path])); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("Sum of sval = %d, \n", noise_data.sum[rf_path])); + if(noise_data.valid_cnt[rf_path] == ValidCnt) + { + valid_done++; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("After divided, RF_Path:%d ,sum = %d \n", rf_path,noise_data.sum[rf_path])); + } + + } + + } + + //printk("####### valid_done:%d #############\n",valid_done); + if ((valid_done==max_rf_path) || (ODM_GetProgressingTime(pDM_Odm,start) > max_time)) + { + for(rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++) + { + //printk("%s PATH_%d - sum = %d, valid_cnt = %d \n",__FUNCTION__,rf_path,noise_data.sum[rf_path], noise_data.valid_cnt[rf_path]); + if(noise_data.valid_cnt[rf_path]) + noise_data.sum[rf_path] /= noise_data.valid_cnt[rf_path]; + else + noise_data.sum[rf_path] = 0; + } + break; + } + } + reg_c50 = (s4Byte)ODM_GetBBReg(pDM_Odm,rOFDM0_XAAGCCore1,bMaskByte0); + reg_c50 &= ~BIT7; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("0x%x = 0x%02x(%d)\n", rOFDM0_XAAGCCore1, reg_c50, reg_c50)); + pDM_Odm->noise_level.noise[ODM_RF_PATH_A] = -110 + reg_c50 + noise_data.sum[ODM_RF_PATH_A]; + pDM_Odm->noise_level.noise_all += pDM_Odm->noise_level.noise[ODM_RF_PATH_A]; + + if(max_rf_path == 2){ + reg_c58 = (s4Byte)ODM_GetBBReg(pDM_Odm,rOFDM0_XBAGCCore1,bMaskByte0); + reg_c58 &= ~BIT7; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("0x%x = 0x%02x(%d)\n", rOFDM0_XBAGCCore1, reg_c58, reg_c58)); + pDM_Odm->noise_level.noise[ODM_RF_PATH_B] = -110 + reg_c58 + noise_data.sum[ODM_RF_PATH_B]; + pDM_Odm->noise_level.noise_all += pDM_Odm->noise_level.noise[ODM_RF_PATH_B]; + } + pDM_Odm->noise_level.noise_all /= max_rf_path; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("noise_a = %d, noise_b = %d\n", + pDM_Odm->noise_level.noise[ODM_RF_PATH_A], + pDM_Odm->noise_level.noise[ODM_RF_PATH_B])); + + // + // Step 4. Recover the Dig + // + if(bPauseDIG) + { + odm_PauseDIG(pDM_Odm,ODM_RESUME_DIG,IGIValue); + } + func_end = ODM_GetProgressingTime(pDM_Odm,func_start) ; + //printk("%s noise_a = %d, noise_b = %d noise_all:%d (%d ms)\n",__FUNCTION__, + // pDM_Odm->noise_level.noise[ODM_RF_PATH_A], + // pDM_Odm->noise_level.noise[ODM_RF_PATH_B], + // pDM_Odm->noise_level.noise_all,func_end); + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("odm_DebugControlInbandNoise_Nseries() <== \n")); + return pDM_Odm->noise_level.noise_all; + +} +s2Byte ODM_InbandNoise_Monitor(PVOID pDM_VOID,u8 bPauseDIG,u8 IGIValue,u32 max_time) +{ + + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES ) + { + //odm_InbandNoise_Monitor_JaguarSeries(pDM_Odm,bPauseDIG,IGIValue,max_time); + return 0; + } + else + { + return odm_InbandNoise_Monitor_NSeries(pDM_VOID,bPauseDIG,IGIValue,max_time); + } +} + + + diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_NoiseMonitor.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_NoiseMonitor.h new file mode 100755 index 000000000000..6625be61633a --- /dev/null +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_NoiseMonitor.h @@ -0,0 +1,49 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + *****************************************************************************/ +#ifndef __ODMNOISEMONITOR_H__ +#define __ODMNOISEMONITOR_H__ + +#define ODM_MAX_CHANNEL_NUM 38//14+24 +struct noise_level +{ + //u1Byte value_a, value_b; + u1Byte value[MAX_RF_PATH]; + //s1Byte sval_a, sval_b; + s1Byte sval[MAX_RF_PATH]; + + //s4Byte noise_a=0, noise_b=0,sum_a=0, sum_b=0; + //s4Byte noise[ODM_RF_PATH_MAX]; + s4Byte sum[MAX_RF_PATH]; + //u1Byte valid_cnt_a=0, valid_cnt_b=0, + u1Byte valid[MAX_RF_PATH]; + u1Byte valid_cnt[MAX_RF_PATH]; + +}; + + +typedef struct _ODM_NOISE_MONITOR_ +{ + s1Byte noise[MAX_RF_PATH]; + s2Byte noise_all; +}ODM_NOISE_MONITOR; + +s2Byte ODM_InbandNoise_Monitor(PVOID pDM_VOID,u8 bPauseDIG,u8 IGIValue,u32 max_time); + +#endif diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_PathDiv.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_PathDiv.c new file mode 100755 index 000000000000..f24e3c465c07 --- /dev/null +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_PathDiv.c @@ -0,0 +1,1580 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +//============================================================ +// include files +//============================================================ +#include "odm_precomp.h" + + + +VOID +odm_PathDiversityInit( + IN PVOID pDM_VOID +) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + if(!(pDM_Odm->SupportAbility & ODM_BB_PATH_DIV)) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_PATH_DIV,ODM_DBG_LOUD,("Return: Not Support PathDiv\n")); + return; + } + +#if RTL8812A_SUPPORT + + if(pDM_Odm->SupportICType & ODM_RTL8812) + ODM_PathDiversityInit_8812A(pDM_Odm); +#endif +#endif +} + +#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) +VOID +odm_PathDiversity( + IN PVOID pDM_VOID +) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + if(!(pDM_Odm->SupportAbility & ODM_BB_PATH_DIV)) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_PATH_DIV,ODM_DBG_LOUD,("Return: Not Support PathDiv\n")); + return; + } + +#if RTL8812A_SUPPORT + + if(pDM_Odm->SupportICType & ODM_RTL8812) + ODM_PathDiversity_8812A(pDM_Odm); +#endif +} +#endif //(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) + + + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +// +// 2011/12/02 MH Copy from MP oursrc for temporarily test. +// + +BOOLEAN +odm_IsConnected_92C( + IN PADAPTER Adapter +) +{ + PRT_WLAN_STA pEntry; + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + u4Byte i; + BOOLEAN bConnected=FALSE; + + if(pMgntInfo->mAssoc) + { + bConnected = TRUE; + } + else + { + for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) + { + if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) + pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); + else + pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); + + if(pEntry!=NULL) + { + if(pEntry->bAssociated) + { + bConnected = TRUE; + break; + } + } + else + { + break; + } + } + } + return bConnected; +} + +BOOLEAN +ODM_PathDiversityBeforeLink92C( + //IN PADAPTER Adapter + IN PDM_ODM_T pDM_Odm + ) +{ +#if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE* pHalData = NULL; + PMGNT_INFO pMgntInfo = NULL; + //pSWAT_T pDM_SWAT_Table = &Adapter->DM_SWAT_Table; + pPD_T pDM_PDTable = NULL; + + s1Byte Score = 0; + PRT_WLAN_BSS pTmpBssDesc; + PRT_WLAN_BSS pTestBssDesc; + + u1Byte target_chnl = 0; + u1Byte index; + + if (pDM_Odm->Adapter == NULL) //For BSOD when plug/unplug fast. //By YJ,120413 + { // The ODM structure is not initialized. + return FALSE; + } + pHalData = GET_HAL_DATA(Adapter); + pMgntInfo = &Adapter->MgntInfo; + pDM_PDTable = &Adapter->DM_PDTable; + + // Condition that does not need to use path diversity. + if((!IS_92C_SERIAL(pHalData->VersionID)) || (pHalData->PathDivCfg!=1) || pMgntInfo->AntennaTest ) + { + RT_TRACE(COMP_INIT, DBG_LOUD, + ("ODM_PathDiversityBeforeLink92C(): No PathDiv Mechanism before link.\n")); + return FALSE; + } + + // Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF. + PlatformAcquireSpinLock(Adapter, RT_RF_STATE_SPINLOCK); + if(pHalData->eRFPowerState!=eRfOn || pMgntInfo->RFChangeInProgress || pMgntInfo->bMediaConnect) + { + PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); + + RT_TRACE(COMP_INIT, DBG_LOUD, + ("ODM_PathDiversityBeforeLink92C(): RFChangeInProgress(%x), eRFPowerState(%x)\n", + pMgntInfo->RFChangeInProgress, + pHalData->eRFPowerState)); + + //pDM_SWAT_Table->SWAS_NoLink_State = 0; + pDM_PDTable->PathDiv_NoLink_State = 0; + + return FALSE; + } + else + { + PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK); + } + + //1 Run AntDiv mechanism "Before Link" part. + //if(pDM_SWAT_Table->SWAS_NoLink_State == 0) + if(pDM_PDTable->PathDiv_NoLink_State == 0) + { + //1 Prepare to do Scan again to check current antenna state. + + // Set check state to next step. + //pDM_SWAT_Table->SWAS_NoLink_State = 1; + pDM_PDTable->PathDiv_NoLink_State = 1; + + // Copy Current Scan list. + Adapter->MgntInfo.tmpNumBssDesc = pMgntInfo->NumBssDesc; + PlatformMoveMemory((PVOID)Adapter->MgntInfo.tmpbssDesc, (PVOID)pMgntInfo->bssDesc, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC); + + // Switch Antenna to another one. + if(pDM_PDTable->DefaultRespPath == 0) + { + PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x05); // TRX path = PathB + odm_SetRespPath_92C(Adapter, 1); + pDM_PDTable->OFDMTXPath = 0xFFFFFFFF; + pDM_PDTable->CCKTXPath = 0xFFFFFFFF; + } + else + { + PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x00); // TRX path = PathA + odm_SetRespPath_92C(Adapter, 0); + pDM_PDTable->OFDMTXPath = 0x0; + pDM_PDTable->CCKTXPath = 0x0; + } +#if 0 + + pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; + pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==Antenna_A)?Antenna_B:Antenna_A; + + RT_TRACE(COMP_INIT, DBG_LOUD, + ("ODM_SwAntDivCheckBeforeLink: Change to Ant(%s) for testing.\n", (pDM_SWAT_Table->CurAntenna==Antenna_A)?"A":"B")); + //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna); + pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); + PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); +#endif + + // Go back to scan function again. + RT_TRACE(COMP_INIT, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C: Scan one more time\n")); + pMgntInfo->ScanStep=0; + target_chnl = odm_SwAntDivSelectScanChnl(Adapter); + odm_SwAntDivConstructScanChnl(Adapter, target_chnl); + PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5); + + return TRUE; + } + else + { + //1 ScanComple() is called after antenna swiched. + //1 Check scan result and determine which antenna is going + //1 to be used. + + for(index=0; indexMgntInfo.tmpNumBssDesc; index++) + { + pTmpBssDesc = &(Adapter->MgntInfo.tmpbssDesc[index]); + pTestBssDesc = &(pMgntInfo->bssDesc[index]); + + if(PlatformCompareMemory(pTestBssDesc->bdBssIdBuf, pTmpBssDesc->bdBssIdBuf, 6)!=0) + { + RT_TRACE(COMP_INIT, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C(): ERROR!! This shall not happen.\n")); + continue; + } + + if(pTmpBssDesc->RecvSignalPower > pTestBssDesc->RecvSignalPower) + { + RT_TRACE(COMP_INIT, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C: Compare scan entry: Score++\n")); + RT_PRINT_STR(COMP_INIT, DBG_LOUD, "SSID: ", pTestBssDesc->bdSsIdBuf, pTestBssDesc->bdSsIdLen); + RT_TRACE(COMP_INIT, DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); + + Score++; + PlatformMoveMemory(pTestBssDesc, pTmpBssDesc, sizeof(RT_WLAN_BSS)); + } + else if(pTmpBssDesc->RecvSignalPower < pTestBssDesc->RecvSignalPower) + { + RT_TRACE(COMP_INIT, DBG_LOUD, ("ODM_PathDiversityBeforeLink92C: Compare scan entry: Score--\n")); + RT_PRINT_STR(COMP_INIT, DBG_LOUD, "SSID: ", pTestBssDesc->bdSsIdBuf, pTestBssDesc->bdSsIdLen); + RT_TRACE(COMP_INIT, DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower)); + Score--; + } + + } + + if(pMgntInfo->NumBssDesc!=0 && Score<=0) + { + RT_TRACE(COMP_INIT, DBG_LOUD, + ("ODM_PathDiversityBeforeLink92C(): DefaultRespPath=%d\n", pDM_PDTable->DefaultRespPath)); + + //pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; + } + else + { + RT_TRACE(COMP_INIT, DBG_LOUD, + ("ODM_PathDiversityBeforeLink92C(): DefaultRespPath=%d\n", pDM_PDTable->DefaultRespPath)); + + if(pDM_PDTable->DefaultRespPath == 0) + { + pDM_PDTable->OFDMTXPath = 0xFFFFFFFF; + pDM_PDTable->CCKTXPath = 0xFFFFFFFF; + odm_SetRespPath_92C(Adapter, 1); + } + else + { + pDM_PDTable->OFDMTXPath = 0x0; + pDM_PDTable->CCKTXPath = 0x0; + odm_SetRespPath_92C(Adapter, 0); + } + PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x01); // RX path = PathAB + + //pDM_SWAT_Table->CurAntenna = pDM_SWAT_Table->PreAntenna; + + //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna); + //pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8)); + //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860); + } + + // Check state reset to default and wait for next time. + //pDM_SWAT_Table->SWAS_NoLink_State = 0; + pDM_PDTable->PathDiv_NoLink_State = 0; + + return FALSE; + } +#else + return FALSE; +#endif + +} + + + +VOID +odm_PathDiversityAfterLink_92C( + IN PADAPTER Adapter +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + pPD_T pDM_PDTable = &Adapter->DM_PDTable; + u1Byte DefaultRespPath=0; + + if((!IS_92C_SERIAL(pHalData->VersionID)) || (pHalData->PathDivCfg != 1) || (pHalData->eRFPowerState == eRfOff)) + { + if(pHalData->PathDivCfg == 0) + { + RT_TRACE( COMP_INIT, DBG_LOUD, ("No ODM_TXPathDiversity()\n")); + } + else + { + RT_TRACE( COMP_INIT, DBG_LOUD, ("2T ODM_TXPathDiversity()\n")); + } + return; + } + if(!odm_IsConnected_92C(Adapter)) + { + RT_TRACE( COMP_INIT, DBG_LOUD, ("ODM_TXPathDiversity(): No Connections\n")); + return; + } + + + if(pDM_PDTable->TrainingState == 0) + { + RT_TRACE( COMP_INIT, DBG_LOUD, ("ODM_TXPathDiversity() ==>\n")); + odm_OFDMTXPathDiversity_92C(Adapter); + + if((pDM_PDTable->CCKPathDivEnable == TRUE) && (pDM_PDTable->OFDM_Pkt_Cnt < 100)) + { + //RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: TrainingState=0\n")); + + if(pDM_PDTable->CCK_Pkt_Cnt > 300) + pDM_PDTable->Timer = 20; + else if(pDM_PDTable->CCK_Pkt_Cnt > 100) + pDM_PDTable->Timer = 60; + else + pDM_PDTable->Timer = 250; + RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: timer=%d\n",pDM_PDTable->Timer)); + + PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x00); // RX path = PathA + pDM_PDTable->TrainingState = 1; + pHalData->RSSI_test = TRUE; + ODM_SetTimer( pDM_Odm, &pDM_Odm->CCKPathDiversityTimer, pDM_PDTable->Timer); //ms + } + else + { + pDM_PDTable->CCKTXPath = pDM_PDTable->OFDMTXPath; + DefaultRespPath = pDM_PDTable->OFDMDefaultRespPath; + RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_SetRespPath_92C: Skip odm_CCKTXPathDiversity_92C, DefaultRespPath is OFDM\n")); + odm_SetRespPath_92C(Adapter, DefaultRespPath); + odm_ResetPathDiversity_92C(Adapter); + RT_TRACE( COMP_INIT, DBG_LOUD, ("ODM_TXPathDiversity() <==\n")); + } + } + else if(pDM_PDTable->TrainingState == 1) + { + //RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: TrainingState=1\n")); + PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x05); // RX path = PathB + pDM_PDTable->TrainingState = 2; + ODM_SetTimer( pDM_Odm, &pDM_Odm->CCKPathDiversityTimer, pDM_PDTable->Timer); //ms + } + else + { + //RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: TrainingState=2\n")); + pDM_PDTable->TrainingState = 0; + odm_CCKTXPathDiversity_92C(Adapter); + if(pDM_PDTable->OFDM_Pkt_Cnt != 0) + { + DefaultRespPath = pDM_PDTable->OFDMDefaultRespPath; + RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_SetRespPath_92C: DefaultRespPath is OFDM\n")); + } + else + { + DefaultRespPath = pDM_PDTable->CCKDefaultRespPath; + RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_SetRespPath_92C: DefaultRespPath is CCK\n")); + } + odm_SetRespPath_92C(Adapter, DefaultRespPath); + odm_ResetPathDiversity_92C(Adapter); + RT_TRACE( COMP_INIT, DBG_LOUD, ("ODM_TXPathDiversity() <==\n")); + } + +} + +VOID +odm_SetRespPath_92C( + IN PADAPTER Adapter, + IN u1Byte DefaultRespPath + ) +{ + pPD_T pDM_PDTable = &Adapter->DM_PDTable; + + RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_SetRespPath_92C: Select Response Path=%d\n",DefaultRespPath)); + if(DefaultRespPath != pDM_PDTable->DefaultRespPath) + { + if(DefaultRespPath == 0) + { + PlatformEFIOWrite1Byte(Adapter, 0x6D8, (PlatformEFIORead1Byte(Adapter, 0x6D8)&0xc0)|0x15); + } + else + { + PlatformEFIOWrite1Byte(Adapter, 0x6D8, (PlatformEFIORead1Byte(Adapter, 0x6D8)&0xc0)|0x2A); + } + } + pDM_PDTable->DefaultRespPath = DefaultRespPath; +} + +VOID +odm_OFDMTXPathDiversity_92C( + IN PADAPTER Adapter) +{ +// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + PRT_WLAN_STA pEntry; + u1Byte i, DefaultRespPath = 0; + s4Byte MinRSSI = 0xFF; + pPD_T pDM_PDTable = &Adapter->DM_PDTable; + pDM_PDTable->OFDMTXPath = 0; + + //1 Default Port + if(pMgntInfo->mAssoc) + { + RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: Default port RSSI[0]=%d, RSSI[1]=%d\n", + Adapter->RxStats.RxRSSIPercentage[0], Adapter->RxStats.RxRSSIPercentage[1])); + if(Adapter->RxStats.RxRSSIPercentage[0] > Adapter->RxStats.RxRSSIPercentage[1]) + { + pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath & (~BIT0); + MinRSSI = Adapter->RxStats.RxRSSIPercentage[1]; + DefaultRespPath = 0; + RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: Default port Select Path-0\n")); + } + else + { + pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath | BIT0; + MinRSSI = Adapter->RxStats.RxRSSIPercentage[0]; + DefaultRespPath = 1; + RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: Default port Select Path-1\n")); + } + //RT_TRACE( COMP_INIT, DBG_LOUD, ("pDM_PDTable->OFDMTXPath =0x%x\n",pDM_PDTable->OFDMTXPath)); + } + //1 Extension Port + for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) + { + if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) + pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); + else + pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); + + if(pEntry!=NULL) + { + if(pEntry->bAssociated) + { + RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: MACID=%d, RSSI_0=%d, RSSI_1=%d\n", + pEntry->AssociatedMacId, pEntry->rssi_stat.RxRSSIPercentage[0], pEntry->rssi_stat.RxRSSIPercentage[1])); + + if(pEntry->rssi_stat.RxRSSIPercentage[0] > pEntry->rssi_stat.RxRSSIPercentage[1]) + { + pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath & ~(BIT(pEntry->AssociatedMacId)); + //pHalData->TXPath = pHalData->TXPath & ~(1<<(pEntry->AssociatedMacId)); + RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: MACID=%d Select Path-0\n", pEntry->AssociatedMacId)); + if(pEntry->rssi_stat.RxRSSIPercentage[1] < MinRSSI) + { + MinRSSI = pEntry->rssi_stat.RxRSSIPercentage[1]; + DefaultRespPath = 0; + } + } + else + { + pDM_PDTable->OFDMTXPath = pDM_PDTable->OFDMTXPath | BIT(pEntry->AssociatedMacId); + //pHalData->TXPath = pHalData->TXPath | (1 << (pEntry->AssociatedMacId)); + RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_OFDMTXPathDiversity_92C: MACID=%d Select Path-1\n", pEntry->AssociatedMacId)); + if(pEntry->rssi_stat.RxRSSIPercentage[0] < MinRSSI) + { + MinRSSI = pEntry->rssi_stat.RxRSSIPercentage[0]; + DefaultRespPath = 1; + } + } + } + } + else + { + break; + } + } + + pDM_PDTable->OFDMDefaultRespPath = DefaultRespPath; +} + + +VOID +odm_CCKTXPathDiversity_92C( + IN PADAPTER Adapter +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + PRT_WLAN_STA pEntry; + s4Byte MinRSSI = 0xFF; + u1Byte i, DefaultRespPath = 0; +// BOOLEAN bBModePathDiv = FALSE; + pPD_T pDM_PDTable = &Adapter->DM_PDTable; + + //1 Default Port + if(pMgntInfo->mAssoc) + { + if(pHalData->OFDM_Pkt_Cnt == 0) + { + for(i=0; i<2; i++) + { + if(pDM_PDTable->RSSI_CCK_Path_cnt[i] > 1) //Because the first packet is discarded + pDM_PDTable->RSSI_CCK_Path[i] = pDM_PDTable->RSSI_CCK_Path[i] / (pDM_PDTable->RSSI_CCK_Path_cnt[i]-1); + else + pDM_PDTable->RSSI_CCK_Path[i] = 0; + } + RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: pDM_PDTable->RSSI_CCK_Path[0]=%d, pDM_PDTable->RSSI_CCK_Path[1]=%d\n", + pDM_PDTable->RSSI_CCK_Path[0], pDM_PDTable->RSSI_CCK_Path[1])); + RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: pDM_PDTable->RSSI_CCK_Path_cnt[0]=%d, pDM_PDTable->RSSI_CCK_Path_cnt[1]=%d\n", + pDM_PDTable->RSSI_CCK_Path_cnt[0], pDM_PDTable->RSSI_CCK_Path_cnt[1])); + + if(pDM_PDTable->RSSI_CCK_Path[0] > pDM_PDTable->RSSI_CCK_Path[1]) + { + pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & (~BIT0); + MinRSSI = pDM_PDTable->RSSI_CCK_Path[1]; + DefaultRespPath = 0; + RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port Select CCK Path-0\n")); + } + else if(pDM_PDTable->RSSI_CCK_Path[0] < pDM_PDTable->RSSI_CCK_Path[1]) + { + pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath | BIT0; + MinRSSI = pDM_PDTable->RSSI_CCK_Path[0]; + DefaultRespPath = 1; + RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port Select CCK Path-1\n")); + } + else + { + if((pDM_PDTable->RSSI_CCK_Path[0] != 0) && (pDM_PDTable->RSSI_CCK_Path[0] < MinRSSI)) + { + pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & (~BIT0); + RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port Select CCK Path-0\n")); + MinRSSI = pDM_PDTable->RSSI_CCK_Path[1]; + DefaultRespPath = 0; + } + else + { + RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Default port unchange CCK Path\n")); + } + } + } + else //Follow OFDM decision + { + pDM_PDTable->CCKTXPath = (pDM_PDTable->CCKTXPath & (~BIT0)) | (pDM_PDTable->OFDMTXPath &BIT0); + RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Follow OFDM decision, Default port Select CCK Path-%d\n", + pDM_PDTable->CCKTXPath &BIT0)); + } + } + //1 Extension Port + for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) + { + if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) + pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); + else + pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); + + if(pEntry!=NULL) + { + if(pEntry->bAssociated) + { + if(pEntry->rssi_stat.OFDM_Pkt_Cnt == 0) + { + u1Byte j=0; + for(j=0; j<2; j++) + { + if(pEntry->rssi_stat.RSSI_CCK_Path_cnt[j] > 1) + pEntry->rssi_stat.RSSI_CCK_Path[j] = pEntry->rssi_stat.RSSI_CCK_Path[j] / (pEntry->rssi_stat.RSSI_CCK_Path_cnt[j]-1); + else + pEntry->rssi_stat.RSSI_CCK_Path[j] = 0; + } + RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d, RSSI_CCK0=%d, RSSI_CCK1=%d\n", + pEntry->AssociatedMacId, pEntry->rssi_stat.RSSI_CCK_Path[0], pEntry->rssi_stat.RSSI_CCK_Path[1])); + + if(pEntry->rssi_stat.RSSI_CCK_Path[0] >pEntry->rssi_stat.RSSI_CCK_Path[1]) + { + pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & ~(BIT(pEntry->AssociatedMacId)); + RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d Select CCK Path-0\n", pEntry->AssociatedMacId)); + if(pEntry->rssi_stat.RSSI_CCK_Path[1] < MinRSSI) + { + MinRSSI = pEntry->rssi_stat.RSSI_CCK_Path[1]; + DefaultRespPath = 0; + } + } + else if(pEntry->rssi_stat.RSSI_CCK_Path[0] rssi_stat.RSSI_CCK_Path[1]) + { + pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath | BIT(pEntry->AssociatedMacId); + RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d Select CCK Path-1\n", pEntry->AssociatedMacId)); + if(pEntry->rssi_stat.RSSI_CCK_Path[0] < MinRSSI) + { + MinRSSI = pEntry->rssi_stat.RSSI_CCK_Path[0]; + DefaultRespPath = 1; + } + } + else + { + if((pEntry->rssi_stat.RSSI_CCK_Path[0] != 0) && (pEntry->rssi_stat.RSSI_CCK_Path[0] < MinRSSI)) + { + pDM_PDTable->CCKTXPath = pDM_PDTable->CCKTXPath & ~(BIT(pEntry->AssociatedMacId)); + MinRSSI = pEntry->rssi_stat.RSSI_CCK_Path[1]; + DefaultRespPath = 0; + RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d Select CCK Path-0\n", pEntry->AssociatedMacId)); + } + else + { + RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: MACID=%d unchange CCK Path\n", pEntry->AssociatedMacId)); + } + } + } + else //Follow OFDM decision + { + pDM_PDTable->CCKTXPath = (pDM_PDTable->CCKTXPath & (~(BIT(pEntry->AssociatedMacId)))) | (pDM_PDTable->OFDMTXPath & BIT(pEntry->AssociatedMacId)); + RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C: Follow OFDM decision, MACID=%d Select CCK Path-%d\n", + pEntry->AssociatedMacId, (pDM_PDTable->CCKTXPath & BIT(pEntry->AssociatedMacId))>>(pEntry->AssociatedMacId))); + } + } + } + else + { + break; + } + } + + RT_TRACE( COMP_INIT, DBG_LOUD, ("odm_CCKTXPathDiversity_92C:MinRSSI=%d\n",MinRSSI)); + + if(MinRSSI == 0xFF) + DefaultRespPath = pDM_PDTable->CCKDefaultRespPath; + + pDM_PDTable->CCKDefaultRespPath = DefaultRespPath; +} + + +VOID +odm_ResetPathDiversity_92C( + IN PADAPTER Adapter +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + pPD_T pDM_PDTable = &Adapter->DM_PDTable; + PRT_WLAN_STA pEntry; + u4Byte i,j; + + pHalData->RSSI_test = FALSE; + pDM_PDTable->CCK_Pkt_Cnt = 0; + pDM_PDTable->OFDM_Pkt_Cnt = 0; + pHalData->CCK_Pkt_Cnt =0; + pHalData->OFDM_Pkt_Cnt =0; + + if(pDM_PDTable->CCKPathDivEnable == TRUE) + PHY_SetBBReg(Adapter, rCCK0_AFESetting , 0x0F000000, 0x01); //RX path = PathAB + + for(i=0; i<2; i++) + { + pDM_PDTable->RSSI_CCK_Path_cnt[i]=0; + pDM_PDTable->RSSI_CCK_Path[i] = 0; + } + for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) + { + if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) + pEntry = AsocEntry_EnumStation(GetFirstExtAdapter(Adapter), i); + else + pEntry = AsocEntry_EnumStation(GetDefaultAdapter(Adapter), i); + + if(pEntry!=NULL) + { + pEntry->rssi_stat.CCK_Pkt_Cnt = 0; + pEntry->rssi_stat.OFDM_Pkt_Cnt = 0; + for(j=0; j<2; j++) + { + pEntry->rssi_stat.RSSI_CCK_Path_cnt[j] = 0; + pEntry->rssi_stat.RSSI_CCK_Path[j] = 0; + } + } + else + break; + } +} + + + + + +VOID +odm_CCKTXPathDiversityCallback( + PRT_TIMER pTimer +) +{ +#if USE_WORKITEM + PADAPTER Adapter = (PADAPTER)pTimer->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; +#else + PADAPTER Adapter = (PADAPTER)pTimer->Adapter; +#endif + +#if DEV_BUS_TYPE==RT_PCI_INTERFACE +#if USE_WORKITEM + PlatformScheduleWorkItem(&pDM_Odm->CCKPathDiversityWorkitem); +#else + odm_PathDiversityAfterLink_92C(Adapter); +#endif +#else + PlatformScheduleWorkItem(&pDM_Odm->CCKPathDiversityWorkitem); +#endif + +} + + +VOID +odm_CCKTXPathDiversityWorkItemCallback( + IN PVOID pContext + ) +{ + PADAPTER Adapter = (PADAPTER)pContext; + + odm_CCKTXPathDiversity_92C(Adapter); +} + +// +// 20100514 Luke/Joseph: +// Callback function for 500ms antenna test trying. +// +VOID +odm_PathDivChkAntSwitchCallback( + PRT_TIMER pTimer +) +{ + PADAPTER Adapter = (PADAPTER)pTimer->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + +#if DEV_BUS_TYPE==RT_PCI_INTERFACE + +#if USE_WORKITEM + PlatformScheduleWorkItem(&pDM_Odm->PathDivSwitchWorkitem); +#else + odm_PathDivChkAntSwitch(pDM_Odm); +#endif +#else + PlatformScheduleWorkItem(&pDM_Odm->PathDivSwitchWorkitem); +#endif + +//odm_SwAntDivChkAntSwitch(Adapter, SWAW_STEP_DETERMINE); + +} + + +VOID +odm_PathDivChkAntSwitchWorkitemCallback( + IN PVOID pContext + ) +{ + PADAPTER pAdapter = (PADAPTER)pContext; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + + odm_PathDivChkAntSwitch(pDM_Odm); +} + + + //MAC0_ACCESS_PHY1 + +// 2011-06-22 Neil Chen & Gary Hsin +// Refer to Jr.Luke's SW ANT DIV +// 92D Path Diversity Main function +// refer to 88C software antenna diversity +// +VOID +odm_PathDivChkAntSwitch( + PDM_ODM_T pDM_Odm + //PADAPTER Adapter, + //u1Byte Step +) +{ + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + + + pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + s4Byte curRSSI=100, RSSI_A, RSSI_B; + u1Byte nextAntenna=AUX_ANT; + static u8Byte lastTxOkCnt=0, lastRxOkCnt=0; + u8Byte curTxOkCnt, curRxOkCnt; + static u8Byte TXByteCnt_A=0, TXByteCnt_B=0, RXByteCnt_A=0, RXByteCnt_B=0; + u8Byte CurByteCnt=0, PreByteCnt=0; + static u1Byte TrafficLoad = TRAFFIC_LOW; + u1Byte Score_A=0, Score_B=0; + u1Byte i=0x0; + // Neil Chen + static u1Byte pathdiv_para=0x0; + static u1Byte switchfirsttime=0x00; + // u1Byte regB33 = (u1Byte) PHY_QueryBBReg(Adapter, 0xB30,BIT27); + u1Byte regB33 = (u1Byte)ODM_GetBBReg(pDM_Odm, PATHDIV_REG, BIT27); + + + //u1Byte reg637 =0x0; + static u1Byte fw_value=0x0; + //u8Byte curTxOkCnt_tmp, curRxOkCnt_tmp; + PADAPTER BuddyAdapter = Adapter->BuddyAdapter; // another adapter MAC + // Path Diversity //Neil Chen--2011--06--22 + + //u1Byte PathDiv_Trigger = (u1Byte) PHY_QueryBBReg(Adapter, 0xBA0,BIT31); + u1Byte PathDiv_Trigger = (u1Byte) ODM_GetBBReg(pDM_Odm, PATHDIV_TRI,BIT31); + u1Byte PathDiv_Enable = pHalData->bPathDiv_Enable; + + + //DbgPrint("Path Div PG Value:%x \n",PathDiv_Enable); + if((BuddyAdapter==NULL)||(!PathDiv_Enable)||(PathDiv_Trigger)||(pHalData->CurrentBandType == BAND_ON_2_4G)) + { + return; + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD,("===================>odm_PathDivChkAntSwitch()\n")); + + // The first time to switch path excluding 2nd, 3rd, ....etc.... + if(switchfirsttime==0) + { + if(regB33==0) + { + pDM_SWAT_Table->CurAntenna = MAIN_ANT; // Default MAC0_5G-->Path A (current antenna) + } + } + + // Condition that does not need to use antenna diversity. + if(pDM_Odm->SupportICType != ODM_RTL8192D) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_PathDiversityMechanims(): No PathDiv Mechanism.\n")); + return; + } + + // Radio off: Status reset to default and return. + if(pHalData->eRFPowerState==eRfOff) + { + //ODM_SwAntDivRestAfterLink(Adapter); + return; + } + + /* + // Handling step mismatch condition. + // Peak step is not finished at last time. Recover the variable and check again. + if( Step != pDM_SWAT_Table->try_flag ) + { + ODM_SwAntDivRestAfterLink(Adapter); + } */ + + if(pDM_SWAT_Table->try_flag == 0xff) + { + // Select RSSI checking target + if(pMgntInfo->mAssoc && !ACTING_AS_AP(Adapter)) + { + // Target: Infrastructure mode AP. + pHalData->RSSI_target = NULL; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_PathDivMechanism(): RSSI_target is DEF AP!\n")); + } + else + { + u1Byte index = 0; + PRT_WLAN_STA pEntry = NULL; + PADAPTER pTargetAdapter = NULL; + + if( pMgntInfo->mIbss || ACTING_AS_AP(Adapter) ) + { + // Target: AP/IBSS peer. + pTargetAdapter = Adapter; + } + else if(IsAPModeExist(Adapter) && GetFirstExtAdapter(Adapter) != NULL) + { + // Target: VWIFI peer. + pTargetAdapter = GetFirstExtAdapter(Adapter); + } + + if(pTargetAdapter != NULL) + { + for(index=0; indexbAssociated) + break; + } + } + } + + if(pEntry == NULL) + { + ODM_PathDivRestAfterLink(pDM_Odm); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): No Link.\n")); + return; + } + else + { + pHalData->RSSI_target = pEntry; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): RSSI_target is PEER STA\n")); + } + } + + pHalData->RSSI_cnt_A = 0; + pHalData->RSSI_cnt_B = 0; + pDM_SWAT_Table->try_flag = 0; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): Set try_flag to 0 prepare for peak!\n")); + return; + } + else + { + // 1st step + curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - lastTxOkCnt; + curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - lastRxOkCnt; + lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast; + lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast; + + if(pDM_SWAT_Table->try_flag == 1) // Training State + { + if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) + { + TXByteCnt_A += curTxOkCnt; + RXByteCnt_A += curRxOkCnt; + } + else + { + TXByteCnt_B += curTxOkCnt; + RXByteCnt_B += curRxOkCnt; + } + + nextAntenna = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? AUX_ANT : MAIN_ANT; + pDM_SWAT_Table->RSSI_Trying--; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: RSSI_Trying = %d\n",pDM_SWAT_Table->RSSI_Trying)); + if(pDM_SWAT_Table->RSSI_Trying == 0) + { + CurByteCnt = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? (TXByteCnt_A+RXByteCnt_A) : (TXByteCnt_B+RXByteCnt_B); + PreByteCnt = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? (TXByteCnt_B+RXByteCnt_B) : (TXByteCnt_A+RXByteCnt_A); + + if(TrafficLoad == TRAFFIC_HIGH) + { + //CurByteCnt = PlatformDivision64(CurByteCnt, 9); + PreByteCnt =PreByteCnt*9; + } + else if(TrafficLoad == TRAFFIC_LOW) + { + //CurByteCnt = PlatformDivision64(CurByteCnt, 2); + PreByteCnt =PreByteCnt*2; + } + if(pHalData->RSSI_cnt_A > 0) + RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; + else + RSSI_A = 0; + if(pHalData->RSSI_cnt_B > 0) + RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; + else + RSSI_B = 0; + curRSSI = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? RSSI_A : RSSI_B; + pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? RSSI_B : RSSI_A; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: PreRSSI = %d, CurRSSI = %d\n",pDM_SWAT_Table->PreRSSI, curRSSI)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: preAntenna= %s, curAntenna= %s \n", + (pDM_SWAT_Table->PreAntenna == MAIN_ANT?"MAIN":"AUX"), (pDM_SWAT_Table->CurAntenna == MAIN_ANT?"MAIN":"AUX"))); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", + RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B)); + } + + } + else // try_flag=0 + { + + if(pHalData->RSSI_cnt_A > 0) + RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; + else + RSSI_A = 0; + if(pHalData->RSSI_cnt_B > 0) + RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; + else + RSSI_B = 0; + curRSSI = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? RSSI_A : RSSI_B; + pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->PreAntenna == MAIN_ANT)? RSSI_A : RSSI_B; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: PreRSSI = %d, CurRSSI = %d\n", pDM_SWAT_Table->PreRSSI, curRSSI)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: preAntenna= %s, curAntenna= %s \n", + (pDM_SWAT_Table->PreAntenna == MAIN_ANT?"MAIN":"AUX"), (pDM_SWAT_Table->CurAntenna == MAIN_ANT?"MAIN":"AUX"))); + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH DIV=: RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", + RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B)); + //RT_TRACE(COMP_INIT, DBG_LOUD, ("Ekul:curTxOkCnt = %d\n", curTxOkCnt)); + //RT_TRACE(COMP_INIT, DBG_LOUD, ("Ekul:curRxOkCnt = %d\n", curRxOkCnt)); + } + + //1 Trying State + if((pDM_SWAT_Table->try_flag == 1)&&(pDM_SWAT_Table->RSSI_Trying == 0)) + { + + if(pDM_SWAT_Table->TestMode == TP_MODE) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: TestMode = TP_MODE")); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH= TRY:CurByteCnt = %"i64fmt"d,", CurByteCnt)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH= TRY:PreByteCnt = %"i64fmt"d\n",PreByteCnt)); + if(CurByteCnt < PreByteCnt) + { + if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) + pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; + else + pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; + } + else + { + if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) + pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; + else + pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; + } + for (i= 0; i<8; i++) + { + if(((pDM_SWAT_Table->SelectAntennaMap>>i)&BIT0) == 1) + Score_A++; + else + Score_B++; + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("SelectAntennaMap=%x\n ",pDM_SWAT_Table->SelectAntennaMap)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Score_A=%d, Score_B=%d\n", Score_A, Score_B)); + + if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) + { + nextAntenna = (Score_A >= Score_B)?MAIN_ANT:AUX_ANT; + } + else + { + nextAntenna = (Score_B >= Score_A)?AUX_ANT:MAIN_ANT; + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: nextAntenna=%s\n",(nextAntenna==MAIN_ANT)?"MAIN":"AUX")); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: preAntenna= %s, curAntenna= %s \n", + (pDM_SWAT_Table->PreAntenna == MAIN_ANT?"MAIN":"AUX"), (pDM_SWAT_Table->CurAntenna == MAIN_ANT?"MAIN":"AUX"))); + + if(nextAntenna != pDM_SWAT_Table->CurAntenna) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Switch back to another antenna")); + } + else + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: current anntena is good\n")); + } + } + + + if(pDM_SWAT_Table->TestMode == RSSI_MODE) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: TestMode = RSSI_MODE")); + pDM_SWAT_Table->SelectAntennaMap=0xAA; + if(curRSSI < pDM_SWAT_Table->PreRSSI) //Current antenna is worse than previous antenna + { + //RT_TRACE(COMP_INIT, DBG_LOUD, ("SWAS: Switch back to another antenna")); + nextAntenna = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)?AUX_ANT : MAIN_ANT; + } + else // current anntena is good + { + nextAntenna =pDM_SWAT_Table->CurAntenna; + //RT_TRACE(COMP_INIT, DBG_LOUD, ("SWAS: current anntena is good\n")); + } + } + + pDM_SWAT_Table->try_flag = 0; + pHalData->RSSI_test = FALSE; + pHalData->RSSI_sum_A = 0; + pHalData->RSSI_cnt_A = 0; + pHalData->RSSI_sum_B = 0; + pHalData->RSSI_cnt_B = 0; + TXByteCnt_A = 0; + TXByteCnt_B = 0; + RXByteCnt_A = 0; + RXByteCnt_B = 0; + + } + + //1 Normal State + else if(pDM_SWAT_Table->try_flag == 0) + { + if(TrafficLoad == TRAFFIC_HIGH) + { + if ((curTxOkCnt+curRxOkCnt) > 3750000)//if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000) + TrafficLoad = TRAFFIC_HIGH; + else + TrafficLoad = TRAFFIC_LOW; + } + else if(TrafficLoad == TRAFFIC_LOW) + { + if ((curTxOkCnt+curRxOkCnt) > 3750000)//if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000) + TrafficLoad = TRAFFIC_HIGH; + else + TrafficLoad = TRAFFIC_LOW; + } + if(TrafficLoad == TRAFFIC_HIGH) + pDM_SWAT_Table->bTriggerAntennaSwitch = 0; + //RT_TRACE(COMP_INIT, DBG_LOUD, ("Normal:TrafficLoad = %llu\n", curTxOkCnt+curRxOkCnt)); + + //Prepare To Try Antenna + nextAntenna = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? AUX_ANT : MAIN_ANT; + pDM_SWAT_Table->try_flag = 1; + pHalData->RSSI_test = TRUE; + if((curRxOkCnt+curTxOkCnt) > 1000) + { +#if DEV_BUS_TYPE==RT_PCI_INTERFACE + pDM_SWAT_Table->RSSI_Trying = 4; +#else + pDM_SWAT_Table->RSSI_Trying = 2; +#endif + pDM_SWAT_Table->TestMode = TP_MODE; + } + else + { + pDM_SWAT_Table->RSSI_Trying = 2; + pDM_SWAT_Table->TestMode = RSSI_MODE; + + } + + //RT_TRACE(COMP_INIT, DBG_LOUD, ("SWAS: Normal State -> Begin Trying!\n")); + pHalData->RSSI_sum_A = 0; + pHalData->RSSI_cnt_A = 0; + pHalData->RSSI_sum_B = 0; + pHalData->RSSI_cnt_B = 0; + } // end of try_flag=0 + } + + //1 4.Change TRX antenna + if(nextAntenna != pDM_SWAT_Table->CurAntenna) + { + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Change TX Antenna!\n ")); + //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, nextAntenna); for 88C + if(nextAntenna==MAIN_ANT) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Next Antenna is RF PATH A\n ")); + pathdiv_para = 0x02; //02 to switchback to RF path A + fw_value = 0x03; +#if DEV_BUS_TYPE==RT_PCI_INTERFACE + odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); +#else + ODM_FillH2CCmd(Adapter, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); +#endif + } + else if(nextAntenna==AUX_ANT) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Next Antenna is RF PATH B\n ")); + if(switchfirsttime==0) // First Time To Enter Path Diversity + { + switchfirsttime=0x01; + pathdiv_para = 0x00; + fw_value=0x00; // to backup RF Path A Releated Registers + +#if DEV_BUS_TYPE==RT_PCI_INTERFACE + odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); +#else + ODM_FillH2CCmd(Adapter, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); + //for(u1Byte n=0; n<80,n++) + //{ + //delay_us(500); + ODM_delay_ms(500); + odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); + + fw_value=0x01; // to backup RF Path A Releated Registers + ODM_FillH2CCmd(Adapter, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); +#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: FIRST TIME To DO PATH SWITCH!\n ")); + } + else + { + pathdiv_para = 0x01; + fw_value = 0x02; +#if DEV_BUS_TYPE==RT_PCI_INTERFACE + odm_PathDiversity_8192D(pDM_Odm, pathdiv_para); +#else + ODM_FillH2CCmd(Adapter, ODM_H2C_PathDiv,1,(pu1Byte)(&fw_value)); +#endif + } + } + // odm_PathDiversity_8192D(Adapter, pathdiv_para); + } + + //1 5.Reset Statistics + pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; + pDM_SWAT_Table->CurAntenna = nextAntenna; + pDM_SWAT_Table->PreRSSI = curRSSI; + + //1 6.Set next timer + + if(pDM_SWAT_Table->RSSI_Trying == 0) + return; + + if(pDM_SWAT_Table->RSSI_Trying%2 == 0) + { + if(pDM_SWAT_Table->TestMode == TP_MODE) + { + if(TrafficLoad == TRAFFIC_HIGH) + { +#if DEV_BUS_TYPE==RT_PCI_INTERFACE + ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 10 ); //ms + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 10 ms\n")); +#else + ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 20 ); //ms + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 20 ms\n")); +#endif + } + else if(TrafficLoad == TRAFFIC_LOW) + { + ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 50 ); //ms + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 50 ms\n")); + } + } + else // TestMode == RSSI_MODE + { + ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 500 ); //ms + ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 500 ms\n")); + } + } + else + { + if(pDM_SWAT_Table->TestMode == TP_MODE) + { + if(TrafficLoad == TRAFFIC_HIGH) + +#if DEV_BUS_TYPE==RT_PCI_INTERFACE + ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 90 ); //ms + //ODM_RT_TRACE(pDM_Odm,ODM_COMP_PATH_DIV, ODM_DBG_LOUD, ("=PATH=: Test another antenna for 90 ms\n")); +#else + ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 180); //ms +#endif + else if(TrafficLoad == TRAFFIC_LOW) + ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 100 ); //ms + } + else + ODM_SetTimer( pDM_Odm, &pDM_Odm->PathDivSwitchTimer, 500 ); //ms + } +} + + + +VOID +ODM_CCKPathDiversityChkPerPktRssi( + PADAPTER Adapter, + BOOLEAN bIsDefPort, + BOOLEAN bMatchBSSID, + PRT_WLAN_STA pEntry, + PRT_RFD pRfd, + pu1Byte pDesc + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + BOOLEAN bCount = FALSE; + pPD_T pDM_PDTable = &Adapter->DM_PDTable; + //BOOLEAN isCCKrate = RX_HAL_IS_CCK_RATE_92C(pDesc); +#if DEV_BUS_TYPE != RT_SDIO_INTERFACE + BOOLEAN isCCKrate = RX_HAL_IS_CCK_RATE(Adapter, pDesc); +#else //below code would be removed if we have verified SDIO + BOOLEAN isCCKrate = IS_HARDWARE_TYPE_8188E(Adapter) ? RX_HAL_IS_CCK_RATE_88E(pDesc) : RX_HAL_IS_CCK_RATE_92C(pDesc); +#endif + + if((pHalData->PathDivCfg != 1) || (pHalData->RSSI_test == FALSE)) + return; + + if(pHalData->RSSI_target==NULL && bIsDefPort && bMatchBSSID) + bCount = TRUE; + else if(pHalData->RSSI_target!=NULL && pEntry!=NULL && pHalData->RSSI_target==pEntry) + bCount = TRUE; + + if(bCount && isCCKrate) + { + if(pDM_PDTable->TrainingState == 1 ) + { + if(pEntry) + { + if(pEntry->rssi_stat.RSSI_CCK_Path_cnt[0] != 0) + pEntry->rssi_stat.RSSI_CCK_Path[0] += pRfd->Status.RxPWDBAll; + pEntry->rssi_stat.RSSI_CCK_Path_cnt[0]++; + } + else + { + if(pDM_PDTable->RSSI_CCK_Path_cnt[0] != 0) + pDM_PDTable->RSSI_CCK_Path[0] += pRfd->Status.RxPWDBAll; + pDM_PDTable->RSSI_CCK_Path_cnt[0]++; + } + } + else if(pDM_PDTable->TrainingState == 2 ) + { + if(pEntry) + { + if(pEntry->rssi_stat.RSSI_CCK_Path_cnt[1] != 0) + pEntry->rssi_stat.RSSI_CCK_Path[1] += pRfd->Status.RxPWDBAll; + pEntry->rssi_stat.RSSI_CCK_Path_cnt[1]++; + } + else + { + if(pDM_PDTable->RSSI_CCK_Path_cnt[1] != 0) + pDM_PDTable->RSSI_CCK_Path[1] += pRfd->Status.RxPWDBAll; + pDM_PDTable->RSSI_CCK_Path_cnt[1]++; + } + } + } +} + + + + +//Neil Chen---2011--06--22 +//----92D Path Diversity----// +//#ifdef PathDiv92D +//================================== +//3 Path Diversity +//================================== +// +// 20100514 Luke/Joseph: +// Add new function for antenna diversity after link. +// This is the main function of antenna diversity after link. +// This function is called in HalDmWatchDog() and ODM_SwAntDivChkAntSwitchCallback(). +// HalDmWatchDog() calls this function with SWAW_STEP_PEAK to initialize the antenna test. +// In SWAW_STEP_PEAK, another antenna and a 500ms timer will be set for testing. +// After 500ms, ODM_SwAntDivChkAntSwitchCallback() calls this function to compare the signal just +// listened on the air with the RSSI of original antenna. +// It chooses the antenna with better RSSI. +// There is also a aged policy for error trying. Each error trying will cost more 5 seconds waiting +// penalty to get next try. +// +// +// 20100503 Joseph: +// Add new function SwAntDivCheck8192C(). +// This is the main function of Antenna diversity function before link. +// Mainly, it just retains last scan result and scan again. +// After that, it compares the scan result to see which one gets better RSSI. +// It selects antenna with better receiving power and returns better scan result. +// + + +// +// 20100514 Luke/Joseph: +// This function is used to gather the RSSI information for antenna testing. +// It selects the RSSI of the peer STA that we want to know. +// +VOID +ODM_PathDivChkPerPktRssi( + PADAPTER Adapter, + BOOLEAN bIsDefPort, + BOOLEAN bMatchBSSID, + PRT_WLAN_STA pEntry, + PRT_RFD pRfd + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + BOOLEAN bCount = FALSE; + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + + if(pHalData->RSSI_target==NULL && bIsDefPort && bMatchBSSID) + bCount = TRUE; + else if(pHalData->RSSI_target!=NULL && pEntry!=NULL && pHalData->RSSI_target==pEntry) + bCount = TRUE; + + if(bCount) + { + //1 RSSI for SW Antenna Switch + if(pDM_SWAT_Table->CurAntenna == MAIN_ANT) + { + pHalData->RSSI_sum_A += pRfd->Status.RxPWDBAll; + pHalData->RSSI_cnt_A++; + } + else + { + pHalData->RSSI_sum_B += pRfd->Status.RxPWDBAll; + pHalData->RSSI_cnt_B++; + + } + } +} + + +// +// 20100514 Luke/Joseph: +// Add new function to reset antenna diversity state after link. +// +VOID +ODM_PathDivRestAfterLink( + IN PDM_ODM_T pDM_Odm + ) +{ + PADAPTER Adapter=pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + + pHalData->RSSI_cnt_A = 0; + pHalData->RSSI_cnt_B = 0; + pHalData->RSSI_test = FALSE; + pDM_SWAT_Table->try_flag = 0x0; // NOT 0xff + pDM_SWAT_Table->RSSI_Trying = 0; + pDM_SWAT_Table->SelectAntennaMap=0xAA; + pDM_SWAT_Table->CurAntenna = MAIN_ANT; +} + + +//================================================== +//3 PathDiv End +//================================================== + + +VOID +ODM_FillTXPathInTXDESC( + IN PADAPTER Adapter, + IN PRT_TCB pTcb, + IN pu1Byte pDesc +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u4Byte TXPath; + pPD_T pDM_PDTable = &Adapter->DM_PDTable; + + //2011.09.05 Add by Luke Lee for path diversity + if(pHalData->PathDivCfg == 1) + { + TXPath = (pDM_PDTable->OFDMTXPath >> pTcb->macId) & BIT0; + //RT_TRACE( COMP_INIT, DBG_LOUD, ("Fill TXDESC: macID=%d, TXPath=%d\n", pTcb->macId, TXPath)); + //SET_TX_DESC_TX_ANT_CCK(pDesc,TXPath); + if(TXPath == 0) + { + SET_TX_DESC_TX_ANTL_92C(pDesc,1); + SET_TX_DESC_TX_ANT_HT_92C(pDesc,1); + } + else + { + SET_TX_DESC_TX_ANTL_92C(pDesc,2); + SET_TX_DESC_TX_ANT_HT_92C(pDesc,2); + } + TXPath = (pDM_PDTable->CCKTXPath >> pTcb->macId) & BIT0; + if(TXPath == 0) + { + SET_TX_DESC_TX_ANT_CCK_92C(pDesc,1); + } + else + { + SET_TX_DESC_TX_ANT_CCK_92C(pDesc,2); + } + } +} + +//Only for MP //Neil Chen--2012--0502-- +VOID +odm_PathDivInit_92D( +IN PDM_ODM_T pDM_Odm) +{ + pPATHDIV_PARA pathIQK = &pDM_Odm->pathIQK; + + pathIQK->org_2g_RegC14=0x0; + pathIQK->org_2g_RegC4C=0x0; + pathIQK->org_2g_RegC80=0x0; + pathIQK->org_2g_RegC94=0x0; + pathIQK->org_2g_RegCA0=0x0; + pathIQK->org_5g_RegC14=0x0; + pathIQK->org_5g_RegCA0=0x0; + pathIQK->org_5g_RegE30=0x0; + pathIQK->swt_2g_RegC14=0x0; + pathIQK->swt_2g_RegC4C=0x0; + pathIQK->swt_2g_RegC80=0x0; + pathIQK->swt_2g_RegC94=0x0; + pathIQK->swt_2g_RegCA0=0x0; + pathIQK->swt_5g_RegC14=0x0; + pathIQK->swt_5g_RegCA0=0x0; + pathIQK->swt_5g_RegE30=0x0; + +} + + +u1Byte +odm_SwAntDivSelectScanChnl( + IN PADAPTER Adapter + ) +{ +#if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM) + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + u1Byte i, j, ScanChannel = 0, ChannelNum = 0; + PRT_CHANNEL_LIST pChannelList = GET_RT_CHANNEL_LIST(pMgntInfo); + u1Byte EachChannelSTAs[MAX_SCAN_CHANNEL_NUM] = {0}; + + if(pMgntInfo->tmpNumBssDesc == 0) + return 0; + + for(i = 0; i < pMgntInfo->tmpNumBssDesc; i++) + { + ChannelNum = pMgntInfo->tmpbssDesc[i].ChannelNumber; + for(j = 0; j < pChannelList->ChannelLen; j++) + { + if(pChannelList->ChnlListEntry[j].ChannelNum == ChannelNum) + { + EachChannelSTAs[j]++; + break; + } + } + } + + for(i = 0; i < MAX_SCAN_CHANNEL_NUM; i++) + { + if(EachChannelSTAs[i] > EachChannelSTAs[ScanChannel]) + ScanChannel = i; + } + + if(EachChannelSTAs[ScanChannel] == 0) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("odm_SwAntDivSelectScanChnl(): Scan List is empty.\n")); + return 0; + } + + ScanChannel = pChannelList->ChnlListEntry[ScanChannel].ChannelNum; + + + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, + ("odm_SwAntDivSelectScanChnl(): Channel (( %d )) is select as scan channel.\n", ScanChannel)); + + return ScanChannel; +#else + return 0; +#endif +} + + +VOID +odm_SwAntDivConstructScanChnl( + IN PADAPTER Adapter, + IN u1Byte ScanChnl + ) +{ + + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + + if(ScanChnl == 0) + { + u1Byte i; + PRT_CHANNEL_LIST pChannelList = GET_RT_CHANNEL_LIST(pMgntInfo); + + // 20100519 Joseph: Original antenna scanned nothing. + // Test antenna shall scan all channel with half period in this condition. + + RT_TRACE_F(COMP_SCAN, DBG_TRACE, (" RT_CHNL_LIST_ACTION_CONSTRUCT chnl %d \n", ScanChnl)); + + RtActChannelList(Adapter, RT_CHNL_LIST_ACTION_CONSTRUCT_SCAN_LIST, NULL, NULL); + for(i = 0; i < pChannelList->ChannelLen; i++) + pChannelList->ChnlListEntry[i].ScanPeriod /= 2; + } + else + { + // The using of this CustomizedScanRequest is a trick to rescan the two channels + // under the NORMAL scanning process. It will not affect MGNT_INFO.CustomizedScanRequest. + CUSTOMIZED_SCAN_REQUEST CustomScanReq; + + CustomScanReq.bEnabled = TRUE; + CustomScanReq.Channels[0] = ScanChnl; + CustomScanReq.Channels[1] = pMgntInfo->dot11CurrentChannelNumber; + CustomScanReq.nChannels = 2; + CustomScanReq.ScanType = SCAN_ACTIVE; + CustomScanReq.Duration = DEFAULT_PASSIVE_SCAN_PERIOD; + + RT_TRACE_F(COMP_SCAN, DBG_TRACE, (" RT_CHNL_LIST_ACTION_CONSTRUCT chnl %d \n", ScanChnl)); + + RtActChannelList(Adapter, RT_CHNL_LIST_ACTION_CONSTRUCT_SCAN_LIST, &CustomScanReq, NULL); + } + +} + + +#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_PathDiv.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_PathDiv.h new file mode 100755 index 000000000000..85791d07da33 --- /dev/null +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_PathDiv.h @@ -0,0 +1,196 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +#ifndef __ODMPATHDIV_H__ +#define __ODMPATHDIV_H__ + +#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) + +VOID +odm_PathDiversityInit( + IN PVOID pDM_VOID + ); + +VOID +odm_PathDiversity( + IN PVOID pDM_VOID + ); + +#endif //(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) + + +#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) + +//#define PATHDIV_ENABLE 1 +#define dm_PathDiv_RSSI_Check ODM_PathDivChkPerPktRssi +#define PathDivCheckBeforeLink8192C ODM_PathDiversityBeforeLink92C + +typedef struct _PathDiv_Parameter_define_ +{ + u4Byte org_5g_RegE30; + u4Byte org_5g_RegC14; + u4Byte org_5g_RegCA0; + u4Byte swt_5g_RegE30; + u4Byte swt_5g_RegC14; + u4Byte swt_5g_RegCA0; + //for 2G IQK information + u4Byte org_2g_RegC80; + u4Byte org_2g_RegC4C; + u4Byte org_2g_RegC94; + u4Byte org_2g_RegC14; + u4Byte org_2g_RegCA0; + + u4Byte swt_2g_RegC80; + u4Byte swt_2g_RegC4C; + u4Byte swt_2g_RegC94; + u4Byte swt_2g_RegC14; + u4Byte swt_2g_RegCA0; +}PATHDIV_PARA,*pPATHDIV_PARA; + +VOID +odm_PathDiversityInit_92C( + IN PADAPTER Adapter + ); + +VOID +odm_2TPathDiversityInit_92C( + IN PADAPTER Adapter + ); + +VOID +odm_1TPathDiversityInit_92C( + IN PADAPTER Adapter + ); + +BOOLEAN +odm_IsConnected_92C( + IN PADAPTER Adapter + ); + +BOOLEAN +ODM_PathDiversityBeforeLink92C( + //IN PADAPTER Adapter + IN PDM_ODM_T pDM_Odm + ); + +VOID +odm_PathDiversityAfterLink_92C( + IN PADAPTER Adapter + ); + +VOID +odm_SetRespPath_92C( + IN PADAPTER Adapter, + IN u1Byte DefaultRespPath + ); + +VOID +odm_OFDMTXPathDiversity_92C( + IN PADAPTER Adapter + ); + +VOID +odm_CCKTXPathDiversity_92C( + IN PADAPTER Adapter + ); + +VOID +odm_ResetPathDiversity_92C( + IN PADAPTER Adapter + ); + +VOID +odm_CCKTXPathDiversityCallback( + PRT_TIMER pTimer + ); + +VOID +odm_CCKTXPathDiversityWorkItemCallback( + IN PVOID pContext + ); + +VOID +odm_PathDivChkAntSwitchCallback( + PRT_TIMER pTimer + ); + +VOID +odm_PathDivChkAntSwitchWorkitemCallback( + IN PVOID pContext + ); + + +VOID +odm_PathDivChkAntSwitch( + PDM_ODM_T pDM_Odm + ); + +VOID +ODM_CCKPathDiversityChkPerPktRssi( + PADAPTER Adapter, + BOOLEAN bIsDefPort, + BOOLEAN bMatchBSSID, + PRT_WLAN_STA pEntry, + PRT_RFD pRfd, + pu1Byte pDesc + ); + +VOID +ODM_PathDivChkPerPktRssi( + PADAPTER Adapter, + BOOLEAN bIsDefPort, + BOOLEAN bMatchBSSID, + PRT_WLAN_STA pEntry, + PRT_RFD pRfd + ); + +VOID +ODM_PathDivRestAfterLink( + IN PDM_ODM_T pDM_Odm + ); + +VOID +ODM_FillTXPathInTXDESC( + IN PADAPTER Adapter, + IN PRT_TCB pTcb, + IN pu1Byte pDesc + ); + +VOID +odm_PathDivInit_92D( + IN PDM_ODM_T pDM_Odm + ); + +u1Byte +odm_SwAntDivSelectScanChnl( + IN PADAPTER Adapter + ); + +VOID +odm_SwAntDivConstructScanChnl( + IN PADAPTER Adapter, + IN u1Byte ScanChnl + ); + + #endif //#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) + + + #endif //#ifndef __ODMPATHDIV_H__ + diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_RaInfo.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_RaInfo.c new file mode 100755 index 000000000000..e6dfd55d39eb --- /dev/null +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_RaInfo.c @@ -0,0 +1,1583 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +//============================================================ +// include files +//============================================================ +#include "odm_precomp.h" + + +#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) +VOID +odm_RSSIMonitorInit( + IN PVOID pDM_VOID + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; + pRA_Table->firstconnect = FALSE; + +#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) + pRA_Table->PT_collision_pre = TRUE; //be used in ODM_DynamicARFBSelect(WIN only) +#endif + +} +#endif + +VOID +odm_RSSIMonitorCheck( + IN PVOID pDM_VOID + ) +{ + // + // For AP/ADSL use prtl8192cd_priv + // For CE/NIC use PADAPTER + // +PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR)) + return; + + // + // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate + // at the same time. In the stage2/3, we need to prive universal interface and merge all + // HW dynamic mechanism. + // + switch (pDM_Odm->SupportPlatform) + { + case ODM_WIN: + odm_RSSIMonitorCheckMP(pDM_Odm); + break; + + case ODM_CE: + odm_RSSIMonitorCheckCE(pDM_Odm); + break; + + case ODM_AP: + odm_RSSIMonitorCheckAP(pDM_Odm); + break; + + case ODM_ADSL: + //odm_DIGAP(pDM_Odm); + break; + } + +} // odm_RSSIMonitorCheck + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +VOID +odm_RSSIDumpToRegister( + IN PVOID pDM_VOID + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + PADAPTER Adapter = pDM_Odm->Adapter; + + if(pDM_Odm->SupportICType == ODM_RTL8812) + { + PlatformEFIOWrite1Byte(Adapter, rA_RSSIDump_Jaguar, Adapter->RxStats.RxRSSIPercentage[0]); + PlatformEFIOWrite1Byte(Adapter, rB_RSSIDump_Jaguar, Adapter->RxStats.RxRSSIPercentage[1]); + + // Rx EVM + PlatformEFIOWrite1Byte(Adapter, rS1_RXevmDump_Jaguar, Adapter->RxStats.RxEVMdbm[0]); + PlatformEFIOWrite1Byte(Adapter, rS2_RXevmDump_Jaguar, Adapter->RxStats.RxEVMdbm[1]); + + // Rx SNR + PlatformEFIOWrite1Byte(Adapter, rA_RXsnrDump_Jaguar, (u1Byte)(Adapter->RxStats.RxSNRdB[0])); + PlatformEFIOWrite1Byte(Adapter, rB_RXsnrDump_Jaguar, (u1Byte)(Adapter->RxStats.RxSNRdB[1])); + + // Rx Cfo_Short + PlatformEFIOWrite2Byte(Adapter, rA_CfoShortDump_Jaguar, Adapter->RxStats.RxCfoShort[0]); + PlatformEFIOWrite2Byte(Adapter, rB_CfoShortDump_Jaguar, Adapter->RxStats.RxCfoShort[1]); + + // Rx Cfo_Tail + PlatformEFIOWrite2Byte(Adapter, rA_CfoLongDump_Jaguar, Adapter->RxStats.RxCfoTail[0]); + PlatformEFIOWrite2Byte(Adapter, rB_CfoLongDump_Jaguar, Adapter->RxStats.RxCfoTail[1]); + } + else if(pDM_Odm->SupportICType == ODM_RTL8192E) + { + PlatformEFIOWrite1Byte(Adapter, rA_RSSIDump_92E, Adapter->RxStats.RxRSSIPercentage[0]); + PlatformEFIOWrite1Byte(Adapter, rB_RSSIDump_92E, Adapter->RxStats.RxRSSIPercentage[1]); + // Rx EVM + PlatformEFIOWrite1Byte(Adapter, rS1_RXevmDump_92E, Adapter->RxStats.RxEVMdbm[0]); + PlatformEFIOWrite1Byte(Adapter, rS2_RXevmDump_92E, Adapter->RxStats.RxEVMdbm[1]); + // Rx SNR + PlatformEFIOWrite1Byte(Adapter, rA_RXsnrDump_92E, (u1Byte)(Adapter->RxStats.RxSNRdB[0])); + PlatformEFIOWrite1Byte(Adapter, rB_RXsnrDump_92E, (u1Byte)(Adapter->RxStats.RxSNRdB[1])); + // Rx Cfo_Short + PlatformEFIOWrite2Byte(Adapter, rA_CfoShortDump_92E, Adapter->RxStats.RxCfoShort[0]); + PlatformEFIOWrite2Byte(Adapter, rB_CfoShortDump_92E, Adapter->RxStats.RxCfoShort[1]); + // Rx Cfo_Tail + PlatformEFIOWrite2Byte(Adapter, rA_CfoLongDump_92E, Adapter->RxStats.RxCfoTail[0]); + PlatformEFIOWrite2Byte(Adapter, rB_CfoLongDump_92E, Adapter->RxStats.RxCfoTail[1]); + } +} +#endif + +VOID +odm_RSSIMonitorCheckMP( + IN PVOID pDM_VOID + ) +{ +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PRT_WLAN_STA pEntry = NULL; + u1Byte i; + s4Byte tmpEntryMaxPWDB=0, tmpEntryMinPWDB=0xff; + u1Byte H2C_Parameter[4] ={0}; + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + PMGNT_INFO pDefaultMgntInfo = &Adapter->MgntInfo; + u8Byte curTxOkCnt = 0, curRxOkCnt = 0; + u1Byte STBC_TX = 0; + BOOLEAN FirstConnect; + pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; + pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable; + +#if (BEAMFORMING_SUPPORT == 1) + BEAMFORMING_CAP Beamform_cap = BEAMFORMING_CAP_NONE; + u1Byte TxBF_EN = 0; +#endif + + PADAPTER pLoopAdapter = GetDefaultAdapter(Adapter); + + BOOLEAN bExtRAInfo = FALSE; + + if(pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8821) + bExtRAInfo = TRUE; + + FirstConnect = (pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE); + pRA_Table->firstconnect = pHalData->bLinked; + H2C_Parameter[3] |= FirstConnect << 5; + + if(pDM_Odm->SupportICType == ODM_RTL8188E && (pDefaultMgntInfo->CustomerID==RT_CID_819x_HP)) + { + if(curRxOkCnt >(curTxOkCnt*6)) + PlatformEFIOWrite4Byte(Adapter, REG_ARFR0, 0x8f015); + else + PlatformEFIOWrite4Byte(Adapter, REG_ARFR0, 0xff015); + } + + if(pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8821) + { + if(curRxOkCnt >(curTxOkCnt*6)) + H2C_Parameter[3]=0x01; + else + H2C_Parameter[3]=0x00; + } + + while(pLoopAdapter) + { + + if(pLoopAdapter != NULL){ + pMgntInfo = &pLoopAdapter->MgntInfo; + curTxOkCnt = pLoopAdapter->TxStats.NumTxBytesUnicast - pMgntInfo->lastTxOkCnt; + curRxOkCnt = pLoopAdapter->RxStats.NumRxBytesUnicast - pMgntInfo->lastRxOkCnt; + pMgntInfo->lastTxOkCnt = curTxOkCnt; + pMgntInfo->lastRxOkCnt = curRxOkCnt; + } + + for(i = 0; i < ASSOCIATE_ENTRY_NUM; i++) + { + + if(IsAPModeExist(pLoopAdapter)) + { + if(GetFirstExtAdapter(pLoopAdapter) != NULL && + GetFirstExtAdapter(pLoopAdapter) == pLoopAdapter){ + pEntry = AsocEntry_EnumStation(pLoopAdapter, i); + } + else if(GetFirstGOPort(pLoopAdapter) != NULL && + IsFirstGoAdapter(pLoopAdapter)){ + pEntry = AsocEntry_EnumStation(pLoopAdapter, i); + } + } + else + { + if(GetDefaultAdapter(pLoopAdapter) == pLoopAdapter){ + pEntry = AsocEntry_EnumStation(pLoopAdapter, i); + } + } + + if(pEntry != NULL) + { + if(pEntry->bAssociated) + { + + RT_DISP_ADDR(FDM, DM_PWDB, ("pEntry->MacAddr ="), pEntry->MacAddr); + RT_DISP(FDM, DM_PWDB, ("pEntry->rssi = 0x%x(%d)\n", + pEntry->rssi_stat.UndecoratedSmoothedPWDB, pEntry->rssi_stat.UndecoratedSmoothedPWDB)); + + if(bExtRAInfo) + { + +#if (BEAMFORMING_SUPPORT == 1) + Beamform_cap = Beamforming_GetEntryBeamCapByMacId(Adapter, pEntry->AssociatedMacId); + if(Beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT |BEAMFORMER_CAP_VHT_SU)) + TxBF_EN = 1; + else + TxBF_EN = 0; + + H2C_Parameter[3] |= TxBF_EN << 6; + + if(TxBF_EN) + STBC_TX = 0; + else +#endif + { + if(IS_WIRELESS_MODE_AC(Adapter)) + STBC_TX = TEST_FLAG(pEntry->VHTInfo.STBC, STBC_VHT_ENABLE_TX); + else + STBC_TX = TEST_FLAG(pEntry->HTInfo.STBC, STBC_HT_ENABLE_TX); + } + + H2C_Parameter[3] |= STBC_TX << 1; + } + + if(pEntry->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) + tmpEntryMinPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; + if(pEntry->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) + tmpEntryMaxPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB; + + H2C_Parameter[2] = (u1Byte)(pEntry->rssi_stat.UndecoratedSmoothedPWDB & 0xFF); + H2C_Parameter[1] = 0x20; // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1 + H2C_Parameter[0] = (pEntry->AssociatedMacId); + if(bExtRAInfo) + ODM_FillH2CCmd(Adapter, ODM_H2C_RSSI_REPORT, 4, H2C_Parameter); + else + ODM_FillH2CCmd(Adapter, ODM_H2C_RSSI_REPORT, 3, H2C_Parameter); + } + } + else + { + break; + } + } + + pLoopAdapter = GetNextExtAdapter(pLoopAdapter); + } + + if(tmpEntryMaxPWDB != 0) // If associated entry is found + { + pHalData->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB; + RT_DISP(FDM, DM_PWDB, ("EntryMaxPWDB = 0x%x(%d)\n", tmpEntryMaxPWDB, tmpEntryMaxPWDB)); + } + else + { + pHalData->EntryMaxUndecoratedSmoothedPWDB = 0; + } + + if(tmpEntryMinPWDB != 0xff) // If associated entry is found + { + pHalData->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB; + RT_DISP(FDM, DM_PWDB, ("EntryMinPWDB = 0x%x(%d)\n", tmpEntryMinPWDB, tmpEntryMinPWDB)); + + } + else + { + pHalData->EntryMinUndecoratedSmoothedPWDB = 0; + } + + // Indicate Rx signal strength to FW. + if(pHalData->bUseRAMask) + { + if(bExtRAInfo) + { + PRT_HIGH_THROUGHPUT pHTInfo = GET_HT_INFO(pDefaultMgntInfo); + PRT_VERY_HIGH_THROUGHPUT pVHTInfo = GET_VHT_INFO(pDefaultMgntInfo); + +#if (BEAMFORMING_SUPPORT == 1) + + Beamform_cap = Beamforming_GetEntryBeamCapByMacId(Adapter, pDefaultMgntInfo->mMacId); + + if(Beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT |BEAMFORMER_CAP_VHT_SU)) + TxBF_EN = 1; + else + TxBF_EN = 0; + + H2C_Parameter[3] |= TxBF_EN << 6; + + if(TxBF_EN) + STBC_TX = 0; + else +#endif + { + if(IS_WIRELESS_MODE_AC(Adapter)) + STBC_TX = TEST_FLAG(pVHTInfo->VhtCurStbc, STBC_VHT_ENABLE_TX); + else + STBC_TX = TEST_FLAG(pHTInfo->HtCurStbc, STBC_HT_ENABLE_TX); + } + + H2C_Parameter[3] |= STBC_TX << 1; + } + + H2C_Parameter[2] = (u1Byte)(pHalData->UndecoratedSmoothedPWDB & 0xFF); + H2C_Parameter[1] = 0x20; // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1 + H2C_Parameter[0] = 0; // fw v12 cmdid 5:use max macid ,for nic ,default macid is 0 ,max macid is 1 + if(bExtRAInfo) + ODM_FillH2CCmd(Adapter, ODM_H2C_RSSI_REPORT, 4, H2C_Parameter); + else + ODM_FillH2CCmd(Adapter, ODM_H2C_RSSI_REPORT, 3, H2C_Parameter); + } + else + { + PlatformEFIOWrite1Byte(Adapter, 0x4fe, (u1Byte)pHalData->UndecoratedSmoothedPWDB); + } + + if((pDM_Odm->SupportICType == ODM_RTL8812)||(pDM_Odm->SupportICType == ODM_RTL8192E)) + odm_RSSIDumpToRegister(pDM_Odm); + + { + PADAPTER pLoopAdapter = GetDefaultAdapter(Adapter); + s4Byte GlobalRSSI_min = 0xFF, LocalRSSI_Min; + BOOLEAN bLink= FALSE; + + while(pLoopAdapter) + { + LocalRSSI_Min = odm_FindMinimumRSSI(pLoopAdapter); + //DbgPrint("pHalData->bLinked=%d, LocalRSSI_Min=%d\n", pHalData->bLinked, LocalRSSI_Min); + if((LocalRSSI_Min < GlobalRSSI_min) && (LocalRSSI_Min != 0)) + GlobalRSSI_min = LocalRSSI_Min; + + if(pHalData->bLinked) + bLink = TRUE; + + pLoopAdapter = GetNextExtAdapter(pLoopAdapter); + } + + pHalData->bLinked = bLink; + ODM_CmnInfoUpdate(&pHalData->DM_OutSrc ,ODM_CMNINFO_LINK, (u8Byte)bLink); + ODM_CmnInfoUpdate(&pHalData->DM_OutSrc ,ODM_CMNINFO_RSSI_MIN, (u8Byte)GlobalRSSI_min); + + } + +#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +} + +#if(DM_ODM_SUPPORT_TYPE==ODM_CE) +// +//sherry move from DUSC to here 20110517 +// +static VOID +FindMinimumRSSI_Dmsp( + IN PADAPTER pAdapter +) +{ +#if 0 + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + s32 Rssi_val_min_back_for_mac0; + BOOLEAN bGetValueFromBuddyAdapter = dm_DualMacGetParameterFromBuddyAdapter(pAdapter); + BOOLEAN bRestoreRssi = _FALSE; + PADAPTER BuddyAdapter = pAdapter->BuddyAdapter; + + if(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY) + { + if(BuddyAdapter!= NULL) + { + if(pHalData->bSlaveOfDMSP) + { + //ODM_RT_TRACE(pDM_Odm,COMP_EASY_CONCURRENT,DBG_LOUD,("bSlavecase of dmsp\n")); + BuddyAdapter->DualMacDMSPControl.RssiValMinForAnotherMacOfDMSP = pdmpriv->MinUndecoratedPWDBForDM; + } + else + { + if(bGetValueFromBuddyAdapter) + { + //ODM_RT_TRACE(pDM_Odm,COMP_EASY_CONCURRENT,DBG_LOUD,("get new RSSI\n")); + bRestoreRssi = _TRUE; + Rssi_val_min_back_for_mac0 = pdmpriv->MinUndecoratedPWDBForDM; + pdmpriv->MinUndecoratedPWDBForDM = pAdapter->DualMacDMSPControl.RssiValMinForAnotherMacOfDMSP; + } + } + } + + } + + if(bRestoreRssi) + { + bRestoreRssi = _FALSE; + pdmpriv->MinUndecoratedPWDBForDM = Rssi_val_min_back_for_mac0; + } +#endif +} + +static void +FindMinimumRSSI( +IN PADAPTER pAdapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + PDM_ODM_T pDM_Odm = &(pHalData->odmpriv); + + //1 1.Determine the minimum RSSI + + if((pDM_Odm->bLinked != _TRUE) && + (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) + { + pdmpriv->MinUndecoratedPWDBForDM = 0; + //ODM_RT_TRACE(pDM_Odm,COMP_BB_POWERSAVING, DBG_LOUD, ("Not connected to any \n")); + } + else + { + pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB; + } + + //DBG_8192C("%s=>MinUndecoratedPWDBForDM(%d)\n",__FUNCTION__,pdmpriv->MinUndecoratedPWDBForDM); + //ODM_RT_TRACE(pDM_Odm,COMP_DIG, DBG_LOUD, ("MinUndecoratedPWDBForDM =%d\n",pHalData->MinUndecoratedPWDBForDM)); +} +#endif + +VOID +odm_RSSIMonitorCheckCE( + IN PVOID pDM_VOID + ) +{ +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_priv *pdmpriv = &pHalData->dmpriv; + struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter); + int i; + int tmpEntryMaxPWDB=0, tmpEntryMinPWDB=0xff; + u8 sta_cnt=0; + u32 UL_DL_STATE = 0, STBC_TX = 0, TxBF_EN = 0; + u32 PWDB_rssi[NUM_STA]={0};//[0~15]:MACID, [16~31]:PWDB_rssi + BOOLEAN FirstConnect = FALSE; + pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; + + if(pDM_Odm->bLinked != _TRUE) + return; + + #if((RTL8812A_SUPPORT==1)||(RTL8821A_SUPPORT==1)) + if((pDM_Odm->SupportICType == ODM_RTL8812)||(pDM_Odm->SupportICType == ODM_RTL8821)) + { + u64 curTxOkCnt = pdvobjpriv->traffic_stat.cur_tx_bytes; + u64 curRxOkCnt = pdvobjpriv->traffic_stat.cur_rx_bytes; + + if(curRxOkCnt >(curTxOkCnt*6)) + UL_DL_STATE = 1; + else + UL_DL_STATE = 0; + } + #endif + + FirstConnect = (pDM_Odm->bLinked) && (pRA_Table->firstconnect == FALSE); + pRA_Table->firstconnect = pDM_Odm->bLinked; + + //if(check_fwstate(&Adapter->mlmepriv, WIFI_AP_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) + { + #if 1 + struct sta_info *psta; + + for(i=0; ipODM_StaInfo[i])) + { + if(IS_MCAST( psta->hwaddr)) //if(psta->mac_id ==1) + continue; + + if(psta->rssi_stat.UndecoratedSmoothedPWDB == (-1)) + continue; + + if(psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) + tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; + + if(psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) + tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; + + #if 0 + DBG_871X("%s mac_id:%u, mac:"MAC_FMT", rssi:%d\n", __func__, + psta->mac_id, MAC_ARG(psta->hwaddr), psta->rssi_stat.UndecoratedSmoothedPWDB); + #endif + + if(psta->rssi_stat.UndecoratedSmoothedPWDB != (-1)) { + +#ifdef CONFIG_80211N_HT + if(pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8812) + { +#ifdef CONFIG_BEAMFORMING + BEAMFORMING_CAP Beamform_cap = beamforming_get_entry_beam_cap_by_mac_id(&Adapter->mlmepriv, psta->mac_id); + + if(Beamform_cap & (BEAMFORMER_CAP_HT_EXPLICIT |BEAMFORMER_CAP_VHT_SU)) + TxBF_EN = 1; + else + TxBF_EN = 0; + + if (TxBF_EN) { + STBC_TX = 0; + } + else +#endif + { +#ifdef CONFIG_80211AC_VHT + if(IsSupportedVHT(psta->wireless_mode)) + STBC_TX = TEST_FLAG(psta->vhtpriv.stbc_cap, STBC_VHT_ENABLE_TX); + else +#endif + STBC_TX = TEST_FLAG(psta->htpriv.stbc_cap, STBC_HT_ENABLE_TX); + } + } +#endif + + if(pDM_Odm->SupportICType == ODM_RTL8192D) + PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) | ((Adapter->stapriv.asoc_sta_count+1) << 8)); + else if ((pDM_Odm->SupportICType == ODM_RTL8192E)||(pDM_Odm->SupportICType == ODM_RTL8812)||(pDM_Odm->SupportICType == ODM_RTL8821)) + PWDB_rssi[sta_cnt++] = (((u8)(psta->mac_id&0xFF)) | ((psta->rssi_stat.UndecoratedSmoothedPWDB&0x7F)<<16) |(STBC_TX << 25) | (FirstConnect << 29) | (TxBF_EN << 30)); + else + PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) ); + } + } + } + #else + _irqL irqL; + _list *plist, *phead; + struct sta_info *psta; + struct sta_priv *pstapriv = &Adapter->stapriv; + u8 bcast_addr[ETH_ALEN]= {0xff,0xff,0xff,0xff,0xff,0xff}; + + _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); + + for(i=0; i< NUM_STA; i++) + { + phead = &(pstapriv->sta_hash[i]); + plist = get_next(phead); + + while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) + { + psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); + + plist = get_next(plist); + + if(_rtw_memcmp(psta->hwaddr, bcast_addr, ETH_ALEN) || + _rtw_memcmp(psta->hwaddr, myid(&Adapter->eeprompriv), ETH_ALEN)) + continue; + + if(psta->state & WIFI_ASOC_STATE) + { + + if(psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) + tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; + + if(psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) + tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; + + if(psta->rssi_stat.UndecoratedSmoothedPWDB != (-1)){ + //printk("%s==> mac_id(%d),rssi(%d)\n",__FUNCTION__,psta->mac_id,psta->rssi_stat.UndecoratedSmoothedPWDB); + #if(RTL8192D_SUPPORT==1) + PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) | ((Adapter->stapriv.asoc_sta_count+1) << 8)); + #else + PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16) ); + #endif + } + } + + } + + } + + _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); + #endif + + //printk("%s==> sta_cnt(%d)\n",__FUNCTION__,sta_cnt); + + for(i=0; i< sta_cnt; i++) + { + if(PWDB_rssi[i] != (0)){ + if(pHalData->fw_ractrl == _TRUE)// Report every sta's RSSI to FW + { + #if(RTL8192D_SUPPORT==1) + if(pDM_Odm->SupportICType == ODM_RTL8192D){ + FillH2CCmd92D(Adapter, H2C_RSSI_REPORT, 3, (u8 *)(&PWDB_rssi[i])); + } + #endif + + #if((RTL8192C_SUPPORT==1)||(RTL8723A_SUPPORT==1)) + if((pDM_Odm->SupportICType == ODM_RTL8192C)||(pDM_Odm->SupportICType == ODM_RTL8723A)){ + rtl8192c_set_rssi_cmd(Adapter, (u8*)&PWDB_rssi[i]); + } + #endif + + #if((RTL8812A_SUPPORT==1)||(RTL8821A_SUPPORT==1)) + if((pDM_Odm->SupportICType == ODM_RTL8812)||(pDM_Odm->SupportICType == ODM_RTL8821)){ + PWDB_rssi[i] |= (UL_DL_STATE << 24); + rtl8812_set_rssi_cmd(Adapter, (u8 *)(&PWDB_rssi[i])); + } + #endif + #if(RTL8192E_SUPPORT==1) + if(pDM_Odm->SupportICType == ODM_RTL8192E){ + rtl8192e_set_rssi_cmd(Adapter, (u8 *)(&PWDB_rssi[i])); + } + #endif + #if(RTL8723B_SUPPORT==1) + if(pDM_Odm->SupportICType == ODM_RTL8723B){ + rtl8723b_set_rssi_cmd(Adapter, (u8 *)(&PWDB_rssi[i])); + } + #endif + + #if(RTL8188E_SUPPORT==1) + if(pDM_Odm->SupportICType == ODM_RTL8188E){ + rtl8188e_set_rssi_cmd(Adapter, (u8 *)(&PWDB_rssi[i])); + } + #endif + + } + else{ + #if((RTL8188E_SUPPORT==1)&&(RATE_ADAPTIVE_SUPPORT == 1)) + if(pDM_Odm->SupportICType == ODM_RTL8188E){ + ODM_RA_SetRSSI_8188E( + &(pHalData->odmpriv), (PWDB_rssi[i]&0xFF), (u8)((PWDB_rssi[i]>>16) & 0xFF)); + } + #endif + } + } + } + } + + + + if(tmpEntryMaxPWDB != 0) // If associated entry is found + { + pdmpriv->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB; + } + else + { + pdmpriv->EntryMaxUndecoratedSmoothedPWDB = 0; + } + + if(tmpEntryMinPWDB != 0xff) // If associated entry is found + { + pdmpriv->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB; + } + else + { + pdmpriv->EntryMinUndecoratedSmoothedPWDB = 0; + } + + FindMinimumRSSI(Adapter);//get pdmpriv->MinUndecoratedPWDBForDM + + #if(RTL8192D_SUPPORT==1) + FindMinimumRSSI_Dmsp(Adapter); + #endif + pDM_Odm->RSSI_Min = pdmpriv->MinUndecoratedPWDBForDM; + //ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM); +#endif//if (DM_ODM_SUPPORT_TYPE == ODM_CE) +} + + +VOID +odm_RSSIMonitorCheckAP( + IN PVOID pDM_VOID + ) +{ +#if (DM_ODM_SUPPORT_TYPE == ODM_AP) +#if defined(CONFIG_RTL_92C_SUPPORT) || defined(CONFIG_RTL_92D_SUPPORT) ||defined(CONFIG_RTL_8812_SUPPORT)||defined(CONFIG_WLAN_HAL_8881A)||defined(CONFIG_WLAN_HAL_8192EE) + { + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + prtl8192cd_priv priv = pDM_Odm->priv; + u4Byte i; + PSTA_INFO_T pstat; + static u1Byte H2C_Parameter[5]; + u1Byte TxBF_EN = 0; + pBDC_T pDM_BdcTable = &pDM_Odm->DM_BdcTable; + + if( priv->up_time % 2 ) + return; + + pDM_BdcTable->num_Txbfee_Client=0; + pDM_BdcTable->num_Txbfer_Client=0; + //pDM_BdcTable->num_Client=0; + + for(i=0; ipODM_StaInfo[i]; + if(IS_STA_VALID(pstat) ) + { +#ifdef BEAMFORMING_SUPPORT + BEAMFORMING_CAP Beamform_cap = Beamforming_GetEntryBeamCapByMacId(priv, pstat->aid); + if(Beamform_cap == BEAMFORMER_CAP_HT_EXPLICIT || Beamform_cap == BEAMFORMER_CAP_VHT_SU || + Beamform_cap == (BEAMFORMER_CAP_HT_EXPLICIT|BEAMFORMEE_CAP_HT_EXPLICIT) || + Beamform_cap == (BEAMFORMER_CAP_VHT_SU|BEAMFORMEE_CAP_VHT_SU)) + { + TxBF_EN = (1<< 6); + pDM_BdcTable->w_BFee_Client[i]=1; //AP act as BFer + pDM_BdcTable->num_Txbfee_Client++; + } + else + { + pDM_BdcTable->w_BFee_Client[i]=0; //AP act as BFer + } + + if((Beamform_cap & BEAMFORMEE_CAP_HT_EXPLICIT) || (Beamform_cap & BEAMFORMEE_CAP_VHT_SU) ) + { + pDM_BdcTable->w_BFer_Client[i]=1; //AP act as BFee + pDM_BdcTable->num_Txbfer_Client++; + } + else + { + pDM_BdcTable->w_BFer_Client[i]=0; //AP act as BFer + } + + + //pDM_BdcTable->num_Client++; + + + +#endif +//#ifdef STA_EXT +// if (GET_CHIP_VER(priv)==VERSION_8812E && REMAP_AID(pstat) < (RTL8812_NUM_STAT - 1)) +//#endif + { +#ifdef CONFIG_RTL_8812_SUPPORT +#ifdef STA_EXT + if(REMAP_AID(pstat) < (RTL8812_NUM_STAT - 1)) +#endif + + if(pDM_Odm->SupportICType == ODM_RTL8812) { + memset(H2C_Parameter,0,5); + H2C_Parameter[2] = (u1Byte)(pstat->rssi & 0x7F); + H2C_Parameter[0] = REMAP_AID(pstat); + if ((priv->pmib->dot11nConfigEntry.dot11nSTBC) && ( + (pstat->ht_cap_buf.ht_cap_info & cpu_to_le16(_HTCAP_RX_STBC_CAP_) +#ifdef RTK_AC_SUPPORT + || (pstat->vht_cap_buf.vht_cap_info & cpu_to_le32(_VHTCAP_RX_STBC_CAP_)) +#endif + ))) + H2C_Parameter[3] |= 2; + H2C_Parameter[3] |= TxBF_EN ; + FillH2CCmd8812(pDM_Odm->priv, H2C_8812_RSSI_REPORT, 4, H2C_Parameter); + } +#endif + } +//#ifdef STA_EXT +// else if (GET_CHIP_VER(priv)!=VERSION_8812E && REMAP_AID(pstat) < (FW_NUM_STAT - 1)) +//#endif + { +#if defined(CONFIG_WLAN_HAL_8881A) || defined(CONFIG_WLAN_HAL_8192EE) +#ifdef STA_EXT + if(REMAP_AID(pstat) < (RTL8812_NUM_STAT - 1)) +#endif + if(pDM_Odm->SupportICType == ODM_RTL8881A || pDM_Odm->SupportICType == ODM_RTL8192E) { +// u1Byte H2C_Parameter[5] ={0}; + u1Byte cmdlen = 3; + memset(H2C_Parameter, 0, 5); + H2C_Parameter[2] = (u1Byte)(pstat->rssi & 0xFF); + H2C_Parameter[0] = REMAP_AID(pstat); + if(pDM_Odm->SupportICType == ODM_RTL8192E) { + cmdlen = 4; + if ((priv->pmib->dot11nConfigEntry.dot11nSTBC) && (pstat->ht_cap_buf.ht_cap_info & cpu_to_le16(_HTCAP_RX_STBC_CAP_))) + H2C_Parameter[3] |= 2; + H2C_Parameter[3] |= TxBF_EN; + + } + GET_HAL_INTERFACE(pDM_Odm->priv)->FillH2CCmdHandler(pDM_Odm->priv, H2C_88XX_RSSI_REPORT, cmdlen, H2C_Parameter); + } +#endif + +#if defined(CONFIG_RTL_92C_SUPPORT) || defined(CONFIG_RTL_92D_SUPPORT) +#ifdef STA_EXT + if(REMAP_AID(pstat) < (FW_NUM_STAT - 1)) +#endif + if(pDM_Odm->SupportICType == ODM_RTL8192C || pDM_Odm->SupportICType == ODM_RTL8192D) + add_update_rssi(pDM_Odm->priv, pstat); +#endif + } + + } + } + } +#endif +#endif + +} + + + + + +VOID +odm_RateAdaptiveMaskInit( + IN PVOID pDM_VOID + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + PODM_RATE_ADAPTIVE pOdmRA = &pDM_Odm->RateAdaptive; + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PMGNT_INFO pMgntInfo = &pDM_Odm->Adapter->MgntInfo; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pDM_Odm->Adapter); + + pMgntInfo->Ratr_State = DM_RATR_STA_INIT; + + if (pMgntInfo->DM_Type == DM_Type_ByDriver) + pHalData->bUseRAMask = TRUE; + else + pHalData->bUseRAMask = FALSE; + +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) + pOdmRA->Type = DM_Type_ByDriver; + if (pOdmRA->Type == DM_Type_ByDriver) + pDM_Odm->bUseRAMask = _TRUE; + else + pDM_Odm->bUseRAMask = _FALSE; +#endif + + pOdmRA->RATRState = DM_RATR_STA_INIT; + +#if(DM_ODM_SUPPORT_TYPE & ODM_WIN) + if(pDM_Odm->SupportICType == ODM_RTL8812) + pOdmRA->LdpcThres = 50; + else + pOdmRA->LdpcThres = 35; + + pOdmRA->RtsThres = 35; + +#elif(DM_ODM_SUPPORT_TYPE & ODM_CE) + pOdmRA->LdpcThres = 35; + pOdmRA->bUseLdpc = FALSE; + +#else + pOdmRA->UltraLowRSSIThresh = 9; + +#endif + + pOdmRA->HighRSSIThresh = 50; + pOdmRA->LowRSSIThresh = 20; +} +/*----------------------------------------------------------------------------- + * Function: odm_RefreshRateAdaptiveMask() + * + * Overview: Update rate table mask according to rssi + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 05/27/2009 hpfan Create Version 0. + * + *---------------------------------------------------------------------------*/ +VOID +odm_RefreshRateAdaptiveMask( + IN PVOID pDM_VOID + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("odm_RefreshRateAdaptiveMask()---------->\n")); + if (!(pDM_Odm->SupportAbility & ODM_BB_RA_MASK)) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("odm_RefreshRateAdaptiveMask(): Return cos not supported\n")); + return; + } + // + // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate + // at the same time. In the stage2/3, we need to prive universal interface and merge all + // HW dynamic mechanism. + // + switch (pDM_Odm->SupportPlatform) + { + case ODM_WIN: + odm_RefreshRateAdaptiveMaskMP(pDM_Odm); + break; + + case ODM_CE: + odm_RefreshRateAdaptiveMaskCE(pDM_Odm); + break; + + case ODM_AP: + case ODM_ADSL: + odm_RefreshRateAdaptiveMaskAPADSL(pDM_Odm); + break; + } + +} + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +VOID +odm_RefreshLdpcRtsMP( + IN PADAPTER pAdapter, + IN PDM_ODM_T pDM_Odm, + IN u1Byte mMacId, + IN u1Byte IOTPeer, + IN s4Byte UndecoratedSmoothedPWDB + ) +{ + BOOLEAN bCtlLdpc = FALSE; + PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(pAdapter); + PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive; + + if(pDM_Odm->SupportICType != ODM_RTL8821 && pDM_Odm->SupportICType != ODM_RTL8812) + return; + + if((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A)) + bCtlLdpc = TRUE; + else if( pDM_Odm->SupportICType == ODM_RTL8812 && + IOTPeer == HT_IOT_PEER_REALTEK_JAGUAR_CCUTAP) + bCtlLdpc = TRUE; + + if(bCtlLdpc) + { + if(UndecoratedSmoothedPWDB < (pRA->LdpcThres-5)) + MgntSet_TX_LDPC(pAdapter, mMacId, TRUE); + else if(UndecoratedSmoothedPWDB > pRA->LdpcThres) + MgntSet_TX_LDPC(pAdapter, mMacId, FALSE); + } + + if(UndecoratedSmoothedPWDB < (pRA->RtsThres-5)) + pRA->bLowerRtsRate = TRUE; + else if(UndecoratedSmoothedPWDB > pRA->RtsThres) + pRA->bLowerRtsRate = FALSE; +} +#endif + + +VOID +odm_RefreshRateAdaptiveMaskMP( + IN PVOID pDM_VOID + ) +{ +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + PADAPTER pAdapter = pDM_Odm->Adapter; + PADAPTER pTargetAdapter = NULL; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(pAdapter); + + if(pAdapter->bDriverStopped) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n")); + return; + } + + if(!pHalData->bUseRAMask) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n")); + return; + } + + // if default port is connected, update RA table for default port (infrastructure mode only) + if(pMgntInfo->mAssoc && (!ACTING_AS_AP(pAdapter))) + { + odm_RefreshLdpcRtsMP(pAdapter, pDM_Odm, pMgntInfo->mMacId, pMgntInfo->IOTPeer, pHalData->UndecoratedSmoothedPWDB); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("odm_RefreshRateAdaptiveMask(): Infrasture Mode\n")); + if( ODM_RAStateCheck(pDM_Odm, pHalData->UndecoratedSmoothedPWDB, pMgntInfo->bSetTXPowerTrainingByOid, &pMgntInfo->Ratr_State) ) + { + ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pHalData->UndecoratedSmoothedPWDB, pMgntInfo->Ratr_State)); + pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, pMgntInfo->Ratr_State); + } + else if(pDM_Odm->bChangeState) + { + ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training State, bDisablePowerTraining = %d\n", pDM_Odm->bDisablePowerTraining)); + pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, pMgntInfo->Ratr_State); + } + } + + // + // The following part configure AP/VWifi/IBSS rate adaptive mask. + // + + if(pMgntInfo->mIbss) // Target: AP/IBSS peer. + pTargetAdapter = GetDefaultAdapter(pAdapter); + else + pTargetAdapter = GetFirstAPAdapter(pAdapter); + + // if extension port (softap) is started, updaet RA table for more than one clients associate + if(pTargetAdapter != NULL) + { + int i; + PRT_WLAN_STA pEntry; + + for(i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) + { + pEntry = AsocEntry_EnumStation(pTargetAdapter, i); + if(NULL != pEntry) + { + if(pEntry->bAssociated) + { + odm_RefreshLdpcRtsMP(pAdapter, pDM_Odm, pEntry->AssociatedMacId, pEntry->IOTPeer, pEntry->rssi_stat.UndecoratedSmoothedPWDB); + + if(ODM_RAStateCheck(pDM_Odm, pEntry->rssi_stat.UndecoratedSmoothedPWDB, pMgntInfo->bSetTXPowerTrainingByOid, &pEntry->Ratr_State) ) + { + ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), pEntry->MacAddr); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pEntry->rssi_stat.UndecoratedSmoothedPWDB, pEntry->Ratr_State)); + pAdapter->HalFunc.UpdateHalRAMaskHandler(pTargetAdapter, pEntry->AssociatedMacId, pEntry, pEntry->Ratr_State); + } + else if(pDM_Odm->bChangeState) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Change Power Training State, bDisablePowerTraining = %d\n", pDM_Odm->bDisablePowerTraining)); + pAdapter->HalFunc.UpdateHalRAMaskHandler(pAdapter, pMgntInfo->mMacId, NULL, pMgntInfo->Ratr_State); + } + } + } + } + } + + if(pMgntInfo->bSetTXPowerTrainingByOid) + pMgntInfo->bSetTXPowerTrainingByOid = FALSE; +#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +} + + + +VOID +odm_RefreshRateAdaptiveMaskCE( + IN PVOID pDM_VOID + ) +{ +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + u1Byte i; + PADAPTER pAdapter = pDM_Odm->Adapter; + PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive; + + if(pAdapter->bDriverStopped) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n")); + return; + } + + if(!pDM_Odm->bUseRAMask) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n")); + return; + } + + //printk("==> %s \n",__FUNCTION__); + + for(i=0; ipODM_StaInfo[i]; + if(IS_STA_VALID(pstat) ) { + if(IS_MCAST( pstat->hwaddr)) //if(psta->mac_id ==1) + continue; + if(IS_MCAST( pstat->hwaddr)) + continue; + + #if((RTL8812A_SUPPORT==1)||(RTL8821A_SUPPORT==1)) + if((pDM_Odm->SupportICType == ODM_RTL8812)||(pDM_Odm->SupportICType == ODM_RTL8821)) + { + if(pstat->rssi_stat.UndecoratedSmoothedPWDB < pRA->LdpcThres) + { + pRA->bUseLdpc = TRUE; + pRA->bLowerRtsRate = TRUE; + if((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A)) + Set_RA_LDPC_8812(pstat, TRUE); + //DbgPrint("RSSI=%d, bUseLdpc = TRUE\n", pHalData->UndecoratedSmoothedPWDB); + } + else if(pstat->rssi_stat.UndecoratedSmoothedPWDB > (pRA->LdpcThres-5)) + { + pRA->bUseLdpc = FALSE; + pRA->bLowerRtsRate = FALSE; + if((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->CutVersion == ODM_CUT_A)) + Set_RA_LDPC_8812(pstat, FALSE); + //DbgPrint("RSSI=%d, bUseLdpc = FALSE\n", pHalData->UndecoratedSmoothedPWDB); + } + } + #endif + + if( TRUE == ODM_RAStateCheck(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, FALSE , &pstat->rssi_level) ) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level)); + //printk("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level); + rtw_hal_update_ra_mask(pstat, pstat->rssi_level); + } + + } + } + +#endif +} + +VOID +odm_RefreshRateAdaptiveMaskAPADSL( + IN PVOID pDM_VOID + ) +{ +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + struct rtl8192cd_priv *priv = pDM_Odm->priv; + struct aid_obj *aidarray; + u4Byte i; + PSTA_INFO_T pstat; + + if(priv->up_time % 2) + return; + + for(i=0; ipODM_StaInfo[i]; + + if(IS_STA_VALID(pstat) ) + { +#if defined(UNIVERSAL_REPEATER) || defined(MBSSID) + aidarray = container_of(pstat, struct aid_obj, station); + priv = aidarray->priv; +#endif + + if (!priv->pmib->dot11StationConfigEntry.autoRate) + continue; + + if(ODM_RAStateCheck(pDM_Odm, (s4Byte)pstat->rssi, FALSE, &pstat->rssi_level) ) { + ODM_PRINT_ADDR(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("Target STA addr : "), pstat->hwaddr); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi, pstat->rssi_level)); + +#if defined(CONFIG_PCI_HCI) +#ifdef CONFIG_WLAN_HAL + if (IS_HAL_CHIP(priv)) { +#ifdef WDS + if(!(pstat->state & WIFI_WDS))//if WDS donot setting +#endif + GET_HAL_INTERFACE(priv)->UpdateHalRAMaskHandler(priv, pstat, pstat->rssi_level); + } else +#endif +#ifdef CONFIG_RTL_8812_SUPPORT + if(GET_CHIP_VER(priv)== VERSION_8812E) { + UpdateHalRAMask8812(priv, pstat, 3); + } else +#endif +#ifdef CONFIG_RTL_88E_SUPPORT + if (GET_CHIP_VER(priv)==VERSION_8188E) { +#ifdef TXREPORT + add_RATid(priv, pstat); +#endif + } else +#endif + { +#if defined(CONFIG_RTL_92D_SUPPORT) || defined(CONFIG_RTL_92C_SUPPORT) + add_update_RATid(priv, pstat); +#endif + } +#elif defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + update_STA_RATid(priv, pstat); +#endif + } + } + } +#endif +} + + + +// Return Value: BOOLEAN +// - TRUE: RATRState is changed. +BOOLEAN +ODM_RAStateCheck( + IN PVOID pDM_VOID, + IN s4Byte RSSI, + IN BOOLEAN bForceUpdate, + OUT pu1Byte pRATRState + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + PODM_RATE_ADAPTIVE pRA = &pDM_Odm->RateAdaptive; + const u1Byte GoUpGap = 5; + u1Byte HighRSSIThreshForRA = pRA->HighRSSIThresh; + u1Byte LowRSSIThreshForRA = pRA->LowRSSIThresh; + u1Byte RATRState; + + // Threshold Adjustment: + // when RSSI state trends to go up one or two levels, make sure RSSI is high enough. + // Here GoUpGap is added to solve the boundary's level alternation issue. +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + u1Byte UltraLowRSSIThreshForRA = pRA->UltraLowRSSIThresh; + if(pDM_Odm->SupportICType == ODM_RTL8881A) + LowRSSIThreshForRA = 30; // for LDPC / BCC switch +#endif + + switch (*pRATRState) + { + case DM_RATR_STA_INIT: + case DM_RATR_STA_HIGH: + break; + + case DM_RATR_STA_MIDDLE: + HighRSSIThreshForRA += GoUpGap; + break; + + case DM_RATR_STA_LOW: + HighRSSIThreshForRA += GoUpGap; + LowRSSIThreshForRA += GoUpGap; + break; + +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + case DM_RATR_STA_ULTRA_LOW: + HighRSSIThreshForRA += GoUpGap; + LowRSSIThreshForRA += GoUpGap; + UltraLowRSSIThreshForRA += GoUpGap; + break; +#endif + + default: + ODM_RT_ASSERT(pDM_Odm, FALSE, ("wrong rssi level setting %d !", *pRATRState) ); + break; + } + + // Decide RATRState by RSSI. + if(RSSI > HighRSSIThreshForRA) + RATRState = DM_RATR_STA_HIGH; + else if(RSSI > LowRSSIThreshForRA) + RATRState = DM_RATR_STA_MIDDLE; + +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + else if(RSSI > UltraLowRSSIThreshForRA) + RATRState = DM_RATR_STA_LOW; + else + RATRState = DM_RATR_STA_ULTRA_LOW; +#else + else + RATRState = DM_RATR_STA_LOW; +#endif + //printk("==>%s,RATRState:0x%02x ,RSSI:%d \n",__FUNCTION__,RATRState,RSSI); + + if( *pRATRState!=RATRState || bForceUpdate) + { + ODM_RT_TRACE( pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI Level %d -> %d\n", *pRATRState, RATRState) ); + *pRATRState = RATRState; + return TRUE; + } + + return FALSE; +} + +#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) +VOID +odm_RefreshBasicRateMask( + IN PVOID pDM_VOID + ) +{ +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + PADAPTER Adapter = pDM_Odm->Adapter; + static u1Byte Stage = 0; + u1Byte CurStage = 0; + OCTET_STRING osRateSet; + PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(Adapter); + u1Byte RateSet[5] = {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M, MGN_6M}; + + if(pDM_Odm->SupportICType != ODM_RTL8812 && pDM_Odm->SupportICType != ODM_RTL8821 ) + return; + + if(pDM_Odm->bLinked == FALSE) // unlink Default port information + CurStage = 0; + else if(pDM_Odm->RSSI_Min < 40) // link RSSI < 40% + CurStage = 1; + else if(pDM_Odm->RSSI_Min > 45) // link RSSI > 45% + CurStage = 3; + else + CurStage = 2; // link 25% <= RSSI <= 30% + + if(CurStage != Stage) + { + if(CurStage == 1) + { + FillOctetString(osRateSet, RateSet, 5); + FilterSupportRate(pMgntInfo->mBrates, &osRateSet, FALSE); + Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_BASIC_RATE, (pu1Byte)&osRateSet); + } + else if(CurStage == 3 && (Stage == 1 || Stage == 2)) + { + Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_BASIC_RATE, (pu1Byte)(&pMgntInfo->mBrates) ); + } + } + + Stage = CurStage; +#endif +} +#endif //#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +VOID +ODM_DynamicARFBSelect( + IN PVOID pDM_VOID, + IN u1Byte rate, + IN BOOLEAN Collision_State +) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + pRA_T pRA_Table = &pDM_Odm->DM_RA_Table; + + if(pDM_Odm->SupportICType != ODM_RTL8192E) + return; + + if(Collision_State == pRA_Table->PT_collision_pre) + return; + + if (rate >= DESC_RATEMCS8 && rate <= DESC_RATEMCS12){ + if (Collision_State == 1){ + if(rate == DESC_RATEMCS12){ + + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060501); + } + else if(rate == DESC_RATEMCS11){ + + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07070605); + } + else if(rate == DESC_RATEMCS10){ + + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08080706); + } + else if(rate == DESC_RATEMCS9){ + + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08080707); + } + else{ + + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x0); + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09090808); + } + } + else{ // Collision_State == 0 + if(rate == DESC_RATEMCS12){ + + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x05010000); + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080706); + } + else if(rate == DESC_RATEMCS11){ + + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x06050000); + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080807); + } + else if(rate == DESC_RATEMCS10){ + + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x07060000); + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0a090908); + } + else if(rate == DESC_RATEMCS9){ + + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x07070000); + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0a090808); + } + else{ + + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x08080000); + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x0b0a0909); + } + } + } + else{ // MCS13~MCS15, 1SS, G-mode + if (Collision_State == 1){ + if(rate == DESC_RATEMCS15){ + + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000); + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x05040302); + } + else if(rate == DESC_RATEMCS14){ + + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000); + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x06050302); + } + else if(rate == DESC_RATEMCS13){ + + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000); + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060502); + } + else{ + + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x00000000); + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x06050402); + } + } + else{ // Collision_State == 0 + if(rate == DESC_RATEMCS15){ + + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x03020000); + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x07060504); + } + else if(rate == DESC_RATEMCS14){ + + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x03020000); + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08070605); + } + else if(rate == DESC_RATEMCS13){ + + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x05020000); + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x09080706); + } + else{ + + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E, 0x04020000); + ODM_Write4Byte(pDM_Odm, REG_DARFRC_8192E+4, 0x08070605); + } + + + } + + } + pRA_Table->PT_collision_pre = Collision_State; +} + +VOID +ODM_RateAdaptiveStateApInit( + IN PVOID PADAPTER_VOID, + IN PRT_WLAN_STA pEntry + ) +{ + PADAPTER Adapter = (PADAPTER)PADAPTER_VOID; + pEntry->Ratr_State = DM_RATR_STA_INIT; +} +#endif //#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + + +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) +u4Byte +ODM_Get_Rate_Bitmap( + IN PVOID pDM_VOID, + IN u4Byte macid, + IN u4Byte ra_mask, + IN u1Byte rssi_level + ) +{ + PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID; + PSTA_INFO_T pEntry; + u4Byte rate_bitmap = 0; + u1Byte WirelessMode; + //u1Byte WirelessMode =*(pDM_Odm->pWirelessMode); + + + pEntry = pDM_Odm->pODM_StaInfo[macid]; + if(!IS_STA_VALID(pEntry)) + return ra_mask; + + WirelessMode = pEntry->wireless_mode; + + switch(WirelessMode) + { + case ODM_WM_B: + if(ra_mask & 0x0000000c) //11M or 5.5M enable + rate_bitmap = 0x0000000d; + else + rate_bitmap = 0x0000000f; + break; + + case (ODM_WM_G): + case (ODM_WM_A): + if(rssi_level == DM_RATR_STA_HIGH) + rate_bitmap = 0x00000f00; + else + rate_bitmap = 0x00000ff0; + break; + + case (ODM_WM_B|ODM_WM_G): + if(rssi_level == DM_RATR_STA_HIGH) + rate_bitmap = 0x00000f00; + else if(rssi_level == DM_RATR_STA_MIDDLE) + rate_bitmap = 0x00000ff0; + else + rate_bitmap = 0x00000ff5; + break; + + case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G) : + case (ODM_WM_B|ODM_WM_N24G) : + case (ODM_WM_G|ODM_WM_N24G) : + case (ODM_WM_A|ODM_WM_N5G) : + { + if ( pDM_Odm->RFType == ODM_1T2R ||pDM_Odm->RFType == ODM_1T1R) + { + if(rssi_level == DM_RATR_STA_HIGH) + { + rate_bitmap = 0x000f0000; + } + else if(rssi_level == DM_RATR_STA_MIDDLE) + { + rate_bitmap = 0x000ff000; + } + else{ + if (*(pDM_Odm->pBandWidth) == ODM_BW40M) + rate_bitmap = 0x000ff015; + else + rate_bitmap = 0x000ff005; + } + } + else + { + if(rssi_level == DM_RATR_STA_HIGH) + { + rate_bitmap = 0x0f8f0000; + } + else if(rssi_level == DM_RATR_STA_MIDDLE) + { + rate_bitmap = 0x0f8ff000; + } + else + { + if (*(pDM_Odm->pBandWidth) == ODM_BW40M) + rate_bitmap = 0x0f8ff015; + else + rate_bitmap = 0x0f8ff005; + } + } + } + break; + + case (ODM_WM_AC|ODM_WM_G): + if(rssi_level == 1) + rate_bitmap = 0xfc3f0000; + else if(rssi_level == 2) + rate_bitmap = 0xfffff000; + else + rate_bitmap = 0xffffffff; + break; + + case (ODM_WM_AC|ODM_WM_A): + + if (pDM_Odm->RFType == RF_1T1R) + { + if(rssi_level == 1) // add by Gary for ac-series + rate_bitmap = 0x003f8000; + else if (rssi_level == 2) + rate_bitmap = 0x003ff000; + else + rate_bitmap = 0x003ff010; + } + else + { + if(rssi_level == 1) // add by Gary for ac-series + rate_bitmap = 0xfe3f8000; // VHT 2SS MCS3~9 + else if (rssi_level == 2) + rate_bitmap = 0xfffff000; // VHT 2SS MCS0~9 + else + rate_bitmap = 0xfffff010; // All + } + break; + + default: + if(pDM_Odm->RFType == RF_1T2R) + rate_bitmap = 0x000fffff; + else + rate_bitmap = 0x0fffffff; + break; + + } + + //printk("%s ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x \n",__FUNCTION__,rssi_level,WirelessMode,rate_bitmap); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x \n",rssi_level,WirelessMode,rate_bitmap)); + + return (ra_mask&rate_bitmap); + +} + +#endif //#if (DM_ODM_SUPPORT_TYPE == ODM_CE) \ No newline at end of file diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_RaInfo.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_RaInfo.h new file mode 100755 index 000000000000..778780780492 --- /dev/null +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_RaInfo.h @@ -0,0 +1,169 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +#ifndef __ODMRAINFO_H__ +#define __ODMRAINFO_H__ + +#define AP_InitRateAdaptiveState ODM_RateAdaptiveStateApInit + +#define DM_RATR_STA_INIT 0 +#define DM_RATR_STA_HIGH 1 +#define DM_RATR_STA_MIDDLE 2 +#define DM_RATR_STA_LOW 3 +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) +#define DM_RATR_STA_ULTRA_LOW 4 +#endif + +#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) +typedef struct _Rate_Adaptive_Table_{ + u1Byte firstconnect; + #if(DM_ODM_SUPPORT_TYPE==ODM_WIN) + BOOLEAN PT_collision_pre; + #endif +}RA_T, *pRA_T; +#endif + + +typedef struct _ODM_RATE_ADAPTIVE +{ + u1Byte Type; // DM_Type_ByFW/DM_Type_ByDriver + u1Byte HighRSSIThresh; // if RSSI > HighRSSIThresh => RATRState is DM_RATR_STA_HIGH + u1Byte LowRSSIThresh; // if RSSI <= LowRSSIThresh => RATRState is DM_RATR_STA_LOW + u1Byte RATRState; // Current RSSI level, DM_RATR_STA_HIGH/DM_RATR_STA_MIDDLE/DM_RATR_STA_LOW + + #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) + u1Byte LdpcThres; // if RSSI > LdpcThres => switch from LPDC to BCC + BOOLEAN bLowerRtsRate; + #endif + + #if(DM_ODM_SUPPORT_TYPE & ODM_WIN) + u1Byte RtsThres; + #elif(DM_ODM_SUPPORT_TYPE & ODM_CE) + BOOLEAN bUseLdpc; + #else + u1Byte UltraLowRSSIThresh; + u4Byte LastRATR; // RATR Register Content + #endif + +} ODM_RATE_ADAPTIVE, *PODM_RATE_ADAPTIVE; + +#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) +VOID +odm_RSSIMonitorInit( + IN PVOID pDM_VOID + ); +#endif + +VOID +odm_RSSIMonitorCheck( + IN PVOID pDM_VOID + ); + +#if(DM_ODM_SUPPORT_TYPE==ODM_WIN) +VOID +odm_RSSIDumpToRegister( + IN PVOID pDM_VOID + ); +#endif + +VOID +odm_RSSIMonitorCheckMP( + IN PVOID pDM_VOID + ); + +VOID +odm_RSSIMonitorCheckCE( + IN PVOID pDM_VOID + ); + +VOID +odm_RSSIMonitorCheckAP( + IN PVOID pDM_VOID + ); + + +VOID +odm_RateAdaptiveMaskInit( + IN PVOID pDM_VOID + ); + +VOID +odm_RefreshRateAdaptiveMask( + IN PVOID pDM_VOID + ); + +VOID +odm_RefreshRateAdaptiveMaskMP( + IN PVOID pDM_VOID + ); + +VOID +odm_RefreshRateAdaptiveMaskCE( + IN PVOID pDM_VOID + ); + +VOID +odm_RefreshRateAdaptiveMaskAPADSL( + IN PVOID pDM_VOID + ); + +BOOLEAN +ODM_RAStateCheck( + IN PVOID pDM_VOID, + IN s4Byte RSSI, + IN BOOLEAN bForceUpdate, + OUT pu1Byte pRATRState + ); + +#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) +VOID +odm_RefreshBasicRateMask( + IN PVOID pDM_VOID + ); +#endif + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +VOID +ODM_DynamicARFBSelect( + IN PVOID pDM_VOID, + IN u1Byte rate, + IN BOOLEAN Collision_State + ); + +VOID +ODM_RateAdaptiveStateApInit( + IN PVOID PADAPTER_VOID, + IN PRT_WLAN_STA pEntry + ); +#endif + +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) +u4Byte +ODM_Get_Rate_Bitmap( + IN PVOID pDM_VOID, + IN u4Byte macid, + IN u4Byte ra_mask, + IN u1Byte rssi_level + ); +#endif + +#endif //#ifndef __ODMRAINFO_H__ + + diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_RegDefine11AC.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_RegDefine11AC.h old mode 100644 new mode 100755 index 1193653a5272..855aa161b8ed --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_RegDefine11AC.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_RegDefine11AC.h @@ -29,19 +29,36 @@ //PAGE 8 #define ODM_REG_CCK_RPT_FORMAT_11AC 0x804 #define ODM_REG_BB_RX_PATH_11AC 0x808 +#define ODM_REG_BB_ATC_11AC 0x860 +#define ODM_REG_DBG_RPT_11AC 0x8fc //PAGE 9 #define ODM_REG_OFDM_FA_RST_11AC 0x9A4 +#define ODM_REG_NHM_TIMER_11AC 0x990 +#define ODM_REG_NHM_TH9_TH10_11AC 0x994 +#define ODM_REG_NHM_TH3_TO_TH0_11AC 0x998 +#define ODM_REG_NHM_TH7_TO_TH4_11AC 0x99c +#define ODM_REG_NHM_TH8_11AC 0x9a0 +#define ODM_REG_NHM_9E8_11AC 0x9e8 //PAGE A #define ODM_REG_CCK_CCA_11AC 0xA0A #define ODM_REG_CCK_FA_RST_11AC 0xA2C #define ODM_REG_CCK_FA_11AC 0xA5C +//PAGE B +#define ODM_REG_RST_RPT_11AC 0xB58 //PAGE C +#define ODM_REG_TRMUX_11AC 0xC08 #define ODM_REG_IGI_A_11AC 0xC50 //PAGE E #define ODM_REG_IGI_B_11AC 0xE50 //PAGE F +#define ODM_REG_CCK_CCA_CNT_11AC 0xF08 #define ODM_REG_OFDM_FA_11AC 0xF48 - +#define ODM_REG_RPT_11AC 0xfa0 +#define ODM_REG_NHM_CNT_11AC 0xfa8 +//PAGE 18 +#define ODM_REG_IGI_C_11AC 0x1850 +//PAGE 1A +#define ODM_REG_IGI_D_11AC 0x1A50 //2 MAC REG LIST #define ODM_REG_RESP_TX_11AC 0x6D8 @@ -52,6 +69,7 @@ #define ODM_BIT_IGI_11AC 0xFFFFFFFF #define ODM_BIT_CCK_RPT_FORMAT_11AC BIT16 #define ODM_BIT_BB_RX_PATH_11AC 0xF +#define ODM_BIT_BB_ATC_11AC BIT14 #endif diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_RegDefine11N.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_RegDefine11N.h old mode 100644 new mode 100755 index b6236092fb5a..c6e4b186f27b --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_RegDefine11N.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_RegDefine11N.h @@ -44,20 +44,27 @@ #define ODM_REG_RF_PIN_11N 0x804 #define ODM_REG_PSD_CTRL_11N 0x808 #define ODM_REG_TX_ANT_CTRL_11N 0x80C -#define ODM_REG_BB_PWR_SAV5_11N 0x818 +#define ODM_REG_BB_PWR_SAV5_11N 0x818 #define ODM_REG_CCK_RPT_FORMAT_11N 0x824 #define ODM_REG_RX_DEFUALT_A_11N 0x858 #define ODM_REG_RX_DEFUALT_B_11N 0x85A -#define ODM_REG_BB_PWR_SAV3_11N 0x85C +#define ODM_REG_BB_PWR_SAV3_11N 0x85C #define ODM_REG_ANTSEL_CTRL_11N 0x860 #define ODM_REG_RX_ANT_CTRL_11N 0x864 #define ODM_REG_PIN_CTRL_11N 0x870 -#define ODM_REG_BB_PWR_SAV1_11N 0x874 +#define ODM_REG_BB_PWR_SAV1_11N 0x874 #define ODM_REG_ANTSEL_PATH_11N 0x878 #define ODM_REG_BB_3WIRE_11N 0x88C #define ODM_REG_SC_CNT_11N 0x8C4 -#define ODM_REG_PSD_DATA_11N 0x8B4 +#define ODM_REG_PSD_DATA_11N 0x8B4 +#define ODM_REG_PSD_DATA_11N 0x8B4 +#define ODM_REG_NHM_TIMER_11N 0x894 +#define ODM_REG_NHM_TH9_TH10_11N 0x890 +#define ODM_REG_NHM_TH3_TO_TH0_11N 0x898 +#define ODM_REG_NHM_TH7_TO_TH4_11N 0x89c +#define ODM_REG_NHM_CNT_11N 0x8d8 //PAGE 9 +#define ODM_REG_DBG_RPT_11N 0x908 #define ODM_REG_ANT_MAPPING1_11N 0x914 #define ODM_REG_ANT_MAPPING2_11N 0x918 //PAGE A @@ -78,7 +85,7 @@ #define ODM_REG_CCK_FA_MSB_11N 0xA58 #define ODM_REG_CCK_FA_LSB_11N 0xA5C #define ODM_REG_CCK_CCA_CNT_11N 0xA60 -#define ODM_REG_BB_PWR_SAV4_11N 0xA74 +#define ODM_REG_BB_PWR_SAV4_11N 0xA74 //PAGE B #define ODM_REG_LNA_SWITCH_11N 0xB2C #define ODM_REG_PATH_SWITCH_11N 0xB30 @@ -90,9 +97,9 @@ #define ODM_REG_BB_RX_PATH_11N 0xC04 #define ODM_REG_TRMUX_11N 0xC08 #define ODM_REG_OFDM_FA_RSTC_11N 0xC0C -#define ODM_REG_RXIQI_MATRIX_11N 0xC14 +#define ODM_REG_RXIQI_MATRIX_11N 0xC14 #define ODM_REG_TXIQK_MATRIX_LSB1_11N 0xC4C -#define ODM_REG_IGI_A_11N 0xC50 +#define ODM_REG_IGI_A_11N 0xC50 #define ODM_REG_ANTDIV_PARA2_11N 0xC54 #define ODM_REG_IGI_B_11N 0xC58 #define ODM_REG_ANTDIV_PARA3_11N 0xC5C @@ -108,9 +115,11 @@ #define ODM_REG_OFDM_FA_TYPE1_11N 0xCF0 //PAGE D #define ODM_REG_OFDM_FA_RSTD_11N 0xD00 +#define ODM_REG_BB_ATC_11N 0xD2C #define ODM_REG_OFDM_FA_TYPE2_11N 0xDA0 #define ODM_REG_OFDM_FA_TYPE3_11N 0xDA4 #define ODM_REG_OFDM_FA_TYPE4_11N 0xDA8 +#define ODM_REG_RPT_11N 0xDF4 //PAGE E #define ODM_REG_TXAGC_A_6_18_11N 0xE00 #define ODM_REG_TXAGC_A_24_54_11N 0xE04 @@ -143,12 +152,8 @@ #define ODM_REG_STANDBY_11N 0xEDC #define ODM_REG_SLEEP_11N 0xEE0 #define ODM_REG_PMPD_ANAEN_11N 0xEEC - - - - - - +#define ODM_REG_IGI_C_11N 0xF84 +#define ODM_REG_IGI_D_11N 0xF88 //2 MAC REG LIST #define ODM_REG_BB_RST_11N 0x02 @@ -161,14 +166,15 @@ #define ODM_REG_EDCA_BK_11N 0x50C #define ODM_REG_TXPAUSE_11N 0x522 #define ODM_REG_RESP_TX_11N 0x6D8 -#define ODM_REG_ANT_TRAIN_PARA1_11N 0x7b0 -#define ODM_REG_ANT_TRAIN_PARA2_11N 0x7b4 +#define ODM_REG_ANT_TRAIN_PARA1_11N 0x7b0 +#define ODM_REG_ANT_TRAIN_PARA2_11N 0x7b4 //DIG Related #define ODM_BIT_IGI_11N 0x0000007F #define ODM_BIT_CCK_RPT_FORMAT_11N BIT9 #define ODM_BIT_BB_RX_PATH_11N 0xF +#define ODM_BIT_BB_ATC_11N BIT11 #endif diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_debug.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_debug.c old mode 100644 new mode 100755 index 1547ff10450b..6dc171a2ad27 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_debug.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_debug.c @@ -50,7 +50,7 @@ pDM_Odm->DebugComponents = // ODM_COMP_DYNAMIC_PRICCA | // ODM_COMP_RXHP | // ODM_COMP_MP | -// ODM_COMP_DYNAMIC_ATC | +// ODM_COMP_CFO_TRACKING | //MAC Functions // ODM_COMP_EDCA_TURBO | diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_debug.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_debug.h old mode 100644 new mode 100755 index 0a32f85ef34d..802d0dfc42f3 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_debug.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_debug.h @@ -70,32 +70,32 @@ // //----------------------------------------------------------------------------- //BB Functions -#define ODM_COMP_DIG BIT0 -#define ODM_COMP_RA_MASK BIT1 +#define ODM_COMP_DIG BIT0 +#define ODM_COMP_RA_MASK BIT1 #define ODM_COMP_DYNAMIC_TXPWR BIT2 #define ODM_COMP_FA_CNT BIT3 #define ODM_COMP_RSSI_MONITOR BIT4 #define ODM_COMP_CCK_PD BIT5 -#define ODM_COMP_ANT_DIV BIT6 +#define ODM_COMP_ANT_DIV BIT6 #define ODM_COMP_PWR_SAVE BIT7 #define ODM_COMP_PWR_TRAIN BIT8 #define ODM_COMP_RATE_ADAPTIVE BIT9 -#define ODM_COMP_PATH_DIV BIT10 -#define ODM_COMP_PSD BIT11 +#define ODM_COMP_PATH_DIV BIT10 +#define ODM_COMP_PSD BIT11 #define ODM_COMP_DYNAMIC_PRICCA BIT12 -#define ODM_COMP_RXHP BIT13 +#define ODM_COMP_RXHP BIT13 #define ODM_COMP_MP BIT14 -#define ODM_COMP_DYNAMIC_ATC BIT15 +#define ODM_COMP_CFO_TRACKING BIT15 //MAC Functions #define ODM_COMP_EDCA_TURBO BIT16 #define ODM_COMP_EARLY_MODE BIT17 //RF Functions #define ODM_COMP_TX_PWR_TRACK BIT24 #define ODM_COMP_RX_GAIN_TRACK BIT25 -#define ODM_COMP_CALIBRATION BIT26 +#define ODM_COMP_CALIBRATION BIT26 //Common Functions #define ODM_COMP_COMMON BIT30 -#define ODM_COMP_INIT BIT31 +#define ODM_COMP_INIT BIT31 /*------------------------Export Marco Definition---------------------------*/ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_interface.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_interface.c old mode 100644 new mode 100755 index 555fd7d705fb..36908dc02580 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_interface.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_interface.c @@ -312,6 +312,20 @@ ODM_MoveMemory( #endif } +void ODM_Memory_Set + (IN PDM_ODM_T pDM_Odm, + IN PVOID pbuf, + IN s1Byte value, + IN u4Byte length) +{ +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) + +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE ) + _rtw_memset(pbuf,value, length); +#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN) + PlatformFillMemory(pbuf,length,value); +#endif +} s4Byte ODM_CompareMemory( IN PDM_ODM_T pDM_Odm, IN PVOID pBuf1, diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_interface.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_interface.h old mode 100644 new mode 100755 index 8c0303b54214..689318aad4f8 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_interface.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_interface.h @@ -251,6 +251,12 @@ s4Byte ODM_CompareMemory( IN PVOID pBuf2, IN u4Byte length ); + +void ODM_Memory_Set + (IN PDM_ODM_T pDM_Odm, + IN PVOID pbuf, + IN s1Byte value, + IN u4Byte length); // // ODM MISC-spin lock relative API. diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_precomp.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_precomp.h old mode 100644 new mode 100755 index e3c71d2d34da..56264ce63452 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_precomp.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_precomp.h @@ -145,6 +145,14 @@ #include "odm_RegDefine11AC.h" #include "odm_RegDefine11N.h" #include "odm_AntDiv.h" +#include "odm_EdcaTurboCheck.h" +#include "odm_DIG.h" +#include "odm_PathDiv.h" +#include "odm_RaInfo.h" +#include "odm_DynamicBBPowerSaving.h" +#include "odm_DynamicTxPower.h" +#include "odm_CfoTracking.h" +#include "odm_NoiseMonitor.h" #if (DM_ODM_SUPPORT_TYPE == ODM_AP) #if (RTL8192C_SUPPORT==1) diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_reg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_reg.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_types.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_types.h old mode 100644 new mode 100755 index 27cecceeec61..4ebbe720b84f --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_types.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm_types.h @@ -34,6 +34,12 @@ #define ODM_ENDIAN_BIG 0 #define ODM_ENDIAN_LITTLE 1 +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +#define GET_ODM(__pAdapter) ((PDM_ODM_T)(&((GET_HAL_DATA(__pAdapter))->DM_OutSrc))) +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) +#define GET_ODM(__pAdapter) ((PDM_ODM_T)(&((GET_HAL_DATA(__pAdapter))->odmpriv))) +#endif + #if (DM_ODM_SUPPORT_TYPE != ODM_WIN) #define RT_PCI_INTERFACE 1 #define RT_USB_INTERFACE 2 @@ -260,6 +266,9 @@ typedef enum _RT_SPINLOCK_TYPE{ #define RTL8881A_SUPPORT 0 #endif +#define READ_NEXT_PAIR(v1, v2, i) do { if (i+2 >= ArrayLen) break; i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) +#define COND_ELSE 2 +#define COND_ENDIF 3 #endif // __ODM_TYPES_H__ diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/Hal8723BReg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/Hal8723BReg.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_BB.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_BB.c old mode 100644 new mode 100755 index bae202b88355..89e1ae23755b --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_BB.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_BB.c @@ -18,41 +18,95 @@ * ******************************************************************************/ -//#include "Mp_Precomp.h" + #include "../odm_precomp.h" #if (RTL8723B_SUPPORT == 1) static BOOLEAN -CheckCondition( - const u4Byte Condition, - const u4Byte Hex +CheckPositive( + IN PDM_ODM_T pDM_Odm, + IN const u4Byte Condition1, + IN const u4Byte Condition2 ) { - u4Byte _board = (Hex & 0x000000FF); - u4Byte _interface = (Hex & 0x0000FF00) >> 8; - u4Byte _platform = (Hex & 0x00FF0000) >> 16; - u4Byte cond = Condition; - - if ( Condition == 0xCDCDCDCD ) - return TRUE; - - cond = Condition & 0x000000FF; - if ( (_board != cond) && (cond != 0xFF) ) - return FALSE; - - cond = Condition & 0x0000FF00; - cond = cond >> 8; - if ( ((_interface & cond) == 0) && (cond != 0x07) ) - return FALSE; - - cond = Condition & 0x00FF0000; - cond = cond >> 16; - if ( ((_platform & cond) == 0) && (cond != 0x0F) ) + u1Byte _BoardType = ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | // _GLNA + ((pDM_Odm->BoardType & BIT3) >> 3) << 1 | // _GPA + ((pDM_Odm->BoardType & BIT7) >> 7) << 2 | // _ALNA + ((pDM_Odm->BoardType & BIT6) >> 6) << 3 | // _APA + ((pDM_Odm->BoardType & BIT2) >> 2) << 4; // _BT + + u4Byte cond1 = Condition1, cond2 = Condition2; + u4Byte driver1 = pDM_Odm->CutVersion << 24 | + pDM_Odm->SupportPlatform << 16 | + pDM_Odm->PackageType << 12 | + pDM_Odm->SupportInterface << 8 | + _BoardType; + + u4Byte driver2 = pDM_Odm->TypeGLNA << 0 | + pDM_Odm->TypeGPA << 8 | + pDM_Odm->TypeALNA << 16 | + pDM_Odm->TypeAPA << 24; + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, + ("===> [8812A] CheckPositive (cond1, cond2) = (0x%X 0x%X)\n", cond1, cond2)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, + ("===> [8812A] CheckPositive (driver1, driver2) = (0x%X 0x%X)\n", driver1, driver2)); + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, + (" (Platform, Interface) = (0x%X, 0x%X)\n", pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, + (" (Board, Package) = (0x%X, 0x%X)\n", pDM_Odm->BoardType, pDM_Odm->PackageType)); + + + //============== Value Defined Check ===============// + //QFN Type [15:12] and Cut Version [27:24] need to do value check + + if(((cond1 & 0x0000F000) != 0) &&((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) + return FALSE; + if(((cond1 & 0x0F000000) != 0) &&((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) + return FALSE; + + //=============== Bit Defined Check ================// + // We don't care [31:28] and [23:20] + // + cond1 &= 0x000F0FFF; + driver1 &= 0x000F0FFF; + + if ((cond1 & driver1) == cond1) + { + u4Byte bitMask = 0; + if ((cond1 & 0x0F) == 0) // BoardType is DONTCARE + return TRUE; + + if ((cond1 & BIT0) != 0) //GLNA + bitMask |= 0x000000FF; + if ((cond1 & BIT1) != 0) //GPA + bitMask |= 0x0000FF00; + if ((cond1 & BIT2) != 0) //ALNA + bitMask |= 0x00FF0000; + if ((cond1 & BIT3) != 0) //APA + bitMask |= 0xFF000000; + + if ((cond2 & bitMask) == (driver2 & bitMask)) // BoardType of each RF path is matched + return TRUE; + else + return FALSE; + } + else + { return FALSE; + } +} +static BOOLEAN +CheckNegative( + IN PDM_ODM_T pDM_Odm, + IN const u4Byte Condition1, + IN const u4Byte Condition2 + ) +{ return TRUE; } - /****************************************************************************** * AGC_TAB.TXT ******************************************************************************/ @@ -197,69 +251,73 @@ ODM_ReadAndConfig_MP_8723B_AGC_TAB( IN PDM_ODM_T pDM_Odm ) { - #define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) - - u4Byte hex = 0; - u4Byte i = 0; - u2Byte count = 0; - pu4Byte ptr_array = NULL; - u1Byte platform = pDM_Odm->SupportPlatform; - u1Byte _interface = pDM_Odm->SupportInterface; - u1Byte board = pDM_Odm->BoardType; - u4Byte ArrayLen = sizeof(Array_MP_8723B_AGC_TAB)/sizeof(u4Byte); - pu4Byte Array = Array_MP_8723B_AGC_TAB; - - - hex += board; - hex += _interface << 8; - hex += platform << 16; - hex += 0xFF000000; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ReadAndConfig_MP_8723B_AGC_TAB, hex = 0x%X\n", hex)); - - for (i = 0; i < ArrayLen; i += 2 ) - { - u4Byte v1 = Array[i]; - u4Byte v2 = Array[i+1]; + u4Byte i = 0; + u4Byte ArrayLen = sizeof(Array_MP_8723B_AGC_TAB)/sizeof(u4Byte); + pu4Byte Array = Array_MP_8723B_AGC_TAB; - // This (offset, data) pair meets the condition. - if ( v1 < 0xCDCDCDCD ) - { - odm_ConfigBB_AGC_8723B(pDM_Odm, v1, bMaskDWord, v2); - continue; - } - else - { // This line is the start line of branch. - if ( !CheckCondition(Array[i], hex) ) - { // Discard the following (offset, data) pairs. - READ_NEXT_PAIR(v1, v2, i); - while (v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < ArrayLen -2) - { - READ_NEXT_PAIR(v1, v2, i); - } - i -= 2; // prevent from for-loop += 2 - } - else // Configure matched pairs and skip to end of if-else. - { - READ_NEXT_PAIR(v1, v2, i); - while (v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < ArrayLen -2) - { - odm_ConfigBB_AGC_8723B(pDM_Odm, v1, bMaskDWord, v2); - READ_NEXT_PAIR(v1, v2, i); - } - - while (v2 != 0xDEAD && i < ArrayLen -2) - { - READ_NEXT_PAIR(v1, v2, i); - } - - } - } - } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8723B_AGC_TAB\n")); + + for (i = 0; i < ArrayLen; i += 2 ) + { + u4Byte v1 = Array[i]; + u4Byte v2 = Array[i+1]; + + // This (offset, data) pair doesn't care the condition. + if ( v1 < 0x40000000 ) + { + odm_ConfigBB_AGC_8723B(pDM_Odm, v1, bMaskDWord, v2); + continue; + } + else + { // This line is the beginning of branch. + BOOLEAN bMatched = TRUE; + u1Byte cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); + + if (cCond == COND_ELSE) { // ELSE, ENDIF + bMatched = TRUE; + READ_NEXT_PAIR(v1, v2, i); + } else if ( ! CheckPositive(pDM_Odm, v1, v2) ) { + bMatched = FALSE; + READ_NEXT_PAIR(v1, v2, i); + READ_NEXT_PAIR(v1, v2, i); + } else { + READ_NEXT_PAIR(v1, v2, i); + if ( ! CheckNegative(pDM_Odm, v1, v2) ) + bMatched = FALSE; + else + bMatched = TRUE; + READ_NEXT_PAIR(v1, v2, i); + } + + if ( bMatched == FALSE ) + { // Condition isn't matched. Discard the following (offset, data) pairs. + while (v1 < 0x40000000 && i < ArrayLen -2) + READ_NEXT_PAIR(v1, v2, i); + + i -= 2; // prevent from for-loop += 2 + } + else // Configure matched pairs and skip to end of if-else. + { + while (v1 < 0x40000000 && i < ArrayLen-2) { + odm_ConfigBB_AGC_8723B(pDM_Odm, v1, bMaskDWord, v2); + READ_NEXT_PAIR(v1, v2, i); + } + + // Keeps reading until ENDIF. + cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); + while (cCond != COND_ENDIF && i < ArrayLen-2) { + READ_NEXT_PAIR(v1, v2, i); + cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); + } + } + } + } +} +u4Byte +ODM_GetVersion_MP_8723B_AGC_TAB(void) +{ + return 11; } /****************************************************************************** @@ -314,7 +372,7 @@ u4Byte Array_MP_8723B_PHY_REG[] = { 0x910, 0x00000002, 0x914, 0x00000201, 0xA00, 0x00D047C8, - 0xA04, 0x80FF000C, + 0xA04, 0x80FF800C, 0xA08, 0x8C838300, 0xA0C, 0x2E7F120F, 0xA10, 0x9500BB78, @@ -468,69 +526,73 @@ ODM_ReadAndConfig_MP_8723B_PHY_REG( IN PDM_ODM_T pDM_Odm ) { - #define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) - - u4Byte hex = 0; - u4Byte i = 0; - u2Byte count = 0; - pu4Byte ptr_array = NULL; - u1Byte platform = pDM_Odm->SupportPlatform; - u1Byte _interface = pDM_Odm->SupportInterface; - u1Byte board = pDM_Odm->BoardType; - u4Byte ArrayLen = sizeof(Array_MP_8723B_PHY_REG)/sizeof(u4Byte); - pu4Byte Array = Array_MP_8723B_PHY_REG; - - - hex += board; - hex += _interface << 8; - hex += platform << 16; - hex += 0xFF000000; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ReadAndConfig_MP_8723B_PHY_REG, hex = 0x%X\n", hex)); - - for (i = 0; i < ArrayLen; i += 2 ) - { - u4Byte v1 = Array[i]; - u4Byte v2 = Array[i+1]; + u4Byte i = 0; + u4Byte ArrayLen = sizeof(Array_MP_8723B_PHY_REG)/sizeof(u4Byte); + pu4Byte Array = Array_MP_8723B_PHY_REG; - // This (offset, data) pair meets the condition. - if ( v1 < 0xCDCDCDCD ) - { - odm_ConfigBB_PHY_8723B(pDM_Odm, v1, bMaskDWord, v2); - continue; - } - else - { // This line is the start line of branch. - if ( !CheckCondition(Array[i], hex) ) - { // Discard the following (offset, data) pairs. - READ_NEXT_PAIR(v1, v2, i); - while (v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < ArrayLen -2) - { - READ_NEXT_PAIR(v1, v2, i); - } - i -= 2; // prevent from for-loop += 2 - } - else // Configure matched pairs and skip to end of if-else. - { - READ_NEXT_PAIR(v1, v2, i); - while (v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < ArrayLen -2) - { - odm_ConfigBB_PHY_8723B(pDM_Odm, v1, bMaskDWord, v2); - READ_NEXT_PAIR(v1, v2, i); - } - - while (v2 != 0xDEAD && i < ArrayLen -2) - { - READ_NEXT_PAIR(v1, v2, i); - } - - } - } - } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8723B_PHY_REG\n")); + + for (i = 0; i < ArrayLen; i += 2 ) + { + u4Byte v1 = Array[i]; + u4Byte v2 = Array[i+1]; + + // This (offset, data) pair doesn't care the condition. + if ( v1 < 0x40000000 ) + { + odm_ConfigBB_PHY_8723B(pDM_Odm, v1, bMaskDWord, v2); + continue; + } + else + { // This line is the beginning of branch. + BOOLEAN bMatched = TRUE; + u1Byte cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); + + if (cCond == COND_ELSE) { // ELSE, ENDIF + bMatched = TRUE; + READ_NEXT_PAIR(v1, v2, i); + } else if ( ! CheckPositive(pDM_Odm, v1, v2) ) { + bMatched = FALSE; + READ_NEXT_PAIR(v1, v2, i); + READ_NEXT_PAIR(v1, v2, i); + } else { + READ_NEXT_PAIR(v1, v2, i); + if ( ! CheckNegative(pDM_Odm, v1, v2) ) + bMatched = FALSE; + else + bMatched = TRUE; + READ_NEXT_PAIR(v1, v2, i); + } + + if ( bMatched == FALSE ) + { // Condition isn't matched. Discard the following (offset, data) pairs. + while (v1 < 0x40000000 && i < ArrayLen -2) + READ_NEXT_PAIR(v1, v2, i); + + i -= 2; // prevent from for-loop += 2 + } + else // Configure matched pairs and skip to end of if-else. + { + while (v1 < 0x40000000 && i < ArrayLen-2) { + odm_ConfigBB_PHY_8723B(pDM_Odm, v1, bMaskDWord, v2); + READ_NEXT_PAIR(v1, v2, i); + } + + // Keeps reading until ENDIF. + cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); + while (cCond != COND_ENDIF && i < ArrayLen-2) { + READ_NEXT_PAIR(v1, v2, i); + cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); + } + } + } + } +} +u4Byte +ODM_GetVersion_MP_8723B_PHY_REG(void) +{ + return 11; } /****************************************************************************** @@ -551,22 +613,15 @@ ODM_ReadAndConfig_MP_8723B_PHY_REG_PG( IN PDM_ODM_T pDM_Odm ) { - u4Byte hex = 0; - u4Byte i = 0; - u2Byte count = 0; - pu4Byte ptr_array = NULL; - u1Byte platform = pDM_Odm->SupportPlatform; - u1Byte _interface = pDM_Odm->SupportInterface; - u1Byte board = pDM_Odm->BoardType; - u4Byte ArrayLen = sizeof(Array_MP_8723B_PHY_REG_PG)/sizeof(u4Byte); - pu4Byte Array = Array_MP_8723B_PHY_REG_PG; + u4Byte i = 0; + u4Byte ArrayLen = sizeof(Array_MP_8723B_PHY_REG_PG)/sizeof(u4Byte); + pu4Byte Array = Array_MP_8723B_PHY_REG_PG; + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8723B_PHY_REG_PG\n")); pDM_Odm->PhyRegPgVersion = 1; pDM_Odm->PhyRegPgValueType = PHY_REG_PG_EXACT_VALUE; - hex += board; - hex += _interface << 8; - hex += platform << 16; - hex += 0xFF000000; + for (i = 0; i < ArrayLen; i += 6 ) { u4Byte v1 = Array[i]; @@ -576,29 +631,7 @@ ODM_ReadAndConfig_MP_8723B_PHY_REG_PG( u4Byte v5 = Array[i+4]; u4Byte v6 = Array[i+5]; - // this line is a line of pure_body - if ( v1 < 0xCDCDCDCD ) - { - odm_ConfigBB_PHY_REG_PG_8723B(pDM_Odm, v1, v2, v3, v4, v5, v6); - continue; - } - else - { // this line is the start of branch - if ( !CheckCondition(Array[i], hex) ) - { // don't need the hw_body - i += 2; // skip the pair of expression - v1 = Array[i]; - v2 = Array[i+1]; - v3 = Array[i+2]; - while (v2 != 0xDEAD) - { - i += 3; - v1 = Array[i]; - v2 = Array[i+1]; - v3 = Array[i+1]; - } - } - } + odm_ConfigBB_PHY_REG_PG_8723B(pDM_Odm, v1, v2, v3, v4, v5, v6); } } diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_BB.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_BB.h old mode 100644 new mode 100755 index 0d5b29296726..f5b9036249c4 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_BB.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_BB.h @@ -22,7 +22,6 @@ #ifndef __INC_MP_BB_HW_IMG_8723B_H #define __INC_MP_BB_HW_IMG_8723B_H -//static BOOLEAN CheckCondition(const u4Byte Condition, const u4Byte Hex); /****************************************************************************** * AGC_TAB.TXT @@ -32,6 +31,7 @@ void ODM_ReadAndConfig_MP_8723B_AGC_TAB( // TC: Test Chip, MP: MP Chip IN PDM_ODM_T pDM_Odm ); +u4Byte ODM_GetVersion_MP_8723B_AGC_TAB(void); /****************************************************************************** * PHY_REG.TXT @@ -41,6 +41,7 @@ void ODM_ReadAndConfig_MP_8723B_PHY_REG( // TC: Test Chip, MP: MP Chip IN PDM_ODM_T pDM_Odm ); +u4Byte ODM_GetVersion_MP_8723B_PHY_REG(void); /****************************************************************************** * PHY_REG_PG.TXT @@ -50,6 +51,7 @@ void ODM_ReadAndConfig_MP_8723B_PHY_REG_PG( // TC: Test Chip, MP: MP Chip IN PDM_ODM_T pDM_Odm ); +u4Byte ODM_GetVersion_MP_8723B_PHY_REG_PG(void); #endif #endif // end of HWIMG_SUPPORT diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_FW.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_FW.c old mode 100644 new mode 100755 index 327777d73e5f..592d15828a78 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_FW.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_FW.c @@ -1604,16 +1604,3312 @@ ODM_ReadFirmware_MP_8723B_FW_BT( } -// v23.03 20140227 by Glayrainx +// v29 20140605 by Isaachsu u1Byte Array_MP_8723B_FW_NIC[] = { -0x01, 0x53, 0x10, 0x00, 0x17, 0x00, 0x03, 0x00, 0x02, 0x27, 0x13, 0x06, 0xF2, 0x78, 0x00, 0x00, +0x01, 0x53, 0x10, 0x00, 0x1D, 0x00, 0x00, 0x00, 0x06, 0x05, 0x10, 0x58, 0x9C, 0x6A, 0x00, 0x00, +0xF8, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x02, 0x45, 0xED, 0x02, 0x77, 0xF3, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x02, 0x79, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x02, 0x78, 0x27, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x02, 0x78, 0x4E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x7F, 0xE7, 0x00, 0x00, +0x00, 0x00, 0x00, 0x02, 0x88, 0x00, 0x15, 0xF0, 0xFF, 0x0F, 0x00, 0x00, 0x00, 0x15, 0xF0, 0x0F, +0x00, 0x00, 0x00, 0x00, 0x05, 0xF0, 0xFF, 0x0F, 0x00, 0x00, 0x00, 0x05, 0xF0, 0x0F, 0x00, 0x00, +0x00, 0x00, 0x10, 0xF0, 0xFF, 0x0F, 0x00, 0x00, 0x00, 0x10, 0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, +0xF5, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0D, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x08, 0x03, 0x03, 0x00, 0x04, 0x09, 0x07, 0x03, 0x03, 0x00, +0x04, 0x08, 0x06, 0x03, 0x02, 0x00, 0x04, 0x08, 0x05, 0x03, 0x01, 0x00, 0x04, 0x0D, 0x0A, 0x07, +0x05, 0x00, 0x08, 0x0C, 0x0A, 0x07, 0x04, 0x00, 0x08, 0x0B, 0x0A, 0x06, 0x05, 0x00, 0x08, 0x0B, +0x0A, 0x05, 0x03, 0x00, 0x08, 0x0B, 0x0A, 0x03, 0x02, 0x00, 0x08, 0x14, 0x12, 0x0C, 0x04, 0x00, +0x10, 0x14, 0x12, 0x09, 0x04, 0x00, 0x10, 0x24, 0x22, 0x1C, 0x12, 0x00, 0x20, 0x24, 0x22, 0x18, +0x0C, 0x00, 0x20, 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0xFD, 0x22, 0x00, 0xDE, 0xF2, +}; +u4Byte ArrayLength_MP_8723B_FW_NIC = 27324; + + + +void +ODM_ReadFirmware_MP_8723B_FW_NIC( + IN PDM_ODM_T pDM_Odm, + OUT u1Byte *pFirmware, + OUT u4Byte *pFirmwareSize +) +{ +#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) + *((SIZE_PTR *)pFirmware) = (SIZE_PTR)Array_MP_8723B_FW_NIC; +#else + ODM_MoveMemory(pDM_Odm, pFirmware, Array_MP_8723B_FW_NIC, ArrayLength_MP_8723B_FW_NIC); +#endif + *pFirmwareSize = ArrayLength_MP_8723B_FW_NIC; +} + +// v29 20140605 by Isaachsu +u1Byte Array_MP_8723B_FW_WoWLAN[] = { +0x01, 0x53, 0x30, 0x00, 0x1D, 0x00, 0x00, 0x00, 0x06, 0x05, 0x10, 0x59, 0x5A, 0x60, 0x00, 0x00, +0xF8, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x02, 0x48, 0x94, 0x02, 0x67, 0xFC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x02, 0x68, 0xAF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x02, 0x68, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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+0x4D, 0x92, 0x90, 0x94, 0xE8, 0x22, 0x24, 0x30, 0xF9, 0xE4, 0x34, 0xFC, 0xFA, 0x7B, 0x01, 0x22, +0xEF, 0xF0, 0xA3, 0x02, 0x44, 0x12, 0x90, 0x8E, 0x8A, 0xE0, 0x14, 0x90, 0x05, 0x73, 0xF0, 0x22, +0x4D, 0xFF, 0x90, 0x8F, 0x2E, 0xF0, 0xEE, 0x22, 0x90, 0x8D, 0xF8, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, +0x9F, 0xEE, 0x64, 0x80, 0xF8, 0x74, 0x80, 0x22, 0xF5, 0x82, 0xE4, 0x34, 0x91, 0xF5, 0x83, 0x22, +0xE0, 0xFF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x22, 0xE4, 0x90, 0x95, 0x4A, 0xF0, 0x7F, 0x04, 0x22, +0x7F, 0x01, 0x7E, 0x00, 0x02, 0x3D, 0xC2, 0xEF, 0x24, 0x01, 0xFF, 0xE4, 0x3E, 0xFE, 0x22, 0x90, +0x02, 0x86, 0xE0, 0x54, 0xFB, 0xF0, 0x22, 0x90, 0x02, 0x86, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0x90, +0x8E, 0x81, 0xE0, 0x54, 0xFB, 0xF0, 0x22, 0x90, 0x8E, 0x8A, 0xE0, 0xFF, 0xA3, 0xE0, 0x22, 0x90, +0x8E, 0x81, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0x90, 0x8E, 0x88, 0xE0, 0x44, 0x10, 0xF0, 0x22, 0x74, +0x01, 0x7E, 0x00, 0xA8, 0x07, 0x08, 0x22, 0x90, 0x8D, 0xFB, 0xE0, 0xFF, 0xC3, 0x13, 0x22, 0xE0, +0xFC, 0xA3, 0xE0, 0xFD, 0xEC, 0xFF, 0x22, 0xF0, 0xA3, 0xED, 0xF0, 0xA3, 0xEB, 0xF0, 0x22, 0x90, +0x93, 0xB7, 0xEE, 0xF0, 0xA3, 0xEF, 0x22, 0x12, 0x49, 0x39, 0x90, 0x95, 0x84, 0xE0, 0x22, 0x2F, +0xF8, 0xE6, 0xFE, 0xED, 0xF4, 0x5E, 0x22, 0x00, 0x01, 0x93, +}; +u4Byte ArrayLength_MP_8723B_FW_WoWLAN = 24698; + + +void +ODM_ReadFirmware_MP_8723B_FW_WoWLAN( + IN PDM_ODM_T pDM_Odm, + OUT u1Byte *pFirmware, + OUT u4Byte *pFirmwareSize +) +{ +#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) + *((SIZE_PTR *)pFirmware) = (SIZE_PTR)Array_MP_8723B_FW_WoWLAN; + *pFirmwareSize = ArrayLength_MP_8723B_FW_WoWLAN; +#else + ODM_MoveMemory(pDM_Odm, pFirmware, Array_MP_8723B_FW_WoWLAN, ArrayLength_MP_8723B_FW_WoWLAN); + *pFirmwareSize = ArrayLength_MP_8723B_FW_WoWLAN; +#endif +} + + +u1Byte Array_MP_8723B_FW_MP[] = { +0x01, 0x53, 0x10, 0x00, 0x17, 0x00, 0x03, 0x00, 0x03, 0x04, 0x13, 0x42, 0x5E, 0x7C, 0x00, 0x00, 0x7D, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x02, 0x45, 0xED, 0x02, 0x6F, 0xE9, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x00, 0x00, 0x00, 0x02, 0x70, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x00, 0x00, 0x00, 0x02, 0x7F, 0x78, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x02, 0x45, 0xED, 0x02, 0x70, 0x54, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x02, 0x70, 0xDD, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x02, 0x7F, 0xCB, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x00, 0x00, 0x00, 0x02, 0x70, 0x1A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x5F, 0x0D, 0x00, 0x00, -0x00, 0x00, 0x00, 0x02, 0x78, 0xEB, 0x15, 0xF0, 0xFF, 0x0F, 0x00, 0x00, 0x00, 0x15, 0xF0, 0x0F, +0x00, 0x00, 0x00, 0x02, 0x70, 0x85, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x5F, 0x0D, 0x00, 0x00, +0x00, 0x00, 0x00, 0x02, 0x79, 0x56, 0x15, 0xF0, 0xFF, 0x0F, 0x00, 0x00, 0x00, 0x15, 0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x05, 0xF0, 0xFF, 0x0F, 0x00, 0x00, 0x00, 0x05, 0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x10, 0xF0, 0xFF, 0x0F, 0x00, 0x00, 0x00, 0x10, 0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0xF5, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0D, 0x00, @@ -1764,8 +5060,8 @@ u1Byte Array_MP_8723B_FW_NIC[] = { 0x05, 0x22, 0xE0, 0x90, 0xA3, 0xBF, 0xF0, 0x7D, 0x26, 0x91, 0x04, 0xEF, 0x64, 0x01, 0x70, 0x0B, 0x51, 0x0B, 0x90, 0xA2, 0x2C, 0xE0, 0x20, 0xE0, 0x1A, 0x80, 0x15, 0x90, 0xA1, 0xD1, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x0C, 0x51, 0x0B, 0x90, 0xA2, 0x2C, 0xE0, 0x20, 0xE0, 0x03, -0x12, 0xB7, 0xE4, 0x90, 0xA3, 0xBF, 0xE0, 0xFF, 0x7D, 0x27, 0x31, 0x5E, 0x12, 0xB8, 0x70, 0x80, -0x0F, 0x12, 0xB8, 0x70, 0x51, 0x0B, 0x90, 0xA2, 0x2C, 0xE0, 0x20, 0xE0, 0x03, 0x12, 0xB7, 0xE4, +0x12, 0xBB, 0x50, 0x90, 0xA3, 0xBF, 0xE0, 0xFF, 0x7D, 0x27, 0x31, 0x5E, 0x12, 0xBB, 0xDC, 0x80, +0x0F, 0x12, 0xBB, 0xDC, 0x51, 0x0B, 0x90, 0xA2, 0x2C, 0xE0, 0x20, 0xE0, 0x03, 0x12, 0xBB, 0x50, 0x90, 0xA1, 0xCD, 0xE0, 0x30, 0xE0, 0x17, 0x90, 0xA1, 0xD1, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x0B, 0x90, 0x05, 0x22, 0xE0, 0x54, 0x6F, 0xFF, 0x7D, 0x28, 0x31, 0x5E, 0x90, 0x04, 0x1F, 0x74, 0x20, 0xF0, 0x7F, 0x01, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x9F, 0x9F, 0xE0, 0xFF, @@ -1780,7 +5076,7 @@ u1Byte Array_MP_8723B_FW_NIC[] = { 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0xEF, 0xF0, 0x74, 0x09, 0x2D, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x40, 0xF0, 0x22, 0x90, 0xA3, 0xB0, 0xA3, 0xE0, 0xFF, 0x7B, 0x08, 0x7D, 0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA3, 0xF1, 0xED, 0xF0, 0xA3, 0xEB, -0xF0, 0x90, 0xA3, 0xF0, 0xEF, 0xF0, 0xE4, 0xFD, 0xFC, 0x12, 0xB8, 0xDB, 0x7C, 0x00, 0xAD, 0x07, +0xF0, 0x90, 0xA3, 0xF0, 0xEF, 0xF0, 0xE4, 0xFD, 0xFC, 0x12, 0xBC, 0x47, 0x7C, 0x00, 0xAD, 0x07, 0x90, 0xA3, 0xF0, 0xE0, 0x90, 0x04, 0x25, 0xF0, 0x90, 0xA3, 0xF1, 0xE0, 0x60, 0x0E, 0x74, 0x21, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x44, 0x80, 0xF0, 0xAF, 0x05, 0x74, 0x20, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x54, 0xC0, 0xF0, 0x74, 0x21, 0x2F, 0xF5, @@ -1821,7 +5117,7 @@ u1Byte Array_MP_8723B_FW_NIC[] = { 0x04, 0x75, 0xF0, 0x0D, 0xE5, 0x54, 0x90, 0xA2, 0x2F, 0x12, 0x45, 0xA9, 0xE0, 0xFC, 0x75, 0xF0, 0x0D, 0xE5, 0x54, 0x90, 0xA2, 0x30, 0x12, 0x45, 0xA9, 0xE0, 0xFE, 0x54, 0x03, 0xFD, 0xEE, 0x13, 0x13, 0x54, 0x07, 0xFB, 0x90, 0xA2, 0x2C, 0xE0, 0xFE, 0xC4, 0x54, 0x0F, 0x90, 0xA3, 0xDB, 0xF0, -0xAF, 0x04, 0x12, 0xB3, 0x95, 0x75, 0xF0, 0x0D, 0xE5, 0x54, 0x12, 0xB1, 0x7F, 0x75, 0xF0, 0x0D, +0xAF, 0x04, 0x12, 0xB7, 0x01, 0x75, 0xF0, 0x0D, 0xE5, 0x54, 0x12, 0xB4, 0xEB, 0x75, 0xF0, 0x0D, 0xE5, 0x54, 0x31, 0x4D, 0xAD, 0x54, 0xE4, 0xFF, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA3, 0xDC, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0xE4, 0xA3, 0xF0, 0x90, 0xA3, 0xDE, 0xE0, 0xFF, 0xC3, 0x94, 0x02, 0x40, 0x02, 0xC1, 0x4C, 0x90, 0xA3, 0xDD, 0xE0, 0xFE, 0x75, 0xF0, 0x0D, 0x90, 0xA2, @@ -1843,8 +5139,8 @@ u1Byte Array_MP_8723B_FW_NIC[] = { 0x91, 0x08, 0x90, 0xA2, 0x2C, 0xE0, 0xFE, 0xC3, 0x13, 0x54, 0x07, 0xFD, 0x75, 0xF0, 0x0D, 0x90, 0xA2, 0x2F, 0x12, 0x45, 0xA9, 0xE0, 0xFA, 0x75, 0xF0, 0x0D, 0xED, 0x90, 0xA2, 0x30, 0x12, 0x45, 0xA9, 0xE0, 0xFC, 0x54, 0x03, 0xFD, 0xEC, 0x13, 0x13, 0x54, 0x07, 0xFB, 0xEE, 0xC4, 0x54, 0x0F, -0x90, 0xA3, 0xDB, 0xF0, 0xAF, 0x02, 0x12, 0xB3, 0x95, 0x90, 0xA2, 0x2C, 0xE0, 0xC3, 0x13, 0x54, -0x07, 0x75, 0xF0, 0x0D, 0x12, 0xB1, 0x7F, 0x90, 0xA2, 0x2C, 0xE0, 0xC3, 0x13, 0x54, 0x07, 0xFF, +0x90, 0xA3, 0xDB, 0xF0, 0xAF, 0x02, 0x12, 0xB7, 0x01, 0x90, 0xA2, 0x2C, 0xE0, 0xC3, 0x13, 0x54, +0x07, 0x75, 0xF0, 0x0D, 0x12, 0xB4, 0xEB, 0x90, 0xA2, 0x2C, 0xE0, 0xC3, 0x13, 0x54, 0x07, 0xFF, 0x75, 0xF0, 0x0D, 0x90, 0xA2, 0x3A, 0x12, 0x45, 0xA9, 0xE0, 0x04, 0xF0, 0x75, 0xF0, 0x0D, 0xEF, 0x31, 0x4D, 0x90, 0xA2, 0x2C, 0xE0, 0xC3, 0x13, 0x54, 0x07, 0xFD, 0xE4, 0xFF, 0xA1, 0x68, 0x90, 0x9F, 0xA1, 0xE0, 0xFF, 0x7B, 0x08, 0x7D, 0x01, 0x51, 0xB2, 0x90, 0xA3, 0x19, 0xEE, 0xF0, 0xFC, @@ -1857,7 +5153,7 @@ u1Byte Array_MP_8723B_FW_NIC[] = { 0x83, 0xE0, 0x54, 0x03, 0xF0, 0x90, 0xA3, 0x1F, 0xE0, 0xFF, 0x90, 0xA3, 0x1D, 0xA3, 0xE0, 0xFE, 0x24, 0x2A, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xEF, 0xF0, 0x90, 0xA3, 0x20, 0xE0, 0xFF, 0x74, 0x2B, 0x2E, 0xF5, 0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xEF, 0xF0, 0x74, 0x2C, 0x2E, 0xF5, -0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x24, 0x02, 0xF0, 0x22, 0x12, 0xB6, 0x5D, 0x90, 0xA1, +0x82, 0xE4, 0x34, 0xFC, 0xF5, 0x83, 0xE0, 0x24, 0x02, 0xF0, 0x22, 0x12, 0xB9, 0xC9, 0x90, 0xA1, 0x1D, 0xE0, 0x64, 0x0C, 0x60, 0x12, 0xE4, 0xFD, 0x7F, 0x0C, 0x12, 0x56, 0x56, 0xE4, 0xFD, 0xFF, 0x31, 0x5E, 0x7D, 0x08, 0xE4, 0xFF, 0x31, 0x74, 0x22, 0x90, 0x9F, 0xA2, 0xE0, 0xFF, 0xE4, 0xFB, 0x7D, 0x01, 0x51, 0xB2, 0x90, 0xA3, 0x1A, 0xEE, 0xF0, 0xA3, 0xEF, 0xF0, 0x90, 0xA3, 0x18, 0xE0, @@ -1915,17 +5211,17 @@ u1Byte Array_MP_8723B_FW_NIC[] = { 0x90, 0x01, 0x34, 0x74, 0x20, 0xF0, 0xE4, 0xF5, 0xA8, 0xF5, 0xE8, 0x51, 0x80, 0x90, 0x00, 0x03, 0xE0, 0x54, 0xFB, 0xFD, 0x7F, 0x03, 0x12, 0x46, 0xAC, 0x80, 0xFE, 0x22, 0x7F, 0x81, 0x12, 0x46, 0xD6, 0xEF, 0x54, 0xFE, 0xFD, 0x7F, 0x81, 0x12, 0x46, 0xAC, 0x7F, 0x80, 0x12, 0x46, 0xD6, 0xEF, -0x44, 0x80, 0xFD, 0x7F, 0x80, 0x12, 0x46, 0xAC, 0x12, 0x9A, 0xD8, 0x12, 0x3E, 0x11, 0x12, 0x9A, -0xE5, 0x12, 0x9B, 0xA9, 0x7F, 0x01, 0x12, 0x43, 0xA5, 0x90, 0xA2, 0x2B, 0x74, 0x02, 0xF0, 0xFF, +0x44, 0x80, 0xFD, 0x7F, 0x80, 0x12, 0x46, 0xAC, 0x12, 0x9E, 0x51, 0x12, 0x3E, 0x11, 0x12, 0x9E, +0x5E, 0x12, 0x9F, 0x22, 0x7F, 0x01, 0x12, 0x43, 0xA5, 0x90, 0xA2, 0x2B, 0x74, 0x02, 0xF0, 0xFF, 0x12, 0x43, 0xA5, 0x90, 0xA2, 0x2B, 0xE0, 0x04, 0xF0, 0x31, 0xEA, 0x71, 0xC5, 0x7F, 0x80, 0x12, 0x46, 0xD6, 0xEF, 0x44, 0x40, 0xFD, 0x7F, 0x80, 0x12, 0x46, 0xAC, 0x75, 0x28, 0xFF, 0xF1, 0xF4, -0x12, 0x9B, 0x26, 0x7B, 0x01, 0x7A, 0xA2, 0x79, 0xDA, 0x7F, 0xFB, 0x7E, 0x01, 0x12, 0x34, 0xC1, +0x12, 0x9E, 0x9F, 0x7B, 0x01, 0x7A, 0xA2, 0x79, 0xDA, 0x7F, 0xFB, 0x7E, 0x01, 0x12, 0x34, 0xC1, 0xEF, 0x64, 0x01, 0x70, 0x27, 0x90, 0xA2, 0xDA, 0xE0, 0x54, 0x07, 0xF0, 0xE0, 0xFF, 0x64, 0x07, -0x60, 0x04, 0xEF, 0xB4, 0x04, 0x16, 0x12, 0x9A, 0xCD, 0xBF, 0x01, 0x10, 0x7F, 0x16, 0x12, 0x46, +0x60, 0x04, 0xEF, 0xB4, 0x04, 0x16, 0x12, 0x9E, 0x46, 0xBF, 0x01, 0x10, 0x7F, 0x16, 0x12, 0x46, 0xD6, 0xEF, 0x54, 0x0F, 0x44, 0x60, 0xFD, 0x7F, 0x16, 0x12, 0x46, 0xAC, 0x7F, 0x81, 0x12, 0x46, -0xD6, 0xEF, 0x44, 0x04, 0xFD, 0x7F, 0x81, 0x12, 0x46, 0xAC, 0x12, 0x9B, 0xB7, 0x12, 0xB4, 0x0C, -0xE4, 0xFF, 0x02, 0x44, 0x2E, 0x12, 0xB4, 0xC3, 0x12, 0x98, 0xDA, 0x12, 0x9E, 0x04, 0x12, 0xB4, -0xC9, 0x91, 0xAB, 0x12, 0xB7, 0xD5, 0x12, 0x8D, 0x66, 0x7E, 0x00, 0x7F, 0x19, 0x7D, 0x00, 0x7B, +0xD6, 0xEF, 0x44, 0x04, 0xFD, 0x7F, 0x81, 0x12, 0x46, 0xAC, 0x12, 0x9F, 0x30, 0x12, 0xB7, 0x78, +0xE4, 0xFF, 0x02, 0x44, 0x2E, 0x12, 0xB8, 0x2F, 0x12, 0x9C, 0x53, 0x12, 0xA1, 0x7D, 0x12, 0xB8, +0x35, 0x91, 0xAB, 0x12, 0xBB, 0x41, 0x12, 0x85, 0xF8, 0x7E, 0x00, 0x7F, 0x19, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0xA1, 0x79, 0xFD, 0x12, 0x08, 0xAA, 0x7F, 0x80, 0x7E, 0x08, 0x12, 0x37, 0x4E, 0x90, 0xA2, 0x04, 0x12, 0x08, 0x6D, 0x90, 0xA2, 0x04, 0x12, 0x45, 0x71, 0x90, 0xA2, 0x00, 0x12, 0x08, 0x6D, 0x90, 0x9F, 0x9C, 0xE0, 0xFF, 0x64, 0x02, 0x70, 0x2A, 0x90, 0xFD, 0x80, 0xE0, 0x7E, 0x00, @@ -1936,8 +5232,8 @@ u1Byte Array_MP_8723B_FW_NIC[] = { 0xE1, 0x02, 0x7F, 0x01, 0x80, 0x23, 0x90, 0x9F, 0x9C, 0xE0, 0x64, 0x03, 0x70, 0x20, 0x90, 0xFD, 0x78, 0xE0, 0x7F, 0x00, 0x30, 0xE0, 0x02, 0x7F, 0x01, 0x90, 0xA2, 0x0C, 0xEF, 0xF0, 0x90, 0xFD, 0x78, 0xE0, 0x7F, 0x00, 0x30, 0xE1, 0x02, 0x7F, 0x01, 0x90, 0xA2, 0x0D, 0xEF, 0xF0, 0x90, 0xFD, -0x68, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x07, 0x78, 0x74, 0x01, 0xF0, 0x12, 0x85, 0x3C, 0x12, 0x85, -0xB2, 0x90, 0xA1, 0xE6, 0x74, 0x01, 0xF0, 0xE4, 0xFD, 0x7F, 0x01, 0x12, 0x63, 0x7F, 0x90, 0xA2, +0x68, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x07, 0x78, 0x74, 0x01, 0xF0, 0x12, 0x8F, 0x3E, 0x12, 0x86, +0x07, 0x90, 0xA1, 0xE6, 0x74, 0x01, 0xF0, 0xE4, 0xFD, 0x7F, 0x01, 0x12, 0x63, 0x7F, 0x90, 0xA2, 0x19, 0xE0, 0x54, 0xFE, 0xF0, 0x90, 0x04, 0x8F, 0xE4, 0xF0, 0x22, 0x7E, 0x00, 0x7F, 0xA3, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0xA1, 0x79, 0x16, 0x12, 0x08, 0xAA, 0x90, 0xA1, 0x19, 0x74, 0x02, 0xF0, 0x90, 0xA1, 0x20, 0x14, 0xF0, 0xA3, 0xF0, 0xA3, 0x74, 0x08, 0xF0, 0x90, 0xA1, 0x25, 0xE4, 0xF0, @@ -1949,7 +5245,7 @@ u1Byte Array_MP_8723B_FW_NIC[] = { 0x30, 0xE2, 0x06, 0x90, 0xA1, 0x51, 0x74, 0x02, 0xF0, 0x90, 0xA1, 0xB9, 0x74, 0x03, 0xF0, 0xA3, 0x74, 0x05, 0xF0, 0xA3, 0xE0, 0x54, 0x01, 0x44, 0x28, 0xF0, 0xA3, 0x74, 0x05, 0xF0, 0x90, 0xA1, 0x51, 0xE0, 0x24, 0x04, 0x90, 0xA1, 0x2F, 0xF0, 0xA3, 0x74, 0x08, 0xF0, 0x90, 0xA1, 0xC4, 0xE0, -0x54, 0xFE, 0xF0, 0x12, 0x89, 0x0D, 0x7E, 0x00, 0x7F, 0x02, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0xA1, +0x54, 0xFE, 0xF0, 0x12, 0x92, 0xFC, 0x7E, 0x00, 0x7F, 0x02, 0x7D, 0x00, 0x7B, 0x01, 0x7A, 0xA1, 0x79, 0xBD, 0x12, 0x08, 0xAA, 0x90, 0x06, 0x04, 0xE0, 0x54, 0x7F, 0xF0, 0x90, 0x06, 0x0A, 0xE0, 0x54, 0xF8, 0xF0, 0xE4, 0xFD, 0xFF, 0x12, 0x49, 0x5E, 0xE4, 0x90, 0xA1, 0xBF, 0xF0, 0x22, 0xE0, 0x54, 0x7F, 0xF0, 0x7D, 0x0C, 0x7F, 0x01, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA4, @@ -1971,35 +5267,35 @@ u1Byte Array_MP_8723B_FW_NIC[] = { 0xE0, 0xFE, 0x6F, 0x70, 0x02, 0xE1, 0xA8, 0xEF, 0x70, 0x02, 0xE1, 0x1B, 0x24, 0xFE, 0x70, 0x02, 0xE1, 0x56, 0x24, 0xFE, 0x60, 0x4B, 0x24, 0xFC, 0x70, 0x02, 0xE1, 0x93, 0x24, 0xFC, 0x60, 0x02, 0xE1, 0xA8, 0xEE, 0xB4, 0x0E, 0x02, 0xD1, 0x21, 0x90, 0xA1, 0x1D, 0xE0, 0x70, 0x05, 0x7F, 0x01, -0x12, 0x6E, 0xE6, 0x90, 0xA1, 0x1D, 0xE0, 0xB4, 0x06, 0x02, 0xB1, 0xF6, 0x90, 0xA1, 0x1D, 0xE0, -0xB4, 0x04, 0x0F, 0x90, 0xA4, 0x0B, 0xE0, 0xFF, 0x60, 0x05, 0x12, 0xB7, 0x0D, 0x80, 0x03, 0x12, -0x88, 0xF9, 0x90, 0xA1, 0x1D, 0xE0, 0x64, 0x08, 0x60, 0x02, 0xE1, 0xA8, 0x12, 0x60, 0x3B, 0xE1, -0xA8, 0x90, 0xA1, 0x1D, 0xE0, 0x70, 0x05, 0x7F, 0x01, 0x12, 0x6E, 0xE6, 0x90, 0xA1, 0x1D, 0xE0, +0x12, 0x6E, 0xEC, 0x90, 0xA1, 0x1D, 0xE0, 0xB4, 0x06, 0x02, 0xB1, 0xF6, 0x90, 0xA1, 0x1D, 0xE0, +0xB4, 0x04, 0x0F, 0x90, 0xA4, 0x0B, 0xE0, 0xFF, 0x60, 0x05, 0x12, 0xBA, 0x79, 0x80, 0x03, 0x12, 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0xE0, 0xB4, 0x0C, 0x08, 0xF1, 0xAD, 0xBF, 0x01, 0x03, 0x12, 0xBA, +0xB8, 0x90, 0xA1, 0x1D, 0xE0, 0x64, 0x04, 0x70, 0x5F, 0x12, 0xBA, 0x09, 0xEF, 0x64, 0x01, 0x70, +0x57, 0x12, 0xBA, 0xE9, 0x80, 0x52, 0x90, 0xA1, 0x1D, 0xE0, 0xB4, 0x0E, 0x07, 0xF1, 0xAD, 0xBF, 0x01, 0x02, 0xD1, 0x21, 0x90, 0xA1, 0x1D, 0xE0, 0xB4, 0x06, 0x02, 0xB1, 0xF6, 0x90, 0xA1, 0x1D, -0xE0, 0xB4, 0x0C, 0x08, 0xF1, 0xAD, 0xBF, 0x01, 0x03, 0x12, 0xB7, 0x4C, 0x90, 0xA1, 0x1D, 0xE0, -0x70, 0x05, 0x7F, 0x01, 0x12, 0x6E, 0xE6, 0x90, 0xA1, 0x1D, 0xE0, 0xB4, 0x04, 0x1A, 0x12, 0xB7, -0x9E, 0x80, 0x15, 0x90, 0xA1, 0x1D, 0xE0, 0xB4, 0x0C, 0x0E, 0x90, 0xA1, 0x17, 0xE0, 0xFF, 0x13, +0xE0, 0xB4, 0x0C, 0x08, 0xF1, 0xAD, 0xBF, 0x01, 0x03, 0x12, 0xBA, 0xB8, 0x90, 0xA1, 0x1D, 0xE0, +0x70, 0x05, 0x7F, 0x01, 0x12, 0x6E, 0xEC, 0x90, 0xA1, 0x1D, 0xE0, 0xB4, 0x04, 0x1A, 0x12, 0xBB, +0x0A, 0x80, 0x15, 0x90, 0xA1, 0x1D, 0xE0, 0xB4, 0x0C, 0x0E, 0x90, 0xA1, 0x17, 0xE0, 0xFF, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x02, 0xF1, 0xE2, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0xA1, 0xCD, 0xE0, 0x30, 0xE0, 0x0D, 0x90, 0xA1, 0xD3, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0, 0x08, 0x80, -0x1E, 0x12, 0x73, 0x86, 0xBF, 0x01, 0x18, 0x90, 0xA1, 0x16, 0xE0, 0x13, 0x13, 0x13, 0x54, 0x1F, +0x1E, 0x12, 0x73, 0xF1, 0xBF, 0x01, 0x18, 0x90, 0xA1, 0x16, 0xE0, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x20, 0xE0, 0x0C, 0x90, 0xA1, 0x1C, 0xE0, 0xD3, 0x94, 0x04, 0x50, 0x03, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0x7D, 0x2F, 0x12, 0x46, 0xF8, 0x7D, 0x08, 0x7F, 0x01, 0xB1, 0x87, 0x90, 0xA1, 0x15, 0x74, 0x08, 0xF0, 0x22, 0x75, 0xE8, 0x07, 0x75, 0xA8, 0x85, 0x22, 0xE4, 0x90, 0xA2, 0xDD, 0xF0, 0x90, 0xA2, 0xDD, 0xE0, 0x64, 0x01, 0xF0, 0x24, 0xFB, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x57, 0xA3, 0xF0, 0x12, 0x3E, 0x44, 0xBF, 0x01, 0x03, 0x12, 0x31, 0xFC, 0x90, 0xA1, 0x1A, 0xE0, 0x60, 0x0E, 0x90, 0xA1, 0x1D, 0xE0, 0xFF, 0x90, 0xA1, 0x1C, 0xE0, 0x6F, 0x60, 0x02, 0x11, 0x4D, 0xC2, 0xAF, -0x12, 0x9B, 0x80, 0xBF, 0x01, 0x03, 0x12, 0x7D, 0xF4, 0xD2, 0xAF, 0x90, 0xA2, 0x56, 0xE0, 0xB4, -0x01, 0x03, 0x12, 0xB4, 0x33, 0x12, 0x4F, 0xFA, 0x12, 0x42, 0xDD, 0x80, 0xB3, 0x90, 0xA1, 0x11, +0x12, 0x9E, 0xF9, 0xBF, 0x01, 0x03, 0x12, 0x7E, 0x60, 0xD2, 0xAF, 0x90, 0xA2, 0x56, 0xE0, 0xB4, +0x01, 0x03, 0x12, 0xB7, 0x9F, 0x12, 0x4F, 0xFA, 0x12, 0x42, 0xDD, 0x80, 0xB3, 0x90, 0xA1, 0x11, 0xE0, 0x90, 0xA1, 0x1C, 0x30, 0xE0, 0x04, 0xE0, 0xFF, 0x80, 0x21, 0xE0, 0xFF, 0x7D, 0x01, 0x02, 0x56, 0x56, 0x90, 0xA1, 0x1A, 0xE0, 0x60, 0x13, 0x90, 0x06, 0x92, 0xE0, 0x30, 0xE1, 0x03, 0x02, -0xB6, 0x5D, 0x90, 0xA1, 0x16, 0xE0, 0x54, 0xF7, 0xF0, 0x11, 0x4D, 0x22, 0xAE, 0x07, 0x11, 0x9C, +0xB9, 0xC9, 0x90, 0xA1, 0x16, 0xE0, 0x54, 0xF7, 0xF0, 0x11, 0x4D, 0x22, 0xAE, 0x07, 0x11, 0x9C, 0xBF, 0x01, 0x16, 0x90, 0xA1, 0x11, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x20, 0xE0, 0x0A, 0xAF, 0x06, 0x7D, 0x01, 0x12, 0x56, 0x56, 0x7F, 0x01, 0x22, 0x7F, 0x00, 0x22, 0x90, 0x05, 0x43, 0xE0, 0x7F, 0x00, 0x30, 0xE7, 0x02, 0x7F, 0x01, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8B, @@ -2016,23 +5312,23 @@ u1Byte Array_MP_8723B_FW_NIC[] = { 0x43, 0x54, 0x12, 0xEF, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x03, 0x43, 0x54, 0x14, 0x90, 0xA1, 0x11, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0x30, 0xE0, 0x03, 0x43, 0x54, 0x80, 0x90, 0xA1, 0x11, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x20, 0xE0, 0x03, 0x43, 0x54, 0x40, 0x90, 0x05, 0x27, 0xE5, 0x54, 0xF0, -0x90, 0xA1, 0x14, 0xE0, 0x70, 0x05, 0x7F, 0x01, 0x12, 0x74, 0x9C, 0x90, 0xA1, 0x11, 0xE0, 0xFF, +0x90, 0xA1, 0x14, 0xE0, 0x70, 0x05, 0x7F, 0x01, 0x12, 0x75, 0x07, 0x90, 0xA1, 0x11, 0xE0, 0xFF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x04, 0x7F, 0x04, 0x80, 0x21, 0x11, 0x9C, 0xEF, 0x60, 0x04, 0x7F, 0x01, 0x80, 0x18, 0x7F, 0x02, 0x80, 0x14, 0x75, 0x54, 0x01, 0x90, 0x05, 0x27, 0xE5, -0x54, 0xF0, 0x90, 0xA1, 0x14, 0xE0, 0x64, 0x04, 0x60, 0x02, 0x41, 0x83, 0xFF, 0x12, 0x74, 0x9C, +0x54, 0xF0, 0x90, 0xA1, 0x14, 0xE0, 0x64, 0x04, 0x60, 0x02, 0x41, 0x83, 0xFF, 0x12, 0x75, 0x07, 0x41, 0x83, 0x90, 0xA1, 0x11, 0xE0, 0xFF, 0x20, 0xE0, 0x02, 0x41, 0x4F, 0x43, 0x54, 0x31, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x07, 0x51, 0x88, 0x43, 0x54, 0x08, 0x80, 0x06, 0x7D, 0x40, 0xE4, 0xFF, 0x51, 0xB0, 0x90, 0xA1, 0x11, 0xE0, 0xFF, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x03, 0x43, 0x54, 0x02, 0xEF, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x03, 0x43, 0x54, 0x04, 0x90, 0x05, 0x27, 0xE5, 0x54, 0xF0, 0x90, 0xA1, 0x11, 0xE0, 0xFF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x0E, 0x90, 0xA1, 0x15, 0xE0, 0x64, 0x02, 0x60, 0x6B, 0xE4, 0xFD, 0x7F, 0x02, 0x80, 0x22, 0x90, 0x05, -0x27, 0xE0, 0x44, 0x40, 0xF0, 0x90, 0xA1, 0x15, 0xE0, 0xB4, 0x02, 0x19, 0x12, 0xB7, 0xBA, 0x11, +0x27, 0xE0, 0x44, 0x40, 0xF0, 0x90, 0xA1, 0x15, 0xE0, 0xB4, 0x02, 0x19, 0x12, 0xBB, 0x26, 0x11, 0x9C, 0xBF, 0x01, 0x09, 0x90, 0xA1, 0x1C, 0xE0, 0xFF, 0x7D, 0x01, 0x80, 0x03, 0xE4, 0xFD, 0xFF, 0x12, 0x56, 0x56, 0x80, 0x3E, 0x90, 0xA1, 0x1D, 0xE0, 0x90, 0xA1, 0x15, 0xF0, 0x80, 0x34, 0x75, 0x54, 0x01, 0x90, 0x05, 0x27, 0xE5, 0x54, 0xF0, 0x90, 0xA1, 0x15, 0xE0, 0xB4, 0x02, 0x06, 0x7D, 0x01, 0x7F, 0x04, 0x80, 0x0B, 0x90, 0xA1, 0x15, 0xE0, 0xB4, 0x08, 0x07, 0x7D, 0x01, 0x7F, 0x0C, -0x12, 0x56, 0x56, 0x12, 0x73, 0x7E, 0x90, 0xA1, 0x1C, 0xE0, 0xFF, 0x7D, 0x01, 0x12, 0x56, 0x56, -0x12, 0xB4, 0xC9, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x01, 0x34, 0x74, 0x40, 0xF0, 0xFD, 0xE4, +0x12, 0x56, 0x56, 0x12, 0x73, 0xE9, 0x90, 0xA1, 0x1C, 0xE0, 0xFF, 0x7D, 0x01, 0x12, 0x56, 0x56, +0x12, 0xB8, 0x35, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0x90, 0x01, 0x34, 0x74, 0x40, 0xF0, 0xFD, 0xE4, 0xFF, 0x74, 0x15, 0x2F, 0xF8, 0xE6, 0x4D, 0xFE, 0xF6, 0x74, 0x30, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x01, 0xF5, 0x83, 0xEE, 0xF0, 0x22, 0x7D, 0x02, 0x7F, 0x02, 0x51, 0xB0, 0x7D, 0x01, 0x7F, 0x02, 0x74, 0x15, 0x2F, 0xF8, 0xE6, 0xFE, 0xED, 0xF4, 0x5E, 0xFE, 0xF6, 0x74, 0x30, 0x2F, 0xF5, 0x82, @@ -2045,10 +5341,10 @@ u1Byte Array_MP_8723B_FW_NIC[] = { 0x90, 0xA1, 0x15, 0xE0, 0x64, 0x02, 0x60, 0x35, 0x90, 0xA1, 0x1A, 0xE0, 0x70, 0x04, 0xEF, 0x30, 0xE0, 0x0A, 0x90, 0xA1, 0x1D, 0xE0, 0x64, 0x02, 0x60, 0x23, 0x91, 0x5B, 0x90, 0xA1, 0x17, 0xE0, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x15, 0x90, 0xA1, 0x20, 0xE0, 0xFF, 0xA3, 0xE0, 0x6F, -0x70, 0x0B, 0x12, 0x7F, 0xA9, 0x51, 0xA6, 0x90, 0xA1, 0x21, 0xE0, 0x14, 0xF0, 0x22, 0xEF, 0x70, +0x70, 0x0B, 0x12, 0x7F, 0xFC, 0x51, 0xA6, 0x90, 0xA1, 0x21, 0xE0, 0x14, 0xF0, 0x22, 0xEF, 0x70, 0x4E, 0x7D, 0x78, 0x7F, 0x02, 0x51, 0xB0, 0x7D, 0x02, 0x7F, 0x03, 0x51, 0xB0, 0x7D, 0xC8, 0x7F, 0x02, 0xF1, 0xF3, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0xF0, 0x90, 0xA0, -0x90, 0xE0, 0x70, 0x15, 0x12, 0x60, 0x4D, 0x12, 0x88, 0xF9, 0x90, 0xA1, 0x16, 0xE0, 0x54, 0xF7, +0x90, 0xE0, 0x70, 0x15, 0x12, 0x60, 0x4D, 0x12, 0x92, 0xE8, 0x90, 0xA1, 0x16, 0xE0, 0x54, 0xF7, 0xF0, 0x54, 0xBF, 0xF0, 0x54, 0x7F, 0xF0, 0x80, 0x07, 0x7D, 0x01, 0x7F, 0x0C, 0x12, 0x56, 0x56, 0x90, 0xA1, 0x16, 0xE0, 0x54, 0xF7, 0xF0, 0x90, 0x06, 0x0A, 0xE0, 0x54, 0xF8, 0xF0, 0x22, 0x90, 0x01, 0x36, 0x74, 0x78, 0xF0, 0xA3, 0x74, 0x02, 0xF0, 0x7D, 0x78, 0xFF, 0x51, 0x91, 0x7D, 0x02, @@ -2061,29 +5357,29 @@ u1Byte Array_MP_8723B_FW_NIC[] = { 0xB4, 0x02, 0x05, 0xE4, 0x90, 0xA3, 0x15, 0xF0, 0x11, 0x9C, 0xEF, 0x70, 0x04, 0x90, 0xA3, 0x15, 0xF0, 0x90, 0xA3, 0x15, 0xE0, 0x60, 0x23, 0x90, 0xA1, 0x1E, 0xE0, 0x44, 0x10, 0xF0, 0xE4, 0x90, 0xA3, 0xAE, 0xF0, 0x90, 0xA1, 0x22, 0xE0, 0x90, 0xA3, 0xAF, 0x12, 0x48, 0x21, 0x90, 0xA1, 0x1D, -0xE0, 0x20, 0xE2, 0x03, 0x12, 0x56, 0x52, 0x12, 0x80, 0x1B, 0x22, 0x90, 0xA0, 0x90, 0xE0, 0x64, +0xE0, 0x20, 0xE2, 0x03, 0x12, 0x56, 0x52, 0x12, 0x8A, 0x1D, 0x22, 0x90, 0xA0, 0x90, 0xE0, 0x64, 0x01, 0x60, 0x02, 0xA1, 0x0A, 0x90, 0xA1, 0x1A, 0xE0, 0x70, 0x02, 0xA1, 0x0A, 0x90, 0xA1, 0x18, 0xE0, 0xFF, 0xC4, 0x54, 0x0F, 0x64, 0x01, 0x70, 0x26, 0x90, 0x06, 0xAB, 0xE0, 0x90, 0xA1, 0x21, 0xF0, 0x90, 0x06, 0xAA, 0xE0, 0x04, 0x90, 0xA1, 0x20, 0xF0, 0xA3, 0xE0, 0xFF, 0x70, 0x08, 0x90, 0xA1, 0x20, 0xE0, 0xFE, 0xFF, 0x80, 0x03, 0xEF, 0x04, 0xFF, 0x90, 0xA1, 0x21, 0xEF, 0xF0, 0x90, -0xA1, 0x16, 0xE0, 0x30, 0xE0, 0x03, 0x12, 0x89, 0x2E, 0x90, 0xA1, 0x17, 0xE0, 0x44, 0x04, 0xF0, +0xA1, 0x16, 0xE0, 0x30, 0xE0, 0x03, 0x12, 0x93, 0x1D, 0x90, 0xA1, 0x17, 0xE0, 0x44, 0x04, 0xF0, 0xE4, 0x90, 0xA1, 0x23, 0xF0, 0x90, 0xA1, 0x25, 0xA3, 0xE0, 0x90, 0x05, 0x58, 0xF0, 0x90, 0x01, 0x57, 0xE4, 0xF0, 0x90, 0x01, 0x3C, 0x74, 0x02, 0xF0, 0x90, 0xA1, 0x1E, 0xE0, 0x54, 0xFD, 0xF0, 0x54, 0xEF, 0xF0, 0x90, 0xA1, 0x18, 0xE0, 0xFF, 0xC4, 0x54, 0x0F, 0x24, 0xFD, 0x50, 0x02, 0x80, -0x0E, 0x90, 0xA1, 0x11, 0xE0, 0x30, 0xE0, 0x05, 0x12, 0xB5, 0x99, 0x80, 0x02, 0xB1, 0x1B, 0x90, +0x0E, 0x90, 0xA1, 0x11, 0xE0, 0x30, 0xE0, 0x05, 0x12, 0xB9, 0x05, 0x80, 0x02, 0xB1, 0x1B, 0x90, 0xA1, 0x17, 0xE0, 0x13, 0x13, 0x13, 0x54, 0x1F, 0x30, 0xE0, 0x0F, 0x90, 0xA1, 0x20, 0xE0, 0xFF, -0xA3, 0xE0, 0xB5, 0x07, 0x05, 0x12, 0x7F, 0xA9, 0x51, 0xAC, 0x90, 0xA1, 0x11, 0xE0, 0xC3, 0x13, +0xA3, 0xE0, 0xB5, 0x07, 0x05, 0x12, 0x7F, 0xFC, 0x51, 0xAC, 0x90, 0xA1, 0x11, 0xE0, 0xC3, 0x13, 0x20, 0xE0, 0x07, 0x90, 0xA1, 0x17, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0xE4, 0xF5, 0x63, 0x90, 0x06, 0xA9, 0xE0, 0xF5, 0x63, 0x54, 0xC0, 0x70, 0x0C, 0x90, 0xA1, 0x1E, 0xE0, 0x54, 0xFE, 0xF0, 0x54, 0xFD, 0xF0, 0x01, 0x4D, 0xE5, 0x63, 0x30, 0xE6, 0x23, 0x90, 0xA1, 0x1A, 0xE0, 0x64, 0x01, 0x70, 0x22, 0x90, 0xA1, 0x1E, 0xE0, 0x44, 0x01, 0xF0, 0x90, 0xA1, 0x18, 0xE0, 0x54, 0x0F, 0x64, 0x02, -0x60, 0x05, 0x12, 0xB6, 0x32, 0x80, 0x0C, 0x12, 0x4F, 0x9B, 0x80, 0x07, 0x90, 0xA1, 0x1E, 0xE0, +0x60, 0x05, 0x12, 0xB9, 0x9E, 0x80, 0x0C, 0x12, 0x4F, 0x9B, 0x80, 0x07, 0x90, 0xA1, 0x1E, 0xE0, 0x54, 0xFE, 0xF0, 0xE5, 0x63, 0x90, 0xA1, 0x1E, 0x30, 0xE7, 0x1B, 0xE0, 0x44, 0x02, 0xF0, 0xE4, 0x90, 0xA3, 0xAE, 0xF0, 0x90, 0xA1, 0xBA, 0xE0, 0x90, 0xA3, 0xAF, 0x12, 0x48, 0x21, 0x90, 0xA1, 0x16, 0xE0, 0x44, 0x04, 0xF0, 0x22, 0xE0, 0x54, 0xFD, 0xF0, 0x22, 0x90, 0xA1, 0xE8, 0xE0, 0x30, -0xE0, 0x05, 0x12, 0x87, 0x20, 0x80, 0x03, 0x12, 0x63, 0x03, 0x90, 0xA2, 0x13, 0xE0, 0x30, 0xE0, +0xE0, 0x05, 0x12, 0x91, 0x0F, 0x80, 0x03, 0x12, 0x63, 0x03, 0x90, 0xA2, 0x13, 0xE0, 0x30, 0xE0, 0x04, 0xA3, 0xE0, 0x04, 0xF0, 0x90, 0xA2, 0x14, 0xE0, 0x64, 0x08, 0x70, 0x1B, 0x90, 0xA2, 0x13, -0xE0, 0x30, 0xE0, 0x0F, 0x12, 0x7B, 0x8F, 0x90, 0xA2, 0x13, 0xE0, 0x54, 0xFE, 0xF0, 0xE4, 0xA3, +0xE0, 0x30, 0xE0, 0x0F, 0x12, 0x7B, 0xFA, 0x90, 0xA2, 0x13, 0xE0, 0x54, 0xFE, 0xF0, 0xE4, 0xA3, 0xF0, 0x80, 0x05, 0xE4, 0x90, 0xA2, 0x14, 0xF0, 0x90, 0xA1, 0xD1, 0xE0, 0xFF, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x13, 0x90, 0xA2, 0x15, 0xE0, 0x04, 0xF0, 0xE0, 0xB4, 0x14, 0x09, 0x90, 0x04, 0x9C, 0xE4, 0xF0, 0x90, 0xA2, 0x15, 0xF0, 0x90, 0xA1, 0x11, 0xE0, 0x30, 0xE0, 0x06, 0x90, @@ -2100,20 +5396,20 @@ u1Byte Array_MP_8723B_FW_NIC[] = { 0xB7, 0x90, 0x9F, 0x97, 0xE0, 0x45, 0x71, 0xF0, 0x22, 0x7D, 0x03, 0x7F, 0x11, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA3, 0xB6, 0xEF, 0xF0, 0xA3, 0xED, 0xF0, 0xA3, 0x12, 0x45, 0xBE, 0x12, 0x46, 0xC6, 0xEF, 0x54, 0x0F, 0x64, 0x04, 0x70, 0x22, 0x90, 0xFD, 0x58, 0xE0, 0x20, 0xE0, -0x13, 0x90, 0xA3, 0xB6, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0xA3, 0x12, 0x45, 0xB5, 0x12, 0x90, 0x30, +0x13, 0x90, 0xA3, 0xB6, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0xA3, 0x12, 0x45, 0xB5, 0x12, 0x97, 0xC7, 0x7F, 0x01, 0x80, 0x0E, 0x7F, 0x01, 0xD1, 0x86, 0x7F, 0x02, 0x80, 0x06, 0x7F, 0x02, 0xD1, 0x86, 0x7F, 0x03, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA3, 0x8B, 0x74, 0x15, 0xF0, 0x90, 0xA3, 0x99, 0x74, 0x01, 0xF0, 0x90, 0xA3, 0x8D, 0xEF, 0xF0, 0x7B, -0x01, 0x7A, 0xA3, 0x79, 0x8B, 0x12, 0x6F, 0x7B, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xC0, 0xE0, 0xC0, +0x01, 0x7A, 0xA3, 0x79, 0x8B, 0x12, 0x6F, 0xEA, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83, 0xC0, 0x82, 0xC0, 0xD0, 0x75, 0xD0, 0x00, 0xC0, 0x00, 0xC0, 0x01, 0xC0, 0x02, 0xC0, 0x03, 0xC0, 0x04, 0xC0, 0x05, 0xC0, 0x06, 0xC0, 0x07, 0x90, 0x01, 0xC4, 0x74, 0x0D, 0xF0, -0x74, 0x5F, 0xA3, 0xF0, 0x12, 0x9B, 0xEF, 0xE5, 0x21, 0x30, 0xE1, 0x03, 0x12, 0x9C, 0xA0, 0xE5, +0x74, 0x5F, 0xA3, 0xF0, 0x12, 0x9F, 0x68, 0xE5, 0x21, 0x30, 0xE1, 0x03, 0x12, 0xA0, 0x19, 0xE5, 0x21, 0x30, 0xE2, 0x02, 0x11, 0x62, 0xE5, 0x21, 0x30, 0xE5, 0x02, 0xF1, 0xD7, 0xE5, 0x22, 0x30, -0xE0, 0x03, 0x12, 0x8A, 0x85, 0xE5, 0x23, 0x30, 0xE1, 0x03, 0x12, 0x74, 0x0C, 0xE5, 0x23, 0x30, -0xE0, 0x03, 0x12, 0x73, 0x9F, 0xE5, 0x23, 0x30, 0xE3, 0x02, 0xF1, 0xD6, 0xE5, 0x23, 0x30, 0xE2, -0x0A, 0x12, 0x81, 0x44, 0x90, 0x07, 0x8F, 0xE0, 0x44, 0x10, 0xF0, 0xE5, 0x24, 0x30, 0xE1, 0x04, +0xE0, 0x03, 0x12, 0x94, 0x74, 0xE5, 0x23, 0x30, 0xE1, 0x03, 0x12, 0x74, 0x77, 0xE5, 0x23, 0x30, +0xE0, 0x03, 0x12, 0x74, 0x0A, 0xE5, 0x23, 0x30, 0xE3, 0x02, 0xF1, 0xD6, 0xE5, 0x23, 0x30, 0xE2, +0x0A, 0x12, 0x8B, 0x46, 0x90, 0x07, 0x8F, 0xE0, 0x44, 0x10, 0xF0, 0xE5, 0x24, 0x30, 0xE1, 0x04, 0x7F, 0x04, 0xD1, 0x8A, 0xE5, 0x24, 0x30, 0xE4, 0x02, 0x71, 0x03, 0xE5, 0x24, 0x30, 0xE5, 0x03, -0x12, 0x9C, 0xF5, 0xE5, 0x24, 0x30, 0xE6, 0x03, 0x12, 0x9D, 0x31, 0xE5, 0x24, 0x30, 0xE7, 0x03, +0x12, 0xA0, 0x6E, 0xE5, 0x24, 0x30, 0xE6, 0x03, 0x12, 0xA0, 0xAA, 0xE5, 0x24, 0x30, 0xE7, 0x03, 0x12, 0x67, 0xB1, 0x74, 0x0D, 0x04, 0x90, 0x01, 0xC4, 0xF0, 0x74, 0x5F, 0xA3, 0xF0, 0xD0, 0x07, 0xD0, 0x06, 0xD0, 0x05, 0xD0, 0x04, 0xD0, 0x03, 0xD0, 0x02, 0xD0, 0x01, 0xD0, 0x00, 0xD0, 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0, 0xE0, 0x32, 0x90, 0xA1, 0xCD, 0xE0, 0x30, 0xE0, 0x05, @@ -2122,7 +5418,7 @@ u1Byte Array_MP_8723B_FW_NIC[] = { 0x20, 0xE4, 0xFF, 0x74, 0x1D, 0x2F, 0xF8, 0xE6, 0xFE, 0xED, 0xF4, 0x5E, 0xFE, 0xF6, 0x74, 0x38, 0x2F, 0xF5, 0x82, 0xE4, 0x34, 0x01, 0xF5, 0x83, 0xEE, 0xF0, 0x22, 0xAC, 0x07, 0xEF, 0x54, 0x01, 0xFE, 0x90, 0xA1, 0xC0, 0xE0, 0x54, 0xFE, 0x4E, 0xF0, 0xEF, 0x90, 0x01, 0x53, 0xB4, 0x01, 0x12, -0xE4, 0xF0, 0x7D, 0x10, 0x7F, 0x03, 0x12, 0x7F, 0xB8, 0x90, 0xA1, 0xC2, 0xE0, 0x90, 0x05, 0x73, +0xE4, 0xF0, 0x7D, 0x10, 0x7F, 0x03, 0x12, 0x80, 0x0B, 0x90, 0xA1, 0xC2, 0xE0, 0x90, 0x05, 0x73, 0xF0, 0x22, 0x74, 0x03, 0xF0, 0x7D, 0x10, 0xFF, 0x12, 0x5F, 0xF3, 0x11, 0x4D, 0xE4, 0xFD, 0xFF, 0x12, 0x49, 0x5E, 0x12, 0x55, 0x83, 0x90, 0xA1, 0x15, 0x74, 0x0C, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0x01, 0x01, 0xE0, 0x44, 0x02, 0xF0, 0x90, 0x01, 0x00, 0x74, 0xFF, @@ -2162,7 +5458,7 @@ u1Byte Array_MP_8723B_FW_NIC[] = { 0xE0, 0x70, 0x04, 0x7D, 0x04, 0x80, 0x0A, 0x90, 0xA3, 0xC0, 0xE0, 0x64, 0x03, 0x70, 0x34, 0x7D, 0x0B, 0x7F, 0x6F, 0x80, 0x2B, 0x90, 0xA3, 0xC0, 0xE0, 0x70, 0x04, 0xFD, 0xFF, 0x80, 0x21, 0x90, 0xA3, 0xC0, 0xE0, 0xB4, 0x03, 0x1D, 0x90, 0xA1, 0xCD, 0xE0, 0xFF, 0xC4, 0x13, 0x54, 0x07, 0x20, -0xE0, 0x0B, 0xEF, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x03, 0x12, 0xB6, 0x32, 0xE4, 0xFD, 0xFF, +0xE0, 0x0B, 0xEF, 0x13, 0x13, 0x54, 0x3F, 0x30, 0xE0, 0x03, 0x12, 0xB9, 0x9E, 0xE4, 0xFD, 0xFF, 0x12, 0x49, 0x5E, 0x90, 0xA1, 0xD0, 0xE0, 0xC4, 0x13, 0x13, 0x13, 0x54, 0x01, 0x30, 0xE0, 0x04, 0x7F, 0x01, 0xF1, 0xE7, 0x90, 0xA1, 0xD1, 0xE0, 0xC3, 0x13, 0x90, 0x06, 0xCD, 0x30, 0xE0, 0x0D, 0xE0, 0x44, 0x10, 0xF0, 0x90, 0x06, 0xCF, 0xE0, 0x44, 0x10, 0xF0, 0x80, 0x0B, 0xE0, 0x54, 0xEF, @@ -2175,7 +5471,7 @@ u1Byte Array_MP_8723B_FW_NIC[] = { 0xCE, 0x51, 0xED, 0x90, 0xA1, 0xE0, 0x74, 0x01, 0xF0, 0x90, 0xA1, 0xDF, 0x74, 0x01, 0xF0, 0x90, 0xA1, 0xBF, 0xE0, 0x60, 0x07, 0x7D, 0x05, 0x7F, 0x6F, 0x02, 0x49, 0x5E, 0xE4, 0xFD, 0xFF, 0x12, 0x49, 0x5E, 0x90, 0xA1, 0xCD, 0xE0, 0xFF, 0xC4, 0x13, 0x54, 0x07, 0x20, 0xE0, 0x0B, 0xEF, 0x13, -0x13, 0x54, 0x3F, 0x30, 0xE0, 0x03, 0x12, 0xB6, 0x32, 0x22, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0xD3, +0x13, 0x54, 0x3F, 0x30, 0xE0, 0x03, 0x12, 0xB9, 0x9E, 0x22, 0xE0, 0xFF, 0xA3, 0xE0, 0xFD, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x8F, 0x26, 0x8D, 0x27, 0x90, 0xA1, 0xD0, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x30, 0xE0, 0x02, 0xA1, 0x22, 0x90, 0xA2, 0x0D, 0xE0, 0x60, 0x02, 0x81, 0x42, 0xE5, 0x26, 0x64, 0x02, 0x60, 0x4A, 0xE5, 0x27, 0x70, 0x46, 0x7F, 0x48, 0x7E, 0x09, 0x12, 0x37, @@ -2226,20 +5522,20 @@ u1Byte Array_MP_8723B_FW_NIC[] = { 0xD0, 0xE0, 0x30, 0xE0, 0x06, 0xE4, 0xFD, 0xFF, 0x12, 0x49, 0x5E, 0x90, 0xA1, 0xD0, 0xE0, 0xC4, 0x13, 0x13, 0x13, 0x54, 0x01, 0x30, 0xE0, 0x04, 0xE4, 0xFF, 0xF1, 0xE7, 0x90, 0xA1, 0xD1, 0xE0, 0xC3, 0x13, 0x90, 0x06, 0xCD, 0xE0, 0x54, 0xEF, 0xF0, 0x90, 0x06, 0xCF, 0xE0, 0x54, 0xEF, 0xF0, -0x22, 0x90, 0xA1, 0xCD, 0xE0, 0x30, 0xE0, 0x36, 0x12, 0x81, 0x77, 0x90, 0xA1, 0xE0, 0xE0, 0xFF, +0x22, 0x90, 0xA1, 0xCD, 0xE0, 0x30, 0xE0, 0x36, 0x12, 0x8B, 0x79, 0x90, 0xA1, 0xE0, 0xE0, 0xFF, 0xB4, 0x01, 0x02, 0x80, 0x1C, 0x90, 0xA1, 0xE0, 0xE0, 0xFF, 0xB4, 0x02, 0x02, 0x80, 0x1D, 0x90, 0xA1, 0xE0, 0xE0, 0xFF, 0xB4, 0x03, 0x02, 0x01, 0xCE, 0x90, 0xA1, 0xE0, 0xE0, 0xFF, 0xB4, 0x04, -0x03, 0x02, 0x83, 0xE9, 0x90, 0xA1, 0xE0, 0xE0, 0xFF, 0xB4, 0x05, 0x02, 0xB1, 0x27, 0x22, 0xD3, +0x03, 0x02, 0x8D, 0xEB, 0x90, 0xA1, 0xE0, 0xE0, 0xFF, 0xB4, 0x05, 0x02, 0xB1, 0x27, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xEF, 0xB4, 0x03, 0x13, 0x90, 0xA1, 0xD0, 0xE0, 0xC4, 0x13, 0x13, 0x54, 0x03, 0x90, 0x06, 0xCC, 0x30, 0xE0, 0x35, 0xE4, 0xF0, 0x80, 0x34, 0x90, 0xA1, 0xD1, 0xE0, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x0C, 0xEF, 0x90, 0x06, 0xCC, 0x70, 0x03, 0xF0, 0x80, 0x03, 0x74, 0x03, 0xF0, 0x90, 0xA2, 0x19, 0xE0, 0x30, 0xE0, 0x17, 0xC4, 0x54, 0x0F, 0x30, 0xE0, 0x0B, 0xEF, 0x90, 0x06, 0xCC, 0x70, 0x03, 0xF0, 0x80, 0x08, 0x80, 0x03, 0x90, 0x06, 0xCC, 0x74, 0x03, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0x90, 0xA2, 0x20, -0xE0, 0xB4, 0x01, 0x02, 0x80, 0x4C, 0x90, 0xA2, 0x20, 0xE0, 0xB4, 0x02, 0x12, 0x12, 0x81, 0x1D, -0x7F, 0x01, 0xD1, 0xDF, 0x12, 0x87, 0x4F, 0x90, 0xA2, 0x20, 0x74, 0x03, 0xF0, 0x80, 0x4D, 0x90, -0xA2, 0x20, 0xE0, 0x64, 0x03, 0x70, 0x24, 0x90, 0xA2, 0x23, 0x12, 0x81, 0x20, 0xE4, 0xFF, 0xD1, -0xDF, 0x12, 0x87, 0x4F, 0x90, 0xA2, 0x19, 0xE0, 0xC3, 0x13, 0x54, 0x03, 0xFF, 0xE4, 0xFB, 0xFD, +0xE0, 0xB4, 0x01, 0x02, 0x80, 0x4C, 0x90, 0xA2, 0x20, 0xE0, 0xB4, 0x02, 0x12, 0x12, 0x8B, 0x1F, +0x7F, 0x01, 0xD1, 0xDF, 0x12, 0x91, 0x3E, 0x90, 0xA2, 0x20, 0x74, 0x03, 0xF0, 0x80, 0x4D, 0x90, +0xA2, 0x20, 0xE0, 0x64, 0x03, 0x70, 0x24, 0x90, 0xA2, 0x23, 0x12, 0x8B, 0x22, 0xE4, 0xFF, 0xD1, +0xDF, 0x12, 0x91, 0x3E, 0x90, 0xA2, 0x19, 0xE0, 0xC3, 0x13, 0x54, 0x03, 0xFF, 0xE4, 0xFB, 0xFD, 0x12, 0x4C, 0xA9, 0x90, 0xA2, 0x20, 0x74, 0x04, 0xF0, 0x80, 0x21, 0x90, 0xA2, 0x20, 0xE0, 0xB4, 0x04, 0x1A, 0x90, 0xA2, 0x19, 0xE0, 0xC3, 0x13, 0x54, 0x03, 0xFF, 0x7B, 0x01, 0x7D, 0x01, 0x12, 0x4C, 0xA9, 0x90, 0xA2, 0x20, 0x74, 0x02, 0xF0, 0x90, 0xA2, 0x1E, 0xF0, 0xD0, 0xD0, 0x92, 0xAF, @@ -2251,12 +5547,12 @@ u1Byte Array_MP_8723B_FW_NIC[] = { 0x90, 0xAA, 0xB9, 0x12, 0x08, 0x6D, 0x7F, 0x80, 0x7E, 0x08, 0x12, 0x38, 0x45, 0x22, 0xE4, 0xFB, 0xFA, 0xFD, 0x7F, 0x01, 0x12, 0x44, 0xDE, 0x90, 0xA2, 0xE6, 0xEF, 0xF0, 0x60, 0xF0, 0x90, 0x9F, 0x97, 0xE0, 0x60, 0xEA, 0xC2, 0xAF, 0x30, 0xE0, 0x0A, 0x54, 0xFE, 0xF0, 0xE4, 0xFF, 0x31, 0xBD, -0x12, 0xA4, 0xDE, 0xD2, 0xAF, 0xC2, 0xAF, 0x90, 0x9F, 0x97, 0xE0, 0xFF, 0x30, 0xE1, 0x05, 0x54, +0x12, 0xA8, 0x5D, 0xD2, 0xAF, 0xC2, 0xAF, 0x90, 0x9F, 0x97, 0xE0, 0xFF, 0x30, 0xE1, 0x05, 0x54, 0xFD, 0xF0, 0x11, 0xE3, 0xD2, 0xAF, 0xC2, 0xAF, 0x90, 0x9F, 0x97, 0xE0, 0xFF, 0x30, 0xE2, 0x05, 0x54, 0xFB, 0xF0, 0x11, 0x91, 0xD2, 0xAF, 0xC2, 0xAF, 0x90, 0x9F, 0x97, 0xE0, 0xFF, 0x30, 0xE6, 0x05, 0x54, 0xBF, 0xF0, 0x11, 0x6A, 0xD2, 0xAF, 0x80, 0xB4, 0xE4, 0x7B, 0x01, 0x7A, 0xA2, 0x79, 0x16, 0x12, 0x5E, 0x99, 0xEF, 0xB4, 0x02, 0x18, 0x90, 0xA3, 0xE4, 0xE0, 0x64, 0x04, 0x60, 0x0B, -0x7F, 0x40, 0x91, 0xD9, 0x90, 0xA3, 0xE4, 0xE0, 0x04, 0xF0, 0x22, 0xE4, 0x90, 0xA3, 0xE4, 0xF0, +0x7F, 0x40, 0x91, 0xE0, 0x90, 0xA3, 0xE4, 0xE0, 0x04, 0xF0, 0x22, 0xE4, 0x90, 0xA3, 0xE4, 0xF0, 0x22, 0xD3, 0x10, 0xAF, 0x01, 0xC3, 0xC0, 0xD0, 0xE4, 0xFF, 0x90, 0xA0, 0x8C, 0xE0, 0xFE, 0x90, 0xA0, 0x8B, 0xE0, 0xFD, 0xB5, 0x06, 0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEE, 0x64, 0x01, 0x60, 0x2C, 0xED, 0x75, 0xF0, 0x0F, 0xA4, 0x24, 0xF5, 0xF9, 0x74, 0x9F, 0x35, 0xF0, 0xFA, 0x7B, @@ -2266,3984 +5562,475 @@ u1Byte Array_MP_8723B_FW_NIC[] = { 0x9F, 0xF3, 0xE0, 0xB5, 0x07, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x70, 0x43, 0x90, 0x9F, 0xF3, 0xE0, 0xFE, 0x75, 0xF0, 0x08, 0x90, 0x9F, 0xA3, 0x12, 0x45, 0xA9, 0xE0, 0xFD, 0xEE, 0x75, 0xF0, 0x08, 0xA4, 0x24, 0xA4, 0xF9, 0x74, 0x9F, 0x35, 0xF0, 0xFA, 0x7B, 0x01, 0xAF, 0x05, -0x71, 0x16, 0x90, 0x9F, 0xF3, 0xE0, 0x04, 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-void -ODM_ReadFirmware_MP_8723B_FW_NIC( - IN PDM_ODM_T pDM_Odm, - OUT u1Byte *pFirmware, - OUT u4Byte *pFirmwareSize -) -{ -#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) - *((SIZE_PTR *)pFirmware) = (SIZE_PTR)Array_MP_8723B_FW_NIC; -#else - ODM_MoveMemory(pDM_Odm, pFirmware, Array_MP_8723B_FW_NIC, ArrayLength_MP_8723B_FW_NIC); -#endif - *pFirmwareSize = ArrayLength_MP_8723B_FW_NIC; -} - -// v23.03 20140227 by Glayrainx -u1Byte Array_MP_8723B_FW_WoWLAN[] = { -0x01, 0x53, 0x30, 0x00, 0x17, 0x00, 0x03, 0x00, 0x02, 0x27, 0x13, 0x06, 0x34, 0x6C, 0x00, 0x00, -0x7D, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x02, 0x47, 0xC6, 0x02, 0x68, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x00, 0x00, 0x00, 0x02, 0x68, 0xB1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x00, 0x00, 0x00, 0x02, 0x75, 0x48, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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0xEF, 0xD0, 0xD0, 0x92, -0xAF, 0x22, 0xAF, 0x33 -}; -u4Byte ArrayLength_MP_8723B_FW_WoWLAN = 27732; - - -void -ODM_ReadFirmware_MP_8723B_FW_WoWLAN( - IN PDM_ODM_T pDM_Odm, - OUT u1Byte *pFirmware, - OUT u4Byte *pFirmwareSize -) -{ -#if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) - *((SIZE_PTR *)pFirmware) = (SIZE_PTR)Array_MP_8723B_FW_WoWLAN; - *pFirmwareSize = ArrayLength_MP_8723B_FW_WoWLAN; -#else - ODM_MoveMemory(pDM_Odm, pFirmware, Array_MP_8723B_FW_WoWLAN, ArrayLength_MP_8723B_FW_WoWLAN); - *pFirmwareSize = ArrayLength_MP_8723B_FW_WoWLAN; -#endif -} - - -// v15.34 20131011 by Gimmy -u1Byte Array_MP_8723B_FW_MP[] = { -0x01, 0x53, 0x10, 0x00, 0x12, 0x00, 0x02, 0x00, 0x11, 0x21, 0x22, 0x48, 0x22, 0x7B, 0x00, 0x00, -0x4E, 0x0D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x02, 0x45, 0x8D, 0x02, 0x60, 0x1D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x00, 0x00, 0x00, 0x02, 0x60, 0xC4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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0x90, 0xA1, 0x1D, 0xE0, 0x64, 0x0E, 0x70, +0x15, 0x90, 0xA4, 0x0C, 0xE0, 0x70, 0x3B, 0x90, 0xA1, 0x16, 0xE0, 0x54, 0x7F, 0xF0, 0x90, 0x06, +0x04, 0x12, 0x55, 0x7F, 0x80, 0x26, 0x90, 0xA1, 0x1D, 0xE0, 0x64, 0x06, 0x70, 0x24, 0x90, 0xA4, +0x0C, 0xE0, 0x60, 0x1E, 0x90, 0xA1, 0x16, 0xE0, 0x54, 0xBF, 0xF0, 0x90, 0x06, 0x04, 0xE0, 0x44, +0x40, 0xF0, 0xE0, 0x44, 0x80, 0xF0, 0x90, 0xA1, 0x1D, 0x74, 0x04, 0xF0, 0xE4, 0xFD, 0xFF, 0x12, +0x49, 0x5E, 0xD0, 0xD0, 0x92, 0xAF, 0x22, 0xE4, 0xFE, 0xEF, 0xC3, 0x13, 0xFD, 0xEF, 0x30, 0xE0, +0x02, 0x7E, 0x80, 0x90, 0xFD, 0x10, 0xED, 0xF0, 0xAF, 0x06, 0x22, 0x00, 0x14, 0xF9, }; -u4Byte ArrayLength_MP_8723B_FW_MP = 31554; +u4Byte ArrayLength_MP_8723B_FW_MP = 31870; void diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_FW.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_FW.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_MAC.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_MAC.c old mode 100644 new mode 100755 index 3246fbb9706f..98068e6b201b --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_MAC.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_MAC.c @@ -18,41 +18,95 @@ * ******************************************************************************/ -//#include "Mp_Precomp.h" + #include "../odm_precomp.h" #if (RTL8723B_SUPPORT == 1) static BOOLEAN -CheckCondition( - const u4Byte Condition, - const u4Byte Hex +CheckPositive( + IN PDM_ODM_T pDM_Odm, + IN const u4Byte Condition1, + IN const u4Byte Condition2 ) { - u4Byte _board = (Hex & 0x000000FF); - u4Byte _interface = (Hex & 0x0000FF00) >> 8; - u4Byte _platform = (Hex & 0x00FF0000) >> 16; - u4Byte cond = Condition; + u1Byte _BoardType = ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | // _GLNA + ((pDM_Odm->BoardType & BIT3) >> 3) << 1 | // _GPA + ((pDM_Odm->BoardType & BIT7) >> 7) << 2 | // _ALNA + ((pDM_Odm->BoardType & BIT6) >> 6) << 3 | // _APA + ((pDM_Odm->BoardType & BIT2) >> 2) << 4; // _BT - if ( Condition == 0xCDCDCDCD ) - return TRUE; + u4Byte cond1 = Condition1, cond2 = Condition2; + u4Byte driver1 = pDM_Odm->CutVersion << 24 | + pDM_Odm->SupportPlatform << 16 | + pDM_Odm->PackageType << 12 | + pDM_Odm->SupportInterface << 8 | + _BoardType; - cond = Condition & 0x000000FF; - if ( (_board != cond) && (cond != 0xFF) ) - return FALSE; + u4Byte driver2 = pDM_Odm->TypeGLNA << 0 | + pDM_Odm->TypeGPA << 8 | + pDM_Odm->TypeALNA << 16 | + pDM_Odm->TypeAPA << 24; - cond = Condition & 0x0000FF00; - cond = cond >> 8; - if ( ((_interface & cond) == 0) && (cond != 0x07) ) - return FALSE; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, + ("===> [8812A] CheckPositive (cond1, cond2) = (0x%X 0x%X)\n", cond1, cond2)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, + ("===> [8812A] CheckPositive (driver1, driver2) = (0x%X 0x%X)\n", driver1, driver2)); - cond = Condition & 0x00FF0000; - cond = cond >> 16; - if ( ((_platform & cond) == 0) && (cond != 0x0F) ) + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, + (" (Platform, Interface) = (0x%X, 0x%X)\n", pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, + (" (Board, Package) = (0x%X, 0x%X)\n", pDM_Odm->BoardType, pDM_Odm->PackageType)); + + + //============== Value Defined Check ===============// + //QFN Type [15:12] and Cut Version [27:24] need to do value check + + if(((cond1 & 0x0000F000) != 0) &&((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) + return FALSE; + if(((cond1 & 0x0F000000) != 0) &&((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) + return FALSE; + + //=============== Bit Defined Check ================// + // We don't care [31:28] and [23:20] + // + cond1 &= 0x000F0FFF; + driver1 &= 0x000F0FFF; + + if ((cond1 & driver1) == cond1) + { + u4Byte bitMask = 0; + if ((cond1 & 0x0F) == 0) // BoardType is DONTCARE + return TRUE; + + if ((cond1 & BIT0) != 0) //GLNA + bitMask |= 0x000000FF; + if ((cond1 & BIT1) != 0) //GPA + bitMask |= 0x0000FF00; + if ((cond1 & BIT2) != 0) //ALNA + bitMask |= 0x00FF0000; + if ((cond1 & BIT3) != 0) //APA + bitMask |= 0xFF000000; + + if ((cond2 & bitMask) == (driver2 & bitMask)) // BoardType of each RF path is matched + return TRUE; + else + return FALSE; + } + else + { return FALSE; + } +} +static BOOLEAN +CheckNegative( + IN PDM_ODM_T pDM_Odm, + IN const u4Byte Condition1, + IN const u4Byte Condition2 + ) +{ return TRUE; } - /****************************************************************************** * MAC_REG.TXT ******************************************************************************/ @@ -169,69 +223,73 @@ ODM_ReadAndConfig_MP_8723B_MAC_REG( IN PDM_ODM_T pDM_Odm ) { - #define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) - - u4Byte hex = 0; - u4Byte i = 0; - u2Byte count = 0; - pu4Byte ptr_array = NULL; - u1Byte platform = pDM_Odm->SupportPlatform; - u1Byte _interface = pDM_Odm->SupportInterface; - u1Byte board = pDM_Odm->BoardType; - u4Byte ArrayLen = sizeof(Array_MP_8723B_MAC_REG)/sizeof(u4Byte); - pu4Byte Array = Array_MP_8723B_MAC_REG; - - - hex += board; - hex += _interface << 8; - hex += platform << 16; - hex += 0xFF000000; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ReadAndConfig_MP_8723B_MAC_REG, hex = 0x%X\n", hex)); - - for (i = 0; i < ArrayLen; i += 2 ) - { - u4Byte v1 = Array[i]; - u4Byte v2 = Array[i+1]; + u4Byte i = 0; + u4Byte ArrayLen = sizeof(Array_MP_8723B_MAC_REG)/sizeof(u4Byte); + pu4Byte Array = Array_MP_8723B_MAC_REG; - // This (offset, data) pair meets the condition. - if ( v1 < 0xCDCDCDCD ) - { - odm_ConfigMAC_8723B(pDM_Odm, v1, (u1Byte)v2); - continue; - } - else - { // This line is the start line of branch. - if ( !CheckCondition(Array[i], hex) ) - { // Discard the following (offset, data) pairs. - READ_NEXT_PAIR(v1, v2, i); - while (v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < ArrayLen -2) - { - READ_NEXT_PAIR(v1, v2, i); - } - i -= 2; // prevent from for-loop += 2 - } - else // Configure matched pairs and skip to end of if-else. - { - READ_NEXT_PAIR(v1, v2, i); - while (v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < ArrayLen -2) - { - odm_ConfigMAC_8723B(pDM_Odm, v1, (u1Byte)v2); - READ_NEXT_PAIR(v1, v2, i); - } - - while (v2 != 0xDEAD && i < ArrayLen -2) - { - READ_NEXT_PAIR(v1, v2, i); - } - - } - } - } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8723B_MAC_REG\n")); + + for (i = 0; i < ArrayLen; i += 2 ) + { + u4Byte v1 = Array[i]; + u4Byte v2 = Array[i+1]; + + // This (offset, data) pair doesn't care the condition. + if ( v1 < 0x40000000 ) + { + odm_ConfigMAC_8723B(pDM_Odm, v1, (u1Byte)v2); + continue; + } + else + { // This line is the beginning of branch. + BOOLEAN bMatched = TRUE; + u1Byte cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); + + if (cCond == COND_ELSE) { // ELSE, ENDIF + bMatched = TRUE; + READ_NEXT_PAIR(v1, v2, i); + } else if ( ! CheckPositive(pDM_Odm, v1, v2) ) { + bMatched = FALSE; + READ_NEXT_PAIR(v1, v2, i); + READ_NEXT_PAIR(v1, v2, i); + } else { + READ_NEXT_PAIR(v1, v2, i); + if ( ! CheckNegative(pDM_Odm, v1, v2) ) + bMatched = FALSE; + else + bMatched = TRUE; + READ_NEXT_PAIR(v1, v2, i); + } + if ( bMatched == FALSE ) + { // Condition isn't matched. Discard the following (offset, data) pairs. + while (v1 < 0x40000000 && i < ArrayLen -2) + READ_NEXT_PAIR(v1, v2, i); + + i -= 2; // prevent from for-loop += 2 + } + else // Configure matched pairs and skip to end of if-else. + { + while (v1 < 0x40000000 && i < ArrayLen-2) { + odm_ConfigMAC_8723B(pDM_Odm, v1, (u1Byte)v2); + READ_NEXT_PAIR(v1, v2, i); + } + + // Keeps reading until ENDIF. + cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); + while (cCond != COND_ENDIF && i < ArrayLen-2) { + READ_NEXT_PAIR(v1, v2, i); + cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); + } + } + } + } +} + +u4Byte +ODM_GetVersion_MP_8723B_MAC_REG(void) +{ + return 11; } #endif // end of HWIMG_SUPPORT diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_MAC.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_MAC.h old mode 100644 new mode 100755 index 9745a2cd3ef5..1f74db8b12f7 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_MAC.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_MAC.h @@ -22,7 +22,6 @@ #ifndef __INC_MP_MAC_HW_IMG_8723B_H #define __INC_MP_MAC_HW_IMG_8723B_H -//static BOOLEAN CheckCondition(const u4Byte Condition, const u4Byte Hex); /****************************************************************************** * MAC_REG.TXT @@ -32,6 +31,7 @@ void ODM_ReadAndConfig_MP_8723B_MAC_REG( // TC: Test Chip, MP: MP Chip IN PDM_ODM_T pDM_Odm ); +u4Byte ODM_GetVersion_MP_8723B_MAC_REG(void); #endif #endif // end of HWIMG_SUPPORT diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_MP.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_MP.c old mode 100644 new mode 100755 index 7126d6dc3c6e..494cc887f7c3 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_MP.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_MP.c @@ -1,21 +1,21 @@ -/****************************************************************************** -* -* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -* -* This program is free software; you can redistribute it and/or modify it -* under the terms of version 2 of the GNU General Public License as -* published by the Free Software Foundation. -* -* This program is distributed in the hope that it will be useful, but WITHOUT -* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -* more details. -* -* You should have received a copy of the GNU General Public License along with -* this program; if not, write to the Free Software Foundation, Inc., -* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -* -* +/****************************************************************************** +* +* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms of version 2 of the GNU General Public License as +* published by the Free Software Foundation. +* +* This program is distributed in the hope that it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +* You should have received a copy of the GNU General Public License along with +* this program; if not, write to the Free Software Foundation, Inc., +* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +* +* ******************************************************************************/ #include "../odm_precomp.h" @@ -23,67 +23,654 @@ #if (RTL8723B_SUPPORT==1) #ifdef CONFIG_MP_INCLUDED -//rtl8723b_mp_bcut_bt40_fw_asic_rom_patch-svn11495-0x803D33F8-20140110-MP-array_for_dcut unsigned char bt_mp_patch_array[19144] = { + +//#define SIZE_OF_BT_MP_PATCH 20564 u8 Rtl8723BFwBTImgArray[Rtl8723BFwBTImgArrayLength] = { -0xfc, 0x63, 0x07, 0x62, 0x06, 0xd1, 0x05, 0xd0, 0x00, 0x69, 0x49, 0xb2, 0x20, 0xda, 0x49, 0xb2, 0x40, 0x9a, 0x49, 0xb3, 0x49, 0xb0, 0x42, 0x34, 0x82, 0x34, 0x80, 0xcb, 0x48, 0xb3, 0x40, 0xcb, 0x48, 0xb2, 0x20, 0xc2, 0x48, 0xb2, 0x20, 0xc2, 0x48, 0xb2, 0x20, 0xca, 0x48, 0xb3, 0x49, 0xb2, 0x60, 0xda, 0x49, 0xb3, 0x49, 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0x48, 0x42, 0x20, 0x00, 0x01, 0x44, 0x20, 0x00, 0x48, 0x46, 0x20, 0x00, 0x81, 0x48, 0x20, 0x00, 0x00, 0x4a, 0x20, 0x00, 0xf8, +0x4c, 0x20, 0x00, 0x00, 0x4e, 0x20, 0xd8, 0x00, 0x50, 0x20, 0x90, 0xcc, 0x52, 0x20, 0x00, 0x18, 0x54, 0x20, 0x10, 0x8c, 0x56, 0x20, 0x00, 0xe0, 0x58, 0x20, 0x00, 0x50, 0x5a, 0x20, 0x00, 0x80, +0x5c, 0x20, 0x00, 0x20, 0x5e, 0x20, 0x00, 0x00, 0x00, 0x20, 0x01, 0x00, 0x0e, 0x20, 0x01, 0x00, 0x02, 0x20, 0x60, 0xc0, 0x00, 0x60, 0x0a, 0x00, 0x02, 0x20, 0x20, 0xc0, 0x00, 0x60, 0x0a, 0x00, +0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x20, 0x01, 0x00, 0x02, 0x20, 0x20, 0x00, 0x0c, 0x20, 0x10, 0x00, 0x0e, 0x20, 0x00, 0x80, +0x00, 0x20, 0x00, 0x00, 0x10, 0x00, 0x00, 0x30, 0x11, 0x00, 0x3c, 0x00, 0x12, 0x00, 0x02, 0x87, 0x18, 0x00, 0x04, 0x3e, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, +0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x40, 0x4e, 0xfb, 0x71, 0x4c, 0x30, 0x00, 0x00, 0x62, 0xd5, 0x3d, 0x80 }; -//CheckSum = 0xc10b +/* CheckSum = 0x078b */ const u8 Rtl8723BFwMPImgArray[Rtl8723BMPImgArrayLength] = { diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_MP.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_MP.h old mode 100644 new mode 100755 index bbd0084efdaf..4af7b9fd5823 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_MP.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_MP.h @@ -1,21 +1,21 @@ -/****************************************************************************** -* -* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. -* -* This program is free software; you can redistribute it and/or modify it -* under the terms of version 2 of the GNU General Public License as -* published by the Free Software Foundation. -* -* This program is distributed in the hope that it will be useful, but WITHOUT -* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for -* more details. -* -* You should have received a copy of the GNU General Public License along with -* this program; if not, write to the Free Software Foundation, Inc., -* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA -* -* +/****************************************************************************** +* +* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms of version 2 of the GNU General Public License as +* published by the Free Software Foundation. +* +* This program is distributed in the hope that it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +* You should have received a copy of the GNU General Public License along with +* this program; if not, write to the Free Software Foundation, Inc., +* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +* +* ******************************************************************************/ #if (RTL8723B_SUPPORT==1) @@ -24,7 +24,7 @@ #ifdef CONFIG_MP_INCLUDED #define Rtl8723BMPImgArrayLength 18396 -#define Rtl8723BFwBTImgArrayLength 19144 +#define Rtl8723BFwBTImgArrayLength 20564 #define Rtl8723B_PHYREG_Array_MPLength 4 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_RF.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_RF.c old mode 100644 new mode 100755 index f0809b579278..a7d6e5156d70 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_RF.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_RF.c @@ -18,41 +18,95 @@ * ******************************************************************************/ -//#include "Mp_Precomp.h" + #include "../odm_precomp.h" #if (RTL8723B_SUPPORT == 1) static BOOLEAN -CheckCondition( - const u4Byte Condition, - const u4Byte Hex +CheckPositive( + IN PDM_ODM_T pDM_Odm, + IN const u4Byte Condition1, + IN const u4Byte Condition2 ) { - u4Byte _board = (Hex & 0x000000FF); - u4Byte _interface = (Hex & 0x0000FF00) >> 8; - u4Byte _platform = (Hex & 0x00FF0000) >> 16; - u4Byte cond = Condition; - - if ( Condition == 0xCDCDCDCD ) - return TRUE; - - cond = Condition & 0x000000FF; - if ( (_board != cond) && (cond != 0xFF) ) - return FALSE; - - cond = Condition & 0x0000FF00; - cond = cond >> 8; - if ( ((_interface & cond) == 0) && (cond != 0x07) ) - return FALSE; - - cond = Condition & 0x00FF0000; - cond = cond >> 16; - if ( ((_platform & cond) == 0) && (cond != 0x0F) ) + u1Byte _BoardType = ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | // _GLNA + ((pDM_Odm->BoardType & BIT3) >> 3) << 1 | // _GPA + ((pDM_Odm->BoardType & BIT7) >> 7) << 2 | // _ALNA + ((pDM_Odm->BoardType & BIT6) >> 6) << 3 | // _APA + ((pDM_Odm->BoardType & BIT2) >> 2) << 4; // _BT + + u4Byte cond1 = Condition1, cond2 = Condition2; + u4Byte driver1 = pDM_Odm->CutVersion << 24 | + pDM_Odm->SupportPlatform << 16 | + pDM_Odm->PackageType << 12 | + pDM_Odm->SupportInterface << 8 | + _BoardType; + + u4Byte driver2 = pDM_Odm->TypeGLNA << 0 | + pDM_Odm->TypeGPA << 8 | + pDM_Odm->TypeALNA << 16 | + pDM_Odm->TypeAPA << 24; + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, + ("===> [8812A] CheckPositive (cond1, cond2) = (0x%X 0x%X)\n", cond1, cond2)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, + ("===> [8812A] CheckPositive (driver1, driver2) = (0x%X 0x%X)\n", driver1, driver2)); + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, + (" (Platform, Interface) = (0x%X, 0x%X)\n", pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, + (" (Board, Package) = (0x%X, 0x%X)\n", pDM_Odm->BoardType, pDM_Odm->PackageType)); + + + //============== Value Defined Check ===============// + //QFN Type [15:12] and Cut Version [27:24] need to do value check + + if(((cond1 & 0x0000F000) != 0) &&((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) + return FALSE; + if(((cond1 & 0x0F000000) != 0) &&((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) + return FALSE; + + //=============== Bit Defined Check ================// + // We don't care [31:28] and [23:20] + // + cond1 &= 0x000F0FFF; + driver1 &= 0x000F0FFF; + + if ((cond1 & driver1) == cond1) + { + u4Byte bitMask = 0; + if ((cond1 & 0x0F) == 0) // BoardType is DONTCARE + return TRUE; + + if ((cond1 & BIT0) != 0) //GLNA + bitMask |= 0x000000FF; + if ((cond1 & BIT1) != 0) //GPA + bitMask |= 0x0000FF00; + if ((cond1 & BIT2) != 0) //ALNA + bitMask |= 0x00FF0000; + if ((cond1 & BIT3) != 0) //APA + bitMask |= 0xFF000000; + + if ((cond2 & bitMask) == (driver2 & bitMask)) // BoardType of each RF path is matched + return TRUE; + else + return FALSE; + } + else + { return FALSE; + } +} +static BOOLEAN +CheckNegative( + IN PDM_ODM_T pDM_Odm, + IN const u4Byte Condition1, + IN const u4Byte Condition2 + ) +{ return TRUE; } - /****************************************************************************** * RadioA.TXT ******************************************************************************/ @@ -81,14 +135,30 @@ u4Byte Array_MP_8723B_RadioA[] = { 0x01E, 0x00000000, 0x0DF, 0x00000780, 0x050, 0x00067435, + 0x80002000,0x00000000,0x40000000,0x00000000, + 0x051, 0x0006B10E, + 0x90003000,0x00000000,0x40000000,0x00000000, + 0x051, 0x0006B10E, + 0x90004000,0x00000000,0x40000000,0x00000000, + 0x051, 0x0006B10E, + 0xA0000000,0x00000000, 0x051, 0x0006B04E, + 0xB0000000,0x00000000, 0x052, 0x000007D2, 0x053, 0x00000000, 0x054, 0x00050400, 0x055, 0x0004026E, 0x0DD, 0x0000004C, 0x070, 0x00067435, + 0x80002000,0x00000000,0x40000000,0x00000000, + 0x071, 0x0006B10E, + 0x90003000,0x00000000,0x40000000,0x00000000, + 0x071, 0x0006B10E, + 0x90004000,0x00000000,0x40000000,0x00000000, + 0x071, 0x0006B10E, + 0xA0000000,0x00000000, 0x071, 0x0006B04E, + 0xB0000000,0x00000000, 0x072, 0x000007D2, 0x073, 0x00000000, 0x074, 0x00050400, @@ -174,75 +244,80 @@ ODM_ReadAndConfig_MP_8723B_RadioA( IN PDM_ODM_T pDM_Odm ) { - #define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) - - u4Byte hex = 0; - u4Byte i = 0; - u2Byte count = 0; - pu4Byte ptr_array = NULL; - u1Byte platform = pDM_Odm->SupportPlatform; - u1Byte _interface = pDM_Odm->SupportInterface; - u1Byte board = pDM_Odm->BoardType; - u4Byte ArrayLen = sizeof(Array_MP_8723B_RadioA)/sizeof(u4Byte); - pu4Byte Array = Array_MP_8723B_RadioA; - - - hex += board; - hex += _interface << 8; - hex += platform << 16; - hex += 0xFF000000; - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ReadAndConfig_MP_8723B_RadioA, hex = 0x%X\n", hex)); - - for (i = 0; i < ArrayLen; i += 2 ) - { - u4Byte v1 = Array[i]; - u4Byte v2 = Array[i+1]; + u4Byte i = 0; + u4Byte ArrayLen = sizeof(Array_MP_8723B_RadioA)/sizeof(u4Byte); + pu4Byte Array = Array_MP_8723B_RadioA; - // This (offset, data) pair meets the condition. - if ( v1 < 0xCDCDCDCD ) - { - odm_ConfigRF_RadioA_8723B(pDM_Odm, v1, v2); - continue; - } - else - { // This line is the start line of branch. - if ( !CheckCondition(Array[i], hex) ) - { // Discard the following (offset, data) pairs. - READ_NEXT_PAIR(v1, v2, i); - while (v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < ArrayLen -2) - { - READ_NEXT_PAIR(v1, v2, i); - } - i -= 2; // prevent from for-loop += 2 - } - else // Configure matched pairs and skip to end of if-else. - { - READ_NEXT_PAIR(v1, v2, i); - while (v2 != 0xDEAD && - v2 != 0xCDEF && - v2 != 0xCDCD && i < ArrayLen -2) - { - odm_ConfigRF_RadioA_8723B(pDM_Odm, v1, v2); - READ_NEXT_PAIR(v1, v2, i); - } - - while (v2 != 0xDEAD && i < ArrayLen -2) - { - READ_NEXT_PAIR(v1, v2, i); - } - - } - } - } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8723B_RadioA\n")); + + for (i = 0; i < ArrayLen; i += 2 ) + { + u4Byte v1 = Array[i]; + u4Byte v2 = Array[i+1]; + + // This (offset, data) pair doesn't care the condition. + if ( v1 < 0x40000000 ) + { + odm_ConfigRF_RadioA_8723B(pDM_Odm, v1, v2); + continue; + } + else + { // This line is the beginning of branch. + BOOLEAN bMatched = TRUE; + u1Byte cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); + + if (cCond == COND_ELSE) { // ELSE, ENDIF + bMatched = TRUE; + READ_NEXT_PAIR(v1, v2, i); + } else if ( ! CheckPositive(pDM_Odm, v1, v2) ) { + bMatched = FALSE; + READ_NEXT_PAIR(v1, v2, i); + READ_NEXT_PAIR(v1, v2, i); + } else { + READ_NEXT_PAIR(v1, v2, i); + if ( ! CheckNegative(pDM_Odm, v1, v2) ) + bMatched = FALSE; + else + bMatched = TRUE; + READ_NEXT_PAIR(v1, v2, i); + } + + if ( bMatched == FALSE ) + { // Condition isn't matched. Discard the following (offset, data) pairs. + while (v1 < 0x40000000 && i < ArrayLen -2) + READ_NEXT_PAIR(v1, v2, i); + + i -= 2; // prevent from for-loop += 2 + } + else // Configure matched pairs and skip to end of if-else. + { + while (v1 < 0x40000000 && i < ArrayLen-2) { + odm_ConfigRF_RadioA_8723B(pDM_Odm, v1, v2); + READ_NEXT_PAIR(v1, v2, i); + } + + // Keeps reading until ENDIF. + cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); + while (cCond != COND_ENDIF && i < ArrayLen-2) { + READ_NEXT_PAIR(v1, v2, i); + cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); + } + } + } + } +} +u4Byte +ODM_GetVersion_MP_8723B_RadioA(void) +{ + return 11; } /****************************************************************************** * TxPowerTrack_AP.TXT ******************************************************************************/ +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) u1Byte gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_AP_8723B[][DELTA_SWINGIDX_SIZE] = { {0, 1, 1, 2, 2, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, @@ -271,15 +346,17 @@ u1Byte gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_AP_8723B[] = {0, 0, 1, 2, 2, u1Byte gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_AP_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; u1Byte gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_AP_8723B[] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; u1Byte gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_AP_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; +#endif void ODM_ReadAndConfig_MP_8723B_TxPowerTrack_AP( IN PDM_ODM_T pDM_Odm ) { +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL)) PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ReadAndConfig_MP_MP_8723B\n")); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_MP_8723B\n")); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P, gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_AP_8723B, DELTA_SWINGIDX_SIZE); @@ -296,12 +373,14 @@ ODM_ReadAndConfig_MP_8723B_TxPowerTrack_AP( ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N, gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_AP_8723B, DELTA_SWINGIDX_SIZE*3); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P, gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_AP_8723B, DELTA_SWINGIDX_SIZE*3); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N, gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_AP_8723B, DELTA_SWINGIDX_SIZE*3); +#endif } /****************************************************************************** * TxPowerTrack_PCIE.TXT ******************************************************************************/ +#if DEV_BUS_TYPE == RT_PCI_INTERFACE u1Byte gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_PCIE_8723B[][DELTA_SWINGIDX_SIZE] = { {0, 1, 1, 2, 2, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, @@ -330,15 +409,17 @@ u1Byte gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_PCIE_8723B[] = {0, 0, 1, 2, u1Byte gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_PCIE_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; u1Byte gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_PCIE_8723B[] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; u1Byte gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_PCIE_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; +#endif void ODM_ReadAndConfig_MP_8723B_TxPowerTrack_PCIE( IN PDM_ODM_T pDM_Odm ) { +#if DEV_BUS_TYPE == RT_PCI_INTERFACE PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ReadAndConfig_MP_MP_8723B\n")); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_MP_8723B\n")); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P, gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_PCIE_8723B, DELTA_SWINGIDX_SIZE); @@ -355,12 +436,14 @@ ODM_ReadAndConfig_MP_8723B_TxPowerTrack_PCIE( ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N, gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_PCIE_8723B, DELTA_SWINGIDX_SIZE*3); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P, gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_PCIE_8723B, DELTA_SWINGIDX_SIZE*3); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N, gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_PCIE_8723B, DELTA_SWINGIDX_SIZE*3); +#endif } /****************************************************************************** * TxPowerTrack_SDIO.TXT ******************************************************************************/ +#if DEV_BUS_TYPE == RT_SDIO_INTERFACE u1Byte gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_SDIO_8723B[][DELTA_SWINGIDX_SIZE] = { {0, 1, 1, 2, 2, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, @@ -389,15 +472,17 @@ u1Byte gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_SDIO_8723B[] = {0, 0, 1, 2, u1Byte gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_SDIO_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; u1Byte gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_SDIO_8723B[] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; u1Byte gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_SDIO_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; +#endif void ODM_ReadAndConfig_MP_8723B_TxPowerTrack_SDIO( IN PDM_ODM_T pDM_Odm ) { +#if DEV_BUS_TYPE == RT_SDIO_INTERFACE PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ReadAndConfig_MP_MP_8723B\n")); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_MP_8723B\n")); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P, gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_SDIO_8723B, DELTA_SWINGIDX_SIZE); @@ -414,12 +499,14 @@ ODM_ReadAndConfig_MP_8723B_TxPowerTrack_SDIO( ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N, gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_SDIO_8723B, DELTA_SWINGIDX_SIZE*3); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P, gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_SDIO_8723B, DELTA_SWINGIDX_SIZE*3); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N, gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_SDIO_8723B, DELTA_SWINGIDX_SIZE*3); +#endif } /****************************************************************************** * TxPowerTrack_USB.TXT ******************************************************************************/ +#if DEV_BUS_TYPE == RT_USB_INTERFACE u1Byte gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_USB_8723B[][DELTA_SWINGIDX_SIZE] = { {0, 1, 1, 2, 2, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, @@ -448,15 +535,17 @@ u1Byte gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_USB_8723B[] = {0, 0, 1, 2, 2 u1Byte gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_USB_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; u1Byte gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_USB_8723B[] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; u1Byte gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_USB_8723B[] = {0, 0, 1, 2, 2, 2, 3, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15}; +#endif void ODM_ReadAndConfig_MP_8723B_TxPowerTrack_USB( IN PDM_ODM_T pDM_Odm ) { +#if DEV_BUS_TYPE == RT_USB_INTERFACE PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ReadAndConfig_MP_MP_8723B\n")); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_MP_8723B\n")); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P, gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_USB_8723B, DELTA_SWINGIDX_SIZE); @@ -473,6 +562,7 @@ ODM_ReadAndConfig_MP_8723B_TxPowerTrack_USB( ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N, gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_USB_8723B, DELTA_SWINGIDX_SIZE*3); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P, gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_USB_8723B, DELTA_SWINGIDX_SIZE*3); ODM_MoveMemory(pDM_Odm, pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N, gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_USB_8723B, DELTA_SWINGIDX_SIZE*3); +#endif } /****************************************************************************** @@ -743,8 +833,7 @@ ODM_ReadAndConfig_MP_8723B_TXPWR_LMT( u4Byte ArrayLen = sizeof(Array_MP_8723B_TXPWR_LMT)/sizeof(pu1Byte); pu1Byte *Array = Array_MP_8723B_TXPWR_LMT; - - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ReadAndConfig_MP_8723B_TXPWR_LMT\n")); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8723B_TXPWR_LMT\n")); for (i = 0; i < ArrayLen; i += 7 ) { diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_RF.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_RF.h old mode 100644 new mode 100755 index d9f1b8bff15a..aee0ae470a63 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_RF.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalHWImg8723B_RF.h @@ -22,7 +22,6 @@ #ifndef __INC_MP_RF_HW_IMG_8723B_H #define __INC_MP_RF_HW_IMG_8723B_H -//static BOOLEAN CheckCondition(const u4Byte Condition, const u4Byte Hex); /****************************************************************************** * RadioA.TXT @@ -32,6 +31,7 @@ void ODM_ReadAndConfig_MP_8723B_RadioA( // TC: Test Chip, MP: MP Chip IN PDM_ODM_T pDM_Odm ); +u4Byte ODM_GetVersion_MP_8723B_RadioA(void); /****************************************************************************** * TxPowerTrack_AP.TXT @@ -41,6 +41,7 @@ void ODM_ReadAndConfig_MP_8723B_TxPowerTrack_AP( // TC: Test Chip, MP: MP Chip IN PDM_ODM_T pDM_Odm ); +u4Byte ODM_GetVersion_MP_8723B_TxPowerTrack_AP(void); /****************************************************************************** * TxPowerTrack_PCIE.TXT @@ -50,6 +51,7 @@ void ODM_ReadAndConfig_MP_8723B_TxPowerTrack_PCIE( // TC: Test Chip, MP: MP Chip IN PDM_ODM_T pDM_Odm ); +u4Byte ODM_GetVersion_MP_8723B_TxPowerTrack_PCIE(void); /****************************************************************************** * TxPowerTrack_SDIO.TXT @@ -59,6 +61,7 @@ void ODM_ReadAndConfig_MP_8723B_TxPowerTrack_SDIO( // TC: Test Chip, MP: MP Chip IN PDM_ODM_T pDM_Odm ); +u4Byte ODM_GetVersion_MP_8723B_TxPowerTrack_SDIO(void); /****************************************************************************** * TxPowerTrack_USB.TXT @@ -68,6 +71,7 @@ void ODM_ReadAndConfig_MP_8723B_TxPowerTrack_USB( // TC: Test Chip, MP: MP Chip IN PDM_ODM_T pDM_Odm ); +u4Byte ODM_GetVersion_MP_8723B_TxPowerTrack_USB(void); /****************************************************************************** * TXPWR_LMT.TXT @@ -77,6 +81,7 @@ void ODM_ReadAndConfig_MP_8723B_TXPWR_LMT( // TC: Test Chip, MP: MP Chip IN PDM_ODM_T pDM_Odm ); +u4Byte ODM_GetVersion_MP_8723B_TXPWR_LMT(void); #endif #endif // end of HWIMG_SUPPORT diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalPhyRf_8723B.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalPhyRf_8723B.c old mode 100644 new mode 100755 index 6c50cd20cb93..4788c3109152 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalPhyRf_8723B.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalPhyRf_8723B.c @@ -326,7 +326,7 @@ ODM_TxPwrTrackSetPwr_8723B( pwr += pDM_Odm->RFCalibrateInfo.PowerIndexOffset[RFPath]; PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, pwr); TxAGC = (pwr<<16)|(pwr<<8)|(pwr); - PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, TxAGC); + PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskH3Bytes, TxAGC); ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("ODM_TxPwrTrackSetPwr8723B: CCK Tx-rf(A) Power = 0x%x\n", TxAGC)); pwr = PHY_QueryBBReg(Adapter, rTxAGC_A_Rate18_06, 0xFF); @@ -360,12 +360,12 @@ ODM_TxPwrTrackSetPwr_8723B( // Adjust BB swing by OFDM IQ matrix if (Final_OFDM_Swing_Index >= PwrTrackingLimit_OFDM) Final_OFDM_Swing_Index = PwrTrackingLimit_OFDM; - else if (Final_OFDM_Swing_Index < 0) + else if (Final_OFDM_Swing_Index <= 0) Final_OFDM_Swing_Index = 0; if (Final_CCK_Swing_Index >= CCK_TABLE_SIZE) Final_CCK_Swing_Index = CCK_TABLE_SIZE-1; - else if (pDM_Odm->BbSwingIdxCck < 0) + else if (pDM_Odm->BbSwingIdxCck <= 0) Final_CCK_Swing_Index = 0; setIqkMatrix_8723B(pDM_Odm, Final_OFDM_Swing_Index, RFPath, @@ -400,7 +400,7 @@ ODM_TxPwrTrackSetPwr_8723B( ("******Path_A Over BBSwing Limit , PwrTrackingLimit = %d , Remnant TxAGC Value = %d \n", PwrTrackingLimit_OFDM, pDM_Odm->Remnant_OFDMSwingIdx[RFPath])); } - else if (Final_OFDM_Swing_Index < 0) + else if (Final_OFDM_Swing_Index <= 0) { pDM_Odm->Remnant_OFDMSwingIdx[RFPath] = Final_OFDM_Swing_Index; @@ -447,7 +447,7 @@ ODM_TxPwrTrackSetPwr_8723B( ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("******Path_A CCK Over Limit , PwrTrackingLimit_CCK = %d , pDM_Odm->Remnant_CCKSwingIdx = %d \n", PwrTrackingLimit_CCK, pDM_Odm->Remnant_CCKSwingIdx)); } - else if(Final_CCK_Swing_Index < 0) // Lowest CCK Index = 0 + else if(Final_CCK_Swing_Index <= 0) // Lowest CCK Index = 0 { pDM_Odm->Remnant_CCKSwingIdx = Final_CCK_Swing_Index; setCCKFilterCoefficient(pDM_Odm, 0); @@ -566,7 +566,7 @@ phy_PathA_IQK_8723B( IN u1Byte RF_Path ) { - u4Byte regEAC, regE94, regE9C, tmp/*, regEA4*/; + u4Byte regEAC, regE94, regE9C, tmp, Path_SEL_BB /*, regEA4*/; u1Byte result = 0x00; #if !(DM_ODM_SUPPORT_TYPE & ODM_AP) @@ -578,17 +578,15 @@ phy_PathA_IQK_8723B( PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; #endif #endif + + + // Save RF Path + Path_SEL_BB = ODM_GetBBReg(pDM_Odm, 0x948, bMaskDWord); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQK!\n")); //leave IQK mode - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); - - if (configPathB || (RF_Path == 0)) - // wfi switch to S1 - ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000000); - else - // wifi switch to S0 - ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000280); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); // enable path A PA in TXIQK mode ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); @@ -620,7 +618,18 @@ phy_PathA_IQK_8723B( ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x00462911); //enter IQK mode - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80800000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x808000); + + //Ant switch + if (configPathB || (RF_Path == 0)) + // wifi switch to S1 + ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000000); + else + // wifi switch to S0 + ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000280); + + //GNT_BT = 0 + ODM_SetBBReg(pDM_Odm, 0x764, bMaskDWord, 0x00000800); //One shot, path A LOK & IQK // ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); @@ -632,8 +641,13 @@ phy_PathA_IQK_8723B( //PlatformStallExecution(IQK_DELAY_TIME_8723B*1000); ODM_delay_ms(IQK_DELAY_TIME_8723B); + //restore Ant Path + ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord,Path_SEL_BB); + //GNT_BT = 1 + ODM_SetBBReg(pDM_Odm, 0x764, bMaskDWord, 0x00001800); + //leave IQK mode - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); // Check failed @@ -688,7 +702,7 @@ phy_PathA_RxIQK8723B( IN u1Byte RF_Path ) { - u4Byte regEAC, regE94, regE9C, regEA4, u4tmp,tmp; + u4Byte regEAC, regE94, regE9C, regEA4, u4tmp,tmp, Path_SEL_BB; u1Byte result = 0x00; #if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); @@ -701,15 +715,11 @@ phy_PathA_RxIQK8723B( #endif // ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK!\n")); - //leave IQK mode - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + // Save RF Path + Path_SEL_BB = ODM_GetBBReg(pDM_Odm, 0x948, bMaskDWord); - if (configPathB || (RF_Path == 0)) - // wfi switch to S1 - ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000000); - else - // wifi switch to S0 - ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000280); + //leave IQK mode + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A RX IQK:Get TXIMR setting\n")); //1 Get TXIMR setting @@ -721,7 +731,7 @@ phy_PathA_RxIQK8723B( //LNA2 off, PA on for Dcut ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7fb7); // ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x0); - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80800000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x808000); //IQK setting ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); @@ -744,7 +754,18 @@ phy_PathA_RxIQK8723B( ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911); //enter IQK mode - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80800000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x808000); + + //Ant switch + if (configPathB || (RF_Path == 0)) + // wifi switch to S1 + ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000000); + else + // wifi switch to S0 + ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000280); + + //GNT_BT = 0 + ODM_SetBBReg(pDM_Odm, 0x764, bMaskDWord, 0x00000800); //One shot, path A LOK & IQK // ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); @@ -755,9 +776,14 @@ phy_PathA_RxIQK8723B( // ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_8723B)); //PlatformStallExecution(IQK_DELAY_TIME_8723B*1000); ODM_delay_ms(IQK_DELAY_TIME_8723B); - + + //restore Ant Path + ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord,Path_SEL_BB); + //GNT_BT = 1 + ODM_SetBBReg(pDM_Odm, 0x764, bMaskDWord, 0x00001800); + //leave IQK mode - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); // Check failed regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); @@ -796,9 +822,9 @@ phy_PathA_RxIQK8723B( //modify RXIQK mode table // ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A Rx IQK modify RXIQK mode table 2!\n")); - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000 ); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000 ); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f ); //LAN2 on, PA off for Dcut ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7d77 ); @@ -820,7 +846,7 @@ phy_PathA_RxIQK8723B( ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82110000); // ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x281604c2); - ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x2816001f); + ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x2816001f); ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_B, bMaskDWord, 0x82110000); ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_B, bMaskDWord, 0x28110000); @@ -829,7 +855,18 @@ phy_PathA_RxIQK8723B( ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x0046a8d1); //enter IQK mode - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80800000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x808000); + + //Ant switch + if (configPathB || (RF_Path == 0)) + // wifi switch to S1 + ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000000); + else + // wifi switch to S0 + ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000280); + + //GNT_BT = 0 + ODM_SetBBReg(pDM_Odm, 0x764, bMaskDWord, 0x00000800); //One shot, path A LOK & IQK // ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path A LOK & IQK!\n")); @@ -841,8 +878,13 @@ phy_PathA_RxIQK8723B( //PlatformStallExecution(IQK_DELAY_TIME_8723B*1000); ODM_delay_ms(IQK_DELAY_TIME_8723B); + //restore Ant Path + ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord,Path_SEL_BB); + //GNT_BT = 1 + ODM_SetBBReg(pDM_Odm, 0x764, bMaskDWord, 0x00001800); + //leave IQK mode - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); // Check failed regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); @@ -855,7 +897,7 @@ phy_PathA_RxIQK8723B( // PA/PAD controlled by 0x0 //leave IQK mode - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x780 ); #if 0 @@ -897,7 +939,7 @@ phy_PathB_IQK_8723B( #endif ) { - u4Byte regEAC, regE94, regE9C, tmp/*, regEC4, regECC*/; + u4Byte regEAC, regE94, regE9C, tmp, Path_SEL_BB/*, regEC4, regECC, Path_SEL_BB*/; u1Byte result = 0x00; #if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); @@ -910,12 +952,11 @@ phy_PathB_IQK_8723B( #endif ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQK!\n")); - //leave IQK mode - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + // Save RF Path + Path_SEL_BB = ODM_GetBBReg(pDM_Odm, 0x948, bMaskDWord); - //switch to path B - ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000280); -// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xb0, bRFRegOffsetMask, 0xeffe0 ); + //leave IQK mode + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); // in TXIQK mode // ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1 ); @@ -939,7 +980,6 @@ phy_PathB_IQK_8723B( ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c); ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c); - // ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82140114); ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x821403ea); ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28110000); @@ -950,9 +990,15 @@ phy_PathB_IQK_8723B( // ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LO calibration setting!\n")); ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x00462911); - //enter IQK mode - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80800000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x808000); + + //switch to path B + ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000280); +// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xb0, bRFRegOffsetMask, 0xeffe0); + + //GNT_BT = 0 + ODM_SetBBReg(pDM_Odm, 0x764, bMaskDWord, 0x00000800); //One shot, path B LOK & IQK // ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path B LOK & IQK!\n")); @@ -964,8 +1010,13 @@ phy_PathB_IQK_8723B( //PlatformStallExecution(IQK_DELAY_TIME_88E*1000); ODM_delay_ms(IQK_DELAY_TIME_8723B); + //restore Ant Path + ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord,Path_SEL_BB); + //GNT_BT = 1 + ODM_SetBBReg(pDM_Odm, 0x764, bMaskDWord, 0x00001800); + //leave IQK mode - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); // ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0x948 = 0x%x\n", ODM_GetBBReg(pDM_Odm, 0x948, bMaskDWord))); @@ -1019,7 +1070,7 @@ phy_PathB_RxIQK8723B( IN BOOLEAN configPathB ) { - u4Byte regE94, regE9C, regEA4, regEAC, u4tmp, tmp; + u4Byte regE94, regE9C, regEA4, regEAC, u4tmp, tmp, Path_SEL_BB; u1Byte result = 0x00; #if !(DM_ODM_SUPPORT_TYPE & ODM_AP) HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); @@ -1032,8 +1083,10 @@ phy_PathB_RxIQK8723B( #endif // ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B Rx IQK!\n")); + // Save RF Path + Path_SEL_BB = ODM_GetBBReg(pDM_Odm, 0x948, bMaskDWord); //leave IQK mode - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); //switch to path B ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000280); @@ -1048,7 +1101,7 @@ phy_PathB_RxIQK8723B( ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7fb7 ); //open PA S1 & SMIXER ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x20, 0x1 ); - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x60fed ); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x60fcd ); //IQK setting @@ -1073,7 +1126,15 @@ phy_PathB_RxIQK8723B( ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x0046a911); //enter IQK mode - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80800000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x808000); + + //switch to path B + ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000280); +// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xb0, bRFRegOffsetMask, 0xeffe0); + + //GNT_BT = 0 + ODM_SetBBReg(pDM_Odm, 0x764, bMaskDWord, 0x00000800); + //One shot, path B TXIQK @ RXIQK // ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path B LOK & IQK!\n")); ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000); @@ -1084,9 +1145,14 @@ phy_PathB_RxIQK8723B( // ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E)); //PlatformStallExecution(IQK_DELAY_TIME_88E*1000); ODM_delay_ms(IQK_DELAY_TIME_8723B); - + + //restore Ant Path + ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord,Path_SEL_BB); + //GNT_BT = 1 + ODM_SetBBReg(pDM_Odm, 0x764, bMaskDWord, 0x00001800); + //leave IQK mode - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); // Check failed regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); @@ -1127,16 +1193,16 @@ phy_PathB_RxIQK8723B( //modify RXIQK mode table //<20121009, Kordan> RF Mode = 3 - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7d77); // ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x0); //open PA S1 & close SMIXER ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x20, 0x1); - ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x60fbd); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x60ebd); //PA, PAD setting // ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xdf, bRFRegOffsetMask, 0xf80); @@ -1155,7 +1221,7 @@ phy_PathB_RxIQK8723B( ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82110000); // ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x281604c2); - ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x2816001f); + ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x2816001f); ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_B, bMaskDWord, 0x82110000); ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_B, bMaskDWord, 0x28110000); @@ -1164,7 +1230,14 @@ phy_PathB_RxIQK8723B( ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x0046a8d1); //enter IQK mode - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80800000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x808000); + + //switch to path B + ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, 0x00000280); +// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xb0, bRFRegOffsetMask, 0xeffe0); + + //GNT_BT = 0 + ODM_SetBBReg(pDM_Odm, 0x764, bMaskDWord, 0x00000800); //One shot, path B LOK & IQK // ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("One shot, path B LOK & IQK!\n")); @@ -1176,8 +1249,13 @@ phy_PathB_RxIQK8723B( //PlatformStallExecution(IQK_DELAY_TIME_88E*1000); ODM_delay_ms(IQK_DELAY_TIME_8723B); + //restore Ant Path + ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord,Path_SEL_BB); + //GNT_BT = 1 + ODM_SetBBReg(pDM_Odm, 0x764, bMaskDWord, 0x00001800); + //leave IQK mode - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); // Check failed regEAC = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); @@ -1191,7 +1269,7 @@ phy_PathB_RxIQK8723B( // PA/PAD controlled by 0x0 //leave IQK mode -// ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); +// ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x00000000); // ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0xdf, bRFRegOffsetMask, 0x180 ); @@ -1706,12 +1784,12 @@ _PHY_PathAStandBy8723B( #endif ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A standby mode!\n")); - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x0); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x0); //Allen ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bMaskDWord, 0x10000); //ODM_SetBBReg(pDM_Odm, 0x840, bMaskDWord, 0x00010000); // - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80800000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x808000); } VOID @@ -1996,7 +2074,7 @@ if( pAdapter->registrypriv.mp_mode == 1 && pAdapter->mppriv.mode == 3 ) #endif //save RF path for 8723B - Path_SEL_BB = ODM_GetBBReg(pDM_Odm, 0x948, bMaskDWord); +// Path_SEL_BB = ODM_GetBBReg(pDM_Odm, 0x948, bMaskDWord); // Path_SEL_RF = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xb0, 0xfffff); //MAC settings @@ -2044,7 +2122,7 @@ if( pAdapter->registrypriv.mp_mode == 1 && pAdapter->mppriv.mode == 3 ) //RX IQ calibration setting for 8723B D cut large current issue when leaving IPS - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f); @@ -2072,7 +2150,7 @@ if( pAdapter->registrypriv.mp_mode == 1 && pAdapter->mppriv.mode == 3 ) // if(PathAOK == 0x03){ if(PathAOK == 0x01){ // Path A Tx IQK Success - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); pDM_Odm->RFCalibrateInfo.TxLOK[ODM_RF_PATH_A] = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x8, bRFRegOffsetMask); ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Tx IQK Success!!\n")); @@ -2150,7 +2228,7 @@ if( pAdapter->registrypriv.mp_mode == 1 && pAdapter->mppriv.mode == 3 ) // if(PathBOK == 0x03){ if(PathBOK == 0x01){ // Path B Tx IQK Success - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); pDM_Odm->RFCalibrateInfo.TxLOK[ODM_RF_PATH_B] = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x8, bRFRegOffsetMask); ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B Tx IQK Success!!\n")); @@ -2204,7 +2282,7 @@ for(i = 0 ; i < retryCount ; i++){ //Back to BB mode, load original value ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:Back to BB mode, load original value!\n")); - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0); if(t!=0) { @@ -2237,7 +2315,7 @@ for(i = 0 ; i < retryCount ; i++){ //Reload RF path - ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, Path_SEL_BB); +// ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, Path_SEL_BB); // ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xb0, 0xfffff, Path_SEL_RF); //Allen initial gain 0xc50 @@ -2563,7 +2641,7 @@ phy_APCalibrate_8723B( } //page-B1 - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x40000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x400000); //path A offset = rPdp_AntA; @@ -2574,7 +2652,7 @@ phy_APCalibrate_8723B( offset += 0x04; } - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); } else if(path == ODM_RF_PATH_B) { @@ -2607,7 +2685,7 @@ phy_APCalibrate_8723B( } //page-B1 - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x40000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x400000); //path B offset = 0xb60; @@ -2618,7 +2696,7 @@ phy_APCalibrate_8723B( offset += 0x04; } - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0); } //save RF default value @@ -2740,7 +2818,7 @@ phy_APCalibrate_8723B( i = 0; do { - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x800000); { ODM_SetBBReg(pDM_Odm, APK_offset[path], bMaskDWord, APK_value[0]); ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8188E() offset 0x%x value 0x%x\n", APK_offset[path], ODM_GetBBReg(pDM_Odm, APK_offset[path], bMaskDWord))); @@ -2750,7 +2828,7 @@ phy_APCalibrate_8723B( ODM_delay_ms(20); } - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); if(path == ODM_RF_PATH_A) tmpReg = ODM_GetBBReg(pDM_Odm, rAPK, 0x03E00000); @@ -2887,8 +2965,8 @@ PHY_IQCalibrate_8723B( rOFDM0_XATxIQImbalance, rOFDM0_XBTxIQImbalance, rOFDM0_XCTxAFE, rOFDM0_XDTxAFE, rOFDM0_RxIQExtAnta}; - u4Byte Path_SEL_BB = 0; -// u4Byte Path_SEL_BB = 0, Path_SEL_RF = 0; +// u4Byte Path_SEL_BB = 0; + u4Byte GNT_BT_default; u4Byte StartTime; s4Byte ProgressingTime; @@ -3005,14 +3083,15 @@ PHY_IQCalibrate_8723B( StartTime = ODM_GetCurrentTime( pDM_Odm); ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:Start!!!\n")); - + //save default GNT_BT + GNT_BT_default = ODM_GetBBReg(pDM_Odm, 0x764, bMaskDWord); // Save RF Path - Path_SEL_BB = ODM_GetBBReg(pDM_Odm, 0x948, bMaskDWord); +// Path_SEL_BB = ODM_GetBBReg(pDM_Odm, 0x948, bMaskDWord); // Path_SEL_RF = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xb0, 0xfffff); //set GNT_BT=0, pause BT traffic - ODM_SetBBReg(pDM_Odm, 0x764, BIT12, 0x0); - ODM_SetBBReg(pDM_Odm, 0x764, BIT11, 0x1); +// ODM_SetBBReg(pDM_Odm, 0x764, BIT12, 0x0); +// ODM_SetBBReg(pDM_Odm, 0x764, BIT11, 0x1); for(i = 0; i < 8; i++) @@ -3175,13 +3254,23 @@ PHY_IQCalibrate_8723B( _PHY_SaveADDARegisters8723B(pDM_Odm, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, IQK_BB_REG_NUM); #endif + //restore GNT_BT + ODM_SetBBReg(pDM_Odm, 0x764, bMaskDWord, GNT_BT_default); // Restore RF Path - ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, Path_SEL_BB); +// ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, Path_SEL_BB); // ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xb0, 0xfffff, Path_SEL_RF); + //Resotr RX mode table parameter + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1 ); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x18000 ); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f ); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xe6177 ); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x20, 0x1 ); + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x300bd ); + //set GNT_BT= HW control - ODM_SetBBReg(pDM_Odm, 0x764, BIT12, 0x0); - ODM_SetBBReg(pDM_Odm, 0x764, BIT11, 0x0); +// ODM_SetBBReg(pDM_Odm, 0x764, BIT12, 0x0); +// ODM_SetBBReg(pDM_Odm, 0x764, BIT11, 0x0); if (Is2ant) { if (RF_Path == 0x0) //S1 @@ -3502,9 +3591,9 @@ phy_DigitalPredistortion8723B( // PA gain = 11 & PAD2 => tx_agc 10~0e // PA gain = 01 => tx_agc 0b~0d // PA gain = 00 => tx_agc 0a~00 - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x40000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x400000); ODM_SetBBReg(pDM_Odm, 0xbc0, bMaskDWord, 0x0005361f); - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); //do inner loopback DPK 3 times for(i = 0; i < 3; i++) @@ -3575,8 +3664,8 @@ phy_DigitalPredistortion8723B( { ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x02017098); - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80000000); - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x800000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ODM_delay_ms(1); ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x800477c0); ODM_delay_ms(1); @@ -3602,7 +3691,7 @@ phy_DigitalPredistortion8723B( ODM_SetBBReg(pDM_Odm, rPdp_AntA_4, bMaskDWord, 0x776d9f84); ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x0004ab87); ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x00880000); - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x40000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x400000); for(i=rPdp_AntA; i<=0xb3c; i+=4) { @@ -3622,7 +3711,7 @@ phy_DigitalPredistortion8723B( //TX_AGC boundary ODM_SetBBReg(pDM_Odm, 0xbc0, bMaskDWord, 0x0005361f); - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); } else { @@ -3641,9 +3730,9 @@ phy_DigitalPredistortion8723B( // PA gain = 11 & PAD2, => tx_agc 10 ~0e // PA gain = 01 => tx_agc 0b ~0d // PA gain = 00 => tx_agc 0a ~00 - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x40000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x400000); ODM_SetBBReg(pDM_Odm, 0xbc4, bMaskDWord, 0x0005361f); - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); //do inner loopback DPK 3 times for(i = 0; i < 3; i++) @@ -3714,8 +3803,8 @@ phy_DigitalPredistortion8723B( { ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x02017098); - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80000000); - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x800000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); ODM_delay_ms(1); ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x800477c0); ODM_delay_ms(1); @@ -3742,7 +3831,7 @@ phy_DigitalPredistortion8723B( ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x0004ab87); ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x00880000); - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x40000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x400000); for(i=0xb60; i<=0xb9c; i+=4) { ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x40004000); @@ -3761,7 +3850,7 @@ phy_DigitalPredistortion8723B( // tx_agc boundary ODM_SetBBReg(pDM_Odm, 0xbc4, bMaskDWord, 0x0005361f); - ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000); } else diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalPhyRf_8723B.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/HalPhyRf_8723B.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/odm_RTL8723B.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/odm_RTL8723B.c old mode 100644 new mode 100755 index e2ae8a78017e..a81a00db834a --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/odm_RTL8723B.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/odm_RTL8723B.c @@ -567,30 +567,6 @@ odm_CCKRSSI_8723B( return rx_pwr_all; } -s1Byte -odm_RSSIOFDM_8723B( - IN s1Byte rx_pwr_new) -{ - s1Byte rx_pwr_all=0; - - if(rx_pwr_new >=63) - rx_pwr_all =rx_pwr_new -120+10; - else if(rx_pwr_all >=54) - rx_pwr_all=rx_pwr_new-120+6; - else if(rx_pwr_all >=43) - rx_pwr_all=rx_pwr_new-120+8; - else if(rx_pwr_all >=33) - rx_pwr_all=rx_pwr_new-120+8; - else if(rx_pwr_all >=23) - rx_pwr_all=rx_pwr_new-120+10; - else - rx_pwr_all=rx_pwr_new-120+7; - - - return rx_pwr_all; - -} - #endif // end if RTL8723B diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/odm_RTL8723B.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/odm_RTL8723B.h old mode 100644 new mode 100755 index f544f21a3a8d..dd5da85e34ec --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/odm_RTL8723B.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/odm_RTL8723B.h @@ -31,11 +31,6 @@ odm_CCKRSSI_8723B( IN u1Byte VGA_idx ); -s1Byte -odm_RSSIOFDM_8723B( - IN s1Byte rx_pwr_new - ); - #endif diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/odm_RegConfig8723B.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/odm_RegConfig8723B.c old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/odm_RegConfig8723B.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/rtl8723b/odm_RegConfig8723B.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/hal_btcoex.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/hal_btcoex.c old mode 100644 new mode 100755 index 46c52a80fba9..221226abb177 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/hal_btcoex.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/hal_btcoex.c @@ -167,9 +167,24 @@ static void halbtcoutsrc_DbgInit(void) 0; } +static u8 halbtcoutsrc_IsCsrBtCoex(PBTC_COEXIST pBtCoexist) +{ + if (pBtCoexist->boardInfo.btChipType == BTC_CHIP_CSR_BC4 + || pBtCoexist->boardInfo.btChipType == BTC_CHIP_CSR_BC8 + ){ + return _TRUE; + } + return _FALSE; +} + static u8 halbtcoutsrc_IsHwMailboxExist(PBTC_COEXIST pBtCoexist) { - if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) + if (pBtCoexist->boardInfo.btChipType == BTC_CHIP_CSR_BC4 + || pBtCoexist->boardInfo.btChipType == BTC_CHIP_CSR_BC8 + ){ + return _FALSE; + } + else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) { return _FALSE; } @@ -499,7 +514,7 @@ static u8 halbtcoutsrc_GetWifiScanAPNum(PADAPTER padapter) pmlmepriv = &padapter->mlmepriv; pmlmeext = &padapter->mlmeextpriv; - if (check_fwstate(pmlmepriv, WIFI_SITE_MONITOR) == _FALSE) { + if (GLBtcWiFiInScanState == _FALSE) { if (pmlmeext->sitesurvey_res.bss_cnt > 0xFF) scan_AP_num = 0xFF; else @@ -783,6 +798,10 @@ u8 halbtcoutsrc_Set(void *pBtcContext, u8 setType, void *pInBuf) pBtCoexist->btInfo.bBtTxRxMask = *pu8; break; + case BTC_SET_BL_MIRACAST_PLUS_BT: + pBtCoexist->btInfo.bMiracastPlusBt = *pu8; + break; + // set some u8 type variables. case BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON: pBtCoexist->btInfo.rssiAdjustForAgcTableOn = *pU1Tmp; @@ -950,6 +969,7 @@ void halbtcoutsrc_DisplayCoexStatistics(PBTC_COEXIST pBtCoexist) } } #endif +#if 0 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "lastHMEBoxNum", \ pHalData->LastHMEBoxNum); CL_PRINTF(cliBuf); @@ -965,12 +985,13 @@ void halbtcoutsrc_DisplayCoexStatistics(PBTC_COEXIST pBtCoexist) CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "c2hPacket", \ DBG_Var.c2hPacketCnt); CL_PRINTF(cliBuf); - +#endif CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "Periodical/ DbgCtrl", \ pBtCoexist->statistics.cntPeriodical, pBtCoexist->statistics.cntDbgCtrl); CL_PRINTF(cliBuf); - CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "InitHw/InitCoexDm/", \ - pBtCoexist->statistics.cntInitHwConfig, pBtCoexist->statistics.cntInitCoexDm); + CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "PowerOn/InitHw/InitCoexDm/RfStatus", \ + pBtCoexist->statistics.cntPowerOn, pBtCoexist->statistics.cntInitHwConfig, pBtCoexist->statistics.cntInitCoexDm, + pBtCoexist->statistics.cntRfStatusNotify); CL_PRINTF(cliBuf); CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d", "Ips/Lps/Scan/Connect/Mstatus", \ pBtCoexist->statistics.cntIpsNotify, pBtCoexist->statistics.cntLpsNotify, @@ -1131,6 +1152,21 @@ void halbtcoutsrc_Write4Byte(void *pBtcContext, u32 RegAddr, u32 Data) rtw_write32(padapter, RegAddr, Data); } +void halbtcoutsrc_WriteLocalReg1Byte(void *pBtcContext, u32 RegAddr, u8 Data) +{ + PBTC_COEXIST pBtCoexist=(PBTC_COEXIST)pBtcContext; + PADAPTER Adapter=pBtCoexist->Adapter; + + if(BTC_INTF_SDIO == pBtCoexist->chipInterface) + { + rtw_write8(Adapter, SDIO_LOCAL_BASE | RegAddr, Data); + } + else + { + rtw_write8(Adapter, RegAddr, Data); + } +} + void halbtcoutsrc_SetBbReg(void *pBtcContext, u32 RegAddr, u32 BitMask, u32 Data) { PBTC_COEXIST pBtCoexist; @@ -1287,20 +1323,48 @@ u8 halbtcoutsrc_UnderIps(PBTC_COEXIST pBtCoexist) //==================================== // Extern functions called by other module //==================================== +u8 EXhalbtcoutsrc_BindBtCoexWithAdapter(void *padapter) +{ + PBTC_COEXIST pBtCoexist=&GLBtCoexist; + u1Byte antNum=2, chipType; + + if(pBtCoexist->bBinded) + return _FALSE; + else + pBtCoexist->bBinded = _TRUE; + + pBtCoexist->statistics.cntBind++; + + pBtCoexist->Adapter = padapter; + + pBtCoexist->stackInfo.bProfileNotified = _FALSE; + + pBtCoexist->btInfo.bBtCtrlAggBufSize = _FALSE; + pBtCoexist->btInfo.aggBufSize = 5; + + pBtCoexist->btInfo.bIncreaseScanDevNum = _FALSE; + pBtCoexist->btInfo.bMiracastPlusBt = _FALSE; + +#if 0 + chipType = HALBT_GetBtChipType(Adapter); + EXhalbtcoutsrc_SetChipType(chipType); + antNum = HALBT_GetPgAntNum(Adapter); + EXhalbtcoutsrc_SetAntNum(BT_COEX_ANT_TYPE_PG, antNum); +#endif + // set default antenna position to main port + pBtCoexist->boardInfo.btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; + + return _TRUE; +} + u8 EXhalbtcoutsrc_InitlizeVariables(void *padapter) { PBTC_COEXIST pBtCoexist = &GLBtCoexist; - - pBtCoexist->statistics.cntBind++; + //pBtCoexist->statistics.cntBind++; halbtcoutsrc_DbgInit(); - if (pBtCoexist->bBinded) - return _FALSE; - else - pBtCoexist->bBinded = _TRUE; - #ifdef CONFIG_PCI_HCI pBtCoexist->chipInterface = BTC_INTF_PCI; #elif defined(CONFIG_USB_HCI) @@ -1311,12 +1375,7 @@ u8 EXhalbtcoutsrc_InitlizeVariables(void *padapter) pBtCoexist->chipInterface = BTC_INTF_UNKNOWN; #endif - if (NULL == pBtCoexist->Adapter) - { - pBtCoexist->Adapter = padapter; - } - - pBtCoexist->stackInfo.bProfileNotified = _FALSE; + EXhalbtcoutsrc_BindBtCoexWithAdapter(padapter); pBtCoexist->fBtcRead1Byte = halbtcoutsrc_Read1Byte; pBtCoexist->fBtcWrite1Byte = halbtcoutsrc_Write1Byte; @@ -1325,6 +1384,7 @@ u8 EXhalbtcoutsrc_InitlizeVariables(void *padapter) pBtCoexist->fBtcWrite2Byte = halbtcoutsrc_Write2Byte; pBtCoexist->fBtcRead4Byte = halbtcoutsrc_Read4Byte; pBtCoexist->fBtcWrite4Byte = halbtcoutsrc_Write4Byte; + pBtCoexist->fBtcWriteLocalReg1Byte = halbtcoutsrc_WriteLocalReg1Byte; pBtCoexist->fBtcSetBbReg = halbtcoutsrc_SetBbReg; pBtCoexist->fBtcGetBbReg = halbtcoutsrc_GetBbReg; @@ -1332,22 +1392,18 @@ u8 EXhalbtcoutsrc_InitlizeVariables(void *padapter) pBtCoexist->fBtcSetRfReg = halbtcoutsrc_SetRfReg; pBtCoexist->fBtcGetRfReg = halbtcoutsrc_GetRfReg; - pBtCoexist->fBtcSetBtReg = halbtcoutsrc_SetBtReg; - pBtCoexist->fBtcGetBtReg = halbtcoutsrc_GetBtReg; - pBtCoexist->fBtcFillH2c = halbtcoutsrc_FillH2cCmd; pBtCoexist->fBtcDispDbgMsg = halbtcoutsrc_DisplayDbgMsg; pBtCoexist->fBtcGet = halbtcoutsrc_Get; pBtCoexist->fBtcSet = halbtcoutsrc_Set; + pBtCoexist->fBtcGetBtReg = halbtcoutsrc_GetBtReg; + pBtCoexist->fBtcSetBtReg = halbtcoutsrc_SetBtReg; - pBtCoexist->cliBuf = GLBtcDbgBuf; - - pBtCoexist->btInfo.bBtCtrlAggBufSize = _FALSE; - pBtCoexist->btInfo.aggBufSize = 5; - - pBtCoexist->btInfo.bIncreaseScanDevNum = _FALSE; + pBtCoexist->cliBuf = &GLBtcDbgBuf[0]; + pBtCoexist->boardInfo.singleAntPath = 0; + GLBtcWiFiInScanState = _FALSE; GLBtcWiFiInIQKState = _FALSE; @@ -1355,6 +1411,21 @@ u8 EXhalbtcoutsrc_InitlizeVariables(void *padapter) return _TRUE; } +void EXhalbtcoutsrc_PowerOnSetting(PBTC_COEXIST pBtCoexist) +{ + if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) + return; + + /* Power on setting function is only added in 8723B currently */ + if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) + { + if (pBtCoexist->boardInfo.btdmAntNum == 2) + EXhalbtc8723b2ant_PowerOnSetting(pBtCoexist); + else if (pBtCoexist->boardInfo.btdmAntNum == 1) + EXhalbtc8723b1ant_PowerOnSetting(pBtCoexist); + } +} + void EXhalbtcoutsrc_InitHwConfig(PBTC_COEXIST pBtCoexist, u8 bWifiOnly) { if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) @@ -1364,7 +1435,9 @@ void EXhalbtcoutsrc_InitHwConfig(PBTC_COEXIST pBtCoexist, u8 bWifiOnly) if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { - if (pBtCoexist->boardInfo.btdmAntNum == 2) + if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) + EXhalbtc8821aCsr2ant_InitHwConfig(pBtCoexist, bWifiOnly); + else if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8821a2ant_InitHwConfig(pBtCoexist, bWifiOnly); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8821a1ant_InitHwConfig(pBtCoexist, bWifiOnly); @@ -1416,7 +1489,9 @@ void EXhalbtcoutsrc_InitCoexDm(PBTC_COEXIST pBtCoexist) if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { - if (pBtCoexist->boardInfo.btdmAntNum == 2) + if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) + EXhalbtc8821aCsr2ant_InitCoexDm(pBtCoexist); + else if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8821a2ant_InitCoexDm(pBtCoexist); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8821a1ant_InitCoexDm(pBtCoexist); @@ -1482,7 +1557,9 @@ void EXhalbtcoutsrc_IpsNotify(PBTC_COEXIST pBtCoexist, u8 type) if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { - if (pBtCoexist->boardInfo.btdmAntNum == 2) + if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) + EXhalbtc8821aCsr2ant_IpsNotify(pBtCoexist, ipsType); + else if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8821a2ant_IpsNotify(pBtCoexist, ipsType); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8821a1ant_IpsNotify(pBtCoexist, ipsType); @@ -1546,7 +1623,9 @@ void EXhalbtcoutsrc_LpsNotify(PBTC_COEXIST pBtCoexist, u8 type) if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { - if (pBtCoexist->boardInfo.btdmAntNum == 2) + if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) + EXhalbtc8821aCsr2ant_LpsNotify(pBtCoexist, lpsType); + else if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8821a2ant_LpsNotify(pBtCoexist, lpsType); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8821a1ant_LpsNotify(pBtCoexist, lpsType); @@ -1615,7 +1694,9 @@ void EXhalbtcoutsrc_ScanNotify(PBTC_COEXIST pBtCoexist, u8 type) if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { - if (pBtCoexist->boardInfo.btdmAntNum == 2) + if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) + EXhalbtc8821aCsr2ant_ScanNotify(pBtCoexist, scanType); + else if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8821a2ant_ScanNotify(pBtCoexist, scanType); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8821a1ant_ScanNotify(pBtCoexist, scanType); @@ -1680,7 +1761,9 @@ void EXhalbtcoutsrc_ConnectNotify(PBTC_COEXIST pBtCoexist, u8 action) if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { - if (pBtCoexist->boardInfo.btdmAntNum == 2) + if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) + EXhalbtc8821aCsr2ant_ConnectNotify(pBtCoexist, assoType); + else if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8821a2ant_ConnectNotify(pBtCoexist, assoType); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8821a1ant_ConnectNotify(pBtCoexist, assoType); @@ -1746,7 +1829,9 @@ void EXhalbtcoutsrc_MediaStatusNotify(PBTC_COEXIST pBtCoexist, RT_MEDIA_STATUS m if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { - if (pBtCoexist->boardInfo.btdmAntNum == 2) + if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) + EXhalbtc8821aCsr2ant_MediaStatusNotify(pBtCoexist, mStatus); + else if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8821a2ant_MediaStatusNotify(pBtCoexist, mStatus); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8821a1ant_MediaStatusNotify(pBtCoexist, mStatus); @@ -1818,7 +1903,9 @@ void EXhalbtcoutsrc_SpecialPacketNotify(PBTC_COEXIST pBtCoexist, u8 pktType) if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { - if (pBtCoexist->boardInfo.btdmAntNum == 2) + if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) + EXhalbtc8821aCsr2ant_SpecialPacketNotify(pBtCoexist, packetType); + else if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8821a2ant_SpecialPacketNotify(pBtCoexist, packetType); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8821a1ant_SpecialPacketNotify(pBtCoexist, packetType); @@ -1875,7 +1962,9 @@ void EXhalbtcoutsrc_BtInfoNotify(PBTC_COEXIST pBtCoexist, u8 *tmpBuf, u8 length) if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { - if (pBtCoexist->boardInfo.btdmAntNum == 2) + if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) + EXhalbtc8821aCsr2ant_BtInfoNotify(pBtCoexist, tmpBuf, length); + else if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8821a2ant_BtInfoNotify(pBtCoexist, tmpBuf, length); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8821a1ant_BtInfoNotify(pBtCoexist, tmpBuf, length); @@ -1920,6 +2009,32 @@ void EXhalbtcoutsrc_BtInfoNotify(PBTC_COEXIST pBtCoexist, u8 *tmpBuf, u8 length) // halbtcoutsrc_NormalLowPower(pBtCoexist); } +VOID +EXhalbtcoutsrc_RfStatusNotify( + IN PBTC_COEXIST pBtCoexist, + IN u1Byte type + ) +{ + if(!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) + return; + pBtCoexist->statistics.cntRfStatusNotify++; + + if(IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) + { + } + else if(IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) + { + if(pBtCoexist->boardInfo.btdmAntNum == 1) + EXhalbtc8723b1ant_RfStatusNotify(pBtCoexist, type); + } + else if(IS_HARDWARE_TYPE_8192E(pBtCoexist->Adapter)) + { + } + else if(IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter)) + { + } +} + void EXhalbtcoutsrc_StackOperationNotify(PBTC_COEXIST pBtCoexist, u8 type) { #if 0 @@ -1964,7 +2079,9 @@ void EXhalbtcoutsrc_HaltNotify(PBTC_COEXIST pBtCoexist) if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { - if (pBtCoexist->boardInfo.btdmAntNum == 2) + if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) + EXhalbtc8821aCsr2ant_HaltNotify(pBtCoexist); + else if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8821a2ant_HaltNotify(pBtCoexist); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8821a1ant_HaltNotify(pBtCoexist); @@ -2045,7 +2162,9 @@ void EXhalbtcoutsrc_PnpNotify(PBTC_COEXIST pBtCoexist, u8 pnpState) } else if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { - if (pBtCoexist->boardInfo.btdmAntNum == 1) + if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) + EXhalbtc8821aCsr2ant_PnpNotify(pBtCoexist, pnpState); + else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8821a1ant_PnpNotify(pBtCoexist,pnpState); else if(pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8821a2ant_PnpNotify(pBtCoexist,pnpState); @@ -2062,7 +2181,7 @@ void EXhalbtcoutsrc_PnpNotify(PBTC_COEXIST pBtCoexist, u8 pnpState) } } -void EXhalbtcoutsrc_CoexDmSwitch(PBTC_COEXIST pBtCoexist, BOOLEAN antInverse) +void EXhalbtcoutsrc_CoexDmSwitch(PBTC_COEXIST pBtCoexist) { if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; @@ -2076,7 +2195,7 @@ void EXhalbtcoutsrc_CoexDmSwitch(PBTC_COEXIST pBtCoexist, BOOLEAN antInverse) { pBtCoexist->bStopCoexDm = TRUE; EXhalbtc8723b1ant_CoexDmReset(pBtCoexist); - EXhalbtcoutsrc_SetAntNum(BT_COEX_ANT_TYPE_DETECTED, 2, antInverse); + EXhalbtcoutsrc_SetAntNum(BT_COEX_ANT_TYPE_DETECTED, 2); EXhalbtc8723b2ant_InitHwConfig(pBtCoexist, FALSE); EXhalbtc8723b2ant_InitCoexDm(pBtCoexist); pBtCoexist->bStopCoexDm = FALSE; @@ -2098,7 +2217,9 @@ void EXhalbtcoutsrc_Periodical(PBTC_COEXIST pBtCoexist) if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { - if (pBtCoexist->boardInfo.btdmAntNum == 2) + if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) + EXhalbtc8821aCsr2ant_Periodical(pBtCoexist); + else if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8821a2ant_Periodical(pBtCoexist); else if (pBtCoexist->boardInfo.btdmAntNum == 1) { @@ -2271,11 +2392,12 @@ void EXhalbtcoutsrc_SetBtPatchVersion(u16 btHciVersion, u16 btPatchVersion) pBtCoexist->btInfo.btHciVer = btHciVersion; } +#if 0 void EXhalbtcoutsrc_SetBtExist(u8 bBtExist) { GLBtCoexist.boardInfo.bBtExist = bBtExist; } - +#endif void EXhalbtcoutsrc_SetChipType(u8 chipType) { switch(chipType) @@ -2305,13 +2427,13 @@ void EXhalbtcoutsrc_SetChipType(u8 chipType) } } -void EXhalbtcoutsrc_SetAntNum(u8 type, u8 antNum, BOOLEAN antInverse) +void EXhalbtcoutsrc_SetAntNum(u8 type, u8 antNum) { if (BT_COEX_ANT_TYPE_PG == type) { GLBtCoexist.boardInfo.pgAntNum = antNum; GLBtCoexist.boardInfo.btdmAntNum = antNum; - +#if 0 //The antenna position: Main (default) or Aux for pgAntNum=2 && btdmAntNum =1 //The antenna position should be determined by auto-detect mechanism // The following is assumed to main, and those must be modified if y auto-detect mechanism is ready @@ -2319,22 +2441,26 @@ void EXhalbtcoutsrc_SetAntNum(u8 type, u8 antNum, BOOLEAN antInverse) GLBtCoexist.boardInfo.btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; else GLBtCoexist.boardInfo.btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; +#endif } else if (BT_COEX_ANT_TYPE_ANTDIV == type) { GLBtCoexist.boardInfo.btdmAntNum = antNum; - GLBtCoexist.boardInfo.btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; + //GLBtCoexist.boardInfo.btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; } else if (BT_COEX_ANT_TYPE_DETECTED == type) { GLBtCoexist.boardInfo.btdmAntNum = antNum; - GLBtCoexist.boardInfo.btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; + //GLBtCoexist.boardInfo.btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; } +} - if (antInverse == _TRUE) - { - GLBtCoexist.boardInfo.btdmAntPos = BTC_ANTENNA_AT_AUX_PORT; - } +// +// Currently used by 8723b only, S0 or S1 +// +void EXhalbtcoutsrc_SetSingleAntPath(u8 singleAntPath) +{ + GLBtCoexist.boardInfo.singleAntPath = singleAntPath; } void EXhalbtcoutsrc_DisplayBtCoexInfo(PBTC_COEXIST pBtCoexist) @@ -2346,7 +2472,9 @@ void EXhalbtcoutsrc_DisplayBtCoexInfo(PBTC_COEXIST pBtCoexist) if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { - if (pBtCoexist->boardInfo.btdmAntNum == 2) + if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE) + EXhalbtc8821aCsr2ant_DisplayCoexInfo(pBtCoexist); + else if (pBtCoexist->boardInfo.btdmAntNum == 2) EXhalbtc8821a2ant_DisplayCoexInfo(pBtCoexist); else if (pBtCoexist->boardInfo.btdmAntNum == 1) EXhalbtc8821a1ant_DisplayCoexInfo(pBtCoexist); @@ -2457,7 +2585,7 @@ void hal_btcoex_SetBTCoexist(PADAPTER padapter, u8 bBtExist) pHalData = GET_HAL_DATA(padapter); pHalData->bt_coexist.bBtExist = bBtExist; - EXhalbtcoutsrc_SetBtExist(bBtExist); + //EXhalbtcoutsrc_SetBtExist(bBtExist); } /* @@ -2508,7 +2636,7 @@ u8 hal_btcoex_GetChipType(PADAPTER padapter) return pHalData->bt_coexist.btChipType; } -void hal_btcoex_SetPgAntNum(PADAPTER padapter, u8 antNum, BOOLEAN antInverse) +void hal_btcoex_SetPgAntNum(PADAPTER padapter, u8 antNum) { PHAL_DATA_TYPE pHalData; @@ -2516,7 +2644,7 @@ void hal_btcoex_SetPgAntNum(PADAPTER padapter, u8 antNum, BOOLEAN antInverse) pHalData = GET_HAL_DATA(padapter); pHalData->bt_coexist.btTotalAntNum = antNum; - EXhalbtcoutsrc_SetAntNum(BT_COEX_ANT_TYPE_PG, antNum, antInverse); + EXhalbtcoutsrc_SetAntNum(BT_COEX_ANT_TYPE_PG, antNum); } u8 hal_btcoex_GetPgAntNum(PADAPTER padapter) @@ -2529,6 +2657,11 @@ u8 hal_btcoex_GetPgAntNum(PADAPTER padapter) return pHalData->bt_coexist.btTotalAntNum; } +void hal_btcoex_SetSingleAntPath(PADAPTER padapter, u8 singleAntPath) +{ + EXhalbtcoutsrc_SetSingleAntPath(singleAntPath); +} + u8 hal_btcoex_Initialize(PADAPTER padapter) { u8 ret1; @@ -2542,6 +2675,11 @@ u8 hal_btcoex_Initialize(PADAPTER padapter) return ret2; } +void hal_btcoex_PowerOnSetting(PADAPTER padapter) +{ + EXhalbtcoutsrc_PowerOnSetting(&GLBtCoexist); +} + void hal_btcoex_InitHwConfig(PADAPTER padapter, u8 bWifiOnly) { if (!hal_btcoex_IsBtExist(padapter)) diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/hal_com.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/hal_com.c old mode 100644 new mode 100755 index 2f2072e32d5c..9e1dfe53ada5 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/hal_com.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/hal_com.c @@ -20,9 +20,40 @@ #define _HAL_COM_C_ #include +#include "hal_com_h2c.h" #include "../hal/OUTSRC/odm_precomp.h" +u8 rtw_hal_data_init(_adapter *padapter) +{ + if(is_primary_adapter(padapter)) //if(padapter->isprimary) + { + padapter->hal_data_sz = sizeof(HAL_DATA_TYPE); + padapter->HalData = rtw_zvmalloc(padapter->hal_data_sz); + if(padapter->HalData == NULL){ + DBG_8192C("cant not alloc memory for HAL DATA \n"); + return _FAIL; + } + } + return _SUCCESS; +} + +void rtw_hal_data_deinit(_adapter *padapter) +{ + if(is_primary_adapter(padapter)) //if(padapter->isprimary) + { + if (padapter->HalData) + { + #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE + phy_free_filebuf(padapter); + #endif + rtw_vmfree(padapter->HalData, padapter->hal_data_sz); + padapter->HalData = NULL; + padapter->hal_data_sz = 0; + } + } +} + void dump_chip_info(HAL_VERSION ChipVersion) { @@ -436,7 +467,7 @@ _TwoOutPipeMapping( // BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA //{ 0, 1, 0, 1, 0, 0, 0, 0, 0 }; - //0:H, 1:N + //0:ep_0 num, 1:ep_1 num pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[1];//VO pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];//VI @@ -454,7 +485,7 @@ _TwoOutPipeMapping( //BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA //{ 1, 1, 0, 0, 0, 0, 0, 0, 0 }; - //0:H, 1:N + //0:ep_0 num, 1:ep_1 num pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];//VI @@ -1019,6 +1050,58 @@ _func_enter_; case HW_VAR_PORT_SWITCH: hw_var_port_switch(adapter); break; + case HW_VAR_INIT_RTS_RATE: + { + u16 brate_cfg = *((u16*)val); + u8 rate_index = 0; + HAL_VERSION *hal_ver = &hal_data->VersionID; + + if (IS_81XXC(*hal_ver) ||IS_92D(*hal_ver) || IS_8723_SERIES(*hal_ver) || IS_8188E(*hal_ver)) { + + while (brate_cfg > 0x1) { + brate_cfg = (brate_cfg >> 1); + rate_index++; + } + rtw_write8(adapter, REG_INIRTS_RATE_SEL, rate_index); + } else { + rtw_warn_on(1); + } + } + break; + case HW_VAR_SEC_CFG: + { + #if defined(CONFIG_CONCURRENT_MODE) && !defined(DYNAMIC_CAMID_ALLOC) + // enable tx enc and rx dec engine, and no key search for MC/BC + rtw_write8(adapter, REG_SECCFG, SCR_NoSKMC|SCR_RxDecEnable|SCR_TxEncEnable); + #elif defined(DYNAMIC_CAMID_ALLOC) + u16 reg_scr; + + reg_scr = rtw_read16(adapter, REG_SECCFG); + rtw_write16(adapter, REG_SECCFG, reg_scr|SCR_CHK_KEYID|SCR_RxDecEnable|SCR_TxEncEnable); + #else + rtw_write8(adapter, REG_SECCFG, *((u8*)val)); + #endif + } + break; + case HW_VAR_SEC_DK_CFG: + { + struct security_priv *sec = &adapter->securitypriv; + u8 reg_scr = rtw_read8(adapter, REG_SECCFG); + + if (val) /* Enable default key related setting */ + { + reg_scr |= SCR_TXBCUSEDK; + if (sec->dot11AuthAlgrthm != dot11AuthAlgrthm_8021X) + reg_scr |= (SCR_RxUseDK|SCR_TxUseDK); + } + else /* Disable default key related setting */ + { + reg_scr &= ~(SCR_RXBCUSEDK|SCR_TXBCUSEDK|SCR_RxUseDK|SCR_TxUseDK); + } + + rtw_write8(adapter, REG_SECCFG, reg_scr); + } + break; case HW_VAR_DM_FLAG: odm->SupportAbility = *((u32*)val); break; @@ -1240,6 +1323,93 @@ GetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value) return bResult; } +void GetHalODMVar( + PADAPTER Adapter, + HAL_ODM_VARIABLE eVariable, + PVOID pValue1, + PVOID pValue2) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T podmpriv = &pHalData->odmpriv; + switch(eVariable){ +#if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR) + case HAL_ODM_NOISE_MONITOR: + { + u8 chan = *(u8*)pValue1; + *(s16 *)pValue2 = pHalData->noise[chan]; + #ifdef DBG_NOISE_MONITOR + DBG_8192C("### Noise monitor chan(%d)-noise:%d (dBm) ###\n", + chan,pHalData->noise[chan]); + #endif + + } + break; +#endif//#ifdef CONFIG_BACKGROUND_NOISE_MONITOR + default: + break; + } +} + +void SetHalODMVar( + PADAPTER Adapter, + HAL_ODM_VARIABLE eVariable, + PVOID pValue1, + BOOLEAN bSet) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T podmpriv = &pHalData->odmpriv; + //_irqL irqL; + switch(eVariable){ + case HAL_ODM_STA_INFO: + { + struct sta_info *psta = (struct sta_info *)pValue1; + if(bSet){ + DBG_8192C("### Set STA_(%d) info ###\n",psta->mac_id); + ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS,psta->mac_id,psta); + } + else{ + DBG_8192C("### Clean STA_(%d) info ###\n",psta->mac_id); + //_enter_critical_bh(&pHalData->odm_stainfo_lock, &irqL); + ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS,psta->mac_id,NULL); + + //_exit_critical_bh(&pHalData->odm_stainfo_lock, &irqL); + } + } + break; + case HAL_ODM_P2P_STATE: + ODM_CmnInfoUpdate(podmpriv,ODM_CMNINFO_WIFI_DIRECT,bSet); + break; + case HAL_ODM_WIFI_DISPLAY_STATE: + ODM_CmnInfoUpdate(podmpriv,ODM_CMNINFO_WIFI_DISPLAY,bSet); + break; + #if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR) + case HAL_ODM_NOISE_MONITOR: + { + struct noise_info *pinfo = (struct noise_info *)pValue1; + + #ifdef DBG_NOISE_MONITOR + DBG_8192C("### Noise monitor chan(%d)-bPauseDIG:%d,IGIValue:0x%02x,max_time:%d (ms) ###\n", + pinfo->chan,pinfo->bPauseDIG,pinfo->IGIValue,pinfo->max_time); + #endif + + pHalData->noise[pinfo->chan] = ODM_InbandNoise_Monitor(podmpriv,pinfo->bPauseDIG,pinfo->IGIValue,pinfo->max_time); + DBG_871X("chan_%d, noise = %d (dBm)\n",pinfo->chan,pHalData->noise[pinfo->chan]); + #ifdef DBG_NOISE_MONITOR + DBG_871X("noise_a = %d, noise_b = %d noise_all:%d \n", + podmpriv->noise_level.noise[ODM_RF_PATH_A], + podmpriv->noise_level.noise[ODM_RF_PATH_B], + podmpriv->noise_level.noise_all); + #endif + } + break; + #endif//#ifdef CONFIG_BACKGROUND_NOISE_MONITOR + + default: + break; + } +} + + BOOLEAN eqNByte( u8* str1, @@ -1646,3 +1816,421 @@ void rtw_store_phy_info(_adapter *padapter, union recv_frame *prframe) } } #endif + +#ifdef CONFIG_EFUSE_CONFIG_FILE +int check_phy_efuse_tx_power_info_valid(PADAPTER padapter) { + EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); + u8* pContent = pEEPROM->efuse_eeprom_data; + int index = 0; + u16 tx_index_offset = 0x0000; + + switch(padapter->chip_type) { + case RTL8723B: + tx_index_offset = EEPROM_TX_PWR_INX_8723B; + break; + case RTL8188E: + tx_index_offset = EEPROM_TX_PWR_INX_88E; + break; + case RTL8192E: + tx_index_offset = EEPROM_TX_PWR_INX_8192E; + break; + default: + tx_index_offset = 0x0010; + break; + } + for (index = 0 ; index < 12 ; index++) { + if (pContent[tx_index_offset + index] == 0xFF) { + return _FALSE; + } else { + DBG_871X("0x%02x ,", pContent[EEPROM_TX_PWR_INX_88E+index]); + } + } + DBG_871X("\n"); + return _TRUE; +} + +int check_phy_efuse_macaddr_info_valid(PADAPTER padapter) { + + u8 val = 0; + u16 addr_offset = 0x0000; + + switch(padapter->chip_type) { + case RTL8723B: + if (padapter->interface_type == RTW_USB) { + addr_offset = EEPROM_MAC_ADDR_8723BU; + DBG_871X("%s: interface is USB\n", __func__); + } else if (padapter->interface_type == RTW_SDIO) { + addr_offset = EEPROM_MAC_ADDR_8723BS; + DBG_871X("%s: interface is SDIO\n", __func__); + } else if (padapter->interface_type == RTW_PCIE) { + addr_offset = EEPROM_MAC_ADDR_8723BE; + DBG_871X("%s: interface is PCIE\n", __func__); + } else if (padapter->interface_type == RTW_GSPI) { + //addr_offset = EEPROM_MAC_ADDR_8723BS; + DBG_871X("%s: interface is GSPI\n", __func__); + } + break; + case RTL8188E: + if (padapter->interface_type == RTW_USB) { + addr_offset = EEPROM_MAC_ADDR_88EU; + DBG_871X("%s: interface is USB\n", __func__); + } else if (padapter->interface_type == RTW_SDIO) { + addr_offset = EEPROM_MAC_ADDR_88ES; + DBG_871X("%s: interface is SDIO\n", __func__); + } else if (padapter->interface_type == RTW_PCIE) { + addr_offset = EEPROM_MAC_ADDR_88EE; + DBG_871X("%s: interface is PCIE\n", __func__); + } else if (padapter->interface_type == RTW_GSPI) { + //addr_offset = EEPROM_MAC_ADDR_8723BS; + DBG_871X("%s: interface is GSPI\n", __func__); + } + break; + } + + if (addr_offset == 0x0000) { + DBG_871X("phy efuse MAC addr offset is 0!!\n"); + return _FALSE; + } else { + rtw_efuse_map_read(padapter, addr_offset, 1, &val); + } + + if (val == 0xFF) { + return _FALSE; + } else { + DBG_871X("phy efuse with valid MAC addr\n"); + return _TRUE; + } +} + +u32 Hal_readPGDataFromConfigFile( + PADAPTER padapter, + struct file *fp) +{ + u32 i; + mm_segment_t fs; + u8 temp[3]; + loff_t pos = 0; + EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); + u8 *PROMContent = pEEPROM->efuse_eeprom_data; + + temp[2] = 0; // add end of string '\0' + + fs = get_fs(); + set_fs(KERNEL_DS); + + for (i = 0 ; i < HWSET_MAX_SIZE ; i++) { + vfs_read(fp, temp, 2, &pos); + PROMContent[i] = simple_strtoul(temp, NULL, 16); + if ((i % EFUSE_FILE_COLUMN_NUM) == (EFUSE_FILE_COLUMN_NUM - 1)) { + //Filter the lates space char. + vfs_read(fp, temp, 1, &pos); + if (strchr(temp, ' ') == NULL) { + pos--; + vfs_read(fp, temp, 2, &pos); + } + } else { + pos += 1; // Filter the space character + } + } + + set_fs(fs); + pEEPROM->bloadfile_fail_flag = _FALSE; + +#ifdef CONFIG_DEBUG + DBG_871X("Efuse configure file:\n"); + for (i=0; imac_addr, 0, ETH_ALEN); + + fs = get_fs(); + set_fs(KERNEL_DS); + + DBG_871X("wifi mac address:\n"); + vfs_read(fp, source_addr, 18, &pos); + source_addr[17] = ':'; + + head = end = source_addr; + for (i=0; imac_addr[i] = simple_strtoul(head, NULL, 16 ); + + if (end) { + end++; + head = end; + } + } + + set_fs(fs); + pEEPROM->bloadmac_fail_flag = _FALSE; + + if (rtw_check_invalid_mac_address(pEEPROM->mac_addr) == _TRUE) { +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,33)) + get_random_bytes(pEEPROM->mac_addr, ETH_ALEN); + pEEPROM->mac_addr[0] = 0x00; + pEEPROM->mac_addr[1] = 0xe0; + pEEPROM->mac_addr[2] = 0x4c; +#else + pEEPROM->mac_addr[0] = 0x00; + pEEPROM->mac_addr[1] = 0xe0; + pEEPROM->mac_addr[2] = 0x4c; + pEEPROM->mac_addr[3] = (u8)(curtime & 0xff) ; + pEEPROM->mac_addr[4] = (u8)((curtime>>8) & 0xff) ; + pEEPROM->mac_addr[5] = (u8)((curtime>>16) & 0xff) ; +#endif + DBG_871X("MAC Address from wifimac error is invalid, assign random MAC !!!\n"); + } + + DBG_871X("%s: Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n", + __func__, pEEPROM->mac_addr[0], pEEPROM->mac_addr[1], + pEEPROM->mac_addr[2], pEEPROM->mac_addr[3], + pEEPROM->mac_addr[4], pEEPROM->mac_addr[5]); +} + +void Hal_GetPhyEfuseMACAddr(PADAPTER padapter, u8* mac_addr) { + int i = 0; + u16 addr_offset = 0x0000; + + switch(padapter->chip_type) { + case RTL8723B: + if (padapter->interface_type == RTW_USB) { + addr_offset = EEPROM_MAC_ADDR_8723BU; + DBG_871X("%s: interface is USB\n", __func__); + } else if (padapter->interface_type == RTW_SDIO) { + addr_offset = EEPROM_MAC_ADDR_8723BS; + DBG_871X("%s: interface is SDIO\n", __func__); + } else if (padapter->interface_type == RTW_PCIE) { + addr_offset = EEPROM_MAC_ADDR_8723BE; + DBG_871X("%s: interface is PCIE\n", __func__); + } else if (padapter->interface_type == RTW_GSPI){ + //addr_offset = EEPROM_MAC_ADDR_8723BS; + DBG_871X("%s: interface is GSPI\n", __func__); + } + break; + case RTL8188E: + if (padapter->interface_type == RTW_USB) { + addr_offset = EEPROM_MAC_ADDR_88EU; + DBG_871X("%s: interface is USB\n", __func__); + } else if (padapter->interface_type == RTW_SDIO) { + addr_offset = EEPROM_MAC_ADDR_88ES; + DBG_871X("%s: interface is SDIO\n", __func__); + } else if (padapter->interface_type == RTW_PCIE) { + addr_offset = EEPROM_MAC_ADDR_88EE; + DBG_871X("%s: interface is PCIE\n", __func__); + } else if (padapter->interface_type == RTW_GSPI){ + //addr_offset = EEPROM_MAC_ADDR_8723BS; + DBG_871X("%s: interface is GSPI\n", __func__); + } + break; + } + + rtw_efuse_map_read(padapter, addr_offset, ETH_ALEN, mac_addr); + + if (rtw_check_invalid_mac_address(mac_addr) == _TRUE) { +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,33)) + get_random_bytes(mac_addr, ETH_ALEN); + mac_addr[0] = 0x00; + mac_addr[1] = 0xe0; + mac_addr[2] = 0x4c; +#else + mac_addr[0] = 0x00; + mac_addr[1] = 0xe0; + mac_addr[2] = 0x4c; + mac_addr[3] = (u8)(curtime & 0xff) ; + mac_addr[4] = (u8)((curtime>>8) & 0xff) ; + mac_addr[5] = (u8)((curtime>>16) & 0xff) ; +#endif + DBG_871X("MAC Address from phy efuse error, assign random MAC !!!\n"); + } + + DBG_871X("%s: Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n", + __func__, mac_addr[0], mac_addr[1], mac_addr[2], + mac_addr[3], mac_addr[4], mac_addr[5]); +} +#endif //CONFIG_EFUSE_CONFIG_FILE + +#ifdef CONFIG_RF_GAIN_OFFSET +u32 Array_kfreemap[] = { +0x08,0xe, +0x06,0xc, +0x04,0xa, +0x02,0x8, +0x00,0x6, +0x03,0x4, +0x05,0x2, +0x07,0x0, +0x09,0x0, +0x0c,0x0, +}; + +void rtw_bb_rf_gain_offset(_adapter *padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u8 value = padapter->eeprompriv.EEPROMRFGainOffset; + u8 tmp = 0x3e; + u32 res,i=0; + u4Byte ArrayLen = sizeof(Array_kfreemap)/sizeof(u32); + pu4Byte Array = Array_kfreemap; + u4Byte v1=0,v2=0,GainValue,target=0; + //DBG_871X("+%s value: 0x%02x+\n", __func__, value); +#if defined(CONFIG_RTL8723A) + if (value & BIT0) { + DBG_871X("Offset RF Gain.\n"); + DBG_871X("Offset RF Gain. padapter->eeprompriv.EEPROMRFGainVal=0x%x\n",padapter->eeprompriv.EEPROMRFGainVal); + if(padapter->eeprompriv.EEPROMRFGainVal != 0xff){ + res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0xd, 0xffffffff); + DBG_871X("Offset RF Gain. reg 0xd=0x%x\n",res); + res &= 0xfff87fff; + + res |= (padapter->eeprompriv.EEPROMRFGainVal & 0x0f)<< 15; + DBG_871X("Offset RF Gain. reg 0xd=0x%x\n",res); + + rtw_hal_write_rfreg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET_CCK, RF_GAIN_OFFSET_MASK, res); + + res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0xe, 0xffffffff); + DBG_871X("Offset RF Gain. reg 0xe=0x%x\n",res); + res &= 0xfffffff0; + + res |= (padapter->eeprompriv.EEPROMRFGainVal & 0x0f); + DBG_871X("Offset RF Gain. reg 0xe=0x%x\n",res); + + rtw_hal_write_rfreg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET_OFDM, RF_GAIN_OFFSET_MASK, res); + } + else + { + DBG_871X("Offset RF Gain. padapter->eeprompriv.EEPROMRFGainVal=0x%x != 0xff, didn't run Kfree\n",padapter->eeprompriv.EEPROMRFGainVal); + } + } else { + DBG_871X("Using the default RF gain.\n"); + } +#elif defined(CONFIG_RTL8723B) + if (value & BIT4) { + DBG_871X("Offset RF Gain.\n"); + DBG_871X("Offset RF Gain. padapter->eeprompriv.EEPROMRFGainVal=0x%x\n",padapter->eeprompriv.EEPROMRFGainVal); + + if(padapter->eeprompriv.EEPROMRFGainVal != 0xff){ + if (pHalData->ant_path == ODM_RF_PATH_A) + GainValue=(padapter->eeprompriv.EEPROMRFGainVal & 0x0f); + else + GainValue=(padapter->eeprompriv.EEPROMRFGainVal & 0xf0)>>4; + DBG_871X("Ant PATH_%d GainValue Offset = 0x%x\n",(pHalData->ant_path == ODM_RF_PATH_A) ? (ODM_RF_PATH_A) : (ODM_RF_PATH_B),GainValue); + + for (i = 0; i < ArrayLen; i += 2 ) + { + v1 = Array[i]; + v2 = Array[i+1]; + if ( v1 == GainValue ) { + DBG_871X("Offset RF Gain. got v1 =0x%x ,v2 =0x%x \n",v1,v2); + target=v2; + break; + } + } + DBG_871X("padapter->eeprompriv.EEPROMRFGainVal=0x%x ,Gain offset Target Value=0x%x\n",padapter->eeprompriv.EEPROMRFGainVal,target); + + res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff); + DBG_871X("Offset RF Gain. before reg 0x7f=0x%08x\n",res); + PHY_SetRFReg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, BIT18|BIT17|BIT16|BIT15, target); + res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff); + + DBG_871X("Offset RF Gain. After reg 0x7f=0x%08x\n",res); + + } else { + + DBG_871X("Offset RF Gain. padapter->eeprompriv.EEPROMRFGainVal=0x%x != 0xff, didn't run Kfree\n",padapter->eeprompriv.EEPROMRFGainVal); + } + } else { + DBG_871X("Using the default RF gain.\n"); + } + +#elif defined(CONFIG_RTL8188E) + if (value & BIT4) { + DBG_871X("8188ES Offset RF Gain.\n"); + DBG_871X("8188ES Offset RF Gain. EEPROMRFGainVal=0x%x\n", + padapter->eeprompriv.EEPROMRFGainVal); + + if (padapter->eeprompriv.EEPROMRFGainVal != 0xff) { + res = rtw_hal_read_rfreg(padapter, RF_PATH_A, + REG_RF_BB_GAIN_OFFSET, 0xffffffff); + + DBG_871X("Offset RF Gain. reg 0x55=0x%x\n",res); + res &= 0xfff87fff; + + res |= (padapter->eeprompriv.EEPROMRFGainVal & 0x0f) << 15; + DBG_871X("Offset RF Gain. res=0x%x\n",res); + + rtw_hal_write_rfreg(padapter, RF_PATH_A, + REG_RF_BB_GAIN_OFFSET, + RF_GAIN_OFFSET_MASK, res); + } else { + DBG_871X("Offset RF Gain. EEPROMRFGainVal=0x%x == 0xff, didn't run Kfree\n", + padapter->eeprompriv.EEPROMRFGainVal); + } + } else { + DBG_871X("Using the default RF gain.\n"); + } +#else + if (!(value & 0x01)) { + //DBG_871X("Offset RF Gain.\n"); + res = rtw_hal_read_rfreg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, 0xffffffff); + value &= tmp; + res = value << 14; + rtw_hal_write_rfreg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, RF_GAIN_OFFSET_MASK, res); + } else { + DBG_871X("Using the default RF gain.\n"); + } +#endif + +} +#endif //CONFIG_RF_GAIN_OFFSET + +//To avoid RX affect TX throughput +void dm_DynamicUsbTxAgg(_adapter *padapter, u8 from_timer) +{ + struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +#ifdef CONFIG_USB_RX_AGGREGATION + if(IS_HARDWARE_TYPE_8821U(padapter) )//|| IS_HARDWARE_TYPE_8192EU(padapter)) + { + //This AGG_PH_TH only for UsbRxAggMode == USB_RX_AGG_USB + if((pHalData->UsbRxAggMode == USB_RX_AGG_USB) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) + { + if(pdvobjpriv->traffic_stat.cur_tx_tp > 2 && pdvobjpriv->traffic_stat.cur_rx_tp < 30) + rtw_write16(padapter, REG_RXDMA_AGG_PG_TH,0x1010); + else + rtw_write16(padapter, REG_RXDMA_AGG_PG_TH,0x2005); //dmc agg th 20K + + //DBG_871X("TX_TP=%u, RX_TP=%u \n", pdvobjpriv->traffic_stat.cur_tx_tp, pdvobjpriv->traffic_stat.cur_rx_tp); + } + } +#endif +} + diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/hal_com_phycfg.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/hal_com_phycfg.c old mode 100644 new mode 100755 index 8bb2747a478c..e2ddca765370 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/hal_com_phycfg.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/hal_com_phycfg.c @@ -404,7 +404,7 @@ PHY_GetRateSectionIndexOfTxPowerByRate( case rTxAGC_A_Rate54_24: index = 1; break; case rTxAGC_A_CCK1_Mcs32: index = 6; break; case rTxAGC_B_CCK11_A_CCK2_11: - if ( BitMask == 0xffffff00 ) + if ( BitMask == bMaskH3Bytes ) index = 7; else if ( BitMask == 0x000000ff ) index = 15; @@ -2341,7 +2341,7 @@ PHY_GetTxPowerIndex( u8 txPower = 0x3E; if (IS_HARDWARE_TYPE_8813A(pAdapter)) { -//#if (RTL8813A_SUPPORT==1) +//#if (RTL8814A_SUPPORT==1) // txPower = PHY_GetTxPowerIndex_8813A( pAdapter, PowerIndex, RFPath, Rate ); //#endif } @@ -2378,7 +2378,7 @@ PHY_SetTxPowerIndex( ) { if (IS_HARDWARE_TYPE_8813A(pAdapter)) { -//#if (RTL8813A_SUPPORT==1) +//#if (RTL8814A_SUPPORT==1) // PHY_SetTxPowerIndex_8813A( pAdapter, PowerIndex, RFPath, Rate ); //#endif } @@ -2410,7 +2410,9 @@ Hal_ChannelPlanToRegulation( IN u16 ChannelPlan ) { - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + DM_ODM_T *odm = &pHalData->odmpriv; + pHalData->Regulation2_4G = TXPWR_LMT_WW; pHalData->Regulation5G = TXPWR_LMT_WW; @@ -2570,6 +2572,9 @@ Hal_ChannelPlanToRegulation( default: break; } + + ODM_CmnInfoInit(odm, ODM_CMNINFO_DOMAIN_CODE_2G, pHalData->Regulation2_4G); + ODM_CmnInfoInit(odm, ODM_CMNINFO_DOMAIN_CODE_5G, pHalData->Regulation5G); } #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE @@ -2605,7 +2610,7 @@ phy_ConfigMACWithParaFile( if (rlen > 0) { rtStatus = _SUCCESS; - pHalData->mac_reg = rtw_zmalloc(rlen); + pHalData->mac_reg = rtw_zvmalloc(rlen); if(pHalData->mac_reg) { _rtw_memcpy(pHalData->mac_reg, pHalData->para_file_buf, rlen); pHalData->mac_reg_len = rlen; @@ -2704,7 +2709,7 @@ phy_ConfigBBWithParaFile( if (rlen > 0) { rtStatus = _SUCCESS; - pBuf = rtw_zmalloc(rlen); + pBuf = rtw_zvmalloc(rlen); if(pBuf) { _rtw_memcpy(pBuf, pHalData->para_file_buf, rlen); *pBufLen = rlen; @@ -3157,7 +3162,7 @@ phy_ConfigBBWithPgParaFile( if (rlen > 0) { rtStatus = _SUCCESS; - pHalData->bb_phy_reg_pg = rtw_zmalloc(rlen); + pHalData->bb_phy_reg_pg = rtw_zvmalloc(rlen); if(pHalData->bb_phy_reg_pg) { _rtw_memcpy(pHalData->bb_phy_reg_pg, pHalData->para_file_buf, rlen); pHalData->bb_phy_reg_pg_len = rlen; @@ -3220,7 +3225,7 @@ phy_ConfigBBWithMpParaFile( if (rlen > 0) { rtStatus = _SUCCESS; - pHalData->bb_phy_reg_mp = rtw_zmalloc(rlen); + pHalData->bb_phy_reg_mp = rtw_zvmalloc(rlen); if(pHalData->bb_phy_reg_mp) { _rtw_memcpy(pHalData->bb_phy_reg_mp, pHalData->para_file_buf, rlen); pHalData->bb_phy_reg_mp_len = rlen; @@ -3356,7 +3361,7 @@ PHY_ConfigRFWithParaFile( if (rlen > 0) { rtStatus = _SUCCESS; - pBuf = rtw_zmalloc(rlen); + pBuf = rtw_zvmalloc(rlen); if(pBuf) { _rtw_memcpy(pBuf, pHalData->para_file_buf, rlen); *pBufLen = rlen; @@ -3634,7 +3639,7 @@ PHY_ConfigRFWithTxPwrTrackParaFile( if (rlen > 0) { rtStatus = _SUCCESS; - pHalData->rf_tx_pwr_track = rtw_zmalloc(rlen); + pHalData->rf_tx_pwr_track = rtw_zvmalloc(rlen); if(pHalData->rf_tx_pwr_track) { _rtw_memcpy(pHalData->rf_tx_pwr_track, pHalData->para_file_buf, rlen); pHalData->rf_tx_pwr_track_len = rlen; @@ -4003,7 +4008,7 @@ PHY_ConfigRFWithPowerLimitTableParaFile( if (rlen > 0) { rtStatus = _SUCCESS; - pHalData->rf_tx_pwr_lmt = rtw_zmalloc(rlen); + pHalData->rf_tx_pwr_lmt = rtw_zvmalloc(rlen); if(pHalData->rf_tx_pwr_lmt) { _rtw_memcpy(pHalData->rf_tx_pwr_lmt, pHalData->para_file_buf, rlen); pHalData->rf_tx_pwr_lmt_len = rlen; @@ -4037,6 +4042,30 @@ PHY_ConfigRFWithPowerLimitTableParaFile( return rtStatus; } -#endif +void phy_free_filebuf(_adapter *padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + if(pHalData->mac_reg) + rtw_vmfree(pHalData->mac_reg, pHalData->mac_reg_len); + if(pHalData->bb_phy_reg) + rtw_vmfree(pHalData->bb_phy_reg, pHalData->bb_phy_reg_len); + if(pHalData->bb_agc_tab) + rtw_vmfree(pHalData->bb_agc_tab, pHalData->bb_agc_tab_len); + if(pHalData->bb_phy_reg_pg) + rtw_vmfree(pHalData->bb_phy_reg_pg, pHalData->bb_phy_reg_pg_len); + if(pHalData->bb_phy_reg_mp) + rtw_vmfree(pHalData->bb_phy_reg_mp, pHalData->bb_phy_reg_mp_len); + if(pHalData->rf_radio_a) + rtw_vmfree(pHalData->rf_radio_a, pHalData->rf_radio_a_len); + if(pHalData->rf_radio_b) + rtw_vmfree(pHalData->rf_radio_b, pHalData->rf_radio_b_len); + if(pHalData->rf_tx_pwr_track) + rtw_vmfree(pHalData->rf_tx_pwr_track, pHalData->rf_tx_pwr_track_len); + if(pHalData->rf_tx_pwr_lmt) + rtw_vmfree(pHalData->rf_tx_pwr_lmt, pHalData->rf_tx_pwr_lmt_len); + +} +#endif diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/hal_hci/hal_usb.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/hal_hci/hal_usb.c old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/hal_intf.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/hal_intf.c old mode 100644 new mode 100755 index f099c05c8e23..9bbacbec539d --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/hal_intf.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/hal_intf.c @@ -49,6 +49,9 @@ void rtw_hal_def_value_init(_adapter *padapter) } void rtw_hal_free_data(_adapter *padapter) { + //free HAL Data + rtw_hal_data_deinit(padapter); + if (is_primary_adapter(padapter)) if(padapter->HalFunc.free_hal_data) padapter->HalFunc.free_hal_data(padapter); @@ -153,26 +156,29 @@ uint rtw_hal_init(_adapter *padapter) rtw_hal_init_opmode(padapter); - for (i = 0; iiface_nums; i++) { - padapter = dvobj->padapters[i]; - padapter->hw_init_completed = _TRUE; - } + for (i = 0; iiface_nums; i++) + dvobj->padapters[i]->hw_init_completed = _TRUE; if (padapter->registrypriv.notch_filter == 1) rtw_hal_notch_filter(padapter, 1); rtw_hal_reset_security_engine(padapter); - rtw_sec_restore_wep_key(padapter); + + for (i = 0; iiface_nums; i++) + rtw_sec_restore_wep_key(dvobj->padapters[i]); rtw_led_control(padapter, LED_CTL_POWER_ON); init_hw_mlme_ext(padapter); + +#ifdef CONFIG_RF_GAIN_OFFSET + rtw_bb_rf_gain_offset(padapter); +#endif //CONFIG_RF_GAIN_OFFSET + } else{ - for (i = 0; iiface_nums; i++) { - padapter = dvobj->padapters[i]; - padapter->hw_init_completed = _FALSE; - } + for (i = 0; iiface_nums; i++) + dvobj->padapters[i]->hw_init_completed = _FALSE; DBG_871X("rtw_hal_init: hal__init fail\n"); } @@ -246,10 +252,10 @@ void rtw_hal_set_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID p if(padapter->HalFunc.SetHalODMVarHandler) padapter->HalFunc.SetHalODMVarHandler(padapter,eVariable,pValue1,bSet); } -void rtw_hal_get_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1,BOOLEAN bSet) +void rtw_hal_get_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1,PVOID pValue2) { if(padapter->HalFunc.GetHalODMVarHandler) - padapter->HalFunc.GetHalODMVarHandler(padapter,eVariable,pValue1,bSet); + padapter->HalFunc.GetHalODMVarHandler(padapter,eVariable,pValue1,pValue2); } void rtw_hal_enable_interrupt(_adapter *padapter) diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/hal_phy.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/hal_phy.c old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/led/hal_usb_led.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/led/hal_usb_led.c old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/Hal8723BPwrSeq.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/Hal8723BPwrSeq.c old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_cmd.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_cmd.c old mode 100644 new mode 100755 index a4af5ed2207f..635a41985c2e --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_cmd.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_cmd.c @@ -1491,7 +1491,6 @@ static void rtl8723b_set_FwRemoteWakeCtrl_Cmd(PADAPTER padapter, u8 benable) DBG_871X("%s(): Enable=%d\n", __func__, benable); - if (!ppwrpriv->wowlan_pno_enable) { SET_H2CCMD_REMOTE_WAKECTRL_ENABLE(u1H2CRemoteWakeCtrlParm, benable); SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_OFFLOAD_EN(u1H2CRemoteWakeCtrlParm, 1); @@ -2141,7 +2140,7 @@ static void rtl8723b_set_FwRsvdPagePkt(PADAPTER padapter, BOOLEAN bDLFinished) #endif //CONFIG_WOWLAN { #ifdef CONFIG_PNO_SUPPORT - if (pwrctl->pno_in_resume == _FALSE) { + if (pwrctl->pno_in_resume == _FALSE && pwrctl->pno_inited == _TRUE) { //Probe Request RsvdPageLoc.LocProbePacket = TotalPageNum; ConstructProbeReq( diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_dm.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_dm.c old mode 100644 new mode 100755 index 8010860a97d2..d209d768702d --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_dm.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_dm.c @@ -323,14 +323,15 @@ static void Update_ODM_ComInfo_8723b(PADAPTER Adapter) | ODM_BB_RSSI_MONITOR | ODM_BB_CCK_PD | ODM_BB_PWR_SAVE + | ODM_BB_CFO_TRACKING | ODM_MAC_EDCA_TURBO | ODM_RF_TX_PWR_TRACK | ODM_RF_CALIBRATION -#ifdef CONFIG_ODM_ADAPTIVITY - | ODM_BB_ADAPTIVITY -#endif ; + if (rtw_odm_adaptivity_needed(Adapter) == _TRUE) + pdmpriv->InitODMFlag |= ODM_BB_ADAPTIVITY; + #ifdef CONFIG_ANTENNA_DIVERSITY if(pHalData->AntDivCfg) pdmpriv->InitODMFlag |= ODM_BB_ANT_DIV; @@ -417,7 +418,9 @@ rtl8723b_InitHalDm( pdmpriv->InitDMFlag = pdmpriv->DMFlag; Update_ODM_ComInfo_8723b(Adapter); - ODM_DMInit(pDM_Odm); + + if (Adapter->registrypriv.mp_mode == 0) + ODM_DMInit(pDM_Odm); } @@ -572,6 +575,7 @@ if (Adapter->registrypriv.mp_mode == 1 && Adapter->mppriv.mp_dm ==0) // for MP p { u8 bLinked=_FALSE; u8 bsta_state=_FALSE; + u8 bBtDisabled = _TRUE; if(rtw_linked_check(Adapter)){ bLinked = _TRUE; @@ -593,6 +597,11 @@ if (Adapter->registrypriv.mp_mode == 1 && Adapter->mppriv.mp_dm ==0) // for MP p //FindMinimumRSSI_8723b(Adapter); //ODM_CmnInfoUpdate(&pHalData->odmpriv ,ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM); +#ifdef CONFIG_BT_COEXIST + bBtDisabled = rtw_btcoex_IsBtDisabled(Adapter); +#endif // CONFIG_BT_COEXIST + ODM_CmnInfoUpdate(&pHalData->odmpriv, ODM_CMNINFO_BT_ENABLED, ((bBtDisabled == _TRUE)?_FALSE:_TRUE)); + ODM_DMWatchdog(&pHalData->odmpriv); } diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_hal_init.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_hal_init.c old mode 100644 new mode 100755 index 3c0c74de10ef..09ff86cadbfd --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_hal_init.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_hal_init.c @@ -456,6 +456,14 @@ int _WriteBTFWtoTxPktBuf8723B( #else TotalPktLen = FwBufLen+pHalData->HWDescHeadLength; #endif + + if((TotalPktLen+TXDESC_OFFSET) > MAX_CMDBUF_SZ) + { + DBG_871X(" WARNING %s => Total packet len = %d > MAX_CMDBUF_SZ:%d \n" + ,__FUNCTION__,(TotalPktLen+TXDESC_OFFSET),MAX_CMDBUF_SZ); + return _FAIL; + } + pGenBufReservedPagePacket = rtw_zmalloc(TotalPktLen);//GetGenTempBuffer (Adapter, TotalPktLen); if (!pGenBufReservedPagePacket) return _FAIL; @@ -557,9 +565,9 @@ int _WriteBTFWtoTxPktBuf8723B( /*--------------------------------------------------------- tx reserved_page_packet ----------------------------------------------------------*/ - if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) { - rtStatus = _FAIL; - goto exit; + if ((pmgntframe = rtw_alloc_cmdxmitframe(pxmitpriv)) == NULL) { + rtStatus = _FAIL; + goto exit; } //update attribute pattrib = &pmgntframe->attrib; @@ -571,10 +579,14 @@ int _WriteBTFWtoTxPktBuf8723B( //_rtw_memset(pmgntframe->buf_addr, 0, TotalPktLen+txdesc_size); //pmgntframe->buf_addr = ReservedPagePacket ; - _rtw_memcpy( (u8*) (pmgntframe->buf_addr + txdesc_offset), ReservedPagePacket, FwBufLen); - DBG_871X("[%d]===>TotalPktLen + TXDESC_OFFSET TotalPacketLen:%d \n", DLBcnCount, (FwBufLen + txdesc_offset)); - - dump_mgntframe(Adapter, pmgntframe); + _rtw_memcpy( (u8*) (pmgntframe->buf_addr + txdesc_offset), ReservedPagePacket, FwBufLen); + DBG_871X("[%d]===>TotalPktLen + TXDESC_OFFSET TotalPacketLen:%d \n", DLBcnCount, (FwBufLen + txdesc_offset)); + +#ifdef CONFIG_PCI_HCI + dump_mgntframe(Adapter, pmgntframe); +#else + dump_mgntframe_and_wait(Adapter, pmgntframe, 100); +#endif #endif #if 1 @@ -698,17 +710,17 @@ _CheckWLANFwPatchBTFwReady( //--------------------------------------------------------- do{ u1bTmp = PlatformEFIORead1Byte(Adapter, REG_HMEBOX_DBG_0_8723B); - if(u1bTmp&BIT(7)) + if((u1bTmp&BIT6) || (u1bTmp&BIT7)) { ret = _SUCCESS; break; } count++; - RT_TRACE(_module_mp_, _drv_info_,("0x81=%x, wait for 50 ms (%d) times.\n", + RT_TRACE(_module_mp_, _drv_info_,("0x88=%x, wait for 50 ms (%d) times.\n", u1bTmp, count)); rtw_msleep_os(50); // 50ms - }while(!(u1bTmp&BIT(7)) && count < 50); + }while(!((u1bTmp&BIT6) || (u1bTmp&BIT7)) && count < 50); RT_TRACE(_module_mp_, _drv_notice_,("_CheckWLANFwPatchBTFwReady():" " Polling ready bit 0x88[7] for %d times.\n", count)); @@ -748,15 +760,9 @@ _CheckWLANFwPatchBTFwReady( #endif // Clear CR[8] or beacon packet will not be send to TxBuf anymore. -#if 0//(DEV_BUS_TYPE == RT_PCI_INTERFACE) - u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR+1); - PlatformEFIOWrite1Byte(Adapter, REG_CR+1, (u1bTmp&(~BIT0))); -#else - // Remove for temparaily because of the code on v2002 is not sync to MERGE_TMEP for USB/SDIO. - // De not remove this part on MERGE_TEMP. by tynli. - //pHalData->RegCR_1 &= (~BIT0); - //PlatformEFIOWrite1Byte(Adapter, REG_CR+1, pHalData->RegCR_1); -#endif + u1bTmp = PlatformEFIORead1Byte(Adapter, REG_CR_8723B+1); + PlatformEFIOWrite1Byte(Adapter, REG_CR_8723B+1, (u1bTmp&(~BIT0))); + return ret; } @@ -764,7 +770,15 @@ int ReservedPage_Compare(PADAPTER Adapter,PRT_MP_FIRMWARE pFirmware,u32 BTPatchS { u8 temp,ret,lastBTsz; u32 u1bTmp=0,address_start=0,count=0,i=0; - u8 myBTFwBuffer[FW_8723B_SIZE]; + u8 *myBTFwBuffer = NULL; + + myBTFwBuffer = rtw_zmalloc(BTPatchSize); + if (myBTFwBuffer == NULL) + { + DBG_871X("%s can't be executed due to the failed malloc.\n", __FUNCTION__); + Adapter->mppriv.bTxBufCkFail=_TRUE; + return _FALSE; + } temp=rtw_read8(Adapter,0x209); @@ -775,7 +789,6 @@ int ReservedPage_Compare(PADAPTER Adapter,PRT_MP_FIRMWARE pFirmware,u32 BTPatchS rtw_write32(Adapter,0x148,0x00000000); rtw_write8(Adapter,0x106,0x69); - for(i=0;i<(BTPatchSize/8);i++) { @@ -794,14 +807,14 @@ int ReservedPage_Compare(PADAPTER Adapter,PRT_MP_FIRMWARE pFirmware,u32 BTPatchS rtw_msleep_os(10); // 10ms }while(!(u1bTmp&BIT(23)) && count < 50); - pFirmware->myBTFwBuffer[i*8+0]=rtw_read8(Adapter, 0x144); - pFirmware->myBTFwBuffer[i*8+1]=rtw_read8(Adapter, 0x145); - pFirmware->myBTFwBuffer[i*8+2]=rtw_read8(Adapter, 0x146); - pFirmware->myBTFwBuffer[i*8+3]=rtw_read8(Adapter, 0x147); - pFirmware->myBTFwBuffer[i*8+4]=rtw_read8(Adapter, 0x148); - pFirmware->myBTFwBuffer[i*8+5]=rtw_read8(Adapter, 0x149); - pFirmware->myBTFwBuffer[i*8+6]=rtw_read8(Adapter, 0x14a); - pFirmware->myBTFwBuffer[i*8+7]=rtw_read8(Adapter, 0x14b); + myBTFwBuffer[i*8+0]=rtw_read8(Adapter, 0x144); + myBTFwBuffer[i*8+1]=rtw_read8(Adapter, 0x145); + myBTFwBuffer[i*8+2]=rtw_read8(Adapter, 0x146); + myBTFwBuffer[i*8+3]=rtw_read8(Adapter, 0x147); + myBTFwBuffer[i*8+4]=rtw_read8(Adapter, 0x148); + myBTFwBuffer[i*8+5]=rtw_read8(Adapter, 0x149); + myBTFwBuffer[i*8+6]=rtw_read8(Adapter, 0x14a); + myBTFwBuffer[i*8+7]=rtw_read8(Adapter, 0x14b); } rtw_write32(Adapter,0x140,address_start+5+BTPatchSize/8) ; @@ -825,20 +838,25 @@ int ReservedPage_Compare(PADAPTER Adapter,PRT_MP_FIRMWARE pFirmware,u32 BTPatchS for(i=0;imyBTFwBuffer[(BTPatchSize/8)*8+i] = rtw_read8(Adapter, (0x144+i)); + myBTFwBuffer[(BTPatchSize/8)*8+i] = rtw_read8(Adapter, (0x144+i)); } for(i=0;imyBTFwBuffer[i]!= pFirmware->szBTFwBuffer[i]) + if(myBTFwBuffer[i]!= pFirmware->szFwBuffer[i]) { - DBG_871X(" In direct pFirmware->myBTFwBuffer[%d]=%x , pFirmware->szBTFwBuffer=%x\n",i, pFirmware->myBTFwBuffer[i],pFirmware->szBTFwBuffer[i]); + DBG_871X(" In direct myBTFwBuffer[%d]=%x , pFirmware->szFwBuffer=%x\n",i, myBTFwBuffer[i],pFirmware->szFwBuffer[i]); Adapter->mppriv.bTxBufCkFail=_TRUE; break; } } + if (myBTFwBuffer != NULL) + { + rtw_mfree(myBTFwBuffer, BTPatchSize); + } + return _TRUE; } @@ -891,11 +909,11 @@ s32 FirmwareDownloadBT(PADAPTER padapter, PRT_MP_FIRMWARE pFirmware) pBTFirmwareBuf = (u8*)Rtl8723BFwBTImgArray; BTFirmwareLen = Rtl8723BFwBTImgArrayLength; - pFirmware->szBTFwBuffer = pBTFirmwareBuf; - pFirmware->ulBTFwLength = BTFirmwareLen; #endif // CONFIG_EMBEDDED_FWIMG } + pFirmware->szFwBuffer = pBTFirmwareBuf; + pFirmware->ulFwLength = BTFirmwareLen; DBG_8192C("%s: MP BT Firmware size=%d\n", __FUNCTION__, BTFirmwareLen); // for h2c cam here should be set to true @@ -974,9 +992,8 @@ s32 rtl8723b_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw) RT_TRACE(_module_hal_init_c_, _drv_notice_, ("+%s, bUsedWoWLANFw:%d\n", __FUNCTION__,bUsedWoWLANFw)); #endif pFirmware = (PRT_FIRMWARE_8723B)rtw_zmalloc(sizeof(RT_FIRMWARE_8723B)); - pBTFirmware = (PRT_FIRMWARE_8723B)rtw_zmalloc(sizeof(RT_FIRMWARE_8723B)); - if(!pFirmware||!pBTFirmware) + if(!pFirmware) { rtStatus = _FAIL; goto exit; @@ -1143,6 +1160,12 @@ s32 rtl8723b_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw) { //rtw_write8(padapter, 0x81, rtw_read8(padapter, 0x81)|BIT0); DBG_871X("rtl8723b_FirmwareDownload go to FirmwareDownloadBT !\n"); + pBTFirmware = (PRT_FIRMWARE_8723B)rtw_zmalloc(sizeof(RT_FIRMWARE_8723B)); + if(!pBTFirmware) + { + rtStatus = _FAIL; + goto exit; + } FirmwareDownloadBT(padapter, (PRT_MP_FIRMWARE)pBTFirmware); } #endif @@ -1220,10 +1243,7 @@ SetFwRelatedForWoWLAN8723b( static void rtl8723b_free_hal_data(PADAPTER padapter) { _func_enter_; - if (padapter->HalData) { - rtw_vmfree(padapter->HalData, sizeof(HAL_DATA_TYPE)); - padapter->HalData = NULL; - } + _func_exit_; } @@ -3059,14 +3079,13 @@ void rtl8723b_GetHalODMVar( PADAPTER Adapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1, - BOOLEAN bSet) + PVOID pValue2) { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PDM_ODM_T podmpriv = &pHalData->odmpriv; switch(eVariable){ - case HAL_ODM_STA_INFO: - break; default: + GetHalODMVar(Adapter,eVariable,pValue1,pValue2); break; } } @@ -3079,35 +3098,9 @@ void rtl8723b_SetHalODMVar( { HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PDM_ODM_T podmpriv = &pHalData->odmpriv; - switch(eVariable){ - case HAL_ODM_STA_INFO: - { - struct sta_info *psta = (struct sta_info *)pValue1; - #ifdef CONFIG_CONCURRENT_MODE - //get Primary adapter's odmpriv - if(Adapter->adapter_type > PRIMARY_ADAPTER && Adapter->pbuddy_adapter){ - pHalData = GET_HAL_DATA(Adapter->pbuddy_adapter); - podmpriv = &pHalData->odmpriv; - } - #endif - - if(bSet){ - DBG_8192C("Set STA_(%d) info\n",psta->mac_id); - ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS,psta->mac_id,psta); - } - else{ - DBG_8192C("Clean STA_(%d) info\n",psta->mac_id); - ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS,psta->mac_id,NULL); - } - } - break; - case HAL_ODM_P2P_STATE: - ODM_CmnInfoUpdate(podmpriv,ODM_CMNINFO_WIFI_DIRECT,bSet); - break; - case HAL_ODM_WIFI_DISPLAY_STATE: - ODM_CmnInfoUpdate(podmpriv,ODM_CMNINFO_WIFI_DISPLAY,bSet); - break; + switch(eVariable){ default: + SetHalODMVar(Adapter,eVariable,pValue1,bSet); break; } } @@ -3969,7 +3962,7 @@ Hal_EEValueCheck( u8 *pIn, *pOut; pIn = (u8*)pInValue; pOut = (u8*)pOutValue; - if(*pIn >= 0 && *pIn <= 63) + if(*pIn <= 63) { *pOut = *pIn; } @@ -4135,6 +4128,10 @@ Hal_ReadPowerValueFromPROM_8723B( eeAddr++; } } + + /* Ignore the unnecessary 5G parameters parsing, but still consider the efuse address offset */ + #define TX_PWR_DIFF_OFFSET_5G 10 + eeAddr += (MAX_CHNL_GROUP_5G + TX_PWR_DIFF_OFFSET_5G); } } @@ -4217,7 +4214,6 @@ Hal_EfuseParseBTCoexistInfo_8723B( u8 tempval; u32 tmpu4; - // RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("%s(): AutoLoadFail = %d\n", __func__, AutoLoadFail)); if (!AutoLoadFail) { @@ -4230,13 +4226,36 @@ Hal_EfuseParseBTCoexistInfo_8723B( pHalData->EEPROMBluetoothType = BT_RTL8723B; tempval = hwinfo[EEPROM_RF_BT_SETTING_8723B]; - pHalData->EEPROMBluetoothAntNum = tempval & BIT(0); + if(tempval !=0xFF){ + pHalData->EEPROMBluetoothAntNum = tempval & BIT(0); + #ifdef CONFIG_USB_HCI + //if(padapter->interface_type == RTW_USB) + pHalData->ant_path =ODM_RF_PATH_B;//s0 + #else //SDIO or PCIE + // EFUSE_0xC3[6] == 0, S1(Main)-ODM_RF_PATH_A; + // EFUSE_0xC3[6] == 1, S0(Aux)-ODM_RF_PATH_B + pHalData->ant_path = (tempval & BIT(6))?ODM_RF_PATH_B:ODM_RF_PATH_A; + #endif + } + else{ + pHalData->EEPROMBluetoothAntNum = Ant_x1; + #ifdef CONFIG_USB_HCI + pHalData->ant_path = ODM_RF_PATH_B;//s0 + #else + pHalData->ant_path = ODM_RF_PATH_A; + #endif + } } else { pHalData->EEPROMBluetoothCoexist = _FALSE; pHalData->EEPROMBluetoothType = BT_RTL8723B; - pHalData->EEPROMBluetoothAntNum = Ant_x2; + pHalData->EEPROMBluetoothAntNum = Ant_x1; + #ifdef CONFIG_USB_HCI + pHalData->ant_path = ODM_RF_PATH_B;//s0 + #else + pHalData->ant_path = ODM_RF_PATH_A; + #endif } #ifdef CONFIG_BT_COEXIST @@ -4262,11 +4281,11 @@ Hal_EfuseParseBTCoexistInfo_8723B( rtw_btcoex_SetBTCoexist(padapter, pHalData->EEPROMBluetoothCoexist); rtw_btcoex_SetChipType(padapter, pHalData->EEPROMBluetoothType); -#if defined(CONFIG_USB_HCI) - rtw_btcoex_SetPGAntNum(padapter, pHalData->EEPROMBluetoothAntNum==Ant_x2?2:1, _TRUE); /* Set antInverse for 8723BU */ -#else - rtw_btcoex_SetPGAntNum(padapter, pHalData->EEPROMBluetoothAntNum==Ant_x2?2:1, _FALSE); -#endif + rtw_btcoex_SetPGAntNum(padapter, pHalData->EEPROMBluetoothAntNum==Ant_x2?2:1); + if (pHalData->EEPROMBluetoothAntNum == Ant_x1) + { + rtw_btcoex_SetSingleAntPath(padapter, pHalData->ant_path); + } #endif // CONFIG_BT_COEXIST DBG_8192C("%s: %s BT-coex, ant_num=%d\n", @@ -4367,8 +4386,6 @@ Hal_EfuseParseChnlPlan_8723B( , AutoLoadFail ); - Hal_ChannelPlanToRegulation(padapter, padapter->mlmepriv.ChannelPlan); - RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("EEPROM ChannelPlan=0x%02x\n", padapter->mlmepriv.ChannelPlan)); } @@ -4400,9 +4417,39 @@ Hal_EfuseParseAntennaDiversity_8723B( IN BOOLEAN AutoLoadFail ) { -#if 0 - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - +#ifdef CONFIG_ANTENNA_DIVERSITY + HAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); + struct registry_priv *registry_par = &pAdapter->registrypriv; + + if (pHalData->EEPROMBluetoothAntNum == Ant_x1){ + pHalData->AntDivCfg = 0; + } + else{ + if(registry_par->antdiv_cfg == 2)// 0:OFF , 1:ON, 2:By EFUSE + pHalData->AntDivCfg = 0; + else + pHalData->AntDivCfg = registry_par->antdiv_cfg; + } + + //if (REGISTRY(pAdapter,bEfusePriorityAuto) == TRUE) + if(registry_par->antdiv_type == 0)// If TRxAntDivType is AUTO in advanced setting, use EFUSE value instead. + { + pHalData->TRxAntDivType = hwinfo[EEPROM_RFE_OPTION_8723B]; + if (pHalData->TRxAntDivType == 0xFF) + pHalData->TRxAntDivType = S0S1_SW_ANTDIV;//GetRegAntDivType(pAdapter); + else if (pHalData->TRxAntDivType == 0x10) + pHalData->TRxAntDivType = S0S1_SW_ANTDIV; //intrnal switch S0S1 + else if (pHalData->TRxAntDivType == 0x11) + pHalData->TRxAntDivType = S0S1_SW_ANTDIV; //intrnal switch S0S1 + //pHalData->TRxAntDivType = CG_TRX_HW_ANTDIV; //DPDT + + } + else{ + pHalData->TRxAntDivType = registry_par->antdiv_type ;//GetRegAntDivType(pAdapter); + } + + +/* if(!AutoLoadFail) { // Antenna Diversity setting. @@ -4417,9 +4464,10 @@ Hal_EfuseParseAntennaDiversity_8723B( pHalData->AntDivCfg = 0; pHalData->ReverseDPDT = 1; } - + RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("EEPROM SWAS: bHwAntDiv = %x, TRxAntDivType = %x\n", pHalData->AntDivCfg, pHalData->TRxAntDivType)); +*/ #endif } @@ -4661,52 +4709,47 @@ static u8 fill_txdesc_sectype(struct pkt_attrib *pattrib) return sectype; } -static void fill_txdesc_vcs_8723b(PADAPTER padapter, struct pkt_attrib *pattrib, PTXDESC_8723B ptxdesc) +static void fill_txdesc_vcs_8723b(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc) { //DBG_8192C("cvs_mode=%d\n", pattrib->vcs_mode); - if (pattrib->vcs_mode) - { - switch (pattrib->vcs_mode) - { - case RTS_CTS: - ptxdesc->rtsen = 1; - // ENABLE HW RTS - ptxdesc->hw_rts_en = 1; - break; - - case CTS_TO_SELF: - ptxdesc->cts2self = 1; - break; - - case NONE_VCS: - default: - break; + if (pattrib->vcs_mode) { + switch (pattrib->vcs_mode) { + case RTS_CTS: + SET_TX_DESC_RTS_ENABLE_8723B(ptxdesc, 1); + SET_TX_DESC_HW_RTS_ENABLE_8723B(ptxdesc, 1); + break; + + case CTS_TO_SELF: + SET_TX_DESC_CTS2SELF_8723B(ptxdesc, 1); + break; + + case NONE_VCS: + default: + break; } - ptxdesc->rtsrate = 8; // RTS Rate=24M - ptxdesc->rts_ratefb_lmt = 0xF; + SET_TX_DESC_RTS_RATE_8723B(ptxdesc, 8); // RTS Rate=24M + SET_TX_DESC_RTS_RATE_FB_LIMIT_8723B(ptxdesc, 0xF); - if (padapter->mlmeextpriv.mlmext_info.preamble_mode == PREAMBLE_SHORT) - ptxdesc->rts_short = 1; + if (padapter->mlmeextpriv.mlmext_info.preamble_mode == PREAMBLE_SHORT) { + SET_TX_DESC_RTS_SHORT_8723B(ptxdesc, 1); + } // Set RTS BW - if (pattrib->ht_en) - { - ptxdesc->rts_sc = SCMapping_8723B(padapter, pattrib); + if (pattrib->ht_en) { + SET_TX_DESC_RTS_SC_8723B(ptxdesc, SCMapping_8723B(padapter, pattrib)); } } } -static void fill_txdesc_phy_8723b(PADAPTER padapter, struct pkt_attrib *pattrib, PTXDESC_8723B ptxdesc) +static void fill_txdesc_phy_8723b(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc) { //DBG_8192C("bwmode=%d, ch_off=%d\n", pattrib->bwmode, pattrib->ch_offset); - if (pattrib->ht_en) - { - ptxdesc->data_bw = BWMapping_8723B(padapter, pattrib); - - ptxdesc->data_sc = SCMapping_8723B(padapter, pattrib); + if (pattrib->ht_en) { + SET_TX_DESC_DATA_BW_8723B(ptxdesc, BWMapping_8723B(padapter, pattrib)); + SET_TX_DESC_DATA_SC_8723B(ptxdesc, SCMapping_8723B(padapter, pattrib)); } } @@ -4720,7 +4763,6 @@ static void rtl8723b_fill_default_txdesc( struct mlme_ext_priv *pmlmeext; struct mlme_ext_info *pmlmeinfo; struct pkt_attrib *pattrib; - PTXDESC_8723B ptxdesc; s32 bmcst; _rtw_memset(pbuf, 0, TXDESC_SIZE); @@ -4734,19 +4776,17 @@ static void rtl8723b_fill_default_txdesc( pattrib = &pxmitframe->attrib; bmcst = IS_MCAST(pattrib->ra); - ptxdesc = (PTXDESC_8723B)pbuf; - if (pxmitframe->frame_tag == DATA_FRAMETAG) { u8 drv_userate = 0; - - ptxdesc->macid = pattrib->mac_id; // CAM_ID(MAC_ID) - ptxdesc->rate_id = pattrib->raid; - ptxdesc->qsel = pattrib->qsel; - ptxdesc->seq = pattrib->seqnum; - ptxdesc->sectype = fill_txdesc_sectype(pattrib); - fill_txdesc_vcs_8723b(padapter, pattrib, ptxdesc); + SET_TX_DESC_MACID_8723B(pbuf, pattrib->mac_id); + SET_TX_DESC_RATE_ID_8723B(pbuf, pattrib->raid); + SET_TX_DESC_QUEUE_SEL_8723B(pbuf, pattrib->qsel); + SET_TX_DESC_SEQ_8723B(pbuf, pattrib->seqnum); + + SET_TX_DESC_SEC_TYPE_8723B(pbuf, fill_txdesc_sectype(pattrib)); + fill_txdesc_vcs_8723b(padapter, pattrib, pbuf); if(pattrib->icmp_pkt ==1 && padapter->registrypriv.wifi_spec==1) drv_userate = 1; @@ -4763,45 +4803,48 @@ static void rtl8723b_fill_default_txdesc( { // Non EAP & ARP & DHCP type data packet - if (pattrib->ampdu_en == _TRUE) - { - ptxdesc->agg_en = 1; // AGG EN - ptxdesc->max_agg_num = 0x1f; - ptxdesc->ampdu_density = pHalData->AMPDUDensity; + if (pattrib->ampdu_en == _TRUE) { + SET_TX_DESC_AGG_ENABLE_8723B(pbuf, 1); + SET_TX_DESC_MAX_AGG_NUM_8723B(pbuf, 0x1F); + SET_TX_DESC_AMPDU_DENSITY_8723B(pbuf, pattrib->ampdu_spacing); + } else { + SET_TX_DESC_AGG_BREAK_8723B(pbuf, 1); } - else - ptxdesc->bk = 1; // AGG BK - fill_txdesc_phy_8723b(padapter, pattrib, ptxdesc); + fill_txdesc_phy_8723b(padapter, pattrib, pbuf); - ptxdesc->data_ratefb_lmt = 0x1F; + SET_TX_DESC_DATA_RATE_FB_LIMIT_8723B(pbuf, 0x1F); - if (pHalData->fw_ractrl == _FALSE) - { - ptxdesc->userate = 1; + if (pHalData->fw_ractrl == _FALSE) { + SET_TX_DESC_USE_RATE_8723B(pbuf, 1); - if (pHalData->dmpriv.INIDATA_RATE[pattrib->mac_id] & BIT(7)) - ptxdesc->data_short = 1; + if (pHalData->dmpriv.INIDATA_RATE[pattrib->mac_id] & BIT(7)) { + SET_TX_DESC_DATA_SHORT_8723B(pbuf, 1); + } - ptxdesc->datarate = pHalData->dmpriv.INIDATA_RATE[pattrib->mac_id] & 0x7F; + SET_TX_DESC_TX_RATE_8723B(pbuf, pHalData->dmpriv.INIDATA_RATE[pattrib->mac_id] & 0x7F); } - if (padapter->fix_rate != 0xFF) { // modify data rate by iwpriv - ptxdesc->userate = 1; - if(padapter->fix_rate & BIT(7)) - ptxdesc->data_short = 1; + // modify data rate by iwpriv + if (padapter->fix_rate != 0xFF) { + SET_TX_DESC_USE_RATE_8723B(pbuf, 1); + if (padapter->fix_rate & BIT(7)) { + SET_TX_DESC_DATA_SHORT_8723B(pbuf, 1); + } + SET_TX_DESC_TX_RATE_8723B(pbuf, padapter->fix_rate & 0x7F); + SET_TX_DESC_DISABLE_FB_8723B(pbuf, 1); + } - ptxdesc->datarate = (padapter->fix_rate & 0x7F); - ptxdesc->disdatafb = 1; + if (pattrib->ldpc) { + SET_TX_DESC_DATA_LDPC_8723B(pbuf, 1); } - if (pattrib->ldpc) - ptxdesc->data_ldpc = 1; - if (pattrib->stbc) - ptxdesc->data_stbc = 1; + if (pattrib->stbc) { + SET_TX_DESC_DATA_STBC_8723B(pbuf, 1); + } #ifdef CONFIG_CMCC_TEST - ptxdesc->data_short = 1; /* use cck short premble */ + SET_TX_DESC_DATA_SHORT_8723B(pbuf, 1); /* use cck short premble */ #endif } else @@ -4810,46 +4853,49 @@ static void rtl8723b_fill_default_txdesc( // Use the 1M data rate to send the EAP/ARP packet. // This will maybe make the handshake smooth. - ptxdesc->bk = 1; // AGG BK - ptxdesc->userate = 1; // driver uses rate - if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT) - ptxdesc->data_short = 1;// DATA_SHORT - ptxdesc->datarate = MRateToHwRate(pmlmeext->tx_rate); - DBG_871X("YJ: %s(): ARP Data: userate=%d, datarate=0x%x\n", __func__, ptxdesc->userate, ptxdesc->datarate); + SET_TX_DESC_AGG_BREAK_8723B(pbuf, 1); + SET_TX_DESC_USE_RATE_8723B(pbuf, 1); + if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT) { + SET_TX_DESC_DATA_SHORT_8723B(pbuf, 1); + } + SET_TX_DESC_TX_RATE_8723B(pbuf, MRateToHwRate(pmlmeext->tx_rate)); + + DBG_8192C(FUNC_ADPT_FMT ": SP Packet(0x%04X) rate=0x%x\n", + FUNC_ADPT_ARG(padapter), pattrib->ether_type, MRateToHwRate(pmlmeext->tx_rate)); } #if defined(CONFIG_USB_TX_AGGREGATION) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) - ptxdesc->usb_txagg_num = pxmitframe->agg_num; + SET_TX_DESC_USB_TXAGG_NUM_8723B(pbuf, pxmitframe->agg_num); #endif } else if (pxmitframe->frame_tag == MGNT_FRAMETAG) { // RT_TRACE(_module_hal_xmit_c_, _drv_notice_, ("%s: MGNT_FRAMETAG\n", __FUNCTION__)); - ptxdesc->macid = pattrib->mac_id; // CAM_ID(MAC_ID) - ptxdesc->qsel = pattrib->qsel; - ptxdesc->rate_id = pattrib->raid; // Rate ID - ptxdesc->seq = pattrib->seqnum; - ptxdesc->userate = 1; // driver uses rate, 1M + SET_TX_DESC_MACID_8723B(pbuf, pattrib->mac_id); + SET_TX_DESC_QUEUE_SEL_8723B(pbuf, pattrib->qsel); + SET_TX_DESC_RATE_ID_8723B(pbuf, pattrib->raid); + SET_TX_DESC_SEQ_8723B(pbuf, pattrib->seqnum); + SET_TX_DESC_USE_RATE_8723B(pbuf, 1); - ptxdesc->mbssid = pattrib->mbssid & 0xF; + SET_TX_DESC_MBSSID_8723B(pbuf, pattrib->mbssid & 0xF); - ptxdesc->rty_lmt_en = 1; // retry limit enable + SET_TX_DESC_RETRY_LIMIT_ENABLE_8723B(pbuf, 1); if (pattrib->retry_ctrl == _TRUE) { - ptxdesc->data_rt_lmt = 6; + SET_TX_DESC_DATA_RETRY_LIMIT_8723B(pbuf, 6); } else { - ptxdesc->data_rt_lmt = 12; + SET_TX_DESC_DATA_RETRY_LIMIT_8723B(pbuf, 12); } #ifdef CONFIG_INTEL_PROXIM if((padapter->proximity.proxim_on==_TRUE)&&(pattrib->intel_proxim==_TRUE)){ DBG_871X("\n %s pattrib->rate=%d\n",__FUNCTION__,pattrib->rate); - ptxdesc->datarate = pattrib->rate; + SET_TX_DESC_TX_RATE_8723B(pbuf, pattrib->rate); } else #endif { - ptxdesc->datarate = MRateToHwRate(pmlmeext->tx_rate); + SET_TX_DESC_TX_RATE_8723B(pbuf, MRateToHwRate(pmlmeext->tx_rate)); } #ifdef CONFIG_XMIT_ACK @@ -4858,8 +4904,8 @@ static void rtl8723b_fill_default_txdesc( #ifdef DBG_CCX DBG_8192C("%s set spe_rpt\n", __FUNCTION__); #endif - ptxdesc->spe_rpt = 1; - ptxdesc->sw_define = (u8)(GET_PRIMARY_ADAPTER(padapter)->xmitpriv.seq_no); + SET_TX_DESC_SPE_RPT_8723B(pbuf, 1); + SET_TX_DESC_SW_DEFINE_8723B(pbuf, (u8)(GET_PRIMARY_ADAPTER(padapter)->xmitpriv.seq_no)); } #endif // CONFIG_XMIT_ACK } @@ -4870,61 +4916,51 @@ static void rtl8723b_fill_default_txdesc( #ifdef CONFIG_MP_INCLUDED else if (pxmitframe->frame_tag == MP_FRAMETAG) { - struct tx_desc *pdesc; - - pdesc = (struct tx_desc*)ptxdesc; RT_TRACE(_module_hal_xmit_c_, _drv_notice_, ("%s: MP_FRAMETAG\n", __FUNCTION__)); - fill_txdesc_for_mp(padapter, (u8 *)pdesc); - - pdesc->txdw0 = le32_to_cpu(pdesc->txdw0); - pdesc->txdw1 = le32_to_cpu(pdesc->txdw1); - pdesc->txdw2 = le32_to_cpu(pdesc->txdw2); - pdesc->txdw3 = le32_to_cpu(pdesc->txdw3); - pdesc->txdw4 = le32_to_cpu(pdesc->txdw4); - pdesc->txdw5 = le32_to_cpu(pdesc->txdw5); - pdesc->txdw6 = le32_to_cpu(pdesc->txdw6); - pdesc->txdw7 = le32_to_cpu(pdesc->txdw7); - pdesc->txdw8 = le32_to_cpu(pdesc->txdw8); - pdesc->txdw9 = le32_to_cpu(pdesc->txdw9); -#ifdef CONFIG_PCI_HCI - pdesc->txdw10 = le32_to_cpu(pdesc->txdw10); - pdesc->txdw11 = le32_to_cpu(pdesc->txdw11); - pdesc->txdw12 = le32_to_cpu(pdesc->txdw12); - pdesc->txdw13 = le32_to_cpu(pdesc->txdw13); - pdesc->txdw14 = le32_to_cpu(pdesc->txdw14); - pdesc->txdw15 = le32_to_cpu(pdesc->txdw15); -#endif + fill_txdesc_for_mp(padapter, pbuf); } #endif else { RT_TRACE(_module_hal_xmit_c_, _drv_warning_, ("%s: frame_tag=0x%x\n", __FUNCTION__, pxmitframe->frame_tag)); - ptxdesc->macid = pattrib->mac_id; // CAM_ID(MAC_ID) - ptxdesc->rate_id = pattrib->raid; // Rate ID - ptxdesc->qsel = pattrib->qsel; - ptxdesc->seq = pattrib->seqnum; - ptxdesc->userate = 1; // driver uses rate - ptxdesc->datarate = MRateToHwRate(pmlmeext->tx_rate); + SET_TX_DESC_MACID_8723B(pbuf, pattrib->mac_id); + SET_TX_DESC_RATE_ID_8723B(pbuf, pattrib->raid); + SET_TX_DESC_QUEUE_SEL_8723B(pbuf, pattrib->qsel); + SET_TX_DESC_SEQ_8723B(pbuf, pattrib->seqnum); + SET_TX_DESC_USE_RATE_8723B(pbuf, 1); + SET_TX_DESC_TX_RATE_8723B(pbuf, MRateToHwRate(pmlmeext->tx_rate)); } - ptxdesc->pktlen = pattrib->last_txcmdsz; + SET_TX_DESC_PKT_SIZE_8723B(pbuf, pattrib->last_txcmdsz); + + { + u8 pkt_offset, offset; + + pkt_offset = 0; + offset = TXDESC_SIZE; #ifdef CONFIG_USB_HCI - ptxdesc->pkt_offset=pxmitframe->pkt_offset ; - ptxdesc->offset = TXDESC_SIZE + (ptxdesc->pkt_offset >>3); -#else //CONFIG_SDIO_HCI and CONFIG_GSPI_HCI - ptxdesc->offset = TXDESC_SIZE + OFFSET_SZ; -#endif //CONFIG_USB_HCI + pkt_offset = pxmitframe->pkt_offset; + offset += (pxmitframe->pkt_offset >> 3); + SET_TX_DESC_OFFSET_8723B(pbuf, TXDESC_SIZE + (pxmitframe->pkt_offset >> 3)); +#else // CONFIG_SDIO_HCI & CONFIG_GSPI_HCI + offset += OFFSET_SZ; +#endif // !CONFIG_USB_HCI #ifdef CONFIG_TX_EARLY_MODE - if (pxmitframe->frame_tag == DATA_FRAMETAG) - { - ptxdesc->offset += EARLY_MODE_INFO_SIZE; - ptxdesc->pkt_offset = 0x01; - } + if (pxmitframe->frame_tag == DATA_FRAMETAG) { + pkt_offset = 1; + offset += EARLY_MODE_INFO_SIZE; + } #endif // CONFIG_TX_EARLY_MODE - if (bmcst) ptxdesc->bmc = 1; + SET_TX_DESC_PKT_OFFSET_8723B(pbuf, pkt_offset); + SET_TX_DESC_OFFSET_8723B(pbuf, offset); + } + + if (bmcst) { + SET_TX_DESC_BMC_8723B(pbuf, 1); + } // 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS. // (1) The sequence number of each non-Qos frame / broadcast / multicast / @@ -4934,10 +4970,8 @@ static void rtl8723b_fill_default_txdesc( // (2) Enable HW SEQ control for beacon packet, because we use Hw beacon. // (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets. // 2010.06.23. Added by tynli. - if (!pattrib->qos_en) - { - // Hw set sequence number - ptxdesc->en_hwseq = 1; // HWSEQ_EN + if (!pattrib->qos_en) { + SET_TX_DESC_HWSEQ_EN_8723B(pbuf, 1); } } @@ -4950,35 +4984,10 @@ static void rtl8723b_fill_default_txdesc( */ void rtl8723b_update_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf) { - PADAPTER padapter = pxmitframe->padapter; - struct tx_desc *pdesc; - rtl8723b_fill_default_txdesc(pxmitframe, pbuf); - pdesc = (struct tx_desc*)pbuf; - pdesc->txdw0 = cpu_to_le32(pdesc->txdw0); - pdesc->txdw1 = cpu_to_le32(pdesc->txdw1); - pdesc->txdw2 = cpu_to_le32(pdesc->txdw2); - pdesc->txdw3 = cpu_to_le32(pdesc->txdw3); - pdesc->txdw4 = cpu_to_le32(pdesc->txdw4); - pdesc->txdw5 = cpu_to_le32(pdesc->txdw5); - pdesc->txdw6 = cpu_to_le32(pdesc->txdw6); - pdesc->txdw7 = cpu_to_le32(pdesc->txdw7); - pdesc->txdw8 = cpu_to_le32(pdesc->txdw8); - pdesc->txdw9 = cpu_to_le32(pdesc->txdw9); -#ifdef CONFIG_PCI_HCI - pdesc->txdw8 = cpu_to_le32(pdesc->txdw8); - pdesc->txdw9 = cpu_to_le32(pdesc->txdw9); - pdesc->txdw10 = cpu_to_le32(pdesc->txdw10); - pdesc->txdw11 = cpu_to_le32(pdesc->txdw11); - pdesc->txdw12 = cpu_to_le32(pdesc->txdw12); - pdesc->txdw13 = cpu_to_le32(pdesc->txdw13); - pdesc->txdw14 = cpu_to_le32(pdesc->txdw14); - pdesc->txdw15 = cpu_to_le32(pdesc->txdw15); -#endif - #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) - rtl8723b_cal_txdesc_chksum(pdesc); + rtl8723b_cal_txdesc_chksum((struct tx_desc*)pbuf); #endif } @@ -5359,7 +5368,7 @@ static void hw_var_set_macaddr(PADAPTER padapter, u8 variable, u8 *val) for (idx = 0 ; idx < 6; idx++) { - rtw_write8(padapter, (reg_macid+idx), val[idx]); + rtw_write8(GET_PRIMARY_ADAPTER(padapter), (reg_macid+idx), val[idx]); } } @@ -5868,6 +5877,28 @@ void CCX_FwC2HTxRpt_8723b(PADAPTER padapter, u8 *pdata, u8 len) #endif } +#ifdef CONFIG_FW_C2H_DEBUG +void Debug_FwC2H_8723b(PADAPTER padapter, u8 *pdata, u8 len) +{ + u8 data_len = *(pdata + 1); + u8 seq_no = *(pdata + 2); + int i = 0; + int cnt = 0; + u8 buf[128]={0}; + + //DBG_871X("%s: SubID: %02x, data_len: %02x, Content: %02x\n", + // __func__, *pdata, *(pdata+1), *(pdata+2)); + + for (i = 0 ; i < data_len ; i++) + cnt += sprintf((buf+cnt), "%c", pdata[3 + i]); + + if (seq_no == 0) + DBG_871X("[RTKFW, SEQ=%d]: %s\n", seq_no, buf); + else + DBG_871X("[RTKFW, SEQ=%d]: %s", seq_no, buf); +} +#endif //CONFIG_FW_C2H_DEBUG + s32 c2h_id_filter_ccx_8723b(u8 *buf) { struct c2h_evt_hdr_88xx *c2h_evt = (struct c2h_evt_hdr_88xx *)buf; @@ -6217,42 +6248,41 @@ _func_enter_; break; case HW_VAR_BASIC_RATE: - { - u16 BrateCfg = 0; - u8 RateIndex = 0; - - // 2007.01.16, by Emily - // Select RRSR (in Legacy-OFDM and CCK) - // For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate. - // We do not use other rates. - HalSetBrateCfg(padapter, val, &BrateCfg); - - //2011.03.30 add by Luke Lee - //CCK 2M ACK should be disabled for some BCM and Atheros AP IOT - //because CCK 2M has poor TXEVM - //CCK 5.5M & 11M ACK should be enabled for better performance - - pHalData->BasicRateSet = BrateCfg = (BrateCfg |0xd) & 0x15d; - BrateCfg |= 0x01; // default enable 1M ACK rate -#ifdef CONFIG_CMCC_TEST - BrateCfg |= 0x0D; /* use 11M to send ACK */ - BrateCfg |= BIT(6) | BIT(7) | BIT(8); //CMCC_OFDM_ACK 12/18/24M -#endif - DBG_8192C("HW_VAR_BASIC_RATE: BrateCfg(%#x)\n", BrateCfg); - - // Set RRSR rate table. - rtw_write8(padapter, REG_RRSR, BrateCfg&0xff); - rtw_write8(padapter, REG_RRSR+1, (BrateCfg>>8)&0xff); + { + struct mlme_ext_info *mlmext_info = &padapter->mlmeextpriv.mlmext_info; + u16 input_b = 0, masked = 0, ioted = 0, BrateCfg = 0; + u16 rrsr_2g_force_mask = (RRSR_11M|RRSR_5_5M|RRSR_1M); + u16 rrsr_2g_allow_mask = (RRSR_24M|RRSR_12M|RRSR_6M|RRSR_CCK_RATES); + + HalSetBrateCfg(padapter, val, &BrateCfg); + input_b = BrateCfg; + + /* apply force and allow mask */ + BrateCfg |= rrsr_2g_force_mask; + BrateCfg &= rrsr_2g_allow_mask; + masked = BrateCfg; + + #ifdef CONFIG_CMCC_TEST + BrateCfg |= (RRSR_11M|RRSR_5_5M|RRSR_1M); /* use 11M to send ACK */ + BrateCfg |= (RRSR_24M|RRSR_18M|RRSR_12M); //CMCC_OFDM_ACK 12/18/24M + #endif - // Set RTS initial rate - while (BrateCfg > 0x1) - { - BrateCfg = (BrateCfg >> 1); - RateIndex++; - } - // Ziv - Check - rtw_write8(padapter, REG_INIRTS_RATE_SEL, RateIndex); + /* IOT consideration */ + if (mlmext_info->assoc_AP_vendor == HT_IOT_PEER_CISCO) { + /* if peer is cisco and didn't use ofdm rate, we enable 6M ack */ + if((BrateCfg & (RRSR_24M|RRSR_12M|RRSR_6M)) == 0) + BrateCfg |= RRSR_6M; } + ioted = BrateCfg; + + pHalData->BasicRateSet = BrateCfg; + + DBG_8192C("HW_VAR_BASIC_RATE: %#x -> %#x -> %#x\n", input_b, masked, ioted); + + // Set RRSR rate table. + rtw_write16(padapter, REG_RRSR, BrateCfg); + rtw_write8(padapter, REG_RRSR+2, rtw_read8(padapter, REG_RRSR+2)&0xf0); + } break; case HW_VAR_TXPAUSE: @@ -6373,14 +6403,6 @@ _func_enter_; } break; - case HW_VAR_SEC_CFG: -#ifdef CONFIG_CONCURRENT_MODE - rtw_write8(padapter, REG_SECCFG, 0x0c|BIT(5));// enable tx enc and rx dec engine, and no key search for MC/BC -#else - rtw_write8(padapter, REG_SECCFG, *val); -#endif - break; - case HW_VAR_CAM_EMPTY_ENTRY: { u8 ucIndex = *val; @@ -6470,15 +6492,6 @@ _func_enter_; } break; - case HW_VAR_AMPDU_MIN_SPACE: - { - u8 MinSpacingToSet; - - MinSpacingToSet = *val; - pHalData->AMPDUDensity = MinSpacingToSet; - } - break; - case HW_VAR_AMPDU_FACTOR: { u32 AMPDULen = (*((u8 *)val)); @@ -6985,7 +6998,7 @@ u8 GetHalDefVar8723B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval) // Stanley@BB.SD3 suggests 16K can get stable performance // The experiment was done on SDIO interface // coding by Lucas@20130730 - *(u32*)pval = MAX_AMPDU_FACTOR_16K; + *(HT_CAP_AMPDU_FACTOR*)pval = MAX_AMPDU_FACTOR_16K; break; case HAL_DEF_TX_LDPC: case HAL_DEF_RX_LDPC: diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_mp.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_mp.c old mode 100644 new mode 100755 index 2357a937025e..80b3eea6297e --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_mp.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_mp.c @@ -442,12 +442,12 @@ void Hal_SetCCKTxPower(PADAPTER pAdapter, u8 *TxPower) // rf-A cck tx power write_bbreg(pAdapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, TxPower[RF_PATH_A]); tmpval = (TxPower[RF_PATH_A]<<16) | (TxPower[RF_PATH_A]<<8) | TxPower[RF_PATH_A]; - write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval); + write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskH3Bytes, tmpval); // rf-B cck tx power write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, TxPower[RF_PATH_B]); tmpval = (TxPower[RF_PATH_B]<<16) | (TxPower[RF_PATH_B]<<8) | TxPower[RF_PATH_B]; - write_bbreg(pAdapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval); + write_bbreg(pAdapter, rTxAGC_B_CCK1_55_Mcs32, bMaskH3Bytes, tmpval); RT_TRACE(_module_mp_, _drv_notice_, ("-SetCCKTxPower: A[0x%02x] B[0x%02x]\n", @@ -554,12 +554,12 @@ mpt_SetTxPower( pwr = pTxPower[ODM_RF_PATH_A]; TxAGC = (pwr<<16)|(pwr<<8)|(pwr); PHY_SetBBReg(pAdapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, pTxPower[ODM_RF_PATH_A]); - PHY_SetBBReg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, TxAGC); + PHY_SetBBReg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskH3Bytes, TxAGC); pwr = pTxPower[ODM_RF_PATH_B]; TxAGC = (pwr<<16)|(pwr<<8)|(pwr); PHY_SetBBReg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, pTxPower[ODM_RF_PATH_B]); - PHY_SetBBReg(pAdapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, TxAGC); + PHY_SetBBReg(pAdapter, rTxAGC_B_CCK1_55_Mcs32, bMaskH3Bytes, TxAGC); } break; @@ -647,9 +647,9 @@ void Hal_SetTxPower(PADAPTER pAdapter) void Hal_SetTxAGCOffset(PADAPTER pAdapter, u32 ulTxAGCOffset) { +#if 0 u32 TxAGCOffset_B, TxAGCOffset_C, TxAGCOffset_D,tmpAGC; - return ; TxAGCOffset_B = (ulTxAGCOffset&0x000000ff); TxAGCOffset_C = ((ulTxAGCOffset&0x0000ff00)>>8); @@ -658,6 +658,7 @@ void Hal_SetTxAGCOffset(PADAPTER pAdapter, u32 ulTxAGCOffset) tmpAGC = (TxAGCOffset_D<<8 | TxAGCOffset_C<<4 | TxAGCOffset_B); write_bbreg(pAdapter, rFPGA0_TxGainStage, (bXBTxAGC|bXCTxAGC|bXDTxAGC), tmpAGC); +#endif } void Hal_SetDataRate(PADAPTER pAdapter) @@ -826,7 +827,7 @@ s32 Hal_SetThermalMeter(PADAPTER pAdapter, u8 target_ther) void Hal_TriggerRFThermalMeter(PADAPTER pAdapter) { - PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, 0x42, BIT17 | BIT16, 0x03); + PHY_SetRFReg(pAdapter, ODM_RF_PATH_A, RF_T_METER_8723B, BIT17 | BIT16, 0x03); // RT_TRACE(_module_mp_,_drv_alert_, ("TriggerRFThermalMeter() finished.\n" )); } @@ -834,7 +835,7 @@ u8 Hal_ReadRFThermalMeter(PADAPTER pAdapter) { u32 ThermalValue = 0; - ThermalValue = (u1Byte)PHY_QueryRFReg(pAdapter, ODM_RF_PATH_A, 0x42, 0xfc00); // 0x42: RF Reg[15:10] + ThermalValue = (u1Byte)PHY_QueryRFReg(pAdapter, ODM_RF_PATH_A, RF_T_METER_8723B, 0xfc00); // 0x42: RF Reg[15:10] return (u8)ThermalValue; } @@ -912,13 +913,13 @@ void Hal_SetSingleToneTx(PADAPTER pAdapter, u8 bStart) { case ANTENNA_A: default: - rfPath = RF_PATH_A; + pMptCtx->MptRfPath = rfPath = RF_PATH_A; break; case ANTENNA_B: - rfPath = RF_PATH_B; + pMptCtx->MptRfPath = rfPath = RF_PATH_B; break; case ANTENNA_C: - rfPath = RF_PATH_C; + pMptCtx->MptRfPath = rfPath = RF_PATH_C; break; } diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_phycfg.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_phycfg.c old mode 100644 new mode 100755 index 785dcfe7ea4f..a36620583a5d --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_phycfg.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_phycfg.c @@ -1059,7 +1059,14 @@ PHY_SetTxPowerLevel8723B( PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); PDM_ODM_T pDM_Odm = &pHalData->odmpriv; pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable; - u8 RFPath = ( (pDM_FatTable->RxIdleAnt == MAIN_ANT) ? ODM_RF_PATH_A : ODM_RF_PATH_B); + u8 RFPath = ODM_RF_PATH_A; + + if(pHalData->AntDivCfg){// antenna diversity Enable + RFPath = ( (pDM_FatTable->RxIdleAnt == MAIN_ANT) ? ODM_RF_PATH_A : ODM_RF_PATH_B); + } + else{ // antenna diversity disable + RFPath = pHalData->ant_path; + } RT_TRACE(_module_hal_init_c_, _drv_info_,("==>PHY_SetTxPowerLevel8723B()\n")); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_rf6052.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_rf6052.c old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_rxdesc.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_rxdesc.c old mode 100644 new mode 100755 index 9686aaff25cd..6962cb6b265d --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_rxdesc.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_rxdesc.c @@ -21,18 +21,6 @@ #include -static s32 translate2dbm(u8 signal_strength_idx) -{ - s32 signal_power; // in dBm. - - - // Translate to dBm (x=0.5y-95). - signal_power = (s32)((signal_strength_idx + 1) >> 1); - signal_power -= 95; - - return signal_power; -} - static void process_rssi(_adapter *padapter,union recv_frame *prframe) { u32 last_rssi, tmp_val; @@ -75,10 +63,10 @@ static void process_rssi(_adapter *padapter,union recv_frame *prframe) if(padapter->recvpriv.is_signal_dbg) { padapter->recvpriv.signal_strength= padapter->recvpriv.signal_strength_dbg; - padapter->recvpriv.rssi=(s8)translate2dbm((u8)padapter->recvpriv.signal_strength_dbg); + padapter->recvpriv.rssi=(s8)translate_percentage_to_dbm(padapter->recvpriv.signal_strength_dbg); } else { padapter->recvpriv.signal_strength= tmp_val; - padapter->recvpriv.rssi=(s8)translate2dbm((u8)tmp_val); + padapter->recvpriv.rssi=(s8)translate_percentage_to_dbm(tmp_val); } RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("UI RSSI = %d, ui_rssi.TotalVal = %d, ui_rssi.TotalNum = %d\n", tmp_val, padapter->recvpriv.signal_strength_data.total_val,padapter->recvpriv.signal_strength_data.total_num)); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_sreset.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/rtl8723b_sreset.c old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/usb/rtl8723bu_led.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/usb/rtl8723bu_led.c old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/usb/rtl8723bu_recv.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/usb/rtl8723bu_recv.c old mode 100644 new mode 100755 index 2c3a400f99b2..4c960638c45f --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/usb/rtl8723bu_recv.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/usb/rtl8723bu_recv.c @@ -72,9 +72,7 @@ int rtl8723bu_init_recv_priv(_adapter *padapter) //init recv_buf _rtw_init_queue(&precvpriv->free_recv_buf_queue); -#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX _rtw_init_queue(&precvpriv->recv_buf_pending_queue); -#endif // CONFIG_USE_USB_BUFFER_ALLOC_RX precvpriv->pallocated_recv_buf = rtw_zmalloc(NR_RECVBUFF *sizeof(struct recv_buf) + 4); if(precvpriv->pallocated_recv_buf==NULL){ @@ -130,15 +128,22 @@ int rtl8723bu_init_recv_priv(_adapter *padapter) for(i=0; idev = padapter->pnetdev; +#ifndef CONFIG_PREALLOC_RX_SKB_BUFFER tmpaddr = (SIZE_PTR)pskb->data; alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1); skb_reserve(pskb, (RECVBUFF_ALIGN_SZ - alignment)); +#endif //! skb_queue_tail(&precvpriv->free_recv_skb_queue, pskb); } @@ -199,7 +204,24 @@ void rtl8723bu_free_recv_priv (_adapter *padapter) DBG_8192C(KERN_WARNING "free_recv_skb_queue not empty, %d\n", skb_queue_len(&precvpriv->free_recv_skb_queue)); } +#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER + { + int i=0; + struct sk_buff *skb; + + while ((skb = skb_dequeue(&precvpriv->free_recv_skb_queue)) != NULL) + { + if(ifree_recv_skb_queue); +#endif //CONFIG_PREALLOC_RX_SKB_BUFFER #endif @@ -211,55 +233,41 @@ void rtl8723bu_free_recv_priv (_adapter *padapter) void update_recvframe_attrib( PADAPTER padapter, union recv_frame *precvframe, - struct recv_stat *prxstat) + u8 *prxstat) { struct rx_pkt_attrib *pattrib; - struct recv_stat report; - PRXREPORT prxreport = (PRXREPORT)&report; - report.rxdw0 = le32_to_cpu(prxstat->rxdw0); - report.rxdw1 = le32_to_cpu(prxstat->rxdw1); - report.rxdw2 = le32_to_cpu(prxstat->rxdw2); - report.rxdw3 = le32_to_cpu(prxstat->rxdw3); - report.rxdw4 = le32_to_cpu(prxstat->rxdw4); - report.rxdw5 = le32_to_cpu(prxstat->rxdw5); pattrib = &precvframe->u.hdr.attrib; _rtw_memset(pattrib, 0, sizeof(struct rx_pkt_attrib)); // update rx report to recv_frame attribute - pattrib->pkt_rpt_type = prxreport->c2h_ind?C2H_PACKET:NORMAL_RX; -// DBG_871X("%s: pkt_rpt_type=%d\n", __func__, pattrib->pkt_rpt_type); + pattrib->pkt_len = (u16)GET_RX_STATUS_DESC_PKT_LEN_8723B(prxstat); + pattrib->pkt_rpt_type = GET_RX_STATUS_DESC_RPT_SEL_8723B(prxstat) ? C2H_PACKET : NORMAL_RX; - if (pattrib->pkt_rpt_type == NORMAL_RX) - { + if (pattrib->pkt_rpt_type == NORMAL_RX) { // Normal rx packet - // update rx report to recv_frame attribute - pattrib->pkt_len = (u16)prxreport->pktlen; - pattrib->drvinfo_sz = (u8)(prxreport->drvinfosize << 3); - pattrib->physt = (u8)prxreport->physt; + pattrib->drvinfo_sz = (u8)GET_RX_STATUS_DESC_DRVINFO_SIZE_8723B(prxstat) << 3; + pattrib->shift_sz = (u8)GET_RX_STATUS_DESC_SHIFT_8723B(prxstat); + pattrib->physt = (u8)GET_RX_STATUS_DESC_PHY_STATUS_8723B(prxstat); - pattrib->crc_err = (u8)prxreport->crc32; - pattrib->icv_err = (u8)prxreport->icverr; + pattrib->crc_err = (u8)GET_RX_STATUS_DESC_CRC32_8723B(prxstat); + pattrib->icv_err = (u8)GET_RX_STATUS_DESC_ICV_8723B(prxstat); - pattrib->bdecrypted = (u8)(prxreport->swdec ? 0 : 1); - pattrib->encrypt = (u8)prxreport->security; + pattrib->bdecrypted = (u8)GET_RX_STATUS_DESC_SWDEC_8723B(prxstat) ? 0 : 1; + pattrib->encrypt = (u8)GET_RX_STATUS_DESC_SECURITY_8723B(prxstat); - pattrib->qos = (u8)prxreport->qos; - pattrib->priority = (u8)prxreport->tid; + pattrib->qos = (u8)GET_RX_STATUS_DESC_QOS_8723B(prxstat); + pattrib->priority = (u8)GET_RX_STATUS_DESC_TID_8723B(prxstat); - pattrib->amsdu = (u8)prxreport->amsdu; + pattrib->amsdu = (u8)GET_RX_STATUS_DESC_AMSDU_8723B(prxstat); - pattrib->seq_num = (u16)prxreport->seq; - pattrib->frag_num = (u8)prxreport->frag; - pattrib->mfrag = (u8)prxreport->mf; - pattrib->mdata = (u8)prxreport->md; + pattrib->seq_num = (u16)GET_RX_STATUS_DESC_SEQ_8723B(prxstat); + pattrib->frag_num = (u8)GET_RX_STATUS_DESC_FRAG_8723B(prxstat); + pattrib->mfrag = (u8)GET_RX_STATUS_DESC_MORE_FRAG_8723B(prxstat); + pattrib->mdata = (u8)GET_RX_STATUS_DESC_MORE_DATA_8723B(prxstat); - pattrib->data_rate = (u8)prxreport->rx_rate; - } - else - { - pattrib->pkt_len = (u16)prxreport->pktlen; + pattrib->data_rate = (u8)GET_RX_STATUS_DESC_RX_RATE_8723B(prxstat); } } @@ -331,6 +339,7 @@ void update_recvframe_phyinfo( //rtl8723b_query_rx_phy_status(precvframe, pphy_status); //_enter_critical_bh(&pHalData->odm_stainfo_lock, &irqL); ODM_PhyStatusQuery(&pHalData->odmpriv,pPHYInfo,(u8 *)pphy_status,&(pkt_info)); + if(psta) psta->rssi = pattrib->phy_info.RecvSignalPower; //_exit_critical_bh(&pHalData->odm_stainfo_lock, &irqL); precvframe->u.hdr.psta = NULL; if (pkt_info.bPacketMatchBSSID && diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/usb/rtl8723bu_xmit.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/usb/rtl8723bu_xmit.c old mode 100644 new mode 100755 index c859be7234d0..176e8809e15c --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/usb/rtl8723bu_xmit.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/usb/rtl8723bu_xmit.c @@ -39,22 +39,6 @@ void rtl8723bu_free_xmit_priv(_adapter *padapter) { } -static void do_queue_select(_adapter *padapter, struct pkt_attrib *pattrib) -{ - u8 qsel; - - qsel = pattrib->priority; - RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("### do_queue_select priority=%d ,qsel = %d\n",pattrib->priority ,qsel)); - -#ifdef CONFIG_CONCURRENT_MODE - if (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE) - qsel = 7;// -#endif - - pattrib->qsel = qsel; -} - - void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,struct tx_desc *ptxdesc) { u8 bDumpTxPkt; @@ -761,52 +745,8 @@ static s32 pre_xmitframe(_adapter *padapter, struct xmit_frame *pxmitframe) //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); #endif - do_queue_select(padapter, pattrib); - - _enter_critical_bh(&pxmitpriv->lock, &irqL); - -#ifndef CONFIG_TDLS -#ifdef CONFIG_AP_MODE - if(xmitframe_enqueue_for_sleeping_sta(padapter, pxmitframe) == _TRUE) - { - struct sta_info *psta; - struct sta_priv *pstapriv = &padapter->stapriv; - - - _exit_critical_bh(&pxmitpriv->lock, &irqL); - - if(pattrib->psta) - { - psta = pattrib->psta; - } - else - { - psta=rtw_get_stainfo(pstapriv, pattrib->ra); - } - - if(psta) - { - if(psta->sleepq_len > (NR_XMITFRAME>>3)) - { - wakeup_sta_to_xmit(padapter, psta); - } - } - return _FALSE; - } -#endif -//else CONFIG_TDLS, process as TDLS Buffer STA -#else - if(pmlmeinfo->tdls_setup_state&TDLS_LINKED_STATE ){ //&& pattrib->ether_type!=0x0806) - res = xmit_tdls_enqueue_for_sleeping_sta(padapter, pxmitframe); - if(res==_TRUE){ - _exit_critical_bh(&pxmitpriv->lock, &irqL); - return _FALSE; - }else if(res==2){ - goto enqueue; - } - } -#endif + _enter_critical_bh(&pxmitpriv->lock, &irqL); if (rtw_txframes_sta_ac_pending(padapter, pattrib) > 0) goto enqueue; diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/usb/usb_halinit.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/usb/usb_halinit.c old mode 100644 new mode 100755 index 3ab260c177e0..f6a0d8a7746a --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/usb/usb_halinit.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/usb/usb_halinit.c @@ -125,11 +125,11 @@ void rtl8723bu_interface_configure(_adapter *padapter) #endif #ifdef CONFIG_USB_RX_AGGREGATION - pHalData->UsbRxAggMode = USB_RX_AGG_DMA;// USB_RX_AGG_DMA; - pHalData->UsbRxAggBlockCount = 8; //unit : 512b - pHalData->UsbRxAggBlockTimeout = 0x6; - pHalData->UsbRxAggPageCount = 48; //uint :128 b //0x0A; // 10 = MAX_RX_DMA_BUFFER_SIZE/2/pHalData->UsbBulkOutSize - pHalData->UsbRxAggPageTimeout = 0x4; //6, absolute time = 34ms/(2^6) + pHalData->UsbRxAggMode = USB_RX_AGG_USB; + pHalData->UsbRxAggBlockCount = 0x5; // unit: 4KB, for USB mode + pHalData->UsbRxAggBlockTimeout = 0x20; // unit: 32us, for USB mode + pHalData->UsbRxAggPageCount = 0xF; // uint: 1KB, for DMA mode + pHalData->UsbRxAggPageTimeout = 0x20; // unit: 32us, for DMA mode #endif HalUsbSetQueuePipeMapping8723BUsb(padapter, @@ -157,28 +157,7 @@ static u8 _InitPowerOn_8723BU(PADAPTER padapter) rtw_write16(padapter, REG_CR_8723B, value16); #ifdef CONFIG_BT_COEXIST - // Fix Antenna at BT side between power on and BT-Coex init HW - // enable BB power - value8 = rtw_read8(padapter, REG_SYS_FUNC_EN); - value8 |= FEN_BBRSTB | FEN_BB_GLB_RSTn; - rtw_write8(padapter, REG_SYS_FUNC_EN, value8); - //DBG_8192C("%s: 0x2=0x%02X\n", __FUNCTION__, rtw_read8(padapter, 0x2)); - - // Antenna of USB 1Ant is at S0 - // internal switch BT->S0 - // 0x948[12:0] = 0 - value16 = rtw_read16(padapter, 0x948); - value16 &= ~0x1FFF; - value16 |= 0; - rtw_write16(padapter, 0x948, value16); - //DBG_8192C("%s: 0x948=0x%04X\n", __FUNCTION__, rtw_read16(padapter, 0x948)); - - // mask wlan_act to low - // 0x76e[3] = 0 - value8 = rtw_read8(padapter, 0x76e); - value8 &= ~BIT(3); - rtw_write8(padapter, 0x76e, value8); - //DBG_8192C("%s: 0x76e=0x%02X\n", __FUNCTION__, rtw_read8(padapter, 0x76e)); + rtw_btcoex_PowerOnSetting(padapter); // external switch to S1 // 0x38[11] = 0x1 @@ -532,12 +511,8 @@ static void _InitQueuePriority(PADAPTER padapter) static void _InitPageBoundary(PADAPTER padapter) { - // RX Page Boundary - u16 rxdma_bufsz = 0x2800;//rx 10K - - rtw_write16(padapter, (REG_TRXFF_BNDY_8723B+ 2), rxdma_bufsz-1); - - // TODO: ?? shall we set tx boundary? + /* RX FIFO(RXFF0) Boundary, unit is byte */ + rtw_write16(padapter, REG_TRXFF_BNDY+2, RX_DMA_BOUNDARY_8723B); } static VOID @@ -722,6 +697,52 @@ _InitRetryFunction( rtw_write8(Adapter, REG_ACKTO, 0x40); } +static void _InitBurstPktLen(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + u8 tmp8; + + + tmp8 = rtw_read8(padapter, REG_RXDMA_PRO_8723B); + tmp8 &= ~(BIT(4) | BIT(5)); + switch (pHalData->UsbBulkOutSize) { + case USB_HIGH_SPEED_BULK_SIZE: + tmp8 |= BIT(4); // set burst pkt len=512B + break; + case USB_FULL_SPEED_BULK_SIZE: + default: + tmp8 |= BIT(5); // set burst pkt len=64B + break; + } + tmp8 |= BIT(1) | BIT(2) | BIT(3); + rtw_write8(padapter, REG_RXDMA_PRO_8723B, tmp8); + + pHalData->bSupportUSB3 = _FALSE; + + tmp8 = rtw_read8(padapter, REG_HT_SINGLE_AMPDU_8723B); + tmp8 |= BIT(7); // enable single pkt ampdu + rtw_write8(padapter, REG_HT_SINGLE_AMPDU_8723B, tmp8); + rtw_write16(padapter, REG_MAX_AGGR_NUM, 0x0C14); + rtw_write8(padapter, REG_AMPDU_MAX_TIME_8723B, 0x5E); + rtw_write32(padapter, REG_AMPDU_MAX_LENGTH_8723B, 0xffffffff); + if (pHalData->AMPDUBurstMode) + rtw_write8(padapter, REG_AMPDU_BURST_MODE_8723B, 0x5F); + + // for VHT packet length 11K + rtw_write8(padapter, REG_RX_PKT_LIMIT, 0x18); + + rtw_write8(padapter, REG_PIFS, 0x00); + rtw_write8(padapter, REG_FWHW_TXQ_CTRL, 0x80); + rtw_write32(padapter, REG_FAST_EDCA_CTRL, 0x03086666); + rtw_write8(padapter, REG_USTIME_TSF_8723B, 0x50); + rtw_write8(padapter, REG_USTIME_EDCA_8723B, 0x50); + + // to prevent mac is reseted by bus. 20111208, by Page + tmp8 = rtw_read8(padapter, REG_RSV_CTRL); + tmp8 |= BIT(5) | BIT(6); + rtw_write8(padapter, REG_RSV_CTRL, tmp8); +} + /*----------------------------------------------------------------------------- * Function: usb_AggSettingTxUpdate() * @@ -783,49 +804,68 @@ usb_AggSettingRxUpdate( IN PADAPTER Adapter ) { -#ifdef CONFIG_USB_RX_AGGREGATION - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); - u8 usb_agg_setting; - u32 usb_agg_th; - - usb_agg_setting = rtw_read8(Adapter, REG_TRXDMA_CTRL_8723B); - - usb_agg_th = (pHalData->RegAcUsbDmaSize&0x0F) | (pHalData->RegAcUsbDmaTime<<8); + PHAL_DATA_TYPE pHalData; + u8 aggctrl; + u32 aggrx; + u32 agg_size; - switch(pHalData->UsbRxAggMode) - { - case USB_RX_AGG_DMA: - { - usb_agg_th |= BIT_USB_RXDMA_AGG_EN; - rtw_write16(Adapter, REG_RXDMA_AGG_PG_TH_8723B, usb_agg_th); - } - break; - case USB_RX_AGG_USB: - { - usb_agg_setting = rtw_read8(Adapter,REG_RXDMA_PRO_8723B)|BIT(3)|BIT(2); - if(IS_HIGH_SPEED_USB(Adapter)) - { - rtw_write8(Adapter,REG_RXDMA_PRO_8723B,((usb_agg_setting|BIT(4))&(~BIT(5)))); - } - else if(IS_FULL_SPEED_USB(Adapter)) - { - rtw_write8(Adapter,REG_RXDMA_PRO_8723B, ((usb_agg_setting|BIT(5))&(~BIT(4)))); - } - - } - case USB_RX_AGG_MIX: - case USB_RX_AGG_DISABLE: - default: - // TODO: - break; - } + pHalData = GET_HAL_DATA(Adapter); + aggctrl = rtw_read8(Adapter, REG_TRXDMA_CTRL); + aggctrl &= ~RXDMA_AGG_EN; + aggrx = rtw_read32(Adapter, REG_RXDMA_AGG_PG_TH); + aggrx &= ~BIT_USB_RXDMA_AGG_EN; + aggrx &= ~0xFF0F; // reset agg size and timeout - -#endif -} // usb_AggSettingRxUpdate +#ifdef CONFIG_USB_RX_AGGREGATION + switch(pHalData->UsbRxAggMode) { + case USB_RX_AGG_DMA: + agg_size = pHalData->UsbRxAggPageCount << 10; + if (agg_size > RX_DMA_BOUNDARY_8723B) + agg_size = RX_DMA_BOUNDARY_8723B >> 1; + if ((agg_size + 2048) > MAX_RECVBUF_SZ) + agg_size = MAX_RECVBUF_SZ - 2048; + agg_size >>= 10; // unit: 1K + if (agg_size > 0xF) + agg_size = 0xF; + + aggctrl |= RXDMA_AGG_EN; + aggrx |= BIT_USB_RXDMA_AGG_EN; + aggrx |= agg_size; + aggrx |= (pHalData->UsbRxAggPageTimeout << 8); + DBG_8192C("%s: RX Agg-DMA mode, size=%dKB, timeout=%dus\n", + __FUNCTION__, agg_size, pHalData->UsbRxAggPageTimeout*32); + break; + + case USB_RX_AGG_USB: + case USB_RX_AGG_MIX: + agg_size = pHalData->UsbRxAggBlockCount << 12; + if ((agg_size + 2048) > MAX_RECVBUF_SZ) + agg_size = MAX_RECVBUF_SZ - 2048; + agg_size >>= 12; // unit: 4K + if (agg_size > 0xF) + agg_size = 0xF; + + aggctrl |= RXDMA_AGG_EN; + aggrx &= ~BIT_USB_RXDMA_AGG_EN; + aggrx |= agg_size; + aggrx |= (pHalData->UsbRxAggBlockTimeout << 8); + DBG_8192C("%s: RX Agg-USB mode, size=%dKB, timeout=%dus\n", + __FUNCTION__, agg_size*4, pHalData->UsbRxAggBlockTimeout*32); + break; + + case USB_RX_AGG_DISABLE: + default: + DBG_8192C("%s: RX Aggregation Disable!\n", __FUNCTION__); + break; + } +#endif // CONFIG_USB_RX_AGGREGATION + + rtw_write8(Adapter, REG_TRXDMA_CTRL, aggctrl); + rtw_write32(Adapter, REG_RXDMA_AGG_PG_TH, aggrx); +} static VOID _initUsbAggregationSetting( @@ -1078,16 +1118,14 @@ u32 rtl8723bu_hal_init(PADAPTER padapter) HAL_INIT_STAGES_INIT_SECURITY, HAL_INIT_STAGES_MISC11, //HAL_INIT_STAGES_RF_PS, - HAL_INIT_STAGES_IQK, - HAL_INIT_STAGES_PW_TRACK, - HAL_INIT_STAGES_LCK, + HAL_INIT_STAGES_INIT_HAL_DM, +// HAL_INIT_STAGES_IQK, +// HAL_INIT_STAGES_PW_TRACK, +// HAL_INIT_STAGES_LCK, HAL_INIT_STAGES_MISC21, //HAL_INIT_STAGES_INIT_PABIAS, - #ifdef CONFIG_BT_COEXIST HAL_INIT_STAGES_BT_COEXIST, - #endif //HAL_INIT_STAGES_ANTENNA_SEL, - HAL_INIT_STAGES_INIT_HAL_DM, HAL_INIT_STAGES_MISC31, HAL_INIT_STAGES_END, HAL_INIT_STAGES_NUM @@ -1107,16 +1145,14 @@ u32 rtl8723bu_hal_init(PADAPTER padapter) "HAL_INIT_STAGES_INIT_SECURITY", "HAL_INIT_STAGES_MISC11", //"HAL_INIT_STAGES_RF_PS", - "HAL_INIT_STAGES_IQK", - "HAL_INIT_STAGES_PW_TRACK", - "HAL_INIT_STAGES_LCK", + "HAL_INIT_STAGES_INIT_HAL_DM", +// "HAL_INIT_STAGES_IQK", +// "HAL_INIT_STAGES_PW_TRACK", +// "HAL_INIT_STAGES_LCK", "HAL_INIT_STAGES_MISC21", //"HAL_INIT_STAGES_INIT_PABIAS", - #ifdef CONFIG_BT_COEXIST "HAL_INIT_STAGES_BT_COEXIST", - #endif //"HAL_INIT_STAGES_ANTENNA_SEL", - "HAL_INIT_STAGES_INIT_HAL_DM", "HAL_INIT_STAGES_MISC31", "HAL_INIT_STAGES_END", }; @@ -1245,27 +1281,13 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01); // InitHalDm should be put ahead of FirmwareDownload. (HWConfig flow: FW->MAC->-BB->RF) //InitHalDm(Adapter); - /* - To inform FW about: - bit0: "0" for no antenna inverse; "1" for antenna inverse - bit1: "0" for internal switch; "1" for external switch - bit2: "0" for one antenna; "1" for two antenna - */ - value8 = 0; - value8 |= BIT(0); /* Set antenna inverse for 8723BU */ - if (pHalData->EEPROMBluetoothAntNum == Ant_x2) - { - value8 |= BIT(2); /* two antenna case */ - } - rtw_write8(padapter, 0xfe08, value8); - HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW); #if (1 == MP_DRIVER) if (padapter->registrypriv.mp_mode == 1) { _InitRxSetting_8723bu(padapter); } - else +// else #endif { status = rtl8723b_FirmwareDownload(padapter,_FALSE); @@ -1360,11 +1382,12 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02); _InitEDCA(padapter); _InitRateFallback(padapter); _InitRetryFunction(padapter); - _initUsbAggregationSetting(padapter); // _InitOperationMode(Adapter);//todo rtl8723b_InitBeaconParameters(padapter); rtl8723b_InitBeaconMaxError(padapter, _TRUE); + _InitBurstPktLen(padapter); + _initUsbAggregationSetting(padapter); #ifdef ENABLE_USB_DROP_INCORRECT_OUT _InitHardwareDropIncorrectBulkOut(padapter); @@ -1424,6 +1447,7 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11); // _RfPowerSave(Adapter); +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM); rtl8723b_InitHalDm(padapter); #if (MP_DRIVER == 1) @@ -1466,7 +1490,7 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11); #endif restore_iqk_rst = (pwrpriv->bips_processing==_TRUE)?_TRUE:_FALSE; b2Ant = pHalData->EEPROMBluetoothAntNum==Ant_x2?_TRUE:_FALSE; - PHY_IQCalibrate_8723B(padapter, _FALSE, restore_iqk_rst, b2Ant, 1); + PHY_IQCalibrate_8723B(padapter, _FALSE, restore_iqk_rst, b2Ant, pHalData->ant_path); pHalData->odmpriv.RFCalibrateInfo.bIQKInitialized = _TRUE; #ifdef CONFIG_BT_COEXIST rtw_btcoex_IQKNotify(padapter, _FALSE); @@ -1486,9 +1510,7 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC21); //HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PABIAS); // _InitPABias(Adapter); - - -HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM); +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BT_COEXIST); #ifdef CONFIG_BT_COEXIST // Init BT hw config. rtw_btcoex_HAL_Initialize(padapter, _FALSE); @@ -2567,7 +2589,12 @@ InitAdapterVariablesByPROM_8723BU( { EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); //PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); - u8 hwinfo[HWSET_MAX_SIZE_512]; + u8* hwinfo = NULL; + + if (sizeof(pEEPROM->efuse_eeprom_data) < HWSET_MAX_SIZE_8723B) + DBG_871X("[WARNING] size of efuse_eeprom_data is less than HWSET_MAX_SIZE_8723B!\n"); + + hwinfo = pEEPROM->efuse_eeprom_data; #ifdef CONFIG_EFUSE_CONFIG_FILE Hal_readPGDataFromConfigFile(padapter); @@ -2855,7 +2882,7 @@ GetHalDefVar8723BUsb( *(( u32*)pValue) = RXDESC_SIZE + DRVINFO_SZ; break; case HW_VAR_MAX_RX_AMPDU_FACTOR: - *(( u32*)pValue) = MAX_AMPDU_FACTOR_64K; + *((HT_CAP_AMPDU_FACTOR*)pValue) = MAX_AMPDU_FACTOR_64K; break; default: bResult = GetHalDefVar8723B(Adapter, eVariable, pValue); @@ -2939,24 +2966,9 @@ void rtl8723bu_set_hal_ops(_adapter * padapter) _func_enter_; -#ifdef CONFIG_CONCURRENT_MODE - if(padapter->isprimary) -#endif //CONFIG_CONCURRENT_MODE - { - //set hardware operation functions - padapter->HalData = rtw_zvmalloc(sizeof(HAL_DATA_TYPE)); - if(padapter->HalData == NULL){ - DBG_871X("cant not alloc memory for HAL DATA \n"); - } - } - //_rtw_memset(padapter->HalData, 0, sizeof(HAL_DATA_TYPE)); - padapter->hal_data_sz = sizeof(HAL_DATA_TYPE); - pHalFunc->hal_init = &rtl8723bu_hal_init; pHalFunc->hal_deinit = &rtl8723bu_hal_deinit; - //pHalFunc->free_hal_data = &rtl8192c_free_hal_data; - pHalFunc->inirp_init = &rtl8723bu_inirp_init; pHalFunc->inirp_deinit = &rtl8723bu_inirp_deinit; diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/usb/usb_ops.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/usb/usb_ops.c old mode 100644 new mode 100755 index 21a70440dc59..70948f1347b8 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/usb/usb_ops.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/rtl8723b/usb/usb_ops.c @@ -755,7 +755,7 @@ _pkt *pskb precvframe->u.hdr.precvbuf = NULL; //can't access the precvbuf for new arch. precvframe->u.hdr.len=0; - update_recvframe_attrib(padapter,precvframe, (struct recv_stat*)pbuf); + update_recvframe_attrib(padapter,precvframe, pbuf); pattrib = &precvframe->u.hdr.attrib; @@ -771,8 +771,10 @@ _pkt *pskb if((pattrib->pkt_len<=0) || (pkt_offset>transfer_len)) { - RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe: pkt_len<=0\n")); - DBG_871X("%s()-%d: RX Warning!,pkt_len<=0 or pkt_offset> transfer_len \n", __FUNCTION__, __LINE__); + DBG_871X("%s()-%d: RX Warning! pkt_len=%d pkt_offset=%d transfer_len=%d\n", + __FUNCTION__, __LINE__, + pattrib->pkt_len, pkt_offset, transfer_len); + rtw_free_recvframe(precvframe, pfree_recv_queue); goto _exit_recvbuf2recvframe; } @@ -796,44 +798,43 @@ _pkt *pskb if(pattrib->pkt_rpt_type == NORMAL_RX)//Normal rx packet { - if(pattrib->physt) pphy_status = (pbuf + RXDESC_OFFSET); #ifdef CONFIG_CONCURRENT_MODE if(rtw_buddy_adapter_up(padapter)) - { + { if(pre_recv_entry(precvframe, (struct phy_stat*)pphy_status) != _SUCCESS) - { + { RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, ("recvbuf2recvframe: recv_entry(precvframe) != _SUCCESS\n")); } - } + } #endif //CONFIG_CONCURRENT_MODE - if (pattrib->physt && pphy_status) - update_recvframe_phyinfo(precvframe, (struct phy_stat*)pphy_status); - + if (pattrib->physt && pphy_status) + update_recvframe_phyinfo(precvframe, (struct phy_stat*)pphy_status); - if(rtw_recv_entry(precvframe) != _SUCCESS) - { + if(rtw_recv_entry(precvframe) != _SUCCESS) { RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, ("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n")); - } - + } } else{ // pkt_rpt_type == TX_REPORT1-CCX, TX_REPORT2-TX RTP,HIS_REPORT-USB HISR RTP if (pattrib->pkt_rpt_type == C2H_PACKET) { C2H_EVT_HDR C2hEvent; - + u16 len_c2h = pattrib->pkt_len; u8 *pbuf_c2h = precvframe->u.hdr.rx_data; - u8 *pdata_c2h; + u8 *pdata_c2h; C2hEvent.CmdID = pbuf_c2h[0]; C2hEvent.CmdSeq = pbuf_c2h[1]; C2hEvent.CmdLen = (len_c2h -2); pdata_c2h = pbuf_c2h+2; + DBG_8192C("rx C2H_PACKET, ID=%d, seq=%d, len=%d\n", + C2hEvent.CmdID, C2hEvent.CmdSeq, C2hEvent.CmdLen); + if(C2hEvent.CmdID == C2H_CCX_TX_RPT) { CCX_FwC2HTxRpt_8723b(padapter, pdata_c2h, C2hEvent.CmdLen); @@ -844,8 +845,6 @@ _pkt *pskb rtl8723bu_c2h_packet_handler(padapter, precvframe->u.hdr.rx_data, pattrib->pkt_len); #endif } - DBG_8192C("rx C2H_PACKET \n"); - } rtw_free_recvframe(precvframe, pfree_recv_queue); } @@ -1040,12 +1039,17 @@ void rtl8723bu_recv_tasklet(void *priv) _pkt *pskb; _adapter *padapter = (_adapter*)priv; struct recv_priv *precvpriv = &padapter->recvpriv; - + struct recv_buf *precvbuf = NULL; + while (NULL != (pskb = skb_dequeue(&precvpriv->rx_skb_queue))) { if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE)) { DBG_8192C("recv_tasklet => bDriverStopped or bSurpriseRemoved \n"); +#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER + if(rtw_free_skb_premem(pskb)!=0) +#endif //CONFIG_PREALLOC_RX_SKB_BUFFER + rtw_skb_free(pskb); break; } @@ -1065,6 +1069,13 @@ void rtl8723bu_recv_tasklet(void *priv) #endif } + while (NULL != (precvbuf = rtw_dequeue_recvbuf(&precvpriv->recv_buf_pending_queue))) + { + DBG_871X("dequeue_recvbuf %p\n", precvbuf); + precvbuf->pskb = NULL; + precvbuf->reuse = _FALSE; + rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); + } } @@ -1229,9 +1240,11 @@ _func_enter_; if(precvbuf->pskb == NULL) { RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("init_recvbuf(): alloc_skb fail!\n")); - DBG_871X("#### usb_read_port() alloc_skb fail!#####\n"); + DBG_8192C("#### usb_read_port() alloc_skb fail! precvbuf=%p #####\n", precvbuf); + //enqueue precvbuf and wait for free skb + rtw_enqueue_recvbuf(precvbuf, &precvpriv->recv_buf_pending_queue); return _FAIL; - } + } tmpaddr = (SIZE_PTR)precvbuf->pskb->data; alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/Hal8192CPhyReg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/Hal8192CPhyReg.h old mode 100644 new mode 100755 index e4e977c67fbb..1c7cd5d1ed1e --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/Hal8192CPhyReg.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/Hal8192CPhyReg.h @@ -1082,6 +1082,7 @@ #define bMaskHWord 0xffff0000 #define bMaskLWord 0x0000ffff #define bMaskDWord 0xffffffff +#define bMaskH3Bytes 0xffffff00 #define bMask12Bits 0xfff #define bMaskH4Bits 0xf0000000 #define bMaskOFDM_D 0xffc00000 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/Hal8723BPhyCfg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/Hal8723BPhyCfg.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/Hal8723BPhyReg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/Hal8723BPhyReg.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/Hal8723BPwrSeq.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/Hal8723BPwrSeq.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/HalPwrSeqCmd.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/HalPwrSeqCmd.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/HalVerDef.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/HalVerDef.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/autoconf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/autoconf.h old mode 100644 new mode 100755 index c4d937281763..099aebfa04f6 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/autoconf.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/autoconf.h @@ -40,10 +40,10 @@ #define PLATFORM_LINUX 1 -#define CONFIG_IOCTL_CFG80211 1 +//#define CONFIG_IOCTL_CFG80211 1 #ifdef CONFIG_IOCTL_CFG80211 - #define RTW_USE_CFG80211_STA_EVENT /* Indecate new sta asoc through cfg80211_new_sta */ + //#define RTW_USE_CFG80211_STA_EVENT /* Indecate new sta asoc through cfg80211_new_sta */ #define CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER //#define CONFIG_DEBUG_CFG80211 //#define CONFIG_DRV_ISSUE_PROV_REQ // IOT FOR S2 @@ -53,7 +53,6 @@ /* * Internal General Config */ -//#define CONFIG_PWRCTRL //#define CONFIG_H2CLBK #define CONFIG_EMBEDDED_FWIMG 1 @@ -104,7 +103,7 @@ #endif -#define CONFIG_CONCURRENT_MODE 1 +//#define CONFIG_CONCURRENT_MODE 1 #ifdef CONFIG_CONCURRENT_MODE //#define CONFIG_HWPORT_SWAP //Port0->Sec , Port1 -> Pri #define CONFIG_RUNTIME_PORT_SWITCH @@ -191,11 +190,14 @@ #define CONFIG_LAYER2_ROAMING #define CONFIG_LAYER2_ROAMING_RESUME //#define CONFIG_ADAPTOR_INFO_CACHING_FILE // now just applied on 8192cu only, should make it general... -#define CONFIG_RESUME_IN_WORKQUEUE +//#define CONFIG_RESUME_IN_WORKQUEUE //#define CONFIG_SET_SCAN_DENY_TIMER #define CONFIG_LONG_DELAY_ISSUE #define CONFIG_NEW_SIGNAL_STAT_PROCESS //#define CONFIG_SIGNAL_DISPLAY_DBM //display RX signal with dbm +#ifdef CONFIG_SIGNAL_DISPLAY_DBM +//#define CONFIG_BACKGROUND_NOISE_MONITOR +#endif #define RTW_NOTCH_FILTER 0 /* 0:Disable, 1:Enable, */ #define CONFIG_BR_EXT 1 // Enable NAT2.5 support for STA mode interface with a L2 Bridge @@ -206,6 +208,8 @@ #define CONFIG_TX_MCAST2UNI 1 // Support IP multicast->unicast //#define CONFIG_CHECK_AC_LIFETIME 1 // Check packet lifetime of 4 ACs. +#define CONFIG_RF_GAIN_OFFSET + /* * Interface Related Config @@ -213,7 +217,7 @@ #ifndef CONFIG_MINIMAL_MEMORY_USAGE #define CONFIG_USB_TX_AGGREGATION 1 - #define CONFIG_USB_RX_AGGREGATION 1 +// #define CONFIG_USB_RX_AGGREGATION 1 #endif #define CONFIG_PREALLOC_RECV_SKB 1 @@ -290,32 +294,16 @@ #define RTL8723AS_SUPPORT 0 #define RTL8723AE_SUPPORT 0 #define RTL8723A_SUPPORT (RTL8723AU_SUPPORT|RTL8723AS_SUPPORT|RTL8723AE_SUPPORT) - #define RTL8723_FPGA_VERIFICATION 0 -#define RTL8188EE_SUPPORT 0 -#define RTL8188EU_SUPPORT 0 -#define RTL8188ES_SUPPORT 0 -#define RTL8188E_SUPPORT (RTL8188EE_SUPPORT|RTL8188EU_SUPPORT|RTL8188ES_SUPPORT) - -#define RTL8812E_SUPPORT 0 - -#define RTL8812AU_SUPPORT 0 - -#define RTL8812A_SUPPORT (RTL8812E_SUPPORT|RTL8812AU_SUPPORT) - - - +#define RTL8188E_SUPPORT 0 +#define RTL8812A_SUPPORT 0 #define RTL8821A_SUPPORT 0 - - #define RTL8723B_SUPPORT 1 - #define RTL8192E_SUPPORT 0 +#define RTL8814A_SUPPORT 0 -#define RTL8813A_SUPPORT 0 - -#define RATE_ADAPTIVE_SUPPORT 0 +#define RATE_ADAPTIVE_SUPPORT 0 #define POWER_TRAINING_ACTIVE 0 #ifdef CONFIG_USB_TX_AGGREGATION diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/basic_types.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/basic_types.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/byteorder/big_endian.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/byteorder/big_endian.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/byteorder/generic.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/byteorder/generic.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/byteorder/little_endian.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/byteorder/little_endian.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/byteorder/swab.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/byteorder/swab.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/byteorder/swabb.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/byteorder/swabb.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/circ_buf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/circ_buf.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/cmd_osdep.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/cmd_osdep.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/custom_gpio.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/custom_gpio.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/drv_conf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/drv_conf.h old mode 100644 new mode 100755 index 1b1aa722ca71..490b5ebc2c30 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/drv_conf.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/drv_conf.h @@ -46,6 +46,7 @@ #define CONFIG_SIGNAL_DISPLAY_DBM #endif +/* #if defined(CONFIG_HAS_EARLYSUSPEND) && defined (CONFIG_RESUME_IN_WORKQUEUE) #warning "You have CONFIG_HAS_EARLYSUSPEND enabled in your system, we disable CONFIG_RESUME_IN_WORKQUEUE automatically" #undef CONFIG_RESUME_IN_WORKQUEUE @@ -55,6 +56,7 @@ #warning "You have CONFIG_ANDROID_POWER enabled in your system, we disable CONFIG_RESUME_IN_WORKQUEUE automatically" #undef CONFIG_RESUME_IN_WORKQUEUE #endif +*/ #ifdef CONFIG_RESUME_IN_WORKQUEUE //this can be removed, because there is no case for this... #if !defined( CONFIG_WAKELOCK) && !defined(CONFIG_ANDROID_POWER) @@ -73,6 +75,19 @@ #define CONFIG_USB_VENDOR_REQ_MUTEX #endif +#define DYNAMIC_CAMID_ALLOC + +#ifndef CONFIG_RTW_HIQ_FILTER + #define CONFIG_RTW_HIQ_FILTER 1 +#endif + +#ifndef CONFIG_RTW_ADAPTIVITY_EN + #define CONFIG_RTW_ADAPTIVITY_EN 2 +#endif + +#ifndef CONFIG_RTW_ADAPTIVITY_MODE + #define CONFIG_RTW_ADAPTIVITY_MODE 0 +#endif //#include diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/drv_types.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/drv_types.h old mode 100644 new mode 100755 index d54e4b2a8b3a..8aaaa4901197 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/drv_types.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/drv_types.h @@ -34,7 +34,10 @@ #include #include #include - +#ifdef CONFIG_ARP_KEEP_ALIVE +#include +#include +#endif #ifdef PLATFORM_OS_XP #include @@ -57,8 +60,6 @@ enum _NIC_VERSION { }; -#define CONFIG_SUSPEND_REFINE - typedef struct _ADAPTER _adapter, ADAPTER,*PADAPTER; #include @@ -112,6 +113,10 @@ typedef struct _ADAPTER _adapter, ADAPTER,*PADAPTER; #include #include +#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER +#include +#endif + #ifdef CONFIG_P2P #include #endif // CONFIG_P2P @@ -248,7 +253,7 @@ struct registry_priv u8 low_power ; u8 wifi_spec;// !turbo_mode - + u8 special_rf_path; // 0: 2T2R ,1: only turn on path A 1T1R u8 channel_plan; #ifdef CONFIG_BT_COEXIST u8 btcoex; @@ -320,6 +325,10 @@ struct registry_priv u8 ext_iface_num;//primary/secondary iface is excluded #endif u8 qos_opt_enable; + + u8 hiq_filter; + u8 adaptivity_en; + u8 adaptivity_mode; }; @@ -360,6 +369,131 @@ enum _IFACE_ID { IFACE_ID_MAX, }; +#ifdef CONFIG_DBG_COUNTER + +struct rx_logs { + u32 intf_rx; + u32 intf_rx_err_recvframe; + u32 intf_rx_err_skb; + u32 intf_rx_report; + u32 core_rx; + u32 core_rx_pre; + u32 core_rx_pre_ver_err; + u32 core_rx_pre_mgmt; + u32 core_rx_pre_mgmt_err_80211w; + u32 core_rx_pre_mgmt_err; + u32 core_rx_pre_ctrl; + u32 core_rx_pre_ctrl_err; + u32 core_rx_pre_data; + u32 core_rx_pre_data_wapi_seq_err; + u32 core_rx_pre_data_wapi_key_err; + u32 core_rx_pre_data_handled; + u32 core_rx_pre_data_err; + u32 core_rx_pre_data_unknown; + u32 core_rx_pre_unknown; + u32 core_rx_enqueue; + u32 core_rx_dequeue; + u32 core_rx_post; + u32 core_rx_post_decrypt; + u32 core_rx_post_decrypt_wep; + u32 core_rx_post_decrypt_tkip; + u32 core_rx_post_decrypt_aes; + u32 core_rx_post_decrypt_wapi; + u32 core_rx_post_decrypt_hw; + u32 core_rx_post_decrypt_unknown; + u32 core_rx_post_decrypt_err; + u32 core_rx_post_defrag_err; + u32 core_rx_post_portctrl_err; + u32 core_rx_post_indicate; + u32 core_rx_post_indicate_in_oder; + u32 core_rx_post_indicate_reoder; + u32 core_rx_post_indicate_err; + u32 os_indicate; + u32 os_indicate_ap_mcast; + u32 os_indicate_ap_forward; + u32 os_indicate_ap_self; + u32 os_indicate_err; + u32 os_netif_ok; + u32 os_netif_err; +}; + +struct tx_logs { + u32 os_tx; + u32 os_tx_err_up; + u32 os_tx_err_xmit; + u32 os_tx_m2u; + u32 os_tx_m2u_ignore_fw_linked; + u32 os_tx_m2u_ignore_self; + u32 os_tx_m2u_entry; + u32 os_tx_m2u_entry_err_xmit; + u32 os_tx_m2u_entry_err_skb; + u32 os_tx_m2u_stop; + u32 core_tx; + u32 core_tx_err_pxmitframe; + u32 core_tx_err_brtx; + u32 core_tx_upd_attrib; + u32 core_tx_upd_attrib_adhoc; + u32 core_tx_upd_attrib_sta; + u32 core_tx_upd_attrib_ap; + u32 core_tx_upd_attrib_unknown; + u32 core_tx_upd_attrib_dhcp; + u32 core_tx_upd_attrib_icmp; + u32 core_tx_upd_attrib_active; + u32 core_tx_upd_attrib_err_ucast_sta; + u32 core_tx_upd_attrib_err_ucast_ap_link; + u32 core_tx_upd_attrib_err_sta; + u32 core_tx_upd_attrib_err_link; + u32 core_tx_upd_attrib_err_sec; + u32 core_tx_ap_enqueue_warn_fwstate; + u32 core_tx_ap_enqueue_warn_sta; + u32 core_tx_ap_enqueue_warn_nosta; + u32 core_tx_ap_enqueue_warn_link; + u32 core_tx_ap_enqueue_warn_trigger; + u32 core_tx_ap_enqueue_mcast; + u32 core_tx_ap_enqueue_ucast; + u32 core_tx_ap_enqueue; + u32 intf_tx; + u32 intf_tx_pending_ac; + u32 intf_tx_pending_fw_under_survey; + u32 intf_tx_pending_fw_under_linking; + u32 intf_tx_pending_xmitbuf; + u32 intf_tx_enqueue; + u32 core_tx_enqueue; + u32 core_tx_enqueue_class; + u32 core_tx_enqueue_class_err_sta; + u32 core_tx_enqueue_class_err_nosta; + u32 core_tx_enqueue_class_err_fwlink; + u32 intf_tx_direct; + u32 intf_tx_direct_err_coalesce; + u32 intf_tx_dequeue; + u32 intf_tx_dequeue_err_coalesce; + u32 intf_tx_dump_xframe; + u32 intf_tx_dump_xframe_err_txdesc; + u32 intf_tx_dump_xframe_err_port; +}; + +struct int_logs { + u32 all; + u32 err; + u32 tbdok; + u32 tbder; + u32 bcnderr; + u32 bcndma; + u32 bcndma_e; + u32 rx; + u32 rx_rdu; + u32 rx_fovw; + u32 txfovw; + u32 mgntok; + u32 highdok; + u32 bkdok; + u32 bedok; + u32 vidok; + u32 vodok; +}; + +#endif // CONFIG_DBG_COUNTER + struct debug_priv { u32 dbg_sdio_free_irq_error_cnt; u32 dbg_sdio_alloc_irq_error_cnt; @@ -418,6 +552,11 @@ struct rtw_traffic_statistics { u32 cur_rx_tp; // Rx throughput in MBps. }; +struct cam_ctl_t { + _lock lock; + u64 bitmap; +}; + struct cam_entry_cache { u16 ctrl; u8 mac[ETH_ALEN]; @@ -460,7 +599,8 @@ struct dvobj_priv _adapter *padapters[IFACE_ID_MAX]; u8 iface_nums; // total number of ifaces used runtime - struct cam_entry_cache cam_cache[32]; + struct cam_ctl_t cam_ctl; + struct cam_entry_cache cam_cache[TOTAL_CAM_ENTRY]; //For 92D, DMDP have 2 interface. u8 InterfaceNumber; @@ -869,9 +1009,21 @@ struct _ADAPTER{ PLOOPBACKDATA ploopback; #endif + //for debug purpose u8 fix_rate; + u8 driver_vcs_en; //Enable=1, Disable=0 driver control vrtl_carrier_sense for tx + u8 driver_vcs_type;//force 0:disable VCS, 1:RTS-CTS, 2:CTS-to-self when vcs_en=1. + u8 driver_ampdu_spacing;//driver control AMPDU Density for peer sta's rx + u8 driver_rx_ampdu_factor;//0xff: disable drv ctrl, 0:8k, 1:16k, 2:32k, 3:64k; + u8 fix_ba_rxbuf_bz; /* 0~127, TODO:consider each sta and each TID */ unsigned char in_cta_test; + +#ifdef CONFIG_DBG_COUNTER + struct rx_logs rx_logs; + struct tx_logs tx_logs; + struct int_logs int_logs; +#endif }; #define adapter_to_dvobj(adapter) (adapter->dvobj) @@ -928,6 +1080,17 @@ void rtw_dev_pno_debug(struct net_device *net); #endif //CONFIG_PNO_SET_DEBUG #endif //CONFIG_PNO_SUPPORT +#ifdef CONFIG_GPIO_API +int rtw_get_gpio(struct net_device *netdev, int gpio_num); +int rtw_set_gpio_output_value(struct net_device *netdev, int gpio_num, BOOLEAN isHigh); +int rtw_config_gpio(struct net_device *netdev, int gpio_num, BOOLEAN isOutput); +#endif + +#ifdef CONFIG_WOWLAN +int rtw_suspend_wow(_adapter *padapter); +int rtw_resume_process_wow(_adapter *padapter); +#endif + __inline static u8 *myid(struct eeprom_priv *peepriv) { return (peepriv->mac_addr); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/drv_types_linux.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/drv_types_linux.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/ethernet.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/ethernet.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/h2clbk.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/h2clbk.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_btcoex.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_btcoex.h old mode 100644 new mode 100755 index 4d2d948d39ce..f12d65548010 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_btcoex.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_btcoex.h @@ -39,10 +39,12 @@ u8 hal_btcoex_IsBtExist(PADAPTER padapter); u8 hal_btcoex_IsBtDisabled(PADAPTER); void hal_btcoex_SetChipType(PADAPTER padapter, u8 chipType); u8 hal_btcoex_GetChipType(PADAPTER padapter); -void hal_btcoex_SetPgAntNum(PADAPTER padapter, u8 antNum, BOOLEAN antInverse); +void hal_btcoex_SetPgAntNum(PADAPTER padapter, u8 antNum); u8 hal_btcoex_GetPgAntNum(PADAPTER padapter); +void hal_btcoex_SetSingleAntPath(PADAPTER padapter, u8 singleAntPath); u8 hal_btcoex_Initialize(PADAPTER padapter); +void hal_btcoex_PowerOnSetting(PADAPTER padapter); void hal_btcoex_InitHwConfig(PADAPTER padapter, u8 bWifiOnly); void hal_btcoex_IpsNotify(PADAPTER padapter, u8 type); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_com.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_com.h old mode 100644 new mode 100755 index 8b01a58f9d64..939763ad15cb --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_com.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_com.h @@ -204,6 +204,9 @@ typedef enum _FIRMWARE_SOURCE { #define PageNum(_Len, _Size) (u32)(((_Len)/(_Size)) + ((_Len)&((_Size) - 1) ? 1:0)) +u8 rtw_hal_data_init(_adapter *padapter); +void rtw_hal_data_deinit(_adapter *padapter); + void dump_chip_info(HAL_VERSION ChipVersion); u8 //return the final channel plan decision @@ -321,5 +324,43 @@ void rtw_get_raw_rssi_info(void *sel, _adapter *padapter); void rtw_store_phy_info(_adapter *padapter, union recv_frame *prframe); void rtw_dump_raw_rssi_info(_adapter *padapter); #endif + +#define HWSET_MAX_SIZE 512 +#ifdef CONFIG_EFUSE_CONFIG_FILE +#define EFUSE_FILE_COLUMN_NUM 16 +u32 Hal_readPGDataFromConfigFile(PADAPTER padapter, struct file *fp); +void Hal_ReadMACAddrFromFile(PADAPTER padapter, struct file *fp); +void Hal_GetPhyEfuseMACAddr(PADAPTER padapter, u8* mac_addr); +int check_phy_efuse_tx_power_info_valid(PADAPTER padapter); +int check_phy_efuse_macaddr_info_valid(PADAPTER padapter); +#endif //CONFIG_EFUSE_CONFIG_FILE + +#ifdef CONFIG_RF_GAIN_OFFSET +void rtw_bb_rf_gain_offset(_adapter *padapter); +#endif //CONFIG_RF_GAIN_OFFSET + +void dm_DynamicUsbTxAgg(_adapter *padapter, u8 from_timer); + +void GetHalODMVar( + PADAPTER Adapter, + HAL_ODM_VARIABLE eVariable, + PVOID pValue1, + PVOID pValue2); +void SetHalODMVar( + PADAPTER Adapter, + HAL_ODM_VARIABLE eVariable, + PVOID pValue1, + BOOLEAN bSet); + +#ifdef CONFIG_BACKGROUND_NOISE_MONITOR +struct noise_info +{ + u8 bPauseDIG; + u8 IGIValue; + u32 max_time;//ms + u8 chan; +}; +#endif + #endif //__HAL_COMMON_H__ diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_com_h2c.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_com_h2c.h old mode 100644 new mode 100755 index c6ca8d2bb3f1..7983e4b1af33 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_com_h2c.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_com_h2c.h @@ -292,6 +292,7 @@ typedef struct _RSVDPAGE_LOC { #endif void dump_TX_FIFO(PADAPTER padapter, u8 page_num, u16 page_size); +u8 rtw_check_invalid_mac_address (u8 *mac_addr); #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) void rtw_get_current_ip_address(PADAPTER padapter, u8 *pcurrentip); void rtw_get_sec_iv(PADAPTER padapter, u8*pcur_dot11txpn, u8 *StaAddr); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_com_led.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_com_led.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_com_phycfg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_com_phycfg.h old mode 100644 new mode 100755 index 6aaf8ec3e437..19276ea53628 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_com_phycfg.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_com_phycfg.h @@ -285,7 +285,9 @@ int PHY_ConfigRFWithParaFile(IN PADAPTER Adapter, IN char* pFileName, IN u8 eRFP int PHY_ConfigRFWithTxPwrTrackParaFile(IN PADAPTER Adapter, IN char* pFileName); int PHY_ConfigRFWithPowerLimitTableParaFile(IN PADAPTER Adapter, IN char* pFileName); -#endif + +void phy_free_filebuf(_adapter *padapter); +#endif //CONFIG_LOAD_PHY_PARA_FROM_FILE #endif //__HAL_COMMON_H__ diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_com_reg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_com_reg.h old mode 100644 new mode 100755 index cadd99d5875b..16ff4fe05965 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_com_reg.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_com_reg.h @@ -267,6 +267,7 @@ #define REG_PKT_BE_BK_LIFE_TIME 0x04C2 #define REG_STBC_SETTING 0x04C4 #define REG_QUEUE_CTRL 0x04C6 +#define REG_SINGLE_AMPDU_CTRL 0x04c7 #define REG_PROT_MODE_CTRL 0x04C8 #define REG_MAX_AGGR_NUM 0x04CA #define REG_RTS_MAX_AGGR_NUM 0x04CB @@ -638,6 +639,9 @@ Default: 00b. #define RRSR_MCS6 BIT18 #define RRSR_MCS7 BIT19 +#define RRSR_CCK_RATES (RRSR_11M|RRSR_5_5M|RRSR_2M|RRSR_1M) +#define RRSR_OFDM_RATES (RRSR_54M|RRSR_48M|RRSR_36M|RRSR_24M|RRSR_18M|RRSR_12M|RRSR_9M|RRSR_6M) + // WOL bit information #define HAL92C_WOL_PTK_UPDATE_EVENT BIT0 #define HAL92C_WOL_GTK_UPDATE_EVENT BIT1 @@ -762,10 +766,6 @@ Default: 00b. #define CAM_READ 0x00000000 #define CAM_POLLINIG BIT31 -#define SCR_UseDK 0x01 -#define SCR_TxSecEnable 0x02 -#define SCR_RxSecEnable 0x04 - // // 10. Power Save Control Registers // @@ -1514,6 +1514,7 @@ Current IOREG MAP #define SCR_NoSKMC BIT(5) //No Key Search Multicast #define SCR_TXBCUSEDK BIT(6) // Force Tx Broadcast packets Use Default Key #define SCR_RXBCUSEDK BIT(7) // Force Rx Broadcast packets Use Default Key +#define SCR_CHK_KEYID BIT(8) //----------------------------------------------------- // @@ -1716,7 +1717,7 @@ Current IOREG MAP // General definitions //======================================================== -#define LAST_ENTRY_OF_TX_PKT_BUFFER_8188E 176 +#define LAST_ENTRY_OF_TX_PKT_BUFFER_8188E(__Adapter) ( IS_VENDOR_8188E_I_CUT_SERIES(__Adapter) ? 255 : 175 ) #define LAST_ENTRY_OF_TX_PKT_BUFFER_8812 255 #define LAST_ENTRY_OF_TX_PKT_BUFFER_8723B 255 #define LAST_ENTRY_OF_TX_PKT_BUFFER_8192C 255 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_data.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_data.h old mode 100644 new mode 100755 index 2b7014d3c00f..5b8164c44608 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_data.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_data.h @@ -30,7 +30,9 @@ #ifdef CONFIG_SDIO_HCI #include #endif - +#ifdef CONFIG_GSPI_HCI +#include +#endif // // For RTL8723 WiFi/BT/GPS multi-function configuration. 2010.10.06. // @@ -364,18 +366,18 @@ typedef struct hal_com_data u8 TxPwrLevelCck[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER]; u8 TxPwrLevelHT40_1S[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr u8 TxPwrLevelHT40_2S[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr - u8 TxPwrHt20Diff[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER];// HT 20<->40 Pwr diff + s8 TxPwrHt20Diff[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER];// HT 20<->40 Pwr diff u8 TxPwrLegacyHtDiff[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER];// For HT<->legacy pwr diff // Power Limit Table for 2.4G - u8 TxPwrLimit_2_4G[MAX_REGULATION_NUM] + s8 TxPwrLimit_2_4G[MAX_REGULATION_NUM] [MAX_2_4G_BANDWITH_NUM] [MAX_RATE_SECTION_NUM] [CHANNEL_MAX_NUMBER_2G] [MAX_RF_PATH_NUM]; // Power Limit Table for 5G - u8 TxPwrLimit_5G[MAX_REGULATION_NUM] + s8 TxPwrLimit_5G[MAX_REGULATION_NUM] [MAX_5G_BANDWITH_NUM] [MAX_RATE_SECTION_NUM] [CHANNEL_MAX_NUMBER_5G] @@ -468,6 +470,7 @@ typedef struct hal_com_data u8 AntDivCfg; u8 AntDetection; u8 TRxAntDivType; + u8 ant_path; //for 8723B s0/s1 selection u8 u1ForcedIgiLb; // forced IGI lower bound @@ -495,7 +498,7 @@ typedef struct hal_com_data u8 p2p_ps_offload; #endif - u8 AMPDUDensity; + //u8 AMPDUDensity; // Auto FSM to Turn On, include clock, isolation, power control for MAC only u8 bMacPwrCtrlOn; @@ -505,7 +508,7 @@ typedef struct hal_com_data RT_AMPDU_BRUST AMPDUBurstMode; //92C maybe not use, but for compile successfully -#ifdef CONFIG_SDIO_HCI +#if defined (CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) // // For SDIO Interface HAL related // @@ -593,6 +596,8 @@ typedef struct hal_com_data u8 bInterruptMigration; u8 bDisableTxInt; + + u16 RxTag; #endif //CONFIG_PCI_HCI struct dm_priv dmpriv; @@ -678,6 +683,11 @@ typedef struct hal_com_data char *rf_tx_pwr_lmt; u32 rf_tx_pwr_lmt_len; #endif + +#ifdef CONFIG_BACKGROUND_NOISE_MONITOR + s16 noise[ODM_MAX_CHANNEL_NUM]; +#endif + } HAL_DATA_COMMON, *PHAL_DATA_COMMON; diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_gspi.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_gspi.h new file mode 100755 index 000000000000..f5880e274512 --- /dev/null +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_gspi.h @@ -0,0 +1,32 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#ifndef __HAL_GSPI_H_ +#define __HAL_GSPI_H_ + +#define ffaddr2deviceId(pdvobj, addr) (pdvobj->Queue2Pipe[addr]) + +u8 rtw_hal_gspi_max_txoqt_free_space(_adapter *padapter); +u8 rtw_hal_gspi_query_tx_freepage(_adapter *padapter, u8 PageIdx, u8 RequiredPageNum); +void rtw_hal_gspi_update_tx_freepage(_adapter *padapter, u8 PageIdx, u8 RequiredPageNum); +void rtw_hal_set_gspi_tx_max_length(PADAPTER padapter, u8 numHQ, u8 numNQ, u8 numLQ, u8 numPubQ); +u32 rtw_hal_get_gspi_tx_max_length(PADAPTER padapter, u8 queue_idx); + +#endif + diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_intf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_intf.h old mode 100644 new mode 100755 index 340f9a60afee..37acfcf5809e --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_intf.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_intf.h @@ -65,6 +65,7 @@ typedef enum _HW_VARIABLES{ HW_VAR_RESP_SIFS, HW_VAR_ACK_PREAMBLE, HW_VAR_SEC_CFG, + HW_VAR_SEC_DK_CFG, HW_VAR_BCN_VALID, HW_VAR_RF_TYPE, HW_VAR_DM_FLAG, @@ -186,6 +187,7 @@ typedef enum _HAL_ODM_VARIABLE{ HAL_ODM_STA_INFO, HAL_ODM_P2P_STATE, HAL_ODM_WIFI_DISPLAY_STATE, + HAL_ODM_NOISE_MONITOR, }HAL_ODM_VARIABLE; typedef enum _HAL_INTF_PS_FUNC{ @@ -252,7 +254,7 @@ struct hal_ops { u8 (*GetHalDefVarHandler)(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue); u8 (*SetHalDefVarHandler)(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue); - void (*GetHalODMVarHandler)(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1,BOOLEAN bSet); + void (*GetHalODMVarHandler)(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1,PVOID pValue2); void (*SetHalODMVarHandler)(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1,BOOLEAN bSet); void (*UpdateRAMaskHandler)(_adapter *padapter, u32 mac_id, u8 rssi_level); @@ -411,6 +413,11 @@ typedef enum _HARDWARE_TYPE{ #define IS_HARDWARE_TYPE_8188E(_Adapter) \ (IS_HARDWARE_TYPE_8188EE(_Adapter) || IS_HARDWARE_TYPE_8188EU(_Adapter) || IS_HARDWARE_TYPE_8188ES(_Adapter)) + +#define IS_HARDWARE_TYPE_8188E_before(_Adapter) \ +(IS_HARDWARE_TYPE_8192C(_Adapter) ||IS_HARDWARE_TYPE_8192D(_Adapter) ||IS_HARDWARE_TYPE_8723A(_Adapter)) + + #define IS_HARDWARE_TYPE_OLDER_THAN_8812A(_Adapter) \ (IS_HARDWARE_TYPE_8192D(_Adapter) || IS_HARDWARE_TYPE_8192C(_Adapter) ||\ IS_HARDWARE_TYPE_8723AE(_Adapter) || IS_HARDWARE_TYPE_8723AU(_Adapter) || IS_HARDWARE_TYPE_8723AS(_Adapter) ||\ @@ -529,7 +536,7 @@ u8 rtw_hal_set_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pVa u8 rtw_hal_get_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue); void rtw_hal_set_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1,BOOLEAN bSet); -void rtw_hal_get_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1,BOOLEAN bSet); +void rtw_hal_get_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1,PVOID pValue2); void rtw_hal_enable_interrupt(_adapter *padapter); void rtw_hal_disable_interrupt(_adapter *padapter); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_pg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_pg.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_phy.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_phy.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_phy_reg.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_phy_reg.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_sdio.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/hal_sdio.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/ieee80211.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/ieee80211.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/ieee80211_ext.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/ieee80211_ext.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/if_ether.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/if_ether.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/ioctl_cfg80211.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/ioctl_cfg80211.h old mode 100644 new mode 100755 index 2cae2c53f45a..b689c8b75745 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/ioctl_cfg80211.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/ioctl_cfg80211.h @@ -117,6 +117,7 @@ void rtw_wdev_unregister(struct wireless_dev *wdev); void rtw_cfg80211_init_wiphy(_adapter *padapter); +void rtw_cfg80211_unlink_bss(_adapter *padapter, struct wlan_network *pnetwork); void rtw_cfg80211_surveydone_event_callback(_adapter *padapter); struct cfg80211_bss *rtw_cfg80211_inform_bss(_adapter *padapter, struct wlan_network *pnetwork); int rtw_cfg80211_check_bss(_adapter *padapter); @@ -143,9 +144,11 @@ bool rtw_cfg80211_pwr_mgmt(_adapter *adapter); #define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->pnetdev, freq, buf, len, gfp) #elif (LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)) #define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->pnetdev, freq, sig_dbm, buf, len, gfp) -#else +#elif (LINUX_VERSION_CODE < KERNEL_VERSION(3,12,0)) #define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->rtw_wdev, freq, sig_dbm, buf, len, gfp) -#endif +#else // kernel >= 3.12 +#define rtw_cfg80211_rx_mgmt(adapter, freq, sig_dbm, buf, len, gfp) cfg80211_rx_mgmt((adapter)->rtw_wdev, freq, sig_dbm, buf, len, 0, gfp) +#endif // kernel >= 3.12 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)) && !defined(COMPAT_KERNEL_RELEASE) #define rtw_cfg80211_send_rx_assoc(adapter, bss, buf, len) cfg80211_send_rx_assoc((adapter)->pnetdev, buf, len) diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/ip.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/ip.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/linux/wireless.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/linux/wireless.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/mlme_osdep.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/mlme_osdep.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/mp_custom_oid.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/mp_custom_oid.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/nic_spec.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/nic_spec.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/osdep_intf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/osdep_intf.h old mode 100644 new mode 100755 index 7a61a132d5b2..d67d06c54cf8 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/osdep_intf.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/osdep_intf.h @@ -129,11 +129,6 @@ extern int rtw_ioctl(struct ifnet * ifp, u_long cmd, caddr_t data); void rtw_ips_dev_unload(_adapter *padapter); -#ifdef CONFIG_RF_GAIN_OFFSET -void rtw_bb_rf_gain_offset(_adapter *padapter); -#endif //CONFIG_RF_GAIN_OFFSET - - #ifdef CONFIG_IPS int rtw_ips_pwr_up(_adapter *padapter); void rtw_ips_pwr_down(_adapter *padapter); @@ -155,11 +150,12 @@ void rtw_drv_free_vir_ifaces(struct dvobj_priv *dvobj); int rtw_drv_register_netdev(_adapter *padapter); void rtw_ndev_destructor(_nic_hdl ndev); -#ifdef CONFIG_SUSPEND_REFINE -int rtw_suspend_common(_adapter *padapter); -int rtw_resume_common(_adapter *padapter); +#ifdef CONFIG_ARP_KEEP_ALIVE +int rtw_gw_addr_query(_adapter *padapter); #endif +int rtw_suspend_common(_adapter *padapter); +int rtw_resume_common(_adapter *padapter); #endif //_OSDEP_INTF_H_ diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/osdep_service.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/osdep_service.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/osdep_service_bsd.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/osdep_service_bsd.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/osdep_service_ce.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/osdep_service_ce.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/osdep_service_linux.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/osdep_service_linux.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/osdep_service_xp.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/osdep_service_xp.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/recv_osdep.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/recv_osdep.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8192c_recv.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8192c_recv.h old mode 100644 new mode 100755 index 85716b4105e4..ad4d37010700 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8192c_recv.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8192c_recv.h @@ -26,6 +26,7 @@ #if defined(CONFIG_USB_HCI) +#ifndef MAX_RECVBUF_SZ #ifdef PLATFORM_OS_CE #define MAX_RECVBUF_SZ (8192+1024) // 8K+1k #else @@ -43,6 +44,7 @@ #define MAX_RECVBUF_SZ (4000) // about 4K #endif #endif +#endif //!MAX_RECVBUF_SZ #elif defined(CONFIG_PCI_HCI) //#ifndef CONFIG_MINIMAL_MEMORY_USAGE @@ -52,7 +54,7 @@ //#endif -#elif defined(CONFIG_SDIO_HCI) +#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) #define MAX_RECVBUF_SZ (10240) diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8192c_rf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8192c_rf.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_cmd.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_cmd.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_dm.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_dm.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_hal.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_hal.h old mode 100644 new mode 100755 index d7a99a470b0a..ee66b1fcbccd --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_hal.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_hal.h @@ -82,14 +82,6 @@ typedef struct _RT_FIRMWARE { u8 szFwBuffer[FW_8723B_SIZE]; #endif u32 ulFwLength; - -#ifdef CONFIG_EMBEDDED_FWIMG - u8* szBTFwBuffer; - u8 myBTFwBuffer[FW_8723B_SIZE]; -#else - u8 szBTFwBuffer[FW_8723B_SIZE]; -#endif - u32 ulBTFwLength; } RT_FIRMWARE_8723B, *PRT_FIRMWARE_8723B; // @@ -132,7 +124,9 @@ typedef struct _RT_8723B_FIRMWARE_HDR #define PAGE_SIZE_TX_8723B 128 #define PAGE_SIZE_RX_8723B 8 -#define RX_DMA_SIZE_8723B 0x4000 // 16K +#define TX_DMA_SIZE_8723B 0x8000 // 32K(TX) +#define RX_DMA_SIZE_8723B 0x4000 // 16K(RX) + #define RX_DMA_RESERVED_SIZE_8723B 0x80 // 128B, reserved for tx report #define RX_DMA_BOUNDARY_8723B (RX_DMA_SIZE_8723B - RX_DMA_RESERVED_SIZE_8723B - 1) @@ -152,7 +146,6 @@ typedef struct _RT_8723B_FIRMWARE_HDR #undef BCNQ1_PAGE_NUM_8723B #define BCNQ1_PAGE_NUM_8723B 0x00 // 0x04 #endif -#define MAX_RX_DMA_BUFFER_SIZE_8723B 0x2800 // RX 10K //For WoWLan , more reserved page //ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, PNO: 6 @@ -231,6 +224,9 @@ typedef enum _C2H_EVT C2H_8723B_BT_INFO = 9, C2H_HW_INFO_EXCH = 10, C2H_8723B_BT_MP_INFO = 11, +#ifdef CONFIG_FW_C2H_DEBUG + C2H_8723B_FW_DEBUG = 0xff, +#endif //CONFIG_FW_C2H_DEBUG MAX_C2HEVENT } C2H_EVT; @@ -320,6 +316,9 @@ void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); int FirmwareDownloadBT(IN PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); void CCX_FwC2HTxRpt_8723b(PADAPTER padapter, u8 *pdata, u8 len); +#ifdef CONFIG_FW_C2H_DEBUG +void Debug_FwC2H_8723b(PADAPTER padapter, u8 *pdata, u8 len); +#endif //CONFIG_FW_C2H_DEBUG s32 c2h_id_filter_ccx_8723b(u8 *buf); s32 c2h_handler_8723b(PADAPTER padapter, u8 *pC2hEvent); u8 MRateToHwRate8723B(u8 rate); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_led.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_led.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_recv.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_recv.h old mode 100644 new mode 100755 index 3f0990fd649e..6fd991042c0c --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_recv.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_recv.h @@ -29,124 +29,6 @@ #endif // !CONFIG_SDIO_RX_COPY #endif // CONFIG_SDIO_HCI -typedef struct rxreport_8723b -{ - //DWORD 0 - u32 pktlen:14; - u32 crc32:1; - u32 icverr:1; - u32 drvinfosize:4; - u32 security:3; - u32 qos:1; - u32 shift:2; - u32 physt:1; - u32 swdec:1; - u32 rsvd0028:2; - u32 eor:1; - u32 rsvd0031:1; - - //DWORD 1 - u32 macid:7; - u32 rsvd0407:1; - u32 tid:4; - u32 macid_vld:1; - u32 amsdu:1; - u32 rxid_match:1; - u32 paggr:1; - u32 a1fit:4; - u32 chkerr:1; //20 - u32 rx_ipv:1; - u32 rx_is_tcp_udp:1; - u32 chk_vld:1; //23 - u32 pam:1; - u32 pwr:1; - u32 md:1; - u32 mf:1; - u32 type:2; - u32 mc:1; - u32 bc:1; - - //DWORD 2 - u32 seq:12; - u32 frag:4; - u32 rx_is_qos:1; - u32 rsvd0817:1; - u32 wlanhd_iv_len:6; - u32 hwrsvd0824:4; - u32 c2h_ind:1; - u32 rsvd0829:2; - u32 fcs_ok:1; - - //DWORD 3 - u32 rx_rate:7; - u32 rsvd1207:3; - u32 htc:1; - u32 esop:1; - u32 bssid_fit:2; - u32 rsvd1214:2; - u32 dma_agg_num:8; - u32 rsvd1224:5; - u32 patternmatch:1; - u32 unicastwake:1; - u32 magicwake:1; - - //DWORD 4 - u32 splcp:1; //Ofdm sgi or cck_splcp - u32 ldpc:1; - u32 stbc:1; - u32 not_sounding:1; - u32 bw:2; - u32 rsvd1606:26; - - //DWORD 5 - u32 tsfl; -} RXREPORT, *PRXREPORT; - -typedef struct phystatus_8723b -{ - u32 rxgain_a:7; - u32 trsw_a:1; - u32 rxgain_b:7; - u32 trsw_b:1; - u32 chcorr_l:16; - - u32 sigqualcck:8; - u32 cfo_a:8; - u32 cfo_b:8; - u32 chcorr_h:8; - - u32 noisepwrdb_h:8; - u32 cfo_tail_a:8; - u32 cfo_tail_b:8; - u32 rsvd0824:8; - - u32 rsvd1200:8; - u32 rxevm_a:8; - u32 rxevm_b:8; - u32 rxsnr_a:8; - - u32 rxsnr_b:8; - u32 noisepwrdb_l:8; - u32 rsvd1616:8; - u32 postsnr_a:8; - - u32 postsnr_b:8; - u32 csi_a:8; - u32 csi_b:8; - u32 targetcsi_a:8; - - u32 targetcsi_b:8; - u32 sigevm:8; - u32 maxexpwr:8; - u32 exintflag:1; - u32 sgien:1; - u32 rxsc:2; - u32 idlelong:1; - u32 anttrainen:1; - u32 antselb:1; - u32 antsel:1; -} PHYSTATUS, *PPHYSTATUS; - #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) s32 rtl8723bs_init_recv_priv(PADAPTER padapter); void rtl8723bs_free_recv_priv(PADAPTER padapter); @@ -154,8 +36,9 @@ void rtl8723bs_free_recv_priv(PADAPTER padapter); void rtl8723b_query_rx_phy_status(union recv_frame *prframe, struct phy_stat *pphy_stat); void rtl8723b_process_phy_info(PADAPTER padapter, void *prframe); + #ifdef CONFIG_USB_HCI -void update_recvframe_attrib(PADAPTER padapter, union recv_frame *precvframe, struct recv_stat *prxstat); +void update_recvframe_attrib(PADAPTER padapter, union recv_frame *precvframe, u8 *prxstat); void update_recvframe_phyinfo(union recv_frame *precvframe, struct phy_stat *pphy_info); int rtl8723bu_init_recv_priv(_adapter *padapter); void rtl8723bu_free_recv_priv (_adapter *padapter); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_rf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_rf.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_spec.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_spec.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_sreset.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_sreset.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_xmit.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_xmit.h old mode 100644 new mode 100755 index 2de6a6829c1e..2c5c7076d987 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_xmit.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtl8723b_xmit.h @@ -34,162 +34,6 @@ #define MAX_TID (15) -//OFFSET 0 -#define OFFSET_SZ 0 -#define OFFSET_SHT 16 -#define BMC BIT(24) -#define LSG BIT(26) -#define FSG BIT(27) -#define OWN BIT(31) - - -//OFFSET 4 -#define PKT_OFFSET_SZ 0 -#define BK BIT(6) -#define QSEL_SHT 8 -#define Rate_ID_SHT 16 -#define NAVUSEHDR BIT(20) -#define PKT_OFFSET_SHT 26 -#define HWPC BIT(31) - -//OFFSET 8 -#define AGG_EN BIT(29) - -//OFFSET 12 -#define SEQ_SHT 16 - -//OFFSET 16 -#define QoS BIT(6) -#define HW_SEQ_EN BIT(7) -#define USERATE BIT(8) -#define DISDATAFB BIT(10) -#define DATA_SHORT BIT(24) -#define DATA_BW BIT(25) - -//OFFSET 20 -#define SGI BIT(6) - -// -//defined for TX DESC Operation -// -typedef struct txdesc_8723b -{ - // Offset 0 - u32 pktlen:16; - u32 offset:8; - u32 bmc:1; - u32 htc:1; - u32 rsvd0026:1; - u32 rsvd0027:1; - u32 linip:1; - u32 noacm:1; - u32 gf:1; - u32 rsvd0031:1; - - // Offset 4 - u32 macid:7; - u32 rsvd0407:1; - u32 qsel:5; - u32 rdg_nav_ext:1; - u32 lsig_txop_en:1; - u32 pifs:1; - u32 rate_id:5; - u32 en_desc_id:1; - u32 sectype:2; - u32 pkt_offset:5; // unit: 8 bytes - u32 moredata:1; - u32 txop_ps_cap:1; - u32 txop_ps_mode:1; - - // Offset 8 - u32 p_aid:9; - u32 rsvd0809:1; - u32 cca_rts:2; - u32 agg_en:1; - u32 rdg_en:1; - u32 null_0:1; - u32 null_1:1; - u32 bk:1; - u32 morefrag:1; - u32 raw:1; - u32 spe_rpt:1; - u32 ampdu_density:3; - u32 bt_null:1; - u32 g_id:6; - u32 rsvd0830:2; - - // Offset 12 - u32 wheader_len:4; - u32 chk_en:1; - u32 early_rate:1; - u32 hw_ssn_sel:2; - u32 userate:1; - u32 disrtsfb:1; - u32 disdatafb:1; - u32 cts2self:1; - u32 rtsen:1; - u32 hw_rts_en:1; - u32 port_id:1; - u32 navusehdr:1; - u32 use_max_len:1; - u32 max_agg_num:5; - u32 ndpa:2; - u32 ampdu_max_time:8; - - // Offset 16 - u32 datarate:7; - u32 try_rate:1; - u32 data_ratefb_lmt:5; - u32 rts_ratefb_lmt:4; - u32 rty_lmt_en:1; - u32 data_rt_lmt:6; - u32 rtsrate:5; - u32 pcts_en:1; - u32 pcts_mask_idx:2; - - // Offset 20 - u32 data_sc:4; - u32 data_short:1; - u32 data_bw:2; - u32 data_ldpc:1; - u32 data_stbc:2; - u32 vcs_stbc:2; - u32 rts_short:1; - u32 rts_sc:4; - u32 rsvd2016:7; - u32 tx_ant:4; - u32 txpwr_offset:3; - u32 rsvd2031:1; - - // Offset 24 - u32 sw_define:12; - u32 mbssid:4; - u32 antsel_A:3; - u32 antsel_B:3; - u32 antsel_C:3; - u32 antsel_D:3; - u32 rsvd2428:4; - - // Offset 28 - u32 checksum:16; - u32 rsvd2816:8; - u32 usb_txagg_num:8; - - // Offset 32 - u32 rts_rc:6; - u32 bar_rty_th:2; - u32 data_rc:6; - u32 rsvd3214:1; - u32 en_hwseq:1; - u32 nextneadpage:8; - u32 tailpage:8; - - // Offset 36 - u32 padding_len:11; - u32 txbf_path:1; - u32 seq:12; - u32 final_data_rate:8; -}TXDESC_8723B, *PTXDESC_8723B; #ifndef __INC_HAL8723BDESC_H #define __INC_HAL8723BDESC_H @@ -349,6 +193,7 @@ typedef struct txdesc_8723b // Dword 6 #define SET_TX_DESC_SW_DEFINE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) +#define SET_TX_DESC_MBSSID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) #define SET_TX_DESC_ANTSEL_A_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) #define SET_TX_DESC_ANTSEL_B_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) #define SET_TX_DESC_ANTSEL_C_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_android.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_android.h old mode 100644 new mode 100755 index a4c4e0d1ecb3..bdc4d996075c --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_android.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_android.h @@ -45,6 +45,9 @@ enum ANDROID_WIFI_CMD { ANDROID_WIFI_CMD_P2P_GET_NOA, ANDROID_WIFI_CMD_P2P_SET_PS, ANDROID_WIFI_CMD_SET_AP_WPS_P2P_IE, + + ANDROID_WIFI_CMD_MIRACAST, + #ifdef CONFIG_PNO_SUPPORT ANDROID_WIFI_CMD_PNOSSIDCLR_SET, ANDROID_WIFI_CMD_PNOSETUP_SET, @@ -85,7 +88,7 @@ int rtw_android_cfg80211_pno_setup(struct net_device *net, #if defined(RTW_ENABLE_WIFI_CONTROL_FUNC) int rtw_android_wifictrl_func_add(void); void rtw_android_wifictrl_func_del(void); -void* wl_android_prealloc(int section, unsigned long size); +void* rtw_wl_android_prealloc(int section, unsigned long size); int wifi_get_irq_number(unsigned long *irq_flags_ptr); int wifi_set_power(int on, unsigned long msec); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_ap.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_ap.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_beamforming.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_beamforming.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_br_ext.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_br_ext.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_bt_mp.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_bt_mp.h old mode 100644 new mode 100755 index 7a1fa0d52422..9ede51af8d6a --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_bt_mp.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_bt_mp.h @@ -75,7 +75,7 @@ typedef enum _MP_BT_PAYLOAD_TYPE{ MP_BT_PAYLOAD_ALL_0 = 2, MP_BT_PAYLOAD_11110000 = 3, MP_BT_PAYLOAD_PRBS9 = 4, - MP_BT_PAYLOAD_MAX + MP_BT_PAYLOAD_MAX = 8, }MP_BT_PAYLOAD_TYPE,*PMP_BT_PAYLOAD_TYPE; diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_btcoex.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_btcoex.h old mode 100644 new mode 100755 index 23da49c020b3..9086a61b66d5 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_btcoex.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_btcoex.h @@ -29,6 +29,7 @@ #define PACKET_EAPOL 3 void rtw_btcoex_Initialize(PADAPTER); +void rtw_btcoex_PowerOnSetting(PADAPTER padapter); void rtw_btcoex_HAL_Initialize(PADAPTER padapter, u8 bWifiOnly); void rtw_btcoex_IpsNotify(PADAPTER, u8 type); void rtw_btcoex_LpsNotify(PADAPTER, u8 type); @@ -54,8 +55,9 @@ u8 rtw_btcoex_RpwmVal(PADAPTER); u8 rtw_btcoex_LpsVal(PADAPTER); void rtw_btcoex_SetBTCoexist(PADAPTER, u8 bBtExist); void rtw_btcoex_SetChipType(PADAPTER, u8 chipType); -void rtw_btcoex_SetPGAntNum(PADAPTER, u8 antNum, u8 antInverse); +void rtw_btcoex_SetPGAntNum(PADAPTER, u8 antNum); u8 rtw_btcoex_GetPGAntNum(PADAPTER); +void rtw_btcoex_SetSingleAntPath(PADAPTER padapter, u8 singleAntPath); u32 rtw_btcoex_GetRaMask(PADAPTER); void rtw_btcoex_RecordPwrMode(PADAPTER, u8 *pCmdBuf, u8 cmdLen); void rtw_btcoex_DisplayBtCoexInfo(PADAPTER, u8 *pbuf, u32 bufsize); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_byteorder.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_byteorder.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_cmd.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_cmd.h old mode 100644 new mode 100755 index ae1ace11c3fa..154cf4080896 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_cmd.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_cmd.h @@ -69,7 +69,8 @@ u32 cmd_issued_cnt; u32 cmd_done_cnt; u32 rsp_cnt; - u8 cmdthd_running; + ATOMIC_T cmdthd_running; + //u8 cmdthd_running; u8 stop_req; _adapter *padapter; _mutex sctx_mutex; @@ -221,6 +222,7 @@ enum rtw_drvextra_cmd_id DM_RA_MSK_WK_CID, //add for STA update RAMask when bandwith change. BEAMFORMING_WK_CID, LPS_CHANGE_DTIM_CID, + BTINFO_WK_CID, MAX_WK_CID }; @@ -386,7 +388,7 @@ when shared key ==> algorithm/keyid struct set_stakey_parm { u8 addr[ETH_ALEN]; u8 algorithm; - u8 id;// currently for erasing cam entry if algorithm == _NO_PRIVACY_ + u8 keyid; u8 key[16]; }; @@ -982,8 +984,11 @@ extern u8 rtw_createbss_cmd(_adapter *padapter); extern u8 rtw_createbss_cmd_ex(_adapter *padapter, unsigned char *pbss, unsigned int sz); u8 rtw_startbss_cmd(_adapter *padapter, int flags); extern u8 rtw_setphy_cmd(_adapter *padapter, u8 modem, u8 ch); -extern u8 rtw_setstakey_cmd(_adapter *padapter, u8 *psta, u8 unicast_key, bool enqueue); -extern u8 rtw_clearstakey_cmd(_adapter *padapter, u8 *psta, u8 entry, u8 enqueue); + +struct sta_info; +extern u8 rtw_setstakey_cmd(_adapter *padapter, struct sta_info *sta, u8 unicast_key, bool enqueue); +extern u8 rtw_clearstakey_cmd(_adapter *padapter, struct sta_info *sta, u8 enqueue); + extern u8 rtw_joinbss_cmd(_adapter *padapter, struct wlan_network* pnetwork); u8 rtw_disassoc_cmd(_adapter *padapter, u32 deauth_timeout_ms, bool enqueue); extern u8 rtw_setopmode_cmd(_adapter *padapter, NDIS_802_11_NETWORK_INFRASTRUCTURE networktype, bool enqueue); @@ -1027,6 +1032,10 @@ extern u8 rtw_ps_cmd(_adapter*padapter); u8 rtw_chk_hi_queue_cmd(_adapter*padapter); #endif +#ifdef CONFIG_BT_COEXIST +u8 rtw_btinfo_cmd(PADAPTER padapter, u8 *pbuf, u16 length); +#endif + u8 rtw_set_ch_cmd(_adapter*padapter, u8 ch, u8 bw, u8 ch_offset, u8 enqueue); extern u8 rtw_set_chplan_cmd(_adapter*padapter, u8 chplan, u8 enqueue, u8 swconfig); extern u8 rtw_led_blink_cmd(_adapter*padapter, PVOID pLed); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_debug.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_debug.h old mode 100644 new mode 100755 index 09490bc00cff..c9545411d892 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_debug.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_debug.h @@ -317,6 +317,12 @@ extern void rtl871x_cedbg(const char *fmt, ...); #endif /* defined(_dbgdump) */ #endif /* CONFIG_DEBUG_RTL871X */ +#ifdef CONFIG_DBG_COUNTER +#define DBG_COUNTER(counter) counter++ +#else +#define DBG_COUNTER(counter) +#endif + void dump_drv_version(void *sel); void dump_log_level(void *sel); @@ -417,6 +423,17 @@ ssize_t proc_set_odm_dbg_level(struct file *file, const char __user *buffer, siz int proc_get_odm_adaptivity(struct seq_file *m, void *v); ssize_t proc_set_odm_adaptivity(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); +#ifdef CONFIG_DBG_COUNTER +int proc_get_rx_logs(struct seq_file *m, void *v); +int proc_get_tx_logs(struct seq_file *m, void *v); +int proc_get_int_logs(struct seq_file *m, void *v); +#endif + +#ifdef CONFIG_PCI_HCI +int proc_get_rx_ring(struct seq_file *m, void *v); +int proc_get_tx_ring(struct seq_file *m, void *v); +#endif + #endif /* CONFIG_PROC_DEBUG */ #endif //__RTW_DEBUG_H__ diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_eeprom.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_eeprom.h old mode 100644 new mode 100755 index 2c0b9191836d..7705adc9bd52 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_eeprom.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_eeprom.h @@ -124,8 +124,8 @@ struct eeprom_priv u8 adjuseVoltageVal; #ifdef CONFIG_RF_GAIN_OFFSET - u8 EEPROMRFGainOffset; - u8 EEPROMRFGainVal; + u8 EEPROMRFGainOffset; + u8 EEPROMRFGainVal; #endif //CONFIG_RF_GAIN_OFFSET #ifdef CONFIG_SDIO_HCI diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_efuse.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_efuse.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_event.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_event.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_ht.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_ht.h old mode 100644 new mode 100755 index fb9948a10436..40269af8ed05 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_ht.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_ht.h @@ -32,6 +32,8 @@ struct ht_priv u32 tx_amsdu_maxlen; // 1: 8k, 0:4k ; default:8k, for tx u32 rx_ampdu_maxlen; //for rx reordering ctrl win_sz, updated when join_callback. + u8 rx_ampdu_min_spacing; + u8 ch_offset;//PRIME_CHNL_OFFSET u8 sgi_20m; u8 sgi_40m; diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_io.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_io.h old mode 100644 new mode 100755 index 10b21477426e..bad0acc5f4d9 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_io.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_io.h @@ -312,6 +312,11 @@ struct reg_protocol_wt { #define MAX_CONTINUAL_IO_ERR SD_IO_TRY_CNT #endif +#ifdef CONFIG_GSPI_HCI +#define SD_IO_TRY_CNT (8) +#define MAX_CONTINUAL_IO_ERR SD_IO_TRY_CNT +#endif + int rtw_inc_and_chk_continual_io_error(struct dvobj_priv *dvobj); void rtw_reset_continual_io_error(struct dvobj_priv *dvobj); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_ioctl.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_ioctl.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_ioctl_query.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_ioctl_query.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_ioctl_rtl.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_ioctl_rtl.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_ioctl_set.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_ioctl_set.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_iol.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_iol.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_mem.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_mem.h new file mode 100755 index 000000000000..5283d777827f --- /dev/null +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_mem.h @@ -0,0 +1,38 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#ifndef __RTW_MEM_H__ +#define __RTW_MEM_H__ + +#include +#include +#include + + +#ifndef MAX_RECVBUF_SZ +#define MAX_RECVBUF_SZ (32768-RECVBUFF_ALIGN_SZ) // 32k +#endif + +struct u8* rtw_alloc_revcbuf_premem(void); +struct sk_buff *rtw_alloc_skb_premem(void); +int rtw_free_skb_premem(struct sk_buff *pskb); + + +#endif //__RTW_MEM_H__ + diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_mlme.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_mlme.h old mode 100644 new mode 100755 index bd964425ef82..891bdaf8f387 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_mlme.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_mlme.h @@ -619,6 +619,8 @@ struct mlme_priv { u8 scanning_via_buddy_intf; #endif + u8 NumOfBcnInfoChkFail; + u32 timeBcnInfoChkStart; }; #define rtw_mlme_set_auto_scan_int(adapter, ms) \ diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_mlme_ext.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_mlme_ext.h old mode 100644 new mode 100755 index d30960531b65..35381e4c3c51 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_mlme_ext.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_mlme_ext.h @@ -104,6 +104,15 @@ #define _48M_RATE_ 10 #define _54M_RATE_ 11 +/******************************************************** +MCS rate definitions +*********************************************************/ +#define MCS_RATE_1R (0x000000ff) +#define MCS_RATE_2R (0x0000ffff) +#define MCS_RATE_3R (0x00ffffff) +#define MCS_RATE_4R (0xffffffff) +#define MCS_RATE_2R_13TO15_OFF (0x00001fff) + extern unsigned char RTW_WPA_OUI[]; extern unsigned char WMM_OUI[]; @@ -553,6 +562,9 @@ struct mlme_ext_priv struct p2p_channels channel_list; unsigned char basicrate[NumRates]; unsigned char datarate[NumRates]; +#ifdef CONFIG_80211N_HT + unsigned char default_supported_mcs_set[16]; +#endif struct ss_res sitesurvey_res; struct mlme_ext_info mlmext_info;//for sta/adhoc mode, including current scanning/connecting/connected related info. @@ -600,6 +612,7 @@ struct mlme_ext_priv }; +void init_mlme_default_rate_set(_adapter* padapter); int init_mlme_ext_priv(_adapter* padapter); int init_hw_mlme_ext(_adapter *padapter); void free_mlme_ext_priv (struct mlme_ext_priv *pmlmeext); @@ -615,6 +628,7 @@ unsigned char networktype_to_raid_ex(_adapter *adapter, struct sta_info *psta); u8 judge_network_type(_adapter *padapter, unsigned char *rate, int ratelen); void get_rate_set(_adapter *padapter, unsigned char *pbssrate, int *bssrate_len); +void set_mcs_rate_by_mask(u8 *mcs_set, u32 mask); void UpdateBrateTbl(_adapter *padapter,u8 *mBratesOS); void UpdateBrateTblForSoftAP(u8 *bssrateset, u32 bssratelen); void change_band_update_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork); @@ -725,7 +739,11 @@ unsigned int is_ap_in_tkip(_adapter *padapter); unsigned int is_ap_in_wep(_adapter *padapter); unsigned int should_forbid_n_rate(_adapter * padapter); -extern uint rtw_get_camid(uint macid); +s16 rtw_get_camid(_adapter *adapter, struct sta_info* sta, s16 kid); +s16 rtw_camid_search(_adapter *adapter, u8 *addr, s16 kid); +s16 rtw_camid_alloc(_adapter *adapter, struct sta_info *sta, u8 kid); +void rtw_camid_free(_adapter *adapter, u8 cam_id); + extern void rtw_alloc_macid(_adapter *padapter, struct sta_info *psta); extern void rtw_release_macid(_adapter *padapter, struct sta_info *psta); extern u8 rtw_search_max_mac_id(_adapter *padapter); @@ -855,6 +873,7 @@ extern void correct_TSF(_adapter *padapter, struct mlme_ext_priv *pmlmeext); extern void adaptive_early_32k(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len); extern u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer); + #ifdef CONFIG_CONCURRENT_MODE sint check_buddy_mlmeinfo_state(_adapter *padapter, u32 state); void concurrent_chk_joinbss_done(_adapter *padapter, int join_res); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_mp.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_mp.h old mode 100644 new mode 100755 index 81678985d14f..3fa8bb232f83 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_mp.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_mp.h @@ -347,6 +347,9 @@ enum { CTA_TEST, MP_DISABLE_BT_COEXIST, MP_PwrCtlDM, +#ifdef CONFIG_WOWLAN + MP_WOW_ENABLE, +#endif #ifdef CONFIG_AP_WOWLAN MP_AP_WOW_ENABLE, #endif @@ -379,7 +382,7 @@ struct mp_priv u32 rx_pktcount_filter_out; u32 rx_crcerrpktcount; u32 rx_pktloss; - + BOOLEAN rx_bindicatePkt; struct recv_stat rxstat; //RF/BB relative @@ -471,14 +474,6 @@ typedef struct _MP_FIRMWARE { u8 szFwBuffer[0x8000]; #endif u32 ulFwLength; - -#ifdef CONFIG_EMBEDDED_FWIMG - u8* szBTFwBuffer; - u8 myBTFwBuffer[0x8000]; -#else - u8 szBTFwBuffer[0x8000]; -#endif - u32 ulBTFwLength; } RT_MP_FIRMWARE, *PRT_MP_FIRMWARE; @@ -681,6 +676,9 @@ typedef enum _MPT_TXPWR_DEF{ #elif defined(CONFIG_RTL8723B) #define REG_RF_BB_GAIN_OFFSET 0x7f #define RF_GAIN_OFFSET_MASK 0xfffff +#elif defined(CONFIG_RTL8188E) + #define REG_RF_BB_GAIN_OFFSET 0x55 + #define RF_GAIN_OFFSET_MASK 0xfffff #else #define REG_RF_BB_GAIN_OFFSET 0x55 #define RF_GAIN_OFFSET_MASK 0xfffff @@ -783,7 +781,7 @@ extern u8 Hal_ReadRFThermalMeter(PADAPTER pAdapter); extern void Hal_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart); extern void Hal_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart); extern void Hal_ProSetCrystalCap (PADAPTER pAdapter , u32 CrystalCapVal); -extern void _rtw_mp_xmit_priv(struct xmit_priv *pxmitpriv); +//extern void _rtw_mp_xmit_priv(struct xmit_priv *pxmitpriv); extern void MP_PHY_SetRFPathSwitch(PADAPTER pAdapter ,BOOLEAN bMain); extern ULONG mpt_ProQueryCalTxPower(PADAPTER pAdapter,u8 RfPath); extern void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_mp_ioctl.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_mp_ioctl.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_mp_phy_regdef.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_mp_phy_regdef.h old mode 100644 new mode 100755 index 781bb8219948..340015cd3b2b --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_mp_phy_regdef.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_mp_phy_regdef.h @@ -1014,11 +1014,12 @@ #define bMaskByte1 0xff00 #define bMaskByte2 0xff0000 #define bMaskByte3 0xff000000 -#define bMaskHWord 0xffff0000 +#define bMaskHWord 0xffff0000 #define bMaskLWord 0x0000ffff -#define bMaskDWord 0xffffffff -#define bMaskH4Bits 0xf0000000 -#define bMaskOFDM_D 0xffc00000 +#define bMaskDWord 0xffffffff +#define bMaskH4Bits 0xf0000000 +#define bMaskH3Bytes 0xffffff00 +#define bMaskOFDM_D 0xffc00000 #define bMaskCCK 0x3f3f3f3f #define bMask12Bits 0xfff diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_odm.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_odm.h old mode 100644 new mode 100755 index 50edd0124aee..04543f76db31 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_odm.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_odm.h @@ -34,6 +34,7 @@ void rtw_odm_dbg_level_set(_adapter *adapter, u32 level); void rtw_odm_ability_msg(void *sel, _adapter *adapter); void rtw_odm_ability_set(_adapter *adapter, u32 ability); +bool rtw_odm_adaptivity_needed(_adapter *adapter); void rtw_odm_adaptivity_parm_msg(void *sel,_adapter *adapter); void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 TH_L2H_ini, s8 TH_EDCCA_HL_diff, s8 IGI_Base, bool ForceEDCCA, u8 AdapEn_RSSI, u8 IGI_LowerBound); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_p2p.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_p2p.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_pwrctrl.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_pwrctrl.h old mode 100644 new mode 100755 index a843e30e9648..8b3f3ab568dc --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_pwrctrl.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_pwrctrl.h @@ -324,6 +324,7 @@ struct pwrctrl_priv u8 wowlan_pno_enable; #ifdef CONFIG_PNO_SUPPORT u8 pno_in_resume; + u8 pno_inited; pno_nlo_info_t *pnlo_info; pno_scan_info_t *pscan_info; pno_ssid_list_t *pno_ssid_list; @@ -402,8 +403,6 @@ extern void cpwm_int_hdl(PADAPTER padapter, struct reportpwrstate_parm *preportp extern void LPS_Leave_check(PADAPTER padapter); #endif -extern void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode, const char *msg); -extern void rtw_set_rpwm(_adapter * padapter, u8 val8); extern void LeaveAllPowerSaveMode(PADAPTER Adapter); extern void LeaveAllPowerSaveModeDirect(PADAPTER Adapter); #ifdef CONFIG_IPS @@ -429,7 +428,9 @@ int rtw_fw_ps_state(PADAPTER padapter); s32 LPS_RF_ON_check(PADAPTER padapter, u32 delay_ms); void LPS_Enter(PADAPTER padapter, const char *msg); void LPS_Leave(PADAPTER padapter, const char *msg); -void traffic_check_for_leave_lps(PADAPTER padapter, u8 tx, u32 tx_packets); +void traffic_check_for_leave_lps(PADAPTER padapter, u8 tx, u32 tx_packets); +void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode, const char *msg); +void rtw_set_rpwm(_adapter * padapter, u8 val8); #endif #ifdef CONFIG_RESUME_IN_WORKQUEUE diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_qos.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_qos.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_recv.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_recv.h old mode 100644 new mode 100755 index 271a7870d73d..ce01eb193e73 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_recv.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_recv.h @@ -206,8 +206,8 @@ struct rx_raw_rssi u8 mimo_singal_strength[4];// in 0~100 index u8 mimo_singal_quality[4]; - s8 ofdm_pwr[4]; - u8 ofdm_snr[4]; + s8 ofdm_pwr[4]; + u8 ofdm_snr[4]; }; #endif @@ -278,7 +278,16 @@ struct rx_pkt_attrib { #define RECVBUFF_ALIGN_SZ 8 +#if defined (CONFIG_RTL8192E) + #ifdef CONFIG_PCI_HCI + #define RXDESC_SIZE 16 + #define RX_WIFI_INFO_SIZE 24 + #else + #define RXDESC_SIZE 24 + #endif +#else #define RXDESC_SIZE 24 +#endif #define RXDESC_OFFSET RXDESC_SIZE struct recv_stat @@ -287,10 +296,13 @@ struct recv_stat unsigned int rxdw1; +#if !(defined(CONFIG_RTL8192E) && defined(CONFIG_PCI_HCI)) //exclude 8192ee unsigned int rxdw2; unsigned int rxdw3; +#endif +#ifndef BUF_DESC_ARCH unsigned int rxdw4; unsigned int rxdw5; @@ -300,6 +312,7 @@ struct recv_stat unsigned int rxdw7; #endif +#endif //if BUF_DESC_ARCH is defined, rx_buf_desc occupy 4 double words }; #define EOR BIT(30) @@ -397,9 +410,6 @@ struct recv_priv struct ifqueue rx_indicate_queue; #endif // CONFIG_RX_INDICATE_QUEUE -#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX - _queue recv_buf_pending_queue; -#endif // CONFIG_USE_USB_BUFFER_ALLOC_RX #endif //defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD) u8 *pallocated_recv_buf; @@ -407,7 +417,7 @@ struct recv_priv _queue free_recv_buf_queue; u32 free_recv_buf_queue_cnt; -#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) +#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) || defined(CONFIG_USB_HCI) _queue recv_buf_pending_queue; #endif @@ -429,7 +439,7 @@ struct recv_priv struct rx_raw_rssi raw_rssi_info; #endif //s8 rxpwdb; - u8 noise; + s16 noise; //int RxSNRdB[2]; //s8 RxRssi[2]; //int FalseAlmCnt_all; @@ -825,9 +835,14 @@ __inline static s32 translate_percentage_to_dbm(u32 SignalStrengthIndex) { s32 SignalPower; // in dBm. +#ifdef CONFIG_SKIP_SIGNAL_SCALE_MAPPING + // Translate to dBm (x=y-100) + SignalPower = SignalStrengthIndex - 100; +#else // Translate to dBm (x=0.5y-95). SignalPower = (s32)((SignalStrengthIndex + 1) >> 1); SignalPower -= 95; +#endif return SignalPower; } diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_rf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_rf.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_security.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_security.h old mode 100644 new mode 100755 index f89e64390aaa..00b08fd75e46 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_security.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_security.h @@ -209,6 +209,30 @@ struct security_priv //u8 szCapability[256]; // For WPA2-PSK using zero-config, by Annie, 2005-09-20. u8 bWepDefaultKeyIdxSet; + +#define DBG_SW_SEC_CNT +#ifdef DBG_SW_SEC_CNT + u64 wep_sw_enc_cnt_bc; + u64 wep_sw_enc_cnt_mc; + u64 wep_sw_enc_cnt_uc; + u64 wep_sw_dec_cnt_bc; + u64 wep_sw_dec_cnt_mc; + u64 wep_sw_dec_cnt_uc; + + u64 tkip_sw_enc_cnt_bc; + u64 tkip_sw_enc_cnt_mc; + u64 tkip_sw_enc_cnt_uc; + u64 tkip_sw_dec_cnt_bc; + u64 tkip_sw_dec_cnt_mc; + u64 tkip_sw_dec_cnt_uc; + + u64 aes_sw_enc_cnt_bc; + u64 aes_sw_enc_cnt_mc; + u64 aes_sw_enc_cnt_uc; + u64 aes_sw_dec_cnt_bc; + u64 aes_sw_dec_cnt_mc; + u64 aes_sw_dec_cnt_uc; +#endif /* DBG_SW_SEC_CNT */ }; struct sha256_state { diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_sreset.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_sreset.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_tdls.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_tdls.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_version.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_version.h old mode 100644 new mode 100755 index 91c45029df5e..516429f7e088 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_version.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_version.h @@ -1,2 +1,2 @@ -#define DRIVERVERSION "v4.3.0_10670.20140303_BTCOEX20140123-4A40" -#define BTCOEXVERSION "BTCOEX20140123-4A40" +#define DRIVERVERSION "v4.3.6.11_12942.20141204_BTCOEX20140507-4E40" +#define BTCOEXVERSION "BTCOEX20140507-4E40" diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_vht.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_vht.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_wapi.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_wapi.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_wifi_regd.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_wifi_regd.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_xmit.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_xmit.h old mode 100644 new mode 100755 index 363ee611dcd1..10bfb182a16f --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_xmit.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_xmit.h @@ -79,7 +79,7 @@ #define MAX_XMIT_EXTBUF_SZ (1536) #define NR_XMIT_EXTBUFF (32) -#define MAX_CMDBUF_SZ (4096) +#define MAX_CMDBUF_SZ (5120) //(4096) #define MAX_NUMBLKS (1) @@ -144,8 +144,24 @@ do{\ #define HWXMIT_ENTRY 4 -#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)|| defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8723B) +// For Buffer Descriptor ring architecture +#ifdef BUF_DESC_ARCH +#if defined (CONFIG_RTL8192E) +#define TX_BUFFER_SEG_NUM 1 // 0:2 seg, 1: 4 seg, 2: 8 seg. +#endif +#endif + +#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)|| defined(CONFIG_RTL8723B) #define TXDESC_SIZE 40 +//8192EE_TODO +#elif defined (CONFIG_RTL8192E) // this section is defined for buffer descriptor ring architecture + #ifdef CONFIG_PCI_HCI + #define TXDESC_SIZE ((TX_BUFFER_SEG_NUM ==0)?16: ((TX_BUFFER_SEG_NUM ==1)? 32:64) ) + #define TX_WIFI_INFO_SIZE 40 + #else //USB or SDIO + #define TXDESC_SIZE 40 + #endif +//8192EE_TODO #else #define TXDESC_SIZE 32 #endif @@ -169,9 +185,13 @@ do{\ #endif #ifdef CONFIG_PCI_HCI +#if defined(CONFIG_RTL8192E) // this section is defined for buffer descriptor ring architecture +#define TXDESC_OFFSET TX_WIFI_INFO_SIZE +#else #define TXDESC_OFFSET 0 +#endif #define TX_DESC_NEXT_DESC_OFFSET (TXDESC_SIZE + 8) -#endif +#endif //CONFIG_PCI_HCI enum TXDESC_SC{ SC_DONT_CARE = 0x00, @@ -186,6 +206,20 @@ enum TXDESC_SC{ #define TXDESC_40_BYTES #endif +#if defined(CONFIG_RTL8192E) && defined(CONFIG_PCI_HCI) //8192ee +//8192EE_TODO +struct tx_desc +{ + unsigned int txdw0; + unsigned int txdw1; + unsigned int txdw2; + unsigned int txdw3; + unsigned int txdw4; + unsigned int txdw5; + unsigned int txdw6; + unsigned int txdw7; +}; +#else struct tx_desc { unsigned int txdw0; @@ -216,7 +250,7 @@ struct tx_desc unsigned int txdw15; #endif }; - +#endif union txdesc { struct tx_desc txdesc; @@ -227,12 +261,13 @@ union txdesc { #define PCI_MAX_TX_QUEUE_COUNT 8 struct rtw_tx_ring { + unsigned char qid; struct tx_desc *desc; - dma_addr_t dma; - unsigned int idx; - unsigned int entries; - _queue queue; - u32 qlen; + dma_addr_t dma; + unsigned int idx; + unsigned int entries; + _queue queue; + u32 qlen; }; #endif @@ -331,6 +366,7 @@ struct pkt_attrib u8 ch_offset;//PRIME_CHNL_OFFSET u8 sgi;//short GI u8 ampdu_en;//tx ampdu enable + u8 ampdu_spacing; //ampdu_min_spacing for peer sta's rx u8 mdata;//more data bit u8 pctrl;//per packet txdesc control enable u8 triggered;//for ap mode handling Power Saving sta @@ -491,6 +527,10 @@ struct xmit_buf #endif #endif +#ifdef CONFIG_PCI_HCI + struct tx_desc *desc; +#endif + #if defined(DBG_XMIT_BUF )|| defined(DBG_XMIT_BUF_EXT) u8 no; #endif @@ -587,6 +627,12 @@ struct agg_pkt_info{ u16 pkt_len; }; +enum cmdbuf_type { + CMDBUF_BEACON = 0x00, + CMDBUF_RSVD, + CMDBUF_MAX +}; + struct xmit_priv { _lock lock; @@ -674,7 +720,7 @@ struct xmit_priv { #endif #endif -#ifdef CONFIG_SDIO_HCI +#if defined (CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) #ifdef CONFIG_SDIO_TX_TASKLET #ifdef PLATFORM_LINUX struct tasklet_struct xmit_tasklet; @@ -697,7 +743,7 @@ struct xmit_priv { u8 *pxmit_extbuf; uint free_xmit_extbuf_cnt; - struct xmit_buf pcmd_xmitbuf; + struct xmit_buf pcmd_xmitbuf[CMDBUF_MAX]; u16 nqos_ssn; #ifdef CONFIG_TX_EARLY_MODE @@ -720,9 +766,10 @@ struct xmit_priv { _lock lock_sctx; }; -extern struct xmit_frame *rtw_alloc_cmdxmitframe(struct xmit_priv *pxmitpriv); -extern struct xmit_buf *rtw_alloc_cmd_xmitbuf(struct xmit_priv *pxmitpriv); -extern s32 rtw_free_cmd_xmitbuf(struct xmit_priv *pxmitpriv); +extern struct xmit_frame *__rtw_alloc_cmdxmitframe(struct xmit_priv *pxmitpriv, + enum cmdbuf_type buf_type); +#define rtw_alloc_cmdxmitframe(p) __rtw_alloc_cmdxmitframe(p, CMDBUF_RSVD) +#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe(p, CMDBUF_BEACON) extern struct xmit_buf *rtw_alloc_xmitbuf_ext(struct xmit_priv *pxmitpriv); extern s32 rtw_free_xmitbuf_ext(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); @@ -733,7 +780,7 @@ extern s32 rtw_free_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitb void rtw_count_tx_stats(_adapter *padapter, struct xmit_frame *pxmitframe, int sz); extern void rtw_update_protection(_adapter *padapter, u8 *ie, uint ie_len); static s32 update_attrib_sec_info(_adapter *padapter, struct pkt_attrib *pattrib, struct sta_info *psta); -static void update_attrib_phy_info(struct pkt_attrib *pattrib, struct sta_info *psta); +static void update_attrib_phy_info(_adapter *padapter, struct pkt_attrib *pattrib, struct sta_info *psta); extern s32 rtw_make_wlanhdr(_adapter *padapter, u8 *hdr, struct pkt_attrib *pattrib); extern s32 rtw_put_snap(u8 *data, u16 h_proto); @@ -776,7 +823,7 @@ void rtw_free_hwxmits(_adapter *padapter); s32 rtw_xmit(_adapter *padapter, _pkt **pkt); - +bool xmitframe_hiq_filter(struct xmit_frame *xmitframe); #if defined(CONFIG_AP_MODE) || defined(CONFIG_TDLS) sint xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *pxmitframe); void stop_sta_xmit(_adapter *padapter, struct sta_info *psta); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/sta_info.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/sta_info.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/usb_hal.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/usb_hal.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/usb_ops.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/usb_ops.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/usb_ops_linux.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/usb_ops_linux.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/usb_osintf.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/usb_osintf.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/usb_vendor_req.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/usb_vendor_req.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/wifi.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/wifi.h old mode 100644 new mode 100755 index d73aa1b5a548..dff95b413506 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/wifi.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/wifi.h @@ -48,6 +48,7 @@ #define WLAN_MIN_ETHFRM_LEN 60 #define WLAN_MAX_ETHFRM_LEN 1514 #define WLAN_ETHHDR_LEN 14 +#define WLAN_WMM_LEN 24 #define P80211CAPTURE_VERSION 0x80211001 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/wlan_bssdef.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/wlan_bssdef.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/xmit_osdep.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/xmit_osdep.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/custom_gpio_linux.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/custom_gpio_linux.c old mode 100644 new mode 100755 index 46ae1d140c68..45606cdde5d7 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/custom_gpio_linux.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/custom_gpio_linux.c @@ -277,7 +277,42 @@ void rtw_wifi_gpio_wlan_ctrl(int onoff) } #endif //ANDROID_2X -#else // !CONFIG_PLATFORM_SPRD +#elif defined(CONFIG_PLATFORM_ARM_RK3066) +#include + +#define GPIO_WIFI_IRQ RK30_PIN2_PC2 +extern unsigned int oob_irq; +int rtw_wifi_gpio_init(void) +{ +#ifdef CONFIG_GSPI_HCI + if (GPIO_WIFI_IRQ > 0) { + rk30_mux_api_set(GPIO2C2_LCDC1DATA18_SMCBLSN1_HSADCDATA5_NAME, GPIO2C_GPIO2C2);//jacky_test + gpio_request(GPIO_WIFI_IRQ, "oob_irq"); + gpio_direction_input(GPIO_WIFI_IRQ); + + oob_irq = gpio_to_irq(GPIO_WIFI_IRQ); + + DBG_8192C("%s oob_irq:%d\n", __func__, oob_irq); + } +#endif + return 0; +} + + +int rtw_wifi_gpio_deinit(void) +{ +#ifdef CONFIG_GSPI_HCI + if (GPIO_WIFI_IRQ > 0) + gpio_free(GPIO_WIFI_IRQ); +#endif + return 0; +} + +void rtw_wifi_gpio_wlan_ctrl(int onoff) +{ +} + +#else int rtw_wifi_gpio_init(void) { diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/ioctl_cfg80211.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/ioctl_cfg80211.c old mode 100644 new mode 100755 index 04cf754cbdba..a0dedaf6152e --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/ioctl_cfg80211.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/ioctl_cfg80211.c @@ -28,7 +28,7 @@ #define RTW_MAX_MGMT_TX_CNT (8) #define RTW_SCAN_IE_LEN_MAX 2304 -#define RTW_MAX_REMAIN_ON_CHANNEL_DURATION 3000 //ms +#define RTW_MAX_REMAIN_ON_CHANNEL_DURATION 5000 //ms #define RTW_MAX_NUM_PMKIDS 4 #define RTW_CH_MAX_2G_CHANNEL 14 /* Max channel in 2G band */ @@ -350,6 +350,19 @@ static int rtw_ieee80211_channel_to_frequency(int chan, int band) } } +static u64 rtw_get_systime_us(void) +{ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,39)) + struct timespec ts; + get_monotonic_boottime(&ts); + return ((u64)ts.tv_sec*1000000) + ts.tv_nsec / 1000; +#else + struct timeval tv; + do_gettimeofday(&tv); + return ((u64)tv.tv_sec*1000000) + tv.tv_usec; +#endif +} + #define MAX_BSSINFO_LEN 1000 struct cfg80211_bss *rtw_cfg80211_inform_bss(_adapter *padapter, struct wlan_network *pnetwork) { @@ -481,13 +494,14 @@ struct cfg80211_bss *rtw_cfg80211_inform_bss(_adapter *padapter, struct wlan_net notify_channel = ieee80211_get_channel(wiphy, freq); - //rtw_get_timestampe_from_ie() - notify_timestamp = jiffies_to_msecs(jiffies)*1000; /* uSec */ + if (0) + notify_timestamp = le64_to_cpu(*(u64*)rtw_get_timestampe_from_ie(pnetwork->network.IEs)); + else + notify_timestamp = rtw_get_systime_us(); notify_interval = le16_to_cpu(*(u16*)rtw_get_beacon_interval_from_ie(pnetwork->network.IEs)); notify_capability = le16_to_cpu(*(u16*)rtw_get_capability_from_ie(pnetwork->network.IEs)); - notify_ie = pnetwork->network.IEs+_FIXED_IE_LENGTH_; notify_ielen = pnetwork->network.IELength-_FIXED_IE_LENGTH_; @@ -505,7 +519,7 @@ struct cfg80211_bss *rtw_cfg80211_inform_bss(_adapter *padapter, struct wlan_net DBG_8192C("Capability: %X\n", notify_capability); DBG_8192C("Beacon interval: %d\n", notify_interval); DBG_8192C("Signal: %d\n", notify_signal); - DBG_8192C("notify_timestamp: %#018llx\n", notify_timestamp); + DBG_8192C("notify_timestamp: %llu\n", notify_timestamp); #endif pbuf = buf; @@ -535,13 +549,14 @@ struct cfg80211_bss *rtw_cfg80211_inform_bss(_adapter *padapter, struct wlan_net _rtw_memcpy(pbuf, pnetwork->network.IEs, pnetwork->network.IELength); len += pnetwork->network.IELength; + *((u64*)pbuf) = cpu_to_le64(notify_timestamp); + //#ifdef CONFIG_P2P //if(rtw_get_p2p_ie(pnetwork->network.IEs+12, pnetwork->network.IELength-12, NULL, NULL)) //{ // DBG_8192C("%s, got p2p_ie\n", __func__); //} //#endif - #if 1 bss = cfg80211_inform_bss_frame(wiphy, notify_channel, (struct ieee80211_mgmt *)buf, @@ -627,6 +642,12 @@ int rtw_cfg80211_check_bss(_adapter *padapter) pnetwork->Ssid.SsidLength, WLAN_CAPABILITY_ESS, WLAN_CAPABILITY_ESS); +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) + cfg80211_put_bss(padapter->rtw_wdev->wiphy, bss); +#else + cfg80211_put_bss(bss); +#endif + return (bss!=NULL); } @@ -786,14 +807,18 @@ check_bss: } else { +#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0) || defined(COMPAT_KERNEL_RELEASE) DBG_8192C("pwdev->sme_state(b)=%d\n", pwdev->sme_state); +#endif // kernel < 3.11 cfg80211_connect_result(padapter->pnetdev, cur_network->network.MacAddress , pmlmepriv->assoc_req+sizeof(struct rtw_ieee80211_hdr_3addr)+2 , pmlmepriv->assoc_req_len-sizeof(struct rtw_ieee80211_hdr_3addr)-2 , pmlmepriv->assoc_rsp+sizeof(struct rtw_ieee80211_hdr_3addr)+6 , pmlmepriv->assoc_rsp_len-sizeof(struct rtw_ieee80211_hdr_3addr)-6 , WLAN_STATUS_SUCCESS, GFP_ATOMIC); +#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0) || defined(COMPAT_KERNEL_RELEASE) DBG_8192C("pwdev->sme_state(a)=%d\n", pwdev->sme_state); +#endif // kernel < 3.11 } } @@ -832,6 +857,7 @@ void rtw_cfg80211_indicate_disconnect(_adapter *padapter) #endif //CONFIG_P2P if (!padapter->mlmepriv.not_indic_disco) { +#if LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0) || defined(COMPAT_KERNEL_RELEASE) DBG_8192C("pwdev->sme_state(b)=%d\n", pwdev->sme_state); if(pwdev->sme_state==CFG80211_SME_CONNECTING) @@ -843,6 +869,13 @@ void rtw_cfg80211_indicate_disconnect(_adapter *padapter) //DBG_8192C("pwdev->sme_state=%d\n", pwdev->sme_state); DBG_8192C("pwdev->sme_state(a)=%d\n", pwdev->sme_state); +#else // kernel >= 3.11 + if (check_fwstate(&padapter->mlmepriv, _FW_LINKED)) + cfg80211_disconnected(padapter->pnetdev, 0, NULL, 0, GFP_ATOMIC); + else + cfg80211_connect_result(padapter->pnetdev, NULL, NULL, 0, NULL, 0, + WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_ATOMIC/*GFP_KERNEL*/); +#endif // kernel >= 3.11 } } @@ -1274,7 +1307,7 @@ _func_enter_; //DEBUG_ERR((" param->u.crypt.key_len=%d\n",param->u.crypt.key_len)); DBG_871X(" ~~~~set sta key:unicastkey\n"); - rtw_setstakey_cmd(padapter, (unsigned char *)psta, _TRUE, _TRUE); + rtw_setstakey_cmd(padapter, psta, _TRUE, _TRUE); } else//group key { @@ -1288,14 +1321,7 @@ _func_enter_; DBG_871X(" ~~~~set sta key:groupkey\n"); padapter->securitypriv.dot118021XGrpKeyid = param->u.crypt.idx; -#ifdef CONFIG_CONCURRENT_MODE - if (padapter->adapter_type == PRIMARY_ADAPTER) - rtw_set_key(padapter,&padapter->securitypriv,param->u.crypt.idx, 1, _TRUE); - else - DBG_871X_LEVEL(_drv_always_, "second interface do not set cam.\n"); -#else rtw_set_key(padapter,&padapter->securitypriv,param->u.crypt.idx, 1, _TRUE); -#endif } #ifdef CONFIG_IEEE80211W else if(strcmp(param->u.crypt.alg, "BIP") == 0) @@ -1541,6 +1567,12 @@ static int cfg80211_rtw_add_key(struct wiphy *wiphy, struct net_device *ndev, ret = rtw_cfg80211_ap_set_encryption(ndev, param, param_len); #endif } + else if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE + || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) + { + //DBG_8192C("@@@@@@@@@@ fw_state=0x%x, iftype=%d\n", pmlmepriv->fw_state, rtw_wdev->iftype); + ret = rtw_cfg80211_set_encryption(ndev, param, param_len); + } else { DBG_8192C("error! fw_state=0x%x, iftype=%d\n", pmlmepriv->fw_state, rtw_wdev->iftype); @@ -1897,6 +1929,30 @@ void rtw_cfg80211_indicate_scan_done(_adapter *adapter, bool aborted) _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); } +void rtw_cfg80211_unlink_bss(_adapter *padapter, struct wlan_network *pnetwork) +{ + struct wireless_dev *pwdev = padapter->rtw_wdev; + struct wiphy *wiphy = pwdev->wiphy; + struct cfg80211_bss *bss = NULL; + WLAN_BSSID_EX select_network = pnetwork->network; + + bss = cfg80211_get_bss(wiphy, NULL/*notify_channel*/, + select_network.MacAddress, select_network.Ssid.Ssid, + select_network.Ssid.SsidLength, 0/*WLAN_CAPABILITY_ESS*/, + 0/*WLAN_CAPABILITY_ESS*/); + + if (bss) { + cfg80211_unlink_bss(wiphy, bss); + DBG_8192C("%s(): cfg80211_unlink %s!! () ",__func__,select_network.Ssid.Ssid ); +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) + cfg80211_put_bss(padapter->rtw_wdev->wiphy, bss); +#else + cfg80211_put_bss(bss); +#endif + } + return; +} + void rtw_cfg80211_surveydone_event_callback(_adapter *padapter) { _irqL irqL; @@ -2296,18 +2352,15 @@ if (padapter->registrypriv.mp_mode == 1) #endif /* CONFIG_CONCURRENT_MODE */ #ifdef CONFIG_P2P - if( pwdinfo->driver_interface == DRIVER_CFG80211 ) + if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) { - if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) - { - rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); - rtw_free_network_queue(padapter, _TRUE); + rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); + rtw_free_network_queue(padapter, _TRUE); - if(social_channel == 0) - rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); - else - rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_SOCIAL_LAST); - } + if(social_channel == 0) + rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); + else + rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_SOCIAL_LAST); } #endif //CONFIG_P2P @@ -4021,7 +4074,7 @@ static int cfg80211_rtw_start_ap(struct wiphy *wiphy, struct net_device *ndev, WLAN_BSSID_EX *pbss_network_ext = &adapter->mlmeextpriv.mlmext_info.network; if(0) - DBG_871X(FUNC_ADPT_FMT" ssid:(%s,%d), from ie:(%s,%d)\n", FUNC_ADPT_ARG(adapter), + DBG_871X(FUNC_ADPT_FMT" ssid:(%s,%zu), from ie:(%s,%d)\n", FUNC_ADPT_ARG(adapter), settings->ssid, settings->ssid_len, pbss_network->Ssid.Ssid, pbss_network->Ssid.SsidLength); @@ -4167,14 +4220,53 @@ static int cfg80211_rtw_change_station(struct wiphy *wiphy, struct net_device *n return 0; } +struct sta_info *rtw_sta_info_get_by_idx(const int idx, struct sta_priv *pstapriv) + +{ + _list *phead, *plist; + struct sta_info *psta = NULL; + int i = 0; + + phead = &pstapriv->asoc_list; + plist = get_next(phead); + + //check asoc_queue + while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) + { + if(idx == i) psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); + plist = get_next(plist); + i++; + } + return psta; +} + static int cfg80211_rtw_dump_station(struct wiphy *wiphy, struct net_device *ndev, int idx, u8 *mac, struct station_info *sinfo) { - DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); - //TODO: dump scanned queue + int ret = 0; + _irqL irqL; + _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); + struct sta_info *psta = NULL; + struct sta_priv *pstapriv = &padapter->stapriv; + DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(ndev)); - return -ENOENT; + _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); + psta = rtw_sta_info_get_by_idx(idx, pstapriv); + _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); + if(NULL == psta) + { + DBG_871X("Station is not found\n"); + ret = -ENOENT; + goto exit; + } + _rtw_memcpy(mac, psta->hwaddr, ETH_ALEN); + sinfo->filled = 0; + sinfo->filled |= STATION_INFO_SIGNAL; + sinfo->signal = psta->rssi; + +exit: + return ret; } static int cfg80211_rtw_change_bss(struct wiphy *wiphy, struct net_device *ndev, @@ -4988,31 +5080,44 @@ static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy, #else struct net_device *ndev, #endif +#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0)) || defined(COMPAT_KERNEL_RELEASE) struct ieee80211_channel *chan, #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) bool offchan, -#endif +#endif // kernel >= 2.6.38 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)) enum nl80211_channel_type channel_type, - #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) || defined(COMPAT_KERNEL_RELEASE) bool channel_type_valid, - #endif -#endif +#endif // kernel >= 2.6.37 +#endif // kernel < 3.8 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) || defined(COMPAT_KERNEL_RELEASE) unsigned int wait, -#endif +#endif // kernel >= 2.6.38 const u8 *buf, size_t len, #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) bool no_cck, -#endif +#endif // kernel >= 3.2 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,0)) bool dont_wait_for_ack, -#endif +#endif // kernel >= 3.3 +#else // kernel >= 3.14 + struct cfg80211_mgmt_tx_params *params, +#endif // kernel >= 3.14 u64 *cookie) { #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)) struct net_device *ndev = wdev_to_ndev(wdev); -#endif +#endif // kernel >= 3.6 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0)) || defined(COMPAT_KERNEL_RELEASE) + struct ieee80211_channel *chan = params->chan; + bool offchan = params->offchan; + unsigned int wait = params->wait; + const u8 *buf = params->buf; + size_t len = params->len; + bool no_cck = params->no_cck; + bool dont_wait_for_ack = params->dont_wait_for_ack; +#endif // kernel >= 3.14 int ret = 0; int tx_ret; u32 dump_limit = RTW_MAX_MGMT_TX_CNT; @@ -5289,7 +5394,6 @@ static int cfg80211_rtw_tdls_oper(struct wiphy *wiphy, } #endif /* CONFIG_TDLS */ - #if defined(CONFIG_PNO_SUPPORT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)) static int cfg80211_rtw_sched_scan_start(struct wiphy *wiphy, struct net_device *dev, @@ -5308,7 +5412,7 @@ static int cfg80211_rtw_sched_scan_start(struct wiphy *wiphy, check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE || check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) { DBG_871X("%s: device is busy.\n", __func__); - return -EBUSY; + rtw_scan_abort(padapter); } if (request == NULL) { @@ -5889,8 +5993,12 @@ static void rtw_cfg80211_preinit_wiphy(_adapter *padapter, struct wiphy *wiphy) #endif #if defined(CONFIG_PM) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) +#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,11,0)) wiphy->wowlan = wowlan_stub; -#endif +#else // kernel >= 3.11 + wiphy->wowlan = &wowlan_stub; +#endif // kernel >= 3.11 +#endif // kernle >= 3.0 #if defined(CONFIG_TDLS) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0)) wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS; diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/ioctl_linux.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/ioctl_linux.c old mode 100644 new mode 100755 index 397a6abe794e..6124cb80b901 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/ioctl_linux.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/ioctl_linux.c @@ -40,6 +40,10 @@ #define iwe_stream_add_point(a, b, c, d, e) iwe_stream_add_point(b, c, d, e) #endif +#ifdef CONFIG_80211N_HT +extern int rtw_ht_enable; +#endif + #define RTL_IOCTL_WPA_SUPPLICANT SIOCIWFIRSTPRIV+30 @@ -718,7 +722,12 @@ static char *translate_scan(_adapter *padapter, /* Add quality statistics */ iwe.cmd = IWEVQUAL; - iwe.u.qual.updated = IW_QUAL_QUAL_UPDATED | IW_QUAL_LEVEL_UPDATED | IW_QUAL_NOISE_INVALID + iwe.u.qual.updated = IW_QUAL_QUAL_UPDATED | IW_QUAL_LEVEL_UPDATED + #if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR) + | IW_QUAL_NOISE_UPDATED + #else + | IW_QUAL_NOISE_INVALID + #endif #ifdef CONFIG_SIGNAL_DISPLAY_DBM | IW_QUAL_DBM #endif @@ -737,15 +746,33 @@ static char *translate_scan(_adapter *padapter, #ifdef CONFIG_SIGNAL_DISPLAY_DBM iwe.u.qual.level = (u8) translate_percentage_to_dbm(ss);//dbm #else + #ifdef CONFIG_SKIP_SIGNAL_SCALE_MAPPING + { + /* Do signal scale mapping when using percentage as the unit of signal strength, since the scale mapping is skipped in odm */ + + HAL_DATA_TYPE *pHal = GET_HAL_DATA(padapter); + + iwe.u.qual.level = (u8)odm_SignalScaleMapping(&pHal->odmpriv, ss); + } + #else iwe.u.qual.level = (u8)ss;//% #endif + #endif iwe.u.qual.qual = (u8)sq; // signal quality #ifdef CONFIG_PLATFORM_ROCKCHIPS iwe.u.qual.noise = -100; // noise level suggest by zhf@rockchips #else + #if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR) + { + s16 tmp_noise=0; + rtw_hal_get_odm_var(padapter, HAL_ODM_NOISE_MONITOR,&(pnetwork->network.Configuration.DSConfig), &(tmp_noise)); + iwe.u.qual.noise = tmp_noise ; + } + #else iwe.u.qual.noise = 0; // noise level + #endif #endif //CONFIG_PLATFORM_ROCKCHIPS //DBG_871X("iqual=%d, ilevel=%d, inoise=%d, iupdated=%d\n", iwe.u.qual.qual, iwe.u.qual.level , iwe.u.qual.noise, iwe.u.qual.updated); @@ -994,7 +1021,7 @@ _func_enter_; //DEBUG_ERR((" param->u.crypt.key_len=%d\n",param->u.crypt.key_len)); DBG_871X(" ~~~~set sta key:unicastkey\n"); - rtw_setstakey_cmd(padapter, (unsigned char *)psta, _TRUE, _TRUE); + rtw_setstakey_cmd(padapter, psta, _TRUE, _TRUE); } else//group key { @@ -5220,7 +5247,14 @@ static int rtw_p2p_connect(struct net_device *dev, DBG_871X( "[%s] WiFi Direct is disable!\n", __FUNCTION__ ); return ret; } - + +#ifdef CONFIG_INTEL_WIDI + if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { + DBG_871X( "[%s] WiFi is under survey!\n", __FUNCTION__ ); + return ret; + } +#endif //CONFIG_INTEL_WIDI + if ( pwdinfo->ui_got_wps_info == P2P_NO_WPSINFO ) { return -1; @@ -5309,6 +5343,19 @@ static int rtw_p2p_connect(struct net_device *dev, else { DBG_871X( "[%s] Not Found in Scanning Queue~\n", __FUNCTION__ ); +#ifdef CONFIG_INTEL_WIDI + _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); + rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); + rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); + rtw_free_network_queue(padapter, _TRUE); + /** + * For WiDi, if we can't find candidate device in scanning queue, + * driver will do scanning itself + */ + _enter_critical_bh(&pmlmepriv->lock, &irqL); + rtw_sitesurvey_cmd(padapter, NULL, 0, NULL, 0); + _exit_critical_bh(&pmlmepriv->lock, &irqL); +#endif //CONFIG_INTEL_WIDI ret = -1; } exit: @@ -5988,7 +6035,7 @@ static int rtw_p2p_prov_disc(struct net_device *dev, else { #ifdef CONFIG_INTEL_WIDI - if(check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE){ + if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { DBG_871X( "[%s] WiFi is under survey!\n", __FUNCTION__ ); return ret; } @@ -6202,6 +6249,7 @@ static int rtw_p2p_prov_disc(struct net_device *dev, { DBG_871X( "[%s] NOT Found in the Scanning Queue!\n", __FUNCTION__ ); #ifdef CONFIG_INTEL_WIDI + _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); rtw_free_network_queue(padapter, _TRUE); @@ -7074,6 +7122,26 @@ static int rtw_dbg_port(struct net_device *dev, printk("%s ==> max_mac_id = %d \n",__FUNCTION__,max_mac_id); } break; + case 0x0b: //Enable=1, Disable=0 driver control vrtl_carrier_sense. + { + //u8 driver_vcs_en; //Enable=1, Disable=0 driver control vrtl_carrier_sense. + //u8 driver_vcs_type;//force 0:disable VCS, 1:RTS-CTS, 2:CTS-to-self when vcs_en=1. + + if(arg == 0){ + DBG_871X("disable driver ctrl vcs\n"); + padapter->driver_vcs_en = 0; + } + else if(arg == 1){ + DBG_871X("enable driver ctrl vcs = %d\n", extra_arg); + padapter->driver_vcs_en = 1; + + if(extra_arg>2) + padapter->driver_vcs_type = 1; + else + padapter->driver_vcs_type = extra_arg; + } + } + break; case 0x0c://dump rx/tx packet { if(arg == 0){ @@ -7098,6 +7166,23 @@ static int rtw_dbg_port(struct net_device *dev, } break; #endif + case 0x0e: + { + if(arg == 0){ + DBG_871X("disable driver ctrl rx_ampdu_factor\n"); + padapter->driver_rx_ampdu_factor = 0xFF; + } + else if(arg == 1){ + + DBG_871X("enable driver ctrl rx_ampdu_factor = %d\n", extra_arg); + + if((extra_arg & 0x03) > 0x03) + padapter->driver_rx_ampdu_factor = 0xFF; + else + padapter->driver_rx_ampdu_factor = extra_arg; + } + } + break; #ifdef DBG_CONFIG_ERROR_DETECT case 0x0f: { @@ -7194,6 +7279,120 @@ static int rtw_dbg_port(struct net_device *dev, rtw_hal_set_hwreg(padapter, HW_VAR_USB_MODE, (u8 *)&extra_arg); } break; +#ifdef CONFIG_80211N_HT + case 0x19: + { + struct registry_priv *pregistrypriv = &padapter->registrypriv; + // extra_arg : + // BIT0: Enable VHT LDPC Rx, BIT1: Enable VHT LDPC Tx, + // BIT4: Enable HT LDPC Rx, BIT5: Enable HT LDPC Tx + if(arg == 0){ + DBG_871X("driver disable LDPC\n"); + pregistrypriv->ldpc_cap = 0x00; + } + else if(arg == 1){ + DBG_871X("driver set LDPC cap = 0x%x\n", extra_arg); + pregistrypriv->ldpc_cap = (u8)(extra_arg&0x33); + } + } + break; + case 0x1a: + { + struct registry_priv *pregistrypriv = &padapter->registrypriv; + // extra_arg : + // BIT0: Enable VHT STBC Rx, BIT1: Enable VHT STBC Tx, + // BIT4: Enable HT STBC Rx, BIT5: Enable HT STBC Tx + if(arg == 0){ + DBG_871X("driver disable STBC\n"); + pregistrypriv->stbc_cap = 0x00; + } + else if(arg == 1){ + DBG_871X("driver set STBC cap = 0x%x\n", extra_arg); + pregistrypriv->stbc_cap = (u8)(extra_arg&0x33); + } + } + break; +#endif //CONFIG_80211N_HT + case 0x1b: + { + struct registry_priv *pregistrypriv = &padapter->registrypriv; + + if(arg == 0){ + DBG_871X("disable driver ctrl max_rx_rate, reset to default_rate_set\n"); + init_mlme_default_rate_set(padapter); +#ifdef CONFIG_80211N_HT + pregistrypriv->ht_enable = (u8)rtw_ht_enable; +#endif //CONFIG_80211N_HT + } + else if(arg == 1){ + + int i; + u8 max_rx_rate; + + DBG_871X("enable driver ctrl max_rx_rate = 0x%x\n", extra_arg); + + max_rx_rate = (u8)extra_arg; + + if(max_rx_rate < 0xc) // max_rx_rate < MSC0 -> B or G -> disable HT + { +#ifdef CONFIG_80211N_HT + pregistrypriv->ht_enable = 0; +#endif //CONFIG_80211N_HT + for(i=0; idatarate[i] > max_rx_rate) + pmlmeext->datarate[i] = 0xff; + } + + } +#ifdef CONFIG_80211N_HT + else if(max_rx_rate < 0x1c) // mcs0~mcs15 + { + u32 mcs_bitmap=0x0; + + for(i=0; i<((max_rx_rate+1)-0xc); i++) + mcs_bitmap |= BIT(i); + + set_mcs_rate_by_mask(pmlmeext->default_supported_mcs_set, mcs_bitmap); + } +#endif //CONFIG_80211N_HT + } + } + break; + case 0x1c: //enable/disable driver control AMPDU Density for peer sta's rx + { + if(arg == 0){ + DBG_871X("disable driver ctrl ampdu density\n"); + padapter->driver_ampdu_spacing = 0xFF; + } + else if(arg == 1){ + + DBG_871X("enable driver ctrl ampdu density = %d\n", extra_arg); + + if((extra_arg & 0x07) > 0x07) + padapter->driver_ampdu_spacing = 0xFF; + else + padapter->driver_ampdu_spacing = extra_arg; + } + } + break; +#ifdef CONFIG_BACKGROUND_NOISE_MONITOR + case 0x1e: + { + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; + u8 chan = rtw_get_oper_ch(padapter); + DBG_871X("===========================================\n"); + ODM_InbandNoise_Monitor(pDM_Odm,_TRUE,0x1e,100); + DBG_871X("channel(%d),noise_a = %d, noise_b = %d , noise_all:%d \n", + chan,pDM_Odm->noise_level.noise[ODM_RF_PATH_A], + pDM_Odm->noise_level.noise[ODM_RF_PATH_B], + pDM_Odm->noise_level.noise_all); + DBG_871X("===========================================\n"); + + } + break; +#endif case 0x23: { DBG_871X("turn %s the bNotifyChannelChange Variable\n",(extra_arg==1)?"on":"off"); @@ -7208,6 +7407,46 @@ static int rtw_dbg_port(struct net_device *dev, #endif // CONFIG_P2P break; } +#ifdef CONFIG_GPIO_API + case 0x25: //Get GPIO register + { + /* + * dbg 0x7f250000 [gpio_num], Get gpio value, gpio_num:0~7 + */ + + int value; + DBG_871X("Read GPIO Value extra_arg = %d\n",extra_arg); + value = rtw_get_gpio(dev,extra_arg); + DBG_871X("Read GPIO Value = %d\n",value); + break; + } + case 0x26: //Set GPIO direction + { + + /* dbg 0x7f26000x [y], Set gpio direction, + * x: gpio_num,4~7 y: indicate direction, 0~1 + */ + + int value; + DBG_871X("Set GPIO Direction! arg = %d ,extra_arg=%d\n",arg ,extra_arg); + value = rtw_config_gpio(dev, arg, extra_arg); + DBG_871X("Set GPIO Direction %s \n",(value==-1)?"Fail!!!":"Success"); + break; + } + case 0x27: //Set GPIO output direction value + { + /* + * dbg 0x7f27000x [y], Set gpio output direction value, + * x: gpio_num,4~7 y: indicate direction, 0~1 + */ + + int value; + DBG_871X("Set GPIO Value! arg = %d ,extra_arg=%d\n",arg ,extra_arg); + value = rtw_set_gpio_output_value(dev,arg,extra_arg); + DBG_871X("Set GPIO Value %s \n",(value==-1)?"Fail!!!":"Success"); + break; + } +#endif case 0xaa: { if((extra_arg & 0x7F)> 0x3F) extra_arg = 0xFF; @@ -8744,6 +8983,79 @@ FREE_EXT: return ret; } +#ifdef CONFIG_WOWLAN +static int rtw_wowlan_ctrl(struct net_device *dev, + struct iw_request_info *info, + union iwreq_data *wrqu, char *extra) +{ + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + struct wowlan_ioctl_param poidparam; + struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct net_device *pnetdev = padapter->pnetdev; +#ifdef CONFIG_CONCURRENT_MODE + struct net_device *pbuddy_netdev = padapter->pbuddy_adapter->pnetdev; +#endif + struct sta_info *psta = NULL; + int ret = 0; + u32 start_time = rtw_get_current_time(); + poidparam.subcode = 0; + + DBG_871X("+rtw_wowlan_ctrl: %s\n", extra); + + if(pwrctrlpriv->bSupportRemoteWakeup==_FALSE){ + ret = -EPERM; + DBG_871X("+rtw_wowlan_ctrl: Device didn't support the remote wakeup!!\n"); + goto _rtw_wowlan_ctrl_exit_free; + } + + if (!check_fwstate(pmlmepriv, _FW_LINKED) && + check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { + DBG_871X("[%s] WARNING: Please Connect With AP First!!\n", __func__); + goto _rtw_wowlan_ctrl_exit_free; + } + + if (_rtw_memcmp( extra, "enable", 6 )) { + + padapter->registrypriv.mp_mode = 1; + + while (pwrctrlpriv->bips_processing == _TRUE) + rtw_msleep_os(1); + + rtw_ps_deny(padapter, PS_DENY_SUSPEND); + + rtw_cancel_all_timer(padapter); + +#ifdef CONFIG_CONCURRENT_MODE + if (padapter->pbuddy_adapter){ + rtw_cancel_all_timer(padapter->pbuddy_adapter); + } +#endif // CONFIG_CONCURRENT_MODE + + LeaveAllPowerSaveModeDirect(padapter); + + rtw_stop_cmd_thread(padapter); + + rtw_ps_deny_cancel(padapter, PS_DENY_SUSPEND); + + rtw_suspend_wow(padapter); + + } else if (_rtw_memcmp( extra, "disable", 6 )) { + rtw_resume_process_wow(padapter); + padapter->registrypriv.mp_mode = 0; + } else { + DBG_871X("[%s] Invalid Parameter.\n", __func__); + goto _rtw_wowlan_ctrl_exit_free; + } + //mutex_lock(&ioctl_mutex); +_rtw_wowlan_ctrl_exit_free: + DBG_871X("-rtw_wowlan_ctrl( subcode = %d)\n", poidparam.subcode); + DBG_871X_LEVEL(_drv_always_, "%s in %d ms\n", __func__, + rtw_get_passing_time_ms(start_time)); +_rtw_wowlan_ctrl_exit: + return ret; +} +#endif //CONFIG_WOWLAN #ifdef CONFIG_AP_WOWLAN static int rtw_ap_wowlan_ctrl(struct net_device *dev, @@ -10587,29 +10899,21 @@ static int rtw_mp_start(struct net_device *dev, struct dm_priv *pdmpriv = &pHalData->dmpriv; struct hal_ops *pHalFunc = &padapter->HalFunc; + rtw_pm_set_ips(padapter,IPS_NONE); + LeaveAllPowerSaveMode(padapter); + if(padapter->registrypriv.mp_mode ==0) { - #if (defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B)) - DBG_871X("_rtw_mp_xmit_priv for Download BT patch FW\n"); - _rtw_mp_xmit_priv(&padapter->xmitpriv); - #endif - - padapter->registrypriv.mp_mode =1; - - rtw_pm_set_ips(padapter,IPS_NONE); - LeaveAllPowerSaveMode(padapter); - MPT_InitializeAdapter(padapter, 1); #ifdef CONFIG_BT_COEXIST - rtw_btcoex_HaltNotify(padapter); - rtw_btcoex_SetManualControl(padapter, _TRUE); pdmpriv->DMFlag &= ~DYNAMIC_FUNC_BT; - // Force to switch Antenna to WiFi - padapter->registrypriv.mp_mode=0; +#endif + pHalFunc->hal_deinit(padapter); + padapter->registrypriv.mp_mode =1; pHalFunc->hal_init(padapter); - padapter->registrypriv.mp_mode=1; - //rtw_btcoex_HaltNotify(padapter); -#endif + + rtw_pm_set_ips(padapter,IPS_NONE); + LeaveAllPowerSaveMode(padapter); } if (padapter->registrypriv.mp_mode == 0) @@ -10622,6 +10926,15 @@ static int rtw_mp_start(struct net_device *dev, MPT_PwrCtlDM(padapter,0); } padapter->mppriv.bmac_filter = _FALSE; +#ifdef CONFIG_RTL8723B +#ifdef CONFIG_USB_HCI + rtw_write32(padapter, 0x765, 0x0000); + rtw_write32(padapter, 0x948, 0x0280); +#else + rtw_write32(padapter, 0x765, 0x0000); + rtw_write32(padapter, 0x948, 0x0000); +#endif +#endif #ifdef CONFIG_RTL8723B rtw_write8(padapter, 0x66, 0x27); //Open BT uart Log rtw_write8(padapter, 0xc50, 0x20); //for RX init Gain @@ -10640,10 +10953,6 @@ static int rtw_mp_stop(struct net_device *dev, if(padapter->registrypriv.mp_mode ==1) { - #if (defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B)) - DBG_871X("_rtw_mp_xmit_priv reinit for normal mode\n"); - _rtw_mp_xmit_priv(&padapter->xmitpriv); - #endif MPT_DeInitAdapter(padapter); pHalFunc->hal_deinit(padapter); @@ -11007,8 +11316,8 @@ static int rtw_mp_ctx(struct net_device *dev, //DBG_871X("%s: cotuTx %d\n", __func__, bStartTest); if (bStartTest != 0){ sprintf( extra, "Start continuous DA=ffffffffffff len=1500 \n infinite=yes."); - } - Hal_SetContinuousTx(padapter, (u8)bStartTest); + } + Hal_SetContinuousTx(padapter, (u8)bStartTest); break; case MP_CARRIER_SUPPRISSION_TX: @@ -11119,7 +11428,7 @@ static int rtw_mp_arx(struct net_device *dev, u32 mac_cck_err=0, mac_ofdm_err=0, mac_ht_err=0, mac_vht_err=0; u8 input[wrqu->length]; char *pch, *ptmp, *token, *tmp[2]={0x00,0x00}; - u32 i=0,ii=0,jj=0,kk=0,cnts=0; + u32 i=0,ii=0,jj=0,kk=0,cnts=0,bmon=0; PADAPTER padapter = rtw_netdev_priv(dev); struct mp_priv *pmppriv = &padapter->mppriv; @@ -11135,7 +11444,7 @@ static int rtw_mp_arx(struct net_device *dev, bSetBssid = (strncmp(input, "setbssid=", 8)==0)?1:0; // strncmp TRUE is 0 //bfilter_init = (strncmp(input, "filter_init",11)==0)?1:0; bmac_filter = (strncmp(input, "accept_mac",10)==0)?1:0; - + bmon = (strncmp(input, "mon=",4)==0)?1:0; if(bSetBssid==1){ pch = input; @@ -11200,8 +11509,7 @@ static int rtw_mp_arx(struct net_device *dev, else if(bQueryPhy) { - //if (IS_HARDWARE_TYPE_JAGUAR(padapter)) - #ifdef CONFIG_RTL8188A + if (IS_HARDWARE_TYPE_JAGUAR(padapter)) { cckok = PHY_QueryBBReg(padapter, 0xF04, 0x3FFF); // [13:0] ofdmok = PHY_QueryBBReg(padapter, 0xF14, 0x3FFF); // [13:0] @@ -11211,22 +11519,31 @@ static int rtw_mp_arx(struct net_device *dev, cckcrc = PHY_QueryBBReg(padapter, 0xF04, 0x3FFF0000); // [29:16] ofdmcrc = PHY_QueryBBReg(padapter, 0xF14, 0x3FFF0000); // [29:16] htcrc = PHY_QueryBBReg(padapter, 0xF10, 0x3FFF0000); // [29:16] - vht_err = PHY_QueryBBReg(padapter, 0xF0C, 0x3FFF0000); // [29:16] + vht_err = PHY_QueryBBReg(padapter, 0xF0C, 0x3FFF0000); // [29:16] + + CCK_FA = PHY_QueryBBReg(padapter, 0xa5c, bMaskLWord); + OFDM_FA = PHY_QueryBBReg(padapter, 0xF48, bMaskLWord); } - #else + else { cckok = PHY_QueryBBReg(padapter, 0xF88, bMaskDWord); ofdmok = PHY_QueryBBReg(padapter, 0xF94, bMaskLWord); - htok = PHY_QueryBBReg(padapter, 0xF90, bMaskLWord); + htok = PHY_QueryBBReg(padapter, 0xF90, bMaskLWord); vht_ok = 0; cckcrc = PHY_QueryBBReg(padapter, 0xF84, bMaskDWord); ofdmcrc = PHY_QueryBBReg(padapter, 0xF94, bMaskHWord); htcrc = PHY_QueryBBReg(padapter, 0xF90, bMaskHWord); vht_err = 0; - } - #endif + + OFDM_FA = PHY_QueryBBReg(padapter, 0xCF0, bMaskLWord) + PHY_QueryBBReg(padapter, 0xCF2, bMaskLWord) + + PHY_QueryBBReg(padapter, 0xDA2, bMaskLWord)+ PHY_QueryBBReg(padapter, 0xDA4, bMaskLWord) + + PHY_QueryBBReg(padapter, 0xDA6, bMaskLWord) + PHY_QueryBBReg(padapter, 0xDA8, bMaskLWord); + CCK_FA=(rtw_read8(padapter, 0xa5b )<<8 ) | (rtw_read8(padapter, 0xa5c)); + } + DBG_871X("%s: OFDM_FA =%d\n", __FUNCTION__, OFDM_FA); + DBG_871X("%s: CCK_FA =%d\n", __FUNCTION__, CCK_FA); sprintf( extra, "Phy Received packet OK:%d CRC error:%d FA Counter: %d",cckok+ofdmok+htok+vht_ok,cckcrc+ofdmcrc+htcrc+vht_err,OFDM_FA+CCK_FA); } else if(bQueryMac) @@ -11253,12 +11570,25 @@ static int rtw_mp_arx(struct net_device *dev, DropPacket = rtw_read32(padapter, 0x664)& 0x0000FFFF; } - sprintf( extra, "Mac Received packet OK: %d , CRC error: %d , FA Counter: %d , Drop Packets: %d\n", - mac_cck_ok+mac_ofdm_ok+mac_ht_ok+mac_vht_ok,mac_cck_err+mac_ofdm_err+mac_ht_err+mac_vht_err,OFDM_FA+CCK_FA,DropPacket); + sprintf( extra, "Mac Received packet OK: %d , CRC error: %d , Drop Packets: %d\n", + mac_cck_ok+mac_ofdm_ok+mac_ht_ok+mac_vht_ok,mac_cck_err+mac_ofdm_err+mac_ht_err+mac_vht_err,DropPacket); } - wrqu->length = strlen(extra) + 1; + if( bmon==1 ) { + sscanf(input, "mon=%d", &bmon); + + if(bmon==1) + { + pmppriv->rx_bindicatePkt= _TRUE; + sprintf( extra, "Indicating Receive Packet to network start\n"); + }else { + pmppriv->rx_bindicatePkt= _FALSE; + sprintf( extra, "Indicating Receive Packet to network Stop\n"); + } + } + wrqu->length = strlen(extra) + 1; + return 0; } @@ -11312,11 +11642,11 @@ static int rtw_mp_pwrtrk(struct net_device *dev, } else if (sscanf(input, "ther=%d", &thermal)) { pHalData->TxPowerTrackControl = _TRUE; - ret = Hal_SetThermalMeter(padapter, (u8)thermal); - if (ret == _FAIL) return -EPERM; + ret = Hal_SetThermalMeter(padapter, (u8)thermal); + if (ret == _FAIL) return -EPERM; sprintf(extra, "mp tx power tracking start,target value=%d ok ",thermal); - }else { - return -EINVAL; + }else{ + return -EINVAL; } } @@ -11435,12 +11765,26 @@ static int rtw_mp_reset_stats(struct net_device *dev, { write_bbreg(padapter, 0xB58, BIT0, 0x1); write_bbreg(padapter, 0xB58, BIT0, 0x0); + + write_bbreg(padapter, 0x9A4, BIT17, 0x1);//reset OFDA FA counter + write_bbreg(padapter, 0x9A4, BIT17, 0x0); + + write_bbreg(padapter, 0xA5C, BIT15, 0x0);//reset CCK FA counter + write_bbreg(padapter, 0xA5C, BIT15, 0x1); } else { write_bbreg(padapter, 0xF14, BIT16, 0x1); rtw_msleep_os(10); write_bbreg(padapter, 0xF14, BIT16, 0x0); + + write_bbreg(padapter, 0xD00, BIT27, 0x1);//reset OFDA FA counter + write_bbreg(padapter, 0xC0C, BIT31, 0x1);//reset OFDA FA counter + write_bbreg(padapter, 0xD00, BIT27, 0x0); + write_bbreg(padapter, 0xC0C, BIT31, 0x0); + + write_bbreg(padapter, 0xA2C, BIT15, 0x0);//reset CCK FA counter + write_bbreg(padapter, 0xA2C, BIT15, 0x1); } //reset mac counter PHY_SetMacReg(padapter, 0x664, BIT27, 0x1); @@ -11702,12 +12046,6 @@ static int rtw_mp_SetBT(struct net_device *dev, } if ( strncmp(extra, "dlfw", 4) == 0) { - #ifdef CONFIG_BT_COEXIST - rtw_btcoex_HaltNotify(padapter); - //DBG_871X("SetBT bt1ant !\n"); - //hal_btcoex1ant_SetAntPath(padapter); - rtw_btcoex_SetManualControl(padapter, _TRUE); - #endif pHalData->LastHMEBoxNum=0; padapter->bBTFWReady = _FALSE; rtw_write8(padapter, 0xa3, 0x05); @@ -11755,6 +12093,12 @@ static int rtw_mp_SetBT(struct net_device *dev, #endif DBG_871X("Wait for FirmwareDownloadBT fw boot!\n"); rtw_msleep_os(1000); +#ifdef CONFIG_BT_COEXIST + rtw_btcoex_HaltNotify(padapter); + DBG_871X("SetBT btcoex HaltNotify !\n"); + //hal_btcoex1ant_SetAntPath(padapter); + rtw_btcoex_SetManualControl(padapter, _TRUE); +#endif _rtw_memset(extra,'\0', wrqu->data.length); BtReq.opCodeVer = 1; BtReq.OpCode = 0; @@ -11784,9 +12128,15 @@ static int rtw_mp_SetBT(struct net_device *dev, if ( strncmp(extra, "down", 4) == 0){ DBG_871X("SetBT down for to hal_init !\n"); - mp_stop_test(padapter); +#ifdef CONFIG_BT_COEXIST + rtw_btcoex_SetManualControl(padapter, _FALSE); + rtw_btcoex_Initialize(padapter); +#endif + pHalFunc->read_adapter_info(padapter); + pHalFunc->hal_deinit(padapter); pHalFunc->hal_init(padapter); - mp_start_test(padapter); + rtw_pm_set_ips(padapter,IPS_NONE); + LeaveAllPowerSaveMode(padapter); MPT_PwrCtlDM(padapter,0); rtw_write32(padapter, 0xcc, (rtw_read32(padapter, 0xcc)| 0x00000004)); rtw_write32(padapter, 0x6b, (rtw_read32(padapter, 0x6b)& 0xFFFFFFEF)); @@ -12032,6 +12382,12 @@ static int rtw_mp_set(struct net_device *dev, DBG_871X("set case MP_DISABLE_BT_COEXIST \n"); rtw_mp_disable_bt_coexist(dev, info, wdata, extra); break; +#ifdef CONFIG_WOWLAN + case MP_WOW_ENABLE: + DBG_871X("set case MP_WOW_ENABLE: %s \n", extra); + rtw_wowlan_ctrl(dev, info, wdata, extra); + break; +#endif #ifdef CONFIG_AP_WOWLAN case MP_AP_WOW_ENABLE: DBG_871X("set case MP_AP_WOW_ENABLE: %s \n", extra); @@ -13604,13 +13960,11 @@ static int rtw_test( { rtw_btcoex_SetManualControl(padapter, _FALSE); } - - if (strcmp(pch, "btoff") == 0) + else if (strcmp(pch, "btoff") == 0) { rtw_btcoex_SetManualControl(padapter, _TRUE); } - - if (strcmp(pch, "h2c") == 0) + else if (strcmp(pch, "h2c") == 0) { u8 param[8]; u8 count = 0; @@ -13647,6 +14001,20 @@ static int rtw_test( wrqu->data.length = strlen(extra) + 1; } + else if (strcmp(pch, "ba_rxbuf_sz") == 0) + { + u8 ba_rxbuf_bz; + + pch = strsep(&ptmp, delim); + if ((pch != NULL) && (strlen(pch) != 0)) { + sscanf(pch, "%hhu", &ba_rxbuf_bz); + DBG_871X("%s set ba_rxbuf_bz as %u\n", __func__, ba_rxbuf_bz); + padapter->fix_ba_rxbuf_bz = ba_rxbuf_bz; + rtw_btcoex_RejectApAggregatedPacket(padapter, _TRUE); + rtw_btcoex_RejectApAggregatedPacket(padapter, _FALSE); + } + } + #endif // CONFIG_BT_COEXIST rtw_mfree(pbuf, len); @@ -13929,8 +14297,11 @@ static const struct iw_priv_args rtw_private_args[] = { #endif { CTA_TEST, IW_PRIV_TYPE_CHAR | 1024, 0, "cta_test"}, #endif +#ifdef CONFIG_WOWLAN + { MP_WOW_ENABLE , IW_PRIV_TYPE_CHAR | 1024, 0, "wow_mode" }, //set +#endif #ifdef CONFIG_AP_WOWLAN - { MP_AP_WOW_ENABLE , IW_PRIV_TYPE_CHAR | 1024, 0, "ap_wow_enable" }, //set + { MP_AP_WOW_ENABLE , IW_PRIV_TYPE_CHAR | 1024, 0, "ap_wow_mode" }, //set #endif }; @@ -14015,11 +14386,39 @@ static struct iw_statistics *rtw_get_wireless_stats(struct net_device *dev) #ifdef CONFIG_SIGNAL_DISPLAY_DBM tmp_level = translate_percentage_to_dbm(padapter->recvpriv.signal_strength); #else + #ifdef CONFIG_SKIP_SIGNAL_SCALE_MAPPING + { + /* Do signal scale mapping when using percentage as the unit of signal strength, since the scale mapping is skipped in odm */ + + HAL_DATA_TYPE *pHal = GET_HAL_DATA(padapter); + + tmp_level = (u8)odm_SignalScaleMapping(&pHal->odmpriv, padapter->recvpriv.signal_strength); + } + #else tmp_level = padapter->recvpriv.signal_strength; #endif + #endif tmp_qual = padapter->recvpriv.signal_qual; - tmp_noise =padapter->recvpriv.noise; +#if defined(CONFIG_SIGNAL_DISPLAY_DBM) && defined(CONFIG_BACKGROUND_NOISE_MONITOR) + if(rtw_linked_check(padapter)){ + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct noise_info info; + info.bPauseDIG = _TRUE; + info.IGIValue = 0x1e; + info.max_time = 100;//ms + info.chan = pmlmeext->cur_channel ;//rtw_get_oper_ch(padapter); + rtw_ps_deny(padapter, PS_DENY_IOCTL); + LeaveAllPowerSaveModeDirect(padapter); + + rtw_hal_set_odm_var(padapter, HAL_ODM_NOISE_MONITOR,&info, _FALSE); + //ODM_InbandNoise_Monitor(podmpriv,_TRUE,0x20,100); + rtw_ps_deny_cancel(padapter, PS_DENY_IOCTL); + rtw_hal_get_odm_var(padapter, HAL_ODM_NOISE_MONITOR,&(info.chan), &(padapter->recvpriv.noise)); + DBG_871X("chan:%d,noise_level:%d\n",info.chan,padapter->recvpriv.noise); + } +#endif + tmp_noise = padapter->recvpriv.noise; //DBG_871X("level:%d, qual:%d, noise:%d, rssi (%d)\n", tmp_level, tmp_qual, tmp_noise,padapter->recvpriv.rssi); piwstats->qual.level = tmp_level; @@ -14121,7 +14520,7 @@ static int rtw_ioctl_wext_private(struct net_device *dev, union iwreq_data *wrq_ _rtw_memcpy(&wdata, wrq_data, sizeof(wdata)); - input_len = wdata.data.length; + input_len = 2048; input = rtw_zmalloc(input_len); if (NULL == input) return -ENOMEM; @@ -14130,7 +14529,7 @@ static int rtw_ioctl_wext_private(struct net_device *dev, union iwreq_data *wrq_ goto exit; } ptr = input; - len = input_len; + len = strlen(input); sscanf(ptr, "%16s", cmdname); cmdlen = strlen(cmdname); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/mlme_linux.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/mlme_linux.c old mode 100644 new mode 100755 index 78ea10176705..c2cc56d6e231 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/mlme_linux.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/mlme_linux.c @@ -285,39 +285,41 @@ _func_enter_; if(authmode==_WPA_IE_ID_) { RT_TRACE(_module_mlme_osdep_c_,_drv_info_,("rtw_report_sec_ie, authmode=%d\n", authmode)); - - buff = rtw_malloc(IW_CUSTOM_MAX); - - _rtw_memset(buff,0,IW_CUSTOM_MAX); - - p=buff; - + + buff = rtw_zmalloc(IW_CUSTOM_MAX); + if (NULL == buff) { + DBG_871X(FUNC_ADPT_FMT ": alloc memory FAIL!!\n", + FUNC_ADPT_ARG(adapter)); + return; + } + p = buff; + p+=sprintf(p,"ASSOCINFO(ReqIEs="); len = sec_ie[1]+2; - len = (len < IW_CUSTOM_MAX) ? len:IW_CUSTOM_MAX; + len = (len < IW_CUSTOM_MAX) ? len:IW_CUSTOM_MAX; for(i=0;ipnetdev,IWEVCUSTOM,&wrqu,buff); #endif - if(buff) - rtw_mfree(buff, IW_CUSTOM_MAX); - + rtw_mfree(buff, IW_CUSTOM_MAX); } +exit: + _func_exit_; } diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/os_intfs.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/os_intfs.c old mode 100644 new mode 100755 index cabfd30aaa9b..f8a0e06a3be1 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/os_intfs.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/os_intfs.c @@ -107,9 +107,9 @@ int rtw_ht_enable = 1; // 0x21 means enable 2.4G 40MHz & 5G 80MHz int rtw_bw_mode = 0x21; int rtw_cbw40_enable = 3; // 0 :diable, bit(0): enable 2.4g, bit(1): enable 5g -int rtw_ampdu_enable = 1;//for enable tx_ampdu +int rtw_ampdu_enable = 1;//for enable tx_ampdu ,// 0: disable, 0x1:enable (but wifi_spec should be 0), 0x2: force enable (don't care wifi_spec) int rtw_rx_stbc = 1;// 0: disable, bit(0):enable 2.4g, bit(1):enable 5g, default is set to enable 2.4GHZ for IOT issue with bufflao's AP at 5GHZ -int rtw_ampdu_amsdu = 0;// 0: disabled, 1:enabled, 2:auto +int rtw_ampdu_amsdu = 0;// 0: disabled, 1:enabled, 2:auto . There is an IOT issu with DLINK DIR-629 when the flag turn on // Short GI support Bit Map // BIT0 - 20MHz, 0: non-support, 1: support // BIT1 - 40MHz, 0: non-support, 1: support @@ -140,6 +140,9 @@ int rtw_wifi_spec = 1;//for wifi test #else int rtw_wifi_spec = 0; #endif + +int rtw_special_rf_path = 0; //0: 2T2R ,1: only turn on path A 1T1R + int rtw_channel_plan = RT_CHANNEL_DOMAIN_MAX; #ifdef CONFIG_BT_COEXIST @@ -210,7 +213,7 @@ char* ifname = "wlan%d"; module_param(ifname, charp, 0644); MODULE_PARM_DESC(ifname, "The default name to allocate for first interface"); -char* if2name = "p2p%d"; +char* if2name = "p2p0"; module_param(if2name, charp, 0644); MODULE_PARM_DESC(if2name, "The default name to allocate for second interface"); @@ -223,6 +226,7 @@ module_param(rtw_ext_iface_num, int, 0644); module_param(rtw_initmac, charp, 0644); module_param(rtw_channel_plan, int, 0644); +module_param(rtw_special_rf_path, int, 0644); module_param(rtw_chip_version, int, 0644); module_param(rtw_rfintfs, int, 0644); module_param(rtw_lbkmode, int, 0644); @@ -316,6 +320,18 @@ uint rtw_notch_filter = RTW_NOTCH_FILTER; module_param(rtw_notch_filter, uint, 0644); MODULE_PARM_DESC(rtw_notch_filter, "0:Disable, 1:Enable, 2:Enable only for P2P"); +uint rtw_hiq_filter = CONFIG_RTW_HIQ_FILTER; +module_param(rtw_hiq_filter, uint, 0644); +MODULE_PARM_DESC(rtw_hiq_filter, "0:allow all, 1:allow special, 2:deny all"); + +uint rtw_adaptivity_en = CONFIG_RTW_ADAPTIVITY_EN; +module_param(rtw_adaptivity_en, uint, 0644); +MODULE_PARM_DESC(rtw_adaptivity_en, "0:disable, 1:enable, 2:auto"); + +uint rtw_adaptivity_mode = CONFIG_RTW_ADAPTIVITY_MODE; +module_param(rtw_adaptivity_mode, uint, 0644); +MODULE_PARM_DESC(rtw_adaptivity_mode, "0:normal, 1:carrier sense"); + #if defined(CONFIG_CALIBRATE_TX_POWER_BY_REGULATORY) //eFuse: Regulatory selection=1 int rtw_tx_pwr_lmt_enable = 1; int rtw_tx_pwr_by_rate = 1; @@ -323,8 +339,13 @@ int rtw_tx_pwr_by_rate = 1; int rtw_tx_pwr_lmt_enable = 0; int rtw_tx_pwr_by_rate = 1; #else //eFuse: Regulatory selection=2 +#ifdef CONFIG_PCI_HCI +int rtw_tx_pwr_lmt_enable = 2; // 2- Depend on efuse +int rtw_tx_pwr_by_rate = 2;// 2- Depend on efuse +#else // USB & SDIO int rtw_tx_pwr_lmt_enable = 0; int rtw_tx_pwr_by_rate = 0; +#endif #endif module_param(rtw_tx_pwr_lmt_enable, int, 0644); @@ -451,6 +472,7 @@ _func_enter_; registry_par->wifi_spec = (u8)rtw_wifi_spec; registry_par->channel_plan = (u8)rtw_channel_plan; + registry_par->special_rf_path = (u8)rtw_special_rf_path; #ifdef CONFIG_BT_COEXIST registry_par->btcoex = (u8)rtw_btcoex_enable; @@ -528,6 +550,9 @@ _func_enter_; #endif registry_par->qos_opt_enable = (u8)rtw_qos_opt_enable; + registry_par->hiq_filter = (u8)rtw_hiq_filter; + registry_par->adaptivity_en = (u8)rtw_adaptivity_en; + registry_par->adaptivity_mode = (u8)rtw_adaptivity_mode; _func_exit_; return status; @@ -601,7 +626,14 @@ unsigned int rtw_classify8021d(struct sk_buff *skb) return dscp >> 5; } -static u16 rtw_select_queue(struct net_device *dev, struct sk_buff *skb) +static u16 rtw_select_queue(struct net_device *dev, struct sk_buff *skb +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 13, 0) + , void *accel_priv +#endif // kernle >= 3.13 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0) + , select_queue_fallback_t fallback +#endif // kernel >= 3.14 + ) { _adapter *padapter = rtw_netdev_priv(dev); struct mlme_priv *pmlmepriv = &padapter->mlmepriv; @@ -646,9 +678,13 @@ u16 rtw_recv_select_queue(struct sk_buff *skb) #endif -static int rtw_ndev_notifier_call(struct notifier_block * nb, unsigned long state, void *ndev) +static int rtw_ndev_notifier_call(struct notifier_block * nb, unsigned long state, void *ptr) { - struct net_device *dev = ndev; +#if (LINUX_VERSION_CODE>=KERNEL_VERSION(3,11,0)) + struct net_device *dev = netdev_notifier_info_to_dev(ptr); +#else // kernel < 3.11 + struct net_device *dev = ptr; +#endif // kernel < 3.11 #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) if (dev->netdev_ops->ndo_do_ioctl != rtw_ioctl) @@ -1014,7 +1050,11 @@ u8 rtw_init_default_value(_adapter *padapter) padapter->bShowGetP2PState = 1; #endif + //for debug purpose padapter->fix_rate = 0xFF; + padapter->driver_ampdu_spacing = 0xFF; + padapter->driver_rx_ampdu_factor = 0xFF; + padapter->fix_ba_rxbuf_bz = 0xFF; return ret; } @@ -1041,8 +1081,9 @@ struct dvobj_priv *devobj_init(void) ATOMIC_SET(&pdvobj->disable_func, 0); - return pdvobj; + _rtw_spinlock_init(&pdvobj->cam_ctl.lock); + return pdvobj; } void devobj_deinit(struct dvobj_priv *pdvobj) @@ -1057,8 +1098,10 @@ void devobj_deinit(struct dvobj_priv *pdvobj) _rtw_mutex_free(&pdvobj->setch_mutex); _rtw_mutex_free(&pdvobj->setbw_mutex); + _rtw_spinlock_free(&pdvobj->cam_ctl.lock); + rtw_mfree((u8*)pdvobj, sizeof(*pdvobj)); -} +} u8 rtw_reset_drv_sw(_adapter *padapter) { @@ -1205,6 +1248,7 @@ _func_enter_; padapter->stapriv.padapter = padapter; padapter->setband = GHZ24_50; padapter->fix_rate = 0xFF; + padapter->fix_ba_rxbuf_bz = 0xFF; rtw_init_bcmc_stainfo(padapter); rtw_init_pwrctrl_priv(padapter); @@ -1824,6 +1868,13 @@ int netdev_if2_open(struct net_device *pnetdev) { int ret; _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); + struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); + + + if (pwrctrlpriv->bInSuspend == _TRUE) { + DBG_871X(FUNC_ADPT_FMT ": bInSuspend=%d\n", FUNC_ADPT_ARG(padapter), pwrctrlpriv->bInSuspend); + return 0; + } _enter_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); ret = _netdev_if2_open(pnetdev); @@ -2212,10 +2263,6 @@ int _netdev_open(struct net_device *pnetdev) DBG_871X("MAC Address = "MAC_FMT"\n", MAC_ARG(pnetdev->dev_addr)); -#ifdef CONFIG_RF_GAIN_OFFSET - rtw_bb_rf_gain_offset(padapter); -#endif //CONFIG_RF_GAIN_OFFSET - status=rtw_start_drv_threads(padapter); if(status ==_FAIL) { @@ -2292,6 +2339,13 @@ int netdev_open(struct net_device *pnetdev) { int ret; _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); + struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); + + if (pwrctrlpriv->bInSuspend == _TRUE) + { + DBG_871X("+871x_drv - drv_open, bInSuspend=%d\n", pwrctrlpriv->bInSuspend); + return 0; + } _enter_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); ret = _netdev_open(pnetdev); @@ -2322,10 +2376,6 @@ int ips_netdrv_open(_adapter *padapter) goto netdev_open_error; } -#ifdef CONFIG_RF_GAIN_OFFSET - rtw_bb_rf_gain_offset(padapter); -#endif //CONFIG_RF_GAIN_OFFSET - if (padapter->intf_start) { padapter->intf_start(padapter); @@ -2417,120 +2467,22 @@ void rtw_ips_dev_unload(_adapter *padapter) } -#ifdef CONFIG_RF_GAIN_OFFSET -u32 Array_kfreemap[] = { -0xf8,0xe, -0xf6,0xc, -0xf4,0xa, -0xf2,0x8, -0xf0,0x6, -0xf3,0x4, -0xf5,0x2, -0xf7,0x0, -0xf9,0x0, -0xfc,0x0, -}; - -void rtw_bb_rf_gain_offset(_adapter *padapter) -{ - u8 value = padapter->eeprompriv.EEPROMRFGainOffset; - u8 tmp = 0x3e; - u32 res,i=0; - u4Byte ArrayLen = sizeof(Array_kfreemap)/sizeof(u32); - pu4Byte Array = Array_kfreemap; - u4Byte v1=0,v2=0,target=0; - //DBG_871X("+%s value: 0x%02x+\n", __func__, value); -#if defined(CONFIG_RTL8723A) - if (value & BIT0) { - DBG_871X("Offset RF Gain.\n"); - DBG_871X("Offset RF Gain. padapter->eeprompriv.EEPROMRFGainVal=0x%x\n",padapter->eeprompriv.EEPROMRFGainVal); - if(padapter->eeprompriv.EEPROMRFGainVal != 0xff){ - res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0xd, 0xffffffff); - DBG_871X("Offset RF Gain. reg 0xd=0x%x\n",res); - res &= 0xfff87fff; - - res |= (padapter->eeprompriv.EEPROMRFGainVal & 0x0f)<< 15; - DBG_871X("Offset RF Gain. reg 0xd=0x%x\n",res); - - rtw_hal_write_rfreg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET_CCK, RF_GAIN_OFFSET_MASK, res); - - res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0xe, 0xffffffff); - DBG_871X("Offset RF Gain. reg 0xe=0x%x\n",res); - res &= 0xfffffff0; - - res |= (padapter->eeprompriv.EEPROMRFGainVal & 0x0f); - DBG_871X("Offset RF Gain. reg 0xe=0x%x\n",res); - - rtw_hal_write_rfreg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET_OFDM, RF_GAIN_OFFSET_MASK, res); - } - else - { - DBG_871X("Offset RF Gain. padapter->eeprompriv.EEPROMRFGainVal=0x%x != 0xff, didn't run Kfree\n",padapter->eeprompriv.EEPROMRFGainVal); - } - } else { - DBG_871X("Using the default RF gain.\n"); - } -#elif defined(CONFIG_RTL8723B) - if (value & BIT4) { - DBG_871X("Offset RF Gain.\n"); - DBG_871X("Offset RF Gain. padapter->eeprompriv.EEPROMRFGainVal=0x%x\n",padapter->eeprompriv.EEPROMRFGainVal); - if(padapter->eeprompriv.EEPROMRFGainVal != 0xff){ - res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff); - res &= 0xfff87fff; - DBG_871X("Offset RF Gain. before reg 0x7f=0x%08x\n",res); - //res &= 0xfff87fff; - for (i = 0; i < ArrayLen; i += 2 ) - { - v1 = Array[i]; - v2 = Array[i+1]; - if ( v1 == padapter->eeprompriv.EEPROMRFGainVal ) - { - DBG_871X("Offset RF Gain. got v1 =0x%x ,v2 =0x%x \n",v1,v2); - target=v2; - break; - } - } - DBG_871X("padapter->eeprompriv.EEPROMRFGainVal=0x%x ,Gain offset Target Value=0x%x\n",padapter->eeprompriv.EEPROMRFGainVal,target); - PHY_SetRFReg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, BIT18|BIT17|BIT16|BIT15, target); - - //res |= (padapter->eeprompriv.EEPROMRFGainVal & 0x0f)<< 15; - //rtw_hal_write_rfreg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, RF_GAIN_OFFSET_MASK, res); - res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff); - DBG_871X("Offset RF Gain. After reg 0x7f=0x%08x\n",res); - } - else - { - DBG_871X("Offset RF Gain. padapter->eeprompriv.EEPROMRFGainVal=0x%x != 0xff, didn't run Kfree\n",padapter->eeprompriv.EEPROMRFGainVal); - } - } else { - DBG_871X("Using the default RF gain.\n"); - } -#else - if (!(value & 0x01)) { - //DBG_871X("Offset RF Gain.\n"); - res = rtw_hal_read_rfreg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, 0xffffffff); - value &= tmp; - res = value << 14; - rtw_hal_write_rfreg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, RF_GAIN_OFFSET_MASK, res); - } else { - DBG_871X("Using the default RF gain.\n"); - } -#endif - -} -#endif //CONFIG_RF_GAIN_OFFSET - int pm_netdev_open(struct net_device *pnetdev,u8 bnormal) { int status = 0; + _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); if (_TRUE == bnormal) - status = netdev_open(pnetdev); + { + _enter_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); + status = _netdev_open(pnetdev); + _exit_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); + } #ifdef CONFIG_IPS else - status = (_SUCCESS == ips_netdrv_open((_adapter *)rtw_netdev_priv(pnetdev)))?(0):(-1); + status = (_SUCCESS == ips_netdrv_open(padapter))?(0):(-1); #endif return status; @@ -2635,12 +2587,291 @@ void rtw_ndev_destructor(struct net_device *ndev) free_netdev(ndev); } +#ifdef CONFIG_ARP_KEEP_ALIVE +struct route_info { + struct in_addr dst_addr; + struct in_addr src_addr; + struct in_addr gateway; + unsigned int dev_index; +}; + +static void parse_routes(struct nlmsghdr *nl_hdr, struct route_info *rt_info) +{ + struct rtmsg *rt_msg; + struct rtattr *rt_attr; + int rt_len; + + rt_msg = (struct rtmsg *) NLMSG_DATA(nl_hdr); + if ((rt_msg->rtm_family != AF_INET) || (rt_msg->rtm_table != RT_TABLE_MAIN)) + return; + + rt_attr = (struct rtattr *) RTM_RTA(rt_msg); + rt_len = RTM_PAYLOAD(nl_hdr); + + for (; RTA_OK(rt_attr, rt_len); rt_attr = RTA_NEXT(rt_attr, rt_len)) + { + switch (rt_attr->rta_type) { + case RTA_OIF: + rt_info->dev_index = *(int *) RTA_DATA(rt_attr); + break; + case RTA_GATEWAY: + rt_info->gateway.s_addr = *(u_int *) RTA_DATA(rt_attr); + break; + case RTA_PREFSRC: + rt_info->src_addr.s_addr = *(u_int *) RTA_DATA(rt_attr); + break; + case RTA_DST: + rt_info->dst_addr.s_addr = *(u_int *) RTA_DATA(rt_attr); + break; + } + } +} + +static int route_dump(u32 *gw_addr ,int* gw_index) +{ + int err = 0; + struct socket *sock; + struct { + struct nlmsghdr nlh; + struct rtgenmsg g; + } req; + struct msghdr msg; + struct iovec iov; + struct sockaddr_nl nladdr; + mm_segment_t oldfs; + char *pg; + int size = 0; + + err = sock_create(AF_NETLINK, SOCK_DGRAM, NETLINK_ROUTE, &sock); + if (err) + { + printk( ": Could not create a datagram socket, error = %d\n", -ENXIO); + return err; + } + + memset(&nladdr, 0, sizeof(nladdr)); + nladdr.nl_family = AF_NETLINK; + + req.nlh.nlmsg_len = sizeof(req); + req.nlh.nlmsg_type = RTM_GETROUTE; + req.nlh.nlmsg_flags = NLM_F_ROOT | NLM_F_MATCH | NLM_F_REQUEST; + req.nlh.nlmsg_pid = 0; + req.g.rtgen_family = AF_INET; + + iov.iov_base = &req; + iov.iov_len = sizeof(req); + + msg.msg_name = &nladdr; + msg.msg_namelen = sizeof(nladdr); + msg.msg_iov = &iov; + msg.msg_iovlen = 1; + msg.msg_control = NULL; + msg.msg_controllen = 0; + msg.msg_flags = MSG_DONTWAIT; + + oldfs = get_fs(); set_fs(KERNEL_DS); + err = sock_sendmsg(sock, &msg, sizeof(req)); + set_fs(oldfs); + + if (size < 0) + goto out_sock; + + pg = (char *) __get_free_page(GFP_KERNEL); + if (pg == NULL) { + err = -ENOMEM; + goto out_sock; + } + +#if defined(CONFIG_IPV6) || defined (CONFIG_IPV6_MODULE) +restart: +#endif + + for (;;) + { + struct nlmsghdr *h; + + iov.iov_base = pg; + iov.iov_len = PAGE_SIZE; + + oldfs = get_fs(); set_fs(KERNEL_DS); + err = sock_recvmsg(sock, &msg, PAGE_SIZE, MSG_DONTWAIT); + set_fs(oldfs); + + if (err < 0) + goto out_sock_pg; + + if (msg.msg_flags & MSG_TRUNC) { + err = -ENOBUFS; + goto out_sock_pg; + } + + h = (struct nlmsghdr*) pg; + + while (NLMSG_OK(h, err)) + { + struct route_info rt_info; + if (h->nlmsg_type == NLMSG_DONE) { + err = 0; + goto done; + } + + if (h->nlmsg_type == NLMSG_ERROR) { + struct nlmsgerr *errm = (struct nlmsgerr*) NLMSG_DATA(h); + err = errm->error; + printk( "NLMSG error: %d\n", errm->error); + goto done; + } + + if (h->nlmsg_type == RTM_GETROUTE) + { + printk( "RTM_GETROUTE: NLMSG: %d\n", h->nlmsg_type); + } + if (h->nlmsg_type != RTM_NEWROUTE) { + printk( "NLMSG: %d\n", h->nlmsg_type); + err = -EINVAL; + goto done; + } + + memset(&rt_info, 0, sizeof(struct route_info)); + parse_routes(h, &rt_info); + if(!rt_info.dst_addr.s_addr && rt_info.gateway.s_addr && rt_info.dev_index) + { + *gw_addr = rt_info.gateway.s_addr; + *gw_index = rt_info.dev_index; + + } + h = NLMSG_NEXT(h, err); + } + + if (err) + { + printk( "!!!Remnant of size %d %d %d\n", err, h->nlmsg_len, h->nlmsg_type); + err = -EINVAL; + break; + } + } + +done: +#if defined(CONFIG_IPV6) || defined (CONFIG_IPV6_MODULE) + if (!err && req.g.rtgen_family == AF_INET) { + req.g.rtgen_family = AF_INET6; + + iov.iov_base = &req; + iov.iov_len = sizeof(req); + + msg.msg_name = &nladdr; + msg.msg_namelen = sizeof(nladdr); + msg.msg_iov = &iov; + msg.msg_iovlen = 1; + msg.msg_control = NULL; + msg.msg_controllen = 0; + msg.msg_flags=MSG_DONTWAIT; + + oldfs = get_fs(); set_fs(KERNEL_DS); + err = sock_sendmsg(sock, &msg, sizeof(req)); + set_fs(oldfs); + + if (err > 0) + goto restart; + } +#endif + +out_sock_pg: + free_page((unsigned long) pg); + +out_sock: + sock_release(sock); + return err; +} + +static int arp_query(unsigned char *haddr, u32 paddr, + struct net_device *dev) +{ + struct neighbour *neighbor_entry; + int ret = 0; + + neighbor_entry = neigh_lookup(&arp_tbl, &paddr, dev); + + if (neighbor_entry != NULL) { + neighbor_entry->used = jiffies; + if (neighbor_entry->nud_state & NUD_VALID) { + _rtw_memcpy(haddr, neighbor_entry->ha, dev->addr_len); + ret = 1; + } + neigh_release(neighbor_entry); + } + return ret; +} + +static int get_defaultgw(u32 *ip_addr ,char mac[]) +{ + int gw_index = 0; // oif device index + struct net_device *gw_dev = NULL; //oif device + + route_dump(ip_addr, &gw_index); + + if( !(*ip_addr) || !gw_index ) + { + //DBG_871X("No default GW \n"); + return -1; + } + + gw_dev = dev_get_by_index(&init_net, gw_index); + + if(gw_dev == NULL) + { + //DBG_871X("get Oif Device Fail \n"); + return -1; + } + + if(!arp_query(mac, *ip_addr, gw_dev)) + { + //DBG_871X( "arp query failed\n"); + dev_put(gw_dev); + return -1; + + } + dev_put(gw_dev); + + return 0; +} + +int rtw_gw_addr_query(_adapter *padapter) +{ + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + u32 gw_addr = 0; // default gw address + unsigned char gw_mac[32] = {0}; // default gw mac + int i; + int res; + + res = get_defaultgw(&gw_addr, gw_mac); + if(!res) + { + pmlmepriv->gw_ip[0] = gw_addr&0xff; + pmlmepriv->gw_ip[1] = (gw_addr&0xff00)>>8; + pmlmepriv->gw_ip[2] = (gw_addr&0xff0000)>>16; + pmlmepriv->gw_ip[3] = (gw_addr&0xff000000)>>24; + _rtw_memcpy(pmlmepriv->gw_mac_addr, gw_mac, 6); + DBG_871X("%s Gateway Mac:\t" MAC_FMT "\n", __FUNCTION__, MAC_ARG(pmlmepriv->gw_mac_addr)); + DBG_871X("%s Gateway IP:\t" IP_FMT "\n", __FUNCTION__, IP_ARG(pmlmepriv->gw_ip)); + } + else + { + DBG_871X("Get Gateway IP/MAC fail!\n"); + } + + return res; +} +#endif + void rtw_dev_unload(PADAPTER padapter) { struct net_device *pnetdev = (struct net_device*)padapter->pnetdev; struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); struct dvobj_priv *pobjpriv = padapter->dvobj; struct debug_priv *pdbgpriv = &pobjpriv->drv_dbg; + struct cmd_priv *pcmdpriv = &padapter->cmdpriv; + u8 cnt = 0; RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("+%s\n",__FUNCTION__)); @@ -2661,7 +2892,18 @@ void rtw_dev_unload(PADAPTER padapter) if (!pwrctl->bInternalAutoSuspend) rtw_stop_drv_threads(padapter); - + + while(ATOMIC_READ(&(pcmdpriv->cmdthd_running)) == _TRUE){ + if (cnt > 5) { + DBG_871X("stop cmdthd timeout\n"); + break; + } else { + cnt ++; + DBG_871X("cmdthd is running(%d)\n", cnt); + rtw_msleep_os(10); + } + } + RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("@ %s: stop thread complete!\n",__FUNCTION__)); //check the status of IPS @@ -2675,6 +2917,9 @@ void rtw_dev_unload(PADAPTER padapter) if (padapter->bSurpriseRemoved == _FALSE) { +#ifdef CONFIG_BT_COEXIST + rtw_btcoex_IpsNotify(padapter, pwrctl->ips_mode_req); +#endif #ifdef CONFIG_WOWLAN if (pwrctl->bSupportRemoteWakeup == _TRUE && pwrctl->wowlan_mode ==_TRUE) { @@ -2702,7 +2947,6 @@ void rtw_dev_unload(PADAPTER padapter) RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("-%s\n",__FUNCTION__)); } -#ifdef CONFIG_SUSPEND_REFINE int rtw_suspend_free_assoc_resource(_adapter *padapter) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; @@ -2777,12 +3021,7 @@ int rtw_suspend_wow(_adapter *padapter) int ret = _SUCCESS; DBG_871X("==> "FUNC_ADPT_FMT" entry....\n", FUNC_ADPT_ARG(padapter)); - - if (check_fwstate(pmlmepriv, _FW_LINKED)) { - pwrpriv->wowlan_mode = _TRUE; - } else if (pwrpriv->wowlan_pno_enable == _TRUE) { - pwrpriv->wowlan_mode |= pwrpriv->wowlan_pno_enable; - } + DBG_871X("wowlan_mode: %d\n", pwrpriv->wowlan_mode); DBG_871X("wowlan_pno_enable: %d\n", pwrpriv->wowlan_pno_enable); @@ -2809,11 +3048,11 @@ int rtw_suspend_wow(_adapter *padapter) } #endif // CONFIG_CONCURRENT_MODE - //#ifdef CONFIG_POWER_SAVING + //#ifdef CONFIG_LPS //rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "WOWLAN"); //#endif -#ifdef CONFIG_SDIO_HCI +#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) // 2. disable interrupt if (padapter->intf_stop) { padapter->intf_stop(padapter); @@ -2878,56 +3117,18 @@ int rtw_suspend_wow(_adapter *padapter) rtw_suspend_free_assoc_resource(padapter->pbuddy_adapter); } #endif - - #ifdef CONFIG_POWER_SAVING + if(pwrpriv->wowlan_pno_enable) DBG_871X_LEVEL(_drv_always_, "%s: pno: %d\n", __func__, pwrpriv->wowlan_pno_enable); + #ifdef CONFIG_LPS else rtw_set_ps_mode(padapter, PS_MODE_DTIM, 0, 0, "WOWLAN"); - #endif + #endif //#ifdef CONFIG_LPS } else { - if(pnetdev){ - netif_carrier_off(pnetdev); - rtw_netif_stop_queue(pnetdev); - } - #ifdef CONFIG_CONCURRENT_MODE - if(pbuddy_netdev){ - netif_carrier_off(pbuddy_netdev); - rtw_netif_stop_queue(pbuddy_netdev); - } - #endif//CONFIG_CONCURRENT_MODE - - rtw_suspend_free_assoc_resource(padapter); - - #ifdef CONFIG_CONCURRENT_MODE - if(rtw_buddy_adapter_up(padapter)){ - rtw_suspend_free_assoc_resource(padapter->pbuddy_adapter); - } - #endif//CONFIG_CONCURRENT_MODE - rtw_led_control(padapter, LED_CTL_POWER_OFF); - - - if ((rtw_hal_check_ips_status(padapter) == _TRUE) - || (adapter_to_pwrctl(padapter)->rf_pwrstate == rf_off)) - { - DBG_871X_LEVEL(_drv_always_, "%s: ### ERROR #### driver in IPS ####ERROR###!!!\n", __FUNCTION__); - - } - - - #ifdef CONFIG_CONCURRENT_MODE - if(rtw_buddy_adapter_up(padapter)){ - rtw_dev_unload(padapter->pbuddy_adapter); - } - #endif - rtw_dev_unload(padapter); - - //sdio_deinit(adapter_to_dvobj(padapter)); - if(padapter->intf_deinit) - padapter->intf_deinit(adapter_to_dvobj(padapter)); + DBG_871X_LEVEL(_drv_always_, "%s: ### ERROR ### wowlan_mode=%d\n", __FUNCTION__, pwrpriv->wowlan_mode); } DBG_871X("<== "FUNC_ADPT_FMT" exit....\n", FUNC_ADPT_ARG(padapter)); return ret; @@ -2942,9 +3143,9 @@ int rtw_suspend_ap_wow(_adapter *padapter) struct net_device *pnetdev = padapter->pnetdev; #ifdef CONFIG_CONCURRENT_MODE struct net_device *pbuddy_netdev; - #endif + #endif struct dvobj_priv *psdpriv = padapter->dvobj; - struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; + struct debug_priv *pdbgpriv = &psdpriv->drv_dbg; struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); struct wowlan_ioctl_param poidparam; u8 ps_mode; @@ -2957,7 +3158,7 @@ int rtw_suspend_ap_wow(_adapter *padapter) DBG_871X("wowlan_ap_mode: %d\n", pwrpriv->wowlan_ap_mode); if(pnetdev) - rtw_netif_stop_queue(pnetdev); + rtw_netif_stop_queue(pnetdev); #ifdef CONFIG_CONCURRENT_MODE if (rtw_buddy_adapter_up(padapter)) { pbuddy_netdev = padapter->pbuddy_adapter->pnetdev; @@ -2977,11 +3178,12 @@ int rtw_suspend_ap_wow(_adapter *padapter) padapter->pbuddy_adapter->bDriverStopped = _FALSE; //for 32k command } #endif // CONFIG_CONCURRENT_MODE - - //#ifdef CONFIG_POWER_SAVING + + //#ifdef CONFIG_LPS //rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "WOWLAN"); //#endif +#ifdef CONFIG_SDIO_HCI // 2. disable interrupt rtw_hal_disable_interrupt(padapter); // It need wait for leaving 32K. @@ -2994,6 +3196,7 @@ int rtw_suspend_ap_wow(_adapter *padapter) // 2.1 clean interupt if (padapter->HalFunc.clear_interrupt) padapter->HalFunc.clear_interrupt(padapter); +#endif //CONFIG_SDIO_HCI // 2.2 free irq //sdio_free_irq(adapter_to_dvobj(padapter)); @@ -3005,14 +3208,14 @@ int rtw_suspend_ap_wow(_adapter *padapter) DBG_871X(" ### PORT SWITCH ### \n"); rtw_hal_set_hwreg(padapter, HW_VAR_PORT_SWITCH, NULL); } - #endif - + #endif + poidparam.subcode = WOWLAN_AP_ENABLE; padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AP_WOWLAN,(u8 *)&poidparam); DBG_871X_LEVEL(_drv_always_, "%s: wowmode suspending\n", __func__); - + #ifdef CONFIG_CONCURRENT_MODE if (check_buddy_fwstate(padapter, WIFI_AP_STATE) == _TRUE) { if (rtw_get_ch_setting_union(padapter->pbuddy_adapter, &ch, &bw, &offset) != 0) { @@ -3037,11 +3240,11 @@ int rtw_suspend_ap_wow(_adapter *padapter) } #endif -#ifdef CONFIG_POWER_SAVING + #ifdef CONFIG_LPS rtw_set_ps_mode(padapter, PS_MODE_MIN, 0, 0, "AP-WOWLAN"); #endif - #endif + DBG_871X("<== "FUNC_ADPT_FMT" exit....\n", FUNC_ADPT_ARG(padapter)); return ret; @@ -3080,6 +3283,14 @@ int rtw_suspend_normal(_adapter *padapter) } #endif rtw_led_control(padapter, LED_CTL_POWER_OFF); + + if ((rtw_hal_check_ips_status(padapter) == _TRUE) + || (adapter_to_pwrctl(padapter)->rf_pwrstate == rf_off)) + { + DBG_871X_LEVEL(_drv_always_, "%s: ### ERROR #### driver in IPS ####ERROR###!!!\n", __FUNCTION__); + + } + #ifdef CONFIG_CONCURRENT_MODE if(rtw_buddy_adapter_up(padapter)){ rtw_dev_unload(padapter->pbuddy_adapter); @@ -3167,8 +3378,18 @@ int rtw_suspend_common(_adapter *padapter) #endif ) { #ifdef CONFIG_WOWLAN + if (check_fwstate(pmlmepriv, _FW_LINKED)) { + pwrpriv->wowlan_mode = _TRUE; + } else if (pwrpriv->wowlan_pno_enable == _TRUE) { + pwrpriv->wowlan_mode |= pwrpriv->wowlan_pno_enable; + } + + if (pwrpriv->wowlan_mode == _TRUE) rtw_suspend_wow(padapter); - #else + else + rtw_suspend_normal(padapter); + + #else //CONFIG_WOWLAN rtw_suspend_normal(padapter); #endif //CONFIG_WOWLAN } else if (check_fwstate(pmlmepriv,WIFI_AP_STATE) == _TRUE @@ -3233,16 +3454,22 @@ _func_enter_; goto exit; } + if (padapter->bDriverStopped || padapter->bSurpriseRemoved) { + DBG_871X("%s pdapter %p bDriverStopped %d bSurpriseRemoved %d\n", + __FUNCTION__, padapter, padapter->bDriverStopped, + padapter->bSurpriseRemoved); + goto exit; + } + #ifdef CONFIG_PNO_SUPPORT pwrpriv->pno_in_resume = _TRUE; #endif if (pwrpriv->wowlan_mode == _TRUE){ -#ifdef CONFIG_POWER_SAVING #ifdef CONFIG_LPS rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "WOWLAN"); #endif //CONFIG_LPS -#endif + pwrpriv->bFwCurrentInPSMode = _FALSE; #ifdef CONFIG_SDIO_HCI @@ -3323,56 +3550,7 @@ _func_enter_; } else{ - // interface init - //if (sdio_init(adapter_to_dvobj(padapter)) != _SUCCESS) - if ((padapter->intf_init) &&(padapter->intf_init(adapter_to_dvobj(padapter)) != _SUCCESS)) - { - ret = -1; - RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("%s: initialize SDIO Failed!!\n", __FUNCTION__)); - goto exit; - } - - rtw_hal_disable_interrupt(padapter); - - if (padapter->HalFunc.clear_interrupt) - padapter->HalFunc.clear_interrupt(padapter); - - //if (sdio_alloc_irq(adapter_to_dvobj(padapter)) != _SUCCESS) - if ((padapter->intf_alloc_irq)&&(padapter->intf_alloc_irq(adapter_to_dvobj(padapter)) != _SUCCESS)) - { - ret = -1; - RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("%s: sdio_alloc_irq Failed!!\n", __FUNCTION__)); - goto exit; - } - - rtw_reset_drv_sw(padapter); - #ifdef CONFIG_CONCURRENT_MODE - rtw_reset_drv_sw(padapter->pbuddy_adapter); - #endif - pwrpriv->bkeepfwalive = _FALSE; - - DBG_871X("bkeepfwalive(%x)\n",pwrpriv->bkeepfwalive); - - if(pm_netdev_close(pnetdev, _TRUE) == 0) { - DBG_871X("netdev_close success\n"); - } - - if(pm_netdev_open(pnetdev,_TRUE) != 0) { - ret = -1; - pdbgpriv->dbg_resume_error_cnt++; - goto exit; - } - - netif_device_attach(pnetdev); - netif_carrier_on(pnetdev); - - #ifdef CONFIG_CONCURRENT_MODE - if(rtw_buddy_adapter_up(padapter)){ - pbuddy_netdev = padapter->pbuddy_adapter->pnetdev; - netif_device_attach(pbuddy_netdev); - netif_carrier_on(pbuddy_netdev); - } - #endif + DBG_871X_LEVEL(_drv_always_, "%s: ### ERROR ### wowlan_mode=%d\n", __FUNCTION__, pwrpriv->wowlan_mode); } if( padapter->pid[1]!=0) { @@ -3402,10 +3580,6 @@ _func_enter_; } } - #ifdef CONFIG_RESUME_IN_WORKQUEUE - rtw_unlock_suspend(); - #endif //CONFIG_RESUME_IN_WORKQUEUE - if (pwrpriv->wowlan_wake_reason == FWDecisionDisconnect) { rtw_lock_ext_suspend_timeout(2000); } @@ -3469,11 +3643,11 @@ _func_enter_; goto exit; } -#ifdef CONFIG_POWER_SAVING + #ifdef CONFIG_LPS rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "AP-WOWLAN"); #endif //CONFIG_LPS -#endif + pwrpriv->bFwCurrentInPSMode = _FALSE; rtw_hal_disable_interrupt(padapter); @@ -3565,7 +3739,7 @@ _func_enter_; } #ifdef CONFIG_RESUME_IN_WORKQUEUE - rtw_unlock_suspend(); + //rtw_unlock_suspend(); #endif //CONFIG_RESUME_IN_WORKQUEUE if (pwrpriv->wowlan_wake_reason == AP_WakeUp) @@ -3699,7 +3873,7 @@ _func_enter_; #endif #ifdef CONFIG_RESUME_IN_WORKQUEUE - rtw_unlock_suspend(); + //rtw_unlock_suspend(); #endif //CONFIG_RESUME_IN_WORKQUEUE DBG_871X("<== "FUNC_ADPT_FMT" exit....\n", FUNC_ADPT_ARG(padapter)); @@ -3726,7 +3900,10 @@ int rtw_resume_common(_adapter *padapter) #endif ) { #ifdef CONFIG_WOWLAN - rtw_resume_process_wow(padapter); + if (pwrpriv->wowlan_mode == _TRUE) + rtw_resume_process_wow(padapter); + else + rtw_resume_process_normal(padapter); #else rtw_resume_process_normal(padapter); #endif @@ -3771,6 +3948,4 @@ int rtw_resume_common(_adapter *padapter) return ret; } -#endif - diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/recv_linux.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/recv_linux.c old mode 100644 new mode 100755 index 2f965d2b3433..57fc16f73368 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/recv_linux.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/recv_linux.c @@ -233,9 +233,12 @@ int rtw_os_recvbuf_resource_free(_adapter *padapter, struct recv_buf *precvbuf) if(precvbuf->pskb) + { +#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER + if(rtw_free_skb_premem(precvbuf->pskb)!=0) +#endif rtw_skb_free(precvbuf->pskb); - - + } return ret; } @@ -302,6 +305,7 @@ void rtw_os_recv_indicate_pkt(_adapter *padapter, _pkt *pkt, struct rx_pkt_attri #ifdef CONFIG_BR_EXT void *br_port = NULL; #endif + int ret; /* Indicat the packets to upper layer */ if (pkt) { @@ -342,7 +346,9 @@ void rtw_os_recv_indicate_pkt(_adapter *padapter, _pkt *pkt, struct rx_pkt_attri if(bmcast && (pskb2 != NULL) ) { pkt = pskb2; + DBG_COUNTER(padapter->rx_logs.os_indicate_ap_mcast); } else { + DBG_COUNTER(padapter->rx_logs.os_indicate_ap_forward); return; } } @@ -350,6 +356,7 @@ void rtw_os_recv_indicate_pkt(_adapter *padapter, _pkt *pkt, struct rx_pkt_attri else// to APself { //DBG_871X("to APSelf\n"); + DBG_COUNTER(padapter->rx_logs.os_indicate_ap_self); } } @@ -395,7 +402,11 @@ void rtw_os_recv_indicate_pkt(_adapter *padapter, _pkt *pkt, struct rx_pkt_attri pkt->ip_summed = CHECKSUM_NONE; #endif //CONFIG_TCP_CSUM_OFFLOAD_RX - rtw_netif_rx(padapter->pnetdev, pkt); + ret = rtw_netif_rx(padapter->pnetdev, pkt); + if (ret == NET_RX_SUCCESS) + DBG_COUNTER(padapter->rx_logs.os_netif_ok); + else + DBG_COUNTER(padapter->rx_logs.os_netif_err); } } @@ -562,6 +573,8 @@ int rtw_recv_indicatepkt(_adapter *padapter, union recv_frame *precv_frame) _func_enter_; + DBG_COUNTER(padapter->rx_logs.os_indicate); + precvpriv = &(padapter->recvpriv); pfree_recv_queue = &(precvpriv->free_recv_queue); @@ -639,6 +652,7 @@ _recv_indicatepkt_drop: if(precv_frame) rtw_free_recvframe(precv_frame, pfree_recv_queue); + DBG_COUNTER(padapter->rx_logs.os_indicate_err); return _FAIL; _func_exit_; diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/rtw_android.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/rtw_android.c old mode 100644 new mode 100755 index e4f59cc605eb..1c9ada1e407a --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/rtw_android.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/rtw_android.c @@ -64,6 +64,9 @@ const char *android_wifi_cmd_str[ANDROID_WIFI_CMD_MAX] = { "P2P_GET_NOA", "P2P_SET_PS", "SET_AP_WPS_P2P_IE", + + "MIRACAST", + #ifdef CONFIG_PNO_SUPPORT "PNOSSIDCLR", "PNOSETUP", @@ -135,16 +138,18 @@ char pno_in_example[] = { #endif /* PNO_SUPPORT */ typedef struct android_wifi_priv_cmd { + char *buf; + int used_len; + int total_len; +} android_wifi_priv_cmd; #ifdef CONFIG_COMPAT +typedef struct compat_android_wifi_priv_cmd { compat_uptr_t buf; -#else - char *buf; -#endif - int used_len; int total_len; -} android_wifi_priv_cmd; +} compat_android_wifi_priv_cmd; +#endif /* CONFIG_COMPAT */ /** * Local (static) functions and variables @@ -438,6 +443,46 @@ int rtw_android_getband(struct net_device *net, char *command, int total_len) return bytes_written; } +enum { + MIRACAST_DISABLED = 0, + MIRACAST_SOURCE, + MIRACAST_SINK, + MIRACAST_INVALID, +}; + +static const char *miracast_mode_str[] = { + "DISABLED", + "SOURCE", + "SINK", + "INVALID", +}; + +static const char *get_miracast_mode_str(int mode) +{ + if (mode < MIRACAST_DISABLED || mode >= MIRACAST_INVALID) + mode = MIRACAST_INVALID; + + return miracast_mode_str[mode]; +} + +int rtw_android_set_miracast_mode(struct net_device *net, char *command, int total_len) +{ + _adapter *adapter = (_adapter *)rtw_netdev_priv(net); + char *arg = command + strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_MIRACAST]) + 1; + u8 mode; + int num; + int ret = _FAIL; + + num = sscanf(arg, "%hhu", &mode); + + if (num >= 1) { + DBG_871X("Miracast mode: %s(%u)\n", get_miracast_mode_str(mode), mode); + ret = _SUCCESS; + } + + return (ret==_SUCCESS)?0:-1; +} + int get_int_from_command( char* pcmd ) { int i = 0; @@ -517,12 +562,27 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) #ifdef CONFIG_WFD struct wifi_display_info *pwfd_info; #endif + rtw_lock_suspend(); if (!ifr->ifr_data) { ret = -EINVAL; goto exit; } +#ifdef CONFIG_COMPAT + if (is_compat_task()) { + /* User space is 32-bit, use compat ioctl */ + compat_android_wifi_priv_cmd compat_priv_cmd; + + if (copy_from_user(&compat_priv_cmd, ifr->ifr_data, sizeof(compat_android_wifi_priv_cmd))) { + ret = -EFAULT; + goto exit; + } + priv_cmd.buf = compat_ptr(compat_priv_cmd.buf); + priv_cmd.used_len = compat_priv_cmd.used_len; + priv_cmd.total_len = compat_priv_cmd.total_len; + } else +#endif /* CONFIG_COMPAT */ if (copy_from_user(&priv_cmd, ifr->ifr_data, sizeof(android_wifi_priv_cmd))) { ret = -EFAULT; goto exit; @@ -545,11 +605,7 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) ret = -EFAULT; goto exit; } -#ifdef CONFIG_COMPAT - if (copy_from_user(command, compat_ptr(priv_cmd.buf), (unsigned long) priv_cmd.total_len)) { -#else if (copy_from_user(command, (void *)priv_cmd.buf, priv_cmd.total_len)) { -#endif ret = -EFAULT; goto exit; } @@ -652,7 +708,11 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) case ANDROID_WIFI_CMD_GETBAND: bytes_written = rtw_android_getband(net, command, priv_cmd.total_len); break; - + + case ANDROID_WIFI_CMD_MIRACAST: + bytes_written = rtw_android_set_miracast_mode(net, command, priv_cmd.total_len); + break; + case ANDROID_WIFI_CMD_COUNTRY: bytes_written = rtw_android_set_country(net, command, priv_cmd.total_len); break; @@ -728,12 +788,8 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) pwfd_info = &padapter->wfd_info; if( padapter->wdinfo.driver_interface == DRIVER_CFG80211 ) { -#ifdef CONFIG_COMPAT - pwfd_info->rtsp_ctrlport = ( u16 ) get_int_from_command( compat_ptr(priv_cmd.buf) ); -#else pwfd_info->rtsp_ctrlport = ( u16 ) get_int_from_command( priv_cmd.buf ); -#endif - } + } break; } case ANDROID_WIFI_CMD_WFD_SET_MAX_TPUT: @@ -748,12 +804,7 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) pwfd_info = &padapter->wfd_info; if( padapter->wdinfo.driver_interface == DRIVER_CFG80211 ) { -#ifdef CONFIG_COMPAT - pwfd_info->wfd_device_type = ( u8 ) get_int_from_command( compat_ptr(priv_cmd.buf) ); -#else pwfd_info->wfd_device_type = ( u8 ) get_int_from_command( priv_cmd.buf ); -#endif - pwfd_info->wfd_device_type &= WFD_DEVINFO_DUAL; } break; @@ -763,7 +814,7 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) { #ifdef CONFIG_LPS u8 dtim; - u8 *ptr = priv_cmd.buf; + u8 *ptr =(u8 *) &priv_cmd.buf; ptr += 9;//string command length of "SET_DTIM"; @@ -797,7 +848,7 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) } #ifdef CONFIG_GTK_OL case ANDROID_WIFI_CMD_GTK_REKEY_OFFLOAD: - rtw_gtk_offload(net, priv_cmd.buf); + rtw_gtk_offload(net, (u8 *)&priv_cmd.buf); break; #endif //CONFIG_GTK_OL case ANDROID_WIFI_CMD_P2P_DISABLE: @@ -827,11 +878,7 @@ response: bytes_written++; } priv_cmd.used_len = bytes_written; -#ifdef CONFIG_COMPAT - if (copy_to_user(compat_ptr(priv_cmd.buf), command, bytes_written)) { -#else if (copy_to_user((void *)priv_cmd.buf, command, bytes_written)) { -#endif DBG_871X("%s: failed to copy data to user buffer\n", __FUNCTION__); ret = -EFAULT; } @@ -863,9 +910,14 @@ static struct resource *wifi_irqres = NULL; static int wifi_add_dev(void); static void wifi_del_dev(void); +extern int rockchip_wifi_get_oob_irq(void); int rtw_android_wifictrl_func_add(void) { int ret = 0; +#if 1 + oob_irq = rockchip_wifi_get_oob_irq(); + printk("%s: rockchip_wifi_get_oob_irq :%d\n", __func__, oob_irq); +#else sema_init(&wifi_control_sem, 0); ret = wifi_add_dev(); @@ -880,20 +932,22 @@ int rtw_android_wifictrl_func_add(void) ret = -EINVAL; DBG_871X("%s: platform_driver_register timeout\n", __FUNCTION__); } - +#endif return ret; } void rtw_android_wifictrl_func_del(void) { +#if 0 if (g_wifidev_registered) { wifi_del_dev(); g_wifidev_registered = 0; } +#endif } -void *wl_android_prealloc(int section, unsigned long size) +void *rtw_wl_android_prealloc(int section, unsigned long size) { void *alloc_ptr = NULL; if (wifi_control_data && wifi_control_data->mem_prealloc) { diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/rtw_proc.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/rtw_proc.c old mode 100644 new mode 100755 index c55f6373ac6f..039578642edf --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/rtw_proc.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/rtw_proc.c @@ -319,7 +319,7 @@ int proc_get_rx_info(struct seq_file *m, void *v) } -int proc_reset_rx_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) +ssize_t proc_reset_rx_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) { struct net_device *dev = data; _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); @@ -389,31 +389,67 @@ static int proc_get_cam_cache(struct seq_file *m, void *v) struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); u8 i; - DBG_871X_SEL_NL(m, "%-2s %-6s %-17s %-32s %-7s %-3s" - //" %-2s %-2s" + DBG_871X_SEL_NL(m, "cam bitmap:0x%016llx\n", dvobj->cam_ctl.bitmap); + + DBG_871X_SEL_NL(m, "%-2s %-6s %-17s %-32s %-3s %-7s" + //" %-2s %-2s %-4s %-5s" "\n" - , "id", "ctrl", "mac", "key", "type", "kid" - //, "DK", "GK" + , "id", "ctrl", "addr", "key", "kid", "type" + //, "MK", "GK", "MFB", "valid" ); for (i=0;i<32;i++) { if (dvobj->cam_cache[i].ctrl != 0) - DBG_871X_SEL_NL(m, "%2u 0x%04x "MAC_FMT" "KEY_FMT" %-7s %3u" - //" %2u %2u" + DBG_871X_SEL_NL(m, "%2u 0x%04x "MAC_FMT" "KEY_FMT" %3u %-7s" + //" %2u %2u 0x%02x %5u" "\n", i , dvobj->cam_cache[i].ctrl , MAC_ARG(dvobj->cam_cache[i].mac) , KEY_ARG(dvobj->cam_cache[i].key) - , security_type_str(((dvobj->cam_cache[i].ctrl)>>2)&0x07) , (dvobj->cam_cache[i].ctrl)&0x03 + , security_type_str(((dvobj->cam_cache[i].ctrl)>>2)&0x07) //, ((dvobj->cam_cache[i].ctrl)>>5)&0x01 //, ((dvobj->cam_cache[i].ctrl)>>6)&0x01 + //, ((dvobj->cam_cache[i].ctrl)>>8)&0x7f + //, ((dvobj->cam_cache[i].ctrl)>>15)&0x01 ); } return 0; } +#ifdef CONFIG_BT_COEXIST +ssize_t proc_set_btinfo_evt(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) +{ + struct net_device *dev = data; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + char tmp[32]; + u8 btinfo[8]; + + if (count < 6) + return -EFAULT; + + if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { + int num = 0; + + _rtw_memset(btinfo, 0, 8); + + num = sscanf(tmp, "%hhx %hhx %hhx %hhx %hhx %hhx %hhx %hhx" + , &btinfo[0], &btinfo[1], &btinfo[2], &btinfo[3] + , &btinfo[4], &btinfo[5], &btinfo[6], &btinfo[7]); + + if (num < 6) + return -EINVAL; + + btinfo[1] = num-2; + + rtw_btinfo_cmd(padapter, btinfo, btinfo[1]+2); + } + + return count; +} +#endif + /* * rtw_adapter_proc: * init/deinit when register/unregister net_device @@ -485,12 +521,23 @@ const struct rtw_proc_hdl adapter_proc_hdls [] = { #ifdef CONFIG_BT_COEXIST {"btcoex_dbg", proc_get_btcoex_dbg, proc_set_btcoex_dbg}, {"btcoex", proc_get_btcoex_info, NULL}, + {"btinfo_evt", proc_get_dummy, proc_set_btinfo_evt}, #endif /* CONFIG_BT_COEXIST */ #if defined(DBG_CONFIG_ERROR_DETECT) {"sreset", proc_get_sreset, proc_set_sreset}, #endif /* DBG_CONFIG_ERROR_DETECT */ {"linked_info_dump",proc_get_linked_info_dump,proc_set_linked_info_dump}, +#ifdef CONFIG_DBG_COUNTER + {"rx_logs", proc_get_rx_logs, NULL}, + {"tx_logs", proc_get_tx_logs, NULL}, + {"int_logs", proc_get_int_logs, NULL}, +#endif + +#ifdef CONFIG_PCI_HCI + {"rx_ring", proc_get_rx_ring, NULL}, + {"tx_ring", proc_get_tx_ring, NULL}, +#endif }; const int adapter_proc_hdls_num = sizeof(adapter_proc_hdls) / sizeof(struct rtw_proc_hdl); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/rtw_proc.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/rtw_proc.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/usb_intf.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/usb_intf.c old mode 100644 new mode 100755 index 99e2d101c025..b5dbac4d4406 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/usb_intf.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/usb_intf.c @@ -44,7 +44,6 @@ int ui_pid[3] = {0, 0, 0}; extern int pm_netdev_open(struct net_device *pnetdev,u8 bnormal); static int rtw_suspend(struct usb_interface *intf, pm_message_t message); static int rtw_resume(struct usb_interface *intf); -int rtw_resume_process(_adapter *padapter); static int rtw_drv_init(struct usb_interface *pusb_intf,const struct usb_device_id *pdid); @@ -305,7 +304,7 @@ static struct usb_device_id rtw_usb_id_tbl[] ={ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x0811),.driver_info = RTL8821},/* Default ID */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x0821),.driver_info = RTL8821},/* Default ID */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8822),.driver_info = RTL8821},/* Default ID */ - {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x0820),.driver_info = RTL8821},/* Default ID */ + {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0x0820,0xff,0xff,0xff),.driver_info = RTL8821}, /* 8821AU */ /*=== Customer ID ===*/ {USB_DEVICE(0x7392, 0xA811),.driver_info = RTL8821}, /* Edimax - Edimax */ {USB_DEVICE(0x04BB, 0x0953),.driver_info = RTL8821}, /* I-O DATA - Edimax */ @@ -714,6 +713,9 @@ static void rtw_decide_chip_type_by_usb_info(_adapter *padapter, const struct us } void rtw_set_hal_ops(_adapter *padapter) { + //alloc memory for HAL DATA + rtw_hal_data_init(padapter); + #ifdef CONFIG_RTL8192C if(padapter->chip_type == RTL8188C_8192C) rtl8192cu_set_hal_ops(padapter); @@ -978,13 +980,26 @@ error_exit: } #endif -#ifdef CONFIG_SUSPEND_REFINE static int rtw_suspend(struct usb_interface *pusb_intf, pm_message_t message) { + struct dvobj_priv *dvobj; + struct pwrctrl_priv *pwrpriv; + struct debug_priv *pdbgpriv; + PADAPTER padapter; int ret = 0; - struct dvobj_priv *dvobj = usb_get_intfdata(pusb_intf); - _adapter *padapter = dvobj->if1; - struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); + + + dvobj = usb_get_intfdata(pusb_intf); + pwrpriv = dvobj_to_pwrctl(dvobj); + pdbgpriv = &dvobj->drv_dbg; + padapter = dvobj->if1; + + if (pwrpriv->bInSuspend == _TRUE) { + DBG_871X("%s bInSuspend = %d\n", __FUNCTION__, pwrpriv->bInSuspend); + pdbgpriv->dbg_suspend_error_cnt++; + goto exit; + } + if((padapter->bup) || (padapter->bDriverStopped == _FALSE)||(padapter->bSurpriseRemoved == _FALSE)) { #ifdef CONFIG_AUTOSUSPEND @@ -1002,23 +1017,37 @@ static int rtw_suspend(struct usb_interface *pusb_intf, pm_message_t message) } #endif//CONFIG_AUTOSUSPEND } + ret = rtw_suspend_common(padapter); +exit: return ret; } + int rtw_resume_process(_adapter *padapter) { int ret,pm_cnt = 0; struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); - - #if defined(CONFIG_BT_COEXIST) && defined(CONFIG_AUTOSUSPEND) //add by amy for 8723as-vau - #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,32)) + struct dvobj_priv *pdvobj = padapter->dvobj; + struct debug_priv *pdbgpriv = &pdvobj->drv_dbg; + + + if (pwrpriv->bInSuspend == _FALSE) + { + pdbgpriv->dbg_resume_error_cnt++; + DBG_871X("%s bInSuspend = %d\n", __FUNCTION__, pwrpriv->bInSuspend); + return -1; + } + +#if defined(CONFIG_BT_COEXIST) && defined(CONFIG_AUTOSUSPEND) //add by amy for 8723as-vau +#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,32)) DBG_871X("%s...pm_usage_cnt(%d) pwrpriv->bAutoResume=%x. ....\n",__func__,atomic_read(&(adapter_to_dvobj(padapter)->pusbintf->pm_usage_cnt)),pwrpriv->bAutoResume); pm_cnt=atomic_read(&(adapter_to_dvobj(padapter)->pusbintf->pm_usage_cnt)); - #else +#else // kernel < 2.6.32 DBG_871X("...pm_usage_cnt(%d).....\n", adapter_to_dvobj(padapter)->pusbintf->pm_usage_cnt); pm_cnt = adapter_to_dvobj(padapter)->pusbintf->pm_usage_cnt; - #endif +#endif // kernel < 2.6.32 + DBG_871X("pwrpriv->bAutoResume (%x)\n",pwrpriv->bAutoResume ); if( _TRUE == pwrpriv->bAutoResume ){ pwrpriv->bInternalAutoSuspend = _FALSE; @@ -1026,7 +1055,7 @@ int rtw_resume_process(_adapter *padapter) DBG_871X("pwrpriv->bAutoResume (%x) pwrpriv->bInternalAutoSuspend(%x)\n",pwrpriv->bAutoResume,pwrpriv->bInternalAutoSuspend ); } - #endif //#ifdef CONFIG_BT_COEXIST &CONFIG_AUTOSUSPEND& +#endif //#ifdef CONFIG_BT_COEXIST &CONFIG_AUTOSUSPEND& #if defined (CONFIG_WOWLAN) || defined (CONFIG_AP_WOWLAN) /* @@ -1071,277 +1100,62 @@ int rtw_resume_process(_adapter *padapter) return ret; } -#else -static int rtw_suspend(struct usb_interface *pusb_intf, pm_message_t message) -{ - struct dvobj_priv *dvobj = usb_get_intfdata(pusb_intf); - _adapter *padapter = dvobj->if1; - struct net_device *pnetdev = padapter->pnetdev; - struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); - struct usb_device *usb_dev = interface_to_usbdev(pusb_intf); - -#ifdef CONFIG_WOWLAN - struct wowlan_ioctl_param poidparam; -#endif // CONFIG_WOWLAN +static int rtw_resume(struct usb_interface *pusb_intf) +{ + struct dvobj_priv *dvobj; + struct pwrctrl_priv *pwrpriv; + struct debug_priv *pdbgpriv; + PADAPTER padapter; + struct mlme_ext_priv *pmlmeext; int ret = 0; - u32 start_time = rtw_get_current_time(); - _func_enter_; - - DBG_871X("==> %s (%s:%d)\n",__FUNCTION__, current->comm, current->pid); - -#ifdef CONFIG_WOWLAN - if (check_fwstate(pmlmepriv, _FW_LINKED)) - pwrpriv->wowlan_mode = _TRUE; - else - pwrpriv->wowlan_mode = _FALSE; -#endif - -#ifdef CONFIG_IOL_READ_EFUSE_MAP - if(!padapter->bup){ - u8 bMacPwrCtrlOn = _FALSE; - rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); - if(bMacPwrCtrlOn) - rtw_hal_power_off(padapter); - } -#endif - - if((!padapter->bup) || (padapter->bDriverStopped)||(padapter->bSurpriseRemoved)) - { - DBG_871X("padapter->bup=%d bDriverStopped=%d bSurpriseRemoved = %d\n", - padapter->bup, padapter->bDriverStopped,padapter->bSurpriseRemoved); - goto exit; - } - if(pwrpriv->bInternalAutoSuspend ) - { - #ifdef CONFIG_AUTOSUSPEND - #ifdef SUPPORT_HW_RFOFF_DETECTED - // The FW command register update must after MAC and FW init ready. - if((padapter->bFWReady) && (pwrpriv->bHWPwrPindetect ) && (padapter->registrypriv.usbss_enable )) - { - u8 bOpen = _TRUE; - rtw_interface_ps_func(padapter,HAL_USB_SELECT_SUSPEND,&bOpen); - //rtl8192c_set_FwSelectSuspend_cmd(padapter,_TRUE ,500);//note fw to support hw power down ping detect - } - #endif - #endif - } - pwrpriv->bInSuspend = _TRUE; - rtw_cancel_all_timer(padapter); - LeaveAllPowerSaveMode(padapter); + dvobj = usb_get_intfdata(pusb_intf); + pwrpriv = dvobj_to_pwrctl(dvobj); + pdbgpriv = &dvobj->drv_dbg; + padapter = dvobj->if1; + pmlmeext = &padapter->mlmeextpriv; - rtw_stop_cmd_thread(padapter); + DBG_871X("==> %s (%s:%d)\n", __FUNCTION__, current->comm, current->pid); + pdbgpriv->dbg_resume_cnt++; - _enter_pwrlock(&pwrpriv->lock); - //padapter->net_closed = _TRUE; - //s1. - if(pnetdev) + if(pwrpriv->bInternalAutoSuspend) { - netif_carrier_off(pnetdev); - rtw_netif_stop_queue(pnetdev); - } - -#ifdef CONFIG_WOWLAN - if(pwrpriv->bSupportRemoteWakeup==_TRUE && pwrpriv->wowlan_mode==_TRUE){ - if (rtw_port_switch_chk(padapter)) - rtw_hal_set_hwreg(padapter, HW_VAR_PORT_SWITCH, NULL); - - //set H2C command - poidparam.subcode=WOWLAN_ENABLE; - padapter->HalFunc.SetHwRegHandler(padapter,HW_VAR_WOWLAN,(u8 *)&poidparam); + ret = rtw_resume_process(padapter); } else -#else { - //s2. - rtw_disassoc_cmd(padapter, 0, _FALSE); - } -#endif //CONFIG_WOWLAN - - if (rtw_chk_roam_flags(padapter, RTW_ROAM_ON_RESUME)) { - if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) - && check_fwstate(pmlmepriv, _FW_LINKED)) + if(pwrpriv->wowlan_mode || pwrpriv->wowlan_ap_mode) { - //DBG_871X("%s:%d assoc_ssid:%s\n", __FUNCTION__, __LINE__, pmlmepriv->assoc_ssid.Ssid); - DBG_871X("%s:%d %s(" MAC_FMT "), length:%d assoc_ssid.length:%d\n",__FUNCTION__, __LINE__, - pmlmepriv->cur_network.network.Ssid.Ssid, - MAC_ARG(pmlmepriv->cur_network.network.MacAddress), - pmlmepriv->cur_network.network.Ssid.SsidLength, - pmlmepriv->assoc_ssid.SsidLength); - - rtw_set_to_roam(padapter, 1); + rtw_resume_lock_suspend(); + ret = rtw_resume_process(padapter); + rtw_resume_unlock_suspend(); } - } - - //s2-2. indicate disconnect to os - rtw_indicate_disconnect(padapter); - //s2-3. - rtw_free_assoc_resources(padapter, 1); -#ifdef CONFIG_AUTOSUSPEND - if(!pwrpriv->bInternalAutoSuspend ) -#endif - //s2-4. - rtw_free_network_queue(padapter, _TRUE); - - rtw_dev_unload(padapter); -#ifdef CONFIG_AUTOSUSPEND - pwrpriv->rf_pwrstate = rf_off; - pwrpriv->bips_processing = _FALSE; -#endif - _exit_pwrlock(&pwrpriv->lock); - - if(check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) - rtw_indicate_scan_done(padapter, 1); - - if(check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) - rtw_indicate_disconnect(padapter); - -exit: - DBG_871X("<=== %s return %d.............. in %dms\n", __FUNCTION__ - , ret, rtw_get_passing_time_ms(start_time)); - - _func_exit_; - return ret; -} - - -int rtw_resume_process(_adapter *padapter) -{ - struct net_device *pnetdev; - struct pwrctrl_priv *pwrpriv = NULL; - int ret = -1; - u32 start_time = rtw_get_current_time(); -#ifdef CONFIG_BT_COEXIST - u8 pm_cnt; -#endif //#ifdef CONFIG_BT_COEXIST - _func_enter_; - - DBG_871X("==> %s (%s:%d)\n",__FUNCTION__, current->comm, current->pid); - - if(padapter) { - pnetdev= padapter->pnetdev; - pwrpriv = adapter_to_pwrctl(padapter); - } else { - goto exit; - } - - _enter_pwrlock(&pwrpriv->lock); -#ifdef CONFIG_BT_COEXIST -#ifdef CONFIG_AUTOSUSPEND - #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,32)) - DBG_871X("%s...pm_usage_cnt(%d) pwrpriv->bAutoResume=%x. ....\n",__func__,atomic_read(&(adapter_to_dvobj(padapter)->pusbintf->pm_usage_cnt)),pwrpriv->bAutoResume); - pm_cnt=atomic_read(&(adapter_to_dvobj(padapter)->pusbintf->pm_usage_cnt)); - #else - DBG_871X("...pm_usage_cnt(%d).....\n", adapter_to_dvobj(padapter)->pusbintf->pm_usage_cnt); - pm_cnt = adapter_to_dvobj(padapter)->pusbintf->pm_usage_cnt; - #endif - - DBG_871X("pwrpriv->bAutoResume (%x)\n",pwrpriv->bAutoResume ); - if( _TRUE == pwrpriv->bAutoResume ){ - pwrpriv->bInternalAutoSuspend = _FALSE; - pwrpriv->bAutoResume=_FALSE; - DBG_871X("pwrpriv->bAutoResume (%x) pwrpriv->bInternalAutoSuspend(%x)\n",pwrpriv->bAutoResume,pwrpriv->bInternalAutoSuspend ); - - } -#endif //#ifdef CONFIG_AUTOSUSPEND -#endif //#ifdef CONFIG_BT_COEXIST - rtw_reset_drv_sw(padapter); - pwrpriv->bkeepfwalive = _FALSE; - - DBG_871X("bkeepfwalive(%x)\n",pwrpriv->bkeepfwalive); - if(pm_netdev_open(pnetdev,_TRUE) != 0){ - _exit_pwrlock(&pwrpriv->lock); - goto exit; - } - - netif_device_attach(pnetdev); - netif_carrier_on(pnetdev); - -#ifdef CONFIG_AUTOSUSPEND - if(pwrpriv->bInternalAutoSuspend ) - { - #ifdef CONFIG_AUTOSUSPEND - #ifdef SUPPORT_HW_RFOFF_DETECTED - // The FW command register update must after MAC and FW init ready. - if((padapter->bFWReady) && (pwrpriv->bHWPwrPindetect) && (padapter->registrypriv.usbss_enable )) + else { - //rtl8192c_set_FwSelectSuspend_cmd(padapter,_FALSE ,500);//note fw to support hw power down ping detect - u8 bOpen = _FALSE; - rtw_interface_ps_func(padapter,HAL_USB_SELECT_SUSPEND,&bOpen); - } - #endif - #endif -#ifdef CONFIG_BT_COEXIST - DBG_871X("pwrpriv->bAutoResume (%x)\n",pwrpriv->bAutoResume ); - if( _TRUE == pwrpriv->bAutoResume ){ - pwrpriv->bInternalAutoSuspend = _FALSE; - pwrpriv->bAutoResume=_FALSE; - DBG_871X("pwrpriv->bAutoResume (%x) pwrpriv->bInternalAutoSuspend(%x)\n",pwrpriv->bAutoResume,pwrpriv->bInternalAutoSuspend ); - } - -#else //#ifdef CONFIG_BT_COEXIST - pwrpriv->bInternalAutoSuspend = _FALSE; -#endif //#ifdef CONFIG_BT_COEXIST - pwrpriv->brfoffbyhw = _FALSE; - } -#endif - _exit_pwrlock(&pwrpriv->lock); - - if( padapter->pid[1]!=0) { - DBG_871X("pid[1]:%d\n",padapter->pid[1]); - rtw_signal_process(padapter->pid[1], SIGUSR2); - } - - if (rtw_chk_roam_flags(padapter, RTW_ROAM_ON_RESUME)) - rtw_roaming(padapter, NULL); - - ret = 0; -exit: - #ifdef CONFIG_RESUME_IN_WORKQUEUE - rtw_unlock_suspend(); - #endif //CONFIG_RESUME_IN_WORKQUEUE - - pwrpriv->bInSuspend = _FALSE; - DBG_871X("<=== %s return %d.............. in %dms\n", __FUNCTION__ - , ret, rtw_get_passing_time_ms(start_time)); - - _func_exit_; - - return ret; -} -#endif -static int rtw_resume(struct usb_interface *pusb_intf) -{ - struct dvobj_priv *dvobj = usb_get_intfdata(pusb_intf); - _adapter *padapter = dvobj->if1; - struct net_device *pnetdev = padapter->pnetdev; - struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj); - int ret = 0; - - if(pwrpriv->bInternalAutoSuspend ){ - ret = rtw_resume_process(padapter); - } else { #ifdef CONFIG_RESUME_IN_WORKQUEUE - rtw_resume_in_workqueue(pwrpriv); -#else - if (rtw_is_earlysuspend_registered(pwrpriv) - #ifdef CONFIG_WOWLAN - && !pwrpriv->wowlan_mode - #endif /* CONFIG_WOWLAN */ - ) { - /* jeff: bypass resume here, do in late_resume */ - rtw_set_do_late_resume(pwrpriv, _TRUE); - } else { - ret = rtw_resume_process(padapter); + rtw_resume_in_workqueue(pwrpriv); +#else + if (rtw_is_earlysuspend_registered(pwrpriv)) + { + /* jeff: bypass resume here, do in late_resume */ + rtw_set_do_late_resume(pwrpriv, _TRUE); + } + else + { + rtw_resume_lock_suspend(); + ret = rtw_resume_process(padapter); + rtw_resume_unlock_suspend(); + } +#endif } -#endif /* CONFIG_RESUME_IN_WORKQUEUE */ } - return ret; + pmlmeext->last_scan_time = rtw_get_current_time(); + DBG_871X("<======== %s return %d\n", __FUNCTION__, ret); + return ret; } @@ -1402,6 +1216,7 @@ void autosuspend_enter(_adapter* padapter) #endif } + int autoresume_enter(_adapter* padapter) { int result = _SUCCESS; @@ -1939,7 +1754,9 @@ static void rtw_drv_halt(void) } #include "wifi_version.h" -#include + +extern int rockchip_wifi_power(int on); +extern int rockchip_wifi_set_carddetect(int val); int rockchip_wifi_init_module_rtkwifi(void) { @@ -1947,9 +1764,9 @@ int rockchip_wifi_init_module_rtkwifi(void) printk("=======================================================\n"); printk("==== Launching Wi-Fi driver! (Powered by Rockchip) ====\n"); printk("=======================================================\n"); - printk("Realtek 8723BU USB WiFi driver (Powered by Rockchip,Ver %s) init.\n", RTL8192_DRV_VERSION); - rockchip_wifi_power(1); + printk("Realtek 8723BU USB WiFi driver (Powered by Rockchip,Ver %s) init.\n", RTL8723BU_DRV_VERSION); + rockchip_wifi_power(1); return rtw_drv_entry(); } @@ -1959,16 +1776,18 @@ void rockchip_wifi_exit_module_rtkwifi(void) printk("=======================================================\n"); printk("==== Dislaunching Wi-Fi driver! (Powered by Rockchip) ====\n"); printk("=======================================================\n"); - printk("Realtek 8723BU USB WiFi driver (Powered by Rockchip,Ver %s) init.\n", RTL8192_DRV_VERSION); + printk("Realtek 8723BU USB WiFi driver (Powered by Rockchip,Ver %s) init.\n", RTL8723BU_DRV_VERSION); + rtw_drv_halt(); rockchip_wifi_power(0); } EXPORT_SYMBOL(rockchip_wifi_init_module_rtkwifi); EXPORT_SYMBOL(rockchip_wifi_exit_module_rtkwifi); + //module_init(rtw_drv_entry); //module_exit(rtw_drv_halt); - + #ifdef CONFIG_INTEL_PROXIM _adapter *rtw_usb_get_sw_pointer(void) { diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/usb_ops_linux.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/usb_ops_linux.c old mode 100644 new mode 100755 index 50990a37c30c..d854d7690995 --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/usb_ops_linux.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/usb_ops_linux.c @@ -318,7 +318,7 @@ unsigned int ffaddr2pipehdl(struct dvobj_priv *pdvobj, u32 addr) pipe=usb_rcvbulkpipe(pusbd, pdvobj->RtInPipe[0]); } else if (addr == RECV_INT_IN_ADDR) { - pipe=usb_rcvbulkpipe(pusbd, pdvobj->RtInPipe[1]); + pipe=usb_rcvintpipe(pusbd, pdvobj->RtInPipe[1]); } else if (addr < HW_QUEUE_ENTRY) { ep_num = pdvobj->Queue2Pipe[addr]; @@ -486,11 +486,6 @@ _func_enter_; case BK_QUEUE_INX: pxmitpriv->bkq_cnt--; break; - case HIGH_QUEUE_INX: -#ifdef CONFIG_AP_MODE - rtw_chk_hi_queue_cmd(padapter); -#endif - break; default: break; } @@ -598,7 +593,7 @@ _func_enter_; check_completion: _enter_critical(&pxmitpriv->lock_sctx, &irqL); rtw_sctx_done_err(&pxmitbuf->sctx, - purb->status ? RTW_SCTX_DONE_WRITE_PORT_ERR : RTW_SCTX_DONE_SUCCESS); + purb->status ? RTW_SCTX_DONE_WRITE_PORT_ERR : RTW_SCTX_DONE_SUCCESS); _exit_critical(&pxmitpriv->lock_sctx, &irqL); rtw_free_xmitbuf(pxmitpriv, pxmitbuf); @@ -776,7 +771,7 @@ void usb_write_port_cancel(struct intf_hdl *pintfhdl) } pxmitbuf = (struct xmit_buf*)padapter->xmitpriv.pxmit_extbuf; - for (i = 0; i < NR_XMIT_EXTBUFF; i++) { + for (i = 0; i < NR_XMIT_EXTBUFF ; i++) { for (j=0; j<8; j++) { if(pxmitbuf->pxmit_urb[j]) { usb_kill_urb(pxmitbuf->pxmit_urb[j]); diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/wifi_regd.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/wifi_regd.c old mode 100644 new mode 100755 index e7f8d534f954..54d1331ba81e --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/wifi_regd.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/wifi_regd.c @@ -357,7 +357,11 @@ static void _rtw_reg_apply_flags(struct wiphy *wiphy) ch = ieee80211_get_channel(wiphy, freq); if (ch) { if (channel_set[i].ScanType == SCAN_PASSIVE) +#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0)) ch->flags = IEEE80211_CHAN_PASSIVE_SCAN; +#else // kernel >= 3.14 + ch->flags = IEEE80211_CHAN_NO_IR; +#endif // kernel >= 3.14 else ch->flags = 0; } @@ -474,7 +478,7 @@ static const struct ieee80211_regdomain *_rtw_regdomain_select(struct #endif } -static int _rtw_regd_init_wiphy(struct rtw_regulatory *reg, +static void _rtw_regd_init_wiphy(struct rtw_regulatory *reg, struct wiphy *wiphy, void (*reg_notifier) (struct wiphy * wiphy, struct regulatory_request * @@ -484,9 +488,15 @@ static int _rtw_regd_init_wiphy(struct rtw_regulatory *reg, wiphy->reg_notifier = reg_notifier; +#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0)) wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY; wiphy->flags &= ~WIPHY_FLAG_STRICT_REGULATORY; wiphy->flags &= ~WIPHY_FLAG_DISABLE_BEACON_HINTS; +#else // kernel >= 3.14 + wiphy->regulatory_flags |= REGULATORY_CUSTOM_REG; + wiphy->regulatory_flags &= ~REGULATORY_STRICT_REG; + wiphy->regulatory_flags &= ~REGULATORY_DISABLE_BEACON_HINTS; +#endif // kernel >= 3.14 regd = _rtw_regdomain_select(reg); wiphy_apply_custom_regulatory(wiphy, regd); @@ -495,7 +505,6 @@ static int _rtw_regd_init_wiphy(struct rtw_regulatory *reg, _rtw_reg_apply_flags(wiphy); _rtw_reg_apply_radar_flags(wiphy); _rtw_reg_apply_world_flags(wiphy, NL80211_REGDOM_SET_BY_DRIVER, reg); - return 0; } static struct country_code_to_enum_rd *_rtw_regd_find_country(u16 countrycode) diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/wifi_version.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/wifi_version.h old mode 100644 new mode 100755 index 3a7eacdb6101..29eb9dd91bea --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/wifi_version.h +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/wifi_version.h @@ -1,13 +1,13 @@ /* - * xxh@rock-chip.com + * Yongle Lai @ Rockchip */ -#ifndef _WIFI_VERSION_H_ -#define _WIFI_VERSION_H_ +#ifndef WIFI_VERSION_H +#define WIFI_VERSION_H /* - * Broadcom BCM4319 driver version. + * Marvell MV8686 driver version. */ -#define RTL8192_DRV_VERSION "2.10.WFD" +#define RTL8723BU_DRV_VERSION "3.00.WFD" #endif /* WIFI_VERSION_H */ diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/xmit_linux.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/xmit_linux.c old mode 100644 new mode 100755 index 0539e65e94a9..43af7562010a --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/xmit_linux.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/linux/xmit_linux.c @@ -143,11 +143,11 @@ int rtw_os_xmit_resource_alloc(_adapter *padapter, struct xmit_buf *pxmitbuf, u3 for(i=0; i<8; i++) { pxmitbuf->pxmit_urb[i] = usb_alloc_urb(0, GFP_KERNEL); - if(pxmitbuf->pxmit_urb[i] == NULL) - { - DBG_871X("pxmitbuf->pxmit_urb[i]==NULL"); - return _FAIL; - } + if(pxmitbuf->pxmit_urb[i] == NULL) + { + DBG_871X("pxmitbuf->pxmit_urb[i]==NULL"); + return _FAIL; + } } #endif } @@ -304,6 +304,8 @@ int rtw_mlcst2unicst(_adapter *padapter, struct sk_buff *skb) int i; s32 res; + DBG_COUNTER(padapter->tx_logs.os_tx_m2u); + _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); phead = &pstapriv->asoc_list; plist = get_next(phead); @@ -324,14 +326,22 @@ int rtw_mlcst2unicst(_adapter *padapter, struct sk_buff *skb) for (i = 0; i < chk_alive_num; i++) { psta = rtw_get_stainfo_by_offset(pstapriv, chk_alive_list[i]); if(!(psta->state &_FW_LINKED)) + { + DBG_COUNTER(padapter->tx_logs.os_tx_m2u_ignore_fw_linked); continue; + } /* avoid come from STA1 and send back STA1 */ if (_rtw_memcmp(psta->hwaddr, &skb->data[6], 6) == _TRUE || _rtw_memcmp(psta->hwaddr, null_addr, 6) == _TRUE || _rtw_memcmp(psta->hwaddr, bc_addr, 6) == _TRUE ) + { + DBG_COUNTER(padapter->tx_logs.os_tx_m2u_ignore_self); continue; + } + + DBG_COUNTER(padapter->tx_logs.os_tx_m2u_entry); newskb = rtw_skb_copy(skb); @@ -339,11 +349,13 @@ int rtw_mlcst2unicst(_adapter *padapter, struct sk_buff *skb) _rtw_memcpy(newskb->data, psta->hwaddr, 6); res = rtw_xmit(padapter, &newskb); if (res < 0) { + DBG_COUNTER(padapter->tx_logs.os_tx_m2u_entry_err_xmit); DBG_871X("%s()-%d: rtw_xmit() return error!\n", __FUNCTION__, __LINE__); pxmitpriv->tx_drop++; rtw_skb_free(newskb); } } else { + DBG_COUNTER(padapter->tx_logs.os_tx_m2u_entry_err_skb); DBG_871X("%s-%d: rtw_skb_copy() failed!\n", __FUNCTION__, __LINE__); pxmitpriv->tx_drop++; //rtw_skb_free(skb); @@ -372,9 +384,16 @@ int _rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev) _func_enter_; + if(padapter->registrypriv.mp_mode) + { + DBG_871X("MP_TX_DROP_OS_FRAME\n"); + goto drop_packet; + } + DBG_COUNTER(padapter->tx_logs.os_tx); RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("+xmit_enry\n")); if (rtw_if_up(padapter) == _FALSE) { + DBG_COUNTER(padapter->tx_logs.os_tx_err_up); RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("rtw_xmit_entry: rtw_if_up fail\n")); #ifdef DBG_TX_DROP_FRAME DBG_871X("DBG_TX_DROP_FRAME %s if_up fail\n", __FUNCTION__); @@ -388,7 +407,11 @@ _func_enter_; if ( !rtw_mc2u_disable && check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE && ( IP_MCAST_MAC(pkt->data) - || ICMPV6_MCAST_MAC(pkt->data) ) + || ICMPV6_MCAST_MAC(pkt->data) + #ifdef CONFIG_TX_BCAST2UNI + || is_broadcast_mac_addr(pkt->data) + #endif + ) && (padapter->registrypriv.wifi_spec == 0) ) { @@ -400,6 +423,7 @@ _func_enter_; } else { //DBG_871X("Stop M2U(%d, %d)! ", pxmitpriv->free_xmitframe_cnt, pxmitpriv->free_xmitbuf_cnt); //DBG_871X("!m2u ); + DBG_COUNTER(padapter->tx_logs.os_tx_m2u_stop); } } #endif // CONFIG_TX_MCAST2UNI diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/osdep_service.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/osdep_service.c old mode 100644 new mode 100755 index 97a904bab3c3..681889bf964f --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/osdep_service.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/os_dep/osdep_service.c @@ -2310,6 +2310,10 @@ inline u32 rtw_random32(void) #ifdef PLATFORM_LINUX #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,8,0)) return prandom_u32(); + #elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)) + u32 random_int; + get_random_bytes( &random_int , 4 ); + return random_int; #else return random32(); #endif diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/platform/platform_ARM_SUNnI_sdio.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/platform/platform_ARM_SUNnI_sdio.c old mode 100644 new mode 100755 index 480652676695..d384141eba0c --- a/drivers/net/wireless/rockchip_wlan/rtl8723bu/platform/platform_ARM_SUNnI_sdio.c +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/platform/platform_ARM_SUNnI_sdio.c @@ -69,20 +69,27 @@ int platform_wifi_power_on(void) } else { sdc_id = val.val; DBG_871X("----- %s sdc_id: %d, mod_sel: %d\n", __FUNCTION__, sdc_id, mod_sel); - wifi_pm_power(1); - mdelay(10); + #if defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) sw_mci_rescan_card(sdc_id, 1); #elif defined(CONFIG_PLATFORM_ARM_SUN8I) sunxi_mci_rescan_card(sdc_id, 1); #endif + mdelay(100); + wifi_pm_power(1); + DBG_871X("%s: power up, rescan card.\n", __FUNCTION__); } #ifdef CONFIG_GPIO_WAKEUP +#ifdef CONFIG_RTL8723B type = script_get_item("wifi_para", "rtl8723bs_wl_host_wake", &val); +#endif +#ifdef CONFIG_RTL8188E + type = script_get_item("wifi_para", "rtl8189es_host_wake", &val); +#endif if (SCIRPT_ITEM_VALUE_TYPE_PIO != type) { - DBG_871X("has no rtl8723bs_wl_wake_host\n"); + DBG_871X("No definition of wake up host PIN\n"); ret = -1; } else { gpio_eint_wlan = val.gpio.gpio; @@ -100,12 +107,14 @@ int platform_wifi_power_on(void) void platform_wifi_power_off(void) { #ifdef CONFIG_MMC - wifi_pm_power(0); #if defined(CONFIG_PLATFORM_ARM_SUN6I) ||defined(CONFIG_PLATFORM_ARM_SUN7I) sw_mci_rescan_card(sdc_id, 0); #elif defined(CONFIG_PLATFORM_ARM_SUN8I) sunxi_mci_rescan_card(sdc_id, 0); #endif + mdelay(100); + wifi_pm_power(0); + DBG_871X("%s: remove card, power off.\n", __FUNCTION__); #endif // CONFIG_MMC } diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/platform/platform_ARM_SUNxI_sdio.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/platform/platform_ARM_SUNxI_sdio.c old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/platform/platform_ARM_SUNxI_usb.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/platform/platform_ARM_SUNxI_usb.c old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/platform/platform_ARM_WMT_sdio.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/platform/platform_ARM_WMT_sdio.c new file mode 100755 index 000000000000..62e5825886cb --- /dev/null +++ b/drivers/net/wireless/rockchip_wlan/rtl8723bu/platform/platform_ARM_WMT_sdio.c @@ -0,0 +1,51 @@ +/****************************************************************************** + * + * Copyright(c) 2013 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#include +#include +#include + +extern void wmt_detect_sdio2(void); +extern void force_remove_sdio2(void); + +int platform_wifi_power_on(void) +{ + int err = 0; + err = gpio_request(WMT_PIN_GP62_SUSGPIO1, "wifi_chip_en"); + if (err < 0){ + printk("request gpio for rtl8188eu failed!\n"); + return err; + } + gpio_direction_output(WMT_PIN_GP62_SUSGPIO1, 0);//pull sus_gpio1 to 0 to open vcc_wifi. + printk("power on rtl8189.\n"); + msleep(500); + wmt_detect_sdio2(); + printk("[rtl8189es] %s: new card, power on.\n", __FUNCTION__); + return err; +} + +void platform_wifi_power_off(void) +{ + force_remove_sdio2(); + + gpio_direction_output(WMT_PIN_GP62_SUSGPIO1, 1);//pull sus_gpio1 to 1 to close vcc_wifi. + printk("power off rtl8189.\n"); + gpio_free(WMT_PIN_GP62_SUSGPIO1); + printk("[rtl8189es] %s: remove card, power off.\n", __FUNCTION__); +} diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/platform/platform_RTK_DMP_usb.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/platform/platform_RTK_DMP_usb.c old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/platform/platform_ops.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/platform/platform_ops.c old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/platform/platform_ops.h b/drivers/net/wireless/rockchip_wlan/rtl8723bu/platform/platform_ops.h old mode 100644 new mode 100755 diff --git a/drivers/net/wireless/rockchip_wlan/rtl8723bu/platform/platform_sprd_sdio.c b/drivers/net/wireless/rockchip_wlan/rtl8723bu/platform/platform_sprd_sdio.c old mode 100644 new mode 100755 -- 2.34.1