From 82eeeb5b94166a7b9a7415d3ab9f38c809288ec5 Mon Sep 17 00:00:00 2001 From: Eric Christopher Date: Fri, 13 Feb 2015 00:39:36 +0000 Subject: [PATCH] The TOC save offset can be computed at compile time, do so and propagate changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228997 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPCFrameLowering.cpp | 7 ++++++- lib/Target/PowerPC/PPCFrameLowering.h | 5 ++--- lib/Target/PowerPC/PPCISelLowering.cpp | 5 ++--- 3 files changed, 10 insertions(+), 7 deletions(-) diff --git a/lib/Target/PowerPC/PPCFrameLowering.cpp b/lib/Target/PowerPC/PPCFrameLowering.cpp index 33f66fed81c..a2471da2f7a 100644 --- a/lib/Target/PowerPC/PPCFrameLowering.cpp +++ b/lib/Target/PowerPC/PPCFrameLowering.cpp @@ -43,10 +43,15 @@ static unsigned computeReturnSaveOffset(const PPCSubtarget &STI) { return STI.isPPC64() ? 16 : 4; } +static unsigned computeTOCSaveOffset(const PPCSubtarget &STI) { + return STI.isELFv2ABI() ? 24 : 40; +} + PPCFrameLowering::PPCFrameLowering(const PPCSubtarget &STI) : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, (STI.hasQPX() || STI.isBGQ()) ? 32 : 16, 0), - Subtarget(STI), ReturnSaveOffset(computeReturnSaveOffset(Subtarget)) {} + Subtarget(STI), ReturnSaveOffset(computeReturnSaveOffset(Subtarget)), + TOCSaveOffset(computeTOCSaveOffset(Subtarget)) {} // With the SVR4 ABI, callee-saved registers have fixed offsets on the stack. const PPCFrameLowering::SpillSlot *PPCFrameLowering::getCalleeSavedSpillSlots( diff --git a/lib/Target/PowerPC/PPCFrameLowering.h b/lib/Target/PowerPC/PPCFrameLowering.h index 32053a186ff..c67541699e6 100644 --- a/lib/Target/PowerPC/PPCFrameLowering.h +++ b/lib/Target/PowerPC/PPCFrameLowering.h @@ -24,6 +24,7 @@ class PPCSubtarget; class PPCFrameLowering: public TargetFrameLowering { const PPCSubtarget &Subtarget; const unsigned ReturnSaveOffset; + const unsigned TOCSaveOffset; public: PPCFrameLowering(const PPCSubtarget &STI); @@ -72,9 +73,7 @@ public: /// getTOCSaveOffset - Return the previous frame offset to save the /// TOC register -- 64-bit SVR4 ABI only. - static unsigned getTOCSaveOffset(bool isELFv2ABI) { - return isELFv2ABI ? 24 : 40; - } + unsigned getTOCSaveOffset() const { return TOCSaveOffset; } /// getFramePointerSaveOffset - Return the previous frame offset to save the /// frame pointer. diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 70938dd948d..0fdad366ecb 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -3900,7 +3900,6 @@ PPCTargetLowering::FinishCall(CallingConv::ID CallConv, SDLoc dl, SmallVectorImpl &InVals, ImmutableCallSite *CS) const { - bool isELFv2ABI = Subtarget.isELFv2ABI(); std::vector NodeTys; SmallVector Ops; unsigned CallOpc = PrepareCall(DAG, Callee, InFlag, Chain, CallSeqStart, dl, @@ -3964,7 +3963,7 @@ PPCTargetLowering::FinishCall(CallingConv::ID CallConv, SDLoc dl, EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy(); SDValue StackPtr = DAG.getRegister(PPC::X1, PtrVT); - unsigned TOCSaveOffset = PPCFrameLowering::getTOCSaveOffset(isELFv2ABI); + unsigned TOCSaveOffset = Subtarget.getFrameLowering()->getTOCSaveOffset(); SDValue TOCOff = DAG.getIntPtrConstant(TOCSaveOffset); SDValue AddTOC = DAG.getNode(ISD::ADD, dl, MVT::i64, StackPtr, TOCOff); @@ -4789,7 +4788,7 @@ PPCTargetLowering::LowerCall_64SVR4(SDValue Chain, SDValue Callee, setUsesTOCBasePtr(DAG); SDValue Val = DAG.getCopyFromReg(Chain, dl, PPC::X2, MVT::i64); // TOC save area offset. - unsigned TOCSaveOffset = PPCFrameLowering::getTOCSaveOffset(isELFv2ABI); + unsigned TOCSaveOffset = Subtarget.getFrameLowering()->getTOCSaveOffset(); SDValue PtrOff = DAG.getIntPtrConstant(TOCSaveOffset); SDValue AddPtr = DAG.getNode(ISD::ADD, dl, PtrVT, StackPtr, PtrOff); Chain = DAG.getStore(Val.getValue(1), dl, Val, AddPtr, -- 2.34.1