From 86d123949f084061138f5aa5555e64997b2e4432 Mon Sep 17 00:00:00 2001 From: yzq Date: Sun, 1 Apr 2012 01:05:15 -0700 Subject: [PATCH] rk610 : lvds bias power ctl --- drivers/video/display/lcd/rk610_lcd.c | 2 +- drivers/video/display/lcd/rk610_lcd.h | 38 ++++++++++++++++++++++++++- 2 files changed, 38 insertions(+), 2 deletions(-) diff --git a/drivers/video/display/lcd/rk610_lcd.c b/drivers/video/display/lcd/rk610_lcd.c index 4a400b46aa14..2b4e3b74217b 100644 --- a/drivers/video/display/lcd/rk610_lcd.c +++ b/drivers/video/display/lcd/rk610_lcd.c @@ -55,7 +55,7 @@ static int rk610_output_config(struct i2c_client *client,struct rk29fb_screen *s if(SCREEN_LVDS == screen->type){ c = LVDS_OUT_CLK_PIN(0) |LVDS_OUT_CLK_PWR_PIN(1) |LVDS_PLL_PWR_PIN(0) \ |LVDS_LANE_IN_FORMAT(DATA_D0_MSB) |LVDS_INPUT_SOURCE(FROM_LCD0_OR_SCL) \ - |LVDS_OUTPUT_FORMAT(screen->hw_format) ; + |LVDS_OUTPUT_FORMAT(screen->hw_format) | LVDS_BIASE_PWR(1); rk610_scaler_write_p0_reg(client, LVDS_CON0, &c); c = LVDS_OUT_ENABLE(0x0) |LVDS_TX_PWR_ENABLE(0x0); rk610_scaler_write_p0_reg(client, LVDS_CON1, &c); diff --git a/drivers/video/display/lcd/rk610_lcd.h b/drivers/video/display/lcd/rk610_lcd.h index 06880b3455b3..3307702b9366 100644 --- a/drivers/video/display/lcd/rk610_lcd.h +++ b/drivers/video/display/lcd/rk610_lcd.h @@ -4,7 +4,42 @@ #define ENABLE 1 #define DISABLE 0 /* LVDS config */ -/* LVDS ÍⲿÁ¬Ïß½Ó·¨ */ +/* LVDS ÍⲿÁ¬Ïß½Ó·¨ */ +/* LVDS_8BIT_1 LVDS_8BIT_2 LVDS_8BIT_3 LVDS_6BIT +---------------------------------------------------------------------- + TX0 R0 R2 R2 R0 + TX1 R1 R3 R3 R1 + TX2 R2 R4 R4 R2 +Y TX3 R3 R5 R5 R3 +0 TX4 R4 R6 R6 R4 + TX6 R5 R7 R7 R5 + TX7 G0 G2 G2 G0 +---------------------------------------------------------------------- + TX8 G1 G3 G3 G1 + TX9 G2 G4 G4 G2 +Y TX12 G3 G5 G5 G3 +1 TX13 G4 G6 G6 G4 + TX14 G5 G7 G7 G5 + TX15 B0 B2 B2 B0 + TX18 B1 B3 B3 B1 +---------------------------------------------------------------------- + TX19 B2 B4 B4 B2 + TX20 B3 B5 B5 B3 + TX21 B4 B6 B6 B4 +Y TX22 B5 B7 B7 B5 +2 TX24 HSYNC HSYNC HSYNC HSYNC + TX25 VSYNC VSYNC VSYNC VSYNC + TX26 ENABLE ENABLE ENABLE ENABLE +---------------------------------------------------------------------- + TX27 R6 R0 GND GND + TX5 R7 R1 GND GND + TX10 G6 G0 GND GND +Y TX11 G7 G1 GND GND +3 TX16 B6 B0 GND GND + TX17 B7 B1 GND GND + TX23 RSVD RSVD RSVD RSVD +---------------------------------------------------------------------- +*/ #define LVDS_8BIT_1 0x00 #define LVDS_8BIT_2 0x01 #define LVDS_8BIT_3 0x10 @@ -44,6 +79,7 @@ #define LVDS_OUT_CLK_PIN(x) (((x)&1)<<7) //clk enable pin, 0: enable #define LVDS_OUT_CLK_PWR_PIN(x) (((x)&1)<<6) //clk pwr enable pin, 1: enable #define LVDS_PLL_PWR_PIN(x) (((x)&1)<<5) //pll pwr enable pin, 0:enable +#define LVDS_BIASE_PWR(x) (((x)&1)<<4) //0: power down 1: normal work #define LVDS_LANE_IN_FORMAT(x) (((x)&1)<<3) //0: msb on D0 1:msb on D7 #define LVDS_INPUT_SOURCE(x) (((x)&1)<<2) //0: from lcd1 1:from lcd0 or scaler #define LVDS_OUTPUT_FORMAT(x) (((x)&3)<<0) //00:8bit format-1 01:8bit format-2 10:8bit format-3 11:6bit format -- 2.34.1