From 8750f9a29176f0ac67b775966c4fc190be8ac42e Mon Sep 17 00:00:00 2001 From: Daniel Sanders Date: Thu, 3 Apr 2014 13:21:51 +0000 Subject: [PATCH] [mips] Implement ehb, ssnop, and pause in assembler Summary: Add negative tests for pause Reviewers: matheusalmeida Reviewed By: matheusalmeida Differential Revision: http://llvm-reviews.chandlerc.com/D3246 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205537 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Mips/MipsInstrFormats.td | 11 +++++++++++ lib/Target/Mips/MipsInstrInfo.td | 6 ++++++ test/MC/Mips/mips1/valid-xfail.s | 2 -- test/MC/Mips/mips1/valid.s | 2 ++ test/MC/Mips/mips2/valid-xfail.s | 2 -- test/MC/Mips/mips2/valid.s | 2 ++ test/MC/Mips/mips3/valid-xfail.s | 2 -- test/MC/Mips/mips3/valid.s | 2 ++ test/MC/Mips/mips32/invalid-mips32r2.s | 8 ++++++++ test/MC/Mips/mips32/valid-xfail.s | 2 -- test/MC/Mips/mips32/valid.s | 2 ++ test/MC/Mips/mips32r2/valid-xfail.s | 3 --- test/MC/Mips/mips32r2/valid.s | 3 +++ test/MC/Mips/mips4/valid-xfail.s | 2 -- test/MC/Mips/mips4/valid.s | 2 ++ test/MC/Mips/mips5/valid-xfail.s | 2 -- test/MC/Mips/mips5/valid.s | 2 ++ test/MC/Mips/mips64/invalid-mips64r2.s | 8 ++++++++ test/MC/Mips/mips64/valid-xfail.s | 2 -- test/MC/Mips/mips64/valid.s | 2 ++ test/MC/Mips/mips64r2/valid-xfail.s | 3 --- test/MC/Mips/mips64r2/valid.s | 3 +++ 22 files changed, 53 insertions(+), 20 deletions(-) create mode 100644 test/MC/Mips/mips32/invalid-mips32r2.s create mode 100644 test/MC/Mips/mips64/invalid-mips64r2.s diff --git a/lib/Target/Mips/MipsInstrFormats.td b/lib/Target/Mips/MipsInstrFormats.td index 38fac886048..e4405abe908 100644 --- a/lib/Target/Mips/MipsInstrFormats.td +++ b/lib/Target/Mips/MipsInstrFormats.td @@ -818,3 +818,14 @@ class CMov_F_F_FM fmt, bit tf> : StdArch { let Inst{10-6} = fd; let Inst{5-0} = 0x11; } + +class BARRIER_FM op> : StdArch { + bits<32> Inst; + + let Inst{31-26} = 0; // SPECIAL + let Inst{25-21} = 0; + let Inst{20-16} = 0; // rt = 0 + let Inst{15-11} = 0; // rd = 0 + let Inst{10-6} = op; // Operation + let Inst{5-0} = 0; // SLL +} diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td index 9b2e0808938..07c37d87a26 100644 --- a/lib/Target/Mips/MipsInstrInfo.td +++ b/lib/Target/Mips/MipsInstrInfo.td @@ -1161,6 +1161,12 @@ def MTC0 : MFC3OP<"mtc0", GPR32Opnd>, MFC3OP_FM<0x10, 4>; def MFC2 : MFC3OP<"mfc2", GPR32Opnd>, MFC3OP_FM<0x12, 0>; def MTC2 : MFC3OP<"mtc2", GPR32Opnd>, MFC3OP_FM<0x12, 4>; +class Barrier : InstSE<(outs), (ins), asmstr, [], NoItinerary, + FrmOther>; +def SSNOP : Barrier<"ssnop">, BARRIER_FM<1>; +def EHB : Barrier<"ehb">, BARRIER_FM<3>; +def PAUSE : Barrier<"pause">, BARRIER_FM<5>, Requires<[HasMips32r2]>; + //===----------------------------------------------------------------------===// // Instruction aliases //===----------------------------------------------------------------------===// diff --git a/test/MC/Mips/mips1/valid-xfail.s b/test/MC/Mips/mips1/valid-xfail.s index bcd0f1078a7..2ffeaa968b4 100644 --- a/test/MC/Mips/mips1/valid-xfail.s +++ b/test/MC/Mips/mips1/valid-xfail.s @@ -12,8 +12,6 @@ tlbr tlbwi tlbwr - ehb lwc0 c0_entrylo,-7321($s2) lwc3 $10,-32265($k0) - ssnop swc0 c0_prid,18904($s3) diff --git a/test/MC/Mips/mips1/valid.s b/test/MC/Mips/mips1/valid.s index 8fe81aa4cf7..7fc866a621c 100644 --- a/test/MC/Mips/mips1/valid.s +++ b/test/MC/Mips/mips1/valid.s @@ -28,6 +28,7 @@ div.d $f29,$f20,$f27 div.s $f4,$f5,$f15 divu $zero,$t9,$t7 + ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0] lb $t8,-14515($t2) lbu $t0,30195($v1) lh $t3,-8556($s5) @@ -71,6 +72,7 @@ sltu $s4,$s5,$t3 srav $s1,$s7,$sp srlv $t9,$s4,$a0 + ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] sub $s6,$s3,$t4 sub.d $f18,$f3,$f17 sub.s $f23,$f22,$f22 diff --git a/test/MC/Mips/mips2/valid-xfail.s b/test/MC/Mips/mips2/valid-xfail.s index c1218034492..2f82f5c96f9 100644 --- a/test/MC/Mips/mips2/valid-xfail.s +++ b/test/MC/Mips/mips2/valid-xfail.s @@ -8,11 +8,9 @@ # XFAIL: * .set noat - ehb ldc3 $29,-28645($s1) lwc3 $10,-32265($k0) sdc3 $12,5835($t2) - ssnop tlbp tlbr tlbwi diff --git a/test/MC/Mips/mips2/valid.s b/test/MC/Mips/mips2/valid.s index ac42e77de4c..1a050407424 100644 --- a/test/MC/Mips/mips2/valid.s +++ b/test/MC/Mips/mips2/valid.s @@ -30,6 +30,7 @@ div.d $f29,$f20,$f27 div.s $f4,$f5,$f15 divu $zero,$t9,$t7 + ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0] floor.w.d $f14,$f11 floor.w.s $f8,$f9 lb $t8,-14515($t2) @@ -85,6 +86,7 @@ sqrt.s $f0,$f1 srav $s1,$s7,$sp srlv $t9,$s4,$a0 + ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] sub $s6,$s3,$t4 sub.d $f18,$f3,$f17 sub.s $f23,$f22,$f22 diff --git a/test/MC/Mips/mips3/valid-xfail.s b/test/MC/Mips/mips3/valid-xfail.s index 7f802ef765f..740663e2314 100644 --- a/test/MC/Mips/mips3/valid-xfail.s +++ b/test/MC/Mips/mips3/valid-xfail.s @@ -8,9 +8,7 @@ # XFAIL: * .set noat - ehb lwc3 $10,-32265($k0) - ssnop tlbp tlbr tlbwi diff --git a/test/MC/Mips/mips3/valid.s b/test/MC/Mips/mips3/valid.s index 703d49a4ea7..dc9b48cd399 100644 --- a/test/MC/Mips/mips3/valid.s +++ b/test/MC/Mips/mips3/valid.s @@ -50,6 +50,7 @@ dsrlv $s3,$t6,$s4 dsub $a3,$s6,$t0 dsubu $a1,$a1,$k0 + ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0] eret floor.l.d $f26,$f7 floor.l.s $f12,$f5 @@ -121,6 +122,7 @@ sqrt.s $f0,$f1 srav $s1,$s7,$sp srlv $t9,$s4,$a0 + ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] sub $s6,$s3,$t4 sub.d $f18,$f3,$f17 sub.s $f23,$f22,$f22 diff --git a/test/MC/Mips/mips32/invalid-mips32r2.s b/test/MC/Mips/mips32/invalid-mips32r2.s new file mode 100644 index 00000000000..b400eea6917 --- /dev/null +++ b/test/MC/Mips/mips32/invalid-mips32r2.s @@ -0,0 +1,8 @@ +# Instructions that are invalid +# +# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32 \ +# RUN: 2>%t1 +# RUN: FileCheck %s < %t1 + + .set noat + pause # CHECK: requires a CPU feature not currently enabled diff --git a/test/MC/Mips/mips32/valid-xfail.s b/test/MC/Mips/mips32/valid-xfail.s index a718aabe960..65cebd38185 100644 --- a/test/MC/Mips/mips32/valid-xfail.s +++ b/test/MC/Mips/mips32/valid-xfail.s @@ -35,11 +35,9 @@ c.ult.s $fcc7,$f24,$f10 c.un.d $fcc6,$f23,$f24 c.un.s $fcc1,$f30,$f4 - ehb ldc3 $29,-28645($s1) rorv $t5,$a3,$s5 sdc3 $12,5835($t2) - ssnop tlbp tlbr tlbwi diff --git a/test/MC/Mips/mips32/valid.s b/test/MC/Mips/mips32/valid.s index c358bdab6da..9e83c0f164b 100644 --- a/test/MC/Mips/mips32/valid.s +++ b/test/MC/Mips/mips32/valid.s @@ -32,6 +32,7 @@ div.d $f29,$f20,$f27 div.s $f4,$f5,$f15 divu $zero,$t9,$t7 + ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0] eret floor.w.d $f14,$f11 floor.w.s $f8,$f9 @@ -109,6 +110,7 @@ sqrt.s $f0,$f1 srav $s1,$s7,$sp srlv $t9,$s4,$a0 + ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] sub $s6,$s3,$t4 sub.d $f18,$f3,$f17 sub.s $f23,$f22,$f22 diff --git a/test/MC/Mips/mips32r2/valid-xfail.s b/test/MC/Mips/mips32r2/valid-xfail.s index 5dbb1d3b497..623c7f6cb47 100644 --- a/test/MC/Mips/mips32r2/valid-xfail.s +++ b/test/MC/Mips/mips32r2/valid-xfail.s @@ -116,7 +116,6 @@ dpsu.h.qbr $ac2,$a1,$s6 dpsx.w.ph $ac0,$s7,$gp dvpe $s6 - ehb emt $t0 evpe $v0 extpdpv $s6,$ac0,$s8 @@ -225,7 +224,6 @@ nor.v $w20,$w20,$w15 or.v $w13,$w23,$w12 packrl.ph $ra,$t8,$t6 - pause pcnt.b $w30,$w15 pcnt.d $w5,$w16 pcnt.h $w20,$w24 @@ -280,7 +278,6 @@ shrav_r.w $s7,$s4,$s6 shrlv.ph $t6,$t2,$t1 shrlv.qb $a2,$s2,$t3 - ssnop sub.ps $f5,$f14,$f26 subq.ph $ra,$t1,$s8 subq_s.ph $t5,$s8,$s5 diff --git a/test/MC/Mips/mips32r2/valid.s b/test/MC/Mips/mips32r2/valid.s index 29c0807fff1..b42005537f4 100644 --- a/test/MC/Mips/mips32r2/valid.s +++ b/test/MC/Mips/mips32r2/valid.s @@ -35,6 +35,7 @@ div.d $f29,$f20,$f27 div.s $f4,$f5,$f15 divu $zero,$t9,$t7 + ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0] ei $t6 eret floor.w.d $f14,$f11 @@ -109,6 +110,7 @@ nop nor $a3,$zero,$a3 or $t4,$s0,$sp + pause # CHECK: pause # encoding: [0x00,0x00,0x01,0x40] rdhwr $sp,$11 round.w.d $f6,$f4 round.w.s $f27,$f28 @@ -129,6 +131,7 @@ sqrt.s $f0,$f1 srav $s1,$s7,$sp srlv $t9,$s4,$a0 + ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] sub $s6,$s3,$t4 sub.d $f18,$f3,$f17 sub.s $f23,$f22,$f22 diff --git a/test/MC/Mips/mips4/valid-xfail.s b/test/MC/Mips/mips4/valid-xfail.s index 26749a91532..baf5c53bd6d 100644 --- a/test/MC/Mips/mips4/valid-xfail.s +++ b/test/MC/Mips/mips4/valid-xfail.s @@ -36,7 +36,6 @@ c.ult.s $fcc7,$f24,$f10 c.un.d $fcc6,$f23,$f24 c.un.s $fcc1,$f30,$f4 - ehb madd.d $f18,$f19,$f26,$f20 madd.s $f1,$f31,$f19,$f25 msub.d $f10,$f1,$f31,$f18 @@ -49,7 +48,6 @@ recip.s $f3,$f30 rsqrt.d $f3,$f28 rsqrt.s $f4,$f8 - ssnop tlbp tlbr tlbwi diff --git a/test/MC/Mips/mips4/valid.s b/test/MC/Mips/mips4/valid.s index bcc9f689bfa..8dc2a239fee 100644 --- a/test/MC/Mips/mips4/valid.s +++ b/test/MC/Mips/mips4/valid.s @@ -50,6 +50,7 @@ dsrlv $s3,$t6,$s4 dsub $a3,$s6,$t0 dsubu $a1,$a1,$k0 + ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0] eret floor.l.d $f26,$f7 floor.l.s $f12,$f5 @@ -136,6 +137,7 @@ sqrt.s $f0,$f1 srav $s1,$s7,$sp srlv $t9,$s4,$a0 + ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] sub $s6,$s3,$t4 sub.d $f18,$f3,$f17 sub.s $f23,$f22,$f22 diff --git a/test/MC/Mips/mips5/valid-xfail.s b/test/MC/Mips/mips5/valid-xfail.s index 285aabbfe6b..85d961b47a3 100644 --- a/test/MC/Mips/mips5/valid-xfail.s +++ b/test/MC/Mips/mips5/valid-xfail.s @@ -58,7 +58,6 @@ cvt.ps.s $f3,$f18,$f19 cvt.s.pl $f30,$f1 cvt.s.pu $f14,$f25 - ehb madd.d $f18,$f19,$f26,$f20 madd.ps $f22,$f3,$f14,$f3 madd.s $f1,$f31,$f19,$f25 @@ -86,7 +85,6 @@ recip.s $f3,$f30 rsqrt.d $f3,$f28 rsqrt.s $f4,$f8 - ssnop sub.ps $f5,$f14,$f26 tlbp tlbr diff --git a/test/MC/Mips/mips5/valid.s b/test/MC/Mips/mips5/valid.s index 64c2ff5e789..ebe2f703b12 100644 --- a/test/MC/Mips/mips5/valid.s +++ b/test/MC/Mips/mips5/valid.s @@ -50,6 +50,7 @@ dsrlv $s3,$t6,$s4 dsub $a3,$s6,$t0 dsubu $a1,$a1,$k0 + ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0] eret floor.l.d $f26,$f7 floor.l.s $f12,$f5 @@ -137,6 +138,7 @@ sqrt.s $f0,$f1 srav $s1,$s7,$sp srlv $t9,$s4,$a0 + ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] sub $s6,$s3,$t4 sub.d $f18,$f3,$f17 sub.s $f23,$f22,$f22 diff --git a/test/MC/Mips/mips64/invalid-mips64r2.s b/test/MC/Mips/mips64/invalid-mips64r2.s new file mode 100644 index 00000000000..5e687d0a1b7 --- /dev/null +++ b/test/MC/Mips/mips64/invalid-mips64r2.s @@ -0,0 +1,8 @@ +# Instructions that are invalid +# +# RUN: not llvm-mc %s -triple=mips64-unknown-linux -show-encoding -mcpu=mips64 \ +# RUN: 2>%t1 +# RUN: FileCheck %s < %t1 + + .set noat + pause # CHECK: requires a CPU feature not currently enabled diff --git a/test/MC/Mips/mips64/valid-xfail.s b/test/MC/Mips/mips64/valid-xfail.s index 66f15e03c24..61bf0607513 100644 --- a/test/MC/Mips/mips64/valid-xfail.s +++ b/test/MC/Mips/mips64/valid-xfail.s @@ -62,7 +62,6 @@ cvt.s.pu $f14,$f25 dmfc0 $t2,c0_watchhi,2 dmtc0 $t7,c0_datalo - ehb madd.d $f18,$f19,$f26,$f20 madd.ps $f22,$f3,$f14,$f3 madd.s $f1,$f31,$f19,$f25 @@ -92,7 +91,6 @@ recip.s $f3,$f30 rsqrt.d $f3,$f28 rsqrt.s $f4,$f8 - ssnop sub.ps $f5,$f14,$f26 tlbp tlbr diff --git a/test/MC/Mips/mips64/valid.s b/test/MC/Mips/mips64/valid.s index 673754535bc..9ccb2ffc1f8 100644 --- a/test/MC/Mips/mips64/valid.s +++ b/test/MC/Mips/mips64/valid.s @@ -54,6 +54,7 @@ dsrlv $s3,$t6,$s4 dsub $a3,$s6,$t0 dsubu $a1,$a1,$k0 + ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0] eret floor.l.d $f26,$f7 floor.l.s $f12,$f5 @@ -150,6 +151,7 @@ sqrt.s $f0,$f1 srav $s1,$s7,$sp srlv $t9,$s4,$a0 + ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] sub $s6,$s3,$t4 sub.d $f18,$f3,$f17 sub.s $f23,$f22,$f22 diff --git a/test/MC/Mips/mips64r2/valid-xfail.s b/test/MC/Mips/mips64r2/valid-xfail.s index d8aefd2a5c8..9d9d6cd2d08 100644 --- a/test/MC/Mips/mips64r2/valid-xfail.s +++ b/test/MC/Mips/mips64r2/valid-xfail.s @@ -119,7 +119,6 @@ dpsx.w.ph $ac0,$s7,$gp drorv $at,$a1,$s7 dvpe $s6 - ehb emt $t0 evpe $v0 extpdpv $s6,$ac0,$s8 @@ -231,7 +230,6 @@ nor.v $w20,$w20,$w15 or.v $w13,$w23,$w12 packrl.ph $ra,$t8,$t6 - pause pcnt.b $w30,$w15 pcnt.d $w5,$w16 pcnt.h $w20,$w24 @@ -283,7 +281,6 @@ shrav_r.w $s7,$s4,$s6 shrlv.ph $t6,$t2,$t1 shrlv.qb $a2,$s2,$t3 - ssnop sub.ps $f5,$f14,$f26 subq.ph $ra,$t1,$s8 subq_s.ph $t5,$s8,$s5 diff --git a/test/MC/Mips/mips64r2/valid.s b/test/MC/Mips/mips64r2/valid.s index 4e549af9e79..34771b9afd3 100644 --- a/test/MC/Mips/mips64r2/valid.s +++ b/test/MC/Mips/mips64r2/valid.s @@ -57,6 +57,7 @@ dsrlv $s3,$t6,$s4 dsub $a3,$s6,$t0 dsubu $a1,$a1,$k0 + ehb # CHECK: ehb # encoding: [0x00,0x00,0x00,0xc0] ei $t6 eret floor.l.d $f26,$f7 @@ -136,6 +137,7 @@ nop nor $a3,$zero,$a3 or $t4,$s0,$sp + pause # CHECK: pause # encoding: [0x00,0x00,0x01,0x40] rdhwr $sp,$11 round.l.d $f12,$f1 round.l.s $f25,$f5 @@ -162,6 +164,7 @@ sqrt.s $f0,$f1 srav $s1,$s7,$sp srlv $t9,$s4,$a0 + ssnop # CHECK: ssnop # encoding: [0x00,0x00,0x00,0x40] sub $s6,$s3,$t4 sub.d $f18,$f3,$f17 sub.s $f23,$f22,$f22 -- 2.34.1