From 87563b39370d7adfd42b0f531409ff9bc2bfcc56 Mon Sep 17 00:00:00 2001 From: Dale Johannesen Date: Fri, 8 Jan 2010 23:51:25 +0000 Subject: [PATCH] Add DEBUG_VALUE. Not used yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93030 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Target/Target.td | 8 ++++++++ include/llvm/Target/TargetInstrInfo.h | 5 ++++- utils/TableGen/CodeEmitterGen.cpp | 9 ++++++--- utils/TableGen/CodeGenTarget.cpp | 9 ++++++++- utils/TableGen/InstrInfoEmitter.cpp | 3 ++- 5 files changed, 28 insertions(+), 6 deletions(-) diff --git a/include/llvm/Target/Target.td b/include/llvm/Target/Target.td index 6f1e066551a..d6465b8e8ab 100644 --- a/include/llvm/Target/Target.td +++ b/include/llvm/Target/Target.td @@ -477,6 +477,14 @@ def COPY_TO_REGCLASS : Instruction { let neverHasSideEffects = 1; let isAsCheapAsAMove = 1; } +def DEBUG_VALUE : Instruction { + let OutOperandList = (ops); + let InOperandList = (ops unknown:$value, i64imm:$offset, unknown:$meta); + let AsmString = "DEBUG_VALUE"; + let Namespace = "TargetInstrInfo"; + let neverHasSideEffects = 1; + let isAsCheapAsAMove = 1; +} } //===----------------------------------------------------------------------===// diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h index 0494ffe5924..83c53074867 100644 --- a/include/llvm/Target/TargetInstrInfo.h +++ b/include/llvm/Target/TargetInstrInfo.h @@ -88,7 +88,10 @@ public: /// only needed in cases where the register classes implied by the /// instructions are insufficient. The actual MachineInstrs to perform /// the copy are emitted with the TargetInstrInfo::copyRegToReg hook. - COPY_TO_REGCLASS = 10 + COPY_TO_REGCLASS = 10, + + // DEBUG_VALUE - a mapping of the llvm.dbg.value intrinsic + DEBUG_VALUE = 11 }; unsigned getNumOpcodes() const { return NumOpcodes; } diff --git a/utils/TableGen/CodeEmitterGen.cpp b/utils/TableGen/CodeEmitterGen.cpp index 7e6c769ac4f..714a39c7f4f 100644 --- a/utils/TableGen/CodeEmitterGen.cpp +++ b/utils/TableGen/CodeEmitterGen.cpp @@ -34,7 +34,8 @@ void CodeEmitterGen::reverseBits(std::vector &Insts) { R->getName() == "INSERT_SUBREG" || R->getName() == "IMPLICIT_DEF" || R->getName() == "SUBREG_TO_REG" || - R->getName() == "COPY_TO_REGCLASS") continue; + R->getName() == "COPY_TO_REGCLASS" || + R->getName() == "DEBUG_VALUE") continue; BitsInit *BI = R->getValueAsBitsInit("Inst"); @@ -111,7 +112,8 @@ void CodeEmitterGen::run(raw_ostream &o) { R->getName() == "INSERT_SUBREG" || R->getName() == "IMPLICIT_DEF" || R->getName() == "SUBREG_TO_REG" || - R->getName() == "COPY_TO_REGCLASS") { + R->getName() == "COPY_TO_REGCLASS" || + R->getName() == "DEBUG_VALUE") { o << " 0U,\n"; continue; } @@ -149,7 +151,8 @@ void CodeEmitterGen::run(raw_ostream &o) { InstName == "INSERT_SUBREG" || InstName == "IMPLICIT_DEF" || InstName == "SUBREG_TO_REG" || - InstName == "COPY_TO_REGCLASS") continue; + InstName == "COPY_TO_REGCLASS" || + InstName == "DEBUG_VALUE") continue; BitsInit *BI = R->getValueAsBitsInit("Inst"); const std::vector &Vals = R->getValues(); diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp index 797614ee45a..c9af5f7213a 100644 --- a/utils/TableGen/CodeGenTarget.cpp +++ b/utils/TableGen/CodeGenTarget.cpp @@ -337,6 +337,11 @@ getInstructionsByEnumValue(std::vector throw "Could not find 'COPY_TO_REGCLASS' instruction!"; const CodeGenInstruction *COPY_TO_REGCLASS = &I->second; + I = getInstructions().find("DEBUG_VALUE"); + if (I == Instructions.end()) + throw "Could not find 'DEBUG_VALUE' instruction!"; + const CodeGenInstruction *DEBUG_VALUE = &I->second; + // Print out the rest of the instructions now. NumberedInstructions.push_back(PHI); NumberedInstructions.push_back(INLINEASM); @@ -349,6 +354,7 @@ getInstructionsByEnumValue(std::vector NumberedInstructions.push_back(IMPLICIT_DEF); NumberedInstructions.push_back(SUBREG_TO_REG); NumberedInstructions.push_back(COPY_TO_REGCLASS); + NumberedInstructions.push_back(DEBUG_VALUE); for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II) if (&II->second != PHI && &II->second != INLINEASM && @@ -360,7 +366,8 @@ getInstructionsByEnumValue(std::vector &II->second != INSERT_SUBREG && &II->second != IMPLICIT_DEF && &II->second != SUBREG_TO_REG && - &II->second != COPY_TO_REGCLASS) + &II->second != COPY_TO_REGCLASS && + &II->second != DEBUG_VALUE) NumberedInstructions.push_back(&II->second); } diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp index adb98fb9589..cf40c78fa72 100644 --- a/utils/TableGen/InstrInfoEmitter.cpp +++ b/utils/TableGen/InstrInfoEmitter.cpp @@ -345,7 +345,8 @@ void InstrInfoEmitter::emitShiftedValue(Record *R, StringInit *Val, R->getName() != "INSERT_SUBREG" && R->getName() != "IMPLICIT_DEF" && R->getName() != "SUBREG_TO_REG" && - R->getName() != "COPY_TO_REGCLASS") + R->getName() != "COPY_TO_REGCLASS" && + R->getName() != "DEBUG_VALUE") throw R->getName() + " doesn't have a field named '" + Val->getValue() + "'!"; return; -- 2.34.1