From 8790d474533ac9b67798241dfb373f68ed37eaff Mon Sep 17 00:00:00 2001 From: Misha Brukman Date: Mon, 26 Jul 2004 21:35:58 +0000 Subject: [PATCH] assert() on MachineInstr properties instead of checking them dynamically git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15243 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PowerPCInstrInfo.cpp | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/lib/Target/PowerPC/PowerPCInstrInfo.cpp b/lib/Target/PowerPC/PowerPCInstrInfo.cpp index 40fb18ba477..e7354cdc442 100644 --- a/lib/Target/PowerPC/PowerPCInstrInfo.cpp +++ b/lib/Target/PowerPC/PowerPCInstrInfo.cpp @@ -31,18 +31,19 @@ bool PowerPCInstrInfo::isMoveInstr(const MachineInstr& MI, MI.getOperand(0).isRegister() && MI.getOperand(1).isRegister() && MI.getOperand(2).isRegister() && - "invalid register-register int move instruction"); + "invalid PPC32 OR instruction!"); if (MI.getOperand(1).getReg() == MI.getOperand(2).getReg()) { sourceReg = MI.getOperand(1).getReg(); destReg = MI.getOperand(0).getReg(); return true; } } else if (oc == PPC32::ADDI) { // addi r1, r2, 0 - if (MI.getNumOperands() == 3 && - MI.getOperand(0).isRegister() && - MI.getOperand(1).isRegister() && - MI.getOperand(2).isImmediate() && - MI.getOperand(2).getImmedValue() == 0) { + assert(MI.getNumOperands() == 3 && + MI.getOperand(0).isRegister() && + MI.getOperand(1).isRegister() && + MI.getOperand(2).isImmediate() && + "invalid PPC32 ADDI instruction!"); + if (MI.getOperand(2).getImmedValue() == 0) { sourceReg = MI.getOperand(1).getReg(); destReg = MI.getOperand(0).getReg(); return true; @@ -51,7 +52,7 @@ bool PowerPCInstrInfo::isMoveInstr(const MachineInstr& MI, assert(MI.getNumOperands() == 2 && MI.getOperand(0).isRegister() && MI.getOperand(1).isRegister() && - "invalid register-register fp move instruction"); + "invalid PPC32 FMR instruction"); sourceReg = MI.getOperand(1).getReg(); destReg = MI.getOperand(0).getReg(); return true; -- 2.34.1