From 885b661e1004978f39cd1d74e586f193dfc0b0a6 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Sat, 28 Aug 2010 16:33:36 +0000 Subject: [PATCH] remove the MSIL backend. It isn't maintained, is buggy, has no testcases and hasn't kept up with ToT. Approved by Anton. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112375 91177308-0d34-0410-b5e6-96231b3b80d8 --- autoconf/configure.ac | 5 +- configure | 5 +- docs/ReleaseNotes.html | 9 +- lib/Target/MSIL/CMakeLists.txt | 3 - lib/Target/MSIL/MSILWriter.cpp | 1706 ----------------- lib/Target/MSIL/MSILWriter.h | 258 --- lib/Target/MSIL/Makefile | 16 - lib/Target/MSIL/README.TXT | 26 - lib/Target/MSIL/TargetInfo/CMakeLists.txt | 6 - lib/Target/MSIL/TargetInfo/MSILTargetInfo.cpp | 26 - lib/Target/MSIL/TargetInfo/Makefile | 15 - 11 files changed, 9 insertions(+), 2066 deletions(-) delete mode 100644 lib/Target/MSIL/CMakeLists.txt delete mode 100644 lib/Target/MSIL/MSILWriter.cpp delete mode 100644 lib/Target/MSIL/MSILWriter.h delete mode 100644 lib/Target/MSIL/Makefile delete mode 100644 lib/Target/MSIL/README.TXT delete mode 100644 lib/Target/MSIL/TargetInfo/CMakeLists.txt delete mode 100644 lib/Target/MSIL/TargetInfo/MSILTargetInfo.cpp delete mode 100644 lib/Target/MSIL/TargetInfo/Makefile diff --git a/autoconf/configure.ac b/autoconf/configure.ac index 02713862341..5a8a5f99fb1 100644 --- a/autoconf/configure.ac +++ b/autoconf/configure.ac @@ -543,13 +543,13 @@ TARGETS_TO_BUILD="" AC_ARG_ENABLE([targets],AS_HELP_STRING([--enable-targets], [Build specific host targets: all or target1,target2,... Valid targets are: host, x86, x86_64, sparc, powerpc, alpha, arm, mips, spu, pic16, - xcore, msp430, systemz, blackfin, cbe, msil, and cpp (default=all)]),, + xcore, msp430, systemz, blackfin, cbe, and cpp (default=all)]),, enableval=all) if test "$enableval" = host-only ; then enableval=host fi case "$enableval" in - all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 SystemZ Blackfin CBackend MSIL CppBackend MBlaze" ;; + all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 SystemZ Blackfin CBackend CppBackend MBlaze" ;; *)for a_target in `echo $enableval|sed -e 's/,/ /g' ` ; do case "$a_target" in x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;; @@ -566,7 +566,6 @@ case "$enableval" in systemz) TARGETS_TO_BUILD="SystemZ $TARGETS_TO_BUILD" ;; blackfin) TARGETS_TO_BUILD="Blackfin $TARGETS_TO_BUILD" ;; cbe) TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;; - msil) TARGETS_TO_BUILD="MSIL $TARGETS_TO_BUILD" ;; cpp) TARGETS_TO_BUILD="CppBackend $TARGETS_TO_BUILD" ;; mblaze) TARGETS_TO_BUILD="MBlaze $TARGETS_TO_BUILD" ;; host) case "$llvm_cv_target_arch" in diff --git a/configure b/configure index 272895b9cc8..948e7ccd936 100755 --- a/configure +++ b/configure @@ -1414,7 +1414,7 @@ Optional Features: --enable-targets Build specific host targets: all or target1,target2,... Valid targets are: host, x86, x86_64, sparc, powerpc, alpha, arm, mips, spu, - pic16, xcore, msp430, systemz, blackfin, cbe, msil, + pic16, xcore, msp430, systemz, blackfin, cbe, and cpp (default=all) --enable-cbe-printf-a Enable C Backend output with hex floating point via %a (default is YES) @@ -4955,7 +4955,7 @@ if test "$enableval" = host-only ; then enableval=host fi case "$enableval" in - all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 SystemZ Blackfin CBackend MSIL CppBackend MBlaze" ;; + all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha ARM Mips CellSPU PIC16 XCore MSP430 SystemZ Blackfin CBackend CppBackend MBlaze" ;; *)for a_target in `echo $enableval|sed -e 's/,/ /g' ` ; do case "$a_target" in x86) TARGETS_TO_BUILD="X86 $TARGETS_TO_BUILD" ;; @@ -4972,7 +4972,6 @@ case "$enableval" in systemz) TARGETS_TO_BUILD="SystemZ $TARGETS_TO_BUILD" ;; blackfin) TARGETS_TO_BUILD="Blackfin $TARGETS_TO_BUILD" ;; cbe) TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;; - msil) TARGETS_TO_BUILD="MSIL $TARGETS_TO_BUILD" ;; cpp) TARGETS_TO_BUILD="CppBackend $TARGETS_TO_BUILD" ;; mblaze) TARGETS_TO_BUILD="MBlaze $TARGETS_TO_BUILD" ;; host) case "$llvm_cv_target_arch" in diff --git a/docs/ReleaseNotes.html b/docs/ReleaseNotes.html index 3595735033f..f9f492c2639 100644 --- a/docs/ReleaseNotes.html +++ b/docs/ReleaseNotes.html @@ -68,7 +68,6 @@ Almost dead code. lib/Transforms/IPO/MergeFunctions.cpp => consider for 2.8. llvm/Analysis/PointerTracking.h => Edwin wants this, consider for 2.8. GEPSplitterPass - MSIL backend? --> @@ -77,6 +76,7 @@ Almost dead code. strong phi elim llvm.dbg.value: variable debug info for optimized code loop dependence analysis + TBAA -->