From 8974d5e9bdfa350d563ff9805966466084da4a3b Mon Sep 17 00:00:00 2001 From: Yakir Yang Date: Sat, 16 Jul 2016 16:42:32 +0800 Subject: [PATCH] CHROMIUM: drm: rockchip/dw_hdmi-rockchip: Protect against > 2GHz pixel clocks Add a check just to make sure that someone doesn't try to give us a pixel clock that is > 2GHz. If they did that, some of our math might overflow, so it's good to make sure we don't do it. Change-Id: I451602f0d771bb16b399b43e376e1054b7ee060f Signed-off-by: Douglas Anderson Signed-off-by: Yakir Yang Reviewed-on: https://chromium-review.googlesource.com/284642 Reviewed-by: Alexandru Stan --- drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c index 23a610e4b31e..1e500e76e608 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c @@ -243,6 +243,14 @@ dw_hdmi_rockchip_mode_valid(struct drm_connector *connector, int num_rates = ARRAY_SIZE(dw_hdmi_rates); int i; + /* + * Pixel clocks we support are always < 2GHz and so fit in an + * int. We should make sure source rate does too so we don't get + * overflow when we multiply by 1000. + */ + if (mode->clock > INT_MAX / 1000) + return MODE_BAD; + for (i = 0; i < num_rates; i++) { int slop = CLK_SLOP(pclk); -- 2.34.1