From 8cbed91278249134540870fbe08d602886af40a0 Mon Sep 17 00:00:00 2001 From: xuhuicong Date: Thu, 27 Oct 2016 15:32:21 +0800 Subject: [PATCH] video: rockchip: hdmi: modify wrong phy freq of 4k@60hz(yuv420)10bit the original phy pll of this Resolution is configure incorrect. result in the phy clk freq Double. now fix it. Change-Id: I2bcb669a2d61d53fee1ed521e672ea4306b401d5 Signed-off-by: xuhuicong --- .../video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hw.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hw.c b/drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hw.c index 860bdb76b519..bfe70d372d77 100644 --- a/drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hw.c +++ b/drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hw.c @@ -92,7 +92,7 @@ static const struct phy_mpll_config_tab PHY_MPLL_TABLE[] = { {594000000, 297000000, 0, 8, 0, 0, 0, 1, 0, 1, 0, 0, 0, 3}, {594000000, 371250000, 0, 10, 1, 3, 1, - 5, 0, 3, 0, 7, 0, 3}, + 5, 0, 3, 1, 7, 0, 3}, {594000000, 445500000, 0, 12, 2, 3, 1, 1, 2, 1, 1, 7, 0, 3}, {594000000, 594000000, 0, 16, 3, 3, 1, -- 2.34.1