From 8e1615ce40a29c133b8909d3bdfd5484bd26467f Mon Sep 17 00:00:00 2001 From: Chad Rosier Date: Wed, 5 Aug 2015 17:35:34 +0000 Subject: [PATCH] [AArch64] Register AArch64DeadRegisterDefinition pass with LLVM pass manager. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244067 91177308-0d34-0410-b5e6-96231b3b80d8 --- .../AArch64DeadRegisterDefinitionsPass.cpp | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp b/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp index 74fc167433f..576cf4a7416 100644 --- a/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp +++ b/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp @@ -26,6 +26,12 @@ using namespace llvm; STATISTIC(NumDeadDefsReplaced, "Number of dead definitions replaced"); +namespace llvm { +void initializeAArch64DeadRegisterDefinitionsPass(PassRegistry &); +} + +#define AARCH64_DEAD_REG_DEF_NAME "AArch64 Dead register definitions" + namespace { class AArch64DeadRegisterDefinitions : public MachineFunctionPass { private: @@ -35,11 +41,14 @@ private: bool usesFrameIndex(const MachineInstr &MI); public: static char ID; // Pass identification, replacement for typeid. - explicit AArch64DeadRegisterDefinitions() : MachineFunctionPass(ID) {} + explicit AArch64DeadRegisterDefinitions() : MachineFunctionPass(ID) { + initializeAArch64DeadRegisterDefinitionsPass( + *PassRegistry::getPassRegistry()); + } bool runOnMachineFunction(MachineFunction &F) override; - const char *getPassName() const override { return "Dead register definitions"; } + const char *getPassName() const override { return AARCH64_DEAD_REG_DEF_NAME; } void getAnalysisUsage(AnalysisUsage &AU) const override { AU.setPreservesCFG(); @@ -49,6 +58,9 @@ public: char AArch64DeadRegisterDefinitions::ID = 0; } // end anonymous namespace +INITIALIZE_PASS(AArch64DeadRegisterDefinitions, "aarch64-dead-defs", + AARCH64_DEAD_REG_DEF_NAME, false, false) + bool AArch64DeadRegisterDefinitions::implicitlyDefinesOverlappingReg( unsigned Reg, const MachineInstr &MI) { for (const MachineOperand &MO : MI.implicit_operands()) -- 2.34.1