From 8e8b18bcfa87ff919f127b1270a6891db1c9021f Mon Sep 17 00:00:00 2001 From: Bill Wendling Date: Tue, 9 Nov 2010 23:45:59 +0000 Subject: [PATCH] Emit the warning about the register list not being in ascending order only once. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118653 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 12225b00ed0..dc5a4170595 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -512,24 +512,27 @@ ARMOperand *ARMAsmParser::ParseRegisterList() { SmallVectorImpl >::const_iterator RI = Registers.begin(), RE = Registers.end(); - unsigned HighRegNum = RI->first; DenseMap RegMap; RegMap[RI->first] = true; + unsigned HighRegNum = RI->first; + bool EmittedWarning = false; + for (++RI; RI != RE; ++RI) { const std::pair &RegInfo = *RI; + unsigned Reg = RegInfo.first; - if (RegMap[RegInfo.first]) { + if (RegMap[Reg]) { Error(RegInfo.second, "register duplicated in register list"); return 0; } - if (RegInfo.first < HighRegNum) + if (!EmittedWarning && Reg < HighRegNum) Warning(RegInfo.second, "register not in ascending order in register list"); - RegMap[RegInfo.first] = true; - HighRegNum = std::max(RegInfo.first, HighRegNum); + RegMap[Reg] = true; + HighRegNum = std::max(Reg, HighRegNum); } return ARMOperand::CreateRegList(Registers, S, E); -- 2.34.1