From 90b5a08e1ffc4a1c18f7fa964ca561fa4b03c314 Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Thu, 18 Aug 2011 16:57:50 +0000 Subject: [PATCH] ARM Thumb blx instruction fixup has same data range as bl. These fixups are handled poorly in general, and should have a single contiguous range of bits per fixup type, but that's not how they're currently organized, so for now in complex ones like for blx, we just tell the emitter it's OK for the fixup to munge any bit it wants. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137947 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp index 9b4d2518b87..89b5acefa53 100644 --- a/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp +++ b/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp @@ -77,7 +77,7 @@ public: { "fixup_t2_uncondbranch", 0, 32, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_arm_thumb_br", 0, 16, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_arm_thumb_bl", 0, 32, MCFixupKindInfo::FKF_IsPCRel }, -{ "fixup_arm_thumb_blx", 7, 21, MCFixupKindInfo::FKF_IsPCRel }, +{ "fixup_arm_thumb_blx", 0, 32, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_arm_thumb_cb", 0, 16, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_arm_thumb_cp", 1, 8, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_arm_thumb_bcc", 0, 8, MCFixupKindInfo::FKF_IsPCRel }, -- 2.34.1