From 91e14b294f3fe4d8b28516b21ceef187ea9b1bdf Mon Sep 17 00:00:00 2001 From: "Huang, Tao" Date: Wed, 11 Nov 2015 15:57:28 +0800 Subject: [PATCH] rk: revert to v3.10 --- Documentation/ABI/testing/sysfs-block-zram | 62 +- .../ABI/testing/sysfs-class-dual-role-usb | 71 - Documentation/ABI/testing/sysfs-firmware-ofw | 28 - .../ABI/testing/sysfs-kernel-wakeup_reasons | 16 - Documentation/DMA-API-HOWTO.txt | 37 +- Documentation/DMA-API.txt | 8 - Documentation/DocBook/media/Makefile | 2 +- Documentation/DocBook/media_api.tmpl | 4 +- Documentation/SubmittingPatches | 22 +- Documentation/android.txt | 121 - Documentation/arm/small_task_packing.txt | 136 - Documentation/arm64/booting.txt | 26 +- Documentation/arm64/memory.txt | 44 +- Documentation/arm64/tagged-pointers.txt | 34 - Documentation/blockdev/zram.txt | 129 - Documentation/cgroups/cgroups.txt | 9 - Documentation/cpu-freq/governors.txt | 85 - Documentation/device-mapper/dm-crypt.txt | 18 +- Documentation/device-mapper/verity.txt | 12 +- .../devicetree/bindings/arm/arch_timer.txt | 59 +- Documentation/devicetree/bindings/arm/cci.txt | 172 - .../devicetree/bindings/arm/coresight.txt | 200 - Documentation/devicetree/bindings/arm/gic.txt | 6 - Documentation/devicetree/bindings/arm/pmu.txt | 3 - .../devicetree/bindings/arm/rtsm-dcscb.txt | 19 - .../devicetree/bindings/ata/marvell.txt | 2 +- .../devicetree/bindings/dma/fsl-mxs-dma.txt | 2 +- .../devicetree/bindings/mailbox/mailbox.txt | 38 - .../devicetree/bindings/mfd/vexpress-spc.txt | 35 - .../pinctrl/marvell,armada-370-pinctrl.txt | 4 +- .../pinctrl/marvell,armada-xp-pinctrl.txt | 32 +- .../bindings/pinctrl/pinctrl-bindings.txt | 52 - .../bindings/power/power_domain.txt | 49 - .../devicetree/bindings/spi/spi_pl022.txt | 2 +- .../devicetree/bindings/thermal/thermal.txt | 595 --- Documentation/devicetree/changesets.txt | 40 - .../devicetree/dynamic-resolution-notes.txt | 25 - Documentation/devicetree/overlay-notes.txt | 133 - Documentation/filesystems/porting | 3 - Documentation/filesystems/proc.txt | 14 +- Documentation/filesystems/squashfs.txt | 8 +- Documentation/gcov.txt | 4 - Documentation/hwmon/k10temp | 1 - Documentation/i2c/busses/i2c-i801 | 3 - Documentation/i2c/busses/i2c-piix4 | 2 +- Documentation/input/elantech.txt | 5 +- Documentation/ja_JP/HOWTO | 2 +- Documentation/ja_JP/stable_kernel_rules.txt | 6 +- Documentation/kernel-parameters.txt | 29 - Documentation/lzo.txt | 164 - Documentation/mailbox.txt | 122 - Documentation/networking/ip-sysctl.txt | 60 +- Documentation/networking/packet_mmap.txt | 10 - Documentation/parisc/registers | 8 - Documentation/pinctrl.txt | 11 +- Documentation/ramoops.txt | 13 +- .../sound/alsa/ALSA-Configuration.txt | 4 +- Documentation/stable_kernel_rules.txt | 3 - Documentation/sync.txt | 75 - Documentation/sysctl/kernel.txt | 51 +- Documentation/sysctl/vm.txt | 16 - Documentation/thermal/sysfs-api.txt | 5 - Documentation/trace/coresight.txt | 299 -- Documentation/trace/ftrace.txt | 29 - Documentation/video4linux/gspca.txt | 1 - Documentation/virtual/kvm/api.txt | 186 +- .../virtual/kvm/devices/arm-vgic.txt | 83 - Documentation/virtual/kvm/devices/vfio.txt | 22 - Documentation/virtual/kvm/locking.txt | 8 +- Documentation/x86/x86_64/mm.txt | 2 - Documentation/zh_CN/HOWTO | 2 +- Documentation/zh_CN/stable_kernel_rules.txt | 2 +- MAINTAINERS | 27 - Makefile | 12 +- android/configs/README | 15 - android/configs/android-base.cfg | 152 - android/configs/android-recommended.cfg | 121 - arch/Kconfig | 7 - arch/alpha/kernel/osf_sys.c | 15 +- arch/alpha/mm/fault.c | 9 +- arch/arc/boot/dts/nsimosci.dts | 28 +- arch/arc/configs/nsimosci_defconfig | 1 - arch/arc/include/asm/cmpxchg.h | 9 +- arch/arc/include/asm/delay.h | 5 +- arch/arc/include/asm/irqflags.h | 7 + arch/arc/include/asm/kgdb.h | 32 +- arch/arc/include/asm/pgtable.h | 3 +- arch/arc/include/asm/ptrace.h | 4 +- arch/arc/include/asm/sections.h | 1 + arch/arc/include/asm/spinlock.h | 9 +- arch/arc/include/asm/syscall.h | 5 +- arch/arc/include/asm/uaccess.h | 4 +- arch/arc/include/uapi/asm/ptrace.h | 1 - arch/arc/kernel/devtree.c | 2 +- arch/arc/kernel/entry.S | 24 +- arch/arc/kernel/head.S | 7 - arch/arc/kernel/irq.c | 3 + arch/arc/kernel/ptrace.c | 6 +- arch/arc/kernel/setup.c | 3 + arch/arc/kernel/signal.c | 45 +- arch/arc/kernel/unaligned.c | 6 - arch/arc/lib/strchr-700.S | 10 - arch/arc/mm/fault.c | 25 +- arch/arc/mm/init.c | 5 +- arch/arm/Kconfig | 174 +- arch/arm/Kconfig.debug | 95 +- arch/arm/Makefile | 11 - arch/arm/boot/Makefile | 1 - arch/arm/boot/bootp/Makefile | 2 - arch/arm/boot/compressed/Makefile | 2 - arch/arm/boot/compressed/atags_to_fdt.c | 44 +- arch/arm/boot/compressed/head.S | 11 +- arch/arm/boot/dts/Makefile | 9 +- arch/arm/boot/dts/armada-370-xp.dtsi | 3 +- arch/arm/boot/dts/armada-xp-gp.dts | 2 +- arch/arm/boot/dts/armada-xp-mv78230.dtsi | 16 +- arch/arm/boot/dts/armada-xp-mv78260.dtsi | 78 +- .../boot/dts/armada-xp-openblocks-ax3-4.dts | 6 +- arch/arm/boot/dts/at91rm9200.dtsi | 6 +- arch/arm/boot/dts/at91sam9260.dtsi | 18 +- arch/arm/boot/dts/at91sam9263.dtsi | 8 +- arch/arm/boot/dts/at91sam9g45.dtsi | 8 +- arch/arm/boot/dts/at91sam9n12.dtsi | 8 +- arch/arm/boot/dts/at91sam9n12ek.dts | 4 +- arch/arm/boot/dts/at91sam9x5.dtsi | 10 +- arch/arm/boot/dts/bcm2835.dtsi | 4 - arch/arm/boot/dts/clcd-panels.dtsi | 52 - arch/arm/boot/dts/cros5250-common.dtsi | 12 - arch/arm/boot/dts/dove.dtsi | 4 +- arch/arm/boot/dts/exynos5250-arndale.dts | 1 - arch/arm/boot/dts/exynos5250.dtsi | 7 +- arch/arm/boot/dts/hip04.dtsi | 984 ----- arch/arm/boot/dts/imx23-olinuxino.dts | 1 - arch/arm/boot/dts/imx23.dtsi | 8 +- arch/arm/boot/dts/imx25.dtsi | 11 +- arch/arm/boot/dts/imx27.dtsi | 2 +- arch/arm/boot/dts/imx28.dtsi | 10 +- arch/arm/boot/dts/imx53.dtsi | 2 +- arch/arm/boot/dts/imx6dl.dtsi | 2 - arch/arm/boot/dts/imx6q.dtsi | 4 - arch/arm/boot/dts/integratorcp.dts | 9 +- arch/arm/boot/dts/rtsm_ve-cortex_a15x1.dts | 159 - arch/arm/boot/dts/rtsm_ve-cortex_a15x2.dts | 165 - arch/arm/boot/dts/rtsm_ve-cortex_a15x4.dts | 177 - arch/arm/boot/dts/rtsm_ve-cortex_a9x2.dts | 171 - arch/arm/boot/dts/rtsm_ve-cortex_a9x4.dts | 183 - arch/arm/boot/dts/rtsm_ve-motherboard.dtsi | 231 - .../arm/boot/dts/rtsm_ve-v2p-ca15x1-ca7x1.dts | 244 -- .../arm/boot/dts/rtsm_ve-v2p-ca15x4-ca7x4.dts | 358 -- arch/arm/boot/dts/sama5d3.dtsi | 4 - arch/arm/boot/dts/sun4i-a10.dtsi | 4 - arch/arm/boot/dts/sun5i-a13.dtsi | 4 - .../arm/boot/dts/testcases/tests-phandle.dtsi | 3 - arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 1 - arch/arm/boot/dts/vexpress-v2m.dtsi | 1 - arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts | 4 - arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 168 +- arch/arm/boot/dts/vexpress-v2p-ca5s.dts | 4 - arch/arm/boot/dts/vexpress-v2p-ca9.dts | 4 - arch/arm/common/Kconfig | 4 - arch/arm/common/Makefile | 5 - arch/arm/common/bL_switcher.c | 864 ---- arch/arm/common/bL_switcher_dummy_if.c | 71 - arch/arm/common/fiq_glue.S | 118 - arch/arm/common/fiq_glue_setup.c | 147 - arch/arm/common/mcpm_entry.c | 12 - arch/arm/common/mcpm_head.S | 18 +- arch/arm/configs/multi_v7_defconfig | 4 - arch/arm/crypto/.gitignore | 1 - arch/arm/crypto/Makefile | 24 +- arch/arm/crypto/aes-armv4.S | 6 +- arch/arm/crypto/aes_glue.c | 26 +- arch/arm/crypto/aes_glue.h | 19 - arch/arm/crypto/aesbs-core.S_shipped | 2544 ----------- arch/arm/crypto/aesbs-glue.c | 434 -- arch/arm/crypto/bsaes-armv7.pl | 2467 ----------- arch/arm/crypto/sha1-armv7-neon.S | 634 --- arch/arm/crypto/sha1_glue.c | 60 +- arch/arm/crypto/sha1_neon_glue.c | 197 - arch/arm/crypto/sha256-armv4.pl | 716 ---- arch/arm/crypto/sha256-core.S_shipped | 2808 ------------- arch/arm/crypto/sha256_glue.c | 246 -- arch/arm/crypto/sha256_glue.h | 23 - arch/arm/crypto/sha256_neon_glue.c | 172 - arch/arm/crypto/sha512-armv7-neon.S | 455 -- arch/arm/crypto/sha512_neon_glue.c | 305 -- arch/arm/include/asm/Kbuild | 1 - arch/arm/include/asm/arch_timer.h | 59 +- arch/arm/include/asm/assembler.h | 19 +- arch/arm/include/asm/atomic.h | 78 +- arch/arm/include/asm/bL_switcher.h | 83 - arch/arm/include/asm/barrier.h | 47 +- arch/arm/include/asm/bug.h | 10 +- arch/arm/include/asm/cacheflush.h | 48 - arch/arm/include/asm/cp15.h | 14 - arch/arm/include/asm/cputype.h | 35 +- arch/arm/include/asm/crypto/sha1.h | 10 - arch/arm/include/asm/div64.h | 2 +- arch/arm/include/asm/dma-contiguous.h | 3 +- arch/arm/include/asm/elf.h | 10 +- arch/arm/include/asm/fiq_glue.h | 33 - arch/arm/include/asm/ftrace.h | 10 +- arch/arm/include/asm/futex.h | 6 + arch/arm/include/asm/hardirq.h | 2 +- arch/arm/include/asm/hardware/cache-l2x0.h | 3 - arch/arm/include/asm/hardware/cp14.h | 542 --- arch/arm/include/asm/hardware/debug-pl01x.S | 2 - arch/arm/include/asm/hugetlb-3level.h | 71 - arch/arm/include/asm/hugetlb.h | 84 - arch/arm/include/asm/io.h | 8 +- arch/arm/include/asm/irq.h | 3 - arch/arm/include/asm/jump_label.h | 2 +- arch/arm/include/asm/kgdb.h | 3 +- arch/arm/include/asm/kvm_arm.h | 12 +- arch/arm/include/asm/kvm_asm.h | 44 +- arch/arm/include/asm/kvm_emulate.h | 75 +- arch/arm/include/asm/kvm_host.h | 50 +- arch/arm/include/asm/kvm_mmu.h | 69 +- arch/arm/include/asm/kvm_psci.h | 6 +- arch/arm/include/asm/mach/arch.h | 5 - arch/arm/include/asm/mach/mmc.h | 28 - arch/arm/include/asm/mcpm.h | 8 - arch/arm/include/asm/memory.h | 52 +- arch/arm/include/asm/mmu.h | 5 +- arch/arm/include/asm/mmu_context.h | 30 +- arch/arm/include/asm/module.h | 2 - arch/arm/include/asm/neon.h | 36 - arch/arm/include/asm/outercache.h | 4 +- arch/arm/include/asm/page.h | 4 +- arch/arm/include/asm/pgtable-2level.h | 1 - arch/arm/include/asm/pgtable-3level-hwdef.h | 5 - arch/arm/include/asm/pgtable-3level.h | 104 +- arch/arm/include/asm/pgtable.h | 21 +- arch/arm/include/asm/pmu.h | 12 - arch/arm/include/asm/processor.h | 4 + arch/arm/include/asm/psci.h | 21 - arch/arm/include/asm/rodata.h | 32 - arch/arm/include/asm/smp.h | 3 - arch/arm/include/asm/smp_scu.h | 2 +- arch/arm/include/asm/spinlock.h | 82 +- arch/arm/include/asm/syscall.h | 9 +- arch/arm/include/asm/thread_info.h | 1 + arch/arm/include/asm/tlb.h | 13 +- arch/arm/include/asm/tlbflush.h | 2 - arch/arm/include/asm/topology.h | 34 - arch/arm/include/asm/uaccess.h | 3 +- arch/arm/include/asm/unistd.h | 3 +- arch/arm/include/uapi/asm/Kbuild | 1 + arch/arm/include/uapi/asm/hwcap.h | 3 +- arch/arm/include/uapi/asm/kvm.h | 43 +- arch/arm/include/uapi/asm/unistd.h | 6 - arch/arm/kernel/Makefile | 9 +- arch/arm/kernel/asm-offsets.c | 15 +- arch/arm/kernel/calls.S | 5 - arch/arm/kernel/crash_dump.c | 2 +- arch/arm/kernel/devtree.c | 2 +- arch/arm/kernel/entry-armv.S | 112 +- arch/arm/kernel/entry-common.S | 50 +- arch/arm/kernel/fiq.c | 24 +- arch/arm/kernel/ftrace.c | 15 - arch/arm/kernel/head.S | 15 +- arch/arm/kernel/hw_breakpoint.c | 7 +- arch/arm/kernel/hyp-stub.S | 2 - arch/arm/kernel/irq.c | 2 +- arch/arm/kernel/kgdb.c | 4 - arch/arm/kernel/kprobes-common.c | 19 +- arch/arm/kernel/kprobes-thumb.c | 20 +- arch/arm/kernel/kprobes.c | 9 +- arch/arm/kernel/machine_kexec.c | 25 +- arch/arm/kernel/module.c | 65 +- arch/arm/kernel/perf_event.c | 41 +- arch/arm/kernel/perf_event_cpu.c | 181 +- arch/arm/kernel/perf_event_v7.c | 57 +- arch/arm/kernel/process.c | 180 +- arch/arm/kernel/psci.c | 49 +- arch/arm/kernel/psci_smp.c | 84 - arch/arm/kernel/ptrace.c | 7 +- arch/arm/kernel/relocate_kernel.S | 8 +- arch/arm/kernel/sched_clock.c | 13 +- arch/arm/kernel/setup.c | 55 +- arch/arm/kernel/signal.c | 72 +- arch/arm/kernel/sigreturn_codes.S | 80 - arch/arm/kernel/sleep.S | 33 +- arch/arm/kernel/smp.c | 90 +- arch/arm/kernel/smp_scu.c | 14 +- arch/arm/kernel/smp_tlb.c | 18 +- arch/arm/kernel/smp_twd.c | 26 +- arch/arm/kernel/stacktrace.c | 20 +- arch/arm/kernel/topology.c | 135 - arch/arm/kernel/traps.c | 80 +- arch/arm/kernel/vmlinux.lds.S | 17 - arch/arm/kvm/Kconfig | 9 +- arch/arm/kvm/Makefile | 10 +- arch/arm/kvm/arm.c | 173 +- arch/arm/kvm/coproc.c | 316 +- arch/arm/kvm/coproc.h | 13 +- arch/arm/kvm/coproc_a15.c | 125 +- arch/arm/kvm/coproc_a7.c | 54 - arch/arm/kvm/emulate.c | 2 +- arch/arm/kvm/guest.c | 115 +- arch/arm/kvm/handle_exit.c | 35 +- arch/arm/kvm/init.S | 6 +- arch/arm/kvm/interrupts.S | 58 +- arch/arm/kvm/interrupts_head.S | 99 +- arch/arm/kvm/mmio.c | 95 +- arch/arm/kvm/mmu.c | 522 +-- arch/arm/kvm/psci.c | 263 +- arch/arm/kvm/reset.c | 27 +- arch/arm/kvm/trace.h | 7 +- arch/arm/lib/copy_template.S | 36 +- arch/arm/lib/csumpartialcopygeneric.S | 96 +- arch/arm/lib/io-readsl.S | 12 +- arch/arm/lib/io-writesl.S | 12 +- arch/arm/lib/memmove.S | 36 +- arch/arm/lib/uaccess.S | 192 +- arch/arm/mach-at91/Makefile | 2 +- arch/arm/mach-at91/at91sam9260.c | 2 - arch/arm/mach-at91/at91sam9261.c | 2 - arch/arm/mach-at91/at91sam9263.c | 3 - arch/arm/mach-at91/at91sam9g45.c | 3 - arch/arm/mach-at91/at91sam9n12.c | 6 - arch/arm/mach-at91/at91sam9rl.c | 3 - arch/arm/mach-at91/at91sam9x5.c | 6 - arch/arm/mach-at91/clock.c | 1 - arch/arm/mach-at91/generic.h | 2 - arch/arm/mach-at91/include/mach/at91sam9n12.h | 5 - arch/arm/mach-at91/include/mach/at91sam9x5.h | 5 - arch/arm/mach-at91/include/mach/sama5d3.h | 5 - arch/arm/mach-at91/pm.h | 2 +- arch/arm/mach-at91/sam9_smc.c | 2 +- arch/arm/mach-at91/sama5d3.c | 12 +- arch/arm/mach-at91/sysirq_mask.c | 75 - arch/arm/mach-davinci/board-dm355-leopard.c | 1 - arch/arm/mach-davinci/board-dm644x-evm.c | 1 - arch/arm/mach-davinci/board-dm646x-evm.c | 1 - arch/arm/mach-davinci/board-neuros-osd2.c | 1 - arch/arm/mach-dove/common.c | 2 +- arch/arm/mach-ebsa110/core.c | 2 +- arch/arm/mach-exynos/mach-exynos5-dt.c | 26 - arch/arm/mach-footbridge/common.c | 3 - arch/arm/mach-footbridge/dc21285-timer.c | 5 +- arch/arm/mach-footbridge/dc21285.c | 4 + arch/arm/mach-footbridge/ebsa285.c | 22 +- arch/arm/mach-highbank/Kconfig | 1 - arch/arm/mach-highbank/highbank.c | 15 +- arch/arm/mach-imx/clk-imx6q.c | 8 +- arch/arm/mach-imx/devices/platform-ipu-core.c | 2 +- arch/arm/mach-imx/mm-imx3.c | 2 +- arch/arm/mach-integrator/integrator_cp.c | 3 +- arch/arm/mach-iop13xx/io.c | 2 +- arch/arm/mach-ixp4xx/Kconfig | 4 + arch/arm/mach-ixp4xx/common.c | 2 +- arch/arm/mach-kirkwood/common.c | 2 +- arch/arm/mach-msm/common.h | 2 +- arch/arm/mach-msm/io.c | 2 +- arch/arm/mach-mv78xx0/common.c | 4 +- arch/arm/mach-mvebu/Kconfig | 1 - arch/arm/mach-mvebu/armada-370-xp.c | 3 +- arch/arm/mach-mvebu/coherency.c | 38 - arch/arm/mach-mvebu/coherency.h | 1 - arch/arm/mach-mvebu/coherency_ll.S | 3 - arch/arm/mach-mvebu/headsmp.S | 3 - arch/arm/mach-mxs/pm.h | 4 - arch/arm/mach-omap1/board-h2.c | 2 +- arch/arm/mach-omap1/board-h3.c | 2 +- arch/arm/mach-omap1/board-innovator.c | 2 +- arch/arm/mach-omap1/board-osk.c | 2 +- arch/arm/mach-omap2/Kconfig | 8 + arch/arm/mach-omap2/Makefile | 1 + arch/arm/mach-omap2/cclock3xxx_data.c | 3 +- arch/arm/mach-omap2/control.c | 3 +- arch/arm/mach-omap2/cpuidle44xx.c | 25 +- arch/arm/mach-omap2/gpmc.c | 4 +- arch/arm/mach-omap2/irq.c | 10 +- arch/arm/mach-omap2/mux.c | 6 +- arch/arm/mach-omap2/omap4-common.c | 1 - arch/arm/mach-omap2/omap_hwmod.c | 47 +- .../mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 4 +- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 23 +- arch/arm/mach-omap2/pm.h | 2 +- arch/arm/mach-omap2/timer.c | 8 +- arch/arm/mach-orion5x/common.c | 2 +- arch/arm/mach-pxa/corgi.c | 3 - arch/arm/mach-pxa/hx4700.c | 2 - arch/arm/mach-pxa/poodle.c | 2 - arch/arm/mach-pxa/reset.c | 8 +- arch/arm/mach-pxa/tosa.c | 102 +- arch/arm/mach-realview/include/mach/memory.h | 2 - arch/arm/mach-s3c24xx/clock-s3c2410.c | 161 +- arch/arm/mach-s3c24xx/clock-s3c2440.c | 3 - arch/arm/mach-s3c64xx/crag6410.h | 1 - arch/arm/mach-s3c64xx/mach-crag6410.c | 1 - arch/arm/mach-sa1100/assabet.c | 3 - arch/arm/mach-sa1100/include/mach/collie.h | 2 - arch/arm/mach-sa1100/pm.c | 1 - .../arm/mach-shmobile/board-armadillo800eva.c | 4 +- arch/arm/mach-shmobile/board-kzm9g.c | 2 +- arch/arm/mach-shmobile/board-mackerel.c | 4 +- arch/arm/mach-shmobile/setup-emev2.c | 8 +- arch/arm/mach-shmobile/setup-r8a73a4.c | 2 +- arch/arm/mach-shmobile/setup-sh73a0.c | 3 - arch/arm/mach-tegra/common.c | 11 - .../mach-versatile/include/mach/platform.h | 2 - arch/arm/mach-versatile/pci.c | 47 +- arch/arm/mach-vexpress/Kconfig | 21 - arch/arm/mach-vexpress/Makefile | 8 - arch/arm/mach-vexpress/core.h | 2 - arch/arm/mach-vexpress/dcscb.c | 236 -- arch/arm/mach-vexpress/dcscb_setup.S | 38 - arch/arm/mach-vexpress/include/mach/tc2.h | 10 - arch/arm/mach-vexpress/platsmp.c | 22 +- arch/arm/mach-vexpress/tc2_pm.c | 277 -- arch/arm/mach-vexpress/tc2_pm_psci.c | 173 - arch/arm/mach-vexpress/tc2_pm_setup.S | 68 - arch/arm/mach-vexpress/v2m.c | 29 - arch/arm/mach-virt/Makefile | 1 + arch/arm/mach-virt/virt.c | 3 + arch/arm/mm/Kconfig | 47 +- arch/arm/mm/Makefile | 2 - arch/arm/mm/abort-ev6.S | 11 +- arch/arm/mm/abort-ev7.S | 6 + arch/arm/mm/alignment.c | 12 +- arch/arm/mm/cache-l2x0.c | 76 +- arch/arm/mm/cache-v6.S | 17 - arch/arm/mm/cache-v7.S | 14 +- arch/arm/mm/context.c | 55 +- arch/arm/mm/dma-mapping.c | 78 +- arch/arm/mm/extable.c | 7 +- arch/arm/mm/fault.c | 40 +- arch/arm/mm/flush.c | 25 +- arch/arm/mm/fsr-3level.c | 4 +- arch/arm/mm/hugetlbpage.c | 101 - arch/arm/mm/idmap.c | 12 +- arch/arm/mm/init.c | 4 +- arch/arm/mm/ioremap.c | 10 +- arch/arm/mm/mmap.c | 8 +- arch/arm/mm/mmu.c | 129 +- arch/arm/mm/nommu.c | 6 +- arch/arm/mm/pgd.c | 3 +- arch/arm/mm/proc-macros.S | 19 +- arch/arm/mm/proc-v6.S | 7 +- arch/arm/mm/proc-v7-2level.S | 9 +- arch/arm/mm/proc-v7-3level.S | 25 +- arch/arm/mm/proc-v7.S | 19 +- arch/arm/mm/proc-xscale.S | 4 +- arch/arm/mm/rodata.c | 159 - arch/arm/net/bpf_jit_32.c | 12 +- arch/arm/plat-samsung/include/plat/clock.h | 5 - arch/arm/plat-samsung/s5p-dev-mfc.c | 4 +- arch/arm/plat-versatile/headsmp.S | 4 +- arch/arm/vfp/vfpmodule.c | 49 +- arch/arm/xen/enlighten.c | 6 +- arch/arm64/Kconfig | 356 +- arch/arm64/Kconfig.debug | 25 - arch/arm64/Makefile | 25 - arch/arm64/boot/.gitignore | 1 - arch/arm64/boot/Makefile | 13 - arch/arm64/boot/dts/Makefile | 18 +- arch/arm64/boot/dts/apm-mustang.dts | 30 - arch/arm64/boot/dts/apm-storm.dtsi | 398 -- arch/arm64/boot/dts/clcd-panels.dtsi | 52 - arch/arm64/boot/dts/foundation-v8.dts | 2 - arch/arm64/boot/dts/fvp-base-gicv2-psci.dts | 294 -- arch/arm64/boot/dts/juno.dts | 498 --- arch/arm64/boot/dts/rtsm_ve-aemv8a.dts | 51 +- arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi | 9 - arch/arm64/configs/defconfig | 23 +- arch/arm64/crypto/Kconfig | 52 - arch/arm64/crypto/Makefile | 38 - arch/arm64/crypto/aes-ce-ccm-core.S | 222 - arch/arm64/crypto/aes-ce-ccm-glue.c | 299 -- arch/arm64/crypto/aes-ce-cipher.c | 265 -- arch/arm64/crypto/aes-ce-setkey.h | 5 - arch/arm64/crypto/aes-ce.S | 133 - arch/arm64/crypto/aes-glue.c | 452 -- arch/arm64/crypto/aes-modes.S | 532 --- arch/arm64/crypto/aes-neon.S | 382 -- arch/arm64/crypto/ghash-ce-core.S | 87 - arch/arm64/crypto/ghash-ce-glue.c | 156 - arch/arm64/crypto/sha1-ce-core.S | 153 - arch/arm64/crypto/sha1-ce-glue.c | 174 - arch/arm64/crypto/sha2-ce-core.S | 156 - arch/arm64/crypto/sha2-ce-glue.c | 255 -- arch/arm64/include/asm/Kbuild | 4 +- arch/arm64/include/asm/arch_timer.h | 65 +- arch/arm64/include/asm/assembler.h | 31 - arch/arm64/include/asm/atomic.h | 55 +- arch/arm64/include/asm/bL_switcher.h | 54 - arch/arm64/include/asm/barrier.h | 65 +- arch/arm64/include/asm/cacheflush.h | 26 +- arch/arm64/include/asm/cmpxchg.h | 54 +- arch/arm64/include/asm/compat.h | 32 +- arch/arm64/include/asm/cpu_ops.h | 70 - arch/arm64/include/asm/cpufeature.h | 29 - arch/arm64/include/asm/cpuidle.h | 13 - arch/arm64/include/asm/cputype.h | 63 +- arch/arm64/include/asm/debug-monitors.h | 111 +- arch/arm64/include/asm/device.h | 3 - arch/arm64/include/asm/dma-contiguous.h | 28 - arch/arm64/include/asm/dma-mapping.h | 27 +- arch/arm64/include/asm/efi.h | 14 - arch/arm64/include/asm/elf.h | 21 +- arch/arm64/include/asm/esr.h | 2 +- arch/arm64/include/asm/fixmap.h | 67 - arch/arm64/include/asm/fpsimd.h | 23 - arch/arm64/include/asm/fpsimdmacros.h | 35 - arch/arm64/include/asm/ftrace.h | 59 - arch/arm64/include/asm/futex.h | 11 +- arch/arm64/include/asm/hardirq.h | 2 +- arch/arm64/include/asm/hugetlb.h | 117 - arch/arm64/include/asm/hw_breakpoint.h | 1 + arch/arm64/include/asm/hwcap.h | 20 +- arch/arm64/include/asm/insn.h | 113 - arch/arm64/include/asm/io.h | 11 +- arch/arm64/include/asm/irq.h | 1 - arch/arm64/include/asm/irqflags.h | 23 - arch/arm64/include/asm/jump_label.h | 52 - arch/arm64/include/asm/kgdb.h | 84 - arch/arm64/include/asm/kvm_arm.h | 259 -- arch/arm64/include/asm/kvm_asm.h | 141 - arch/arm64/include/asm/kvm_coproc.h | 57 - arch/arm64/include/asm/kvm_emulate.h | 268 -- arch/arm64/include/asm/kvm_host.h | 251 -- arch/arm64/include/asm/kvm_mmio.h | 59 - arch/arm64/include/asm/kvm_mmu.h | 157 - arch/arm64/include/asm/kvm_psci.h | 27 - arch/arm64/include/asm/memory.h | 22 +- arch/arm64/include/asm/mmu.h | 6 - arch/arm64/include/asm/mmu_context.h | 6 + arch/arm64/include/asm/neon.h | 18 - arch/arm64/include/asm/opcodes.h | 231 - arch/arm64/include/asm/page.h | 9 - arch/arm64/include/asm/percpu.h | 49 - arch/arm64/include/asm/pgtable-2level-hwdef.h | 4 +- arch/arm64/include/asm/pgtable-2level-types.h | 2 - arch/arm64/include/asm/pgtable-3level-types.h | 2 - arch/arm64/include/asm/pgtable-hwdef.h | 38 +- arch/arm64/include/asm/pgtable.h | 297 +- arch/arm64/include/asm/proc-fns.h | 5 - arch/arm64/include/asm/processor.h | 9 +- arch/arm64/include/asm/psci.h | 19 + arch/arm64/include/asm/ptrace.h | 28 +- arch/arm64/include/asm/seccomp.h | 25 - arch/arm64/include/asm/smp.h | 15 +- arch/arm64/include/asm/smp_plat.h | 13 - arch/arm64/include/asm/sparsemem.h | 2 +- arch/arm64/include/asm/spinlock.h | 92 +- arch/arm64/include/asm/spinlock_types.h | 10 +- arch/arm64/include/asm/stackprotector.h | 38 - arch/arm64/include/asm/string.h | 15 - arch/arm64/include/asm/suspend.h | 27 - arch/arm64/include/asm/syscall.h | 21 - arch/arm64/include/asm/sysreg.h | 60 - arch/arm64/include/asm/thread_info.h | 34 +- arch/arm64/include/asm/timex.h | 6 +- arch/arm64/include/asm/tlb.h | 13 +- arch/arm64/include/asm/tlbflush.h | 70 +- arch/arm64/include/asm/topology.h | 70 - arch/arm64/include/asm/traps.h | 13 - arch/arm64/include/asm/uaccess.h | 43 +- arch/arm64/include/asm/unistd.h | 22 - arch/arm64/include/asm/unistd32.h | 1164 ++---- arch/arm64/include/asm/virt.h | 7 +- arch/arm64/include/asm/word-at-a-time.h | 94 - arch/arm64/include/uapi/asm/Kbuild | 1 - arch/arm64/include/uapi/asm/byteorder.h | 4 - arch/arm64/include/uapi/asm/hwcap.h | 7 +- arch/arm64/include/uapi/asm/kvm.h | 201 - arch/arm64/include/uapi/asm/perf_regs.h | 40 - arch/arm64/include/uapi/asm/ptrace.h | 1 - arch/arm64/kernel/Makefile | 26 +- arch/arm64/kernel/arm64ksyms.c | 15 +- arch/arm64/kernel/asm-offsets.c | 57 - arch/arm64/kernel/cpu_ops.c | 99 - arch/arm64/kernel/cpuidle.c | 31 - arch/arm64/kernel/cputable.c | 2 +- arch/arm64/kernel/debug-monitors.c | 166 +- arch/arm64/kernel/early_printk.c | 8 +- arch/arm64/kernel/efi-entry.S | 109 - arch/arm64/kernel/efi-stub.c | 79 - arch/arm64/kernel/efi.c | 469 --- arch/arm64/kernel/entry-fpsimd.S | 24 - arch/arm64/kernel/entry-ftrace.S | 218 - arch/arm64/kernel/entry.S | 65 +- arch/arm64/kernel/fpsimd.c | 226 +- arch/arm64/kernel/ftrace.c | 177 - arch/arm64/kernel/head.S | 313 +- arch/arm64/kernel/hw_breakpoint.c | 205 +- arch/arm64/kernel/hyp-stub.S | 1 - arch/arm64/kernel/insn.c | 304 -- arch/arm64/kernel/irq.c | 61 - arch/arm64/kernel/jump_label.c | 58 - arch/arm64/kernel/kgdb.c | 336 -- arch/arm64/kernel/kuser32.S | 55 +- arch/arm64/kernel/module.c | 156 +- arch/arm64/kernel/opcodes.c | 72 - arch/arm64/kernel/perf_event.c | 204 +- arch/arm64/kernel/perf_regs.c | 46 - arch/arm64/kernel/process.c | 160 +- arch/arm64/kernel/psci-call.S | 28 - arch/arm64/kernel/psci.c | 375 +- arch/arm64/kernel/ptrace.c | 238 +- arch/arm64/kernel/return_address.c | 55 - arch/arm64/kernel/setup.c | 311 +- arch/arm64/kernel/signal.c | 42 +- arch/arm64/kernel/signal32.c | 113 +- arch/arm64/kernel/sleep.S | 184 - arch/arm64/kernel/smp.c | 282 +- arch/arm64/kernel/smp_spin_table.c | 60 +- arch/arm64/kernel/stacktrace.c | 13 +- arch/arm64/kernel/suspend.c | 140 - arch/arm64/kernel/swp_emulate.c | 223 - arch/arm64/kernel/sys32.S | 22 +- arch/arm64/kernel/sys_compat.c | 8 +- arch/arm64/kernel/time.c | 9 +- arch/arm64/kernel/topology.c | 586 --- arch/arm64/kernel/traps.c | 60 +- arch/arm64/kernel/vdso.c | 85 +- arch/arm64/kernel/vdso/Makefile | 12 +- arch/arm64/kernel/vdso/gettimeofday.S | 7 +- arch/arm64/kernel/vmlinux.lds.S | 72 +- arch/arm64/kvm/Kconfig | 63 - arch/arm64/kvm/Makefile | 27 - arch/arm64/kvm/emulate.c | 158 - arch/arm64/kvm/guest.c | 359 -- arch/arm64/kvm/handle_exit.c | 133 - arch/arm64/kvm/hyp-init.S | 116 - arch/arm64/kvm/hyp.S | 1274 ------ arch/arm64/kvm/inject_fault.c | 203 - arch/arm64/kvm/regmap.c | 168 - arch/arm64/kvm/reset.c | 112 - arch/arm64/kvm/sys_regs.c | 1528 ------- arch/arm64/kvm/sys_regs.h | 140 - arch/arm64/kvm/sys_regs_generic_v8.c | 100 - arch/arm64/kvm/vgic-v2-switch.S | 133 - arch/arm64/kvm/vgic-v3-switch.S | 267 -- arch/arm64/lib/Makefile | 9 +- arch/arm64/lib/bitops.S | 3 +- arch/arm64/lib/clear_user.S | 2 +- arch/arm64/lib/memcmp.S | 258 -- arch/arm64/lib/memcpy.S | 192 +- arch/arm64/lib/memmove.S | 190 +- arch/arm64/lib/memset.S | 207 +- arch/arm64/lib/strcmp.S | 234 -- arch/arm64/lib/strlen.S | 126 - arch/arm64/lib/strncmp.S | 310 -- arch/arm64/lib/strnlen.S | 171 - arch/arm64/mm/Makefile | 3 +- arch/arm64/mm/cache.S | 104 +- arch/arm64/mm/context.c | 8 - arch/arm64/mm/copypage.c | 2 - arch/arm64/mm/dma-mapping.c | 436 +- arch/arm64/mm/fault.c | 85 +- arch/arm64/mm/flush.c | 38 +- arch/arm64/mm/hugetlbpage.c | 74 - arch/arm64/mm/init.c | 89 +- arch/arm64/mm/ioremap.c | 106 - arch/arm64/mm/mm.h | 1 + arch/arm64/mm/mmap.c | 12 +- arch/arm64/mm/mmu.c | 185 +- arch/arm64/mm/pageattr.c | 96 - arch/arm64/mm/pgd.c | 11 +- arch/arm64/mm/proc-macros.S | 3 +- arch/arm64/mm/proc.S | 127 +- arch/avr32/Makefile | 2 +- arch/avr32/boards/mimc200/fram.c | 1 - arch/avr32/boot/u-boot/head.S | 35 +- arch/avr32/kernel/entry-avr32b.S | 3 +- arch/avr32/kernel/head.S | 20 + arch/avr32/kernel/time.c | 9 +- arch/avr32/mm/fault.c | 6 +- arch/blackfin/include/asm/ftrace.h | 11 +- arch/c6x/kernel/devicetree.c | 3 +- arch/c6x/kernel/time.c | 2 +- arch/c6x/mm/init.c | 1 - arch/cris/include/asm/io.h | 1 - arch/cris/mm/fault.c | 8 +- arch/frv/mm/fault.c | 12 +- arch/hexagon/mm/vm_fault.c | 6 +- arch/ia64/include/asm/barrier.h | 23 - arch/ia64/include/asm/kvm_host.h | 15 +- arch/ia64/include/asm/processor.h | 2 +- arch/ia64/include/asm/tlb.h | 9 +- arch/ia64/kernel/efi.c | 59 +- arch/ia64/kvm/Kconfig | 1 - arch/ia64/kvm/Makefile | 7 +- arch/ia64/kvm/kvm-ia64.c | 37 +- arch/ia64/mm/fault.c | 8 +- arch/m32r/mm/fault.c | 12 +- arch/m68k/Kconfig | 1 - arch/m68k/emu/natfeat.c | 23 +- arch/m68k/include/asm/div64.h | 9 +- arch/m68k/include/asm/linkage.h | 30 - arch/m68k/include/asm/uaccess_mm.h | 8 +- arch/m68k/lib/uaccess.c | 6 +- arch/m68k/mm/fault.c | 4 - arch/m68k/mm/hwtest.c | 6 - arch/metag/include/asm/barrier.h | 18 - arch/metag/include/asm/processor.h | 6 +- arch/metag/mm/fault.c | 14 +- arch/metag/mm/init.c | 5 +- arch/microblaze/Kconfig | 3 +- arch/microblaze/kernel/prom.c | 11 +- arch/microblaze/mm/fault.c | 9 +- arch/mips/Kconfig | 2 +- arch/mips/ath79/clock.c | 2 +- arch/mips/boot/compressed/decompress.c | 1 - arch/mips/cavium-octeon/octeon-irq.c | 2 +- arch/mips/cavium-octeon/setup.c | 23 +- arch/mips/include/asm/barrier.h | 15 - arch/mips/include/asm/io.h | 5 - arch/mips/include/asm/jump_label.h | 2 +- arch/mips/include/asm/kvm_host.h | 16 +- arch/mips/include/asm/mach-generic/spaces.h | 4 - arch/mips/include/asm/mipsregs.h | 1 - arch/mips/include/asm/pgtable.h | 31 - arch/mips/include/asm/reg.h | 260 +- arch/mips/include/asm/thread_info.h | 2 - arch/mips/kernel/binfmt_elfo32.c | 32 +- arch/mips/kernel/irq-gic.c | 6 +- arch/mips/kernel/irq-msc01.c | 2 +- arch/mips/kernel/irq.c | 2 +- arch/mips/kernel/irq_cpu.c | 4 - arch/mips/kernel/mcount.S | 12 - arch/mips/kernel/mips-mt-fpaff.c | 5 +- arch/mips/kernel/mips_ksyms.c | 8 - arch/mips/kernel/prom.c | 3 +- arch/mips/kernel/ptrace.c | 3 +- arch/mips/kernel/scall32-o32.S | 2 +- arch/mips/kernel/scall64-64.S | 2 +- arch/mips/kernel/scall64-n32.S | 2 +- arch/mips/kernel/scall64-o32.S | 2 +- arch/mips/kernel/signal32.c | 2 + arch/mips/kernel/smp.c | 2 +- arch/mips/kernel/unaligned.c | 1 + arch/mips/kvm/kvm_locore.S | 2 +- arch/mips/kvm/kvm_mips.c | 32 +- arch/mips/kvm/kvm_mips_emul.c | 9 +- arch/mips/kvm/trace.h | 6 +- arch/mips/lantiq/dts/easy50712.dts | 1 - arch/mips/loongson/common/Makefile | 3 +- arch/mips/mm/c-r4k.c | 7 - arch/mips/mm/dma-default.c | 18 +- arch/mips/mm/fault.c | 10 +- arch/mips/mm/init.c | 1 - arch/mips/mm/tlbex.c | 5 - arch/mips/oprofile/backtrace.c | 2 +- arch/mips/power/cpu.c | 2 +- arch/mips/power/hibernate.S | 2 - arch/mips/ralink/dts/mt7620a_eval.dts | 1 - arch/mips/ralink/dts/rt2880_eval.dts | 1 - arch/mips/ralink/dts/rt3052_eval.dts | 1 - arch/mips/ralink/dts/rt3883_eval.dts | 1 - arch/mn10300/mm/fault.c | 11 +- arch/openrisc/kernel/entry.S | 59 +- arch/openrisc/kernel/prom.c | 3 +- arch/openrisc/kernel/signal.c | 198 +- arch/openrisc/mm/fault.c | 11 +- arch/parisc/Makefile | 7 +- arch/parisc/hpux/fs.c | 16 +- arch/parisc/include/asm/cacheflush.h | 10 +- arch/parisc/include/asm/ftrace.h | 10 +- arch/parisc/include/asm/page.h | 4 +- arch/parisc/include/asm/parisc-device.h | 3 - arch/parisc/include/asm/processor.h | 2 - arch/parisc/include/asm/socket.h | 11 - arch/parisc/include/asm/special_insns.h | 9 +- arch/parisc/include/asm/tlbflush.h | 5 +- arch/parisc/include/uapi/asm/shmbuf.h | 25 +- arch/parisc/include/uapi/asm/signal.h | 2 + arch/parisc/include/uapi/asm/socket.h | 11 +- arch/parisc/kernel/cache.c | 166 +- arch/parisc/kernel/hardware.c | 3 +- arch/parisc/kernel/head.S | 4 - arch/parisc/kernel/inventory.c | 1 - arch/parisc/kernel/irq.c | 8 +- arch/parisc/kernel/sys_parisc.c | 25 +- arch/parisc/kernel/syscall_table.S | 10 +- arch/parisc/kernel/traps.c | 6 +- arch/parisc/lib/memcpy.c | 79 +- arch/parisc/mm/fault.c | 9 +- arch/powerpc/Kconfig | 5 +- arch/powerpc/Makefile | 4 +- arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi | 1 - arch/powerpc/boot/dts/fsl/pq3-etsec2-1.dtsi | 1 - arch/powerpc/boot/dts/fsl/pq3-etsec2-2.dtsi | 1 - arch/powerpc/crypto/sha1.c | 3 +- arch/powerpc/include/asm/barrier.h | 21 +- arch/powerpc/include/asm/compat.h | 4 - arch/powerpc/include/asm/exception-64s.h | 10 +- arch/powerpc/include/asm/jump_label.h | 2 +- arch/powerpc/include/asm/kvm_host.h | 13 +- arch/powerpc/include/asm/kvm_ppc.h | 6 +- arch/powerpc/include/asm/module.h | 5 +- arch/powerpc/include/asm/page.h | 10 - arch/powerpc/include/asm/perf_event_server.h | 2 +- arch/powerpc/include/asm/pgalloc-32.h | 6 +- arch/powerpc/include/asm/pgalloc-64.h | 6 +- arch/powerpc/include/asm/pgtable-ppc64.h | 14 +- arch/powerpc/include/asm/ppc_asm.h | 7 +- arch/powerpc/include/asm/processor.h | 4 - arch/powerpc/include/asm/prom.h | 3 + arch/powerpc/include/asm/pte-hash64-64k.h | 32 +- arch/powerpc/include/asm/ptrace.h | 7 - arch/powerpc/include/asm/reg.h | 33 +- arch/powerpc/include/asm/rtas.h | 1 - arch/powerpc/include/asm/smp.h | 4 - arch/powerpc/include/asm/switch_to.h | 9 - arch/powerpc/include/asm/systbl.h | 2 +- arch/powerpc/include/asm/topology.h | 10 +- arch/powerpc/include/uapi/asm/cputable.h | 1 - arch/powerpc/kernel/align.c | 10 - arch/powerpc/kernel/asm-offsets.c | 3 - arch/powerpc/kernel/cacheinfo.c | 3 - arch/powerpc/kernel/cputable.c | 3 +- arch/powerpc/kernel/crash_dump.c | 8 +- arch/powerpc/kernel/entry_64.S | 36 +- arch/powerpc/kernel/exceptions-64s.S | 57 +- arch/powerpc/kernel/fadump.c | 4 +- arch/powerpc/kernel/head_64.S | 1 - arch/powerpc/kernel/hw_breakpoint.c | 3 +- arch/powerpc/kernel/iommu.c | 2 +- arch/powerpc/kernel/lparcfg.c | 22 +- arch/powerpc/kernel/process.c | 54 +- arch/powerpc/kernel/prom.c | 139 +- arch/powerpc/kernel/ptrace.c | 4 +- arch/powerpc/kernel/reloc_64.S | 1 - arch/powerpc/kernel/rtas.c | 19 +- arch/powerpc/kernel/setup_64.c | 2 +- arch/powerpc/kernel/signal_32.c | 80 +- arch/powerpc/kernel/signal_64.c | 16 +- arch/powerpc/kernel/smp.c | 4 +- arch/powerpc/kernel/suspend.c | 4 +- arch/powerpc/kernel/sysfs.c | 18 +- arch/powerpc/kernel/time.c | 2 +- arch/powerpc/kernel/tm.S | 90 +- arch/powerpc/kernel/traps.c | 55 +- arch/powerpc/kernel/vdso32/getcpu.S | 4 +- arch/powerpc/kernel/vio.c | 12 +- arch/powerpc/kernel/vmlinux.lds.S | 4 +- arch/powerpc/kvm/Kconfig | 1 - arch/powerpc/kvm/Makefile | 13 +- arch/powerpc/kvm/book3s_64_mmu_hv.c | 6 +- arch/powerpc/kvm/book3s_hv.c | 9 +- arch/powerpc/kvm/book3s_hv_rm_mmu.c | 4 - arch/powerpc/kvm/book3s_hv_rmhandlers.S | 2 +- arch/powerpc/kvm/book3s_xics.c | 1 - arch/powerpc/kvm/booke.c | 4 +- arch/powerpc/kvm/e500_mmu.c | 2 +- arch/powerpc/kvm/mpic.c | 4 +- arch/powerpc/kvm/powerpc.c | 33 +- arch/powerpc/lib/checksum_64.S | 58 +- arch/powerpc/lib/crtsavres.S | 186 - arch/powerpc/lib/sstep.c | 2 +- arch/powerpc/mm/fault.c | 9 +- arch/powerpc/mm/hash_utils_64.c | 22 +- arch/powerpc/mm/numa.c | 139 +- arch/powerpc/mm/slice.c | 2 +- arch/powerpc/net/bpf_jit_comp.c | 7 +- arch/powerpc/perf/callchain.c | 4 +- arch/powerpc/perf/core-book3s.c | 79 +- arch/powerpc/perf/power8-pmu.c | 24 +- arch/powerpc/platforms/52xx/Kconfig | 2 +- arch/powerpc/platforms/52xx/efika.c | 4 +- arch/powerpc/platforms/cell/spu_fault.c | 2 +- arch/powerpc/platforms/cell/spufs/inode.c | 2 +- arch/powerpc/platforms/chrp/setup.c | 4 +- arch/powerpc/platforms/powernv/opal.c | 12 +- arch/powerpc/platforms/powernv/pci-ioda.c | 36 +- arch/powerpc/platforms/powernv/pci.c | 9 +- arch/powerpc/platforms/pseries/dlpar.c | 3 +- arch/powerpc/platforms/pseries/eeh_pseries.c | 1 - arch/powerpc/platforms/pseries/hotplug-cpu.c | 29 +- .../platforms/pseries/hotplug-memory.c | 15 +- arch/powerpc/platforms/pseries/iommu.c | 5 +- arch/powerpc/platforms/pseries/msi.c | 2 +- arch/powerpc/platforms/pseries/ras.c | 3 +- arch/powerpc/platforms/pseries/reconfig.c | 2 + arch/powerpc/platforms/pseries/setup.c | 40 +- arch/powerpc/sysdev/axonram.c | 2 +- arch/powerpc/sysdev/fsl_msi.c | 5 +- arch/powerpc/sysdev/mpic_pasemi_msi.c | 6 +- arch/powerpc/sysdev/mpic_u3msi.c | 5 +- arch/powerpc/sysdev/msi_bitmap.c | 2 +- arch/powerpc/sysdev/ppc4xx_msi.c | 5 +- arch/powerpc/xmon/xmon.c | 7 +- arch/s390/Kconfig | 9 +- arch/s390/crypto/aes_s390.c | 120 +- arch/s390/crypto/des_s390.c | 102 +- arch/s390/crypto/ghash_s390.c | 27 +- arch/s390/crypto/sha1_s390.c | 2 +- arch/s390/crypto/sha256_s390.c | 4 +- arch/s390/crypto/sha512_s390.c | 4 +- arch/s390/include/asm/barrier.h | 15 - arch/s390/include/asm/bitops.h | 2 +- arch/s390/include/asm/ccwdev.h | 2 +- arch/s390/include/asm/jump_label.h | 2 +- arch/s390/include/asm/kvm_host.h | 17 - arch/s390/include/asm/lowcore.h | 11 +- arch/s390/include/asm/syscall.h | 5 +- arch/s390/include/asm/tlb.h | 8 +- arch/s390/include/uapi/asm/statfs.h | 10 +- arch/s390/kernel/compat_linux.c | 2 +- arch/s390/kernel/entry.S | 1 - arch/s390/kernel/entry64.S | 1 - arch/s390/kernel/head64.S | 7 +- arch/s390/kernel/ptrace.c | 9 +- arch/s390/kernel/sclp.S | 4 - arch/s390/kernel/setup.c | 1 - arch/s390/kernel/smp.c | 4 +- arch/s390/kernel/suspend.c | 11 +- arch/s390/kernel/vtime.c | 2 +- arch/s390/kvm/Makefile | 3 +- arch/s390/kvm/diag.c | 2 +- arch/s390/kvm/interrupt.c | 1 - arch/s390/kvm/kvm-s390.c | 63 +- arch/s390/kvm/priv.c | 1 - arch/s390/lib/uaccess_pt.c | 3 - arch/s390/mm/fault.c | 8 - arch/s390/mm/init.c | 2 - arch/s390/mm/page-states.c | 10 - arch/s390/net/bpf_jit_comp.c | 30 +- arch/s390/oprofile/init.c | 2 +- arch/score/Kconfig | 3 - arch/score/Makefile | 4 +- arch/score/include/asm/checksum.h | 93 +- arch/score/include/asm/io.h | 1 + arch/score/include/asm/pgalloc.h | 2 +- arch/score/kernel/entry.S | 4 +- arch/score/kernel/process.c | 4 +- arch/score/kernel/vmlinux.lds.S | 1 - arch/score/mm/fault.c | 23 +- arch/sh/Kconfig | 1 - arch/sh/include/asm/ftrace.h | 10 +- arch/sh/include/asm/sections.h | 1 + arch/sh/include/asm/tlb.h | 6 +- arch/sh/kernel/dumpstack.c | 2 +- arch/sh/kernel/kgdb.c | 1 - arch/sh/kernel/sh_ksyms_32.c | 5 - arch/sh/lib/Makefile | 2 +- arch/sh/mm/fault.c | 11 +- arch/sparc/Kconfig | 3 +- arch/sparc/crypto/aes_glue.c | 4 +- arch/sparc/crypto/camellia_glue.c | 3 +- arch/sparc/crypto/crc32c_glue.c | 2 +- arch/sparc/crypto/des_glue.c | 4 +- arch/sparc/crypto/md5_glue.c | 2 +- arch/sparc/crypto/sha1_glue.c | 2 +- arch/sparc/crypto/sha256_glue.c | 4 +- arch/sparc/crypto/sha512_glue.c | 4 +- arch/sparc/include/asm/atomic_32.h | 2 +- arch/sparc/include/asm/barrier_64.h | 15 - arch/sparc/include/asm/cmpxchg_32.h | 12 +- arch/sparc/include/asm/jump_label.h | 2 +- arch/sparc/include/asm/pgtable_64.h | 10 +- arch/sparc/include/asm/tlbflush_64.h | 12 +- arch/sparc/include/asm/uaccess_64.h | 4 +- arch/sparc/include/asm/vio.h | 14 +- arch/sparc/include/asm/visasm.h | 18 +- arch/sparc/include/uapi/asm/swab.h | 12 +- arch/sparc/kernel/asm-offsets.c | 2 - arch/sparc/kernel/ds.c | 5 +- arch/sparc/kernel/entry.S | 2 +- arch/sparc/kernel/ktlb.S | 3 +- arch/sparc/kernel/ldc.c | 4 +- arch/sparc/kernel/pci.c | 4 +- arch/sparc/kernel/pci_schizo.c | 6 +- arch/sparc/kernel/perf_event.c | 15 +- arch/sparc/kernel/process_64.c | 8 +- arch/sparc/kernel/smp_64.c | 10 +- arch/sparc/kernel/sys32.S | 2 +- arch/sparc/kernel/sys_sparc_64.c | 2 +- arch/sparc/kernel/syscalls.S | 12 +- arch/sparc/kernel/trampoline_64.S | 2 + arch/sparc/kernel/unaligned_64.c | 12 +- arch/sparc/lib/NG2memcpy.S | 1 - arch/sparc/lib/NG4memcpy.S | 19 +- arch/sparc/lib/VISsave.S | 67 +- arch/sparc/lib/atomic32.c | 27 - arch/sparc/lib/ksyms.c | 13 + arch/sparc/lib/memmove.S | 35 +- arch/sparc/math-emu/math_32.c | 2 +- arch/sparc/mm/fault_32.c | 14 +- arch/sparc/mm/fault_64.c | 110 +- arch/sparc/mm/hypersparc.S | 8 +- arch/sparc/mm/init_64.c | 27 - arch/sparc/mm/srmmu.c | 11 +- arch/sparc/mm/swift.S | 8 +- arch/sparc/mm/tsb.c | 14 +- arch/sparc/mm/tsunami.S | 6 +- arch/sparc/mm/viking.S | 10 +- arch/sparc/net/bpf_jit_comp.c | 25 +- arch/sparc/power/hibernate.c | 4 +- arch/tile/include/asm/compat.h | 1 + arch/tile/include/asm/percpu.h | 34 +- arch/tile/kernel/setup.c | 2 +- arch/tile/mm/fault.c | 23 +- arch/um/Kconfig.common | 1 - arch/um/include/asm/tlb.h | 6 +- arch/um/include/shared/frame_kern.h | 8 +- arch/um/include/shared/os.h | 1 - arch/um/kernel/Makefile | 2 +- arch/um/kernel/exitcode.c | 4 +- arch/um/kernel/maccess.c | 24 - arch/um/kernel/signal.c | 4 +- arch/um/kernel/trap.c | 24 +- arch/um/os-Linux/process.c | 52 - arch/um/os-Linux/signal.c | 8 +- arch/um/os-Linux/skas/process.c | 10 +- arch/unicore32/include/mach/pm.h | 3 + arch/unicore32/kernel/hibernate.c | 1 - arch/unicore32/mm/alignment.c | 1 - arch/unicore32/mm/fault.c | 22 +- arch/x86/Kconfig | 36 +- arch/x86/Makefile | 8 +- arch/x86/boot/Makefile | 6 +- arch/x86/boot/compressed/Makefile | 1 - arch/x86/boot/compressed/eboot.c | 146 +- arch/x86/boot/compressed/eboot.h | 52 +- arch/x86/boot/compressed/head_32.S | 14 +- arch/x86/boot/compressed/head_64.S | 9 +- arch/x86/boot/header.S | 26 +- arch/x86/boot/tools/build.c | 37 +- arch/x86/crypto/aes_glue.c | 4 +- arch/x86/crypto/aesni-intel_glue.c | 6 +- arch/x86/crypto/blowfish_avx2_glue.c | 4 +- arch/x86/crypto/blowfish_glue.c | 4 +- arch/x86/crypto/camellia_aesni_avx2_glue.c | 4 +- arch/x86/crypto/camellia_aesni_avx_glue.c | 4 +- arch/x86/crypto/camellia_glue.c | 4 +- arch/x86/crypto/cast5_avx_glue.c | 2 +- arch/x86/crypto/cast6_avx_glue.c | 2 +- arch/x86/crypto/crc32-pclmul_glue.c | 4 +- arch/x86/crypto/crc32c-intel_glue.c | 4 +- arch/x86/crypto/fpu.c | 3 - arch/x86/crypto/ghash-clmulni-intel_asm.S | 29 + arch/x86/crypto/ghash-clmulni-intel_glue.c | 17 +- arch/x86/crypto/salsa20_glue.c | 4 +- arch/x86/crypto/serpent_avx2_glue.c | 4 +- arch/x86/crypto/serpent_avx_glue.c | 2 +- arch/x86/crypto/serpent_sse2_glue.c | 2 +- arch/x86/crypto/sha1_ssse3_glue.c | 2 +- arch/x86/crypto/sha256_ssse3_glue.c | 2 +- arch/x86/crypto/sha512_ssse3_glue.c | 4 +- arch/x86/crypto/twofish_avx2_glue.c | 4 +- arch/x86/crypto/twofish_avx_glue.c | 2 +- arch/x86/crypto/twofish_glue.c | 4 +- arch/x86/crypto/twofish_glue_3way.c | 4 +- arch/x86/ia32/ia32_signal.c | 2 +- arch/x86/ia32/ia32entry.S | 18 +- arch/x86/include/asm/barrier.h | 43 +- arch/x86/include/asm/bootparam_utils.h | 4 +- arch/x86/include/asm/checksum_32.h | 22 +- arch/x86/include/asm/cpufeature.h | 2 +- arch/x86/include/asm/desc.h | 20 +- arch/x86/include/asm/dma-contiguous.h | 1 + arch/x86/include/asm/e820.h | 2 +- arch/x86/include/asm/efi.h | 2 +- arch/x86/include/asm/elf.h | 5 +- arch/x86/include/asm/espfix.h | 16 - arch/x86/include/asm/fixmap.h | 6 +- arch/x86/include/asm/fpu-internal.h | 15 +- arch/x86/include/asm/hugetlb.h | 1 - arch/x86/include/asm/idle.h | 7 + arch/x86/include/asm/irqflags.h | 2 +- arch/x86/include/asm/jump_label.h | 2 +- arch/x86/include/asm/kvm_host.h | 36 +- arch/x86/include/asm/mce.h | 13 +- arch/x86/include/asm/mmu_context.h | 20 +- arch/x86/include/asm/page_32_types.h | 1 + arch/x86/include/asm/page_64_types.h | 11 +- arch/x86/include/asm/pgtable.h | 11 +- arch/x86/include/asm/pgtable_64_types.h | 2 - arch/x86/include/asm/ptrace.h | 16 - arch/x86/include/asm/setup.h | 2 - arch/x86/include/asm/spinlock.h | 4 + arch/x86/include/asm/syscall.h | 8 +- arch/x86/include/asm/thread_info.h | 2 +- arch/x86/include/asm/topology.h | 3 +- arch/x86/include/asm/uaccess_64.h | 24 +- arch/x86/include/asm/vsyscall.h | 2 +- arch/x86/include/asm/xen/page.h | 31 +- arch/x86/include/asm/xor_avx.h | 4 +- arch/x86/include/uapi/asm/kvm.h | 6 +- arch/x86/include/uapi/asm/ldt.h | 7 - arch/x86/include/uapi/asm/msr-index.h | 1 - arch/x86/include/uapi/asm/processor-flags.h | 2 +- arch/x86/include/uapi/asm/vmx.h | 3 - arch/x86/kernel/Makefile | 1 - arch/x86/kernel/acpi/sleep.c | 18 +- arch/x86/kernel/amd_nb.c | 13 +- arch/x86/kernel/apic/apic.c | 11 +- arch/x86/kernel/apic/x2apic_uv_x.c | 2 +- arch/x86/kernel/cpu/amd.c | 10 - arch/x86/kernel/cpu/common.c | 11 +- arch/x86/kernel/cpu/intel.c | 20 +- arch/x86/kernel/cpu/mshyperv.c | 1 - arch/x86/kernel/cpu/mtrr/generic.c | 21 +- arch/x86/kernel/cpu/mtrr/main.c | 16 +- arch/x86/kernel/cpu/perf_event.c | 15 +- arch/x86/kernel/cpu/perf_event_amd.c | 34 +- arch/x86/kernel/cpu/perf_event_amd_ibs.c | 53 +- arch/x86/kernel/cpu/perf_event_intel.c | 12 - arch/x86/kernel/cpu/perf_event_intel_uncore.c | 26 +- arch/x86/kernel/devicetree.c | 3 +- arch/x86/kernel/dumpstack_64.c | 1 + arch/x86/kernel/e820.c | 5 +- arch/x86/kernel/early-quirks.c | 15 +- arch/x86/kernel/entry_32.S | 34 +- arch/x86/kernel/entry_64.S | 99 +- arch/x86/kernel/espfix_64.c | 208 - arch/x86/kernel/ftrace.c | 95 +- arch/x86/kernel/head_32.S | 7 +- arch/x86/kernel/head_64.S | 8 +- arch/x86/kernel/i387.c | 17 +- arch/x86/kernel/kprobes/core.c | 20 +- arch/x86/kernel/kvm.c | 9 +- arch/x86/kernel/kvmclock.c | 1 + arch/x86/kernel/ldt.c | 5 - arch/x86/kernel/microcode_amd.c | 2 +- arch/x86/kernel/microcode_intel_early.c | 2 +- arch/x86/kernel/paravirt_patch_64.c | 2 + arch/x86/kernel/pci-dma.c | 4 +- arch/x86/kernel/process.c | 23 +- arch/x86/kernel/process_32.c | 2 +- arch/x86/kernel/process_64.c | 103 +- arch/x86/kernel/ptrace.c | 11 +- arch/x86/kernel/quirks.c | 2 +- arch/x86/kernel/reboot.c | 28 +- arch/x86/kernel/resource.c | 8 +- arch/x86/kernel/setup.c | 25 +- arch/x86/kernel/signal.c | 11 +- arch/x86/kernel/smpboot.c | 10 - arch/x86/kernel/sys_x86_64.c | 2 +- arch/x86/kernel/tls.c | 62 +- arch/x86/kernel/traps.c | 73 +- arch/x86/kernel/tsc.c | 24 +- arch/x86/kernel/vsyscall_64.c | 8 +- arch/x86/kernel/xsave.c | 14 +- arch/x86/kvm/Kconfig | 2 - arch/x86/kvm/Makefile | 13 +- arch/x86/kvm/cpuid.c | 57 +- arch/x86/kvm/cpuid.h | 5 +- arch/x86/kvm/emulate.c | 138 +- arch/x86/kvm/i8254.c | 22 +- arch/x86/kvm/irq.c | 2 +- arch/x86/kvm/lapic.c | 158 +- arch/x86/kvm/lapic.h | 6 +- arch/x86/kvm/mmu.c | 22 +- arch/x86/kvm/paging_tmpl.h | 28 +- arch/x86/kvm/svm.c | 26 +- arch/x86/kvm/vmx.c | 65 +- arch/x86/kvm/x86.c | 177 +- arch/x86/kvm/x86.h | 22 +- arch/x86/lib/csum-wrappers_64.c | 12 +- arch/x86/mm/dump_pagetables.c | 39 +- arch/x86/mm/fault.c | 65 +- arch/x86/mm/hugetlbpage.c | 187 + arch/x86/mm/init.c | 4 +- arch/x86/mm/init_32.c | 1 - arch/x86/mm/init_64.c | 13 +- arch/x86/mm/ioremap.c | 26 +- arch/x86/mm/mmap.c | 12 +- arch/x86/mm/pageattr.c | 2 +- arch/x86/net/bpf_jit.S | 2 +- arch/x86/net/bpf_jit_comp.c | 21 +- arch/x86/pci/acpi.c | 11 - arch/x86/pci/common.c | 16 - arch/x86/pci/i386.c | 4 - arch/x86/platform/efi/efi.c | 169 +- arch/x86/power/hibernate_32.c | 4 +- arch/x86/power/hibernate_64.c | 4 +- arch/x86/realmode/rm/Makefile | 3 +- arch/x86/syscalls/syscall_32.tbl | 4 - arch/x86/syscalls/syscall_64.tbl | 10 +- arch/x86/um/signal.c | 1 + arch/x86/um/sys_call_table_32.c | 2 +- arch/x86/um/sys_call_table_64.c | 2 +- arch/x86/vdso/vdso32/sigreturn.S | 1 - arch/x86/vdso/vma.c | 43 +- arch/x86/xen/enlighten.c | 63 - arch/x86/xen/p2m.c | 10 +- arch/x86/xen/setup.c | 22 - arch/x86/xen/smp.c | 20 +- arch/x86/xen/time.c | 17 +- arch/xtensa/Kconfig | 30 - arch/xtensa/Makefile | 4 +- arch/xtensa/boot/Makefile | 2 +- arch/xtensa/include/asm/ftrace.h | 33 + arch/xtensa/include/asm/pgtable.h | 7 +- arch/xtensa/include/asm/traps.h | 53 +- arch/xtensa/include/asm/uaccess.h | 5 - arch/xtensa/include/uapi/asm/ioctls.h | 19 +- arch/xtensa/include/uapi/asm/unistd.h | 5 +- arch/xtensa/kernel/entry.S | 83 +- arch/xtensa/kernel/head.S | 9 - arch/xtensa/kernel/pci-dma.c | 12 +- arch/xtensa/kernel/setup.c | 46 +- arch/xtensa/kernel/signal.c | 2 +- arch/xtensa/mm/fault.c | 4 - arch/xtensa/platforms/xtfpga/Makefile | 3 +- .../xtfpga/include/platform/hardware.h | 3 + .../platforms/xtfpga/include/platform/lcd.h | 15 - arch/xtensa/platforms/xtfpga/lcd.c | 55 +- arch/xtensa/platforms/xtfpga/setup.c | 12 +- block/blk-cgroup.c | 20 +- block/blk-cgroup.h | 8 +- block/blk-core.c | 20 +- block/blk-ioc.c | 3 +- block/blk-lib.c | 8 - block/blk-settings.c | 5 +- block/blk-tag.c | 33 +- block/blk-throttle.c | 3 - block/blk-timeout.c | 3 +- block/blk.h | 2 +- block/cfq-iosched.c | 46 +- block/compat_ioctl.c | 1 - block/deadline-iosched.c | 16 +- block/elevator.c | 47 +- block/genhd.c | 68 +- block/noop-iosched.c | 17 +- block/partition-generic.c | 13 +- block/scsi_ioctl.c | 3 +- crypto/842.c | 1 - crypto/Kconfig | 53 - crypto/Makefile | 1 - crypto/ablk_helper.c | 150 - crypto/aes_generic.c | 3 +- crypto/af_alg.c | 5 - crypto/ahash.c | 3 +- crypto/algapi.c | 3 +- crypto/algif_hash.c | 5 +- crypto/algif_skcipher.c | 6 +- crypto/ansi_cprng.c | 7 +- crypto/anubis.c | 1 - crypto/api.c | 11 +- crypto/arc4.c | 1 - crypto/asymmetric_keys/x509_public_key.c | 38 + crypto/authenc.c | 8 +- crypto/authencesn.c | 1 - crypto/blkcipher.c | 81 +- crypto/blowfish_generic.c | 3 +- crypto/camellia_generic.c | 3 +- crypto/cast5_generic.c | 3 +- crypto/cast6_generic.c | 3 +- crypto/cbc.c | 1 - crypto/ccm.c | 8 +- crypto/chainiv.c | 1 - crypto/cmac.c | 1 - crypto/crc32.c | 1 - crypto/crc32c.c | 1 - crypto/cryptd.c | 1 - crypto/crypto_null.c | 6 +- crypto/crypto_user.c | 2 +- crypto/crypto_wq.c | 2 +- crypto/ctr.c | 3 +- crypto/cts.c | 1 - crypto/deflate.c | 2 +- crypto/des_generic.c | 7 +- crypto/ecb.c | 1 - crypto/eseqiv.c | 1 - crypto/fcrypt.c | 1 - crypto/gcm.c | 7 +- crypto/ghash-generic.c | 3 +- crypto/hmac.c | 1 - crypto/khazad.c | 1 - crypto/krng.c | 3 +- crypto/lrw.c | 1 - crypto/lzo.c | 1 - crypto/md4.c | 2 +- crypto/md5.c | 1 - crypto/michael_mic.c | 1 - crypto/pcbc.c | 1 - crypto/pcrypt.c | 1 - crypto/rmd128.c | 1 - crypto/rmd160.c | 1 - crypto/rmd256.c | 1 - crypto/rmd320.c | 1 - crypto/salsa20_generic.c | 3 +- crypto/seed.c | 1 - crypto/seqiv.c | 1 - crypto/serpent_generic.c | 5 +- crypto/sha1_generic.c | 3 +- crypto/sha256_generic.c | 6 +- crypto/sha512_generic.c | 6 +- crypto/tea.c | 5 +- crypto/tgr192.c | 5 +- crypto/twofish_generic.c | 3 +- crypto/vmac.c | 1 - crypto/wp512.c | 5 +- crypto/xcbc.c | 1 - crypto/xts.c | 1 - crypto/zlib.c | 1 - drivers/Kconfig | 6 - drivers/Makefile | 5 - drivers/acpi/Makefile | 1 - drivers/acpi/acpi_cmos_rtc.c | 92 - drivers/acpi/acpi_ipmi.c | 24 +- drivers/acpi/acpi_lpss.c | 3 +- drivers/acpi/acpi_memhotplug.c | 1 - drivers/acpi/acpica/aclocal.h | 1 - drivers/acpi/acpica/acmacros.h | 10 +- drivers/acpi/acpica/acobject.h | 1 - drivers/acpi/acpica/dsfield.c | 2 - drivers/acpi/acpica/dsopcode.c | 7 +- drivers/acpi/acpica/evregion.c | 47 +- drivers/acpi/acpica/exdump.c | 4 +- drivers/acpi/acpica/exfield.c | 67 - drivers/acpi/acpica/exfldio.c | 10 +- drivers/acpi/acpica/exoparg1.c | 48 +- drivers/acpi/acpica/exprep.c | 2 - drivers/acpi/acpica/exregion.c | 8 +- drivers/acpi/acpica/exstore.c | 166 +- drivers/acpi/acpica/hwvalid.c | 16 +- drivers/acpi/acpica/hwxfsleep.c | 8 +- drivers/acpi/acpica/nsdump.c | 12 +- drivers/acpi/acpica/tbinstal.c | 5 +- drivers/acpi/acpica/tbutils.c | 20 +- drivers/acpi/acpica/tbxfroot.c | 7 +- drivers/acpi/acpica/utaddress.c | 24 +- drivers/acpi/acpica/utcopy.c | 6 - drivers/acpi/acpica/utstring.c | 2 +- drivers/acpi/acpica/utxfinit.c | 10 +- drivers/acpi/battery.c | 50 +- drivers/acpi/blacklist.c | 13 - drivers/acpi/bus.c | 16 - drivers/acpi/device_pm.c | 25 +- drivers/acpi/ec.c | 11 +- drivers/acpi/glue.c | 95 +- drivers/acpi/internal.h | 5 - drivers/acpi/osl.c | 6 +- drivers/acpi/pci_irq.c | 1 - drivers/acpi/pci_root.c | 8 +- drivers/acpi/proc.c | 8 - drivers/acpi/processor_idle.c | 52 +- drivers/acpi/processor_throttling.c | 69 +- drivers/acpi/resource.c | 10 - drivers/acpi/scan.c | 33 +- drivers/acpi/sleep.c | 32 +- drivers/acpi/video.c | 29 +- drivers/amba/bus.c | 2 +- drivers/android/Kconfig | 37 - drivers/android/Makefile | 3 - drivers/android/binder.c | 3718 ----------------- drivers/android/binder_trace.h | 329 -- drivers/ata/Kconfig | 2 +- drivers/ata/ahci.c | 57 - drivers/ata/ata_piix.c | 12 +- drivers/ata/libahci.c | 22 +- drivers/ata/libata-core.c | 113 +- drivers/ata/libata-eh.c | 9 +- drivers/ata/libata-pmp.c | 59 +- drivers/ata/libata-scsi.c | 43 +- drivers/ata/libata-sff.c | 32 +- drivers/ata/libata-transport.c | 16 +- drivers/ata/libata-zpodd.c | 7 +- drivers/ata/pata_at91.c | 11 +- drivers/ata/pata_octeon_cf.c | 2 +- drivers/ata/pata_scc.c | 15 +- drivers/ata/pata_serverworks.c | 13 +- drivers/ata/sata_dwc_460ex.c | 26 +- drivers/ata/sata_fsl.c | 7 +- drivers/ata/sata_highbank.c | 20 +- drivers/ata/sata_inic162x.c | 14 - drivers/ata/sata_mv.c | 25 - drivers/ata/sata_sil.c | 1 - drivers/atm/idt77252.c | 2 +- drivers/auxdisplay/ks0108.c | 1 - drivers/base/Kconfig | 28 +- drivers/base/Makefile | 2 +- drivers/base/bus.c | 8 +- drivers/base/core.c | 18 +- drivers/base/cpu.c | 52 +- drivers/base/dd.c | 19 +- drivers/base/devres.c | 35 +- drivers/base/dma-contiguous.c | 119 +- drivers/base/dma-mapping.c | 72 - drivers/base/firmware_class.c | 65 +- drivers/base/memory.c | 2 - drivers/base/platform.c | 9 +- drivers/base/power/domain.c | 289 -- drivers/base/power/main.c | 79 - drivers/base/power/wakeup.c | 67 - drivers/base/regmap/regcache-rbtree.c | 2 +- drivers/base/regmap/regcache.c | 3 +- drivers/base/regmap/regmap-debugfs.c | 13 +- drivers/base/regmap/regmap.c | 10 +- drivers/base/syscore.c | 3 - drivers/base/topology.c | 3 +- drivers/block/Kconfig | 2 - drivers/block/Makefile | 1 - drivers/block/aoe/aoecmd.c | 2 +- drivers/block/brd.c | 2 +- drivers/block/cciss.c | 1 - drivers/block/cpqarray.c | 1 - drivers/block/drbd/drbd_interval.c | 4 - drivers/block/drbd/drbd_nl.c | 6 - drivers/block/drbd/drbd_req.c | 1 - drivers/block/floppy.c | 11 +- drivers/block/loop.c | 21 +- drivers/block/mtip32xx/mtip32xx.c | 124 +- drivers/block/nbd.c | 18 +- drivers/block/rbd.c | 228 +- drivers/block/sunvdc.c | 176 +- drivers/block/xen-blkback/blkback.c | 16 +- drivers/block/xen-blkfront.c | 166 +- drivers/block/zram/Kconfig | 34 - drivers/block/zram/Makefile | 5 - drivers/block/zram/zcomp.c | 353 -- drivers/block/zram/zcomp.h | 68 - drivers/block/zram/zcomp_lz4.c | 47 - drivers/block/zram/zcomp_lz4.h | 17 - drivers/block/zram/zcomp_lzo.c | 47 - drivers/block/zram/zcomp_lzo.h | 17 - drivers/block/zram/zram_drv.c | 1162 ------ drivers/block/zram/zram_drv.h | 123 - drivers/bluetooth/ath3k.c | 62 +- drivers/bluetooth/btusb.c | 48 +- drivers/bluetooth/hci_h5.c | 3 +- drivers/bluetooth/hci_ldisc.c | 24 +- drivers/bluetooth/hci_uart.h | 1 - drivers/bus/Kconfig | 7 - drivers/bus/Makefile | 2 - drivers/bus/arm-cci.c | 947 ----- drivers/bus/mvebu-mbus.c | 24 +- drivers/cdrom/cdrom.c | 2 +- drivers/char/Kconfig | 17 - drivers/char/Makefile | 1 - drivers/char/agp/intel-gtt.c | 2 +- drivers/char/agp/parisc-agp.c | 6 +- drivers/char/applicom.c | 1 + drivers/char/dcc_tty.c | 326 -- drivers/char/hw_random/bcm2835-rng.c | 2 +- drivers/char/i8k.c | 7 - drivers/char/ipmi/ipmi_bt_sm.c | 2 +- drivers/char/ipmi/ipmi_kcs_sm.c | 5 +- drivers/char/ipmi/ipmi_si_intf.c | 48 +- drivers/char/mem.c | 17 - drivers/char/random.c | 13 +- drivers/char/raw.c | 2 +- drivers/char/tpm/tpm.c | 69 +- drivers/char/tpm/tpm.h | 3 - drivers/char/tpm/tpm_i2c_stm_st33.c | 9 +- drivers/char/tpm/tpm_ibmvtpm.c | 39 +- drivers/char/tpm/tpm_ibmvtpm.h | 6 +- drivers/char/tpm/tpm_ppi.c | 23 +- drivers/char/tpm/tpm_tis.c | 107 +- drivers/char/virtio_console.c | 73 +- drivers/clk/Kconfig | 2 +- drivers/clk/clk-divider.c | 116 +- drivers/clk/clk-wm831x.c | 2 - drivers/clk/clk.c | 6 - drivers/clk/mvebu/clk-core.c | 4 +- drivers/clk/samsung/clk-exynos4.c | 2 +- drivers/clk/samsung/clk-exynos5250.c | 7 +- drivers/clk/spear/spear3xx_clock.c | 2 +- drivers/clk/sunxi/clk-factors.c | 2 +- drivers/clk/sunxi/clk-factors.h | 1 - drivers/clk/versatile/Makefile | 2 +- drivers/clk/versatile/clk-icst.c | 2 +- drivers/clk/versatile/clk-sp810.c | 4 +- drivers/clk/versatile/clk-vexpress-osc.c | 6 +- drivers/clk/versatile/clk-vexpress-spc.c | 131 - drivers/clocksource/Kconfig | 15 - drivers/clocksource/arm_arch_timer.c | 506 +-- drivers/clocksource/dw_apb_timer_of.c | 4 +- drivers/clocksource/em_sti.c | 2 +- drivers/clocksource/exynos_mct.c | 8 +- drivers/connector/cn_proc.c | 92 +- drivers/connector/connector.c | 7 +- drivers/coresight/Makefile | 11 - drivers/coresight/coresight-etb10.c | 527 --- drivers/coresight/coresight-etm-cp14.c | 591 --- drivers/coresight/coresight-etm.h | 251 -- drivers/coresight/coresight-etm3x.c | 1932 --------- drivers/coresight/coresight-funnel.c | 258 -- drivers/coresight/coresight-priv.h | 63 - drivers/coresight/coresight-replicator.c | 137 - drivers/coresight/coresight-tmc.c | 766 ---- drivers/coresight/coresight-tpiu.c | 207 - drivers/coresight/coresight.c | 718 ---- drivers/coresight/of_coresight.c | 206 - drivers/cpufreq/Kconfig | 30 +- drivers/cpufreq/Kconfig.arm | 11 +- drivers/cpufreq/Makefile | 4 +- drivers/cpufreq/arm_big_little.c | 422 +- drivers/cpufreq/arm_big_little.h | 17 +- drivers/cpufreq/cpufreq.c | 95 +- drivers/cpufreq/cpufreq_conservative.c | 20 +- drivers/cpufreq/cpufreq_governor.c | 69 +- drivers/cpufreq/cpufreq_governor.h | 6 +- drivers/cpufreq/cpufreq_interactive.c | 1375 ------ drivers/cpufreq/cpufreq_ondemand.c | 59 +- drivers/cpufreq/cpufreq_stats.c | 469 +-- drivers/cpufreq/highbank-cpufreq.c | 5 +- drivers/cpufreq/intel_pstate.c | 74 +- drivers/cpufreq/loongson2_cpufreq.c | 11 +- drivers/cpufreq/powernow-k6.c | 147 +- drivers/cpufreq/powernow-k8.c | 10 +- drivers/cpufreq/speedstep-lib.c | 3 - drivers/cpufreq/speedstep-smi.c | 12 - drivers/cpufreq/vexpress_big_little.c | 86 - drivers/cpuidle/Kconfig | 8 - drivers/cpuidle/Kconfig.arm64 | 14 - drivers/cpuidle/Makefile | 6 - drivers/cpuidle/arm_big_little.c | 183 - drivers/cpuidle/coupled.c | 127 +- drivers/cpuidle/cpuidle-arm64.c | 133 - drivers/cpuidle/cpuidle-calxeda.c | 14 + drivers/cpuidle/cpuidle.c | 3 - drivers/cpuidle/driver.c | 3 +- drivers/cpuidle/dt_idle_states.c | 213 - drivers/cpuidle/dt_idle_states.h | 7 - drivers/cpuidle/governors/menu.c | 117 +- drivers/crypto/caam/caamhash.c | 9 +- drivers/crypto/caam/caamrng.c | 2 +- drivers/crypto/caam/error.c | 10 +- drivers/crypto/ixp4xx_crypto.c | 1 + drivers/crypto/nx/nx-842.c | 34 +- drivers/crypto/padlock-aes.c | 2 +- drivers/crypto/padlock-sha.c | 8 +- drivers/crypto/talitos.c | 4 +- drivers/crypto/ux500/cryp/cryp_core.c | 29 +- drivers/crypto/ux500/hash/hash_core.c | 8 +- drivers/dma/Kconfig | 1 - drivers/dma/imx-dma.c | 31 +- drivers/dma/ioat/dma.c | 52 +- drivers/dma/ioat/dma.h | 1 - drivers/dma/ioat/dma_v2.c | 11 +- drivers/dma/ioat/dma_v3.c | 49 +- drivers/dma/mv_xor.c | 72 +- drivers/dma/mv_xor.h | 1 - drivers/dma/omap-dma.c | 1 - drivers/dma/pl330.c | 97 +- drivers/dma/ste_dma40.c | 4 +- drivers/edac/amd64_edac.c | 9 +- drivers/edac/cpc925_edac.c | 2 +- drivers/edac/e752x_edac.c | 4 +- drivers/edac/e7xxx_edac.c | 2 +- drivers/edac/edac_mc.c | 22 +- drivers/edac/edac_mc_sysfs.c | 40 +- drivers/edac/edac_module.h | 2 +- drivers/edac/highbank_l2_edac.c | 18 +- drivers/edac/highbank_mc_edac.c | 18 +- drivers/edac/i3200_edac.c | 4 +- drivers/edac/i5100_edac.c | 2 +- drivers/edac/i7300_edac.c | 38 +- drivers/edac/i7core_edac.c | 9 +- drivers/edac/i82860_edac.c | 2 +- drivers/edac/ppc4xx_edac.c | 2 +- drivers/edac/sb_edac.c | 46 +- drivers/eisa/eisa-bus.c | 26 +- drivers/extcon/extcon-adc-jack.c | 3 +- drivers/extcon/extcon-gpio.c | 2 +- drivers/extcon/extcon-max77693.c | 4 +- drivers/extcon/extcon-max8997.c | 2 +- drivers/firewire/core-cdev.c | 6 +- drivers/firewire/core-device.c | 22 +- drivers/firewire/net.c | 6 +- drivers/firewire/ohci.c | 41 +- drivers/firewire/sbp2.c | 17 +- drivers/firmware/dmi_scan.c | 12 +- drivers/firmware/efi/Kconfig | 7 - drivers/firmware/efi/arm-stub.c | 278 -- drivers/firmware/efi/efi-pstore.c | 168 +- drivers/firmware/efi/efi-stub-helper.c | 634 --- drivers/firmware/efi/efi.c | 227 - drivers/firmware/efi/efivars.c | 209 +- drivers/firmware/efi/fdt.c | 275 -- drivers/firmware/efi/vars.c | 50 +- drivers/gator/COPYING | 339 -- drivers/gator/Kconfig | 39 - drivers/gator/Makefile | 95 - drivers/gator/gator.h | 153 - drivers/gator/gator_annotate.c | 189 - drivers/gator/gator_annotate_kernel.c | 200 - drivers/gator/gator_backtrace.c | 208 - drivers/gator/gator_buffer.c | 171 - drivers/gator/gator_buffer_write.c | 83 - drivers/gator/gator_cookies.c | 446 -- drivers/gator/gator_events_armv6.c | 234 -- drivers/gator/gator_events_armv7.c | 314 -- drivers/gator/gator_events_block.c | 160 - drivers/gator/gator_events_irq.c | 163 - drivers/gator/gator_events_l2c-310.c | 208 - drivers/gator/gator_events_mali_4xx.c | 622 --- drivers/gator/gator_events_mali_4xx.h | 18 - drivers/gator/gator_events_mali_common.c | 72 - drivers/gator/gator_events_mali_common.h | 77 - drivers/gator/gator_events_mali_midgard.c | 562 --- drivers/gator/gator_events_mali_midgard_hw.c | 978 ----- .../gator/gator_events_mali_midgard_hw_test.c | 55 - drivers/gator/gator_events_meminfo.c | 473 --- drivers/gator/gator_events_mmapped.c | 209 - drivers/gator/gator_events_net.c | 172 - drivers/gator/gator_events_perf_pmu.c | 583 --- drivers/gator/gator_events_sched.c | 113 - drivers/gator/gator_events_scorpion.c | 674 --- drivers/gator/gator_fs.c | 370 -- drivers/gator/gator_hrtimer_gator.c | 80 - drivers/gator/gator_iks.c | 197 - drivers/gator/gator_main.c | 1501 ------- drivers/gator/gator_marshaling.c | 371 -- drivers/gator/gator_trace_gpu.c | 321 -- drivers/gator/gator_trace_power.c | 186 - drivers/gator/gator_trace_sched.c | 321 -- .../mali/mali_mjollnir_profiling_gator_api.h | 159 - .../mali/mali_utgard_profiling_gator_api.h | 197 - drivers/gator/mali_midgard.mk | 40 - drivers/gpio/gpio-lynxpoint.c | 5 +- drivers/gpio/gpio-mpc8xxx.c | 8 +- drivers/gpio/gpio-msm-v2.c | 4 +- drivers/gpio/gpio-mvebu.c | 2 +- drivers/gpio/gpio-mxs.c | 3 +- drivers/gpio/gpio-omap.c | 158 +- drivers/gpio/gpio-pl061.c | 10 +- drivers/gpio/gpio-rcar.c | 4 +- drivers/gpio/gpio-tps65912.c | 14 +- drivers/gpio/gpio-twl4030.c | 18 +- drivers/gpio/gpiolib-of.c | 11 +- drivers/gpio/gpiolib.c | 61 +- drivers/gpu/drm/ast/ast_drv.h | 2 +- drivers/gpu/drm/ast/ast_main.c | 2 +- drivers/gpu/drm/ast/ast_mode.c | 4 +- drivers/gpu/drm/ast/ast_ttm.c | 1 - drivers/gpu/drm/cirrus/cirrus_drv.c | 42 - drivers/gpu/drm/cirrus/cirrus_mode.c | 7 +- drivers/gpu/drm/cirrus/cirrus_ttm.c | 1 - drivers/gpu/drm/drm_crtc.c | 25 +- drivers/gpu/drm/drm_drv.c | 9 +- drivers/gpu/drm/drm_edid.c | 11 - drivers/gpu/drm/drm_gem.c | 18 +- drivers/gpu/drm/drm_gem_cma_helper.c | 4 +- drivers/gpu/drm/drm_irq.c | 5 +- drivers/gpu/drm/drm_lock.c | 6 - drivers/gpu/drm/i915/i915_dma.c | 29 +- drivers/gpu/drm/i915/i915_drv.c | 13 +- drivers/gpu/drm/i915/i915_drv.h | 8 +- drivers/gpu/drm/i915/i915_gem.c | 59 +- drivers/gpu/drm/i915/i915_gem_context.c | 4 +- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 54 +- drivers/gpu/drm/i915/i915_gem_stolen.c | 2 +- drivers/gpu/drm/i915/i915_irq.c | 89 +- drivers/gpu/drm/i915/i915_reg.h | 52 +- drivers/gpu/drm/i915/intel_bios.c | 2 +- drivers/gpu/drm/i915/intel_crt.c | 10 +- drivers/gpu/drm/i915/intel_ddi.c | 18 +- drivers/gpu/drm/i915/intel_display.c | 98 +- drivers/gpu/drm/i915/intel_dp.c | 53 +- drivers/gpu/drm/i915/intel_drv.h | 2 +- drivers/gpu/drm/i915/intel_i2c.c | 86 +- drivers/gpu/drm/i915/intel_lvds.c | 66 +- drivers/gpu/drm/i915/intel_panel.c | 3 +- drivers/gpu/drm/i915/intel_pm.c | 47 +- drivers/gpu/drm/i915/intel_ringbuffer.c | 39 +- drivers/gpu/drm/i915/intel_tv.c | 12 - drivers/gpu/drm/mgag200/mgag200_drv.h | 3 +- drivers/gpu/drm/mgag200/mgag200_main.c | 2 +- drivers/gpu/drm/mgag200/mgag200_mode.c | 75 +- drivers/gpu/drm/mgag200/mgag200_ttm.c | 1 - .../drm/nouveau/core/engine/disp/dacnv50.c | 15 +- .../drm/nouveau/core/engine/disp/hdanva3.c | 2 - .../drm/nouveau/core/engine/disp/hdanvd0.c | 2 - .../drm/nouveau/core/engine/disp/hdminva3.c | 4 - .../gpu/drm/nouveau/core/engine/disp/nv50.c | 8 +- .../gpu/drm/nouveau/core/engine/disp/nvd0.c | 2 +- .../drm/nouveau/core/engine/disp/sornv50.c | 8 + .../gpu/drm/nouveau/core/include/subdev/mc.h | 7 +- .../gpu/drm/nouveau/core/subdev/bios/dcb.c | 1 - .../gpu/drm/nouveau/core/subdev/bios/init.c | 33 +- drivers/gpu/drm/nouveau/core/subdev/mc/base.c | 6 +- drivers/gpu/drm/nouveau/core/subdev/mc/nv04.c | 3 +- drivers/gpu/drm/nouveau/core/subdev/mc/nv44.c | 3 +- drivers/gpu/drm/nouveau/core/subdev/mc/nv50.c | 3 +- drivers/gpu/drm/nouveau/core/subdev/mc/nv98.c | 3 +- drivers/gpu/drm/nouveau/core/subdev/mc/nvc0.c | 3 +- .../gpu/drm/nouveau/core/subdev/therm/fan.c | 19 +- drivers/gpu/drm/nouveau/core/subdev/vm/base.c | 6 +- drivers/gpu/drm/nouveau/nouveau_acpi.c | 3 + drivers/gpu/drm/nouveau/nouveau_bo.c | 33 +- drivers/gpu/drm/nouveau/nouveau_drm.c | 3 - drivers/gpu/drm/nouveau/nouveau_gem.c | 3 +- drivers/gpu/drm/nouveau/nv17_fence.c | 2 +- drivers/gpu/drm/nouveau/nv50_fence.c | 14 +- drivers/gpu/drm/omapdrm/omap_dmm_tiler.c | 6 +- drivers/gpu/drm/omapdrm/omap_gem.c | 10 +- drivers/gpu/drm/omapdrm/omap_plane.c | 4 +- drivers/gpu/drm/qxl/qxl_cmd.c | 1 - drivers/gpu/drm/qxl/qxl_fb.c | 2 +- drivers/gpu/drm/qxl/qxl_irq.c | 3 - drivers/gpu/drm/qxl/qxl_ttm.c | 1 - drivers/gpu/drm/radeon/atom.c | 5 - drivers/gpu/drm/radeon/atombios_crtc.c | 79 +- drivers/gpu/drm/radeon/atombios_dp.c | 64 +- drivers/gpu/drm/radeon/atombios_encoders.c | 32 +- drivers/gpu/drm/radeon/atombios_i2c.c | 4 +- drivers/gpu/drm/radeon/evergreen.c | 49 +- drivers/gpu/drm/radeon/evergreen_cs.c | 5 +- drivers/gpu/drm/radeon/evergreen_hdmi.c | 22 +- drivers/gpu/drm/radeon/evergreend.h | 8 +- drivers/gpu/drm/radeon/ni.c | 50 +- drivers/gpu/drm/radeon/nid.h | 1 - drivers/gpu/drm/radeon/r100.c | 12 +- drivers/gpu/drm/radeon/r600.c | 53 +- drivers/gpu/drm/radeon/r600_cs.c | 5 +- drivers/gpu/drm/radeon/r600_hdmi.c | 118 +- drivers/gpu/drm/radeon/r600d.h | 3 +- drivers/gpu/drm/radeon/radeon.h | 4 +- drivers/gpu/drm/radeon/radeon_asic.c | 8 +- drivers/gpu/drm/radeon/radeon_asic.h | 2 +- drivers/gpu/drm/radeon/radeon_atombios.c | 28 +- drivers/gpu/drm/radeon/radeon_atpx_handler.c | 10 +- drivers/gpu/drm/radeon/radeon_bios.c | 24 +- drivers/gpu/drm/radeon/radeon_combios.c | 174 +- drivers/gpu/drm/radeon/radeon_connectors.c | 41 +- drivers/gpu/drm/radeon/radeon_cs.c | 18 +- drivers/gpu/drm/radeon/radeon_device.c | 15 +- drivers/gpu/drm/radeon/radeon_display.c | 6 - drivers/gpu/drm/radeon/radeon_gart.c | 15 +- drivers/gpu/drm/radeon/radeon_i2c.c | 3 - drivers/gpu/drm/radeon/radeon_irq_kms.c | 11 +- drivers/gpu/drm/radeon/radeon_kms.c | 11 - drivers/gpu/drm/radeon/radeon_legacy_crtc.c | 28 - drivers/gpu/drm/radeon/radeon_object.c | 38 +- drivers/gpu/drm/radeon/radeon_object.h | 2 +- drivers/gpu/drm/radeon/radeon_pm.c | 6 +- drivers/gpu/drm/radeon/radeon_ring.c | 9 +- drivers/gpu/drm/radeon/radeon_sa.c | 7 +- drivers/gpu/drm/radeon/radeon_test.c | 4 +- drivers/gpu/drm/radeon/radeon_ttm.c | 2 +- drivers/gpu/drm/radeon/radeon_uvd.c | 134 +- drivers/gpu/drm/radeon/rs400.c | 9 +- drivers/gpu/drm/radeon/rs600.c | 10 +- drivers/gpu/drm/radeon/rs690.c | 10 - drivers/gpu/drm/radeon/rv770.c | 17 +- drivers/gpu/drm/radeon/si.c | 164 +- drivers/gpu/drm/radeon/sid.h | 12 +- drivers/gpu/drm/tilcdc/tilcdc_drv.c | 67 +- drivers/gpu/drm/tilcdc/tilcdc_panel.c | 5 +- drivers/gpu/drm/tilcdc/tilcdc_slave.c | 1 - drivers/gpu/drm/tilcdc/tilcdc_tfp410.c | 1 - drivers/gpu/drm/ttm/ttm_bo.c | 40 +- drivers/gpu/drm/ttm/ttm_bo_util.c | 30 +- drivers/gpu/drm/ttm/ttm_page_alloc_dma.c | 9 +- drivers/gpu/drm/ttm/ttm_tt.c | 2 +- drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 17 +- drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c | 22 - drivers/gpu/drm/vmwgfx/vmwgfx_fb.c | 4 +- drivers/gpu/drm/vmwgfx/vmwgfx_fence.c | 17 +- drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c | 3 +- drivers/gpu/drm/vmwgfx/vmwgfx_gmr.c | 58 +- drivers/gpu/drm/vmwgfx/vmwgfx_resource.c | 2 +- drivers/gpu/host1x/hw/intr_hw.c | 4 +- drivers/hid/Kconfig | 10 +- drivers/hid/hid-apple.c | 28 - drivers/hid/hid-axff.c | 3 +- drivers/hid/hid-cherry.c | 2 +- drivers/hid/hid-core.c | 145 +- drivers/hid/hid-debug.c | 15 +- drivers/hid/hid-ids.h | 24 - drivers/hid/hid-input.c | 70 +- drivers/hid/hid-kye.c | 6 +- drivers/hid/hid-lenovo-tpkbd.c | 25 +- drivers/hid/hid-lg.c | 142 +- drivers/hid/hid-lg2ff.c | 21 +- drivers/hid/hid-lg3ff.c | 29 +- drivers/hid/hid-lg4ff.c | 82 +- drivers/hid/hid-lgff.c | 17 +- drivers/hid/hid-logitech-dj.c | 115 +- drivers/hid/hid-logitech-dj.h | 2 - drivers/hid/hid-magicmouse.c | 10 - drivers/hid/hid-monterey.c | 2 +- drivers/hid/hid-multitouch.c | 83 +- drivers/hid/hid-ntrig.c | 3 +- drivers/hid/hid-petalynx.c | 2 +- drivers/hid/hid-picolcd_cir.c | 3 +- drivers/hid/hid-picolcd_core.c | 8 +- drivers/hid/hid-picolcd_debugfs.c | 23 +- drivers/hid/hid-picolcd_fb.c | 6 +- drivers/hid/hid-pl.c | 10 +- drivers/hid/hid-roccat-common.c | 12 +- drivers/hid/hid-roccat-konepure.c | 3 +- drivers/hid/hid-roccat-kovaplus.c | 4 - drivers/hid/hid-roccat-pyra.c | 8 +- drivers/hid/hid-sensor-hub.c | 16 +- drivers/hid/hid-speedlink.c | 11 +- drivers/hid/hid-steelseries.c | 5 - drivers/hid/hid-sunplus.c | 2 +- drivers/hid/hid-zpff.c | 18 +- drivers/hid/hidraw.c | 60 +- drivers/hid/i2c-hid/i2c-hid.c | 15 +- drivers/hid/uhid.c | 6 +- drivers/hid/usbhid/hid-core.c | 7 +- drivers/hid/usbhid/hid-quirks.c | 8 - drivers/hv/channel.c | 27 +- drivers/hv/channel_mgmt.c | 12 +- drivers/hv/connection.c | 42 +- drivers/hv/hv_balloon.c | 50 +- drivers/hv/hv_kvp.c | 14 +- drivers/hv/hv_util.c | 2 +- drivers/hv/ring_buffer.c | 10 +- drivers/hv/vmbus_drv.c | 10 +- drivers/hwmon/Kconfig | 6 +- drivers/hwmon/adm1021.c | 14 +- drivers/hwmon/adm1029.c | 3 - drivers/hwmon/adm1031.c | 8 +- drivers/hwmon/ads1015.c | 4 +- drivers/hwmon/adt7470.c | 8 +- drivers/hwmon/amc6821.c | 2 +- drivers/hwmon/applesmc.c | 24 +- drivers/hwmon/coretemp.c | 2 +- drivers/hwmon/da9052-hwmon.c | 2 +- drivers/hwmon/da9055-hwmon.c | 2 +- drivers/hwmon/dme1737.c | 33 +- drivers/hwmon/emc1403.c | 4 +- drivers/hwmon/gpio-fan.c | 2 +- drivers/hwmon/hih6130.c | 16 +- drivers/hwmon/ina2xx.c | 7 +- drivers/hwmon/k10temp.c | 4 +- drivers/hwmon/lm75.c | 35 +- drivers/hwmon/lm78.c | 4 +- drivers/hwmon/lm85.c | 9 +- drivers/hwmon/lm90.c | 11 +- drivers/hwmon/max1668.c | 2 +- drivers/hwmon/max6697.c | 4 +- drivers/hwmon/mcp3021.c | 14 +- drivers/hwmon/nct6775.c | 92 +- drivers/hwmon/ntc_thermistor.c | 30 +- drivers/hwmon/sis5595.c | 4 +- drivers/hwmon/smsc47m192.c | 4 +- drivers/hwmon/tmp102.c | 19 - drivers/hwmon/vt8231.c | 2 +- drivers/hwmon/w83l786ng.c | 13 +- drivers/i2c/busses/Kconfig | 4 - drivers/i2c/busses/i2c-at91.c | 106 +- drivers/i2c/busses/i2c-davinci.c | 8 +- drivers/i2c/busses/i2c-designware-core.c | 3 - drivers/i2c/busses/i2c-i801.c | 9 - drivers/i2c/busses/i2c-ismt.c | 3 - drivers/i2c/busses/i2c-mxs.c | 2 +- drivers/i2c/busses/i2c-omap.c | 13 +- drivers/i2c/busses/i2c-piix4.c | 3 +- drivers/i2c/busses/i2c-rcar.c | 16 +- drivers/i2c/busses/i2c-s3c2410.c | 2 +- drivers/i2c/i2c-core.c | 187 +- drivers/i2c/i2c-mux.c | 3 + drivers/i2c/muxes/i2c-mux-gpio.c | 8 +- drivers/idle/intel_idle.c | 5 +- drivers/iio/accel/kxsd9.c | 7 +- drivers/iio/adc/ad7887.c | 16 +- drivers/iio/adc/ad_sigma_delta.c | 2 +- drivers/iio/adc/at91_adc.c | 16 +- drivers/iio/adc/max1363.c | 16 +- .../common/st_sensors/st_sensors_trigger.c | 2 +- drivers/iio/dac/ad5624r_spi.c | 4 +- drivers/iio/gyro/Kconfig | 2 +- drivers/iio/gyro/itg3200_buffer.c | 2 +- drivers/iio/gyro/st_gyro.h | 1 + drivers/iio/gyro/st_gyro_core.c | 9 +- drivers/iio/gyro/st_gyro_i2c.c | 1 + drivers/iio/gyro/st_gyro_spi.c | 1 + drivers/iio/imu/adis16400.h | 2 - drivers/iio/imu/adis16400_core.c | 58 +- drivers/iio/imu/adis16480.c | 39 +- drivers/iio/imu/adis_trigger.c | 2 +- drivers/iio/imu/inv_mpu6050/inv_mpu_core.c | 7 +- drivers/iio/imu/inv_mpu6050/inv_mpu_ring.c | 25 +- drivers/iio/imu/inv_mpu6050/inv_mpu_trigger.c | 2 +- drivers/iio/industrialio-buffer.c | 8 +- drivers/iio/industrialio-event.c | 12 +- drivers/iio/inkern.c | 10 +- drivers/iio/magnetometer/ak8975.c | 9 +- drivers/iio/magnetometer/st_magn_core.c | 52 +- drivers/infiniband/core/iwcm.c | 27 - drivers/infiniband/core/umem.c | 11 - drivers/infiniband/core/user_mad.c | 75 +- drivers/infiniband/core/uverbs.h | 3 +- drivers/infiniband/core/uverbs_cmd.c | 10 +- drivers/infiniband/core/uverbs_main.c | 44 +- drivers/infiniband/hw/ehca/ehca_cq.c | 1 - drivers/infiniband/hw/ipath/ipath_diag.c | 68 +- drivers/infiniband/hw/ipath/ipath_user_sdma.c | 7 +- drivers/infiniband/hw/mlx4/ah.c | 6 +- drivers/infiniband/hw/mlx4/mad.c | 20 +- drivers/infiniband/hw/mlx4/qp.c | 3 +- drivers/infiniband/hw/mlx4/sysfs.c | 5 +- drivers/infiniband/hw/mthca/mthca_provider.c | 1 - drivers/infiniband/hw/nes/nes_verbs.c | 2 +- drivers/infiniband/hw/qib/qib.h | 36 +- drivers/infiniband/hw/qib/qib_eeprom.c | 181 + drivers/infiniband/hw/qib/qib_iba6120.c | 2 + drivers/infiniband/hw/qib/qib_iba7220.c | 2 + drivers/infiniband/hw/qib/qib_iba7322.c | 18 +- drivers/infiniband/hw/qib/qib_init.c | 1 + drivers/infiniband/hw/qib/qib_keys.c | 4 - drivers/infiniband/hw/qib/qib_mad.c | 2 +- drivers/infiniband/hw/qib/qib_sysfs.c | 24 + drivers/infiniband/hw/qib/qib_ud.c | 9 +- drivers/infiniband/hw/qib/qib_user_sdma.c | 6 +- drivers/infiniband/hw/qib/qib_verbs.c | 14 +- drivers/infiniband/hw/qib/qib_verbs.h | 2 - drivers/infiniband/ulp/isert/ib_isert.c | 646 +-- drivers/infiniband/ulp/isert/ib_isert.h | 14 +- drivers/infiniband/ulp/srp/ib_srp.c | 53 +- drivers/infiniband/ulp/srpt/ib_srpt.c | 38 +- drivers/input/Kconfig | 21 +- drivers/input/Makefile | 3 - drivers/input/evdev.c | 69 +- drivers/input/input.c | 10 +- drivers/input/joystick/xpad.c | 17 +- drivers/input/keyboard/Kconfig | 4 +- drivers/input/keyboard/atkbd.c | 21 +- drivers/input/keycombo.c | 261 -- drivers/input/keyreset.c | 145 - drivers/input/misc/Kconfig | 16 - drivers/input/misc/Makefile | 2 - drivers/input/misc/arizona-haptics.c | 11 +- drivers/input/misc/gpio_axis.c | 192 - drivers/input/misc/gpio_event.c | 228 - drivers/input/misc/gpio_input.c | 390 -- drivers/input/misc/gpio_matrix.c | 441 -- drivers/input/misc/gpio_output.c | 97 - drivers/input/misc/keychord.c | 391 -- drivers/input/mouse/alps.c | 11 +- drivers/input/mouse/bcm5974.c | 36 +- drivers/input/mouse/cypress_ps2.c | 20 +- drivers/input/mouse/elantech.c | 124 +- drivers/input/mouse/elantech.h | 2 - drivers/input/mouse/synaptics.c | 181 +- drivers/input/mouse/synaptics.h | 11 - drivers/input/mousedev.c | 73 +- drivers/input/serio/Kconfig | 6 +- drivers/input/serio/i8042-x86ia64io.h | 86 - drivers/input/serio/i8042.c | 14 - drivers/input/serio/serport.c | 45 +- drivers/input/tablet/wacom_sys.c | 7 +- drivers/input/touchscreen/usbtouchscreen.c | 29 +- drivers/iommu/amd_iommu.c | 18 +- drivers/iommu/intel-iommu.c | 86 +- drivers/iommu/intel_irq_remapping.c | 13 +- drivers/irqchip/Kconfig | 5 - drivers/irqchip/Makefile | 3 +- drivers/irqchip/irq-armada-370-xp.c | 2 +- drivers/irqchip/irq-gic-common.c | 115 - drivers/irqchip/irq-gic-common.h | 29 - drivers/irqchip/irq-gic-v3.c | 692 --- drivers/irqchip/irq-gic.c | 338 +- drivers/irqchip/irq-metag-ext.c | 2 +- drivers/irqchip/irq-metag.c | 2 +- drivers/irqchip/irq-renesas-irqc.c | 4 +- drivers/irqchip/spear-shirq.c | 2 +- drivers/isdn/gigaset/ser-gigaset.c | 11 +- drivers/isdn/isdnloop/isdnloop.c | 31 +- drivers/isdn/mISDN/socket.c | 13 +- drivers/leds/leds-pwm.c | 23 +- drivers/leds/leds-wm831x-status.c | 4 +- drivers/lguest/core.c | 2 +- drivers/lguest/x86/core.c | 2 +- drivers/macintosh/windfarm_core.c | 2 +- drivers/macintosh/windfarm_rm31.c | 18 +- drivers/mailbox/Makefile | 4 - drivers/mailbox/mailbox.c | 465 --- drivers/mailbox/pl320-ipc.c | 2 +- drivers/md/Kconfig | 4 - drivers/md/Makefile | 1 - drivers/md/bcache/bcache.h | 8 +- drivers/md/bcache/bset.c | 63 +- drivers/md/bcache/btree.c | 29 +- drivers/md/bcache/closure.c | 6 +- drivers/md/bcache/io.c | 2 - drivers/md/bcache/journal.c | 42 +- drivers/md/bcache/request.c | 23 +- drivers/md/bcache/super.c | 31 +- drivers/md/bcache/sysfs.c | 8 +- drivers/md/bcache/util.c | 11 +- drivers/md/bcache/util.h | 12 +- drivers/md/bcache/writeback.c | 42 +- drivers/md/bitmap.c | 18 +- drivers/md/dm-bufio.c | 26 +- drivers/md/dm-builtin.c | 48 - drivers/md/dm-cache-metadata.c | 116 +- drivers/md/dm-cache-policy-cleaner.c | 2 +- drivers/md/dm-cache-target.c | 67 +- drivers/md/dm-crypt.c | 389 +- drivers/md/dm-delay.c | 23 +- drivers/md/dm-io.c | 28 +- drivers/md/dm-ioctl.c | 3 - drivers/md/dm-kcopyd.c | 3 +- drivers/md/dm-log-userspace-transfer.c | 2 +- drivers/md/dm-mpath.c | 44 +- drivers/md/dm-raid.c | 16 +- drivers/md/dm-raid1.c | 12 +- drivers/md/dm-snap-persistent.c | 20 +- drivers/md/dm-snap.c | 80 +- drivers/md/dm-sysfs.c | 5 +- drivers/md/dm-table.c | 23 +- drivers/md/dm-thin-metadata.c | 50 +- drivers/md/dm-thin-metadata.h | 4 - drivers/md/dm-thin.c | 56 +- drivers/md/dm-verity.c | 103 +- drivers/md/dm.c | 71 +- drivers/md/dm.h | 17 - drivers/md/md.c | 67 +- drivers/md/md.h | 3 - drivers/md/persistent-data/dm-array.c | 15 +- drivers/md/persistent-data/dm-block-manager.c | 15 +- drivers/md/persistent-data/dm-block-manager.h | 3 +- .../md/persistent-data/dm-btree-internal.h | 12 - drivers/md/persistent-data/dm-btree-remove.c | 18 +- drivers/md/persistent-data/dm-btree-spine.c | 39 +- drivers/md/persistent-data/dm-btree.c | 33 +- .../md/persistent-data/dm-space-map-common.c | 6 +- .../persistent-data/dm-space-map-metadata.c | 40 +- .../persistent-data/dm-transaction-manager.c | 5 +- .../persistent-data/dm-transaction-manager.h | 17 +- drivers/md/raid1.c | 111 +- drivers/md/raid10.c | 61 +- drivers/md/raid5.c | 159 +- drivers/md/raid5.h | 1 - drivers/media/common/siano/smsdvb-main.c | 3 +- drivers/media/dvb-core/dmxdev.c | 8 +- drivers/media/dvb-frontends/af9013.c | 18 +- drivers/media/dvb-frontends/af9033.c | 23 +- drivers/media/dvb-frontends/bcm3510.c | 15 +- drivers/media/dvb-frontends/cx24116.c | 8 +- drivers/media/dvb-frontends/cxd2820r_core.c | 25 +- drivers/media/dvb-frontends/dib8000.c | 42 +- drivers/media/dvb-frontends/ds3000.c | 7 - drivers/media/dvb-frontends/itd1000.c | 13 +- drivers/media/dvb-frontends/m88rs2000.c | 136 +- drivers/media/dvb-frontends/m88rs2000.h | 2 - drivers/media/dvb-frontends/mb86a20s.c | 16 +- drivers/media/dvb-frontends/mt312.c | 10 +- drivers/media/dvb-frontends/nxt200x.c | 11 +- drivers/media/dvb-frontends/rtl2830.c | 14 +- drivers/media/dvb-frontends/rtl2832.c | 14 +- drivers/media/dvb-frontends/s5h1420.c | 13 +- drivers/media/dvb-frontends/stb0899_drv.c | 12 +- drivers/media/dvb-frontends/stb6100.c | 11 +- drivers/media/dvb-frontends/stv0367.c | 13 +- drivers/media/dvb-frontends/stv090x.c | 12 +- drivers/media/dvb-frontends/stv6110.c | 12 +- drivers/media/dvb-frontends/stv6110x.c | 13 +- drivers/media/dvb-frontends/tda10071.c | 31 +- drivers/media/dvb-frontends/tda18271c2dd.c | 14 +- drivers/media/dvb-frontends/zl10039.c | 12 +- drivers/media/i2c/ov7670.c | 2 +- drivers/media/i2c/smiapp-pll.c | 4 +- drivers/media/i2c/smiapp/smiapp-core.c | 4 +- drivers/media/i2c/tda7432.c | 2 +- drivers/media/i2c/wm8775.c | 4 +- drivers/media/media-device.c | 3 +- drivers/media/pci/Kconfig | 4 +- drivers/media/pci/bt8xx/bttv-driver.c | 3 +- drivers/media/pci/cx18/cx18-driver.c | 24 +- drivers/media/pci/cx23885/cimax2.c | 13 +- drivers/media/pci/cx23885/cx23885-dvb.c | 4 - drivers/media/pci/ivtv/ivtv-alsa-pcm.c | 6 - drivers/media/pci/saa7134/saa7134-alsa.c | 2 - drivers/media/pci/saa7134/saa7134-cards.c | 4 +- drivers/media/pci/saa7164/saa7164-core.c | 4 +- drivers/media/pci/ttpci/av7110_hw.c | 19 +- drivers/media/platform/coda.c | 2 +- drivers/media/platform/exynos-gsc/gsc-core.c | 9 +- drivers/media/platform/exynos-gsc/gsc-core.h | 1 - drivers/media/platform/exynos-gsc/gsc-m2m.c | 1 - drivers/media/platform/exynos4-is/media-dev.c | 2 +- drivers/media/platform/omap3isp/isp.c | 2 - drivers/media/platform/omap3isp/isppreview.c | 9 - drivers/media/platform/s5p-g2d/g2d.c | 1 - drivers/media/platform/s5p-mfc/s5p_mfc.c | 28 +- .../media/platform/s5p-mfc/s5p_mfc_common.h | 11 +- drivers/media/platform/sh_vou.c | 2 +- drivers/media/rc/ir-lirc-codec.c | 12 +- drivers/media/rc/rc-main.c | 3 + drivers/media/tuners/e4000.c | 25 +- drivers/media/tuners/fc2580.c | 31 +- drivers/media/tuners/fc2580_priv.h | 1 - drivers/media/tuners/tda18212.c | 25 +- drivers/media/tuners/tda18218.c | 23 +- drivers/media/tuners/tuner-xc2028.c | 8 +- drivers/media/tuners/xc4000.c | 20 +- drivers/media/tuners/xc5000.c | 22 +- drivers/media/usb/Kconfig | 4 +- drivers/media/usb/au0828/au0828-video.c | 34 +- drivers/media/usb/dvb-usb-v2/af9015.c | 3 +- drivers/media/usb/dvb-usb-v2/af9035.c | 44 +- drivers/media/usb/dvb-usb-v2/anysee.c | 3 +- drivers/media/usb/dvb-usb-v2/lmedm04.c | 7 - drivers/media/usb/dvb-usb-v2/mxl111sf-tuner.h | 2 +- drivers/media/usb/dvb-usb-v2/mxl111sf.c | 10 +- drivers/media/usb/dvb-usb/af9005.c | 3 - drivers/media/usb/dvb-usb/cxusb.c | 54 +- drivers/media/usb/dvb-usb/dibusb-common.c | 10 +- drivers/media/usb/dvb-usb/dw2102.c | 122 +- drivers/media/usb/em28xx/em28xx-dvb.c | 3 +- drivers/media/usb/em28xx/em28xx-i2c.c | 2 +- drivers/media/usb/em28xx/em28xx-video.c | 10 +- drivers/media/usb/gspca/pac7302.c | 1 - drivers/media/usb/gspca/sn9c20x.c | 1 - drivers/media/usb/hdpvr/hdpvr-core.c | 11 +- drivers/media/usb/hdpvr/hdpvr-video.c | 6 +- drivers/media/usb/stk1160/stk1160-core.c | 10 +- drivers/media/usb/stk1160/stk1160-v4l.c | 17 +- drivers/media/usb/stk1160/stk1160.h | 1 + drivers/media/usb/ttusb-dec/ttusbdecfe.c | 3 - drivers/media/usb/uvc/uvc_driver.c | 6 +- drivers/media/usb/uvc/uvc_video.c | 35 +- drivers/media/v4l2-core/v4l2-common.c | 9 +- drivers/media/v4l2-core/v4l2-compat-ioctl32.c | 16 +- drivers/media/v4l2-core/videobuf2-core.c | 15 +- drivers/memstick/core/mspro_block.c | 3 +- drivers/message/fusion/mptspi.c | 5 - drivers/mfd/88pm860x-core.c | 6 - drivers/mfd/Kconfig | 10 +- drivers/mfd/Makefile | 1 - drivers/mfd/lpc_ich.c | 17 - drivers/mfd/max77686.c | 6 +- drivers/mfd/max77693.c | 12 +- drivers/mfd/max8925-i2c.c | 9 - drivers/mfd/max8997.c | 18 - drivers/mfd/max8998.c | 4 - drivers/mfd/omap-usb-host.c | 2 +- drivers/mfd/rtsx_pcr.c | 12 +- drivers/mfd/sec-core.c | 4 - drivers/mfd/sm501.c | 2 +- drivers/mfd/tc6393xb.c | 13 +- drivers/mfd/tps65910.c | 4 +- drivers/mfd/vexpress-config.c | 61 +- drivers/mfd/vexpress-spc.c | 633 --- drivers/mfd/vexpress-sysreg.c | 12 +- drivers/misc/Kconfig | 10 - drivers/misc/Makefile | 2 - drivers/misc/atmel_pwm.c | 6 +- drivers/misc/enclosure.c | 7 - drivers/misc/hpilo.c | 4 +- drivers/misc/mei/amthif.c | 1 - drivers/misc/mei/bus.c | 7 +- drivers/misc/mei/client.c | 17 +- drivers/misc/mei/client.h | 6 - drivers/misc/mei/hbm.c | 10 +- drivers/misc/mei/hw-me-regs.h | 11 +- drivers/misc/mei/hw-me.c | 52 +- drivers/misc/mei/init.c | 6 +- drivers/misc/mei/main.c | 11 +- drivers/misc/mei/mei_dev.h | 6 +- drivers/misc/mei/nfc.c | 21 +- drivers/misc/mei/pci-me.c | 35 +- drivers/misc/uid_cputime.c | 254 -- drivers/misc/uid_stat.c | 152 - drivers/mmc/card/Kconfig | 9 - drivers/mmc/card/block.c | 112 +- drivers/mmc/card/queue.c | 2 +- drivers/mmc/card/queue.h | 2 - drivers/mmc/core/Kconfig | 15 - drivers/mmc/core/core.c | 116 +- drivers/mmc/core/host.c | 10 +- drivers/mmc/core/sd.c | 83 +- drivers/mmc/core/sdio.c | 111 +- drivers/mmc/core/sdio_bus.c | 13 +- drivers/mmc/core/sdio_io.c | 33 - drivers/mmc/host/atmel-mci.c | 43 +- drivers/mmc/host/rtsx_pci_sdmmc.c | 10 - drivers/mmc/host/sdhci-esdhc.h | 2 +- drivers/mmc/host/sdhci-pxav3.c | 5 +- drivers/mmc/host/sdhci.c | 3 +- drivers/mmc/host/tmio_mmc_dma.c | 4 +- drivers/mtd/ftl.c | 1 + drivers/mtd/maps/dc21285.c | 4 +- drivers/mtd/mtd_blkdevs.c | 5 - drivers/mtd/nand/Kconfig | 12 +- drivers/mtd/nand/atmel_nand.c | 1 - drivers/mtd/nand/fsl_elbc_nand.c | 14 - drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 4 +- drivers/mtd/nand/mxc_nand.c | 1 + drivers/mtd/nand/nand_base.c | 23 +- drivers/mtd/nand/nuc900_nand.c | 2 +- drivers/mtd/nand/omap2.c | 4 +- drivers/mtd/sm_ftl.c | 11 +- drivers/mtd/ubi/attach.c | 2 +- drivers/mtd/ubi/cdev.c | 2 +- drivers/mtd/ubi/eba.c | 3 +- drivers/mtd/ubi/fastmap.c | 1 - drivers/mtd/ubi/io.c | 5 - drivers/mtd/ubi/misc.c | 2 - drivers/mtd/ubi/upd.c | 10 +- drivers/mtd/ubi/vtbl.c | 1 - drivers/mtd/ubi/wl.c | 16 +- drivers/net/Kconfig | 2 - drivers/net/arcnet/arcnet.c | 2 +- drivers/net/bonding/bond_3ad.c | 6 +- drivers/net/bonding/bond_3ad.h | 1 - drivers/net/bonding/bond_main.c | 43 +- drivers/net/bonding/bond_sysfs.c | 11 +- drivers/net/can/at91_can.c | 4 +- drivers/net/can/c_can/c_can.c | 27 +- drivers/net/can/dev.c | 43 +- drivers/net/can/flexcan.c | 28 +- drivers/net/can/janz-ican3.c | 18 +- drivers/net/can/sja1000/peak_pci.c | 14 +- drivers/net/can/sja1000/sja1000.c | 17 +- drivers/net/can/usb/esd_usb2.c | 1 - drivers/net/can/usb/kvaser_usb.c | 68 +- drivers/net/can/usb/peak_usb/pcan_usb.c | 2 +- drivers/net/can/usb/peak_usb/pcan_usb_core.c | 17 +- drivers/net/can/usb/peak_usb/pcan_usb_pro.c | 6 +- drivers/net/can/vcan.c | 9 +- drivers/net/dummy.c | 4 - drivers/net/ethernet/amd/pcnet32.c | 31 +- drivers/net/ethernet/atheros/alx/main.c | 29 +- drivers/net/ethernet/atheros/atl1c/atl1c.h | 3 - .../net/ethernet/atheros/atl1c/atl1c_main.c | 40 +- .../net/ethernet/atheros/atl1e/atl1e_main.c | 50 +- drivers/net/ethernet/broadcom/bgmac.c | 2 +- drivers/net/ethernet/broadcom/bgmac.h | 2 +- drivers/net/ethernet/broadcom/bnx2.c | 6 +- drivers/net/ethernet/broadcom/bnx2x/bnx2x.h | 1 - .../net/ethernet/broadcom/bnx2x/bnx2x_cmn.c | 26 +- .../net/ethernet/broadcom/bnx2x/bnx2x_sp.c | 3 + drivers/net/ethernet/broadcom/tg3.c | 127 +- drivers/net/ethernet/broadcom/tg3.h | 6 +- drivers/net/ethernet/cadence/macb.c | 2 +- drivers/net/ethernet/chelsio/cxgb3/sge.c | 3 +- drivers/net/ethernet/cisco/enic/enic_main.c | 12 +- drivers/net/ethernet/emulex/benet/be_cmds.c | 3 +- drivers/net/ethernet/emulex/benet/be_main.c | 20 +- drivers/net/ethernet/freescale/fec_main.c | 4 +- drivers/net/ethernet/ibm/ehea/ehea_main.c | 2 +- drivers/net/ethernet/ibm/ibmveth.c | 18 +- drivers/net/ethernet/intel/e100.c | 2 +- drivers/net/ethernet/intel/e1000/e1000_main.c | 10 +- drivers/net/ethernet/intel/e1000e/phy.c | 10 +- drivers/net/ethernet/intel/igb/e1000_phy.c | 5 +- drivers/net/ethernet/intel/igb/igb_main.c | 4 - drivers/net/ethernet/intel/ixgb/ixgb_main.c | 6 +- .../ethernet/intel/ixgbe/ixgbe_dcb_82598.c | 3 +- drivers/net/ethernet/marvell/mv643xx_eth.c | 6 +- drivers/net/ethernet/marvell/mvneta.c | 229 +- drivers/net/ethernet/mellanox/mlx4/cmd.c | 2 +- drivers/net/ethernet/mellanox/mlx4/en_cq.c | 1 + drivers/net/ethernet/mellanox/mlx4/en_main.c | 8 +- .../net/ethernet/mellanox/mlx4/en_netdev.c | 6 +- drivers/net/ethernet/mellanox/mlx4/en_tx.c | 61 +- drivers/net/ethernet/mellanox/mlx4/fw.c | 11 +- drivers/net/ethernet/mellanox/mlx4/main.c | 172 +- drivers/net/ethernet/mellanox/mlx4/mlx4.h | 1 - drivers/net/ethernet/mellanox/mlx4/mlx4_en.h | 1 + .../ethernet/mellanox/mlx4/resource_tracker.c | 2 +- .../net/ethernet/myricom/myri10ge/myri10ge.c | 88 +- .../ethernet/qlogic/netxen/netxen_nic_main.c | 5 +- drivers/net/ethernet/realtek/8139cp.c | 54 +- drivers/net/ethernet/realtek/8139too.c | 4 +- drivers/net/ethernet/realtek/r8169.c | 12 +- drivers/net/ethernet/sfc/filter.c | 6 +- drivers/net/ethernet/sfc/ptp.c | 7 - drivers/net/ethernet/sfc/rx.c | 27 +- drivers/net/ethernet/smsc/Kconfig | 2 +- drivers/net/ethernet/smsc/smc91x.c | 2 +- drivers/net/ethernet/smsc/smc91x.h | 28 +- drivers/net/ethernet/sun/sunvnet.c | 24 +- drivers/net/ethernet/tehuti/tehuti.c | 1 + drivers/net/ethernet/ti/cpsw.c | 26 - drivers/net/ethernet/ti/davinci_emac.c | 3 +- drivers/net/ethernet/via/via-rhine.c | 10 +- drivers/net/ethernet/xilinx/ll_temac_main.c | 8 +- .../net/ethernet/xilinx/xilinx_axienet_main.c | 2 +- drivers/net/hamradio/hdlcdrv.c | 2 - drivers/net/hamradio/yam.c | 1 - drivers/net/hyperv/netvsc_drv.c | 8 +- drivers/net/ieee802154/fakehard.c | 13 +- drivers/net/ifb.c | 8 +- drivers/net/macvlan.c | 15 +- drivers/net/macvtap.c | 99 +- drivers/net/phy/dp83640.c | 2 +- drivers/net/phy/phy.c | 39 +- drivers/net/ppp/Kconfig | 17 - drivers/net/ppp/Makefile | 2 - drivers/net/ppp/ppp_deflate.c | 2 +- drivers/net/ppp/ppp_generic.c | 2 +- drivers/net/ppp/pppoe.c | 5 +- drivers/net/ppp/pppolac.c | 449 -- drivers/net/ppp/pppopns.c | 428 -- drivers/net/ppp/pptp.c | 6 +- drivers/net/team/team.c | 21 +- drivers/net/tun.c | 100 +- drivers/net/usb/asix_devices.c | 19 +- drivers/net/usb/ax88179_178a.c | 20 +- drivers/net/usb/cdc_ether.c | 5 - drivers/net/usb/cdc_mbim.c | 43 +- drivers/net/usb/cx82310_eth.c | 11 +- drivers/net/usb/dm9601.c | 36 +- drivers/net/usb/gl620a.c | 4 - drivers/net/usb/mcs7830.c | 5 +- drivers/net/usb/net1080.c | 4 - drivers/net/usb/plusb.c | 5 - drivers/net/usb/qmi_wwan.c | 186 +- drivers/net/usb/rndis_host.c | 4 - drivers/net/usb/smsc75xx.c | 16 +- drivers/net/usb/smsc95xx.c | 4 - drivers/net/usb/usbnet.c | 66 +- drivers/net/virtio_net.c | 143 +- drivers/net/vmxnet3/vmxnet3_drv.c | 19 +- drivers/net/vxlan.c | 9 +- drivers/net/wan/farsync.c | 1 - drivers/net/wan/wanxl.c | 1 - drivers/net/wireless/Kconfig | 5 - drivers/net/wireless/ath/ar5523/ar5523.c | 2 +- drivers/net/wireless/ath/ath5k/qcu.c | 8 +- drivers/net/wireless/ath/ath5k/reset.c | 2 +- drivers/net/wireless/ath/ath9k/ar9002_mac.c | 52 +- .../net/wireless/ath/ath9k/ar9003_eeprom.c | 30 +- drivers/net/wireless/ath/ath9k/ar9003_phy.c | 4 - drivers/net/wireless/ath/ath9k/ar9003_phy.h | 2 - .../wireless/ath/ath9k/ar9462_2p0_initvals.h | 4 +- drivers/net/wireless/ath/ath9k/ath9k.h | 5 +- drivers/net/wireless/ath/ath9k/calib.c | 1 + drivers/net/wireless/ath/ath9k/hif_usb.c | 4 +- drivers/net/wireless/ath/ath9k/htc_drv_init.c | 1 - drivers/net/wireless/ath/ath9k/htc_drv_main.c | 50 +- drivers/net/wireless/ath/ath9k/htc_drv_txrx.c | 10 - drivers/net/wireless/ath/ath9k/hw.c | 3 +- drivers/net/wireless/ath/ath9k/hw.h | 4 +- drivers/net/wireless/ath/ath9k/init.c | 3 +- drivers/net/wireless/ath/ath9k/mac.c | 9 +- drivers/net/wireless/ath/ath9k/main.c | 50 +- drivers/net/wireless/ath/ath9k/recv.c | 17 +- drivers/net/wireless/ath/ath9k/xmit.c | 9 +- drivers/net/wireless/ath/carl9170/carl9170.h | 1 - drivers/net/wireless/ath/carl9170/main.c | 3 +- drivers/net/wireless/ath/carl9170/usb.c | 31 +- drivers/net/wireless/ath/wil6210/debugfs.c | 4 +- drivers/net/wireless/b43/Kconfig | 4 +- drivers/net/wireless/b43/b43.h | 4 +- drivers/net/wireless/b43/main.c | 27 +- drivers/net/wireless/b43/phy_n.c | 14 +- drivers/net/wireless/b43/xmit.c | 14 +- drivers/net/wireless/b43legacy/main.c | 1 - .../brcm80211/brcmfmac/bcmsdh_sdmmc.c | 28 +- .../net/wireless/brcm80211/brcmfmac/dhd_bus.h | 3 +- .../wireless/brcm80211/brcmfmac/dhd_linux.c | 14 +- drivers/net/wireless/brcm80211/brcmfmac/usb.c | 2 +- drivers/net/wireless/brcm80211/brcmsmac/dma.c | 15 +- .../wireless/brcm80211/brcmsmac/mac80211_if.c | 14 +- drivers/net/wireless/hostap/hostap_ioctl.c | 4 +- drivers/net/wireless/iwlegacy/3945.c | 31 +- drivers/net/wireless/iwlegacy/4965-mac.c | 36 +- drivers/net/wireless/iwlegacy/common.c | 1 - drivers/net/wireless/iwlwifi/dvm/dev.h | 1 + drivers/net/wireless/iwlwifi/dvm/mac80211.c | 27 +- drivers/net/wireless/iwlwifi/dvm/main.c | 10 +- drivers/net/wireless/iwlwifi/dvm/sta.c | 1 - drivers/net/wireless/iwlwifi/dvm/tx.c | 28 +- drivers/net/wireless/iwlwifi/dvm/ucode.c | 5 + drivers/net/wireless/iwlwifi/iwl-6000.c | 6 - drivers/net/wireless/iwlwifi/iwl-7000.c | 60 +- drivers/net/wireless/iwlwifi/iwl-config.h | 10 +- drivers/net/wireless/iwlwifi/iwl-csr.h | 5 +- drivers/net/wireless/iwlwifi/iwl-drv.c | 2 +- drivers/net/wireless/iwlwifi/iwl-modparams.h | 11 +- drivers/net/wireless/iwlwifi/iwl-nvm-parse.c | 5 - drivers/net/wireless/iwlwifi/iwl-prph.h | 4 - drivers/net/wireless/iwlwifi/iwl-trans.h | 8 +- drivers/net/wireless/iwlwifi/mvm/bt-coex.c | 7 +- drivers/net/wireless/iwlwifi/mvm/debugfs.c | 4 - drivers/net/wireless/iwlwifi/mvm/fw-api-d3.h | 4 +- drivers/net/wireless/iwlwifi/mvm/fw-api-mac.h | 8 +- .../net/wireless/iwlwifi/mvm/fw-api-power.h | 35 +- .../net/wireless/iwlwifi/mvm/fw-api-scan.h | 1 + drivers/net/wireless/iwlwifi/mvm/fw-api.h | 1 - drivers/net/wireless/iwlwifi/mvm/fw.c | 9 - drivers/net/wireless/iwlwifi/mvm/mac-ctxt.c | 11 +- drivers/net/wireless/iwlwifi/mvm/mac80211.c | 47 +- drivers/net/wireless/iwlwifi/mvm/mvm.h | 1 - drivers/net/wireless/iwlwifi/mvm/ops.c | 2 - drivers/net/wireless/iwlwifi/mvm/scan.c | 18 +- drivers/net/wireless/iwlwifi/mvm/sta.c | 30 +- drivers/net/wireless/iwlwifi/mvm/tx.c | 29 +- drivers/net/wireless/iwlwifi/mvm/utils.c | 2 - drivers/net/wireless/iwlwifi/pcie/drv.c | 94 +- drivers/net/wireless/iwlwifi/pcie/rx.c | 4 - drivers/net/wireless/iwlwifi/pcie/trans.c | 72 +- drivers/net/wireless/iwlwifi/pcie/tx.c | 20 +- drivers/net/wireless/libertas/debugfs.c | 6 +- drivers/net/wireless/mwifiex/11ac.c | 3 +- drivers/net/wireless/mwifiex/11n.c | 3 +- drivers/net/wireless/mwifiex/11n_aggr.c | 3 +- drivers/net/wireless/mwifiex/11n_aggr.h | 2 +- drivers/net/wireless/mwifiex/cfg80211.c | 4 +- drivers/net/wireless/mwifiex/cfp.c | 3 +- drivers/net/wireless/mwifiex/cmdevt.c | 5 +- drivers/net/wireless/mwifiex/fw.h | 2 +- drivers/net/wireless/mwifiex/join.c | 6 +- drivers/net/wireless/mwifiex/main.c | 26 +- drivers/net/wireless/mwifiex/pcie.c | 34 +- drivers/net/wireless/mwifiex/scan.c | 12 +- drivers/net/wireless/mwifiex/sdio.c | 7 +- drivers/net/wireless/mwifiex/sta_ioctl.c | 22 +- drivers/net/wireless/mwifiex/uap_txrx.c | 29 +- drivers/net/wireless/mwifiex/usb.c | 15 + drivers/net/wireless/mwifiex/wmm.c | 6 +- drivers/net/wireless/p54/p54usb.c | 1 - drivers/net/wireless/p54/txrx.c | 2 +- drivers/net/wireless/prism54/islpci_dev.c | 7 +- drivers/net/wireless/rt2x00/rt2400pci.c | 2 +- drivers/net/wireless/rt2x00/rt2500pci.c | 7 +- drivers/net/wireless/rt2x00/rt2800.h | 2 +- drivers/net/wireless/rt2x00/rt2800lib.c | 42 +- drivers/net/wireless/rt2x00/rt2800usb.c | 14 +- drivers/net/wireless/rt2x00/rt2x00.h | 1 - drivers/net/wireless/rt2x00/rt2x00dev.c | 27 +- drivers/net/wireless/rt2x00/rt2x00lib.h | 2 +- drivers/net/wireless/rt2x00/rt2x00mac.c | 31 +- drivers/net/wireless/rt2x00/rt2x00queue.c | 72 +- drivers/net/wireless/rt2x00/rt61pci.c | 3 +- drivers/net/wireless/rt2x00/rt73usb.c | 3 +- .../net/wireless/rtl818x/rtl8187/rtl8187.h | 10 +- drivers/net/wireless/rtlwifi/base.c | 96 +- drivers/net/wireless/rtlwifi/core.c | 11 - drivers/net/wireless/rtlwifi/pci.c | 17 +- drivers/net/wireless/rtlwifi/ps.c | 14 +- drivers/net/wireless/rtlwifi/ps.h | 1 - drivers/net/wireless/rtlwifi/rtl8188ee/dm.c | 2 +- drivers/net/wireless/rtlwifi/rtl8188ee/hw.c | 21 +- drivers/net/wireless/rtlwifi/rtl8188ee/trx.c | 2 +- .../net/wireless/rtlwifi/rtl8192c/dm_common.c | 36 - .../net/wireless/rtlwifi/rtl8192c/dm_common.h | 14 - drivers/net/wireless/rtlwifi/rtl8192ce/hw.c | 18 +- drivers/net/wireless/rtlwifi/rtl8192cu/dm.c | 9 - drivers/net/wireless/rtlwifi/rtl8192cu/dm.h | 3 - drivers/net/wireless/rtlwifi/rtl8192cu/hw.c | 17 +- drivers/net/wireless/rtlwifi/rtl8192cu/mac.c | 6 +- drivers/net/wireless/rtlwifi/rtl8192cu/rf.c | 31 +- drivers/net/wireless/rtlwifi/rtl8192cu/sw.c | 22 +- drivers/net/wireless/rtlwifi/rtl8192cu/trx.c | 11 +- drivers/net/wireless/rtlwifi/rtl8192de/trx.c | 2 +- drivers/net/wireless/rtlwifi/rtl8192se/hw.c | 27 +- drivers/net/wireless/rtlwifi/rtl8192se/rf.c | 2 +- drivers/net/wireless/rtlwifi/rtl8192se/trx.c | 8 +- drivers/net/wireless/rtlwifi/rtl8723ae/hw.c | 18 +- drivers/net/wireless/rtlwifi/rtl8723ae/sw.c | 6 +- drivers/net/wireless/rtlwifi/stats.c | 14 - drivers/net/wireless/rtlwifi/usb.c | 8 +- drivers/net/wireless/rtlwifi/wifi.h | 41 +- drivers/net/wireless/ti/wl18xx/debugfs.c | 2 +- drivers/net/wireless/ti/wlcore/debugfs.h | 4 +- drivers/net/wireless/zd1201.c | 4 +- drivers/net/xen-netback/common.h | 2 - drivers/net/xen-netback/interface.c | 23 +- drivers/net/xen-netback/netback.c | 108 +- drivers/net/xen-netback/xenbus.c | 189 +- drivers/net/xen-netfront.c | 124 +- drivers/nfc/microread/microread.c | 16 +- drivers/ntb/ntb_hw.c | 41 +- drivers/ntb/ntb_hw.h | 16 - drivers/ntb/ntb_regs.h | 4 +- drivers/ntb/ntb_transport.c | 17 +- drivers/of/Kconfig | 31 +- drivers/of/Makefile | 7 +- drivers/of/address.c | 48 +- drivers/of/base.c | 1086 ++--- drivers/of/device.c | 4 +- drivers/of/dynamic.c | 791 ---- drivers/of/fdt.c | 548 +-- drivers/of/irq.c | 16 +- drivers/of/of_private.h | 59 +- drivers/of/of_reserved_mem.c | 217 - drivers/of/overlay.c | 552 --- drivers/of/pdt.c | 3 +- drivers/of/platform.c | 129 +- drivers/of/resolver.c | 412 -- drivers/of/selftest.c | 155 +- drivers/of/testcase-data/testcases.dtsi | 14 - drivers/parisc/iosapic.c | 38 +- drivers/parisc/lba_pci.c | 56 - drivers/parport/Kconfig | 4 +- drivers/parport/parport_pc.c | 10 +- drivers/pci/access.c | 19 +- drivers/pci/hotplug/pciehp_pci.c | 9 +- drivers/pci/hotplug/shpchp_ctrl.c | 4 +- drivers/pci/iov.c | 5 +- drivers/pci/msi.c | 26 - drivers/pci/pci-acpi.c | 21 +- drivers/pci/pci-driver.c | 14 +- drivers/pci/pci-sysfs.c | 2 +- drivers/pci/pci.c | 15 +- drivers/pci/pcie/portdrv_pci.c | 1 + drivers/pci/probe.c | 17 +- drivers/pci/quirks.c | 32 +- drivers/pci/rom.c | 7 +- drivers/pci/setup-bus.c | 69 +- drivers/pci/xen-pcifront.c | 7 +- drivers/pcmcia/at91_cf.c | 4 +- drivers/pcmcia/topic.h | 16 - drivers/pinctrl/Makefile | 2 +- drivers/pinctrl/core.c | 17 +- drivers/pinctrl/core.h | 2 +- drivers/pinctrl/devicetree.c | 2 +- drivers/pinctrl/mvebu/pinctrl-armada-370.c | 4 +- drivers/pinctrl/mvebu/pinctrl-armada-xp.c | 37 +- drivers/pinctrl/mvebu/pinctrl-dove.c | 2 +- drivers/pinctrl/pinconf-generic.c | 204 +- drivers/pinctrl/pinconf.c | 233 +- drivers/pinctrl/pinconf.h | 6 - drivers/pinctrl/pinctrl-at91.c | 4 +- drivers/pinctrl/pinctrl-sunxi.c | 13 +- drivers/pinctrl/pinctrl-utils.c | 141 - drivers/pinctrl/pinctrl-utils.h | 43 - drivers/pinctrl/vt8500/pinctrl-wmt.c | 15 +- drivers/platform/olpc/olpc-ec.c | 2 +- drivers/platform/x86/acer-wmi.c | 11 - drivers/platform/x86/dell-wmi.c | 12 +- drivers/platform/x86/hp_accel.c | 2 - drivers/pnp/pnpacpi/rsparser.c | 15 +- drivers/power/88pm860x_charger.c | 1 - drivers/power/charger-manager.c | 2 +- drivers/power/lp8788-charger.c | 4 +- drivers/power/max17040_battery.c | 5 +- drivers/power/power_supply_core.c | 31 +- drivers/power/power_supply_sysfs.c | 11 +- drivers/power/reset/Kconfig | 3 +- drivers/rapidio/devices/tsi721.h | 1 - drivers/rapidio/devices/tsi721_dma.c | 35 +- drivers/rapidio/switches/idt_gen2.c | 2 - drivers/regulator/arizona-ldo1.c | 2 + drivers/regulator/core.c | 91 +- drivers/rtc/rtc-at91rm9200.c | 18 +- drivers/rtc/rtc-cmos.c | 52 +- drivers/rtc/rtc-max77686.c | 4 +- drivers/rtc/rtc-max8907.c | 11 +- drivers/rtc/rtc-rv3029c2.c | 2 +- drivers/s390/block/dasd.c | 8 +- drivers/s390/char/con3215.c | 54 +- drivers/s390/char/con3270.c | 6 +- drivers/s390/char/raw3270.c | 10 +- drivers/s390/char/raw3270.h | 2 +- drivers/s390/char/tty3270.c | 2 +- drivers/s390/cio/chsc.c | 22 +- drivers/s390/cio/device.c | 3 +- drivers/s390/crypto/ap_bus.c | 1 - drivers/s390/net/qeth_core_main.c | 6 +- drivers/s390/scsi/zfcp_aux.c | 5 +- drivers/s390/scsi/zfcp_erp.c | 29 +- drivers/s390/scsi/zfcp_fsf.c | 27 +- drivers/s390/scsi/zfcp_qdio.c | 8 +- drivers/s390/scsi/zfcp_scsi.c | 10 +- drivers/sbus/char/bbc_envctrl.c | 6 - drivers/sbus/char/bbc_i2c.c | 11 +- drivers/scsi/3w-9xxx.c | 80 +- drivers/scsi/3w-9xxx.h | 5 + drivers/scsi/3w-sas.c | 53 +- drivers/scsi/3w-sas.h | 4 + drivers/scsi/3w-xxxx.c | 45 +- drivers/scsi/3w-xxxx.h | 5 + drivers/scsi/Kconfig | 1 + drivers/scsi/aacraid/commctrl.c | 3 +- drivers/scsi/aacraid/linit.c | 3 - drivers/scsi/aacraid/src.c | 3 - drivers/scsi/arcmsr/arcmsr_hba.c | 8 +- drivers/scsi/be2iscsi/be_main.c | 3 +- drivers/scsi/be2iscsi/be_mgmt.c | 13 +- drivers/scsi/bfa/bfa_fcs.h | 1 - drivers/scsi/bfa/bfa_fcs_lport.c | 14 +- drivers/scsi/bfa/bfa_ioc.h | 2 +- drivers/scsi/bfa/bfad.c | 6 +- drivers/scsi/bfa/bfad_attr.c | 7 +- drivers/scsi/bnx2fc/bnx2fc_fcoe.c | 7 - drivers/scsi/esp_scsi.c | 14 +- drivers/scsi/esp_scsi.h | 1 - drivers/scsi/gdth.c | 1 - drivers/scsi/hosts.c | 1 - drivers/scsi/hpsa.c | 53 +- drivers/scsi/ibmvscsi/ibmvscsi.c | 13 +- drivers/scsi/ipr.c | 123 +- drivers/scsi/ipr.h | 4 +- drivers/scsi/ips.c | 1 - drivers/scsi/isci/host.h | 5 +- drivers/scsi/isci/port_config.c | 7 + drivers/scsi/isci/task.c | 11 +- drivers/scsi/libfc/fc_fcp.c | 19 +- drivers/scsi/libiscsi.c | 10 - drivers/scsi/libsas/sas_ata.c | 2 +- drivers/scsi/libsas/sas_discover.c | 6 +- drivers/scsi/lpfc/lpfc_sli.c | 21 - drivers/scsi/megaraid.c | 1 - drivers/scsi/megaraid/megaraid_mbox.c | 1 - drivers/scsi/megaraid/megaraid_mm.c | 2 - drivers/scsi/megaraid/megaraid_sas.h | 1 + drivers/scsi/megaraid/megaraid_sas_base.c | 38 +- drivers/scsi/mpt2sas/mpt2sas_base.c | 13 +- drivers/scsi/mpt2sas/mpt2sas_base.h | 3 - drivers/scsi/mpt2sas/mpt2sas_scsih.c | 15 +- drivers/scsi/mpt3sas/Makefile | 2 +- drivers/scsi/mpt3sas/mpt3sas_scsih.c | 30 +- drivers/scsi/mvsas/mv_sas.c | 5 +- drivers/scsi/nsp32.c | 2 +- drivers/scsi/osd/osd_uld.c | 2 +- drivers/scsi/pm8001/pm8001_hwi.c | 4 +- drivers/scsi/pm8001/pm80xx_hwi.c | 4 +- drivers/scsi/pmcraid.c | 1 - drivers/scsi/qla2xxx/qla_def.h | 3 +- drivers/scsi/qla2xxx/qla_iocb.c | 11 +- drivers/scsi/qla2xxx/qla_isr.c | 17 +- drivers/scsi/qla2xxx/qla_os.c | 6 +- drivers/scsi/qla2xxx/qla_target.c | 7 +- drivers/scsi/qla2xxx/tcm_qla2xxx.c | 13 +- drivers/scsi/scsi.c | 11 +- drivers/scsi/scsi_error.c | 15 +- drivers/scsi/scsi_lib.c | 12 +- drivers/scsi/scsi_netlink.c | 2 +- drivers/scsi/scsi_scan.c | 112 +- drivers/scsi/scsi_sysfs.c | 20 +- drivers/scsi/sd.c | 92 +- drivers/scsi/sd.h | 1 - drivers/scsi/sg.c | 9 +- drivers/scsi/st.c | 2 +- drivers/scsi/storvsc_drv.c | 45 +- drivers/scsi/sym53c8xx_2/sym_hipd.c | 4 - drivers/scsi/virtio_scsi.c | 47 +- drivers/spi/spi-ath79.c | 4 +- drivers/spi/spi-bcm63xx.c | 2 + drivers/spi/spi-davinci.c | 2 +- drivers/spi/spi-dw-mid.c | 11 +- drivers/spi/spi-dw.c | 6 +- drivers/spi/spi-omap2-mcspi.c | 14 - drivers/spi/spi-orion.c | 10 +- drivers/spi/spi-pl022.c | 4 +- drivers/spi/spi-pxa2xx.c | 13 +- drivers/spi/spi.c | 3 +- drivers/spi/spidev.c | 5 +- drivers/staging/Kconfig | 4 + drivers/staging/Makefile | 2 + drivers/staging/android/Kconfig | 46 +- drivers/staging/android/Makefile | 6 +- drivers/staging/android/TODO | 10 + drivers/staging/android/alarm-dev.c | 1 - drivers/staging/android/android_alarm.h | 44 +- drivers/staging/android/ashmem.c | 71 +- drivers/staging/android/ashmem.h | 30 +- drivers/staging/android/fiq_debugger/Kconfig | 49 - drivers/staging/android/fiq_debugger/Makefile | 4 - .../android/fiq_debugger/fiq_debugger.c | 1213 ------ .../android/fiq_debugger/fiq_debugger.h | 64 - .../android/fiq_debugger/fiq_debugger_arm.c | 240 -- .../android/fiq_debugger/fiq_debugger_arm64.c | 202 - .../android/fiq_debugger/fiq_debugger_priv.h | 37 - .../fiq_debugger/fiq_debugger_ringbuf.h | 94 - .../android/fiq_debugger/fiq_watchdog.c | 56 - .../android/fiq_debugger/fiq_watchdog.h | 20 - drivers/staging/android/ion/Kconfig | 42 - drivers/staging/android/ion/Makefile | 10 - drivers/staging/android/ion/compat_ion.c | 195 - drivers/staging/android/ion/compat_ion.h | 30 - drivers/staging/android/ion/ion.c | 1644 -------- drivers/staging/android/ion/ion.h | 204 - .../staging/android/ion/ion_carveout_heap.c | 194 - drivers/staging/android/ion/ion_chunk_heap.c | 195 - drivers/staging/android/ion/ion_cma_heap.c | 218 - .../staging/android/ion/ion_dummy_driver.c | 158 - drivers/staging/android/ion/ion_heap.c | 371 -- drivers/staging/android/ion/ion_page_pool.c | 198 - drivers/staging/android/ion/ion_priv.h | 439 -- drivers/staging/android/ion/ion_system_heap.c | 453 -- drivers/staging/android/ion/ion_test.c | 282 -- drivers/staging/android/ion/tegra/Makefile | 1 - drivers/staging/android/ion/tegra/tegra_ion.c | 84 - drivers/staging/android/logger.c | 3 - drivers/staging/android/lowmemorykiller.c | 116 +- drivers/staging/android/sw_sync.c | 2 - drivers/staging/android/sw_sync.h | 37 +- drivers/staging/android/sync.c | 22 +- drivers/staging/android/sync.h | 86 +- drivers/staging/android/timed_gpio.c | 1 - .../staging/android/trace/lowmemorykiller.h | 41 - drivers/staging/android/uapi/ashmem.h | 48 - drivers/staging/android/uapi/ion.h | 196 - drivers/staging/android/uapi/ion_test.h | 70 - drivers/staging/android/uapi/sw_sync.h | 32 - drivers/staging/android/uapi/sync.h | 97 - drivers/staging/bcm/Bcmchar.c | 1 - drivers/staging/comedi/comedi_compat32.c | 12 +- drivers/staging/comedi/comedi_fops.c | 32 +- drivers/staging/comedi/drivers.c | 2 +- drivers/staging/comedi/drivers/8255_pci.c | 49 +- .../staging/comedi/drivers/addi_apci_1032.c | 4 +- drivers/staging/comedi/drivers/adl_pci7x3x.c | 15 +- drivers/staging/comedi/drivers/adl_pci9111.c | 2 +- drivers/staging/comedi/drivers/adv_pci1710.c | 17 +- drivers/staging/comedi/drivers/amplc_pc263.c | 3 - drivers/staging/comedi/drivers/amplc_pci263.c | 3 - drivers/staging/comedi/drivers/cb_pcidas64.c | 122 +- drivers/staging/comedi/drivers/dt282x.c | 3 +- drivers/staging/comedi/drivers/ni_65xx.c | 25 +- drivers/staging/comedi/drivers/ni_daq_700.c | 2 - drivers/staging/comedi/drivers/pcmuio.c | 11 +- drivers/staging/comedi/drivers/ssv_dnp.c | 6 +- drivers/staging/iio/adc/ad799x_core.c | 3 +- drivers/staging/iio/adc/mxs-lradc.c | 18 +- .../staging/iio/impedance-analyzer/ad5933.c | 15 +- drivers/staging/iio/light/tsl2x7x_core.c | 8 +- drivers/staging/iio/meter/ade7758.h | 1 + drivers/staging/iio/meter/ade7758_core.c | 57 +- drivers/staging/iio/meter/ade7758_ring.c | 5 +- drivers/staging/iio/meter/ade7758_trigger.c | 2 +- drivers/staging/imx-drm/imx-drm-core.c | 1 - drivers/staging/line6/pcm.c | 5 +- drivers/staging/media/lirc/lirc_zilog.c | 12 +- drivers/staging/ozwpan/ozcdev.c | 3 - drivers/staging/ozwpan/ozusbsvc1.c | 19 +- drivers/staging/panel/panel.c | 13 +- .../staging/rtl8187se/ieee80211/ieee80211.h | 4 +- drivers/staging/rtl8192e/rtllib.h | 5 +- drivers/staging/rtl8192e/rtllib_softmac.c | 2 +- .../staging/rtl8192u/ieee80211/ieee80211.h | 10 +- drivers/staging/rtl8712/ieee80211.h | 4 +- drivers/staging/rtl8712/rtl8712_recv.c | 3 +- drivers/staging/rtl8712/rtl871x_recv.c | 13 +- drivers/staging/rtl8712/usb_intf.c | 5 - drivers/staging/sb105x/sb_pci_mp.c | 2 +- drivers/staging/serqt_usb2/serqt_usb2.c | 2 +- drivers/staging/speakup/fakekey.c | 1 - drivers/staging/speakup/main.c | 1 - drivers/staging/speakup/selection.c | 48 +- drivers/staging/speakup/speakup.h | 1 - drivers/staging/tidspbridge/Kconfig | 2 +- drivers/staging/tidspbridge/core/dsp-clock.c | 4 +- drivers/staging/vt6655/bssdb.c | 2 +- drivers/staging/vt6655/device_main.c | 7 +- drivers/staging/vt6655/rf.c | 1 - drivers/staging/vt6656/baseband.c | 14 +- drivers/staging/vt6656/card.c | 2 +- drivers/staging/vt6656/iwctl.c | 3 - drivers/staging/vt6656/main_usb.c | 3 +- drivers/staging/vt6656/rndis.h | 2 - drivers/staging/wlags49_h2/wl_internal.h | 4 +- drivers/staging/wlags49_h2/wl_priv.c | 9 +- drivers/staging/zcache/zcache-main.c | 6 +- drivers/switch/Kconfig | 15 - drivers/switch/Makefile | 4 - drivers/switch/switch_class.c | 174 - drivers/switch/switch_gpio.c | 172 - drivers/target/iscsi/iscsi_target.c | 556 ++- drivers/target/iscsi/iscsi_target.h | 2 +- drivers/target/iscsi/iscsi_target_auth.c | 15 +- drivers/target/iscsi/iscsi_target_configfs.c | 7 +- drivers/target/iscsi/iscsi_target_core.h | 13 +- drivers/target/iscsi/iscsi_target_device.c | 6 +- drivers/target/iscsi/iscsi_target_erl0.c | 21 +- drivers/target/iscsi/iscsi_target_erl1.c | 26 +- drivers/target/iscsi/iscsi_target_erl2.c | 16 +- drivers/target/iscsi/iscsi_target_login.c | 154 +- drivers/target/iscsi/iscsi_target_login.h | 1 - drivers/target/iscsi/iscsi_target_nego.c | 36 +- .../target/iscsi/iscsi_target_parameters.c | 2 +- drivers/target/iscsi/iscsi_target_tpg.c | 11 +- drivers/target/iscsi/iscsi_target_tq.c | 28 +- drivers/target/iscsi/iscsi_target_util.c | 59 +- drivers/target/iscsi/iscsi_target_util.h | 3 +- drivers/target/loopback/tcm_loop.c | 29 +- drivers/target/loopback/tcm_loop.h | 7 +- drivers/target/target_core_alua.c | 11 +- drivers/target/target_core_configfs.c | 5 - drivers/target/target_core_device.c | 25 +- drivers/target/target_core_file.c | 19 +- drivers/target/target_core_file.h | 5 +- drivers/target/target_core_iblock.c | 2 +- drivers/target/target_core_pr.c | 51 +- drivers/target/target_core_pr.h | 2 +- drivers/target/target_core_pscsi.c | 13 +- drivers/target/target_core_pscsi.h | 1 - drivers/target/target_core_rd.c | 2 +- drivers/target/target_core_sbc.c | 22 +- drivers/target/target_core_spc.c | 23 +- drivers/target/target_core_tpg.c | 8 - drivers/target/target_core_transport.c | 38 +- drivers/target/tcm_fc/tfc_io.c | 3 +- drivers/target/tcm_fc/tfc_sess.c | 1 - drivers/thermal/Kconfig | 23 - drivers/thermal/Makefile | 4 - drivers/thermal/cpu_cooling.c | 81 +- drivers/thermal/of-thermal.c | 850 ---- drivers/thermal/step_wise.c | 6 - drivers/thermal/thermal_core.c | 384 +- drivers/thermal/thermal_core.h | 9 - drivers/thermal/thermal_hwmon.c | 269 -- drivers/thermal/thermal_hwmon.h | 49 - drivers/tty/hvc/hvc_console.c | 8 +- drivers/tty/hvc/hvc_xen.c | 19 +- drivers/tty/hvc/hvsi_lib.c | 4 +- drivers/tty/n_gsm.c | 11 - drivers/tty/n_tty.c | 4 - drivers/tty/pty.c | 3 - drivers/tty/serial/8250/8250_core.c | 8 +- drivers/tty/serial/8250/8250_dma.c | 26 +- drivers/tty/serial/8250/8250_dw.c | 82 +- drivers/tty/serial/8250/8250_early.c | 138 +- drivers/tty/serial/8250/8250_gsc.c | 3 +- drivers/tty/serial/8250/8250_pci.c | 14 +- drivers/tty/serial/8250/8250_pnp.c | 5 - drivers/tty/serial/8250/Kconfig | 1 - drivers/tty/serial/Kconfig | 7 - drivers/tty/serial/Makefile | 2 - drivers/tty/serial/altera_uart.c | 2 - drivers/tty/serial/amba-pl011.c | 6 - drivers/tty/serial/arc_uart.c | 2 +- drivers/tty/serial/atmel_serial.c | 20 +- drivers/tty/serial/earlycon.c | 152 - drivers/tty/serial/mxs-auart.c | 38 +- drivers/tty/serial/of_serial.c | 1 + drivers/tty/serial/pch_uart.c | 10 +- drivers/tty/serial/pmac_zilog.c | 3 - drivers/tty/serial/samsung.c | 9 +- drivers/tty/serial/serial-tegra.c | 4 +- drivers/tty/serial/serial_core.c | 8 +- drivers/tty/serial/sunsab.c | 9 - drivers/tty/serial/vt8500_serial.c | 5 +- drivers/tty/tty_io.c | 39 +- drivers/tty/tty_ioctl.c | 15 +- drivers/tty/tty_port.c | 5 +- drivers/tty/vt/vt.c | 6 +- drivers/uio/uio.c | 41 +- drivers/usb/Kconfig | 69 +- drivers/usb/chipidea/udc.c | 4 +- drivers/usb/class/cdc-acm.c | 142 +- drivers/usb/class/cdc-acm.h | 2 +- drivers/usb/class/cdc-wdm.c | 33 +- drivers/usb/core/buffer.c | 26 +- drivers/usb/core/config.c | 19 +- drivers/usb/core/devio.c | 83 +- drivers/usb/core/driver.c | 103 +- drivers/usb/core/hcd-pci.c | 2 +- drivers/usb/core/hcd.c | 18 +- drivers/usb/core/hub.c | 294 +- drivers/usb/core/hub.h | 3 - drivers/usb/core/port.c | 13 +- drivers/usb/core/quirks.c | 36 - drivers/usb/core/usb.c | 1 - drivers/usb/core/usb.h | 2 +- drivers/usb/dwc3/core.c | 15 +- drivers/usb/dwc3/core.h | 10 +- drivers/usb/dwc3/dwc3-omap.c | 2 +- drivers/usb/dwc3/dwc3-pci.c | 4 - drivers/usb/dwc3/ep0.c | 22 +- drivers/usb/dwc3/gadget.c | 76 +- drivers/usb/dwc3/gadget.h | 2 +- drivers/usb/gadget/Kconfig | 21 - drivers/usb/gadget/Makefile | 2 - drivers/usb/gadget/android.c | 1587 ------- drivers/usb/gadget/at91_udc.c | 10 + drivers/usb/gadget/bcm63xx_udc.c | 58 +- drivers/usb/gadget/composite.c | 13 +- drivers/usb/gadget/configfs.c | 1 - drivers/usb/gadget/dummy_hcd.c | 7 +- drivers/usb/gadget/f_accessory.c | 1215 ------ drivers/usb/gadget/f_acm.c | 8 +- drivers/usb/gadget/f_audio_source.c | 834 ---- drivers/usb/gadget/f_fs.c | 79 +- drivers/usb/gadget/f_mass_storage.c | 2 - drivers/usb/gadget/f_midi.c | 56 +- drivers/usb/gadget/f_mtp.c | 1287 ------ drivers/usb/gadget/f_rndis.c | 40 +- drivers/usb/gadget/inode.c | 2 +- drivers/usb/gadget/printer.c | 9 - drivers/usb/gadget/rndis.c | 122 +- drivers/usb/gadget/rndis.h | 2 - drivers/usb/gadget/tcm_usb_gadget.c | 2 +- drivers/usb/gadget/u_ether.c | 324 +- drivers/usb/gadget/u_ether.h | 3 - drivers/usb/gadget/u_serial.c | 1 - drivers/usb/gadget/udc-core.c | 17 +- drivers/usb/gadget/uvc_queue.c | 6 +- drivers/usb/gadget/zero.c | 2 +- drivers/usb/host/Kconfig | 10 +- drivers/usb/host/Makefile | 1 - drivers/usb/host/ehci-fsl.c | 15 +- drivers/usb/host/ehci-h20ahb.c | 341 -- drivers/usb/host/ehci-hcd.c | 26 +- drivers/usb/host/ehci-hub.c | 1 - drivers/usb/host/ehci-mxc.c | 2 +- drivers/usb/host/ehci-omap.c | 11 +- drivers/usb/host/ehci-pci.c | 27 +- drivers/usb/host/ehci-sched.c | 13 +- drivers/usb/host/ehci-sysfs.c | 8 +- drivers/usb/host/ehci.h | 18 +- drivers/usb/host/isp116x-hcd.c | 2 +- drivers/usb/host/ohci-hcd.c | 41 +- drivers/usb/host/ohci-hub.c | 18 - drivers/usb/host/ohci-pci.c | 3 +- drivers/usb/host/ohci-q.c | 70 +- drivers/usb/host/ohci.h | 2 - drivers/usb/host/oxu210hp-hcd.c | 7 +- drivers/usb/host/pci-quirks.c | 37 +- drivers/usb/host/r8a66597-hcd.c | 2 +- drivers/usb/host/sl811-hcd.c | 2 +- drivers/usb/host/uhci-pci.c | 2 +- drivers/usb/host/uhci-q.c | 12 +- drivers/usb/host/xhci-hub.c | 23 +- drivers/usb/host/xhci-mem.c | 32 +- drivers/usb/host/xhci-pci.c | 23 +- drivers/usb/host/xhci-plat.c | 3 +- drivers/usb/host/xhci-ring.c | 128 +- drivers/usb/host/xhci.c | 109 +- drivers/usb/host/xhci.h | 13 +- drivers/usb/misc/sisusbvga/sisusb.c | 2 - drivers/usb/misc/usbtest.c | 40 +- drivers/usb/musb/musb_core.c | 5 +- drivers/usb/phy/Kconfig | 19 +- drivers/usb/phy/Makefile | 2 - drivers/usb/phy/class-dual-role.c | 529 --- drivers/usb/phy/otg-wakelock.c | 173 - drivers/usb/phy/phy-fsl-usb.h | 2 +- drivers/usb/phy/phy-fsm-usb.c | 2 +- drivers/usb/phy/phy-isp1301-omap.c | 2 +- drivers/usb/phy/phy-ulpi.c | 3 - drivers/usb/phy/phy.c | 4 +- drivers/usb/serial/bus.c | 16 +- drivers/usb/serial/cp210x.c | 18 - drivers/usb/serial/cypress_m8.h | 2 +- drivers/usb/serial/ftdi_sio.c | 192 +- drivers/usb/serial/ftdi_sio_ids.h | 197 +- drivers/usb/serial/generic.c | 14 +- drivers/usb/serial/io_ti.c | 52 +- drivers/usb/serial/io_usbvend.h | 2 +- drivers/usb/serial/keyspan.c | 119 +- drivers/usb/serial/mos7720.c | 21 +- drivers/usb/serial/mos7840.c | 211 +- drivers/usb/serial/opticon.c | 2 +- drivers/usb/serial/option.c | 500 +-- drivers/usb/serial/pl2303.c | 70 +- drivers/usb/serial/pl2303.h | 10 +- drivers/usb/serial/qcserial.c | 56 +- drivers/usb/serial/sierra.c | 66 +- drivers/usb/serial/spcp8x5.c | 30 +- drivers/usb/serial/ssu100.c | 11 +- drivers/usb/serial/symbolserial.c | 6 +- drivers/usb/serial/ti_usb_3410_5052.c | 12 +- drivers/usb/serial/usb-serial.c | 41 +- drivers/usb/serial/usb_wwan.c | 154 +- drivers/usb/serial/visor.c | 2 +- drivers/usb/serial/whiteheat.c | 38 +- drivers/usb/serial/zte_ev.c | 25 +- drivers/usb/storage/Kconfig | 4 +- drivers/usb/storage/scsiglue.c | 11 +- drivers/usb/storage/shuttle_usbat.c | 2 +- drivers/usb/storage/transport.c | 26 - drivers/usb/storage/unusual_cypress.h | 2 +- drivers/usb/storage/unusual_devs.h | 99 - drivers/usb/wusbcore/wa-xfer.c | 9 +- drivers/vfio/pci/vfio_pci.c | 4 +- drivers/vfio/vfio_iommu_type1.c | 4 +- drivers/vhost/net.c | 38 +- drivers/vhost/scsi.c | 55 +- drivers/vhost/vhost.c | 1 - drivers/video/Kconfig | 24 +- drivers/video/Makefile | 5 - drivers/video/adf/Kconfig | 14 - drivers/video/adf/Makefile | 15 - drivers/video/adf/adf.c | 1188 ------ drivers/video/adf/adf.h | 71 - drivers/video/adf/adf_client.c | 811 ---- drivers/video/adf/adf_fbdev.c | 665 --- drivers/video/adf/adf_fops.c | 957 ----- drivers/video/adf/adf_fops.h | 37 - drivers/video/adf/adf_fops32.c | 217 - drivers/video/adf/adf_fops32.h | 78 - drivers/video/adf/adf_format.c | 280 -- drivers/video/adf/adf_memblock.c | 160 - drivers/video/adf/adf_sysfs.c | 296 -- drivers/video/adf/adf_sysfs.h | 33 - drivers/video/adf/adf_trace.h | 93 - drivers/video/amba-clcd.c | 290 +- drivers/video/arm-hdlcd.c | 844 ---- drivers/video/aty/mach64_accel.c | 3 +- drivers/video/aty/mach64_cursor.c | 22 +- drivers/video/au1100fb.c | 28 +- drivers/video/au1200fb.c | 27 +- drivers/video/backlight/atmel-pwm-bl.c | 19 +- drivers/video/cfbcopyarea.c | 153 +- drivers/video/console/Kconfig | 5 +- drivers/video/console/bitblit.c | 3 +- drivers/video/console/fbcon.c | 2 +- drivers/video/console/fbcon_ccw.c | 3 +- drivers/video/console/fbcon_cw.c | 3 +- drivers/video/console/fbcon_ud.c | 3 +- drivers/video/console/sticore.c | 166 +- drivers/video/fb-puv3.c | 2 - drivers/video/hyperv_fb.c | 40 +- drivers/video/kyro/fbdev.c | 6 +- drivers/video/logo/logo.c | 17 +- drivers/video/matrox/matroxfb_accel.c | 38 +- drivers/video/matrox/matroxfb_base.h | 4 +- drivers/video/sticore.h | 62 +- drivers/video/stifb.c | 10 +- drivers/video/tgafb.c | 279 +- drivers/video/vexpress-dvi.c | 220 - drivers/virtio/virtio_balloon.c | 9 +- drivers/virtio/virtio_pci.c | 33 +- drivers/virtio/virtio_ring.c | 56 +- drivers/vme/bridges/vme_ca91cx42.c | 4 +- drivers/vme/bridges/vme_tsi148.c | 4 +- drivers/w1/masters/ds2482.c | 47 +- drivers/w1/w1_netlink.c | 25 +- drivers/watchdog/ath79_wdt.c | 10 - drivers/watchdog/omap_wdt.c | 7 - drivers/watchdog/sc1200wdt.c | 3 +- drivers/watchdog/sp805_wdt.c | 4 +- drivers/watchdog/ts72xx_wdt.c | 3 +- drivers/xen/events.c | 13 +- drivers/xen/evtchn.c | 21 +- drivers/xen/gntdev.c | 42 +- drivers/xen/grant-table.c | 19 +- drivers/xen/xen-pciback/conf_space.c | 2 +- drivers/xen/xen-pciback/conf_space.h | 2 - drivers/xen/xen-pciback/conf_space_header.c | 61 +- fs/9p/vfs_inode.c | 3 +- fs/9p/vfs_inode_dotl.c | 3 +- fs/adfs/super.c | 1 - fs/affs/amigaffs.c | 2 +- fs/affs/super.c | 1 - fs/aio.c | 16 +- fs/attr.c | 13 +- fs/autofs4/dev-ioctl.c | 8 +- fs/autofs4/expire.c | 12 +- fs/autofs4/root.c | 2 +- fs/befs/linuxvfs.c | 1 - fs/binfmt_elf.c | 44 +- fs/bio-integrity.c | 14 +- fs/bio.c | 24 +- fs/block_dev.c | 9 +- fs/btrfs/acl.c | 2 +- fs/btrfs/backref.c | 32 +- fs/btrfs/backref.h | 4 +- fs/btrfs/compression.c | 2 - fs/btrfs/ctree.c | 15 +- fs/btrfs/ctree.h | 5 - fs/btrfs/delayed-inode.c | 8 - fs/btrfs/dir-item.c | 10 +- fs/btrfs/disk-io.c | 15 +- fs/btrfs/extent-tree.c | 33 +- fs/btrfs/extent_io.c | 10 +- fs/btrfs/extent_map.c | 2 + fs/btrfs/file-item.c | 4 +- fs/btrfs/file.c | 56 +- fs/btrfs/free-space-cache.c | 4 +- fs/btrfs/inode-map.c | 2 +- fs/btrfs/inode.c | 66 +- fs/btrfs/ioctl.c | 17 +- fs/btrfs/relocation.c | 19 +- fs/btrfs/scrub.c | 7 +- fs/btrfs/send.c | 46 +- fs/btrfs/super.c | 10 - fs/btrfs/transaction.c | 12 +- fs/btrfs/tree-log.c | 9 +- fs/btrfs/ulist.c | 15 - fs/btrfs/volumes.c | 34 +- fs/btrfs/xattr.c | 159 +- fs/buffer.c | 20 +- fs/ceph/addr.c | 8 +- fs/ceph/dir.c | 8 +- fs/ceph/file.c | 47 +- fs/ceph/inode.c | 6 +- fs/ceph/ioctl.c | 12 +- fs/ceph/mds_client.c | 15 +- fs/ceph/mdsmap.c | 4 +- fs/ceph/super.c | 2 +- fs/ceph/xattr.c | 9 +- fs/cifs/cifs_unicode.c | 7 +- fs/cifs/cifs_unicode.h | 8 +- fs/cifs/cifsacl.c | 28 +- fs/cifs/cifsencrypt.c | 8 +- fs/cifs/cifsfs.c | 1 - fs/cifs/cifsglob.h | 18 +- fs/cifs/cifssmb.c | 8 +- fs/cifs/connect.c | 9 +- fs/cifs/dir.c | 1 - fs/cifs/file.c | 53 +- fs/cifs/inode.c | 31 +- fs/cifs/readdir.c | 14 +- fs/cifs/sess.c | 6 +- fs/cifs/smb1ops.c | 15 - fs/cifs/smb2file.c | 2 +- fs/cifs/smb2glob.h | 3 - fs/cifs/smb2inode.c | 2 +- fs/cifs/smb2maperror.c | 4 +- fs/cifs/smb2misc.c | 148 +- fs/cifs/smb2ops.c | 32 +- fs/cifs/smb2pdu.c | 17 +- fs/cifs/transport.c | 2 +- fs/cifs/xattr.c | 64 +- fs/coda/cache.c | 2 +- fs/coda/dir.c | 19 +- fs/coda/inode.c | 1 - fs/compat.c | 43 +- fs/compat_binfmt_elf.c | 5 - fs/configfs/dir.c | 16 +- fs/coredump.c | 40 +- fs/cramfs/inode.c | 1 - fs/dcache.c | 221 +- fs/dcookies.c | 2 +- fs/debugfs/inode.c | 104 +- fs/devpts/inode.c | 2 - fs/ecryptfs/crypto.c | 1 + fs/ecryptfs/file.c | 30 +- fs/ecryptfs/inode.c | 2 +- fs/ecryptfs/keystore.c | 3 +- fs/ecryptfs/main.c | 16 +- fs/efs/super.c | 1 - fs/eventpoll.c | 7 +- fs/exec.c | 96 +- fs/exofs/ore.c | 37 +- fs/exportfs/expfs.c | 16 +- fs/ext2/inode.c | 2 - fs/ext2/super.c | 2 - fs/ext2/xip.c | 1 - fs/ext3/namei.c | 7 +- fs/ext3/super.c | 9 +- fs/ext4/balloc.c | 4 +- fs/ext4/ext4.h | 21 +- fs/ext4/ext4_jbd2.c | 17 +- fs/ext4/extents.c | 90 +- fs/ext4/extents_status.c | 8 - fs/ext4/file.c | 24 +- fs/ext4/ialloc.c | 28 +- fs/ext4/indirect.c | 22 +- fs/ext4/inline.c | 10 +- fs/ext4/inode.c | 220 +- fs/ext4/ioctl.c | 25 +- fs/ext4/mballoc.c | 109 +- fs/ext4/migrate.c | 17 +- fs/ext4/namei.c | 31 +- fs/ext4/page-io.c | 24 +- fs/ext4/resize.c | 40 +- fs/ext4/super.c | 98 +- fs/ext4/xattr.c | 58 +- fs/f2fs/super.c | 1 + fs/fat/dir.c | 11 - fs/fat/fat.h | 1 - fs/fat/inode.c | 11 - fs/fhandle.c | 5 +- fs/file.c | 2 +- fs/file_table.c | 152 +- fs/freevxfs/vxfs_super.c | 1 - fs/fs-writeback.c | 77 +- fs/fuse/dev.c | 35 +- fs/fuse/dir.c | 55 +- fs/fuse/file.c | 34 +- fs/fuse/fuse_i.h | 2 - fs/fuse/inode.c | 26 +- fs/gfs2/aops.c | 30 - fs/gfs2/export.c | 6 +- fs/gfs2/inode.c | 16 +- fs/gfs2/ops_fstype.c | 12 +- fs/gfs2/super.c | 2 - fs/hfs/bnode.c | 9 +- fs/hfs/brec.c | 20 +- fs/hfs/super.c | 1 - fs/hfsplus/bnode.c | 3 + fs/hfsplus/brec.c | 20 +- fs/hfsplus/super.c | 1 - fs/hpfs/map.c | 3 +- fs/hpfs/namei.c | 25 +- fs/hpfs/super.c | 21 +- fs/hugetlbfs/inode.c | 8 +- fs/inode.c | 14 +- fs/internal.h | 3 + fs/ioprio.c | 14 +- fs/isofs/inode.c | 31 +- fs/isofs/isofs.h | 23 +- fs/isofs/rock.c | 48 +- fs/jbd2/checkpoint.c | 7 +- fs/jbd2/journal.c | 41 +- fs/jbd2/recovery.c | 8 +- fs/jbd2/transaction.c | 13 +- fs/jffs2/compr_rtime.c | 4 +- fs/jffs2/jffs2_fs_sb.h | 2 + fs/jffs2/nodelist.h | 2 +- fs/jffs2/nodemgmt.c | 14 +- fs/jffs2/scan.c | 5 - fs/jffs2/super.c | 1 - fs/jffs2/wbuf.c | 17 +- fs/jfs/jfs_dtree.c | 35 +- fs/jfs/jfs_inode.c | 3 +- fs/jfs/super.c | 1 - fs/libfs.c | 12 +- fs/lockd/clntlock.c | 13 +- fs/lockd/clntproc.c | 5 +- fs/lockd/mon.c | 6 - fs/lockd/svc.c | 13 +- fs/lockd/svclock.c | 12 - fs/locks.c | 7 +- fs/minix/inode.c | 1 - fs/mount.h | 2 +- fs/namei.c | 52 +- fs/namespace.c | 75 +- fs/ncpfs/dir.c | 2 +- fs/ncpfs/inode.c | 1 - fs/ncpfs/ioctl.c | 1 + fs/ncpfs/ncplib_kernel.h | 4 +- fs/nfs/blocklayout/extents.c | 2 +- fs/nfs/callback.c | 8 +- fs/nfs/callback_xdr.c | 4 +- fs/nfs/delegation.c | 36 +- fs/nfs/delegation.h | 1 - fs/nfs/direct.c | 7 - fs/nfs/getroot.c | 2 +- fs/nfs/inode.c | 30 +- fs/nfs/nfs3acl.c | 5 +- fs/nfs/nfs3proc.c | 2 +- fs/nfs/nfs3xdr.c | 2 +- fs/nfs/nfs4client.c | 75 +- fs/nfs/nfs4filelayout.c | 2 +- fs/nfs/nfs4filelayoutdev.c | 18 +- fs/nfs/nfs4proc.c | 149 +- fs/nfs/nfs4renewd.c | 12 +- fs/nfs/nfs4state.c | 42 +- fs/nfs/nfs4xdr.c | 47 +- fs/nfs/pagelist.c | 4 +- fs/nfs/super.c | 2 - fs/nfsd/export.c | 15 +- fs/nfsd/nfs4acl.c | 17 +- fs/nfsd/nfs4callback.c | 15 +- fs/nfsd/nfs4proc.c | 21 +- fs/nfsd/nfs4recover.c | 20 +- fs/nfsd/nfs4state.c | 99 +- fs/nfsd/nfs4xdr.c | 27 +- fs/nfsd/nfscache.c | 46 +- fs/nfsd/nfsctl.c | 5 - fs/nfsd/nfssvc.c | 5 +- fs/nfsd/vfs.c | 197 +- fs/nilfs2/btree.c | 47 +- fs/nilfs2/inode.c | 39 +- fs/nilfs2/namei.c | 15 +- fs/nilfs2/nilfs.h | 2 + fs/nilfs2/page.c | 2 - fs/nilfs2/segbuf.c | 5 +- fs/nilfs2/segment.c | 66 +- fs/nilfs2/segment.h | 5 - fs/nilfs2/super.c | 1 - fs/notify/fanotify/fanotify_user.c | 7 +- fs/notify/fdinfo.c | 4 +- fs/notify/fsnotify.c | 4 +- fs/notify/inode_mark.c | 17 +- fs/notify/mark.c | 30 +- fs/ntfs/super.c | 2 - fs/ocfs2/aops.c | 16 +- fs/ocfs2/buffer_head_io.c | 2 + fs/ocfs2/dcache.c | 2 +- fs/ocfs2/dlm/dlmmaster.c | 31 +- fs/ocfs2/dlm/dlmrecovery.c | 29 +- fs/ocfs2/dlmglue.c | 10 +- fs/ocfs2/extent_map.c | 1 + fs/ocfs2/file.c | 22 +- fs/ocfs2/quota_global.c | 27 +- fs/ocfs2/quota_local.c | 4 + fs/ocfs2/super.c | 2 - fs/ocfs2/xattr.c | 10 - fs/omfs/inode.c | 3 +- fs/open.c | 28 +- fs/openpromfs/inode.c | 1 - fs/pipe.c | 94 +- fs/posix_acl.c | 6 - fs/proc/Makefile | 1 + fs/proc/array.c | 11 +- fs/proc/base.c | 62 +- fs/proc/generic.c | 12 + fs/proc/inode.c | 21 - fs/proc/internal.h | 8 +- fs/proc/page.c | 2 +- fs/proc/root.c | 8 +- fs/proc/task_mmu.c | 97 +- fs/pstore/Kconfig | 10 - fs/pstore/Makefile | 2 - fs/pstore/inode.c | 23 +- fs/pstore/internal.h | 6 - fs/pstore/platform.c | 1 - fs/pstore/pmsg.c | 116 - fs/pstore/ram.c | 87 +- fs/pstore/ram_core.c | 85 +- fs/qnx4/inode.c | 1 - fs/qnx6/inode.c | 1 - fs/quota/dquot.c | 62 +- fs/read_write.c | 16 +- fs/readdir.c | 61 +- fs/reiserfs/dir.c | 6 +- fs/reiserfs/inode.c | 8 +- fs/reiserfs/procfs.c | 99 +- fs/reiserfs/reiserfs.h | 2 + fs/reiserfs/super.c | 4 +- fs/romfs/super.c | 1 - fs/select.c | 4 +- fs/seq_file.c | 32 +- fs/signalfd.c | 5 +- fs/splice.c | 26 +- fs/squashfs/Kconfig | 87 - fs/squashfs/Makefile | 6 - fs/squashfs/block.c | 41 +- fs/squashfs/cache.c | 28 +- fs/squashfs/decompressor.c | 66 +- fs/squashfs/decompressor.h | 28 +- fs/squashfs/decompressor_multi.c | 198 - fs/squashfs/decompressor_multi_percpu.c | 97 - fs/squashfs/decompressor_single.c | 85 - fs/squashfs/dir.c | 55 +- fs/squashfs/file.c | 142 +- fs/squashfs/file_cache.c | 38 - fs/squashfs/file_direct.c | 176 - fs/squashfs/lz4_wrapper.c | 142 - fs/squashfs/lzo_wrapper.c | 47 +- fs/squashfs/namei.c | 8 +- fs/squashfs/page_actor.c | 100 - fs/squashfs/page_actor.h | 81 - fs/squashfs/squashfs.h | 22 +- fs/squashfs/squashfs_fs.h | 6 +- fs/squashfs/squashfs_fs_sb.h | 4 +- fs/squashfs/super.c | 16 +- fs/squashfs/xz_wrapper.c | 105 +- fs/squashfs/zlib_wrapper.c | 64 +- fs/stat.c | 11 +- fs/statfs.c | 2 +- fs/super.c | 52 +- fs/sysv/inode.c | 1 - fs/sysv/super.c | 1 - fs/timerfd.c | 132 +- fs/ubifs/commit.c | 10 +- fs/ubifs/file.c | 3 +- fs/ubifs/log.c | 19 +- fs/ubifs/master.c | 7 +- fs/ubifs/shrinker.c | 1 + fs/ubifs/super.c | 4 +- fs/ubifs/ubifs.h | 2 + fs/udf/inode.c | 45 +- fs/udf/super.c | 343 +- fs/udf/symlink.c | 17 +- fs/ufs/super.c | 1 - fs/xfs/xfs_aops.c | 61 - fs/xfs/xfs_buf_item.c | 4 - fs/xfs/xfs_da_btree.c | 7 +- fs/xfs/xfs_dquot.c | 3 +- fs/xfs/xfs_file.c | 21 +- fs/xfs/xfs_fsops.c | 6 +- fs/xfs/xfs_inode.c | 2 - fs/xfs/xfs_ioctl.c | 9 +- fs/xfs/xfs_ioctl32.c | 3 +- fs/xfs/xfs_qm.c | 8 +- fs/xfs/xfs_super.c | 1 - fs/xfs/xfs_symlink.c | 2 +- fs/xfs/xfs_trans.c | 1 - include/acpi/acpi_bus.h | 7 +- include/acpi/acpixf.h | 2 +- include/acpi/actypes.h | 21 - include/acpi/platform/acenv.h | 1 - include/asm-generic/barrier.h | 15 - include/asm-generic/dma-contiguous.h | 28 + include/asm-generic/dma-mapping-common.h | 9 - include/asm-generic/early_ioremap.h | 42 - include/asm-generic/fixmap.h | 97 - include/asm-generic/hugetlb.h | 4 +- include/asm-generic/pgtable.h | 38 +- include/asm-generic/rwsem.h | 10 +- include/asm-generic/seccomp.h | 29 - include/asm-generic/sections.h | 4 - include/asm-generic/simd.h | 14 - include/asm-generic/syscall.h | 4 +- include/asm-generic/tlb.h | 2 +- include/asm-generic/vmlinux.lds.h | 12 - include/asm-generic/word-at-a-time.h | 4 - include/clocksource/arm_arch_timer.h | 18 +- include/crypto/ablk_helper.h | 31 - include/crypto/algapi.h | 9 +- include/crypto/scatterwalk.h | 3 +- include/drm/drm_pciids.h | 8 +- include/dt-bindings/thermal/thermal.h | 17 - include/kvm/arm_arch_timer.h | 103 - include/kvm/arm_vgic.h | 370 -- include/linux/Kbuild | 2 - include/linux/alarmtimer.h | 4 - include/linux/amba/bus.h | 1 - include/linux/amba/mmci.h | 12 - include/linux/android_aid.h | 28 - include/linux/arm-cci.h | 61 - include/linux/arm-hdlcd.h | 122 - include/linux/audit.h | 28 +- include/linux/auxvec.h | 2 +- include/linux/backing-dev.h | 2 +- include/linux/balloon_compaction.h | 25 - include/linux/binfmts.h | 3 + include/linux/bitops.h | 23 - include/linux/blk_types.h | 4 +- include/linux/blkdev.h | 5 +- include/linux/can/skb.h | 38 - include/linux/capability.h | 7 +- include/linux/ceph/decode.h | 22 + include/linux/ceph/messenger.h | 2 +- include/linux/ceph/osd_client.h | 4 +- include/linux/cgroup.h | 70 +- include/linux/clk-provider.h | 4 - include/linux/clockchips.h | 20 +- include/linux/clocksource.h | 2 +- include/linux/compat.h | 25 +- include/linux/compiler-gcc.h | 3 - include/linux/compiler-gcc4.h | 11 - include/linux/compiler-gcc5.h | 66 - include/linux/compiler-intel.h | 9 +- include/linux/compiler.h | 13 - include/linux/coresight.h | 251 -- include/linux/cpu.h | 55 - include/linux/cpu_cooling.h | 29 +- include/linux/cpufeature.h | 60 - include/linux/cpufreq.h | 14 - include/linux/cpuidle.h | 1 - include/linux/cred.h | 1 - include/linux/crypto.h | 13 - include/linux/dcache.h | 9 +- include/linux/debug_locks.h | 4 +- include/linux/device-mapper.h | 3 +- include/linux/device.h | 55 +- include/linux/dma-contiguous.h | 64 +- include/linux/dma-mapping.h | 24 - include/linux/edac.h | 7 +- include/linux/efi.h | 380 +- include/linux/elevator.h | 6 +- include/linux/firewire.h | 2 - include/linux/freezer.h | 171 +- include/linux/fs.h | 29 +- include/linux/fsnotify.h | 6 +- include/linux/ftrace.h | 36 +- include/linux/ftrace_event.h | 16 +- include/linux/futex.h | 4 - include/linux/genalloc.h | 11 +- include/linux/gpio_event.h | 170 - include/linux/hid.h | 13 +- include/linux/huge_mm.h | 20 +- include/linux/hugetlb.h | 26 - include/linux/hyperv.h | 7 +- include/linux/i2c.h | 20 - include/linux/if_pppolac.h | 23 - include/linux/if_pppopns.h | 23 - include/linux/if_pppox.h | 21 - include/linux/if_team.h | 1 - include/linux/if_vlan.h | 3 +- include/linux/iio/events.h | 2 +- include/linux/iio/iio.h | 21 +- include/linux/iio/trigger.h | 4 +- include/linux/inetdevice.h | 2 +- include/linux/init_task.h | 2 - include/linux/initramfs.h | 32 - include/linux/interrupt.h | 62 +- include/linux/ipc_namespace.h | 10 +- include/linux/ipv6.h | 8 +- include/linux/irq.h | 3 +- include/linux/irqchip/arm-gic-v3.h | 200 - include/linux/irqchip/arm-gic.h | 31 +- include/linux/irqdesc.h | 12 - include/linux/jbd2.h | 4 +- include/linux/jiffies.h | 20 +- include/linux/kernel.h | 16 - include/linux/kexec.h | 3 - include/linux/keychord.h | 23 - include/linux/keycombo.h | 36 - include/linux/keyreset.h | 29 - include/linux/kgdb.h | 2 +- include/linux/kvm_host.h | 108 +- include/linux/kvm_types.h | 14 - include/linux/libata.h | 16 - include/linux/list.h | 16 - include/linux/lsm_audit.h | 7 - include/linux/lz4.h | 87 - include/linux/mailbox_client.h | 46 - include/linux/mailbox_controller.h | 133 - include/linux/mbus.h | 2 +- include/linux/memcontrol.h | 37 - include/linux/miscdevice.h | 1 - include/linux/mm.h | 49 +- include/linux/mm_types.h | 63 - include/linux/mmc/host.h | 35 - include/linux/mmc/pm.h | 1 - include/linux/mmc/sdio_func.h | 10 - include/linux/mod_devicetable.h | 15 +- include/linux/mount.h | 9 +- include/linux/msg.h | 6 +- include/linux/mtd/map.h | 4 +- include/linux/nbd.h | 1 - include/linux/net.h | 10 +- include/linux/netdevice.h | 16 +- include/linux/netfilter/xt_qtaguid.h | 13 - include/linux/netfilter/xt_quota2.h | 25 - include/linux/netlink.h | 14 +- include/linux/nfs_xdr.h | 13 +- include/linux/nilfs2_fs.h | 2 +- include/linux/nmi.h | 5 +- include/linux/of.h | 406 +- include/linux/of_device.h | 15 - include/linux/of_fdt.h | 38 +- include/linux/of_graph.h | 65 - include/linux/of_i2c.h | 29 +- include/linux/of_platform.h | 10 +- include/linux/of_reserved_mem.h | 53 - include/linux/oom.h | 3 - include/linux/pagemap.h | 7 +- include/linux/pci.h | 1 - include/linux/pci_ids.h | 2 - include/linux/perf_event.h | 7 - include/linux/pinctrl/consumer.h | 43 + include/linux/pinctrl/pinconf-generic.h | 69 +- include/linux/pinctrl/pinconf.h | 8 - include/linux/pinctrl/pinctrl.h | 2 - include/linux/pipe_fs_i.h | 2 - include/linux/pl320-ipc.h | 17 - include/linux/platform_data/ds2482.h | 21 - include/linux/pm.h | 1 - include/linux/pm_domain.h | 52 - include/linux/power_supply.h | 10 - include/linux/printk.h | 6 +- include/linux/pstore.h | 1 - include/linux/pstore_ram.h | 7 +- include/linux/ptrace.h | 35 - include/linux/quotaops.h | 15 - include/linux/random.h | 7 +- include/linux/rculist.h | 5 +- include/linux/reboot.h | 5 - include/linux/regmap.h | 2 - include/linux/ring_buffer.h | 2 +- include/linux/sched.h | 157 +- include/linux/seccomp.h | 8 +- include/linux/security.h | 31 +- include/linux/sem.h | 6 +- include/linux/serial_core.h | 17 - include/linux/signal.h | 8 - include/linux/skbuff.h | 64 +- include/linux/sock_diag.h | 2 +- include/linux/spinlock.h | 14 +- include/linux/string.h | 5 +- include/linux/sunrpc/sched.h | 1 - include/linux/sunrpc/svc_xprt.h | 1 - include/linux/sunrpc/svcsock.h | 1 - include/linux/suspend.h | 2 +- include/linux/switch.h | 53 - include/linux/syscalls.h | 7 - include/linux/sysfs.h | 65 +- include/linux/thermal.h | 40 +- include/linux/thread_info.h | 2 - include/linux/tick.h | 6 + include/linux/time.h | 13 - include/linux/timex.h | 1 - include/linux/tracepoint.h | 6 - include/linux/uid_stat.h | 29 - include/linux/usb.h | 26 - include/linux/usb/class-dual-role.h | 128 - include/linux/usb/f_accessory.h | 23 - include/linux/usb/f_mtp.h | 23 - include/linux/usb/hcd.h | 3 +- include/linux/usb/quirks.h | 3 - include/linux/usb/usbnet.h | 2 +- include/linux/usb_usual.h | 4 +- include/linux/user_namespace.h | 13 - include/linux/vexpress.h | 62 +- include/linux/virtio.h | 4 - include/linux/vm_event_item.h | 1 - include/linux/vmstat.h | 3 + include/linux/wait.h | 57 - include/linux/wakelock.h | 67 - include/linux/wakeup_reason.h | 27 - include/linux/wifi_tiwlan.h | 27 - include/linux/wlan_plat.h | 30 - include/linux/workqueue.h | 40 +- include/linux/zpool.h | 106 - include/linux/zsmalloc.h | 44 - include/media/v4l2-ctrls.h | 1 - include/media/videobuf2-core.h | 4 - include/net/activity_stats.h | 25 - include/net/addrconf.h | 10 - include/net/af_unix.h | 6 +- include/net/bluetooth/hci.h | 10 +- include/net/bluetooth/hci_core.h | 8 +- include/net/bluetooth/sco.h | 4 +- include/net/cfg80211.h | 220 +- include/net/cipso_ipv4.h | 6 +- include/net/dst.h | 12 - include/net/fib_rules.h | 6 +- include/net/flow.h | 19 +- include/net/genetlink.h | 20 +- include/net/inet_connection_sock.h | 1 - include/net/inet_sock.h | 9 - include/net/inetpeer.h | 23 +- include/net/ip.h | 53 +- include/net/ip6_fib.h | 3 +- include/net/ip6_route.h | 13 +- include/net/ip_tunnels.h | 16 +- include/net/ip_vs.h | 32 +- include/net/ipv6.h | 23 +- include/net/mac80211.h | 1 - include/net/ndisc.h | 2 +- include/net/net_namespace.h | 9 +- include/net/netfilter/ipv6/nf_defrag_ipv6.h | 5 +- include/net/netfilter/nf_conntrack_extend.h | 6 +- include/net/netns/ipv4.h | 4 - include/net/netns/ipv6.h | 1 - include/net/netns/sctp.h | 1 - include/net/ping.h | 49 +- include/net/route.h | 5 +- include/net/sch_generic.h | 9 +- include/net/sctp/command.h | 2 +- include/net/sctp/sctp.h | 5 - include/net/sctp/sm.h | 6 +- include/net/sctp/structs.h | 8 +- include/net/secure_seq.h | 3 + include/net/sock.h | 47 +- include/net/tcp.h | 8 +- include/net/transp_v6.h | 3 - include/net/udp.h | 1 - include/scsi/osd_ore.h | 1 - include/scsi/scsi_device.h | 3 +- include/scsi/scsi_host.h | 6 - include/sound/ak4113.h | 2 +- include/sound/ak4114.h | 2 +- include/sound/compress_driver.h | 9 - include/sound/core.h | 2 - include/sound/emu10k1.h | 14 +- include/sound/memalloc.h | 2 +- include/sound/soc-dpcm.h | 22 - include/sound/soc.h | 1 - include/target/iscsi/iscsi_transport.h | 10 +- include/target/target_core_backend.h | 1 - include/target/target_core_base.h | 1 - include/trace/events/arm-ipi.h | 100 - include/trace/events/block.h | 33 +- include/trace/events/cpufreq_interactive.h | 112 - include/trace/events/filemap.h | 46 - include/trace/events/gpu.h | 143 - include/trace/events/kvm.h | 18 +- include/trace/events/mmc.h | 91 - include/trace/events/module.h | 2 +- include/trace/events/power.h | 19 - include/trace/events/power_cpu_migrate.h | 67 - include/trace/events/sched.h | 274 -- include/trace/events/smp.h | 90 - include/trace/ftrace.h | 12 +- include/trace/syscall.h | 15 - include/uapi/asm-generic/unistd.h | 12 +- include/uapi/drm/drm_mode.h | 2 - include/uapi/drm/radeon_drm.h | 2 - include/uapi/drm/tegra_drm.h | 1 + include/uapi/linux/Kbuild | 2 - include/uapi/linux/android/Kbuild | 2 - include/uapi/linux/android/binder.h | 349 -- include/uapi/linux/audit.h | 2 - include/uapi/linux/elf-em.h | 2 - include/uapi/linux/eventpoll.h | 13 +- include/uapi/linux/fib_rules.h | 2 - include/uapi/linux/firewire-cdev.h | 4 +- include/uapi/linux/fs.h | 2 - include/uapi/linux/icmpv6.h | 2 - include/uapi/linux/if_pppolac.h | 33 - include/uapi/linux/if_pppopns.h | 32 - include/uapi/linux/if_pppox.h | 10 +- include/uapi/linux/input.h | 43 +- include/uapi/linux/ipv6.h | 3 - include/uapi/linux/keychord.h | 52 - include/uapi/linux/kvm.h | 46 +- include/uapi/linux/msdos_fs.h | 12 - include/uapi/linux/netfilter/xt_IDLETIMER.h | 8 - include/uapi/linux/netfilter/xt_bpf.h | 2 - include/uapi/linux/netfilter/xt_socket.h | 6 - include/uapi/linux/nl80211.h | 130 +- include/uapi/linux/perf_event.h | 12 +- include/uapi/linux/pkt_sched.h | 10 +- include/uapi/linux/prctl.h | 9 - include/uapi/linux/psci.h | 90 - include/uapi/linux/rtnetlink.h | 1 - include/uapi/linux/seccomp.h | 7 - include/uapi/linux/sockios.h | 1 - include/uapi/linux/usb/Kbuild | 1 - include/uapi/linux/usb/cdc-wdm.h | 2 - include/uapi/linux/usb/f_accessory.h | 146 - include/uapi/linux/usb/f_mtp.h | 61 - include/uapi/linux/usbdevice_fs.h | 3 +- include/uapi/sound/compress_offload.h | 8 +- include/uapi/sound/compress_params.h | 10 +- include/uapi/video/adf.h | 321 -- include/video/adf.h | 502 --- include/video/adf_client.h | 61 - include/video/adf_fbdev.h | 124 - include/video/adf_format.h | 26 - include/video/adf_memblock.h | 20 - include/xen/interface/sched.h | 8 - init/Kconfig | 14 - init/Makefile | 3 + init/initramfs.c | 19 +- init/main.c | 6 - init/noinitramfs.c | 9 +- ipc/compat.c | 2 +- ipc/ipc_sysctl.c | 23 +- ipc/mq_sysctl.c | 18 +- ipc/mqueue.c | 13 +- ipc/msg.c | 298 +- ipc/msgutil.c | 20 +- ipc/namespace.c | 7 +- ipc/sem.c | 741 +--- ipc/shm.c | 337 +- ipc/util.c | 163 +- ipc/util.h | 38 +- kernel/Kconfig.locks | 5 +- kernel/audit.c | 43 +- kernel/audit.h | 1 - kernel/audit_tree.c | 1 - kernel/auditfilter.c | 2 +- kernel/auditsc.c | 39 +- kernel/capability.c | 22 +- kernel/cgroup.c | 122 +- kernel/cpu.c | 47 +- kernel/cpu/idle.c | 9 +- kernel/cpuset.c | 24 +- kernel/debug/debug_core.c | 12 - kernel/debug/kdb/kdb_io.c | 12 +- kernel/debug/kdb/kdb_main.c | 2 +- kernel/events/core.c | 258 +- kernel/events/ring_buffer.c | 31 +- kernel/events/uprobes.c | 5 +- kernel/exit.c | 24 +- kernel/fork.c | 150 +- kernel/freezer.c | 21 - kernel/futex.c | 261 +- kernel/gcov/Kconfig | 35 +- kernel/gcov/Makefile | 32 +- kernel/gcov/base.c | 38 +- kernel/gcov/fs.c | 27 +- kernel/gcov/gcc_3_4.c | 115 - kernel/gcov/gcc_4_7.c | 565 --- kernel/gcov/gcov.h | 65 +- kernel/groups.c | 11 +- kernel/hrtimer.c | 61 +- kernel/irq/irqdesc.c | 30 +- kernel/irq/manage.c | 30 +- kernel/irq/pm.c | 20 +- kernel/irq/proc.c | 19 +- kernel/irq/resend.c | 18 +- kernel/irq/spurious.c | 106 +- kernel/kcmp.c | 7 +- kernel/kexec.c | 4 - kernel/lockdep.c | 17 +- kernel/module.c | 59 +- kernel/panic.c | 13 +- kernel/pid.c | 3 - kernel/pid_namespace.c | 4 +- kernel/posix-timers.c | 1 - kernel/power/Kconfig | 39 - kernel/power/Makefile | 3 - kernel/power/autosleep.c | 3 +- kernel/power/hibernate.c | 8 +- kernel/power/main.c | 21 +- kernel/power/power.h | 9 +- kernel/power/process.c | 102 +- kernel/power/qos.c | 17 +- kernel/power/snapshot.c | 6 +- kernel/power/suspend.c | 101 +- kernel/power/suspend_test.c | 24 +- kernel/power/suspend_time.c | 111 - kernel/power/wakelock.c | 7 + kernel/power/wakeup_reason.c | 216 - kernel/printk.c | 8 +- kernel/ptrace.c | 25 +- kernel/rtmutex-debug.h | 5 - kernel/rtmutex.c | 252 +- kernel/rtmutex.h | 5 - kernel/sched/auto_group.c | 3 +- kernel/sched/core.c | 78 +- kernel/sched/cpupri.c | 3 +- kernel/sched/cputime.c | 62 +- kernel/sched/debug.c | 19 +- kernel/sched/fair.c | 2406 ++--------- kernel/sched/rt.c | 16 +- kernel/sched/sched.h | 17 +- kernel/seccomp.c | 409 +- kernel/signal.c | 9 +- kernel/smp.c | 14 +- kernel/smpboot.c | 2 - kernel/softirq.c | 152 +- kernel/sys.c | 178 +- kernel/sys_ni.c | 3 - kernel/sysctl.c | 33 - kernel/time.c | 58 +- kernel/time/Makefile | 5 +- kernel/time/alarmtimer.c | 79 +- kernel/time/clockevents.c | 143 +- kernel/time/jiffies.c | 6 - kernel/time/ntp.c | 20 +- kernel/time/tick-broadcast-hrtimer.c | 106 - kernel/time/tick-broadcast.c | 187 +- kernel/time/tick-common.c | 154 +- kernel/time/tick-internal.h | 18 +- kernel/time/tick-sched.c | 13 +- kernel/time/timekeeping.c | 37 +- kernel/time/timer_list.c | 41 +- kernel/timer.c | 10 +- kernel/trace/Kconfig | 3 - kernel/trace/Makefile | 1 - kernel/trace/blktrace.c | 20 +- kernel/trace/ftrace.c | 353 +- kernel/trace/gpu-traces.c | 23 - kernel/trace/ring_buffer.c | 74 +- kernel/trace/ring_buffer_benchmark.c | 2 +- kernel/trace/trace.c | 620 +-- kernel/trace/trace.h | 12 +- kernel/trace/trace_branch.c | 17 +- kernel/trace/trace_clock.c | 9 +- kernel/trace/trace_event_perf.c | 2 +- kernel/trace/trace_events.c | 321 +- kernel/trace/trace_events_filter.c | 34 +- kernel/trace/trace_export.c | 7 +- kernel/trace/trace_functions_graph.c | 43 +- kernel/trace/trace_irqsoff.c | 4 +- kernel/trace/trace_kprobe.c | 42 +- kernel/trace/trace_output.c | 182 +- kernel/trace/trace_syscalls.c | 29 +- kernel/trace/trace_uprobe.c | 55 +- kernel/tracepoint.c | 13 +- kernel/uid16.c | 2 +- kernel/user.c | 1 - kernel/user_namespace.c | 153 +- kernel/watchdog.c | 123 +- kernel/workqueue.c | 220 +- lib/Kconfig | 9 - lib/Kconfig.debug | 19 +- lib/Makefile | 7 +- lib/bitmap.c | 25 +- lib/btree.c | 1 - lib/checksum.c | 12 +- lib/decompress_bunzip2.c | 2 +- lib/decompress_inflate.c | 2 +- lib/fdt_empty_tree.c | 2 - lib/genalloc.c | 68 +- lib/idr.c | 8 +- lib/lz4/Makefile | 3 - lib/lz4/lz4_compress.c | 443 -- lib/lz4/lz4_decompress.c | 326 -- lib/lz4/lz4defs.h | 156 - lib/lz4/lz4hc_compress.c | 539 --- lib/lzo/lzo1x_decompress_safe.c | 43 +- lib/nlattr.c | 14 +- lib/random32.c | 14 +- lib/scatterlist.c | 3 +- lib/string.c | 16 - lib/strnlen_user.c | 3 +- lib/vsprintf.c | 33 +- linaro/configs/android.conf | 42 - linaro/configs/arndale.conf | 66 - linaro/configs/big-LITTLE-IKS.conf | 5 - linaro/configs/big-LITTLE-MP.conf | 12 - linaro/configs/bigendian.conf | 4 - linaro/configs/booting-test.conf | 66 - linaro/configs/debug.conf | 1 - linaro/configs/distribution.conf | 49 - linaro/configs/highbank.conf | 40 - linaro/configs/kvm-guest.conf | 11 - linaro/configs/kvm-host.conf | 11 - linaro/configs/linaro-base.conf | 129 - linaro/configs/omap4.conf | 194 - linaro/configs/preempt-rt.conf | 4 - linaro/configs/ubuntu-minimal.conf | 1 - linaro/configs/vexpress-tuning.conf | 1 - linaro/configs/vexpress.conf | 63 - linaro/configs/vexpress64.conf | 55 - linaro/configs/xen.conf | 7 - mm/Kconfig | 59 - mm/Makefile | 3 - mm/backing-dev.c | 18 +- mm/bounce.c | 2 - mm/compaction.c | 83 +- mm/early_ioremap.c | 245 -- mm/filemap.c | 51 +- mm/fremap.c | 8 +- mm/frontswap.c | 4 +- mm/huge_memory.c | 113 +- mm/hugetlb.c | 661 +-- mm/ksm.c | 4 +- mm/madvise.c | 3 +- mm/memcontrol.c | 236 +- mm/memory-failure.c | 121 +- mm/memory.c | 195 +- mm/memory_hotplug.c | 17 +- mm/mempolicy.c | 58 +- mm/migrate.c | 21 +- mm/mlock.c | 9 +- mm/mmap.c | 71 +- mm/mprotect.c | 10 +- mm/mremap.c | 9 +- mm/nommu.c | 4 +- mm/oom_kill.c | 77 +- mm/page-writeback.c | 79 +- mm/page_alloc.c | 67 +- mm/page_cgroup.c | 1 - mm/page_io.c | 50 +- mm/pagewalk.c | 7 +- mm/percpu-vm.c | 22 +- mm/percpu.c | 2 +- mm/pgtable-generic.c | 8 +- mm/rmap.c | 29 +- mm/shmem.c | 129 +- mm/slab.c | 2 +- mm/slab.h | 2 - mm/slab_common.c | 2 - mm/slub.c | 12 +- mm/swap.c | 74 +- mm/truncate.c | 58 +- mm/util.c | 19 +- mm/vmalloc.c | 6 +- mm/vmscan.c | 179 +- mm/vmstat.c | 1 - mm/zpool.c | 364 -- mm/zsmalloc.c | 1221 ------ net/8021q/vlan.c | 4 +- net/8021q/vlan_core.c | 7 +- net/8021q/vlan_dev.c | 78 +- net/8021q/vlan_netlink.c | 2 +- net/9p/client.c | 3 +- net/9p/trans_common.c | 10 +- net/9p/trans_virtio.c | 10 +- net/Kconfig | 16 +- net/Makefile | 1 - net/activity_stats.c | 119 - net/appletalk/ddp.c | 19 +- net/atm/common.c | 2 + net/ax25/af_ax25.c | 4 +- net/batman-adv/main.c | 5 +- net/batman-adv/network-coding.c | 28 +- net/batman-adv/network-coding.h | 14 +- net/bluetooth/af_bluetooth.c | 38 +- net/bluetooth/amp.c | 2 +- net/bluetooth/hci_conn.c | 68 +- net/bluetooth/hci_core.c | 26 +- net/bluetooth/hci_event.c | 47 +- net/bluetooth/hci_sock.c | 2 + net/bluetooth/hidp/core.c | 15 +- net/bluetooth/l2cap_core.c | 4 +- net/bluetooth/l2cap_sock.c | 8 +- net/bluetooth/mgmt.c | 11 +- net/bluetooth/rfcomm/core.c | 8 +- net/bluetooth/rfcomm/sock.c | 4 +- net/bluetooth/sco.c | 60 +- net/bridge/br_device.c | 11 +- net/bridge/br_fdb.c | 10 +- net/bridge/br_if.c | 2 - net/bridge/br_input.c | 2 +- net/bridge/br_ioctl.c | 2 + net/bridge/br_mdb.c | 3 +- net/bridge/br_multicast.c | 24 +- net/bridge/br_netlink.c | 23 +- net/bridge/br_private.h | 18 +- net/bridge/br_stp.c | 23 +- net/bridge/br_stp_bpdu.c | 2 +- net/bridge/br_stp_if.c | 16 +- net/bridge/br_vlan.c | 11 +- net/bridge/netfilter/ebtables.c | 5 +- net/caif/caif_socket.c | 14 +- net/caif/cfctrl.c | 3 +- net/can/af_can.c | 6 +- net/can/bcm.c | 4 +- net/can/gw.c | 4 +- net/ceph/auth_none.c | 6 - net/ceph/auth_x.c | 256 +- net/ceph/crypto.c | 169 +- net/ceph/messenger.c | 31 +- net/ceph/mon_client.c | 16 +- net/ceph/osd_client.c | 202 +- net/ceph/osdmap.c | 4 +- net/compat.c | 33 +- net/core/datagram.c | 45 +- net/core/dev.c | 98 +- net/core/drop_monitor.c | 1 + net/core/dst.c | 16 +- net/core/ethtool.c | 2 +- net/core/fib_rules.c | 77 +- net/core/filter.c | 36 +- net/core/flow_dissector.c | 17 +- net/core/gen_stats.c | 15 +- net/core/iovec.c | 7 +- net/core/neighbour.c | 33 +- net/core/netpoll.c | 28 +- net/core/pktgen.c | 11 +- net/core/rtnetlink.c | 121 +- net/core/scm.c | 2 +- net/core/secure_seq.c | 50 +- net/core/skbuff.c | 78 +- net/core/sock.c | 59 +- net/core/sock_diag.c | 4 +- net/core/sysctl_net_core.c | 16 +- net/dcb/dcbnl.c | 2 +- net/dccp/ipv6.c | 1 - net/decnet/dn_dev.c | 4 +- net/decnet/dn_fib.c | 4 +- net/decnet/netfilter/dn_rtmsg.c | 2 +- net/dns_resolver/dns_query.c | 4 +- net/ieee802154/6lowpan.c | 24 +- net/ieee802154/dgram.c | 3 +- net/ieee802154/nl-phy.c | 6 +- net/ipv4/Makefile | 1 - net/ipv4/af_inet.c | 24 +- net/ipv4/datagram.c | 38 +- net/ipv4/devinet.c | 15 +- net/ipv4/fib_frontend.c | 5 +- net/ipv4/fib_rules.c | 4 - net/ipv4/fib_semantics.c | 5 +- net/ipv4/fib_trie.c | 5 +- net/ipv4/icmp.c | 18 +- net/ipv4/igmp.c | 18 +- net/ipv4/inet_connection_sock.c | 12 +- net/ipv4/inet_diag.c | 38 +- net/ipv4/inet_fragment.c | 5 +- net/ipv4/inet_hashtables.c | 2 +- net/ipv4/inetpeer.c | 18 + net/ipv4/ip_forward.c | 77 +- net/ipv4/ip_fragment.c | 18 +- net/ipv4/ip_gre.c | 16 +- net/ipv4/ip_input.c | 9 +- net/ipv4/ip_options.c | 4 - net/ipv4/ip_output.c | 61 +- net/ipv4/ip_sockglue.c | 11 +- net/ipv4/ip_tunnel.c | 128 +- net/ipv4/ip_vti.c | 24 +- net/ipv4/ipip.c | 19 +- net/ipv4/ipmr.c | 24 +- net/ipv4/netfilter/Kconfig | 12 - net/ipv4/netfilter/arp_tables.c | 6 +- net/ipv4/netfilter/ip_tables.c | 6 +- net/ipv4/netfilter/ipt_REJECT.c | 8 - net/ipv4/netfilter/ipt_ULOG.c | 7 +- net/ipv4/netfilter/ipt_rpfilter.c | 5 +- net/ipv4/netfilter/nf_defrag_ipv4.c | 5 +- net/ipv4/ping.c | 610 +-- net/ipv4/raw.c | 11 +- net/ipv4/route.c | 147 +- net/ipv4/syncookies.c | 6 +- net/ipv4/sysctl_net_ipv4.c | 54 +- net/ipv4/sysfs_net_ipv4.c | 88 - net/ipv4/tcp.c | 181 +- net/ipv4/tcp_cubic.c | 14 +- net/ipv4/tcp_illinois.c | 1 + net/ipv4/tcp_input.c | 83 +- net/ipv4/tcp_ipv4.c | 47 +- net/ipv4/tcp_metrics.c | 56 +- net/ipv4/tcp_output.c | 220 +- net/ipv4/tcp_vegas.c | 3 +- net/ipv4/tcp_veno.c | 2 +- net/ipv4/udp.c | 26 +- net/ipv4/udp_diag.c | 4 +- net/ipv4/xfrm4_mode_tunnel.c | 2 +- net/ipv4/xfrm4_policy.c | 2 +- net/ipv6/Makefile | 2 +- net/ipv6/addrconf.c | 201 +- net/ipv6/addrlabel.c | 48 +- net/ipv6/af_inet6.c | 50 +- net/ipv6/ah6.c | 2 +- net/ipv6/anycast.c | 21 - net/ipv6/datagram.c | 34 +- net/ipv6/esp6.c | 2 +- net/ipv6/exthdrs.c | 6 + net/ipv6/exthdrs_core.c | 15 +- net/ipv6/exthdrs_offload.c | 6 +- net/ipv6/icmp.c | 39 +- net/ipv6/inet6_connection_sock.c | 4 +- net/ipv6/inet6_hashtables.c | 2 +- net/ipv6/ip6_fib.c | 106 +- net/ipv6/ip6_flowlabel.c | 2 - net/ipv6/ip6_gre.c | 30 +- net/ipv6/ip6_input.c | 8 +- net/ipv6/ip6_output.c | 123 +- net/ipv6/ip6_tunnel.c | 28 +- net/ipv6/ip6mr.c | 29 +- net/ipv6/ipcomp6.c | 2 +- net/ipv6/mcast.c | 33 +- net/ipv6/ndisc.c | 27 +- net/ipv6/netfilter.c | 6 +- net/ipv6/netfilter/Kconfig | 12 - net/ipv6/netfilter/ip6_tables.c | 6 +- net/ipv6/netfilter/ip6t_REJECT.c | 9 - .../netfilter/nf_conntrack_l3proto_ipv6.c | 54 +- net/ipv6/netfilter/nf_conntrack_reasm.c | 19 +- net/ipv6/netfilter/nf_defrag_ipv6_hooks.c | 7 +- net/ipv6/output_core.c | 28 + net/ipv6/ping.c | 224 - net/ipv6/raw.c | 11 +- net/ipv6/reassembly.c | 5 - net/ipv6/route.c | 275 +- net/ipv6/sit.c | 108 +- net/ipv6/syncookies.c | 5 +- net/ipv6/sysctl_net_ipv6.c | 7 - net/ipv6/tcp_ipv6.c | 10 +- net/ipv6/udp.c | 23 +- net/ipv6/udp_offload.c | 4 +- net/ipv6/xfrm6_policy.c | 2 +- net/ipx/af_ipx.c | 9 +- net/irda/af_irda.c | 4 + net/irda/ircomm/ircomm_tty.c | 4 +- net/iucv/af_iucv.c | 4 +- net/key/af_key.c | 5 +- net/l2tp/l2tp_core.c | 47 +- net/l2tp/l2tp_core.h | 3 - net/l2tp/l2tp_ip.c | 4 +- net/l2tp/l2tp_ip6.c | 2 +- net/l2tp/l2tp_ppp.c | 18 +- net/llc/af_llc.c | 7 +- net/llc/sysctl_net_llc.c | 8 +- net/mac80211/cfg.c | 48 +- net/mac80211/debugfs_netdev.c | 7 +- net/mac80211/ibss.c | 1 - net/mac80211/ieee80211_i.h | 28 +- net/mac80211/iface.c | 10 +- net/mac80211/key.c | 2 +- net/mac80211/main.c | 5 - net/mac80211/mesh_ps.c | 1 - net/mac80211/mlme.c | 106 +- net/mac80211/offchannel.c | 24 +- net/mac80211/pm.c | 13 +- net/mac80211/rate.c | 2 +- net/mac80211/rc80211_minstrel.c | 3 +- net/mac80211/rc80211_minstrel_ht.c | 13 +- net/mac80211/rx.c | 36 +- net/mac80211/scan.c | 19 - net/mac80211/sta_info.c | 6 - net/mac80211/sta_info.h | 7 +- net/mac80211/status.c | 3 - net/mac80211/tx.c | 29 +- net/mac80211/util.c | 4 - net/mac80211/wme.c | 5 - net/netfilter/Kconfig | 42 - net/netfilter/Makefile | 2 - net/netfilter/ipset/ip_set_core.c | 6 - net/netfilter/ipset/ip_set_hash_gen.h | 28 +- net/netfilter/ipvs/ip_vs_conn.c | 1 + net/netfilter/ipvs/ip_vs_core.c | 105 +- net/netfilter/ipvs/ip_vs_ftp.c | 10 +- net/netfilter/ipvs/ip_vs_pe_sip.c | 8 +- net/netfilter/ipvs/ip_vs_sync.c | 5 +- net/netfilter/ipvs/ip_vs_xmit.c | 5 +- net/netfilter/nf_conntrack_expect.c | 3 +- net/netfilter/nf_conntrack_h323_main.c | 4 +- net/netfilter/nf_conntrack_proto_dccp.c | 6 +- net/netfilter/nf_conntrack_proto_generic.c | 26 +- net/netfilter/nf_conntrack_proto_tcp.c | 6 - net/netfilter/nf_nat_core.c | 35 +- net/netfilter/nf_nat_irc.c | 32 +- net/netfilter/nfnetlink.c | 2 +- net/netfilter/nfnetlink_cthelper.c | 7 +- net/netfilter/nfnetlink_log.c | 31 +- net/netfilter/nfnetlink_queue_core.c | 31 +- net/netfilter/xt_IDLETIMER.c | 247 +- net/netfilter/xt_qtaguid.c | 3017 ------------- net/netfilter/xt_qtaguid_internal.h | 352 -- net/netfilter/xt_qtaguid_print.c | 566 --- net/netfilter/xt_qtaguid_print.h | 120 - net/netfilter/xt_quota2.c | 385 -- net/netfilter/xt_socket.c | 70 +- net/netlink/af_netlink.c | 219 +- net/netlink/genetlink.c | 71 +- net/netrom/af_netrom.c | 3 +- net/nfc/llcp.h | 1 - net/nfc/llcp_sock.c | 10 +- net/nfc/rawsock.c | 2 + net/openvswitch/actions.c | 5 - net/packet/af_packet.c | 147 +- net/packet/diag.c | 7 +- net/packet/internal.h | 2 - net/phonet/datagram.c | 9 +- net/phonet/pn_netlink.c | 8 +- net/rds/ib.c | 3 +- net/rds/ib_rdma.c | 4 +- net/rds/ib_recv.c | 7 +- net/rds/ib_send.c | 5 +- net/rds/info.c | 2 +- net/rds/iw.c | 3 +- net/rds/iw_rdma.c | 40 +- net/rds/recv.c | 2 + net/rds/sysctl.c | 4 +- net/rfkill/Kconfig | 5 - net/rfkill/core.c | 4 - net/rose/af_rose.c | 24 +- net/rxrpc/ar-recvmsg.c | 11 +- net/sched/act_api.c | 2 +- net/sched/cls_api.c | 2 +- net/sched/ematch.c | 1 - net/sched/sch_api.c | 57 +- net/sched/sch_atm.c | 1 - net/sched/sch_cbq.c | 1 - net/sched/sch_generic.c | 1 - net/sched/sch_htb.c | 17 +- net/sched/sch_qfq.c | 85 +- net/sctp/associola.c | 6 +- net/sctp/auth.c | 19 +- net/sctp/endpointola.c | 3 +- net/sctp/input.c | 3 +- net/sctp/inqueue.c | 33 +- net/sctp/ipv6.c | 44 +- net/sctp/output.c | 11 +- net/sctp/protocol.c | 71 +- net/sctp/sm_make_chunk.c | 140 +- net/sctp/sm_statefuns.c | 56 +- net/sctp/socket.c | 185 +- net/sctp/sysctl.c | 37 +- net/sctp/ulpevent.c | 122 +- net/socket.c | 58 +- net/sunrpc/auth_gss/gss_rpc_upcall.c | 29 +- net/sunrpc/auth_gss/gss_rpc_xdr.c | 73 +- net/sunrpc/auth_gss/gss_rpc_xdr.h | 5 +- net/sunrpc/backchannel_rqst.c | 2 +- net/sunrpc/cache.c | 2 +- net/sunrpc/clnt.c | 14 +- net/sunrpc/netns.h | 1 - net/sunrpc/rpcb_clnt.c | 48 +- net/sunrpc/sched.c | 2 +- net/sunrpc/svc_xprt.c | 2 - net/sunrpc/svcauth_unix.c | 2 + net/sunrpc/svcsock.c | 27 +- net/sunrpc/xdr.c | 9 +- net/sunrpc/xprt.c | 2 +- net/sunrpc/xprtrdma/svc_rdma_marshal.c | 20 +- net/sunrpc/xprtrdma/svc_rdma_transport.c | 1 - net/sunrpc/xprtsock.c | 34 +- net/sysctl_net.c | 4 +- net/tipc/bcast.c | 1 - net/tipc/netlink.c | 2 +- net/tipc/socket.c | 11 +- net/unix/af_unix.c | 76 +- net/unix/diag.c | 1 - net/vmw_vsock/af_vsock.c | 2 + net/vmw_vsock/vmci_transport.c | 2 + net/wireless/Kconfig | 11 - net/wireless/chan.c | 9 +- net/wireless/core.c | 1 - net/wireless/core.h | 4 +- net/wireless/ibss.c | 3 - net/wireless/nl80211.c | 361 +- net/wireless/radiotap.c | 11 +- net/wireless/scan.c | 6 +- net/wireless/sme.c | 6 - net/wireless/trace.h | 3 +- net/wireless/wext-compat.c | 2 - net/x25/af_x25.c | 18 +- net/xfrm/xfrm_user.c | 2 +- scripts/Makefile.headersinst | 20 +- scripts/Makefile.lib | 13 - scripts/Makefile.modinst | 2 +- scripts/gcc-goto.sh | 2 +- scripts/headers_install.sh | 7 +- scripts/kallsyms.c | 12 +- scripts/kconfig/confdata.c | 14 +- scripts/kconfig/expr.h | 3 - scripts/kconfig/lkc.h | 1 - scripts/kconfig/menu.c | 6 +- scripts/kconfig/streamline_config.pl | 2 +- scripts/kconfig/symbol.c | 11 - scripts/kernel-doc | 2 +- scripts/link-vmlinux.sh | 2 - scripts/mod/devicetable-offsets.c | 3 - scripts/mod/file2alias.c | 14 +- scripts/mod/modpost.c | 8 +- scripts/package/builddeb | 9 +- scripts/recordmcount.c | 7 - scripts/recordmcount.h | 4 +- scripts/recordmcount.pl | 6 +- scripts/sortextable.c | 5 - scripts/sortextable.h | 2 +- security/Kconfig | 2 +- security/apparmor/domain.c | 4 +- security/apparmor/include/apparmor.h | 1 + security/apparmor/lib.c | 32 + security/capability.c | 24 - security/commoncap.c | 14 - security/integrity/evm/evm_main.c | 15 +- security/integrity/ima/ima_crypto.c | 32 +- security/integrity/ima/ima_policy.c | 1 + security/keys/encrypted-keys/encrypted.c | 5 +- security/keys/gc.c | 4 +- security/lsm_audit.c | 15 - security/security.c | 20 - security/selinux/avc.c | 437 +- security/selinux/hooks.c | 433 +- security/selinux/include/avc.h | 9 +- security/selinux/include/classmap.h | 1 - security/selinux/include/netif.h | 6 +- security/selinux/include/netnode.h | 2 - security/selinux/include/netport.h | 2 - security/selinux/include/objsec.h | 7 +- security/selinux/include/security.h | 36 +- security/selinux/include/xfrm.h | 9 +- security/selinux/netif.c | 58 +- security/selinux/netlabel.c | 6 +- security/selinux/netnode.c | 15 +- security/selinux/netport.c | 15 +- security/selinux/nlmsgtab.c | 9 - security/selinux/selinuxfs.c | 8 +- security/selinux/ss/avtab.c | 94 +- security/selinux/ss/avtab.h | 25 +- security/selinux/ss/conditional.c | 32 +- security/selinux/ss/conditional.h | 6 +- security/selinux/ss/constraint.h | 1 - security/selinux/ss/policydb.c | 123 +- security/selinux/ss/policydb.h | 11 - security/selinux/ss/services.c | 206 +- security/selinux/ss/services.h | 6 - security/selinux/xfrm.c | 53 +- sound/arm/Kconfig | 15 +- sound/arm/pxa2xx-pcm-lib.c | 2 - sound/core/compress_offload.c | 64 +- sound/core/control.c | 82 +- sound/core/info.c | 4 +- sound/core/init.c | 1 - sound/core/pcm.c | 4 - sound/core/pcm_compat.c | 2 - sound/core/pcm_lib.c | 10 +- sound/core/pcm_native.c | 4 +- sound/core/seq/oss/seq_oss_init.c | 16 +- sound/core/seq/oss/seq_oss_midi.c | 2 +- sound/core/seq/seq_dummy.c | 31 + sound/i2c/other/ak4113.c | 17 +- sound/i2c/other/ak4114.c | 18 +- sound/isa/msnd/msnd_pinnacle.c | 4 +- sound/isa/opti9xx/opti92x-ad1848.c | 8 +- sound/oss/sequencer.c | 12 +- sound/pci/Kconfig | 16 +- sound/pci/asihpi/asihpi.c | 3 - sound/pci/atiixp.c | 2 - sound/pci/atiixp_modem.c | 2 - sound/pci/emu10k1/emu10k1.c | 6 +- sound/pci/emu10k1/emu10k1_callback.c | 10 +- sound/pci/emu10k1/emu10k1_main.c | 21 +- sound/pci/emu10k1/emupcm.c | 2 +- sound/pci/emu10k1/emuproc.c | 12 + sound/pci/emu10k1/memory.c | 11 +- sound/pci/hda/hda_auto_parser.c | 2 +- sound/pci/hda/hda_codec.c | 36 +- sound/pci/hda/hda_generic.c | 181 +- sound/pci/hda/hda_generic.h | 3 - sound/pci/hda/hda_intel.c | 8 - sound/pci/hda/hda_local.h | 10 +- sound/pci/hda/hda_proc.c | 38 +- sound/pci/hda/patch_analog.c | 30 +- sound/pci/hda/patch_ca0132.c | 75 +- sound/pci/hda/patch_cirrus.c | 6 +- sound/pci/hda/patch_conexant.c | 37 - sound/pci/hda/patch_hdmi.c | 185 +- sound/pci/hda/patch_realtek.c | 318 +- sound/pci/hda/patch_sigmatel.c | 97 +- sound/pci/hda/patch_via.c | 2 - sound/pci/ice1712/ice1712.c | 15 +- sound/pci/oxygen/virtuoso.c | 1 - sound/pci/oxygen/xonar_dg.c | 12 +- sound/pci/oxygen/xonar_pcm179x.c | 12 +- sound/pci/riptide/riptide.c | 27 +- sound/pci/rme9652/hdspm.c | 6 - sound/pci/rme9652/rme9652.c | 2 +- sound/soc/atmel/atmel-pcm-dma.c | 2 - sound/soc/atmel/atmel_ssc_dai.c | 18 +- sound/soc/blackfin/bf5xx-i2s.c | 1 - sound/soc/codecs/88pm860x-codec.c | 3 - sound/soc/codecs/ab8500-codec.c | 7 +- sound/soc/codecs/adau1701.c | 2 +- sound/soc/codecs/adav80x.c | 4 +- sound/soc/codecs/ak4641.c | 4 +- sound/soc/codecs/ak4642.c | 2 +- sound/soc/codecs/arizona.c | 4 - sound/soc/codecs/cs4271.c | 4 +- sound/soc/codecs/cs42l51.c | 9 +- sound/soc/codecs/cs42l52.c | 10 +- sound/soc/codecs/cs42l52.h | 2 +- sound/soc/codecs/cs42l73.c | 6 +- sound/soc/codecs/da732x.c | 12 - sound/soc/codecs/max98088.c | 2 +- sound/soc/codecs/max98090.c | 30 +- sound/soc/codecs/max98095.c | 4 +- sound/soc/codecs/mc13783.c | 8 +- sound/soc/codecs/sgtl5000.c | 16 +- sound/soc/codecs/sgtl5000.h | 4 +- sound/soc/codecs/sigmadsp.c | 7 - sound/soc/codecs/sta32x.c | 76 +- sound/soc/codecs/tas5086.c | 4 +- sound/soc/codecs/wm2000.c | 8 +- sound/soc/codecs/wm5110.c | 93 +- sound/soc/codecs/wm8731.c | 8 +- sound/soc/codecs/wm8737.c | 6 +- sound/soc/codecs/wm8770.c | 4 +- sound/soc/codecs/wm8903.c | 4 +- sound/soc/codecs/wm8903.h | 2 +- sound/soc/codecs/wm8904.c | 6 +- sound/soc/codecs/wm8955.c | 6 +- sound/soc/codecs/wm8958-dsp2.c | 2 +- sound/soc/codecs/wm8960.c | 16 +- sound/soc/codecs/wm8962.c | 41 +- sound/soc/codecs/wm8962.h | 4 - sound/soc/codecs/wm8990.c | 2 - sound/soc/codecs/wm8994.c | 2 +- sound/soc/codecs/wm_adsp.c | 13 +- sound/soc/codecs/wm_hubs.c | 1 - sound/soc/davinci/davinci-mcasp.c | 11 +- sound/soc/dwc/designware_i2s.c | 18 +- sound/soc/fsl/imx-pcm-fiq.c | 29 +- sound/soc/pxa/Kconfig | 2 + sound/soc/pxa/pxa-ssp.c | 4 +- sound/soc/s6000/s6000-pcm.c | 2 - sound/soc/samsung/i2s.c | 16 +- sound/soc/soc-compress.c | 314 +- sound/soc/soc-dapm.c | 9 +- sound/soc/soc-jack.c | 2 +- sound/soc/soc-pcm.c | 35 +- sound/soc/tegra/tegra20_ac97.c | 6 +- sound/soc/tegra/tegra20_i2s.c | 6 +- sound/soc/tegra/tegra20_spdif.c | 14 +- sound/soc/tegra/tegra30_i2s.c | 8 +- sound/synth/emux/emux_oss.c | 14 +- sound/synth/emux/emux_seq.c | 29 +- sound/usb/6fire/chip.c | 2 +- sound/usb/6fire/comm.c | 38 +- sound/usb/6fire/comm.h | 2 +- sound/usb/6fire/midi.c | 16 +- sound/usb/6fire/midi.h | 6 +- sound/usb/6fire/pcm.c | 55 +- sound/usb/6fire/pcm.h | 2 +- sound/usb/Kconfig | 1 - sound/usb/card.h | 1 - sound/usb/endpoint.c | 28 +- sound/usb/midi.c | 2 - sound/usb/misc/ua101.c | 14 +- sound/usb/mixer.c | 4 - sound/usb/mixer_maps.c | 47 - sound/usb/mixer_quirks.c | 7 - sound/usb/pcm.c | 3 +- sound/usb/quirks-table.h | 98 - sound/usb/quirks.c | 14 - sound/usb/usx2y/us122l.c | 4 +- sound/usb/usx2y/usbusx2yaudio.c | 26 +- sound/usb/usx2y/usx2yhwdeppcm.c | 7 +- tools/gator/daemon/Android.mk | 82 - tools/gator/daemon/AnnotateListener.cpp | 89 - tools/gator/daemon/AnnotateListener.h | 39 - tools/gator/daemon/Application.mk | 3 - tools/gator/daemon/Buffer.cpp | 459 -- tools/gator/daemon/Buffer.h | 109 - tools/gator/daemon/CCNDriver.cpp | 294 -- tools/gator/daemon/CCNDriver.h | 43 - tools/gator/daemon/COPYING | 339 -- tools/gator/daemon/CapturedXML.cpp | 144 - tools/gator/daemon/CapturedXML.h | 26 - tools/gator/daemon/Child.cpp | 393 -- tools/gator/daemon/Child.h | 33 - tools/gator/daemon/Command.cpp | 172 - tools/gator/daemon/Command.h | 14 - tools/gator/daemon/Config.h | 28 - tools/gator/daemon/ConfigurationXML.cpp | 217 - tools/gator/daemon/ConfigurationXML.h | 38 - tools/gator/daemon/Counter.h | 65 - tools/gator/daemon/DiskIODriver.cpp | 125 - tools/gator/daemon/DiskIODriver.h | 39 - tools/gator/daemon/Driver.cpp | 96 - tools/gator/daemon/Driver.h | 118 - tools/gator/daemon/DriverSource.cpp | 323 -- tools/gator/daemon/DriverSource.h | 57 - tools/gator/daemon/DynBuf.cpp | 139 - tools/gator/daemon/DynBuf.h | 52 - tools/gator/daemon/EventsXML.cpp | 231 - tools/gator/daemon/EventsXML.h | 28 - tools/gator/daemon/ExternalSource.cpp | 279 -- tools/gator/daemon/ExternalSource.h | 54 - tools/gator/daemon/FSDriver.cpp | 156 - tools/gator/daemon/FSDriver.h | 29 - tools/gator/daemon/Fifo.cpp | 127 - tools/gator/daemon/Fifo.h | 48 - tools/gator/daemon/FtraceDriver.cpp | 195 - tools/gator/daemon/FtraceDriver.h | 33 - tools/gator/daemon/FtraceSource.cpp | 188 - tools/gator/daemon/FtraceSource.h | 43 - tools/gator/daemon/HwmonDriver.cpp | 245 -- tools/gator/daemon/HwmonDriver.h | 31 - tools/gator/daemon/KMod.cpp | 119 - tools/gator/daemon/KMod.h | 32 - tools/gator/daemon/LocalCapture.cpp | 131 - tools/gator/daemon/LocalCapture.h | 26 - tools/gator/daemon/Logging.cpp | 78 - tools/gator/daemon/Logging.h | 40 - tools/gator/daemon/Makefile | 22 - tools/gator/daemon/Makefile_aarch64 | 12 - tools/gator/daemon/MaliVideoDriver.cpp | 191 - tools/gator/daemon/MaliVideoDriver.h | 45 - tools/gator/daemon/MemInfoDriver.cpp | 93 - tools/gator/daemon/MemInfoDriver.h | 37 - tools/gator/daemon/Monitor.cpp | 82 - tools/gator/daemon/Monitor.h | 33 - tools/gator/daemon/NetDriver.cpp | 129 - tools/gator/daemon/NetDriver.h | 39 - tools/gator/daemon/OlySocket.cpp | 331 -- tools/gator/daemon/OlySocket.h | 64 - tools/gator/daemon/OlyUtility.cpp | 227 - tools/gator/daemon/OlyUtility.h | 42 - tools/gator/daemon/PerfBuffer.cpp | 223 - tools/gator/daemon/PerfBuffer.h | 42 - tools/gator/daemon/PerfDriver.cpp | 409 -- tools/gator/daemon/PerfDriver.h | 59 - tools/gator/daemon/PerfGroup.cpp | 358 -- tools/gator/daemon/PerfGroup.h | 74 - tools/gator/daemon/PerfSource.cpp | 447 -- tools/gator/daemon/PerfSource.h | 54 - tools/gator/daemon/Proc.cpp | 312 -- tools/gator/daemon/Proc.h | 21 - tools/gator/daemon/Sender.cpp | 129 - tools/gator/daemon/Sender.h | 42 - tools/gator/daemon/SessionData.cpp | 292 -- tools/gator/daemon/SessionData.h | 103 - tools/gator/daemon/SessionXML.cpp | 111 - tools/gator/daemon/SessionXML.h | 42 - tools/gator/daemon/Setup.cpp | 324 -- tools/gator/daemon/Setup.h | 18 - tools/gator/daemon/Source.cpp | 33 - tools/gator/daemon/Source.h | 40 - tools/gator/daemon/StreamlineSetup.cpp | 272 -- tools/gator/daemon/StreamlineSetup.h | 50 - tools/gator/daemon/UEvent.cpp | 78 - tools/gator/daemon/UEvent.h | 36 - tools/gator/daemon/UserSpaceSource.cpp | 97 - tools/gator/daemon/UserSpaceSource.h | 38 - tools/gator/daemon/c++.cpp | 40 - tools/gator/daemon/common.mk | 55 - tools/gator/daemon/defaults.xml | 73 - tools/gator/daemon/escape.c | 75 - tools/gator/daemon/events-ARM11.xml | 39 - tools/gator/daemon/events-ARM11MPCore.xml | 26 - tools/gator/daemon/events-CCI-400.xml | 98 - tools/gator/daemon/events-CCI-500.xml | 75 - tools/gator/daemon/events-CCN-504.xml | 113 - tools/gator/daemon/events-Cortex-A15.xml | 70 - tools/gator/daemon/events-Cortex-A17.xml | 85 - tools/gator/daemon/events-Cortex-A5.xml | 36 - tools/gator/daemon/events-Cortex-A53.xml | 64 - tools/gator/daemon/events-Cortex-A57.xml | 87 - tools/gator/daemon/events-Cortex-A7.xml | 44 - tools/gator/daemon/events-Cortex-A72.xml | 87 - tools/gator/daemon/events-Cortex-A8.xml | 52 - tools/gator/daemon/events-Cortex-A9.xml | 65 - tools/gator/daemon/events-Filesystem.xml | 10 - .../gator/daemon/events-Krait-architected.xml | 22 - tools/gator/daemon/events-L2C-310.xml | 18 - tools/gator/daemon/events-Linux.xml | 17 - tools/gator/daemon/events-Mali-4xx.xml | 245 -- tools/gator/daemon/events-Mali-Midgard.xml | 49 - tools/gator/daemon/events-Mali-Midgard_hw.xml | 98 - tools/gator/daemon/events-Mali-T60x_hw.xml | 116 - tools/gator/daemon/events-Mali-T62x_hw.xml | 116 - tools/gator/daemon/events-Mali-T72x_hw.xml | 101 - tools/gator/daemon/events-Mali-T76x_hw.xml | 117 - tools/gator/daemon/events-Mali-T82x_hw.xml | 108 - tools/gator/daemon/events-Mali-T83x_hw.xml | 108 - tools/gator/daemon/events-Mali-T86x_hw.xml | 117 - tools/gator/daemon/events-Mali-T88x_hw.xml | 117 - tools/gator/daemon/events-Mali-V500.xml | 30 - tools/gator/daemon/events-Other.xml | 33 - tools/gator/daemon/events-Perf-Hardware.xml | 12 - tools/gator/daemon/events-Scorpion.xml | 107 - tools/gator/daemon/events-ScorpionMP.xml | 90 - tools/gator/daemon/events-ftrace.xml | 22 - tools/gator/daemon/events_footer.xml | 1 - tools/gator/daemon/events_header.xml | 2 - tools/gator/daemon/k/perf_event.3.12.h | 792 ---- tools/gator/daemon/k/perf_event.h | 1 - tools/gator/daemon/libsensors/COPYING.LGPL | 502 --- tools/gator/daemon/libsensors/access.c | 561 --- tools/gator/daemon/libsensors/access.h | 33 - tools/gator/daemon/libsensors/conf-lex.c | 2881 ------------- tools/gator/daemon/libsensors/conf-lex.l | 372 -- tools/gator/daemon/libsensors/conf-parse.c | 2042 --------- tools/gator/daemon/libsensors/conf-parse.h | 84 - tools/gator/daemon/libsensors/conf-parse.y | 347 -- tools/gator/daemon/libsensors/conf.h | 34 - tools/gator/daemon/libsensors/data.c | 278 -- tools/gator/daemon/libsensors/data.h | 184 - tools/gator/daemon/libsensors/error.c | 92 - tools/gator/daemon/libsensors/error.h | 74 - tools/gator/daemon/libsensors/general.c | 85 - tools/gator/daemon/libsensors/general.h | 39 - tools/gator/daemon/libsensors/init.c | 341 -- tools/gator/daemon/libsensors/init.h | 28 - tools/gator/daemon/libsensors/scanner.h | 32 - tools/gator/daemon/libsensors/sensors.h | 311 -- tools/gator/daemon/libsensors/sysfs.c | 926 ---- tools/gator/daemon/libsensors/sysfs.h | 43 - tools/gator/daemon/libsensors/version.h | 1 - tools/gator/daemon/main.cpp | 624 --- tools/gator/daemon/mxml/COPYING | 507 --- tools/gator/daemon/mxml/config.h | 96 - tools/gator/daemon/mxml/mxml-attr.c | 314 -- tools/gator/daemon/mxml/mxml-entity.c | 449 -- tools/gator/daemon/mxml/mxml-file.c | 3056 -------------- tools/gator/daemon/mxml/mxml-get.c | 452 -- tools/gator/daemon/mxml/mxml-index.c | 659 --- tools/gator/daemon/mxml/mxml-node.c | 788 ---- tools/gator/daemon/mxml/mxml-private.c | 323 -- tools/gator/daemon/mxml/mxml-private.h | 50 - tools/gator/daemon/mxml/mxml-search.c | 280 -- tools/gator/daemon/mxml/mxml-set.c | 337 -- tools/gator/daemon/mxml/mxml-string.c | 469 --- tools/gator/daemon/mxml/mxml.h | 332 -- tools/hv/hv_kvp_daemon.c | 5 +- tools/lib/lk/Makefile | 3 - tools/lib/lk/debugfs.c | 1 + tools/perf/builtin-kmem.c | 2 +- tools/perf/config/utilities.mak | 2 +- tools/perf/ui/hist.c | 2 +- tools/perf/util/color.c | 11 +- tools/perf/util/color.h | 2 +- tools/perf/util/evsel.c | 2 +- tools/perf/util/header.c | 4 +- tools/perf/util/hist.h | 1 - tools/perf/util/map.c | 1 - .../util/scripting-engines/trace-event-perl.c | 2 +- tools/perf/util/session.c | 12 +- tools/power/cpupower/utils/cpupower-set.c | 6 +- tools/power/x86/turbostat/Makefile | 8 +- tools/power/x86/turbostat/turbostat.c | 13 +- tools/testing/selftests/Makefile | 1 - tools/testing/selftests/mount/Makefile | 17 - .../mount/unprivileged-remount-test.c | 370 -- tools/usb/ffs-test.c | 4 +- virt/kvm/Kconfig | 10 - virt/kvm/arm/arch_timer.c | 318 -- virt/kvm/arm/vgic-v2.c | 265 -- virt/kvm/arm/vgic-v3.c | 247 -- virt/kvm/arm/vgic.c | 2464 ----------- virt/kvm/async_pf.c | 60 +- virt/kvm/coalesced_mmio.c | 8 +- virt/kvm/eventfd.c | 154 +- virt/kvm/ioapic.c | 11 +- virt/kvm/ioapic.h | 1 + virt/kvm/iommu.c | 41 +- virt/kvm/irq_comm.c | 41 +- virt/kvm/irqchip.c | 107 +- virt/kvm/kvm_main.c | 399 +- virt/kvm/vfio.c | 228 - 4632 files changed, 30989 insertions(+), 222454 deletions(-) delete mode 100644 Documentation/ABI/testing/sysfs-class-dual-role-usb delete mode 100644 Documentation/ABI/testing/sysfs-firmware-ofw delete mode 100644 Documentation/ABI/testing/sysfs-kernel-wakeup_reasons delete mode 100644 Documentation/android.txt delete mode 100644 Documentation/arm/small_task_packing.txt delete mode 100644 Documentation/arm64/tagged-pointers.txt delete mode 100644 Documentation/blockdev/zram.txt delete mode 100644 Documentation/devicetree/bindings/arm/cci.txt delete mode 100644 Documentation/devicetree/bindings/arm/coresight.txt delete mode 100644 Documentation/devicetree/bindings/arm/rtsm-dcscb.txt delete mode 100644 Documentation/devicetree/bindings/mailbox/mailbox.txt delete mode 100644 Documentation/devicetree/bindings/mfd/vexpress-spc.txt delete mode 100644 Documentation/devicetree/bindings/power/power_domain.txt delete mode 100644 Documentation/devicetree/bindings/thermal/thermal.txt delete mode 100644 Documentation/devicetree/changesets.txt delete mode 100644 Documentation/devicetree/dynamic-resolution-notes.txt delete mode 100644 Documentation/devicetree/overlay-notes.txt delete mode 100644 Documentation/lzo.txt delete mode 100644 Documentation/mailbox.txt delete mode 100644 Documentation/sync.txt delete mode 100644 Documentation/trace/coresight.txt delete mode 100644 Documentation/virtual/kvm/devices/arm-vgic.txt delete mode 100644 Documentation/virtual/kvm/devices/vfio.txt delete mode 100644 android/configs/README delete mode 100644 android/configs/android-base.cfg delete mode 100644 android/configs/android-recommended.cfg delete mode 100644 arch/arm/boot/dts/clcd-panels.dtsi delete mode 100644 arch/arm/boot/dts/hip04.dtsi delete mode 100644 arch/arm/boot/dts/rtsm_ve-cortex_a15x1.dts delete mode 100644 arch/arm/boot/dts/rtsm_ve-cortex_a15x2.dts delete mode 100644 arch/arm/boot/dts/rtsm_ve-cortex_a15x4.dts delete mode 100644 arch/arm/boot/dts/rtsm_ve-cortex_a9x2.dts delete mode 100644 arch/arm/boot/dts/rtsm_ve-cortex_a9x4.dts delete mode 100644 arch/arm/boot/dts/rtsm_ve-motherboard.dtsi delete mode 100644 arch/arm/boot/dts/rtsm_ve-v2p-ca15x1-ca7x1.dts delete mode 100644 arch/arm/boot/dts/rtsm_ve-v2p-ca15x4-ca7x4.dts delete mode 100644 arch/arm/common/bL_switcher.c delete mode 100644 arch/arm/common/bL_switcher_dummy_if.c delete mode 100644 arch/arm/common/fiq_glue.S delete mode 100644 arch/arm/common/fiq_glue_setup.c delete mode 100644 arch/arm/crypto/.gitignore delete mode 100644 arch/arm/crypto/aes_glue.h delete mode 100644 arch/arm/crypto/aesbs-core.S_shipped delete mode 100644 arch/arm/crypto/aesbs-glue.c delete mode 100644 arch/arm/crypto/bsaes-armv7.pl delete mode 100644 arch/arm/crypto/sha1-armv7-neon.S delete mode 100644 arch/arm/crypto/sha1_neon_glue.c delete mode 100644 arch/arm/crypto/sha256-armv4.pl delete mode 100644 arch/arm/crypto/sha256-core.S_shipped delete mode 100644 arch/arm/crypto/sha256_glue.c delete mode 100644 arch/arm/crypto/sha256_glue.h delete mode 100644 arch/arm/crypto/sha256_neon_glue.c delete mode 100644 arch/arm/crypto/sha512-armv7-neon.S delete mode 100644 arch/arm/crypto/sha512_neon_glue.c delete mode 100644 arch/arm/include/asm/bL_switcher.h delete mode 100644 arch/arm/include/asm/crypto/sha1.h delete mode 100644 arch/arm/include/asm/fiq_glue.h delete mode 100644 arch/arm/include/asm/hardware/cp14.h delete mode 100644 arch/arm/include/asm/hugetlb-3level.h delete mode 100644 arch/arm/include/asm/hugetlb.h delete mode 100644 arch/arm/include/asm/mach/mmc.h delete mode 100644 arch/arm/include/asm/neon.h delete mode 100644 arch/arm/include/asm/rodata.h delete mode 100644 arch/arm/kernel/psci_smp.c delete mode 100644 arch/arm/kernel/sigreturn_codes.S delete mode 100644 arch/arm/kvm/coproc_a7.c delete mode 100644 arch/arm/mach-at91/sysirq_mask.c delete mode 100644 arch/arm/mach-vexpress/dcscb.c delete mode 100644 arch/arm/mach-vexpress/dcscb_setup.S delete mode 100644 arch/arm/mach-vexpress/include/mach/tc2.h delete mode 100644 arch/arm/mach-vexpress/tc2_pm.c delete mode 100644 arch/arm/mach-vexpress/tc2_pm_psci.c delete mode 100644 arch/arm/mach-vexpress/tc2_pm_setup.S delete mode 100644 arch/arm/mm/hugetlbpage.c delete mode 100644 arch/arm/mm/rodata.c delete mode 100644 arch/arm64/boot/dts/apm-mustang.dts delete mode 100644 arch/arm64/boot/dts/apm-storm.dtsi delete mode 100644 arch/arm64/boot/dts/clcd-panels.dtsi delete mode 100644 arch/arm64/boot/dts/fvp-base-gicv2-psci.dts delete mode 100644 arch/arm64/boot/dts/juno.dts delete mode 100644 arch/arm64/crypto/Kconfig delete mode 100644 arch/arm64/crypto/Makefile delete mode 100644 arch/arm64/crypto/aes-ce-ccm-core.S delete mode 100644 arch/arm64/crypto/aes-ce-ccm-glue.c delete mode 100644 arch/arm64/crypto/aes-ce-cipher.c delete mode 100644 arch/arm64/crypto/aes-ce-setkey.h delete mode 100644 arch/arm64/crypto/aes-ce.S delete mode 100644 arch/arm64/crypto/aes-glue.c delete mode 100644 arch/arm64/crypto/aes-modes.S delete mode 100644 arch/arm64/crypto/aes-neon.S delete mode 100644 arch/arm64/crypto/ghash-ce-core.S delete mode 100644 arch/arm64/crypto/ghash-ce-glue.c delete mode 100644 arch/arm64/crypto/sha1-ce-core.S delete mode 100644 arch/arm64/crypto/sha1-ce-glue.c delete mode 100644 arch/arm64/crypto/sha2-ce-core.S delete mode 100644 arch/arm64/crypto/sha2-ce-glue.c delete mode 100644 arch/arm64/include/asm/bL_switcher.h delete mode 100644 arch/arm64/include/asm/cpu_ops.h delete mode 100644 arch/arm64/include/asm/cpufeature.h delete mode 100644 arch/arm64/include/asm/cpuidle.h delete mode 100644 arch/arm64/include/asm/dma-contiguous.h delete mode 100644 arch/arm64/include/asm/efi.h delete mode 100644 arch/arm64/include/asm/fixmap.h delete mode 100644 arch/arm64/include/asm/ftrace.h delete mode 100644 arch/arm64/include/asm/hugetlb.h delete mode 100644 arch/arm64/include/asm/insn.h delete mode 100644 arch/arm64/include/asm/jump_label.h delete mode 100644 arch/arm64/include/asm/kgdb.h delete mode 100644 arch/arm64/include/asm/kvm_arm.h delete mode 100644 arch/arm64/include/asm/kvm_asm.h delete mode 100644 arch/arm64/include/asm/kvm_coproc.h delete mode 100644 arch/arm64/include/asm/kvm_emulate.h delete mode 100644 arch/arm64/include/asm/kvm_host.h delete mode 100644 arch/arm64/include/asm/kvm_mmio.h delete mode 100644 arch/arm64/include/asm/kvm_mmu.h delete mode 100644 arch/arm64/include/asm/kvm_psci.h delete mode 100644 arch/arm64/include/asm/neon.h delete mode 100644 arch/arm64/include/asm/opcodes.h delete mode 100644 arch/arm64/include/asm/percpu.h delete mode 100644 arch/arm64/include/asm/seccomp.h delete mode 100644 arch/arm64/include/asm/stackprotector.h delete mode 100644 arch/arm64/include/asm/suspend.h delete mode 100644 arch/arm64/include/asm/sysreg.h delete mode 100644 arch/arm64/include/asm/topology.h delete mode 100644 arch/arm64/include/asm/word-at-a-time.h delete mode 100644 arch/arm64/include/uapi/asm/kvm.h delete mode 100644 arch/arm64/include/uapi/asm/perf_regs.h delete mode 100644 arch/arm64/kernel/cpu_ops.c delete mode 100644 arch/arm64/kernel/cpuidle.c delete mode 100644 arch/arm64/kernel/efi-entry.S delete mode 100644 arch/arm64/kernel/efi-stub.c delete mode 100644 arch/arm64/kernel/efi.c delete mode 100644 arch/arm64/kernel/entry-ftrace.S delete mode 100644 arch/arm64/kernel/ftrace.c delete mode 100644 arch/arm64/kernel/insn.c delete mode 100644 arch/arm64/kernel/jump_label.c delete mode 100644 arch/arm64/kernel/kgdb.c delete mode 100644 arch/arm64/kernel/opcodes.c delete mode 100644 arch/arm64/kernel/perf_regs.c delete mode 100644 arch/arm64/kernel/psci-call.S delete mode 100644 arch/arm64/kernel/return_address.c delete mode 100644 arch/arm64/kernel/sleep.S delete mode 100644 arch/arm64/kernel/suspend.c delete mode 100644 arch/arm64/kernel/swp_emulate.c delete mode 100644 arch/arm64/kernel/topology.c delete mode 100644 arch/arm64/kvm/Kconfig delete mode 100644 arch/arm64/kvm/Makefile delete mode 100644 arch/arm64/kvm/emulate.c delete mode 100644 arch/arm64/kvm/guest.c delete mode 100644 arch/arm64/kvm/handle_exit.c delete mode 100644 arch/arm64/kvm/hyp-init.S delete mode 100644 arch/arm64/kvm/hyp.S delete mode 100644 arch/arm64/kvm/inject_fault.c delete mode 100644 arch/arm64/kvm/regmap.c delete mode 100644 arch/arm64/kvm/reset.c delete mode 100644 arch/arm64/kvm/sys_regs.c delete mode 100644 arch/arm64/kvm/sys_regs.h delete mode 100644 arch/arm64/kvm/sys_regs_generic_v8.c delete mode 100644 arch/arm64/kvm/vgic-v2-switch.S delete mode 100644 arch/arm64/kvm/vgic-v3-switch.S delete mode 100644 arch/arm64/lib/memcmp.S delete mode 100644 arch/arm64/lib/strcmp.S delete mode 100644 arch/arm64/lib/strlen.S delete mode 100644 arch/arm64/lib/strncmp.S delete mode 100644 arch/arm64/lib/strnlen.S delete mode 100644 arch/arm64/mm/hugetlbpage.c delete mode 100644 arch/arm64/mm/pageattr.c delete mode 100644 arch/parisc/include/asm/socket.h delete mode 100644 arch/um/kernel/maccess.c delete mode 100644 arch/x86/include/asm/espfix.h delete mode 100644 arch/x86/kernel/espfix_64.c create mode 100644 arch/xtensa/include/asm/ftrace.h delete mode 100644 crypto/ablk_helper.c delete mode 100644 drivers/acpi/acpi_cmos_rtc.c delete mode 100644 drivers/android/Kconfig delete mode 100644 drivers/android/Makefile delete mode 100644 drivers/android/binder.c delete mode 100644 drivers/android/binder_trace.h delete mode 100644 drivers/block/zram/Kconfig delete mode 100644 drivers/block/zram/Makefile delete mode 100644 drivers/block/zram/zcomp.c delete mode 100644 drivers/block/zram/zcomp.h delete mode 100644 drivers/block/zram/zcomp_lz4.c delete mode 100644 drivers/block/zram/zcomp_lz4.h delete mode 100644 drivers/block/zram/zcomp_lzo.c delete mode 100644 drivers/block/zram/zcomp_lzo.h delete mode 100644 drivers/block/zram/zram_drv.c delete mode 100644 drivers/block/zram/zram_drv.h delete mode 100644 drivers/bus/arm-cci.c delete mode 100644 drivers/char/dcc_tty.c delete mode 100644 drivers/clk/versatile/clk-vexpress-spc.c delete mode 100644 drivers/coresight/Makefile delete mode 100644 drivers/coresight/coresight-etb10.c delete mode 100644 drivers/coresight/coresight-etm-cp14.c delete mode 100644 drivers/coresight/coresight-etm.h delete mode 100644 drivers/coresight/coresight-etm3x.c delete mode 100644 drivers/coresight/coresight-funnel.c delete mode 100644 drivers/coresight/coresight-priv.h delete mode 100644 drivers/coresight/coresight-replicator.c delete mode 100644 drivers/coresight/coresight-tmc.c delete mode 100644 drivers/coresight/coresight-tpiu.c delete mode 100644 drivers/coresight/coresight.c delete mode 100644 drivers/coresight/of_coresight.c delete mode 100644 drivers/cpufreq/cpufreq_interactive.c delete mode 100644 drivers/cpufreq/vexpress_big_little.c delete mode 100644 drivers/cpuidle/Kconfig.arm64 delete mode 100644 drivers/cpuidle/arm_big_little.c delete mode 100644 drivers/cpuidle/cpuidle-arm64.c delete mode 100644 drivers/cpuidle/dt_idle_states.c delete mode 100644 drivers/cpuidle/dt_idle_states.h delete mode 100644 drivers/firmware/efi/arm-stub.c delete mode 100644 drivers/firmware/efi/efi-stub-helper.c delete mode 100644 drivers/firmware/efi/fdt.c delete mode 100644 drivers/gator/COPYING delete mode 100644 drivers/gator/Kconfig delete mode 100644 drivers/gator/Makefile delete mode 100644 drivers/gator/gator.h delete mode 100644 drivers/gator/gator_annotate.c delete mode 100644 drivers/gator/gator_annotate_kernel.c delete mode 100644 drivers/gator/gator_backtrace.c delete mode 100644 drivers/gator/gator_buffer.c delete mode 100644 drivers/gator/gator_buffer_write.c delete mode 100644 drivers/gator/gator_cookies.c delete mode 100644 drivers/gator/gator_events_armv6.c delete mode 100644 drivers/gator/gator_events_armv7.c delete mode 100644 drivers/gator/gator_events_block.c delete mode 100644 drivers/gator/gator_events_irq.c delete mode 100644 drivers/gator/gator_events_l2c-310.c delete mode 100644 drivers/gator/gator_events_mali_4xx.c delete mode 100644 drivers/gator/gator_events_mali_4xx.h delete mode 100644 drivers/gator/gator_events_mali_common.c delete mode 100644 drivers/gator/gator_events_mali_common.h delete mode 100644 drivers/gator/gator_events_mali_midgard.c delete mode 100644 drivers/gator/gator_events_mali_midgard_hw.c delete mode 100644 drivers/gator/gator_events_mali_midgard_hw_test.c delete mode 100644 drivers/gator/gator_events_meminfo.c delete mode 100644 drivers/gator/gator_events_mmapped.c delete mode 100644 drivers/gator/gator_events_net.c delete mode 100644 drivers/gator/gator_events_perf_pmu.c delete mode 100644 drivers/gator/gator_events_sched.c delete mode 100644 drivers/gator/gator_events_scorpion.c delete mode 100644 drivers/gator/gator_fs.c delete mode 100644 drivers/gator/gator_hrtimer_gator.c delete mode 100644 drivers/gator/gator_iks.c delete mode 100644 drivers/gator/gator_main.c delete mode 100644 drivers/gator/gator_marshaling.c delete mode 100644 drivers/gator/gator_trace_gpu.c delete mode 100644 drivers/gator/gator_trace_power.c delete mode 100644 drivers/gator/gator_trace_sched.c delete mode 100644 drivers/gator/mali/mali_mjollnir_profiling_gator_api.h delete mode 100644 drivers/gator/mali/mali_utgard_profiling_gator_api.h delete mode 100644 drivers/gator/mali_midgard.mk delete mode 100644 drivers/input/keycombo.c delete mode 100644 drivers/input/keyreset.c delete mode 100644 drivers/input/misc/gpio_axis.c delete mode 100644 drivers/input/misc/gpio_event.c delete mode 100644 drivers/input/misc/gpio_input.c delete mode 100644 drivers/input/misc/gpio_matrix.c delete mode 100644 drivers/input/misc/gpio_output.c delete mode 100644 drivers/input/misc/keychord.c delete mode 100644 drivers/irqchip/irq-gic-common.c delete mode 100644 drivers/irqchip/irq-gic-common.h delete mode 100644 drivers/irqchip/irq-gic-v3.c delete mode 100644 drivers/mailbox/mailbox.c delete mode 100644 drivers/md/dm-builtin.c delete mode 100644 drivers/mfd/vexpress-spc.c delete mode 100644 drivers/misc/uid_cputime.c delete mode 100644 drivers/misc/uid_stat.c mode change 100755 => 100644 drivers/mmc/core/sdio_io.c delete mode 100644 drivers/net/ppp/pppolac.c delete mode 100644 drivers/net/ppp/pppopns.c delete mode 100644 drivers/of/dynamic.c delete mode 100644 drivers/of/of_reserved_mem.c delete mode 100644 drivers/of/overlay.c delete mode 100644 drivers/of/resolver.c delete mode 100644 drivers/of/testcase-data/testcases.dtsi delete mode 100644 drivers/pinctrl/pinctrl-utils.c delete mode 100644 drivers/pinctrl/pinctrl-utils.h create mode 100644 drivers/staging/android/TODO delete mode 100644 drivers/staging/android/fiq_debugger/Kconfig delete mode 100644 drivers/staging/android/fiq_debugger/Makefile delete mode 100644 drivers/staging/android/fiq_debugger/fiq_debugger.c delete mode 100644 drivers/staging/android/fiq_debugger/fiq_debugger.h delete mode 100644 drivers/staging/android/fiq_debugger/fiq_debugger_arm.c delete mode 100644 drivers/staging/android/fiq_debugger/fiq_debugger_arm64.c delete mode 100644 drivers/staging/android/fiq_debugger/fiq_debugger_priv.h delete mode 100644 drivers/staging/android/fiq_debugger/fiq_debugger_ringbuf.h delete mode 100644 drivers/staging/android/fiq_debugger/fiq_watchdog.c delete mode 100644 drivers/staging/android/fiq_debugger/fiq_watchdog.h delete mode 100644 drivers/staging/android/ion/Kconfig delete mode 100644 drivers/staging/android/ion/Makefile delete mode 100644 drivers/staging/android/ion/compat_ion.c delete mode 100644 drivers/staging/android/ion/compat_ion.h delete mode 100644 drivers/staging/android/ion/ion.c delete mode 100644 drivers/staging/android/ion/ion.h delete mode 100644 drivers/staging/android/ion/ion_carveout_heap.c delete mode 100644 drivers/staging/android/ion/ion_chunk_heap.c delete mode 100644 drivers/staging/android/ion/ion_cma_heap.c delete mode 100644 drivers/staging/android/ion/ion_dummy_driver.c delete mode 100644 drivers/staging/android/ion/ion_heap.c delete mode 100644 drivers/staging/android/ion/ion_page_pool.c delete mode 100644 drivers/staging/android/ion/ion_priv.h delete mode 100644 drivers/staging/android/ion/ion_system_heap.c delete mode 100644 drivers/staging/android/ion/ion_test.c delete mode 100644 drivers/staging/android/ion/tegra/Makefile delete mode 100644 drivers/staging/android/ion/tegra/tegra_ion.c delete mode 100644 drivers/staging/android/trace/lowmemorykiller.h delete mode 100644 drivers/staging/android/uapi/ashmem.h delete mode 100644 drivers/staging/android/uapi/ion.h delete mode 100644 drivers/staging/android/uapi/ion_test.h delete mode 100644 drivers/staging/android/uapi/sw_sync.h delete mode 100644 drivers/staging/android/uapi/sync.h delete mode 100644 drivers/switch/Kconfig delete mode 100644 drivers/switch/Makefile delete mode 100644 drivers/switch/switch_class.c delete mode 100644 drivers/switch/switch_gpio.c delete mode 100644 drivers/thermal/of-thermal.c delete mode 100644 drivers/thermal/thermal_hwmon.c delete mode 100644 drivers/thermal/thermal_hwmon.h delete mode 100644 drivers/tty/serial/earlycon.c delete mode 100644 drivers/usb/gadget/android.c delete mode 100644 drivers/usb/gadget/f_accessory.c delete mode 100644 drivers/usb/gadget/f_audio_source.c delete mode 100644 drivers/usb/gadget/f_mtp.c delete mode 100644 drivers/usb/host/ehci-h20ahb.c delete mode 100644 drivers/usb/phy/class-dual-role.c delete mode 100644 drivers/usb/phy/otg-wakelock.c delete mode 100644 drivers/video/adf/Kconfig delete mode 100644 drivers/video/adf/Makefile delete mode 100644 drivers/video/adf/adf.c delete mode 100644 drivers/video/adf/adf.h delete mode 100644 drivers/video/adf/adf_client.c delete mode 100644 drivers/video/adf/adf_fbdev.c delete mode 100644 drivers/video/adf/adf_fops.c delete mode 100644 drivers/video/adf/adf_fops.h delete mode 100644 drivers/video/adf/adf_fops32.c delete mode 100644 drivers/video/adf/adf_fops32.h delete mode 100644 drivers/video/adf/adf_format.c delete mode 100644 drivers/video/adf/adf_memblock.c delete mode 100644 drivers/video/adf/adf_sysfs.c delete mode 100644 drivers/video/adf/adf_sysfs.h delete mode 100644 drivers/video/adf/adf_trace.h delete mode 100644 drivers/video/arm-hdlcd.c delete mode 100644 drivers/video/vexpress-dvi.c delete mode 100644 fs/pstore/pmsg.c delete mode 100644 fs/squashfs/decompressor_multi.c delete mode 100644 fs/squashfs/decompressor_multi_percpu.c delete mode 100644 fs/squashfs/decompressor_single.c delete mode 100644 fs/squashfs/file_cache.c delete mode 100644 fs/squashfs/file_direct.c delete mode 100644 fs/squashfs/lz4_wrapper.c delete mode 100644 fs/squashfs/page_actor.c delete mode 100644 fs/squashfs/page_actor.h create mode 100644 include/asm-generic/dma-contiguous.h delete mode 100644 include/asm-generic/early_ioremap.h delete mode 100644 include/asm-generic/fixmap.h delete mode 100644 include/asm-generic/seccomp.h delete mode 100644 include/asm-generic/simd.h delete mode 100644 include/crypto/ablk_helper.h delete mode 100644 include/dt-bindings/thermal/thermal.h delete mode 100644 include/kvm/arm_arch_timer.h delete mode 100644 include/kvm/arm_vgic.h delete mode 100644 include/linux/Kbuild delete mode 100644 include/linux/android_aid.h delete mode 100644 include/linux/arm-cci.h delete mode 100644 include/linux/arm-hdlcd.h delete mode 100644 include/linux/compiler-gcc5.h delete mode 100644 include/linux/coresight.h delete mode 100644 include/linux/cpufeature.h delete mode 100644 include/linux/gpio_event.h delete mode 100644 include/linux/if_pppolac.h delete mode 100644 include/linux/if_pppopns.h delete mode 100644 include/linux/initramfs.h delete mode 100644 include/linux/irqchip/arm-gic-v3.h delete mode 100644 include/linux/keychord.h delete mode 100644 include/linux/keycombo.h delete mode 100644 include/linux/keyreset.h delete mode 100644 include/linux/lz4.h delete mode 100644 include/linux/mailbox_client.h delete mode 100644 include/linux/mailbox_controller.h mode change 100755 => 100644 include/linux/mmc/sdio_func.h delete mode 100644 include/linux/netfilter/xt_qtaguid.h delete mode 100644 include/linux/netfilter/xt_quota2.h delete mode 100644 include/linux/of_graph.h delete mode 100644 include/linux/of_reserved_mem.h delete mode 100644 include/linux/pl320-ipc.h delete mode 100644 include/linux/platform_data/ds2482.h delete mode 100644 include/linux/switch.h delete mode 100644 include/linux/uid_stat.h delete mode 100644 include/linux/usb/class-dual-role.h delete mode 100644 include/linux/usb/f_accessory.h delete mode 100644 include/linux/usb/f_mtp.h delete mode 100644 include/linux/wakelock.h delete mode 100644 include/linux/wakeup_reason.h delete mode 100644 include/linux/wifi_tiwlan.h delete mode 100644 include/linux/wlan_plat.h delete mode 100644 include/linux/zpool.h delete mode 100644 include/linux/zsmalloc.h delete mode 100644 include/net/activity_stats.h delete mode 100644 include/trace/events/arm-ipi.h delete mode 100644 include/trace/events/cpufreq_interactive.h delete mode 100644 include/trace/events/gpu.h delete mode 100644 include/trace/events/mmc.h delete mode 100644 include/trace/events/power_cpu_migrate.h delete mode 100644 include/trace/events/smp.h delete mode 100644 include/uapi/linux/android/Kbuild delete mode 100644 include/uapi/linux/android/binder.h delete mode 100644 include/uapi/linux/if_pppolac.h delete mode 100644 include/uapi/linux/if_pppopns.h delete mode 100644 include/uapi/linux/keychord.h delete mode 100644 include/uapi/linux/psci.h delete mode 100644 include/uapi/linux/usb/f_accessory.h delete mode 100644 include/uapi/linux/usb/f_mtp.h delete mode 100644 include/uapi/video/adf.h delete mode 100644 include/video/adf.h delete mode 100644 include/video/adf_client.h delete mode 100644 include/video/adf_fbdev.h delete mode 100644 include/video/adf_format.h delete mode 100644 include/video/adf_memblock.h delete mode 100644 kernel/gcov/gcc_4_7.c delete mode 100644 kernel/power/suspend_time.c delete mode 100644 kernel/power/wakeup_reason.c delete mode 100644 kernel/time/tick-broadcast-hrtimer.c delete mode 100644 kernel/trace/gpu-traces.c delete mode 100644 lib/fdt_empty_tree.c delete mode 100644 lib/lz4/Makefile delete mode 100644 lib/lz4/lz4_compress.c delete mode 100644 lib/lz4/lz4_decompress.c delete mode 100644 lib/lz4/lz4defs.h delete mode 100644 lib/lz4/lz4hc_compress.c delete mode 100644 linaro/configs/android.conf delete mode 100644 linaro/configs/arndale.conf delete mode 100644 linaro/configs/big-LITTLE-IKS.conf delete mode 100644 linaro/configs/big-LITTLE-MP.conf delete mode 100644 linaro/configs/bigendian.conf delete mode 100644 linaro/configs/booting-test.conf delete mode 100644 linaro/configs/debug.conf delete mode 100644 linaro/configs/distribution.conf delete mode 100644 linaro/configs/highbank.conf delete mode 100644 linaro/configs/kvm-guest.conf delete mode 100644 linaro/configs/kvm-host.conf delete mode 100644 linaro/configs/linaro-base.conf delete mode 100644 linaro/configs/omap4.conf delete mode 100644 linaro/configs/preempt-rt.conf delete mode 120000 linaro/configs/ubuntu-minimal.conf delete mode 100644 linaro/configs/vexpress-tuning.conf delete mode 100644 linaro/configs/vexpress.conf delete mode 100644 linaro/configs/vexpress64.conf delete mode 100644 linaro/configs/xen.conf delete mode 100644 mm/early_ioremap.c delete mode 100644 mm/zpool.c delete mode 100644 mm/zsmalloc.c delete mode 100644 net/activity_stats.c mode change 100755 => 100644 net/bluetooth/hci_event.c delete mode 100644 net/ipv4/sysfs_net_ipv4.c delete mode 100644 net/ipv6/ping.c delete mode 100644 net/netfilter/xt_qtaguid.c delete mode 100644 net/netfilter/xt_qtaguid_internal.h delete mode 100644 net/netfilter/xt_qtaguid_print.c delete mode 100644 net/netfilter/xt_qtaguid_print.h delete mode 100644 net/netfilter/xt_quota2.c delete mode 100644 tools/gator/daemon/Android.mk delete mode 100644 tools/gator/daemon/AnnotateListener.cpp delete mode 100644 tools/gator/daemon/AnnotateListener.h delete mode 100644 tools/gator/daemon/Application.mk delete mode 100644 tools/gator/daemon/Buffer.cpp delete mode 100644 tools/gator/daemon/Buffer.h delete mode 100644 tools/gator/daemon/CCNDriver.cpp delete mode 100644 tools/gator/daemon/CCNDriver.h delete mode 100644 tools/gator/daemon/COPYING delete mode 100644 tools/gator/daemon/CapturedXML.cpp delete mode 100644 tools/gator/daemon/CapturedXML.h delete mode 100644 tools/gator/daemon/Child.cpp delete mode 100644 tools/gator/daemon/Child.h delete mode 100644 tools/gator/daemon/Command.cpp delete mode 100644 tools/gator/daemon/Command.h delete mode 100644 tools/gator/daemon/Config.h delete mode 100644 tools/gator/daemon/ConfigurationXML.cpp delete mode 100644 tools/gator/daemon/ConfigurationXML.h delete mode 100644 tools/gator/daemon/Counter.h delete mode 100644 tools/gator/daemon/DiskIODriver.cpp delete mode 100644 tools/gator/daemon/DiskIODriver.h delete mode 100644 tools/gator/daemon/Driver.cpp delete mode 100644 tools/gator/daemon/Driver.h delete mode 100644 tools/gator/daemon/DriverSource.cpp delete mode 100644 tools/gator/daemon/DriverSource.h delete mode 100644 tools/gator/daemon/DynBuf.cpp delete mode 100644 tools/gator/daemon/DynBuf.h delete mode 100644 tools/gator/daemon/EventsXML.cpp delete mode 100644 tools/gator/daemon/EventsXML.h delete mode 100644 tools/gator/daemon/ExternalSource.cpp delete mode 100644 tools/gator/daemon/ExternalSource.h delete mode 100644 tools/gator/daemon/FSDriver.cpp delete mode 100644 tools/gator/daemon/FSDriver.h delete mode 100644 tools/gator/daemon/Fifo.cpp delete mode 100644 tools/gator/daemon/Fifo.h delete mode 100644 tools/gator/daemon/FtraceDriver.cpp delete mode 100644 tools/gator/daemon/FtraceDriver.h delete mode 100644 tools/gator/daemon/FtraceSource.cpp delete mode 100644 tools/gator/daemon/FtraceSource.h delete mode 100644 tools/gator/daemon/HwmonDriver.cpp delete mode 100644 tools/gator/daemon/HwmonDriver.h delete mode 100644 tools/gator/daemon/KMod.cpp delete mode 100644 tools/gator/daemon/KMod.h delete mode 100644 tools/gator/daemon/LocalCapture.cpp delete mode 100644 tools/gator/daemon/LocalCapture.h delete mode 100644 tools/gator/daemon/Logging.cpp delete mode 100644 tools/gator/daemon/Logging.h delete mode 100644 tools/gator/daemon/Makefile delete mode 100644 tools/gator/daemon/Makefile_aarch64 delete mode 100644 tools/gator/daemon/MaliVideoDriver.cpp delete mode 100644 tools/gator/daemon/MaliVideoDriver.h delete mode 100644 tools/gator/daemon/MemInfoDriver.cpp delete mode 100644 tools/gator/daemon/MemInfoDriver.h delete mode 100644 tools/gator/daemon/Monitor.cpp delete mode 100644 tools/gator/daemon/Monitor.h delete mode 100644 tools/gator/daemon/NetDriver.cpp delete mode 100644 tools/gator/daemon/NetDriver.h delete mode 100644 tools/gator/daemon/OlySocket.cpp delete mode 100644 tools/gator/daemon/OlySocket.h delete mode 100644 tools/gator/daemon/OlyUtility.cpp delete mode 100644 tools/gator/daemon/OlyUtility.h delete mode 100644 tools/gator/daemon/PerfBuffer.cpp delete mode 100644 tools/gator/daemon/PerfBuffer.h delete mode 100644 tools/gator/daemon/PerfDriver.cpp delete mode 100644 tools/gator/daemon/PerfDriver.h delete mode 100644 tools/gator/daemon/PerfGroup.cpp delete mode 100644 tools/gator/daemon/PerfGroup.h delete mode 100644 tools/gator/daemon/PerfSource.cpp delete mode 100644 tools/gator/daemon/PerfSource.h delete mode 100644 tools/gator/daemon/Proc.cpp delete mode 100644 tools/gator/daemon/Proc.h delete mode 100644 tools/gator/daemon/Sender.cpp delete mode 100644 tools/gator/daemon/Sender.h delete mode 100644 tools/gator/daemon/SessionData.cpp delete mode 100644 tools/gator/daemon/SessionData.h delete mode 100644 tools/gator/daemon/SessionXML.cpp delete mode 100644 tools/gator/daemon/SessionXML.h delete mode 100644 tools/gator/daemon/Setup.cpp delete mode 100644 tools/gator/daemon/Setup.h delete mode 100644 tools/gator/daemon/Source.cpp delete mode 100644 tools/gator/daemon/Source.h delete mode 100644 tools/gator/daemon/StreamlineSetup.cpp delete mode 100644 tools/gator/daemon/StreamlineSetup.h delete mode 100644 tools/gator/daemon/UEvent.cpp delete mode 100644 tools/gator/daemon/UEvent.h delete mode 100644 tools/gator/daemon/UserSpaceSource.cpp delete mode 100644 tools/gator/daemon/UserSpaceSource.h delete mode 100644 tools/gator/daemon/c++.cpp delete mode 100644 tools/gator/daemon/common.mk delete mode 100644 tools/gator/daemon/defaults.xml delete mode 100644 tools/gator/daemon/escape.c delete mode 100644 tools/gator/daemon/events-ARM11.xml delete mode 100644 tools/gator/daemon/events-ARM11MPCore.xml delete mode 100644 tools/gator/daemon/events-CCI-400.xml delete mode 100644 tools/gator/daemon/events-CCI-500.xml delete mode 100644 tools/gator/daemon/events-CCN-504.xml delete mode 100644 tools/gator/daemon/events-Cortex-A15.xml delete mode 100644 tools/gator/daemon/events-Cortex-A17.xml delete mode 100644 tools/gator/daemon/events-Cortex-A5.xml delete mode 100644 tools/gator/daemon/events-Cortex-A53.xml delete mode 100644 tools/gator/daemon/events-Cortex-A57.xml delete mode 100644 tools/gator/daemon/events-Cortex-A7.xml delete mode 100644 tools/gator/daemon/events-Cortex-A72.xml delete mode 100644 tools/gator/daemon/events-Cortex-A8.xml delete mode 100644 tools/gator/daemon/events-Cortex-A9.xml delete mode 100644 tools/gator/daemon/events-Filesystem.xml delete mode 100644 tools/gator/daemon/events-Krait-architected.xml delete mode 100644 tools/gator/daemon/events-L2C-310.xml delete mode 100644 tools/gator/daemon/events-Linux.xml delete mode 100644 tools/gator/daemon/events-Mali-4xx.xml delete mode 100644 tools/gator/daemon/events-Mali-Midgard.xml delete mode 100644 tools/gator/daemon/events-Mali-Midgard_hw.xml delete mode 100644 tools/gator/daemon/events-Mali-T60x_hw.xml delete mode 100644 tools/gator/daemon/events-Mali-T62x_hw.xml delete mode 100644 tools/gator/daemon/events-Mali-T72x_hw.xml delete mode 100644 tools/gator/daemon/events-Mali-T76x_hw.xml delete mode 100644 tools/gator/daemon/events-Mali-T82x_hw.xml delete mode 100644 tools/gator/daemon/events-Mali-T83x_hw.xml delete mode 100644 tools/gator/daemon/events-Mali-T86x_hw.xml delete mode 100644 tools/gator/daemon/events-Mali-T88x_hw.xml delete mode 100644 tools/gator/daemon/events-Mali-V500.xml delete mode 100644 tools/gator/daemon/events-Other.xml delete mode 100644 tools/gator/daemon/events-Perf-Hardware.xml delete mode 100644 tools/gator/daemon/events-Scorpion.xml delete mode 100644 tools/gator/daemon/events-ScorpionMP.xml delete mode 100644 tools/gator/daemon/events-ftrace.xml delete mode 100644 tools/gator/daemon/events_footer.xml delete mode 100644 tools/gator/daemon/events_header.xml delete mode 100644 tools/gator/daemon/k/perf_event.3.12.h delete mode 120000 tools/gator/daemon/k/perf_event.h delete mode 100644 tools/gator/daemon/libsensors/COPYING.LGPL delete mode 100644 tools/gator/daemon/libsensors/access.c delete mode 100644 tools/gator/daemon/libsensors/access.h delete mode 100644 tools/gator/daemon/libsensors/conf-lex.c delete mode 100644 tools/gator/daemon/libsensors/conf-lex.l delete mode 100644 tools/gator/daemon/libsensors/conf-parse.c delete mode 100644 tools/gator/daemon/libsensors/conf-parse.h delete mode 100644 tools/gator/daemon/libsensors/conf-parse.y delete mode 100644 tools/gator/daemon/libsensors/conf.h delete mode 100644 tools/gator/daemon/libsensors/data.c delete mode 100644 tools/gator/daemon/libsensors/data.h delete mode 100644 tools/gator/daemon/libsensors/error.c delete mode 100644 tools/gator/daemon/libsensors/error.h delete mode 100644 tools/gator/daemon/libsensors/general.c delete mode 100644 tools/gator/daemon/libsensors/general.h delete mode 100644 tools/gator/daemon/libsensors/init.c delete mode 100644 tools/gator/daemon/libsensors/init.h delete mode 100644 tools/gator/daemon/libsensors/scanner.h delete mode 100644 tools/gator/daemon/libsensors/sensors.h delete mode 100644 tools/gator/daemon/libsensors/sysfs.c delete mode 100644 tools/gator/daemon/libsensors/sysfs.h delete mode 100644 tools/gator/daemon/libsensors/version.h delete mode 100644 tools/gator/daemon/main.cpp delete mode 100644 tools/gator/daemon/mxml/COPYING delete mode 100644 tools/gator/daemon/mxml/config.h delete mode 100644 tools/gator/daemon/mxml/mxml-attr.c delete mode 100644 tools/gator/daemon/mxml/mxml-entity.c delete mode 100644 tools/gator/daemon/mxml/mxml-file.c delete mode 100644 tools/gator/daemon/mxml/mxml-get.c delete mode 100644 tools/gator/daemon/mxml/mxml-index.c delete mode 100644 tools/gator/daemon/mxml/mxml-node.c delete mode 100644 tools/gator/daemon/mxml/mxml-private.c delete mode 100644 tools/gator/daemon/mxml/mxml-private.h delete mode 100644 tools/gator/daemon/mxml/mxml-search.c delete mode 100644 tools/gator/daemon/mxml/mxml-set.c delete mode 100644 tools/gator/daemon/mxml/mxml-string.c delete mode 100644 tools/gator/daemon/mxml/mxml.h delete mode 100644 tools/testing/selftests/mount/Makefile delete mode 100644 tools/testing/selftests/mount/unprivileged-remount-test.c delete mode 100644 virt/kvm/arm/arch_timer.c delete mode 100644 virt/kvm/arm/vgic-v2.c delete mode 100644 virt/kvm/arm/vgic-v3.c delete mode 100644 virt/kvm/arm/vgic.c delete mode 100644 virt/kvm/vfio.c diff --git a/Documentation/ABI/testing/sysfs-block-zram b/Documentation/ABI/testing/sysfs-block-zram index 0c7f4f91c6b5..ec93fe33baa6 100644 --- a/Documentation/ABI/testing/sysfs-block-zram +++ b/Documentation/ABI/testing/sysfs-block-zram @@ -42,48 +42,15 @@ Description: The invalid_io file is read-only and specifies the number of non-page-size-aligned I/O requests issued to this device. -What: /sys/block/zram/failed_reads -Date: February 2014 -Contact: Sergey Senozhatsky -Description: - The failed_reads file is read-only and specifies the number of - failed reads happened on this device. - -What: /sys/block/zram/failed_writes -Date: February 2014 -Contact: Sergey Senozhatsky -Description: - The failed_writes file is read-only and specifies the number of - failed writes happened on this device. - -What: /sys/block/zram/max_comp_streams -Date: February 2014 -Contact: Sergey Senozhatsky -Description: - The max_comp_streams file is read-write and specifies the - number of backend's zcomp_strm compression streams (number of - concurrent compress operations). - -What: /sys/block/zram/comp_algorithm -Date: February 2014 -Contact: Sergey Senozhatsky -Description: - The comp_algorithm file is read-write and lets to show - available and selected compression algorithms, change - compression algorithm selection. - What: /sys/block/zram/notify_free Date: August 2010 Contact: Nitin Gupta Description: - The notify_free file is read-only. Depending on device usage - scenario it may account a) the number of pages freed because - of swap slot free notifications or b) the number of pages freed - because of REQ_DISCARD requests sent by bio. The former ones - are sent to a swap block device when a swap slot is freed, which - implies that this disk is being used as a swap disk. The latter - ones are sent by filesystem mounted with discard option, - whenever some data blocks are getting discarded. + The notify_free file is read-only and specifies the number of + swap slot free notifications received by this device. These + notifications are send to a swap block device when a swap slot + is freed. This statistic is applicable only when this disk is + being used as a swap disk. What: /sys/block/zram/discard Date: August 2010 @@ -130,22 +97,3 @@ Description: efficiency can be calculated using compr_data_size and this statistic. Unit: bytes - -What: /sys/block/zram/mem_used_max -Date: August 2014 -Contact: Minchan Kim -Description: - The mem_used_max file is read/write and specifies the amount - of maximum memory zram have consumed to store compressed data. - For resetting the value, you should write "0". Otherwise, - you could see -EINVAL. - Unit: bytes - -What: /sys/block/zram/mem_limit -Date: August 2014 -Contact: Minchan Kim -Description: - The mem_limit file is read/write and specifies the maximum - amount of memory ZRAM can use to store the compressed data. The - limit could be changed in run time and "0" means disable the - limit. No limit is the initial state. Unit: bytes diff --git a/Documentation/ABI/testing/sysfs-class-dual-role-usb b/Documentation/ABI/testing/sysfs-class-dual-role-usb deleted file mode 100644 index a900fd75430c..000000000000 --- a/Documentation/ABI/testing/sysfs-class-dual-role-usb +++ /dev/null @@ -1,71 +0,0 @@ -What: /sys/class/dual_role_usb/.../ -Date: June 2015 -Contact: Badhri Jagan Sridharan -Description: - Provide a generic interface to monitor and change - the state of dual role usb ports. The name here - refers to the name mentioned in the - dual_role_phy_desc that is passed while registering - the dual_role_phy_intstance through - devm_dual_role_instance_register. - -What: /sys/class/dual_role_usb/.../supported_modes -Date: June 2015 -Contact: Badhri Jagan Sridharan -Description: - This is a static node, once initialized this - is not expected to change during runtime. "dfp" - refers to "downstream facing port" i.e. port can - only act as host. "ufp" refers to "upstream - facing port" i.e. port can only act as device. - "dfp ufp" refers to "dual role port" i.e. the port - can either be a host port or a device port. - -What: /sys/class/dual_role_usb/.../mode -Date: June 2015 -Contact: Badhri Jagan Sridharan -Description: - The mode node refers to the current mode in which the - port is operating. "dfp" for host ports. "ufp" for device - ports and "none" when cable is not connected. - - On devices where the USB mode is software-controllable, - userspace can change the mode by writing "dfp" or "ufp". - On devices where the USB mode is fixed in hardware, - this attribute is read-only. - -What: /sys/class/dual_role_usb/.../power_role -Date: June 2015 -Contact: Badhri Jagan Sridharan -Description: - The power_role node mentions whether the port - is "sink"ing or "source"ing power. "none" if - they are not connected. - - On devices implementing USB Power Delivery, - userspace can control the power role by writing "sink" or - "source". On devices without USB-PD, this attribute is - read-only. - -What: /sys/class/dual_role_usb/.../data_role -Date: June 2015 -Contact: Badhri Jagan Sridharan -Description: - The data_role node mentions whether the port - is acting as "host" or "device" for USB data connection. - "none" if there is no active data link. - - On devices implementing USB Power Delivery, userspace - can control the data role by writing "host" or "device". - On devices without USB-PD, this attribute is read-only - -What: /sys/class/dual_role_usb/.../powers_vconn -Date: June 2015 -Contact: Badhri Jagan Sridharan -Description: - The powers_vconn node mentions whether the port - is supplying power for VCONN pin. - - On devices with software control of VCONN, - userspace can disable the power supply to VCONN by writing "n", - or enable the power supply by writing "y". diff --git a/Documentation/ABI/testing/sysfs-firmware-ofw b/Documentation/ABI/testing/sysfs-firmware-ofw deleted file mode 100644 index f562b188e71d..000000000000 --- a/Documentation/ABI/testing/sysfs-firmware-ofw +++ /dev/null @@ -1,28 +0,0 @@ -What: /sys/firmware/devicetree/* -Date: November 2013 -Contact: Grant Likely -Description: - When using OpenFirmware or a Flattened Device Tree to enumerate - hardware, the device tree structure will be exposed in this - directory. - - It is possible for multiple device-tree directories to exist. - Some device drivers use a separate detached device tree which - have no attachment to the system tree and will appear in a - different subdirectory under /sys/firmware/devicetree. - - Userspace must not use the /sys/firmware/devicetree/base - path directly, but instead should follow /proc/device-tree - symlink. It is possible that the absolute path will change - in the future, but the symlink is the stable ABI. - - The /proc/device-tree symlink replaces the devicetree /proc - filesystem support, and has largely the same semantics and - should be compatible with existing userspace. - - The contents of /sys/firmware/devicetree/ is a - hierarchy of directories, one per device tree node. The - directory name is the resolved path component name (node - name plus address). Properties are represented as files - in the directory. The contents of each file is the exact - binary data from the device tree. diff --git a/Documentation/ABI/testing/sysfs-kernel-wakeup_reasons b/Documentation/ABI/testing/sysfs-kernel-wakeup_reasons deleted file mode 100644 index acb19b91c192..000000000000 --- a/Documentation/ABI/testing/sysfs-kernel-wakeup_reasons +++ /dev/null @@ -1,16 +0,0 @@ -What: /sys/kernel/wakeup_reasons/last_resume_reason -Date: February 2014 -Contact: Ruchi Kandoi -Description: - The /sys/kernel/wakeup_reasons/last_resume_reason is - used to report wakeup reasons after system exited suspend. - -What: /sys/kernel/wakeup_reasons/last_suspend_time -Date: March 2015 -Contact: jinqian -Description: - The /sys/kernel/wakeup_reasons/last_suspend_time is - used to report time spent in last suspend cycle. It contains - two numbers (in seconds) separated by space. First number is - the time spent in suspend and resume processes. Second number - is the time spent in sleep state. \ No newline at end of file diff --git a/Documentation/DMA-API-HOWTO.txt b/Documentation/DMA-API-HOWTO.txt index 5e983031cc11..14129f149a75 100644 --- a/Documentation/DMA-API-HOWTO.txt +++ b/Documentation/DMA-API-HOWTO.txt @@ -101,23 +101,14 @@ style to do this even if your device holds the default setting, because this shows that you did think about these issues wrt. your device. -The query is performed via a call to dma_set_mask_and_coherent(): +The query is performed via a call to dma_set_mask(): - int dma_set_mask_and_coherent(struct device *dev, u64 mask); + int dma_set_mask(struct device *dev, u64 mask); -which will query the mask for both streaming and coherent APIs together. -If you have some special requirements, then the following two separate -queries can be used instead: +The query for consistent allocations is performed via a call to +dma_set_coherent_mask(): - The query for streaming mappings is performed via a call to - dma_set_mask(): - - int dma_set_mask(struct device *dev, u64 mask); - - The query for consistent allocations is performed via a call - to dma_set_coherent_mask(): - - int dma_set_coherent_mask(struct device *dev, u64 mask); + int dma_set_coherent_mask(struct device *dev, u64 mask); Here, dev is a pointer to the device struct of your device, and mask is a bit mask describing which bits of an address your device @@ -146,7 +137,7 @@ exactly why. The standard 32-bit addressing device would do something like this: - if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32))) { + if (dma_set_mask(dev, DMA_BIT_MASK(32))) { printk(KERN_WARNING "mydev: No suitable DMA available.\n"); goto ignore_this_device; @@ -180,20 +171,22 @@ the case would look like this: int using_dac, consistent_using_dac; - if (!dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64))) { + if (!dma_set_mask(dev, DMA_BIT_MASK(64))) { using_dac = 1; consistent_using_dac = 1; - } else if (!dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32))) { + dma_set_coherent_mask(dev, DMA_BIT_MASK(64)); + } else if (!dma_set_mask(dev, DMA_BIT_MASK(32))) { using_dac = 0; consistent_using_dac = 0; + dma_set_coherent_mask(dev, DMA_BIT_MASK(32)); } else { printk(KERN_WARNING "mydev: No suitable DMA available.\n"); goto ignore_this_device; } -The coherent coherent mask will always be able to set the same or a -smaller mask as the streaming mask. However for the rare case that a +dma_set_coherent_mask() will always be able to set the same or a +smaller mask as dma_set_mask(). However for the rare case that a device driver only uses consistent allocations, one would have to check the return value from dma_set_coherent_mask(). @@ -206,9 +199,9 @@ address you might do something like: goto ignore_this_device; } -When dma_set_mask() or dma_set_mask_and_coherent() is successful, and -returns zero, the kernel saves away this mask you have provided. The -kernel will use this information later when you make DMA mappings. +When dma_set_mask() is successful, and returns zero, the kernel saves +away this mask you have provided. The kernel will use this +information later when you make DMA mappings. There is a case which we are aware of at this time, which is worth mentioning in this documentation. If your device supports multiple diff --git a/Documentation/DMA-API.txt b/Documentation/DMA-API.txt index e865279cec58..78a6c569d204 100644 --- a/Documentation/DMA-API.txt +++ b/Documentation/DMA-API.txt @@ -141,14 +141,6 @@ won't change the current mask settings. It is more intended as an internal API for use by the platform than an external API for use by driver writers. -int -dma_set_mask_and_coherent(struct device *dev, u64 mask) - -Checks to see if the mask is possible and updates the device -streaming and coherent DMA mask parameters if it is. - -Returns: 0 if successful and a negative error if not. - int dma_set_mask(struct device *dev, u64 mask) diff --git a/Documentation/DocBook/media/Makefile b/Documentation/DocBook/media/Makefile index 1d27f0a1abd1..f9fd615427fb 100644 --- a/Documentation/DocBook/media/Makefile +++ b/Documentation/DocBook/media/Makefile @@ -195,7 +195,7 @@ DVB_DOCUMENTED = \ # install_media_images = \ - $(Q)-cp $(OBJIMGFILES) $(MEDIA_SRC_DIR)/v4l/*.svg $(MEDIA_OBJ_DIR)/media_api + $(Q)cp $(OBJIMGFILES) $(MEDIA_SRC_DIR)/v4l/*.svg $(MEDIA_OBJ_DIR)/media_api $(MEDIA_OBJ_DIR)/%: $(MEDIA_SRC_DIR)/%.b64 $(Q)base64 -d $< >$@ diff --git a/Documentation/DocBook/media_api.tmpl b/Documentation/DocBook/media_api.tmpl index 9c92bb879b6d..6a8b7158697f 100644 --- a/Documentation/DocBook/media_api.tmpl +++ b/Documentation/DocBook/media_api.tmpl @@ -1,6 +1,6 @@ - %media-entities; diff --git a/Documentation/SubmittingPatches b/Documentation/SubmittingPatches index 4dbba7e100a1..6e97e73d87b5 100644 --- a/Documentation/SubmittingPatches +++ b/Documentation/SubmittingPatches @@ -131,20 +131,6 @@ If you cannot condense your patch set into a smaller set of patches, then only post say 15 or so at a time and wait for review and integration. -If your patch fixes a bug in a specific commit, e.g. you found an issue using -git-bisect, please use the 'Fixes:' tag with the first 12 characters of the -SHA-1 ID, and the one line summary. -Example: - - Fixes: e21d2170f366 ("video: remove unnecessary platform_set_drvdata()") - -The following git-config settings can be used to add a pretty format for -outputting the above style in the git log or git show commands - - [core] - abbrev = 12 - [pretty] - fixes = Fixes: %h (\"%s\") 4) Style check your changes. @@ -434,7 +420,7 @@ person it names. This tag documents that potentially interested parties have been included in the discussion -14) Using Reported-by:, Tested-by:, Reviewed-by:, Suggested-by: and Fixes: +14) Using Reported-by:, Tested-by:, Reviewed-by: and Suggested-by: If this patch fixes a problem reported by somebody else, consider adding a Reported-by: tag to credit the reporter for their contribution. Please @@ -489,12 +475,6 @@ idea was not posted in a public forum. That said, if we diligently credit our idea reporters, they will, hopefully, be inspired to help us again in the future. -A Fixes: tag indicates that the patch fixes an issue in a previous commit. It -is used to make it easy to determine where a bug originated, which can help -review a bug fix. This tag also assists the stable kernel team in determining -which stable kernel versions should receive your fix. This is the preferred -method for indicating a bug fixed by the patch. See #2 above for more details. - 15) The canonical patch format diff --git a/Documentation/android.txt b/Documentation/android.txt deleted file mode 100644 index 0f40a78b045f..000000000000 --- a/Documentation/android.txt +++ /dev/null @@ -1,121 +0,0 @@ - ============= - A N D R O I D - ============= - -Copyright (C) 2009 Google, Inc. -Written by Mike Chan - -CONTENTS: ---------- - -1. Android - 1.1 Required enabled config options - 1.2 Required disabled config options - 1.3 Recommended enabled config options -2. Contact - - -1. Android -========== - -Android (www.android.com) is an open source operating system for mobile devices. -This document describes configurations needed to run the Android framework on -top of the Linux kernel. - -To see a working defconfig look at msm_defconfig or goldfish_defconfig -which can be found at http://android.git.kernel.org in kernel/common.git -and kernel/msm.git - - -1.1 Required enabled config options ------------------------------------ -After building a standard defconfig, ensure that these options are enabled in -your .config or defconfig if they are not already. Based off the msm_defconfig. -You should keep the rest of the default options enabled in the defconfig -unless you know what you are doing. - -ANDROID_PARANOID_NETWORK -ASHMEM -CONFIG_FB_MODE_HELPERS -CONFIG_FONT_8x16 -CONFIG_FONT_8x8 -CONFIG_YAFFS_SHORT_NAMES_IN_RAM -DAB -EARLYSUSPEND -FB -FB_CFB_COPYAREA -FB_CFB_FILLRECT -FB_CFB_IMAGEBLIT -FB_DEFERRED_IO -FB_TILEBLITTING -HIGH_RES_TIMERS -INOTIFY -INOTIFY_USER -INPUT_EVDEV -INPUT_GPIO -INPUT_MISC -LEDS_CLASS -LEDS_GPIO -LOCK_KERNEL -LkOGGER -LOW_MEMORY_KILLER -MISC_DEVICES -NEW_LEDS -NO_HZ -POWER_SUPPLY -PREEMPT -RAMFS -RTC_CLASS -RTC_LIB -SWITCH -SWITCH_GPIO -TMPFS -UID_STAT -UID16 -USB_FUNCTION -USB_FUNCTION_ADB -USER_WAKELOCK -VIDEO_OUTPUT_CONTROL -WAKELOCK -YAFFS_AUTO_YAFFS2 -YAFFS_FS -YAFFS_YAFFS1 -YAFFS_YAFFS2 - - -1.2 Required disabled config options ------------------------------------- -CONFIG_YAFFS_DISABLE_LAZY_LOAD -DNOTIFY - - -1.3 Recommended enabled config options ------------------------------- -ANDROID_PMEM -PSTORE_CONSOLE -PSTORE_RAM -SCHEDSTATS -DEBUG_PREEMPT -DEBUG_MUTEXES -DEBUG_SPINLOCK_SLEEP -DEBUG_INFO -FRAME_POINTER -CPU_FREQ -CPU_FREQ_TABLE -CPU_FREQ_DEFAULT_GOV_ONDEMAND -CPU_FREQ_GOV_ONDEMAND -CRC_CCITT -EMBEDDED -INPUT_TOUCHSCREEN -I2C -I2C_BOARDINFO -LOG_BUF_SHIFT=17 -SERIAL_CORE -SERIAL_CORE_CONSOLE - - -2. Contact -========== -website: http://android.git.kernel.org - -mailing-lists: android-kernel@googlegroups.com diff --git a/Documentation/arm/small_task_packing.txt b/Documentation/arm/small_task_packing.txt deleted file mode 100644 index 43f0a8b80234..000000000000 --- a/Documentation/arm/small_task_packing.txt +++ /dev/null @@ -1,136 +0,0 @@ -Small Task Packing in the big.LITTLE MP Reference Patch Set - -What is small task packing? ----- -Simply that the scheduler will fit as many small tasks on a single CPU -as possible before using other CPUs. A small task is defined as one -whose tracked load is less than 90% of a NICE_0 task. This is a change -from the usual behavior since the scheduler will normally use an idle -CPU for a waking task unless that task is considered cache hot. - - -How is it implemented? ----- -Since all small tasks must wake up relatively frequently, the main -requirement for packing small tasks is to select a partly-busy CPU when -waking rather than looking for an idle CPU. We use the tracked load of -the CPU runqueue to determine how heavily loaded each CPU is and the -tracked load of the task to determine if it will fit on the CPU. We -always start with the lowest-numbered CPU in a sched domain and stop -looking when we find a CPU with enough space for the task. - -Some further tweaks are necessary to suppress load balancing when the -CPU is not fully loaded, otherwise the scheduler attempts to spread -tasks evenly across the domain. - - -How does it interact with the HMP patches? ----- -Firstly, we only enable packing on the little domain. The intent is that -the big domain is intended to spread tasks amongst the available CPUs -one-task-per-CPU. The little domain however is attempting to use as -little power as possible while servicing its tasks. - -Secondly, since we offload big tasks onto little CPUs in order to try -to devote one CPU to each task, we have a threshold above which we do -not try to pack a task and instead will select an idle CPU if possible. -This maintains maximum forward progress for busy tasks temporarily -demoted from big CPUs. - - -Can the behaviour be tuned? ----- -Yes, the load level of a 'full' CPU can be easily modified in the source -and is exposed through sysfs as /sys/kernel/hmp/packing_limit to be -changed at runtime. The presence of the packing behaviour is controlled -by CONFIG_SCHED_HMP_LITTLE_PACKING and can be disabled at run-time -using /sys/kernel/hmp/packing_enable. -The definition of a small task is hard coded as 90% of NICE_0_LOAD -and cannot be modified at run time. - - -Why do I need to tune it? ----- -The optimal configuration is likely to be different depending upon the -design and manufacturing of your SoC. - -In the main, there are two system effects from enabling small task -packing. - -1. CPU operating point may increase -2. wakeup latency of tasks may be increased - -There are also likely to be secondary effects from loading one CPU -rather than spreading tasks. - -Note that all of these system effects are dependent upon the workload -under consideration. - - -CPU Operating Point ----- -The primary impact of loading one CPU with a number of light tasks is to -increase the compute requirement of that CPU since it is no longer idle -as often. Increased compute requirement causes an increase in the -frequency of the CPU through CPUfreq. - -Consider this example: -We have a system with 3 CPUs which can operate at any frequency between -350MHz and 1GHz. The system has 6 tasks which would each produce 10% -load at 1GHz. The scheduler has frequency-invariant load scaling -enabled. Our DVFS governor aims for 80% utilization at the chosen -frequency. - -Without task packing, these tasks will be spread out amongst all CPUs -such that each has 2. This will produce roughly 20% system load, and -the frequency of the package will remain at 350MHz. - -With task packing set to the default packing_limit, all of these tasks -will sit on one CPU and require a package frequency of ~750MHz to reach -80% utilization. (0.75 = 0.6 * 0.8). - -When a package operates on a single frequency domain, all CPUs in that -package share frequency and voltage. - -Depending upon the SoC implementation there can be a significant amount -of energy lost to leakage from idle CPUs. The decision about how -loaded a CPU must be to be considered 'full' is therefore controllable -through sysfs (sys/kernel/hmp/packing_limit) and directly in the code. - -Continuing the example, lets set packing_limit to 450 which means we -will pack tasks until the total load of all running tasks >= 450. In -practise, this is very similar to a 55% idle 1Ghz CPU. - -Now we are only able to place 4 tasks on CPU0, and two will overflow -onto CPU1. CPU0 will have a load of 40% and CPU1 will have a load of -20%. In order to still hit 80% utilization, CPU0 now only needs to -operate at (0.4*0.8=0.32) 320MHz, which means that the lowest operating -point will be selected, the same as in the non-packing case, except that -now CPU2 is no longer needed and can be power-gated. - -In order to use less energy, the saving from power-gating CPU2 must be -more than the energy spent running CPU0 for the extra cycles. This -depends upon the SoC implementation. - -This is obviously a contrived example requiring all the tasks to -be runnable at the same time, but it illustrates the point. - - -Wakeup Latency ----- -This is an unavoidable consequence of trying to pack tasks together -rather than giving them a CPU each. If you cannot find an acceptable -level of wakeup latency, you should turn packing off. - -Cyclictest is a good test application for determining the added latency -when configuring packing. - - -Why is it turned off for the VersatileExpress V2P_CA15A7 CoreTile? ----- -Simply, this core tile only has power gating for the whole A7 package. -When small task packing is enabled, all our low-energy use cases -normally fit onto one A7 CPU. We therefore end up with 2 mostly-idle -CPUs and one mostly-busy CPU. This decreases the amount of time -available where the whole package is idle and can be turned off. - diff --git a/Documentation/arm64/booting.txt b/Documentation/arm64/booting.txt index 1b0c968098aa..9c4d388daddc 100644 --- a/Documentation/arm64/booting.txt +++ b/Documentation/arm64/booting.txt @@ -68,23 +68,13 @@ Image target is available instead. Requirement: MANDATORY -The decompressed kernel image contains a 64-byte header as follows: +The decompressed kernel image contains a 32-byte header as follows: - u32 code0; /* Executable code */ - u32 code1; /* Executable code */ + u32 magic = 0x14000008; /* branch to stext, little-endian */ + u32 res0 = 0; /* reserved */ u64 text_offset; /* Image load offset */ - u64 res0 = 0; /* reserved */ u64 res1 = 0; /* reserved */ u64 res2 = 0; /* reserved */ - u64 res3 = 0; /* reserved */ - u64 res4 = 0; /* reserved */ - u32 magic = 0x644d5241; /* Magic number, little endian, "ARM\x64" */ - u32 res5 = 0; /* reserved */ - - -Header notes: - -- code0/code1 are responsible for branching to stext. The image must be placed at the specified offset (currently 0x80000) from the start of the system RAM and called there. The start of the @@ -111,14 +101,8 @@ Before jumping into the kernel, the following conditions must be met: - Caches, MMUs The MMU must be off. Instruction cache may be on or off. - The address range corresponding to the loaded kernel image must be - cleaned to the PoC. In the presence of a system cache or other - coherent masters with caches enabled, this will typically require - cache maintenance by VA rather than set/way operations. - System caches which respect the architected cache maintenance by VA - operations must be configured and may be enabled. - System caches which do not respect architected cache maintenance by VA - operations (not recommended) must be configured and disabled. + Data cache must be off and invalidated. + External caches (if present) must be configured and disabled. - Architected timers CNTFRQ must be programmed with the timer frequency. diff --git a/Documentation/arm64/memory.txt b/Documentation/arm64/memory.txt index d50fa618371b..5f583af0a6e1 100644 --- a/Documentation/arm64/memory.txt +++ b/Documentation/arm64/memory.txt @@ -21,7 +21,7 @@ The swapper_pgd_dir address is written to TTBR1 and never written to TTBR0. -AArch64 Linux memory layout with 4KB pages: +AArch64 Linux memory layout: Start End Size Use ----------------------------------------------------------------------- @@ -35,46 +35,17 @@ ffffffbc00000000 ffffffbdffffffff 8GB vmemmap ffffffbe00000000 ffffffbffbbfffff ~8GB [guard, future vmmemap] -ffffffbffa000000 ffffffbffaffffff 16MB PCI I/O space +ffffffbffbc00000 ffffffbffbdfffff 2MB earlyprintk device -ffffffbffb000000 ffffffbffbbfffff 12MB [guard] +ffffffbffbe00000 ffffffbffbe0ffff 64KB PCI I/O space -ffffffbffbc00000 ffffffbffbdfffff 2MB fixed mappings - -ffffffbffbe00000 ffffffbffbffffff 2MB [guard] +ffffffbbffff0000 ffffffbcffffffff ~2MB [guard] ffffffbffc000000 ffffffbfffffffff 64MB modules ffffffc000000000 ffffffffffffffff 256GB kernel logical memory map -AArch64 Linux memory layout with 64KB pages: - -Start End Size Use ------------------------------------------------------------------------ -0000000000000000 000003ffffffffff 4TB user - -fffffc0000000000 fffffdfbfffeffff ~2TB vmalloc - -fffffdfbffff0000 fffffdfbffffffff 64KB [guard page] - -fffffdfc00000000 fffffdfdffffffff 8GB vmemmap - -fffffdfe00000000 fffffdfffbbfffff ~8GB [guard, future vmmemap] - -fffffdfffa000000 fffffdfffaffffff 16MB PCI I/O space - -fffffdfffb000000 fffffdfffbbfffff 12MB [guard] - -fffffdfffbc00000 fffffdfffbdfffff 2MB fixed mappings - -fffffdfffbe00000 fffffdfffbffffff 2MB [guard] - -fffffdfffc000000 fffffdffffffffff 64MB modules - -fffffe0000000000 ffffffffffffffff 2TB kernel logical memory map - - Translation table lookup with 4KB pages: +--------+--------+--------+--------+--------+--------+--------+--------+ @@ -102,10 +73,3 @@ Translation table lookup with 64KB pages: | | +--------------------------> [41:29] L2 index (only 38:29 used) | +-------------------------------> [47:42] L1 index (not used) +-------------------------------------------------> [63] TTBR0/1 - -When using KVM, the hypervisor maps kernel pages in EL2, at a fixed -offset from the kernel VA (top 24bits of the kernel VA set to zero): - -Start End Size Use ------------------------------------------------------------------------ -0000004000000000 0000007fffffffff 256GB kernel objects mapped in HYP diff --git a/Documentation/arm64/tagged-pointers.txt b/Documentation/arm64/tagged-pointers.txt deleted file mode 100644 index d9995f1f51b3..000000000000 --- a/Documentation/arm64/tagged-pointers.txt +++ /dev/null @@ -1,34 +0,0 @@ - Tagged virtual addresses in AArch64 Linux - ========================================= - -Author: Will Deacon -Date : 12 June 2013 - -This document briefly describes the provision of tagged virtual -addresses in the AArch64 translation system and their potential uses -in AArch64 Linux. - -The kernel configures the translation tables so that translations made -via TTBR0 (i.e. userspace mappings) have the top byte (bits 63:56) of -the virtual address ignored by the translation hardware. This frees up -this byte for application use, with the following caveats: - - (1) The kernel requires that all user addresses passed to EL1 - are tagged with tag 0x00. This means that any syscall - parameters containing user virtual addresses *must* have - their top byte cleared before trapping to the kernel. - - (2) Non-zero tags are not preserved when delivering signals. - This means that signal handlers in applications making use - of tags cannot rely on the tag information for user virtual - addresses being maintained for fields inside siginfo_t. - One exception to this rule is for signals raised in response - to watchpoint debug exceptions, where the tag information - will be preserved. - - (3) Special care should be taken when using tagged pointers, - since it is likely that C compilers will not hazard two - virtual addresses differing only in the upper byte. - -The architecture prevents the use of a tagged PC, so the upper byte will -be set to a sign-extension of bit 55 on exception return. diff --git a/Documentation/blockdev/zram.txt b/Documentation/blockdev/zram.txt deleted file mode 100644 index 5cd0bd903f54..000000000000 --- a/Documentation/blockdev/zram.txt +++ /dev/null @@ -1,129 +0,0 @@ -zram: Compressed RAM based block devices ----------------------------------------- - -* Introduction - -The zram module creates RAM based block devices named /dev/zram -( = 0, 1, ...). Pages written to these disks are compressed and stored -in memory itself. These disks allow very fast I/O and compression provides -good amounts of memory savings. Some of the usecases include /tmp storage, -use as swap disks, various caches under /var and maybe many more :) - -Statistics for individual zram devices are exported through sysfs nodes at -/sys/block/zram/ - -* Usage - -Following shows a typical sequence of steps for using zram. - -1) Load Module: - modprobe zram num_devices=4 - This creates 4 devices: /dev/zram{0,1,2,3} - (num_devices parameter is optional. Default: 1) - -2) Set max number of compression streams - Compression backend may use up to max_comp_streams compression streams, - thus allowing up to max_comp_streams concurrent compression operations. - By default, compression backend uses single compression stream. - - Examples: - #show max compression streams number - cat /sys/block/zram0/max_comp_streams - - #set max compression streams number to 3 - echo 3 > /sys/block/zram0/max_comp_streams - -Note: -In order to enable compression backend's multi stream support max_comp_streams -must be initially set to desired concurrency level before ZRAM device -initialisation. Once the device initialised as a single stream compression -backend (max_comp_streams equals to 1), you will see error if you try to change -the value of max_comp_streams because single stream compression backend -implemented as a special case by lock overhead issue and does not support -dynamic max_comp_streams. Only multi stream backend supports dynamic -max_comp_streams adjustment. - -3) Select compression algorithm - Using comp_algorithm device attribute one can see available and - currently selected (shown in square brackets) compression algortithms, - change selected compression algorithm (once the device is initialised - there is no way to change compression algorithm). - - Examples: - #show supported compression algorithms - cat /sys/block/zram0/comp_algorithm - lzo [lz4] - - #select lzo compression algorithm - echo lzo > /sys/block/zram0/comp_algorithm - -4) Set Disksize - Set disk size by writing the value to sysfs node 'disksize'. - The value can be either in bytes or you can use mem suffixes. - Examples: - # Initialize /dev/zram0 with 50MB disksize - echo $((50*1024*1024)) > /sys/block/zram0/disksize - - # Using mem suffixes - echo 256K > /sys/block/zram0/disksize - echo 512M > /sys/block/zram0/disksize - echo 1G > /sys/block/zram0/disksize - -Note: -There is little point creating a zram of greater than twice the size of memory -since we expect a 2:1 compression ratio. Note that zram uses about 0.1% of the -size of the disk when not in use so a huge zram is wasteful. - -5) Set memory limit: Optional - Set memory limit by writing the value to sysfs node 'mem_limit'. - The value can be either in bytes or you can use mem suffixes. - In addition, you could change the value in runtime. - Examples: - # limit /dev/zram0 with 50MB memory - echo $((50*1024*1024)) > /sys/block/zram0/mem_limit - - # Using mem suffixes - echo 256K > /sys/block/zram0/mem_limit - echo 512M > /sys/block/zram0/mem_limit - echo 1G > /sys/block/zram0/mem_limit - - # To disable memory limit - echo 0 > /sys/block/zram0/mem_limit - -6) Activate: - mkswap /dev/zram0 - swapon /dev/zram0 - - mkfs.ext4 /dev/zram1 - mount /dev/zram1 /tmp - -7) Stats: - Per-device statistics are exported as various nodes under - /sys/block/zram/ - disksize - num_reads - num_writes - invalid_io - notify_free - discard - zero_pages - orig_data_size - compr_data_size - mem_used_total - mem_used_max - -8) Deactivate: - swapoff /dev/zram0 - umount /dev/zram1 - -9) Reset: - Write any positive value to 'reset' sysfs node - echo 1 > /sys/block/zram0/reset - echo 1 > /sys/block/zram1/reset - - This frees all the memory allocated for the given device and - resets the disksize to zero. You must set the disksize again - before reusing the device. - -Nitin Gupta -ngupta@vflare.org diff --git a/Documentation/cgroups/cgroups.txt b/Documentation/cgroups/cgroups.txt index 61dc0ec5c9a9..638bf17ff869 100644 --- a/Documentation/cgroups/cgroups.txt +++ b/Documentation/cgroups/cgroups.txt @@ -598,15 +598,6 @@ is completely unused; @cgrp->parent is still valid. (Note - can also be called for a newly-created cgroup if an error occurs after this subsystem's create() method has been called for the new cgroup). -int allow_attach(struct cgroup *cgrp, struct cgroup_taskset *tset) -(cgroup_mutex held by caller) - -Called prior to moving a task into a cgroup; if the subsystem -returns an error, this will abort the attach operation. Used -to extend the permission checks - if all subsystems in a cgroup -return 0, the attach will be allowed to proceed, even if the -default permission check (root or same user) fails. - int can_attach(struct cgroup *cgrp, struct cgroup_taskset *tset) (cgroup_mutex held by caller) diff --git a/Documentation/cpu-freq/governors.txt b/Documentation/cpu-freq/governors.txt index 875eecbed8c8..219970ba54b7 100644 --- a/Documentation/cpu-freq/governors.txt +++ b/Documentation/cpu-freq/governors.txt @@ -28,7 +28,6 @@ Contents: 2.3 Userspace 2.4 Ondemand 2.5 Conservative -2.6 Interactive 3. The Governor Interface in the CPUfreq Core @@ -219,90 +218,6 @@ a decision on when to decrease the frequency while running in any speed. Load for frequency increase is still evaluated every sampling rate. -2.6 Interactive ---------------- - -The CPUfreq governor "interactive" is designed for latency-sensitive, -interactive workloads. This governor sets the CPU speed depending on -usage, similar to "ondemand" and "conservative" governors, but with a -different set of configurable behaviors. - -The tuneable values for this governor are: - -target_loads: CPU load values used to adjust speed to influence the -current CPU load toward that value. In general, the lower the target -load, the more often the governor will raise CPU speeds to bring load -below the target. The format is a single target load, optionally -followed by pairs of CPU speeds and CPU loads to target at or above -those speeds. Colons can be used between the speeds and associated -target loads for readability. For example: - - 85 1000000:90 1700000:99 - -targets CPU load 85% below speed 1GHz, 90% at or above 1GHz, until -1.7GHz and above, at which load 99% is targeted. If speeds are -specified these must appear in ascending order. Higher target load -values are typically specified for higher speeds, that is, target load -values also usually appear in an ascending order. The default is -target load 90% for all speeds. - -min_sample_time: The minimum amount of time to spend at the current -frequency before ramping down. Default is 80000 uS. - -hispeed_freq: An intermediate "hi speed" at which to initially ramp -when CPU load hits the value specified in go_hispeed_load. If load -stays high for the amount of time specified in above_hispeed_delay, -then speed may be bumped higher. Default is the maximum speed -allowed by the policy at governor initialization time. - -go_hispeed_load: The CPU load at which to ramp to hispeed_freq. -Default is 99%. - -above_hispeed_delay: When speed is at or above hispeed_freq, wait for -this long before raising speed in response to continued high load. -The format is a single delay value, optionally followed by pairs of -CPU speeds and the delay to use at or above those speeds. Colons can -be used between the speeds and associated delays for readability. For -example: - - 80000 1300000:200000 1500000:40000 - -uses delay 80000 uS until CPU speed 1.3 GHz, at which speed delay -200000 uS is used until speed 1.5 GHz, at which speed (and above) -delay 40000 uS is used. If speeds are specified these must appear in -ascending order. Default is 20000 uS. - -timer_rate: Sample rate for reevaluating CPU load when the CPU is not -idle. A deferrable timer is used, such that the CPU will not be woken -from idle to service this timer until something else needs to run. -(The maximum time to allow deferring this timer when not running at -minimum speed is configurable via timer_slack.) Default is 20000 uS. - -timer_slack: Maximum additional time to defer handling the governor -sampling timer beyond timer_rate when running at speeds above the -minimum. For platforms that consume additional power at idle when -CPUs are running at speeds greater than minimum, this places an upper -bound on how long the timer will be deferred prior to re-evaluating -load and dropping speed. For example, if timer_rate is 20000uS and -timer_slack is 10000uS then timers will be deferred for up to 30msec -when not at lowest speed. A value of -1 means defer timers -indefinitely at all speeds. Default is 80000 uS. - -boost: If non-zero, immediately boost speed of all CPUs to at least -hispeed_freq until zero is written to this attribute. If zero, allow -CPU speeds to drop below hispeed_freq according to load as usual. -Default is zero. - -boostpulse: On each write, immediately boost speed of all CPUs to -hispeed_freq for at least the period of time specified by -boostpulse_duration, after which speeds are allowed to drop below -hispeed_freq according to load as usual. - -boostpulse_duration: Length of time to hold CPU speed at hispeed_freq -on a write to boostpulse, before allowing speed to drop according to -load as usual. Default is 80000 uS. - - 3. The Governor Interface in the CPUfreq Core ============================================= diff --git a/Documentation/device-mapper/dm-crypt.txt b/Documentation/device-mapper/dm-crypt.txt index 571f24ffc91c..2c656ae43ba7 100644 --- a/Documentation/device-mapper/dm-crypt.txt +++ b/Documentation/device-mapper/dm-crypt.txt @@ -4,15 +4,12 @@ dm-crypt Device-Mapper's "crypt" target provides transparent encryption of block devices using the kernel crypto API. -For a more detailed description of supported parameters see: -http://code.google.com/p/cryptsetup/wiki/DMCrypt - Parameters: \ [<#opt_params> ] Encryption cipher and an optional IV generation mode. - (In format cipher[:keycount]-chainmode-ivmode[:ivopts]). + (In format cipher[:keycount]-chainmode-ivopts:ivmode). Examples: des aes-cbc-essiv:sha256 @@ -22,11 +19,7 @@ Parameters: \ Key used for encryption. It is encoded as a hexadecimal number. - You can only use key sizes that are valid for the selected cipher - in combination with the selected iv mode. - Note that for some iv modes the key string can contain additional - keys (for example IV seed) so the key contains more parts concatenated - into a single string. + You can only use key sizes that are valid for the selected cipher. Multi-key compatibility mode. You can define keys and @@ -51,7 +44,7 @@ Parameters: \ Otherwise #opt_params is the number of following arguments. Example of optional parameters section: - 2 allow_discards same_cpu_crypt + 1 allow_discards allow_discards Block discard requests (a.k.a. TRIM) are passed through the crypt device. @@ -63,11 +56,6 @@ allow_discards used space etc.) if the discarded blocks can be located easily on the device later. -same_cpu_crypt - Perform encryption using the same cpu that IO was submitted on. - The default is to use an unbound workqueue so that encryption work - is automatically balanced between available CPUs. - Example scripts =============== LUKS (Linux Unified Key Setup) is now the preferred way to set up disk diff --git a/Documentation/device-mapper/verity.txt b/Documentation/device-mapper/verity.txt index 2929f6b1ccf1..9884681535ee 100644 --- a/Documentation/device-mapper/verity.txt +++ b/Documentation/device-mapper/verity.txt @@ -10,7 +10,7 @@ Construction Parameters - + This is the type of the on-disk hash format. @@ -62,16 +62,6 @@ Construction Parameters The hexadecimal encoding of the salt value. - - Optional. The mode of operation. - - 0 is the normal mode of operation where a corrupted block will result in an - I/O error. - - 1 is logging mode where corrupted blocks are logged and a uevent is sent to - notify user space. - - Theory of operation =================== diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt index 06fc7602593a..20746e5abe6f 100644 --- a/Documentation/devicetree/bindings/arm/arch_timer.txt +++ b/Documentation/devicetree/bindings/arm/arch_timer.txt @@ -1,14 +1,10 @@ * ARM architected timer -ARM cores may have a per-core architected timer, which provides per-cpu timers, -or a memory mapped architected timer, which provides up to 8 frames with a -physical and optional virtual timer per frame. +ARM cores may have a per-core architected timer, which provides per-cpu timers. -The per-core architected timer is attached to a GIC to deliver its -per-processor interrupts via PPIs. The memory mapped timer is attached to a GIC -to deliver its interrupts via SPIs. +The timer is attached to a GIC to deliver its per-processor interrupts. -** CP15 Timer node properties: +** Timer node properties: - compatible : Should at least contain one of "arm,armv7-timer" @@ -30,52 +26,3 @@ Example: <1 10 0xf08>; clock-frequency = <100000000>; }; - -** Memory mapped timer node properties: - -- compatible : Should at least contain "arm,armv7-timer-mem". - -- clock-frequency : The frequency of the main counter, in Hz. Optional. - -- reg : The control frame base address. - -Note that #address-cells, #size-cells, and ranges shall be present to ensure -the CPU can address a frame's registers. - -A timer node has up to 8 frame sub-nodes, each with the following properties: - -- frame-number: 0 to 7. - -- interrupts : Interrupt list for physical and virtual timers in that order. - The virtual timer interrupt is optional. - -- reg : The first and second view base addresses in that order. The second view - base address is optional. - -- status : "disabled" indicates the frame is not available for use. Optional. - -Example: - - timer@f0000000 { - compatible = "arm,armv7-timer-mem"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - reg = <0xf0000000 0x1000>; - clock-frequency = <50000000>; - - frame@f0001000 { - frame-number = <0> - interrupts = <0 13 0x8>, - <0 14 0x8>; - reg = <0xf0001000 0x1000>, - <0xf0002000 0x1000>; - }; - - frame@f0003000 { - frame-number = <1> - interrupts = <0 15 0x8>; - reg = <0xf0003000 0x1000>; - status = "disabled"; - }; - }; diff --git a/Documentation/devicetree/bindings/arm/cci.txt b/Documentation/devicetree/bindings/arm/cci.txt deleted file mode 100644 index 92d36e2aa877..000000000000 --- a/Documentation/devicetree/bindings/arm/cci.txt +++ /dev/null @@ -1,172 +0,0 @@ -======================================================= -ARM CCI cache coherent interconnect binding description -======================================================= - -ARM multi-cluster systems maintain intra-cluster coherency through a -cache coherent interconnect (CCI) that is capable of monitoring bus -transactions and manage coherency, TLB invalidations and memory barriers. - -It allows snooping and distributed virtual memory message broadcast across -clusters, through memory mapped interface, with a global control register -space and multiple sets of interface control registers, one per slave -interface. - -Bindings for the CCI node follow the ePAPR standard, available from: - -www.power.org/documentation/epapr-version-1-1/ - -with the addition of the bindings described in this document which are -specific to ARM. - -* CCI interconnect node - - Description: Describes a CCI cache coherent Interconnect component - - Node name must be "cci". - Node's parent must be the root node /, and the address space visible - through the CCI interconnect is the same as the one seen from the - root node (ie from CPUs perspective as per DT standard). - Every CCI node has to define the following properties: - - - compatible - Usage: required - Value type: - Definition: must be set to - "arm,cci-400" - - - reg - Usage: required - Value type: - Definition: A standard property. Specifies base physical - address of CCI control registers common to all - interfaces. - - - ranges: - Usage: required - Value type: - Definition: A standard property. Follow rules in the ePAPR for - hierarchical bus addressing. CCI interfaces - addresses refer to the parent node addressing - scheme to declare their register bases. - - CCI interconnect node can define the following child nodes: - - - CCI control interface nodes - - Node name must be "slave-if". - Parent node must be CCI interconnect node. - - A CCI control interface node must contain the following - properties: - - - compatible - Usage: required - Value type: - Definition: must be set to - "arm,cci-400-ctrl-if" - - - interface-type: - Usage: required - Value type: - Definition: must be set to one of {"ace", "ace-lite"} - depending on the interface type the node - represents. - - - reg: - Usage: required - Value type: - Definition: the base address and size of the - corresponding interface programming - registers. - -* CCI interconnect bus masters - - Description: masters in the device tree connected to a CCI port - (inclusive of CPUs and their cpu nodes). - - A CCI interconnect bus master node must contain the following - properties: - - - cci-control-port: - Usage: required - Value type: - Definition: a phandle containing the CCI control interface node - the master is connected to. - -Example: - - cpus { - #size-cells = <0>; - #address-cells = <1>; - - CPU0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - cci-control-port = <&cci_control1>; - reg = <0x0>; - }; - - CPU1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - cci-control-port = <&cci_control1>; - reg = <0x1>; - }; - - CPU2: cpu@100 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - cci-control-port = <&cci_control2>; - reg = <0x100>; - }; - - CPU3: cpu@101 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - cci-control-port = <&cci_control2>; - reg = <0x101>; - }; - - }; - - dma0: dma@3000000 { - compatible = "arm,pl330", "arm,primecell"; - cci-control-port = <&cci_control0>; - reg = <0x0 0x3000000 0x0 0x1000>; - interrupts = <10>; - #dma-cells = <1>; - #dma-channels = <8>; - #dma-requests = <32>; - }; - - cci@2c090000 { - compatible = "arm,cci-400"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x0 0x2c090000 0 0x1000>; - ranges = <0x0 0x0 0x2c090000 0x6000>; - - cci_control0: slave-if@1000 { - compatible = "arm,cci-400-ctrl-if"; - interface-type = "ace-lite"; - reg = <0x1000 0x1000>; - }; - - cci_control1: slave-if@4000 { - compatible = "arm,cci-400-ctrl-if"; - interface-type = "ace"; - reg = <0x4000 0x1000>; - }; - - cci_control2: slave-if@5000 { - compatible = "arm,cci-400-ctrl-if"; - interface-type = "ace"; - reg = <0x5000 0x1000>; - }; - }; - -This CCI node corresponds to a CCI component whose control registers sits -at address 0x000000002c090000. -CCI slave interface @0x000000002c091000 is connected to dma controller dma0. -CCI slave interface @0x000000002c094000 is connected to CPUs {CPU0, CPU1}; -CCI slave interface @0x000000002c095000 is connected to CPUs {CPU2, CPU3}; diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt deleted file mode 100644 index a3089359aaa6..000000000000 --- a/Documentation/devicetree/bindings/arm/coresight.txt +++ /dev/null @@ -1,200 +0,0 @@ -* CoreSight Components: - -CoreSight components are compliant with the ARM CoreSight architecture -specification and can be connected in various topologies to suit a particular -SoCs tracing needs. These trace components can generally be classified as -sinks, links and sources. Trace data produced by one or more sources flows -through the intermediate links connecting the source to the currently selected -sink. Each CoreSight component device should use these properties to describe -its hardware characteristcs. - -* Required properties for all components *except* non-configurable replicators: - - * compatible: These have to be supplemented with "arm,primecell" as - drivers are using the AMBA bus interface. Possible values include: - - "arm,coresight-etb10", "arm,primecell"; - - "arm,coresight-tpiu", "arm,primecell"; - - "arm,coresight-tmc", "arm,primecell"; - - "arm,coresight-funnel", "arm,primecell"; - - "arm,coresight-etm3x", "arm,primecell"; - - * reg: physical base address and length of the register - set(s) of the component. - - * clocks: the clock associated to this component. - - * clock-names: the name of the clock as referenced by the code. - Since we are using the AMBA framework, the name should be - "apb_pclk". - - * port or ports: The representation of the component's port - layout using the generic DT graph presentation found in - "bindings/graph.txt". - -* Required properties for devices that don't show up on the AMBA bus, such as - non-configurable replicators: - - * compatible: Currently supported value is (note the absence of the - AMBA markee): - - "arm,coresight-replicator" - - * port or ports: same as above. - -* Optional properties for ETM/PTMs: - - * arm,cp14: must be present if the system accesses ETM/PTM management - registers via co-processor 14. - - * cpu: the cpu phandle this ETM/PTM is affined to. When omitted the - source is considered to belong to CPU0. - -* Optional property for TMC: - - * arm,buffer-size: size of contiguous buffer space for TMC ETR - (embedded trace router) - - -Example: - -1. Sinks - etb@20010000 { - compatible = "arm,coresight-etb10", "arm,primecell"; - reg = <0 0x20010000 0 0x1000>; - - coresight-default-sink; - clocks = <&oscclk6a>; - clock-names = "apb_pclk"; - port { - etb_in_port: endpoint@0 { - slave-mode; - remote-endpoint = <&replicator_out_port0>; - }; - }; - }; - - tpiu@20030000 { - compatible = "arm,coresight-tpiu", "arm,primecell"; - reg = <0 0x20030000 0 0x1000>; - - clocks = <&oscclk6a>; - clock-names = "apb_pclk"; - port { - tpiu_in_port: endpoint@0 { - slave-mode; - remote-endpoint = <&replicator_out_port1>; - }; - }; - }; - -2. Links - replicator { - /* non-configurable replicators don't show up on the - * AMBA bus. As such no need to add "arm,primecell". - */ - compatible = "arm,coresight-replicator"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - /* replicator output ports */ - port@0 { - reg = <0>; - replicator_out_port0: endpoint { - remote-endpoint = <&etb_in_port>; - }; - }; - - port@1 { - reg = <1>; - replicator_out_port1: endpoint { - remote-endpoint = <&tpiu_in_port>; - }; - }; - - /* replicator input port */ - port@2 { - reg = <0>; - replicator_in_port0: endpoint { - slave-mode; - remote-endpoint = <&funnel_out_port0>; - }; - }; - }; - }; - - funnel@20040000 { - compatible = "arm,coresight-funnel", "arm,primecell"; - reg = <0 0x20040000 0 0x1000>; - - clocks = <&oscclk6a>; - clock-names = "apb_pclk"; - ports { - #address-cells = <1>; - #size-cells = <0>; - - /* funnel output port */ - port@0 { - reg = <0>; - funnel_out_port0: endpoint { - remote-endpoint = - <&replicator_in_port0>; - }; - }; - - /* funnel input ports */ - port@1 { - reg = <0>; - funnel_in_port0: endpoint { - slave-mode; - remote-endpoint = <&ptm0_out_port>; - }; - }; - - port@2 { - reg = <1>; - funnel_in_port1: endpoint { - slave-mode; - remote-endpoint = <&ptm1_out_port>; - }; - }; - - port@3 { - reg = <2>; - funnel_in_port2: endpoint { - slave-mode; - remote-endpoint = <&etm0_out_port>; - }; - }; - - }; - }; - -3. Sources - ptm@2201c000 { - compatible = "arm,coresight-etm3x", "arm,primecell"; - reg = <0 0x2201c000 0 0x1000>; - - cpu = <&cpu0>; - clocks = <&oscclk6a>; - clock-names = "apb_pclk"; - port { - ptm0_out_port: endpoint { - remote-endpoint = <&funnel_in_port0>; - }; - }; - }; - - ptm@2201d000 { - compatible = "arm,coresight-etm3x", "arm,primecell"; - reg = <0 0x2201d000 0 0x1000>; - - cpu = <&cpu1>; - clocks = <&oscclk6a>; - clock-names = "apb_pclk"; - port { - ptm1_out_port: endpoint { - remote-endpoint = <&funnel_in_port1>; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/arm/gic.txt b/Documentation/devicetree/bindings/arm/gic.txt index 535774577238..3dfb0c0384f5 100644 --- a/Documentation/devicetree/bindings/arm/gic.txt +++ b/Documentation/devicetree/bindings/arm/gic.txt @@ -49,11 +49,6 @@ Optional regions, used when the GIC doesn't have banked registers. The offset is cpu-offset * cpu-nr. -- arm,routable-irqs : Total number of gic irq inputs which are not directly - connected from the peripherals, but are routed dynamically - by a crossbar/multiplexer preceding the GIC. The GIC irq - input line is assigned dynamically when the corresponding - peripheral's crossbar line is mapped. Example: intc: interrupt-controller@fff11000 { @@ -61,7 +56,6 @@ Example: #interrupt-cells = <3>; #address-cells = <1>; interrupt-controller; - arm,routable-irqs = <160>; reg = <0xfff11000 0x1000>, <0xfff10100 0x100>; }; diff --git a/Documentation/devicetree/bindings/arm/pmu.txt b/Documentation/devicetree/bindings/arm/pmu.txt index 4ce82d045a6b..343781b9f246 100644 --- a/Documentation/devicetree/bindings/arm/pmu.txt +++ b/Documentation/devicetree/bindings/arm/pmu.txt @@ -16,9 +16,6 @@ Required properties: "arm,arm1176-pmu" "arm,arm1136-pmu" - interrupts : 1 combined interrupt or 1 per core. -- cluster : a phandle to the cluster to which it belongs - If there are more than one cluster with same CPU type - then there should be separate PMU nodes per cluster. Example: diff --git a/Documentation/devicetree/bindings/arm/rtsm-dcscb.txt b/Documentation/devicetree/bindings/arm/rtsm-dcscb.txt deleted file mode 100644 index 3b8fbf3c00c5..000000000000 --- a/Documentation/devicetree/bindings/arm/rtsm-dcscb.txt +++ /dev/null @@ -1,19 +0,0 @@ -ARM Dual Cluster System Configuration Block -------------------------------------------- - -The Dual Cluster System Configuration Block (DCSCB) provides basic -functionality for controlling clocks, resets and configuration pins in -the Dual Cluster System implemented by the Real-Time System Model (RTSM). - -Required properties: - -- compatible : should be "arm,rtsm,dcscb" - -- reg : physical base address and the size of the registers window - -Example: - - dcscb@60000000 { - compatible = "arm,rtsm,dcscb"; - reg = <0x60000000 0x1000>; - }; diff --git a/Documentation/devicetree/bindings/ata/marvell.txt b/Documentation/devicetree/bindings/ata/marvell.txt index 1c8351604d38..b5cdd20cde9c 100644 --- a/Documentation/devicetree/bindings/ata/marvell.txt +++ b/Documentation/devicetree/bindings/ata/marvell.txt @@ -1,7 +1,7 @@ * Marvell Orion SATA Required Properties: -- compatibility : "marvell,orion-sata" or "marvell,armada-370-sata" +- compatibility : "marvell,orion-sata" - reg : Address range of controller - interrupts : Interrupt controller is using - nr-ports : Number of SATA ports in use. diff --git a/Documentation/devicetree/bindings/dma/fsl-mxs-dma.txt b/Documentation/devicetree/bindings/dma/fsl-mxs-dma.txt index e30e184f50c7..a4873e5e3e36 100644 --- a/Documentation/devicetree/bindings/dma/fsl-mxs-dma.txt +++ b/Documentation/devicetree/bindings/dma/fsl-mxs-dma.txt @@ -38,7 +38,7 @@ dma_apbx: dma-apbx@80024000 { 80 81 68 69 70 71 72 73 74 75 76 77>; - interrupt-names = "auart4-rx", "auart4-tx", "spdif-tx", "empty", + interrupt-names = "auart4-rx", "aurat4-tx", "spdif-tx", "empty", "saif0", "saif1", "i2c0", "i2c1", "auart0-rx", "auart0-tx", "auart1-rx", "auart1-tx", "auart2-rx", "auart2-tx", "auart3-rx", "auart3-tx"; diff --git a/Documentation/devicetree/bindings/mailbox/mailbox.txt b/Documentation/devicetree/bindings/mailbox/mailbox.txt deleted file mode 100644 index 1a2cd3d266db..000000000000 --- a/Documentation/devicetree/bindings/mailbox/mailbox.txt +++ /dev/null @@ -1,38 +0,0 @@ -* Generic Mailbox Controller and client driver bindings - -Generic binding to provide a way for Mailbox controller drivers to -assign appropriate mailbox channel to client drivers. - -* Mailbox Controller - -Required property: -- #mbox-cells: Must be at least 1. Number of cells in a mailbox - specifier. - -Example: - mailbox: mailbox { - ... - #mbox-cells = <1>; - }; - - -* Mailbox Client - -Required property: -- mboxes: List of phandle and mailbox channel specifiers. - -Optional property: -- mbox-names: List of identifier strings for each mailbox channel - required by the client. The use of this property - is discouraged in favor of using index in list of - 'mboxes' while requesting a mailbox. Instead the - platforms may define channel indices, in DT headers, - to something legible. - -Example: - pwr_cntrl: power { - ... - mbox-names = "pwr-ctrl", "rpc"; - mboxes = <&mailbox 0 - &mailbox 1>; - }; diff --git a/Documentation/devicetree/bindings/mfd/vexpress-spc.txt b/Documentation/devicetree/bindings/mfd/vexpress-spc.txt deleted file mode 100644 index 1d71dc2ff151..000000000000 --- a/Documentation/devicetree/bindings/mfd/vexpress-spc.txt +++ /dev/null @@ -1,35 +0,0 @@ -* ARM Versatile Express Serial Power Controller device tree bindings - -Latest ARM development boards implement a power management interface (serial -power controller - SPC) that is capable of managing power/voltage and -operating point transitions, through memory mapped registers interface. - -On testchips like TC2 it also provides a configuration interface that can -be used to read/write values which cannot be read/written through simple -memory mapped reads/writes. - -- spc node - - - compatible: - Usage: required - Value type: - Definition: must be - "arm,vexpress-spc,v2p-ca15_a7","arm,vexpress-spc" - - reg: - Usage: required - Value type: - Definition: A standard property that specifies the base address - and the size of the SPC address space - - interrupts: - Usage: required - Value type: - Definition: SPC interrupt configuration. A standard property - that follows ePAPR interrupts specifications - -Example: - -spc: spc@7fff0000 { - compatible = "arm,vexpress-spc,v2p-ca15_a7","arm,vexpress-spc"; - reg = <0 0x7FFF0000 0 0x1000>; - interrupts = <0 95 4>; -}; diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt index 8faff12e7014..01ef408e205f 100644 --- a/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt @@ -91,5 +91,5 @@ mpp61 61 gpo, dev(wen1), uart1(txd), audio(rclk) mpp62 62 gpio, dev(a2), uart1(cts), tdm(drx), pcie(clkreq0), audio(mclk), uart0(cts) mpp63 63 gpo, spi0(sck), tclk -mpp64 64 gpio, spi0(miso), spi0(cs1) -mpp65 65 gpio, spi0(mosi), spi0(cs2) +mpp64 64 gpio, spi0(miso), spi0-1(cs1) +mpp65 65 gpio, spi0(mosi), spi0-1(cs2) diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt index 86dec67e5450..bfa0a2e5e0cb 100644 --- a/Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt @@ -41,15 +41,15 @@ mpp20 20 gpio, ge0(rxd4), ge1(rxd2), lcd(d20), ptp(clk) mpp21 21 gpio, ge0(rxd5), ge1(rxd3), lcd(d21), mem(bat) mpp22 22 gpio, ge0(rxd6), ge1(rxctl), lcd(d22), sata0(prsnt) mpp23 23 gpio, ge0(rxd7), ge1(rxclk), lcd(d23), sata1(prsnt) -mpp24 24 gpio, lcd(hsync), sata1(prsnt), tdm(rst) -mpp25 25 gpio, lcd(vsync), sata0(prsnt), tdm(pclk) -mpp26 26 gpio, lcd(clk), tdm(fsync) +mpp24 24 gpio, lcd(hsync), sata1(prsnt), nf(bootcs-re), tdm(rst) +mpp25 25 gpio, lcd(vsync), sata0(prsnt), nf(bootcs-we), tdm(pclk) +mpp26 26 gpio, lcd(clk), tdm(fsync), vdd(cpu1-pd) mpp27 27 gpio, lcd(e), tdm(dtx), ptp(trig) mpp28 28 gpio, lcd(pwm), tdm(drx), ptp(evreq) -mpp29 29 gpio, lcd(ref-clk), tdm(int0), ptp(clk) +mpp29 29 gpio, lcd(ref-clk), tdm(int0), ptp(clk), vdd(cpu0-pd) mpp30 30 gpio, tdm(int1), sd0(clk) -mpp31 31 gpio, tdm(int2), sd0(cmd) -mpp32 32 gpio, tdm(int3), sd0(d0) +mpp31 31 gpio, tdm(int2), sd0(cmd), vdd(cpu0-pd) +mpp32 32 gpio, tdm(int3), sd0(d0), vdd(cpu1-pd) mpp33 33 gpio, tdm(int4), sd0(d1), mem(bat) mpp34 34 gpio, tdm(int5), sd0(d2), sata0(prsnt) mpp35 35 gpio, tdm(int6), sd0(d3), sata1(prsnt) @@ -57,18 +57,21 @@ mpp36 36 gpio, spi(mosi) mpp37 37 gpio, spi(miso) mpp38 38 gpio, spi(sck) mpp39 39 gpio, spi(cs0) -mpp40 40 gpio, spi(cs1), uart2(cts), lcd(vga-hsync), pcie(clkreq0) +mpp40 40 gpio, spi(cs1), uart2(cts), lcd(vga-hsync), vdd(cpu1-pd), + pcie(clkreq0) mpp41 41 gpio, spi(cs2), uart2(rts), lcd(vga-vsync), sata1(prsnt), pcie(clkreq1) -mpp42 42 gpio, uart2(rxd), uart0(cts), tdm(int7), tdm-1(timer) -mpp43 43 gpio, uart2(txd), uart0(rts), spi(cs3), pcie(rstout) +mpp42 42 gpio, uart2(rxd), uart0(cts), tdm(int7), tdm-1(timer), + vdd(cpu0-pd) +mpp43 43 gpio, uart2(txd), uart0(rts), spi(cs3), pcie(rstout), + vdd(cpu2-3-pd){1} mpp44 44 gpio, uart2(cts), uart3(rxd), spi(cs4), pcie(clkreq2), mem(bat) mpp45 45 gpio, uart2(rts), uart3(txd), spi(cs5), sata1(prsnt) mpp46 46 gpio, uart3(rts), uart1(rts), spi(cs6), sata0(prsnt) mpp47 47 gpio, uart3(cts), uart1(cts), spi(cs7), pcie(clkreq3), ref(clkout) -mpp48 48 gpio, dev(clkout), dev(burst/last) +mpp48 48 gpio, tclk, dev(burst/last) * Marvell Armada XP (mv78260 and mv78460 only) @@ -80,9 +83,9 @@ mpp51 51 gpio, dev(ad16) mpp52 52 gpio, dev(ad17) mpp53 53 gpio, dev(ad18) mpp54 54 gpio, dev(ad19) -mpp55 55 gpio, dev(ad20) -mpp56 56 gpio, dev(ad21) -mpp57 57 gpio, dev(ad22) +mpp55 55 gpio, dev(ad20), vdd(cpu0-pd) +mpp56 56 gpio, dev(ad21), vdd(cpu1-pd) +mpp57 57 gpio, dev(ad22), vdd(cpu2-3-pd){1} mpp58 58 gpio, dev(ad23) mpp59 59 gpio, dev(ad24) mpp60 60 gpio, dev(ad25) @@ -92,3 +95,6 @@ mpp63 63 gpio, dev(ad28) mpp64 64 gpio, dev(ad29) mpp65 65 gpio, dev(ad30) mpp66 66 gpio, dev(ad31) + +Notes: +* {1} vdd(cpu2-3-pd) only available on mv78460. diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt index b275be49a546..c95ea8278f87 100644 --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt @@ -126,55 +126,3 @@ device; they may be grandchildren, for example. Whether this is legal, and whether there is any interaction between the child and intermediate parent nodes, is again defined entirely by the binding for the individual pin controller device. - -== Using generic pinconfig options == - -Generic pinconfig parameters can be used by defining a separate node containing -the applicable parameters (and optional values), like: - -pcfg_pull_up: pcfg_pull_up { - bias-pull-up; - drive-strength = <20>; -}; - -This node should then be referenced in the appropriate pinctrl node as a phandle -and parsed in the driver using the pinconf_generic_parse_dt_config function. - -Supported configuration parameters are: - -bias-disable - disable any pin bias -bias-high-impedance - high impedance mode ("third-state", "floating") -bias-bus-hold - latch weakly -bias-pull-up - pull up the pin -bias-pull-down - pull down the pin -bias-pull-pin-default - use pin-default pull state -drive-push-pull - drive actively high and low -drive-open-drain - drive with open drain -drive-open-source - drive with open source -drive-strength - sink or source at most X mA -input-enable - enable input on pin (no effect on output) -input-disable - disable input on pin (no effect on output) -input-schmitt-enable - enable schmitt-trigger mode -input-schmitt-disable - disable schmitt-trigger mode -input-debounce - debounce mode with debound time X -low-power-enable - enable low power mode -low-power-disable - disable low power mode -output-low - set the pin to output mode with low level -output-high - set the pin to output mode with high level -slew-rate - set the slew rate - -Arguments for parameters: - -- bias-pull-up, -down and -pin-default take as optional argument 0 to disable - the pull, on hardware supporting it the pull strength in Ohm. bias-disable - will also disable any active pull. - -- drive-strength takes as argument the target strength in mA. - -- input-debounce takes the debounce time in usec as argument - or 0 to disable debouncing - -All parameters not listed here, do not take an argument. - -More in-depth documentation on these parameters can be found in - diff --git a/Documentation/devicetree/bindings/power/power_domain.txt b/Documentation/devicetree/bindings/power/power_domain.txt deleted file mode 100644 index 98c16672ab5f..000000000000 --- a/Documentation/devicetree/bindings/power/power_domain.txt +++ /dev/null @@ -1,49 +0,0 @@ -* Generic PM domains - -System on chip designs are often divided into multiple PM domains that can be -used for power gating of selected IP blocks for power saving by reduced leakage -current. - -This device tree binding can be used to bind PM domain consumer devices with -their PM domains provided by PM domain providers. A PM domain provider can be -represented by any node in the device tree and can provide one or more PM -domains. A consumer node can refer to the provider by a phandle and a set of -phandle arguments (so called PM domain specifiers) of length specified by the -#power-domain-cells property in the PM domain provider node. - -==PM domain providers== - -Required properties: - - #power-domain-cells : Number of cells in a PM domain specifier; - Typically 0 for nodes representing a single PM domain and 1 for nodes - providing multiple PM domains (e.g. power controllers), but can be any value - as specified by device tree binding documentation of particular provider. - -Example: - - power: power-controller@12340000 { - compatible = "foo,power-controller"; - reg = <0x12340000 0x1000>; - #power-domain-cells = <1>; - }; - -The node above defines a power controller that is a PM domain provider and -expects one cell as its phandle argument. - -==PM domain consumers== - -Required properties: - - power-domains : A phandle and PM domain specifier as defined by bindings of - the power controller specified by phandle. - -Example: - - leaky-device@12350000 { - compatible = "foo,i-leak-current"; - reg = <0x12350000 0x1000>; - power-domains = <&power 0>; - }; - -The node above defines a typical PM domain consumer device, which is located -inside a PM domain with index 0 of a power controller represented by a node -with the label "power". diff --git a/Documentation/devicetree/bindings/spi/spi_pl022.txt b/Documentation/devicetree/bindings/spi/spi_pl022.txt index 4d1673ca8cf8..22ed6797216d 100644 --- a/Documentation/devicetree/bindings/spi/spi_pl022.txt +++ b/Documentation/devicetree/bindings/spi/spi_pl022.txt @@ -4,9 +4,9 @@ Required properties: - compatible : "arm,pl022", "arm,primecell" - reg : Offset and length of the register set for the device - interrupts : Should contain SPI controller interrupt -- num-cs : total number of chipselects Optional properties: +- num-cs : total number of chipselects - cs-gpios : should specify GPIOs used for chipselects. The gpios will be referred to as reg = in the SPI child nodes. If unspecified, a single SPI device without a chip select can be used. diff --git a/Documentation/devicetree/bindings/thermal/thermal.txt b/Documentation/devicetree/bindings/thermal/thermal.txt deleted file mode 100644 index f5db6b72a36f..000000000000 --- a/Documentation/devicetree/bindings/thermal/thermal.txt +++ /dev/null @@ -1,595 +0,0 @@ -* Thermal Framework Device Tree descriptor - -This file describes a generic binding to provide a way of -defining hardware thermal structure using device tree. -A thermal structure includes thermal zones and their components, -such as trip points, polling intervals, sensors and cooling devices -binding descriptors. - -The target of device tree thermal descriptors is to describe only -the hardware thermal aspects. The thermal device tree bindings are -not about how the system must control or which algorithm or policy -must be taken in place. - -There are five types of nodes involved to describe thermal bindings: -- thermal sensors: devices which may be used to take temperature - measurements. -- cooling devices: devices which may be used to dissipate heat. -- trip points: describe key temperatures at which cooling is recommended. The - set of points should be chosen based on hardware limits. -- cooling maps: used to describe links between trip points and cooling devices; -- thermal zones: used to describe thermal data within the hardware; - -The following is a description of each of these node types. - -* Thermal sensor devices - -Thermal sensor devices are nodes providing temperature sensing capabilities on -thermal zones. Typical devices are I2C ADC converters and bandgaps. These are -nodes providing temperature data to thermal zones. Thermal sensor devices may -control one or more internal sensors. - -Required property: -- #thermal-sensor-cells: Used to provide sensor device specific information - Type: unsigned while referring to it. Typically 0 on thermal sensor - Size: one cell nodes with only one sensor, and at least 1 on nodes - with several internal sensors, in order - to identify uniquely the sensor instances within - the IC. See thermal zone binding for more details - on how consumers refer to sensor devices. - -* Cooling device nodes - -Cooling devices are nodes providing control on power dissipation. There -are essentially two ways to provide control on power dissipation. First -is by means of regulating device performance, which is known as passive -cooling. A typical passive cooling is a CPU that has dynamic voltage and -frequency scaling (DVFS), and uses lower frequencies as cooling states. -Second is by means of activating devices in order to remove -the dissipated heat, which is known as active cooling, e.g. regulating -fan speeds. In both cases, cooling devices shall have a way to determine -the state of cooling in which the device is. - -Any cooling device has a range of cooling states (i.e. different levels -of heat dissipation). For example a fan's cooling states correspond to -the different fan speeds possible. Cooling states are referred to by -single unsigned integers, where larger numbers mean greater heat -dissipation. The precise set of cooling states associated with a device -(as referred to be the cooling-min-state and cooling-max-state -properties) should be defined in a particular device's binding. -For more examples of cooling devices, refer to the example sections below. - -Required properties: -- cooling-min-state: An integer indicating the smallest - Type: unsigned cooling state accepted. Typically 0. - Size: one cell - -- cooling-max-state: An integer indicating the largest - Type: unsigned cooling state accepted. - Size: one cell - -- #cooling-cells: Used to provide cooling device specific information - Type: unsigned while referring to it. Must be at least 2, in order - Size: one cell to specify minimum and maximum cooling state used - in the reference. The first cell is the minimum - cooling state requested and the second cell is - the maximum cooling state requested in the reference. - See Cooling device maps section below for more details - on how consumers refer to cooling devices. - -* Trip points - -The trip node is a node to describe a point in the temperature domain -in which the system takes an action. This node describes just the point, -not the action. - -Required properties: -- temperature: An integer indicating the trip temperature level, - Type: signed in millicelsius. - Size: one cell - -- hysteresis: A low hysteresis value on temperature property (above). - Type: unsigned This is a relative value, in millicelsius. - Size: one cell - -- type: a string containing the trip type. Expected values are: - "active": A trip point to enable active cooling - "passive": A trip point to enable passive cooling - "hot": A trip point to notify emergency - "critical": Hardware not reliable. - Type: string - -* Cooling device maps - -The cooling device maps node is a node to describe how cooling devices -get assigned to trip points of the zone. The cooling devices are expected -to be loaded in the target system. - -Required properties: -- cooling-device: A phandle of a cooling device with its specifier, - Type: phandle + referring to which cooling device is used in this - cooling specifier binding. In the cooling specifier, the first cell - is the minimum cooling state and the second cell - is the maximum cooling state used in this map. -- trip: A phandle of a trip point node within the same thermal - Type: phandle of zone. - trip point node - -Optional property: -- contribution: The cooling contribution to the thermal zone of the - Type: unsigned referred cooling device at the referred trip point. - Size: one cell The contribution is a ratio of the sum - of all cooling contributions within a thermal zone. - -Note: Using the THERMAL_NO_LIMIT (-1UL) constant in the cooling-device phandle -limit specifier means: -(i) - minimum state allowed for minimum cooling state used in the reference. -(ii) - maximum state allowed for maximum cooling state used in the reference. -Refer to include/dt-bindings/thermal/thermal.h for definition of this constant. - -* Thermal zone nodes - -The thermal zone node is the node containing all the required info -for describing a thermal zone, including its cooling device bindings. The -thermal zone node must contain, apart from its own properties, one sub-node -containing trip nodes and one sub-node containing all the zone cooling maps. - -Required properties: -- polling-delay: The maximum number of milliseconds to wait between polls - Type: unsigned when checking this thermal zone. - Size: one cell - -- polling-delay-passive: The maximum number of milliseconds to wait - Type: unsigned between polls when performing passive cooling. - Size: one cell - -- thermal-sensors: A list of thermal sensor phandles and sensor specifier - Type: list of used while monitoring the thermal zone. - phandles + sensor - specifier - -- trips: A sub-node which is a container of only trip point nodes - Type: sub-node required to describe the thermal zone. - -- cooling-maps: A sub-node which is a container of only cooling device - Type: sub-node map nodes, used to describe the relation between trips - and cooling devices. - -Optional property: -- coefficients: An array of integers (one signed cell) containing - Type: array coefficients to compose a linear relation between - Elem size: one cell the sensors listed in the thermal-sensors property. - Elem type: signed Coefficients defaults to 1, in case this property - is not specified. A simple linear polynomial is used: - Z = c0 * x0 + c1 + x1 + ... + c(n-1) * x(n-1) + cn. - - The coefficients are ordered and they match with sensors - by means of sensor ID. Additional coefficients are - interpreted as constant offset. - -Note: The delay properties are bound to the maximum dT/dt (temperature -derivative over time) in two situations for a thermal zone: -(i) - when passive cooling is activated (polling-delay-passive); and -(ii) - when the zone just needs to be monitored (polling-delay) or -when active cooling is activated. - -The maximum dT/dt is highly bound to hardware power consumption and dissipation -capability. The delays should be chosen to account for said max dT/dt, -such that a device does not cross several trip boundaries unexpectedly -between polls. Choosing the right polling delays shall avoid having the -device in temperature ranges that may damage the silicon structures and -reduce silicon lifetime. - -* The thermal-zones node - -The "thermal-zones" node is a container for all thermal zone nodes. It shall -contain only sub-nodes describing thermal zones as in the section -"Thermal zone nodes". The "thermal-zones" node appears under "/". - -* Examples - -Below are several examples on how to use thermal data descriptors -using device tree bindings: - -(a) - CPU thermal zone - -The CPU thermal zone example below describes how to setup one thermal zone -using one single sensor as temperature source and many cooling devices and -power dissipation control sources. - -#include - -cpus { - /* - * Here is an example of describing a cooling device for a DVFS - * capable CPU. The CPU node describes its four OPPs. - * The cooling states possible are 0..3, and they are - * used as OPP indexes. The minimum cooling state is 0, which means - * all four OPPs can be available to the system. The maximum - * cooling state is 3, which means only the lowest OPPs (198MHz@0.85V) - * can be available in the system. - */ - cpu0: cpu@0 { - ... - operating-points = < - /* kHz uV */ - 970000 1200000 - 792000 1100000 - 396000 950000 - 198000 850000 - >; - cooling-min-state = <0>; - cooling-max-state = <3>; - #cooling-cells = <2>; /* min followed by max */ - }; - ... -}; - -&i2c1 { - ... - /* - * A simple fan controller which supports 10 speeds of operation - * (represented as 0-9). - */ - fan0: fan@0x48 { - ... - cooling-min-state = <0>; - cooling-max-state = <9>; - #cooling-cells = <2>; /* min followed by max */ - }; -}; - -ocp { - ... - /* - * A simple IC with a single bandgap temperature sensor. - */ - bandgap0: bandgap@0x0000ED00 { - ... - #thermal-sensor-cells = <0>; - }; -}; - -thermal-zones { - cpu-thermal: cpu-thermal { - polling-delay-passive = <250>; /* milliseconds */ - polling-delay = <1000>; /* milliseconds */ - - thermal-sensors = <&bandgap0>; - - trips { - cpu-alert0: cpu-alert { - temperature = <90000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "active"; - }; - cpu-alert1: cpu-alert { - temperature = <100000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "passive"; - }; - cpu-crit: cpu-crit { - temperature = <125000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&cpu-alert0>; - cooling-device = <&fan0 THERMAL_NO_LIMITS 4>; - }; - map1 { - trip = <&cpu-alert1>; - cooling-device = <&fan0 5 THERMAL_NO_LIMITS>; - }; - map2 { - trip = <&cpu-alert1>; - cooling-device = - <&cpu0 THERMAL_NO_LIMITS THERMAL_NO_LIMITS>; - }; - }; - }; -}; - -In the example above, the ADC sensor (bandgap0) at address 0x0000ED00 is -used to monitor the zone 'cpu-thermal' using its sole sensor. A fan -device (fan0) is controlled via I2C bus 1, at address 0x48, and has ten -different cooling states 0-9. It is used to remove the heat out of -the thermal zone 'cpu-thermal' using its cooling states -from its minimum to 4, when it reaches trip point 'cpu-alert0' -at 90C, as an example of active cooling. The same cooling device is used at -'cpu-alert1', but from 5 to its maximum state. The cpu@0 device is also -linked to the same thermal zone, 'cpu-thermal', as a passive cooling device, -using all its cooling states at trip point 'cpu-alert1', -which is a trip point at 100C. On the thermal zone 'cpu-thermal', at the -temperature of 125C, represented by the trip point 'cpu-crit', the silicon -is not reliable anymore. - -(b) - IC with several internal sensors - -The example below describes how to deploy several thermal zones based off a -single sensor IC, assuming it has several internal sensors. This is a common -case on SoC designs with several internal IPs that may need different thermal -requirements, and thus may have their own sensor to monitor or detect internal -hotspots in their silicon. - -#include - -ocp { - ... - /* - * A simple IC with several bandgap temperature sensors. - */ - bandgap0: bandgap@0x0000ED00 { - ... - #thermal-sensor-cells = <1>; - }; -}; - -thermal-zones { - cpu-thermal: cpu-thermal { - polling-delay-passive = <250>; /* milliseconds */ - polling-delay = <1000>; /* milliseconds */ - - /* sensor ID */ - thermal-sensors = <&bandgap0 0>; - - trips { - /* each zone within the SoC may have its own trips */ - cpu-alert: cpu-alert { - temperature = <100000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "passive"; - }; - cpu-crit: cpu-crit { - temperature = <125000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "critical"; - }; - }; - - cooling-maps { - /* each zone within the SoC may have its own cooling */ - ... - }; - }; - - gpu-thermal: gpu-thermal { - polling-delay-passive = <120>; /* milliseconds */ - polling-delay = <1000>; /* milliseconds */ - - /* sensor ID */ - thermal-sensors = <&bandgap0 1>; - - trips { - /* each zone within the SoC may have its own trips */ - gpu-alert: gpu-alert { - temperature = <90000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "passive"; - }; - gpu-crit: gpu-crit { - temperature = <105000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "critical"; - }; - }; - - cooling-maps { - /* each zone within the SoC may have its own cooling */ - ... - }; - }; - - dsp-thermal: dsp-thermal { - polling-delay-passive = <50>; /* milliseconds */ - polling-delay = <1000>; /* milliseconds */ - - /* sensor ID */ - thermal-sensors = <&bandgap0 2>; - - trips { - /* each zone within the SoC may have its own trips */ - dsp-alert: gpu-alert { - temperature = <90000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "passive"; - }; - dsp-crit: gpu-crit { - temperature = <135000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "critical"; - }; - }; - - cooling-maps { - /* each zone within the SoC may have its own cooling */ - ... - }; - }; -}; - -In the example above, there is one bandgap IC which has the capability to -monitor three sensors. The hardware has been designed so that sensors are -placed on different places in the DIE to monitor different temperature -hotspots: one for CPU thermal zone, one for GPU thermal zone and the -other to monitor a DSP thermal zone. - -Thus, there is a need to assign each sensor provided by the bandgap IC -to different thermal zones. This is achieved by means of using the -#thermal-sensor-cells property and using the first cell of the sensor -specifier as sensor ID. In the example, then, is used to -monitor CPU thermal zone, is used to monitor GPU thermal -zone and is used to monitor DSP thermal zone. Each zone -may be uncorrelated, having its own dT/dt requirements, trips -and cooling maps. - - -(c) - Several sensors within one single thermal zone - -The example below illustrates how to use more than one sensor within -one thermal zone. - -#include - -&i2c1 { - ... - /* - * A simple IC with a single temperature sensor. - */ - adc: sensor@0x49 { - ... - #thermal-sensor-cells = <0>; - }; -}; - -ocp { - ... - /* - * A simple IC with a single bandgap temperature sensor. - */ - bandgap0: bandgap@0x0000ED00 { - ... - #thermal-sensor-cells = <0>; - }; -}; - -thermal-zones { - cpu-thermal: cpu-thermal { - polling-delay-passive = <250>; /* milliseconds */ - polling-delay = <1000>; /* milliseconds */ - - thermal-sensors = <&bandgap0>, /* cpu */ - <&adc>; /* pcb north */ - - /* hotspot = 100 * bandgap - 120 * adc + 484 */ - coefficients = <100 -120 484>; - - trips { - ... - }; - - cooling-maps { - ... - }; - }; -}; - -In some cases, there is a need to use more than one sensor to extrapolate -a thermal hotspot in the silicon. The above example illustrates this situation. -For instance, it may be the case that a sensor external to CPU IP may be placed -close to CPU hotspot and together with internal CPU sensor, it is used -to determine the hotspot. Assuming this is the case for the above example, -the hypothetical extrapolation rule would be: - hotspot = 100 * bandgap - 120 * adc + 484 - -In other context, the same idea can be used to add fixed offset. For instance, -consider the hotspot extrapolation rule below: - hotspot = 1 * adc + 6000 - -In the above equation, the hotspot is always 6C higher than what is read -from the ADC sensor. The binding would be then: - thermal-sensors = <&adc>; - - /* hotspot = 1 * adc + 6000 */ - coefficients = <1 6000>; - -(d) - Board thermal - -The board thermal example below illustrates how to setup one thermal zone -with many sensors and many cooling devices. - -#include - -&i2c1 { - ... - /* - * An IC with several temperature sensor. - */ - adc-dummy: sensor@0x50 { - ... - #thermal-sensor-cells = <1>; /* sensor internal ID */ - }; -}; - -thermal-zones { - batt-thermal { - polling-delay-passive = <500>; /* milliseconds */ - polling-delay = <2500>; /* milliseconds */ - - /* sensor ID */ - thermal-sensors = <&adc-dummy 4>; - - trips { - ... - }; - - cooling-maps { - ... - }; - }; - - board-thermal: board-thermal { - polling-delay-passive = <1000>; /* milliseconds */ - polling-delay = <2500>; /* milliseconds */ - - /* sensor ID */ - thermal-sensors = <&adc-dummy 0>, /* pcb top edge */ - <&adc-dummy 1>, /* lcd */ - <&adc-dymmy 2>; /* back cover */ - /* - * An array of coefficients describing the sensor - * linear relation. E.g.: - * z = c1*x1 + c2*x2 + c3*x3 - */ - coefficients = <1200 -345 890>; - - trips { - /* Trips are based on resulting linear equation */ - cpu-trip: cpu-trip { - temperature = <60000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "passive"; - }; - gpu-trip: gpu-trip { - temperature = <55000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "passive"; - } - lcd-trip: lcp-trip { - temperature = <53000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "passive"; - }; - crit-trip: crit-trip { - temperature = <68000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&cpu-trip>; - cooling-device = <&cpu0 0 2>; - contribution = <55>; - }; - map1 { - trip = <&gpu-trip>; - cooling-device = <&gpu0 0 2>; - contribution = <20>; - }; - map2 { - trip = <&lcd-trip>; - cooling-device = <&lcd0 5 10>; - contribution = <15>; - }; - }; - }; -}; - -The above example is a mix of previous examples, a sensor IP with several internal -sensors used to monitor different zones, one of them is composed by several sensors and -with different cooling devices. diff --git a/Documentation/devicetree/changesets.txt b/Documentation/devicetree/changesets.txt deleted file mode 100644 index 935ba5acc34e..000000000000 --- a/Documentation/devicetree/changesets.txt +++ /dev/null @@ -1,40 +0,0 @@ -A DT changeset is a method which allows one to apply changes -in the live tree in such a way that either the full set of changes -will be applied, or none of them will be. If an error occurs partway -through applying the changeset, then the tree will be rolled back to the -previous state. A changeset can also be removed after it has been -applied. - -When a changeset is applied, all of the changes get applied to the tree -at once before emitting OF_RECONFIG notifiers. This is so that the -receiver sees a complete and consistent state of the tree when it -receives the notifier. - -The sequence of a changeset is as follows. - -1. of_changeset_init() - initializes a changeset - -2. A number of DT tree change calls, of_changeset_attach_node(), -of_changeset_detach_node(), of_changeset_add_property(), -of_changeset_remove_property, of_changeset_update_property() to prepare -a set of changes. No changes to the active tree are made at this point. -All the change operations are recorded in the of_changeset 'entries' -list. - -3. mutex_lock(of_mutex) - starts a changeset; The global of_mutex -ensures there can only be one editor at a time. - -4. of_changeset_apply() - Apply the changes to the tree. Either the -entire changeset will get applied, or if there is an error the tree will -be restored to the previous state - -5. mutex_unlock(of_mutex) - All operations complete, release the mutex - -If a successfully applied changeset needs to be removed, it can be done -with the following sequence. - -1. mutex_lock(of_mutex) - -2. of_changeset_revert() - -3. mutex_unlock(of_mutex) diff --git a/Documentation/devicetree/dynamic-resolution-notes.txt b/Documentation/devicetree/dynamic-resolution-notes.txt deleted file mode 100644 index 083d23262abe..000000000000 --- a/Documentation/devicetree/dynamic-resolution-notes.txt +++ /dev/null @@ -1,25 +0,0 @@ -Device Tree Dynamic Resolver Notes ----------------------------------- - -This document describes the implementation of the in-kernel -Device Tree resolver, residing in drivers/of/resolver.c and is a -companion document to Documentation/devicetree/dt-object-internal.txt[1] - -How the resolver works ----------------------- - -The resolver is given as an input an arbitrary tree compiled with the -proper dtc option and having a /plugin/ tag. This generates the -appropriate __fixups__ & __local_fixups__ nodes as described in [1]. - -In sequence the resolver works by the following steps: - -1. Get the maximum device tree phandle value from the live tree + 1. -2. Adjust all the local phandles of the tree to resolve by that amount. -3. Using the __local__fixups__ node information adjust all local references - by the same amount. -4. For each property in the __fixups__ node locate the node it references - in the live tree. This is the label used to tag the node. -5. Retrieve the phandle of the target of the fixup. -6. For each fixup in the property locate the node:property:offset location - and replace it with the phandle value. diff --git a/Documentation/devicetree/overlay-notes.txt b/Documentation/devicetree/overlay-notes.txt deleted file mode 100644 index 30ae758e3eef..000000000000 --- a/Documentation/devicetree/overlay-notes.txt +++ /dev/null @@ -1,133 +0,0 @@ -Device Tree Overlay Notes -------------------------- - -This document describes the implementation of the in-kernel -device tree overlay functionality residing in drivers/of/overlay.c and is a -companion document to Documentation/devicetree/dt-object-internal.txt[1] & -Documentation/devicetree/dynamic-resolution-notes.txt[2] - -How overlays work ------------------ - -A Device Tree's overlay purpose is to modify the kernel's live tree, and -have the modification affecting the state of the the kernel in a way that -is reflecting the changes. -Since the kernel mainly deals with devices, any new device node that result -in an active device should have it created while if the device node is either -disabled or removed all together, the affected device should be deregistered. - -Lets take an example where we have a foo board with the following base tree -which is taken from [1]. - ----- foo.dts ----------------------------------------------------------------- - /* FOO platform */ - / { - compatible = "corp,foo"; - - /* shared resources */ - res: res { - }; - - /* On chip peripherals */ - ocp: ocp { - /* peripherals that are always instantiated */ - peripheral1 { ... }; - } - }; ----- foo.dts ----------------------------------------------------------------- - -The overlay bar.dts, when loaded (and resolved as described in [2]) should - ----- bar.dts ----------------------------------------------------------------- -/plugin/; /* allow undefined label references and record them */ -/ { - .... /* various properties for loader use; i.e. part id etc. */ - fragment@0 { - target = <&ocp>; - __overlay__ { - /* bar peripheral */ - bar { - compatible = "corp,bar"; - ... /* various properties and child nodes */ - } - }; - }; -}; ----- bar.dts ----------------------------------------------------------------- - -result in foo+bar.dts - ----- foo+bar.dts ------------------------------------------------------------- - /* FOO platform + bar peripheral */ - / { - compatible = "corp,foo"; - - /* shared resources */ - res: res { - }; - - /* On chip peripherals */ - ocp: ocp { - /* peripherals that are always instantiated */ - peripheral1 { ... }; - - /* bar peripheral */ - bar { - compatible = "corp,bar"; - ... /* various properties and child nodes */ - } - } - }; ----- foo+bar.dts ------------------------------------------------------------- - -As a result of the the overlay, a new device node (bar) has been created -so a bar platform device will be registered and if a matching device driver -is loaded the device will be created as expected. - -Overlay in-kernel API --------------------------------- - -The API is quite easy to use. - -1. Call of_overlay_create() to create and apply an overlay. The return value -is a cookie identifying this overlay. - -2. Call of_overlay_destroy() to remove and cleanup the overlay previously -created via the call to of_overlay_create(). Removal of an overlay that -is stacked by another will not be permitted. - -Finally, if you need to remove all overlays in one-go, just call -of_overlay_destroy_all() which will remove every single one in the correct -order. - -Overlay DTS Format ------------------- - -The DTS of an overlay should have the following format: - -{ - /* ignored properties by the overlay */ - - fragment@0 { /* first child node */ - - target=; /* phandle target of the overlay */ - or - target-path="/path"; /* target path of the overlay */ - - __overlay__ { - property-a; /* add property-a to the target */ - node-a { /* add to an existing, or create a node-a */ - ... - }; - }; - } - fragment@1 { /* second child node */ - ... - }; - /* more fragments follow */ -} - -Using the non-phandle based target method allows one to use a base DT which does -not contain a __symbols__ node, i.e. it was not compiled with the -@ option. -The __symbols__ node is only required for the target= method, since it -contains the information required to map from a phandle to a tree location. diff --git a/Documentation/filesystems/porting b/Documentation/filesystems/porting index 85a4a033bae7..4db22f6491e0 100644 --- a/Documentation/filesystems/porting +++ b/Documentation/filesystems/porting @@ -445,6 +445,3 @@ object doesn't exist. It's remote/distributed ones that might care... [mandatory] FS_REVAL_DOT is gone; if you used to have it, add ->d_weak_revalidate() in your dentry operations instead. --- -[mandatory] - vfs_readdir() is gone; switch to iterate_dir() instead diff --git a/Documentation/filesystems/proc.txt b/Documentation/filesystems/proc.txt index be35913d282b..fd8d0d594fc7 100644 --- a/Documentation/filesystems/proc.txt +++ b/Documentation/filesystems/proc.txt @@ -369,8 +369,6 @@ is not associated with a file: [stack:1001] = the stack of the thread with tid 1001 [vdso] = the "virtual dynamic shared object", the kernel system call handler - [anon:] = an anonymous mapping that has been - named by userspace or if empty, the mapping is anonymous. @@ -421,7 +419,6 @@ KernelPageSize: 4 kB MMUPageSize: 4 kB Locked: 374 kB VmFlags: rd ex mr mw me de -Name: name from userspace the first of these lines shows the same information as is displayed for the mapping in /proc/PID/maps. The remaining lines show the size of the mapping @@ -472,9 +469,6 @@ Note that there is no guarantee that every flag and associated mnemonic will be present in all further kernel releases. Things get changed, the flags may be vanished or the reverse -- new added. -The "Name" field will only be present on a mapping that has been named by -userspace, and will show the name passed in by userspace. - This file is only present if the CONFIG_MMU kernel configuration option is enabled. @@ -490,10 +484,6 @@ To clear the bits for the file mapped pages associated with the process > echo 3 > /proc/PID/clear_refs Any other value written to /proc/PID/clear_refs will have no effect. -To reset the peak resident set size ("high water mark") to the process's -current value: - > echo 5 > /proc/PID/clear_refs - The /proc/pid/pagemap gives the PFN, which can be used to find the pageflags using /proc/kpageflags and number of times a page is mapped using /proc/kpagecount. For detailed explanation, see Documentation/vm/pagemap.txt. @@ -1382,8 +1372,8 @@ may allocate from based on an estimation of its current memory and swap use. For example, if a task is using all allowed memory, its badness score will be 1000. If it is using half of its allowed memory, its score will be 500. -There is an additional factor included in the badness score: the current memory -and swap usage is discounted by 3% for root processes. +There is an additional factor included in the badness score: root +processes are given 3% extra memory over other tasks. The amount of "allowed" memory depends on the context in which the oom killer was called. If it is due to the memory assigned to the allocating task's cpuset diff --git a/Documentation/filesystems/squashfs.txt b/Documentation/filesystems/squashfs.txt index e5274f84dc56..403c090aca39 100644 --- a/Documentation/filesystems/squashfs.txt +++ b/Documentation/filesystems/squashfs.txt @@ -2,10 +2,10 @@ SQUASHFS 4.0 FILESYSTEM ======================= Squashfs is a compressed read-only filesystem for Linux. -It uses zlib, lz4, lzo, or xz compression to compress files, inodes and -directories. Inodes in the system are very small and all blocks are packed to -minimise data overhead. Block sizes greater than 4K are supported up to a -maximum of 1Mbytes (default block size 128K). +It uses zlib/lzo/xz compression to compress files, inodes and directories. +Inodes in the system are very small and all blocks are packed to minimise +data overhead. Block sizes greater than 4K are supported up to a maximum +of 1Mbytes (default block size 128K). Squashfs is intended for general read-only filesystem use, for archival use (i.e. in cases where a .tar.gz file may be used), and in constrained diff --git a/Documentation/gcov.txt b/Documentation/gcov.txt index 7b727783db7e..e7ca6478cd93 100644 --- a/Documentation/gcov.txt +++ b/Documentation/gcov.txt @@ -50,10 +50,6 @@ Configure the kernel with: CONFIG_DEBUG_FS=y CONFIG_GCOV_KERNEL=y -select the gcc's gcov format, default is autodetect based on gcc version: - - CONFIG_GCOV_FORMAT_AUTODETECT=y - and to get coverage data for the entire kernel: CONFIG_GCOV_PROFILE_ALL=y diff --git a/Documentation/hwmon/k10temp b/Documentation/hwmon/k10temp index 4dfdc8f83633..90956b618025 100644 --- a/Documentation/hwmon/k10temp +++ b/Documentation/hwmon/k10temp @@ -12,7 +12,6 @@ Supported chips: * AMD Family 12h processors: "Llano" (E2/A4/A6/A8-Series) * AMD Family 14h processors: "Brazos" (C/E/G/Z-Series) * AMD Family 15h processors: "Bulldozer" (FX-Series), "Trinity" -* AMD Family 16h processors: "Kabini" Prefix: 'k10temp' Addresses scanned: PCI space diff --git a/Documentation/i2c/busses/i2c-i801 b/Documentation/i2c/busses/i2c-i801 index babe2ef16139..d55b8ab2d10f 100644 --- a/Documentation/i2c/busses/i2c-i801 +++ b/Documentation/i2c/busses/i2c-i801 @@ -24,9 +24,6 @@ Supported adapters: * Intel Lynx Point-LP (PCH) * Intel Avoton (SOC) * Intel Wellsburg (PCH) - * Intel Coleto Creek (PCH) - * Intel Wildcat Point-LP (PCH) - * Intel BayTrail (SOC) Datasheets: Publicly available at the Intel website On Intel Patsburg and later chipsets, both the normal host SMBus controller diff --git a/Documentation/i2c/busses/i2c-piix4 b/Documentation/i2c/busses/i2c-piix4 index a370b2047cf3..1e6634f54c50 100644 --- a/Documentation/i2c/busses/i2c-piix4 +++ b/Documentation/i2c/busses/i2c-piix4 @@ -13,7 +13,7 @@ Supported adapters: * AMD SP5100 (SB700 derivative found on some server mainboards) Datasheet: Publicly available at the AMD website http://support.amd.com/us/Embedded_TechDocs/44413.pdf - * AMD Hudson-2, CZ + * AMD Hudson-2 Datasheet: Not publicly available * Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge Datasheet: Publicly available at the SMSC website http://www.smsc.com diff --git a/Documentation/input/elantech.txt b/Documentation/input/elantech.txt index e1ae127ed099..5602eb71ad5d 100644 --- a/Documentation/input/elantech.txt +++ b/Documentation/input/elantech.txt @@ -504,12 +504,9 @@ byte 5: * reg_10 bit 7 6 5 4 3 2 1 0 - 0 0 0 0 R F T A + 0 0 0 0 0 0 0 A A: 1 = enable absolute tracking - T: 1 = enable two finger mode auto correct - F: 1 = disable ABS Position Filter - R: 1 = enable real hardware resolution 6.2 Native absolute mode 6 byte packet format ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ diff --git a/Documentation/ja_JP/HOWTO b/Documentation/ja_JP/HOWTO index 46ed73593465..050d37fe6d40 100644 --- a/Documentation/ja_JP/HOWTO +++ b/Documentation/ja_JP/HOWTO @@ -315,7 +315,7 @@ Andrew Morton が Linux-kernel メーリングリストにカーネルリリー もし、2.6.x.y カーネルが存在しない場合には、番号が一番大きい 2.6.x が 最新の安定版カーネルです。 -2.6.x.y は "stable" チーム でメンテされており、必 +2.6.x.y は "stable" チーム でメンテされており、必 要に応じてリリースされます。通常のリリース期間は 2週間毎ですが、差し迫っ た問題がなければもう少し長くなることもあります。セキュリティ関連の問題 の場合はこれに対してだいたいの場合、すぐにリリースがされます。 diff --git a/Documentation/ja_JP/stable_kernel_rules.txt b/Documentation/ja_JP/stable_kernel_rules.txt index 9dbda9b5d21e..14265837c4ce 100644 --- a/Documentation/ja_JP/stable_kernel_rules.txt +++ b/Documentation/ja_JP/stable_kernel_rules.txt @@ -50,16 +50,16 @@ linux-2.6.29/Documentation/stable_kernel_rules.txt -stable ツリーにパッチを送付する手続き- - - 上記の規則に従っているかを確認した後に、stable@vger.kernel.org にパッチ + - 上記の規則に従っているかを確認した後に、stable@kernel.org にパッチ を送る。 - 送信者はパッチがキューに受け付けられた際には ACK を、却下された場合 には NAK を受け取る。この反応は開発者たちのスケジュールによって、数 日かかる場合がある。 - もし受け取られたら、パッチは他の開発者たちと関連するサブシステムの メンテナーによるレビューのために -stable キューに追加される。 - - パッチに stable@vger.kernel.org のアドレスが付加されているときには、それ + - パッチに stable@kernel.org のアドレスが付加されているときには、それ が Linus のツリーに入る時に自動的に stable チームに email される。 - - セキュリティパッチはこのエイリアス (stable@vger.kernel.org) に送られるべ + - セキュリティパッチはこのエイリアス (stable@kernel.org) に送られるべ きではなく、代わりに security@kernel.org のアドレスに送られる。 レビューサイクル- diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index d592974d77d7..2fe6e767b3d6 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt @@ -1061,7 +1061,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted. i8042.notimeout [HW] Ignore timeout condition signalled by controller i8042.reset [HW] Reset the controller during init and cleanup i8042.unlock [HW] Unlock (ignore) the keylock - i8042.kbdreset [HW] Reset device connected to KBD port i810= [HW,DRM] @@ -1241,15 +1240,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted. See comment before ip2_setup() in drivers/char/ip2/ip2base.c. - irqaffinity= [SMP] Set the default irq affinity mask - Format: - ,..., - or - - - (must be a positive range in ascending order) - or a mixture - ,...,- - irqfixup [HW] When an interrupt is not handled search all handlers for it. Intended to get systems with badly broken @@ -1466,10 +1456,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted. * dump_id: dump IDENTIFY data. - * atapi_dmadir: Enable ATAPI DMADIR bridge support - - * disable: Disable this device. - If there are multiple matching configurations changing the same attribute, the last one is used. @@ -3355,21 +3341,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted. that this also can be controlled per-workqueue for workqueues visible under /sys/bus/workqueue/. - workqueue.power_efficient - Per-cpu workqueues are generally preferred because - they show better performance thanks to cache - locality; unfortunately, per-cpu workqueues tend to - be more power hungry than unbound workqueues. - - Enabling this makes the per-cpu workqueues which - were observed to contribute significantly to power - consumption unbound, leading to measurably lower - power usage at the cost of small performance - overhead. - - The default value of this parameter is determined by - the config option CONFIG_WQ_POWER_EFFICIENT_DEFAULT. - x2apic_phys [X86-64,APIC] Use x2apic physical mode instead of default x2apic cluster mode on platforms supporting x2apic. diff --git a/Documentation/lzo.txt b/Documentation/lzo.txt deleted file mode 100644 index ea45dd3901e3..000000000000 --- a/Documentation/lzo.txt +++ /dev/null @@ -1,164 +0,0 @@ - -LZO stream format as understood by Linux's LZO decompressor -=========================================================== - -Introduction - - This is not a specification. No specification seems to be publicly available - for the LZO stream format. This document describes what input format the LZO - decompressor as implemented in the Linux kernel understands. The file subject - of this analysis is lib/lzo/lzo1x_decompress_safe.c. No analysis was made on - the compressor nor on any other implementations though it seems likely that - the format matches the standard one. The purpose of this document is to - better understand what the code does in order to propose more efficient fixes - for future bug reports. - -Description - - The stream is composed of a series of instructions, operands, and data. The - instructions consist in a few bits representing an opcode, and bits forming - the operands for the instruction, whose size and position depend on the - opcode and on the number of literals copied by previous instruction. The - operands are used to indicate : - - - a distance when copying data from the dictionary (past output buffer) - - a length (number of bytes to copy from dictionary) - - the number of literals to copy, which is retained in variable "state" - as a piece of information for next instructions. - - Optionally depending on the opcode and operands, extra data may follow. These - extra data can be a complement for the operand (eg: a length or a distance - encoded on larger values), or a literal to be copied to the output buffer. - - The first byte of the block follows a different encoding from other bytes, it - seems to be optimized for literal use only, since there is no dictionary yet - prior to that byte. - - Lengths are always encoded on a variable size starting with a small number - of bits in the operand. If the number of bits isn't enough to represent the - length, up to 255 may be added in increments by consuming more bytes with a - rate of at most 255 per extra byte (thus the compression ratio cannot exceed - around 255:1). The variable length encoding using #bits is always the same : - - length = byte & ((1 << #bits) - 1) - if (!length) { - length = ((1 << #bits) - 1) - length += 255*(number of zero bytes) - length += first-non-zero-byte - } - length += constant (generally 2 or 3) - - For references to the dictionary, distances are relative to the output - pointer. Distances are encoded using very few bits belonging to certain - ranges, resulting in multiple copy instructions using different encodings. - Certain encodings involve one extra byte, others involve two extra bytes - forming a little-endian 16-bit quantity (marked LE16 below). - - After any instruction except the large literal copy, 0, 1, 2 or 3 literals - are copied before starting the next instruction. The number of literals that - were copied may change the meaning and behaviour of the next instruction. In - practice, only one instruction needs to know whether 0, less than 4, or more - literals were copied. This is the information stored in the variable - in this implementation. This number of immediate literals to be copied is - generally encoded in the last two bits of the instruction but may also be - taken from the last two bits of an extra operand (eg: distance). - - End of stream is declared when a block copy of distance 0 is seen. Only one - instruction may encode this distance (0001HLLL), it takes one LE16 operand - for the distance, thus requiring 3 bytes. - - IMPORTANT NOTE : in the code some length checks are missing because certain - instructions are called under the assumption that a certain number of bytes - follow because it has already been garanteed before parsing the instructions. - They just have to "refill" this credit if they consume extra bytes. This is - an implementation design choice independant on the algorithm or encoding. - -Byte sequences - - First byte encoding : - - 0..17 : follow regular instruction encoding, see below. It is worth - noting that codes 16 and 17 will represent a block copy from - the dictionary which is empty, and that they will always be - invalid at this place. - - 18..21 : copy 0..3 literals - state = (byte - 17) = 0..3 [ copy literals ] - skip byte - - 22..255 : copy literal string - length = (byte - 17) = 4..238 - state = 4 [ don't copy extra literals ] - skip byte - - Instruction encoding : - - 0 0 0 0 X X X X (0..15) - Depends on the number of literals copied by the last instruction. - If last instruction did not copy any literal (state == 0), this - encoding will be a copy of 4 or more literal, and must be interpreted - like this : - - 0 0 0 0 L L L L (0..15) : copy long literal string - length = 3 + (L ?: 15 + (zero_bytes * 255) + non_zero_byte) - state = 4 (no extra literals are copied) - - If last instruction used to copy between 1 to 3 literals (encoded in - the instruction's opcode or distance), the instruction is a copy of a - 2-byte block from the dictionary within a 1kB distance. It is worth - noting that this instruction provides little savings since it uses 2 - bytes to encode a copy of 2 other bytes but it encodes the number of - following literals for free. It must be interpreted like this : - - 0 0 0 0 D D S S (0..15) : copy 2 bytes from <= 1kB distance - length = 2 - state = S (copy S literals after this block) - Always followed by exactly one byte : H H H H H H H H - distance = (H << 2) + D + 1 - - If last instruction used to copy 4 or more literals (as detected by - state == 4), the instruction becomes a copy of a 3-byte block from the - dictionary from a 2..3kB distance, and must be interpreted like this : - - 0 0 0 0 D D S S (0..15) : copy 3 bytes from 2..3 kB distance - length = 3 - state = S (copy S literals after this block) - Always followed by exactly one byte : H H H H H H H H - distance = (H << 2) + D + 2049 - - 0 0 0 1 H L L L (16..31) - Copy of a block within 16..48kB distance (preferably less than 10B) - length = 2 + (L ?: 7 + (zero_bytes * 255) + non_zero_byte) - Always followed by exactly one LE16 : D D D D D D D D : D D D D D D S S - distance = 16384 + (H << 14) + D - state = S (copy S literals after this block) - End of stream is reached if distance == 16384 - - 0 0 1 L L L L L (32..63) - Copy of small block within 16kB distance (preferably less than 34B) - length = 2 + (L ?: 31 + (zero_bytes * 255) + non_zero_byte) - Always followed by exactly one LE16 : D D D D D D D D : D D D D D D S S - distance = D + 1 - state = S (copy S literals after this block) - - 0 1 L D D D S S (64..127) - Copy 3-4 bytes from block within 2kB distance - state = S (copy S literals after this block) - length = 3 + L - Always followed by exactly one byte : H H H H H H H H - distance = (H << 3) + D + 1 - - 1 L L D D D S S (128..255) - Copy 5-8 bytes from block within 2kB distance - state = S (copy S literals after this block) - length = 5 + L - Always followed by exactly one byte : H H H H H H H H - distance = (H << 3) + D + 1 - -Authors - - This document was written by Willy Tarreau on 2014/07/19 during an - analysis of the decompression code available in Linux 3.16-rc5. The code is - tricky, it is possible that this document contains mistakes or that a few - corner cases were overlooked. In any case, please report any doubt, fix, or - proposed updates to the author(s) so that the document can be updated. diff --git a/Documentation/mailbox.txt b/Documentation/mailbox.txt deleted file mode 100644 index 60f43ff629aa..000000000000 --- a/Documentation/mailbox.txt +++ /dev/null @@ -1,122 +0,0 @@ - The Common Mailbox Framework - Jassi Brar - - This document aims to help developers write client and controller -drivers for the API. But before we start, let us note that the -client (especially) and controller drivers are likely going to be -very platform specific because the remote firmware is likely to be -proprietary and implement non-standard protocol. So even if two -platforms employ, say, PL320 controller, the client drivers can't -be shared across them. Even the PL320 driver might need to accommodate -some platform specific quirks. So the API is meant mainly to avoid -similar copies of code written for each platform. Having said that, -nothing prevents the remote f/w to also be Linux based and use the -same api there. However none of that helps us locally because we only -ever deal at client's protocol level. - Some of the choices made during implementation are the result of this -peculiarity of this "common" framework. - - - - Part 1 - Controller Driver (See include/linux/mailbox_controller.h) - - Allocate mbox_controller and the array of mbox_chan. -Populate mbox_chan_ops, except peek_data() all are mandatory. -The controller driver might know a message has been consumed -by the remote by getting an IRQ or polling some hardware flag -or it can never know (the client knows by way of the protocol). -The method in order of preference is IRQ -> Poll -> None, which -the controller driver should set via 'txdone_irq' or 'txdone_poll' -or neither. - - - Part 2 - Client Driver (See include/linux/mailbox_client.h) - - The client might want to operate in blocking mode (synchronously -send a message through before returning) or non-blocking/async mode (submit -a message and a callback function to the API and return immediately). - - -struct demo_client { - struct mbox_client cl; - struct mbox_chan *mbox; - struct completion c; - bool async; - /* ... */ -}; - -/* - * This is the handler for data received from remote. The behaviour is purely - * dependent upon the protocol. This is just an example. - */ -static void message_from_remote(struct mbox_client *cl, void *mssg) -{ - struct demo_client *dc = container_of(mbox_client, - struct demo_client, cl); - if (dc->aysnc) { - if (is_an_ack(mssg)) { - /* An ACK to our last sample sent */ - return; /* Or do something else here */ - } else { /* A new message from remote */ - queue_req(mssg); - } - } else { - /* Remote f/w sends only ACK packets on this channel */ - return; - } -} - -static void sample_sent(struct mbox_client *cl, void *mssg, int r) -{ - struct demo_client *dc = container_of(mbox_client, - struct demo_client, cl); - complete(&dc->c); -} - -static void client_demo(struct platform_device *pdev) -{ - struct demo_client *dc_sync, *dc_async; - /* The controller already knows async_pkt and sync_pkt */ - struct async_pkt ap; - struct sync_pkt sp; - - dc_sync = kzalloc(sizeof(*dc_sync), GFP_KERNEL); - dc_async = kzalloc(sizeof(*dc_async), GFP_KERNEL); - - /* Populate non-blocking mode client */ - dc_async->cl.dev = &pdev->dev; - dc_async->cl.rx_callback = message_from_remote; - dc_async->cl.tx_done = sample_sent; - dc_async->cl.tx_block = false; - dc_async->cl.tx_tout = 0; /* doesn't matter here */ - dc_async->cl.knows_txdone = false; /* depending upon protocol */ - dc_async->async = true; - init_completion(&dc_async->c); - - /* Populate blocking mode client */ - dc_sync->cl.dev = &pdev->dev; - dc_sync->cl.rx_callback = message_from_remote; - dc_sync->cl.tx_done = NULL; /* operate in blocking mode */ - dc_sync->cl.tx_block = true; - dc_sync->cl.tx_tout = 500; /* by half a second */ - dc_sync->cl.knows_txdone = false; /* depending upon protocol */ - dc_sync->async = false; - - /* ASync mailbox is listed second in 'mboxes' property */ - dc_async->mbox = mbox_request_channel(&dc_async->cl, 1); - /* Populate data packet */ - /* ap.xxx = 123; etc */ - /* Send async message to remote */ - mbox_send_message(dc_async->mbox, &ap); - - /* Sync mailbox is listed first in 'mboxes' property */ - dc_sync->mbox = mbox_request_channel(&dc_sync->cl, 0); - /* Populate data packet */ - /* sp.abc = 123; etc */ - /* Send message to remote in blocking mode */ - mbox_send_message(dc_sync->mbox, &sp); - /* At this point 'sp' has been sent */ - - /* Now wait for async chan to be done */ - wait_for_completion(&dc_async->c); -} diff --git a/Documentation/networking/ip-sysctl.txt b/Documentation/networking/ip-sysctl.txt index b4ec119dd00a..3458d6343e01 100644 --- a/Documentation/networking/ip-sysctl.txt +++ b/Documentation/networking/ip-sysctl.txt @@ -22,15 +22,6 @@ ip_no_pmtu_disc - BOOLEAN min_pmtu - INTEGER default 552 - minimum discovered Path MTU -fwmark_reflect - BOOLEAN - Controls the fwmark of kernel-generated IPv4 reply packets that are not - associated with a socket for example, TCP RSTs or ICMP echo replies). - If unset, these packets have a fwmark of zero. If set, they have the - fwmark of the packet they are replying to. Similarly affects the fwmark - used by internal routing lookups triggered by incoming packets, such as - the ones used for Path MTU Discovery. - Default: 0 - route/max_size - INTEGER Maximum number of routes allowed in the kernel. Increase this when using large numbers of interfaces and/or routes. @@ -477,16 +468,6 @@ tcp_fastopen - INTEGER See include/net/tcp.h and the code for more details. -tcp_fwmark_accept - BOOLEAN - If set, incoming connections to listening sockets that do not have a - socket mark will set the mark of the accepting socket to the fwmark of - the incoming SYN packet. This will cause all packets on that connection - (starting from the first SYNACK) to be sent with that fwmark. The - listening socket's mark is unchanged. Listening sockets that already - have a fwmark set via setsockopt(SOL_SOCKET, SO_MARK, ...) are - unaffected. - Default: 0 - tcp_syn_retries - INTEGER Number of times initial SYNs for an active TCP connection attempt will be retransmitted. Should not be higher than 255. Default value @@ -497,15 +478,6 @@ tcp_syn_retries - INTEGER tcp_timestamps - BOOLEAN Enable timestamps as defined in RFC1323. -tcp_min_tso_segs - INTEGER - Minimal number of segments per TSO frame. - Since linux-3.12, TCP does an automatic sizing of TSO frames, - depending on flow rate, instead of filling 64Kbytes packets. - For specific usages, it's possible to force TCP to build big - TSO frames. Note that TCP stack might split too big TSO packets - if available window is too small. - Default: 2 - tcp_tso_win_divisor - INTEGER This allows control over what percentage of the congestion window can be consumed by a single TSO frame. @@ -590,6 +562,9 @@ tcp_limit_output_bytes - INTEGER typical pfifo_fast qdiscs. tcp_limit_output_bytes limits the number of bytes on qdisc or device to reduce artificial RTT/cwnd and reduce bufferbloat. + Note: For GSO/TSO enabled flows, we try to have at least two + packets in flight. Reducing tcp_limit_output_bytes might also + reduce the size of individual GSO packet (64KB being the max) Default: 131072 tcp_challenge_ack_limit - INTEGER @@ -1112,15 +1087,6 @@ conf/all/forwarding - BOOLEAN proxy_ndp - BOOLEAN Do proxy ndp. -fwmark_reflect - BOOLEAN - Controls the fwmark of kernel-generated IPv6 reply packets that are not - associated with a socket for example, TCP RSTs or ICMPv6 echo replies). - If unset, these packets have a fwmark of zero. If set, they have the - fwmark of the packet they are replying to. Similarly affects the fwmark - used by internal routing lookups triggered by incoming packets, such as - the ones used for Path MTU Discovery. - Default: 0 - conf/interface/*: Change special settings per interface. @@ -1258,13 +1224,6 @@ router_solicitations - INTEGER routers are present. Default: 3 -use_oif_addrs_only - BOOLEAN - When enabled, the candidate source addresses for destinations - routed via this interface are restricted to the set of addresses - configured on this interface (vis. RFC 6724, section 4). - - Default: false - use_tempaddr - INTEGER Preference for Privacy Extensions (RFC3041). <= 0 : disable Privacy Extensions @@ -1346,19 +1305,6 @@ ndisc_notify - BOOLEAN 1 - Generate unsolicited neighbour advertisements when device is brought up or hardware address changes. -optimistic_dad - BOOLEAN - Whether to perform Optimistic Duplicate Address Detection (RFC 4429). - 0: disabled (default) - 1: enabled - -use_optimistic - BOOLEAN - If enabled, do not classify optimistic addresses as deprecated during - source address selection. Preferred addresses will still be chosen - before optimistic addresses, subject to other ranking in the source - address selection algorithm. - 0: disabled (default) - 1: enabled - icmp/*: ratelimit - INTEGER Limit the maximal rates for sending ICMPv6 packets. diff --git a/Documentation/networking/packet_mmap.txt b/Documentation/networking/packet_mmap.txt index 0f4376ec8852..23dd80e82b8e 100644 --- a/Documentation/networking/packet_mmap.txt +++ b/Documentation/networking/packet_mmap.txt @@ -123,16 +123,6 @@ Transmission process is similar to capture as shown below. [shutdown] close() --------> destruction of the transmission socket and deallocation of all associated resources. -Socket creation and destruction is also straight forward, and is done -the same way as in capturing described in the previous paragraph: - - int fd = socket(PF_PACKET, mode, 0); - -The protocol can optionally be 0 in case we only want to transmit -via this socket, which avoids an expensive call to packet_rcv(). -In this case, you also need to bind(2) the TX_RING with sll_protocol = 0 -set. Otherwise, htons(ETH_P_ALL) or any other protocol, for example. - Binding the socket to your network interface is mandatory (with zero copy) to know the header size of frames used in the circular buffer. diff --git a/Documentation/parisc/registers b/Documentation/parisc/registers index 10c7d1730f5d..dd3caddd1ad9 100644 --- a/Documentation/parisc/registers +++ b/Documentation/parisc/registers @@ -77,14 +77,6 @@ PSW default E value 0 Shadow Registers used by interruption handler code TOC enable bit 1 -========================================================================= - -The PA-RISC architecture defines 7 registers as "shadow registers". -Those are used in RETURN FROM INTERRUPTION AND RESTORE instruction to reduce -the state save and restore time by eliminating the need for general register -(GR) saves and restores in interruption handlers. -Shadow registers are the GRs 1, 8, 9, 16, 17, 24, and 25. - ========================================================================= Register usage notes, originally from John Marvin, with some additional notes from Randolph Chung. diff --git a/Documentation/pinctrl.txt b/Documentation/pinctrl.txt index c8763806c65e..447fd4cd54ec 100644 --- a/Documentation/pinctrl.txt +++ b/Documentation/pinctrl.txt @@ -203,8 +203,15 @@ using a certain resistor value - pull up and pull down - so that the pin has a stable value when nothing is driving the rail it is connected to, or when it's unconnected. -Pin configuration can be programmed by adding configuration entries into the -mapping table; see section "Board/machine configuration" below. +Pin configuration can be programmed either using the explicit APIs described +immediately below, or by adding configuration entries into the mapping table; +see section "Board/machine configuration" below. + +For example, a platform may do the following to pull up a pin to VDD: + +#include + +ret = pin_config_set("foo-dev", "FOO_GPIO_PIN", PLATFORM_X_PULL_UP); The format and meaning of the configuration parameter, PLATFORM_X_PULL_UP above, is entirely defined by the pin controller driver. diff --git a/Documentation/ramoops.txt b/Documentation/ramoops.txt index 5d8675615e59..69b3cac4749d 100644 --- a/Documentation/ramoops.txt +++ b/Documentation/ramoops.txt @@ -14,19 +14,11 @@ survive after a restart. 1. Ramoops concepts -Ramoops uses a predefined memory area to store the dump. The start and size -and type of the memory area are set using three variables: +Ramoops uses a predefined memory area to store the dump. The start and size of +the memory area are set using two variables: * "mem_address" for the start * "mem_size" for the size. The memory size will be rounded down to a power of two. - * "mem_type" to specifiy if the memory type (default is pgprot_writecombine). - -Typically the default value of mem_type=0 should be used as that sets the pstore -mapping to pgprot_writecombine. Setting mem_type=1 attempts to use -pgprot_noncached, which only works on some platforms. This is because pstore -depends on atomic operations. At least on ARM, pgprot_noncached causes the -memory to be mapped strongly ordered, and atomic operations on strongly ordered -memory are implementation defined, and won't work on many ARMs such as omaps. The memory area is divided into "record_size" chunks (also rounded down to power of two) and each oops/panic writes a "record_size" chunk of @@ -63,7 +55,6 @@ Setting the ramoops parameters can be done in 2 different manners: static struct ramoops_platform_data ramoops_data = { .mem_size = <...>, .mem_address = <...>, - .mem_type = <...>, .record_size = <...>, .dump_oops = <...>, .ecc = <...>, diff --git a/Documentation/sound/alsa/ALSA-Configuration.txt b/Documentation/sound/alsa/ALSA-Configuration.txt index 8f08b2a71791..95731a08f257 100644 --- a/Documentation/sound/alsa/ALSA-Configuration.txt +++ b/Documentation/sound/alsa/ALSA-Configuration.txt @@ -2026,8 +2026,8 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed. ------------------- Module for sound cards based on the Asus AV66/AV100/AV200 chips, - i.e., Xonar D1, DX, D2, D2X, DS, DSX, Essence ST (Deluxe), - Essence STX (II), HDAV1.3 (Deluxe), and HDAV1.3 Slim. + i.e., Xonar D1, DX, D2, D2X, DS, Essence ST (Deluxe), Essence STX, + HDAV1.3 (Deluxe), and HDAV1.3 Slim. This module supports autoprobe and multiple cards. diff --git a/Documentation/stable_kernel_rules.txt b/Documentation/stable_kernel_rules.txt index 8dfb6a5f427d..b0714d8f678a 100644 --- a/Documentation/stable_kernel_rules.txt +++ b/Documentation/stable_kernel_rules.txt @@ -29,9 +29,6 @@ Rules on what kind of patches are accepted, and which ones are not, into the Procedure for submitting patches to the -stable tree: - - If the patch covers files in net/ or drivers/net please follow netdev stable - submission guidelines as described in - Documentation/networking/netdev-FAQ.txt - Send the patch, after verifying that it follows the above rules, to stable@vger.kernel.org. You must note the upstream commit ID in the changelog of your submission, as well as the kernel version you wish diff --git a/Documentation/sync.txt b/Documentation/sync.txt deleted file mode 100644 index a2d05e7fa193..000000000000 --- a/Documentation/sync.txt +++ /dev/null @@ -1,75 +0,0 @@ -Motivation: - -In complicated DMA pipelines such as graphics (multimedia, camera, gpu, display) -a consumer of a buffer needs to know when the producer has finished producing -it. Likewise the producer needs to know when the consumer is finished with the -buffer so it can reuse it. A particular buffer may be consumed by multiple -consumers which will retain the buffer for different amounts of time. In -addition, a consumer may consume multiple buffers atomically. -The sync framework adds an API which allows synchronization between the -producers and consumers in a generic way while also allowing platforms which -have shared hardware synchronization primitives to exploit them. - -Goals: - * provide a generic API for expressing synchronization dependencies - * allow drivers to exploit hardware synchronization between hardware - blocks - * provide a userspace API that allows a compositor to manage - dependencies. - * provide rich telemetry data to allow debugging slowdowns and stalls of - the graphics pipeline. - -Objects: - * sync_timeline - * sync_pt - * sync_fence - -sync_timeline: - -A sync_timeline is an abstract monotonically increasing counter. In general, -each driver/hardware block context will have one of these. They can be backed -by the appropriate hardware or rely on the generic sw_sync implementation. -Timelines are only ever created through their specific implementations -(i.e. sw_sync.) - -sync_pt: - -A sync_pt is an abstract value which marks a point on a sync_timeline. Sync_pts -have a single timeline parent. They have 3 states: active, signaled, and error. -They start in active state and transition, once, to either signaled (when the -timeline counter advances beyond the sync_pt’s value) or error state. - -sync_fence: - -Sync_fences are the primary primitives used by drivers to coordinate -synchronization of their buffers. They are a collection of sync_pts which may -or may not have the same timeline parent. A sync_pt can only exist in one fence -and the fence's list of sync_pts is immutable once created. Fences can be -waited on synchronously or asynchronously. Two fences can also be merged to -create a third fence containing a copy of the two fences’ sync_pts. Fences are -backed by file descriptors to allow userspace to coordinate the display pipeline -dependencies. - -Use: - -A driver implementing sync support should have a work submission function which: - * takes a fence argument specifying when to begin work - * asynchronously queues that work to kick off when the fence is signaled - * returns a fence to indicate when its work will be done. - * signals the returned fence once the work is completed. - -Consider an imaginary display driver that has the following API: -/* - * assumes buf is ready to be displayed. - * blocks until the buffer is on screen. - */ - void display_buffer(struct dma_buf *buf); - -The new API will become: -/* - * will display buf when fence is signaled. - * returns immediately with a fence that will signal when buf - * is no longer displayed. - */ -struct sync_fence* display_buffer(struct dma_buf *buf, - struct sync_fence *fence); diff --git a/Documentation/sysctl/kernel.txt b/Documentation/sysctl/kernel.txt index 8d90c42e5db6..ccd42589e124 100644 --- a/Documentation/sysctl/kernel.txt +++ b/Documentation/sysctl/kernel.txt @@ -289,24 +289,13 @@ Default value is "/sbin/hotplug". kptr_restrict: This toggle indicates whether restrictions are placed on -exposing kernel addresses via /proc and other interfaces. - -When kptr_restrict is set to (0), the default, there are no restrictions. - -When kptr_restrict is set to (1), kernel pointers printed using the %pK -format specifier will be replaced with 0's unless the user has CAP_SYSLOG -and effective user and group ids are equal to the real ids. This is -because %pK checks are done at read() time rather than open() time, so -if permissions are elevated between the open() and the read() (e.g via -a setuid binary) then %pK will not leak kernel pointers to unprivileged -users. Note, this is a temporary solution only. The correct long-term -solution is to do the permission checks at open() time. Consider removing -world read permissions from files that use %pK, and using dmesg_restrict -to protect against uses of %pK in dmesg(8) if leaking kernel pointer -values to unprivileged users is a concern. - -When kptr_restrict is set to (2), kernel pointers printed using -%pK will be replaced with 0's regardless of privileges. +exposing kernel addresses via /proc and other interfaces. When +kptr_restrict is set to (0), there are no restrictions. When +kptr_restrict is set to (1), the default, kernel pointers +printed using the %pK format specifier will be replaced with 0's +unless the user has CAP_SYSLOG. When kptr_restrict is set to +(2), kernel pointers printed using %pK will be replaced with 0's +regardless of privileges. ============================================================== @@ -438,32 +427,6 @@ This file shows up if CONFIG_DEBUG_STACKOVERFLOW is enabled. ============================================================== -perf_cpu_time_max_percent: - -Hints to the kernel how much CPU time it should be allowed to -use to handle perf sampling events. If the perf subsystem -is informed that its samples are exceeding this limit, it -will drop its sampling frequency to attempt to reduce its CPU -usage. - -Some perf sampling happens in NMIs. If these samples -unexpectedly take too long to execute, the NMIs can become -stacked up next to each other so much that nothing else is -allowed to execute. - -0: disable the mechanism. Do not monitor or correct perf's - sampling rate no matter how CPU time it takes. - -1-100: attempt to throttle perf's sample rate to this - percentage of CPU. Note: the kernel calculates an - "expected" length of each sample event. 100 here means - 100% of that expected length. Even if this is set to - 100, you may still see sample throttling if this - length is exceeded. Set to 0 if you truly do not care - how much CPU is consumed. - -============================================================== - pid_max: diff --git a/Documentation/sysctl/vm.txt b/Documentation/sysctl/vm.txt index b81fca90f7fe..dcc75a9ed919 100644 --- a/Documentation/sysctl/vm.txt +++ b/Documentation/sysctl/vm.txt @@ -29,7 +29,6 @@ Currently, these files are in /proc/sys/vm: - dirty_writeback_centisecs - drop_caches - extfrag_threshold -- extra_free_kbytes - hugepages_treat_as_movable - hugetlb_shm_group - laptop_mode @@ -199,21 +198,6 @@ fragmentation index is <= extfrag_threshold. The default value is 500. ============================================================== -extra_free_kbytes - -This parameter tells the VM to keep extra free memory between the threshold -where background reclaim (kswapd) kicks in, and the threshold where direct -reclaim (by allocating processes) kicks in. - -This is useful for workloads that require low latency memory allocations -and have a bounded burstiness in memory allocations, for example a -realtime application that receives and transmits network traffic -(causing in-kernel memory allocations) with a maximum total message burst -size of 200MB may need 200MB of extra free memory to avoid direct reclaim -related latencies. - -============================================================== - hugepages_treat_as_movable This parameter is only useful when kernelcore= is specified at boot time to diff --git a/Documentation/thermal/sysfs-api.txt b/Documentation/thermal/sysfs-api.txt index 37c54863f611..a71bd5b90fe8 100644 --- a/Documentation/thermal/sysfs-api.txt +++ b/Documentation/thermal/sysfs-api.txt @@ -142,11 +142,6 @@ temperature) and throttle appropriate devices. This is an optional feature where some platforms can choose not to provide this data. .governor_name: Name of the thermal governor used for this zone - .no_hwmon: a boolean to indicate if the thermal to hwmon sysfs interface - is required. when no_hwmon == false, a hwmon sysfs interface - will be created. when no_hwmon == true, nothing will be done. - In case the thermal_zone_params is NULL, the hwmon interface - will be created (for backward compatibility). .num_tbps: Number of thermal_bind_params entries for this zone .tbp: thermal_bind_params entries diff --git a/Documentation/trace/coresight.txt b/Documentation/trace/coresight.txt deleted file mode 100644 index 02361552a3ea..000000000000 --- a/Documentation/trace/coresight.txt +++ /dev/null @@ -1,299 +0,0 @@ - Coresight - HW Assisted Tracing on ARM - ====================================== - - Author: Mathieu Poirier - Date: September 11th, 2014 - -Introduction ------------- - -Coresight is an umbrella of technologies allowing for the debugging of ARM -based SoC. It includes solutions for JTAG and HW assisted tracing. This -document is concerned with the latter. - -HW assisted tracing is becoming increasingly useful when dealing with systems -that have many SoCs and other components like GPU and DMA engines. ARM has -developed a HW assisted tracing solution by means of different components, each -being added to a design at systhesis time to cater to specific tracing needs. -Compoments are generally categorised as source, link and sinks and are -(usually) discovered using the AMBA bus. - -"Sources" generate a compressed stream representing the processor instruction -path based on tracing scenarios as configured by users. From there the stream -flows through the coresight system (via ATB bus) using links that are connecting -the emanating source to a sink(s). Sinks serve as endpoints to the coresight -implementation, either storing the compressed stream in a memory buffer or -creating an interface to the outside world where data can be transferred to a -host without fear of filling up the onboard coresight memory buffer. - -At typical coresight system would look like this: - - ***************************************************************** - **************************** AMBA AXI ****************************===|| - ***************************************************************** || - ^ ^ | || - | | * ** - 0000000 ::::: 0000000 ::::: ::::: @@@@@@@ |||||||||||| - 0 CPU 0<-->: C : 0 CPU 0<-->: C : : C : @ STM @ || System || - |->0000000 : T : |->0000000 : T : : T :<--->@@@@@ || Memory || - | #######<-->: I : | #######<-->: I : : I : @@@<-| |||||||||||| - | # ETM # ::::: | # PTM # ::::: ::::: @ | - | ##### ^ ^ | ##### ^ ! ^ ! . | ||||||||| - | |->### | ! | |->### | ! | ! . | || DAP || - | | # | ! | | # | ! | ! . | ||||||||| - | | . | ! | | . | ! | ! . | | | - | | . | ! | | . | ! | ! . | | * - | | . | ! | | . | ! | ! . | | SWD/ - | | . | ! | | . | ! | ! . | | JTAG - *****************************************************************<-| - *************************** AMBA Debug APB ************************ - ***************************************************************** - | . ! . ! ! . | - | . * . * * . | - ***************************************************************** - ******************** Cross Trigger Matrix (CTM) ******************* - ***************************************************************** - | . ^ . . | - | * ! * * | - ***************************************************************** - ****************** AMBA Advanced Trace Bus (ATB) ****************** - ***************************************************************** - | ! =============== | - | * ===== F =====<---------| - | ::::::::: ==== U ==== - |-->:: CTI ::&& ETB &&<......II I ======= - | ! &&&&&&&&& II I . - | ! I I . - | ! I REP I<.......... - | ! I I - | !!>&&&&&&&&& II I *Source: ARM ltd. - |------>& TPIU &<......II I DAP = Debug Access Port - &&&&&&&&& IIIIIII ETM = Embedded Trace Macrocell - ; PTM = Program Trace Macrocell - ; CTI = Cross Trigger Interface - * ETB = Embedded Trace Buffer - To trace port TPIU= Trace Port Interface Unit - SWD = Serial Wire Debug - -While on target configuration of the components is done via the APB bus, -all trace data are carried out-of-band on the ATB bus. The CTM provides -a way to aggregate and distribute signals between CoreSight components. - -The coresight framework provides a central point to represent, configure and -manage coresight devices on a platform. This first implementation centers on -the basic tracing functionality, enabling components such ETM/PTM, funnel, -replicator, TMC, TPIU and ETB. Future work will enable more -intricate IP blocks such as STM and CTI. - - -Acronyms and Classification ---------------------------- - -Acronyms: - -PTM: Program Trace Macrocell -ETM: Embedded Trace Macrocell -STM: System trace Macrocell -ETB: Embedded Trace Buffer -ITM: Instrumentation Trace Macrocell -TPIU: Trace Port Interface Unit -TMC-ETR: Trace Memory Controller, configured as Embedded Trace Router -TMC-ETF: Trace Memory Controller, configured as Embedded Trace FIFO -CTI: Cross Trigger Interface - -Classification: - -Source: - ETMv3.x ETMv4, PTMv1.0, PTMv1.1, STM, STM500, ITM -Link: - Funnel, replicator (intelligent or not), TMC-ETR -Sinks: - ETBv1.0, ETB1.1, TPIU, TMC-ETF -Misc: - CTI - - -Device Tree Bindings ----------------------- - -See Documentation/devicetree/bindings/arm/coresight.txt for details. - -As of this writing drivers for ITM, STMs and CTIs are not provided but are -expected to be added as the solution matures. - - -Framework and implementation ----------------------------- - -The coresight framework provides a central point to represent, configure and -manage coresight devices on a platform. Any coresight compliant device can -register with the framework for as long as they use the right APIs: - -struct coresight_device *coresight_register(struct coresight_desc *desc); -void coresight_unregister(struct coresight_device *csdev); - -The registering function is taking a "struct coresight_device *csdev" and -register the device with the core framework. The unregister function takes -a reference to a "strut coresight_device", obtained at registration time. - -If everything goes well during the registration process the new devices will -show up under /sys/bus/coresight/devices, as showns here for a TC2 platform: - -root:~# ls /sys/bus/coresight/devices/ -replicator 20030000.tpiu 2201c000.ptm 2203c000.etm 2203e000.etm -20010000.etb 20040000.funnel 2201d000.ptm 2203d000.etm -root:~# - -The functions take a "struct coresight_device", which looks like this: - -struct coresight_desc { - enum coresight_dev_type type; - struct coresight_dev_subtype subtype; - const struct coresight_ops *ops; - struct coresight_platform_data *pdata; - struct device *dev; - const struct attribute_group **groups; -}; - - -The "coresight_dev_type" identifies what the device is, i.e, source link or -sink while the "coresight_dev_subtype" will characterise that type further. - -The "struct coresight_ops" is mandatory and will tell the framework how to -perform base operations related to the components, each component having -a different set of requirement. For that "struct coresight_ops_sink", -"struct coresight_ops_link" and "struct coresight_ops_source" have been -provided. - -The next field, "struct coresight_platform_data *pdata" is acquired by calling -"of_get_coresight_platform_data()", as part of the driver's _probe routine and -"struct device *dev" gets the device reference embedded in the "amba_device": - -static int etm_probe(struct amba_device *adev, const struct amba_id *id) -{ - ... - ... - drvdata->dev = &adev->dev; - ... -} - -Specific class of device (source, link, or sink) have generic operations -that can be performed on them (see "struct coresight_ops"). The -"**groups" is a list of sysfs entries pertaining to operations -specific to that component only. "Implementation defined" customisations are -expected to be accessed and controlled using those entries. - -Last but not least, "struct module *owner" is expected to be set to reflect -the information carried in "THIS_MODULE". - -How to use ----------- - -Before trace collection can start, a coresight sink needs to be identify. -There is no limit on the amount of sinks (nor sources) that can be enabled at -any given moment. As a generic operation, all device pertaining to the sink -class will have an "active" entry in sysfs: - -root:/sys/bus/coresight/devices# ls -replicator 20030000.tpiu 2201c000.ptm 2203c000.etm 2203e000.etm -20010000.etb 20040000.funnel 2201d000.ptm 2203d000.etm -root:/sys/bus/coresight/devices# ls 20010000.etb -enable_sink status trigger_cntr -root:/sys/bus/coresight/devices# echo 1 > 20010000.etb/enable_sink -root:/sys/bus/coresight/devices# cat 20010000.etb/enable_sink -1 -root:/sys/bus/coresight/devices# - -At boot time the current etm3x driver will configure the first address -comparator with "_stext" and "_etext", essentially tracing any instruction -that falls within that range. As such "enabling" a source will immediately -trigger a trace capture: - -root:/sys/bus/coresight/devices# echo 1 > 2201c000.ptm/enable_source -root:/sys/bus/coresight/devices# cat 2201c000.ptm/enable_source -1 -root:/sys/bus/coresight/devices# cat 20010000.etb/status -Depth: 0x2000 -Status: 0x1 -RAM read ptr: 0x0 -RAM wrt ptr: 0x19d3 <----- The write pointer is moving -Trigger cnt: 0x0 -Control: 0x1 -Flush status: 0x0 -Flush ctrl: 0x2001 -root:/sys/bus/coresight/devices# - -Trace collection is stopped the same way: - -root:/sys/bus/coresight/devices# echo 0 > 2201c000.ptm/enable_source -root:/sys/bus/coresight/devices# - -The content of the ETB buffer can be harvested directly from /dev: - -root:/sys/bus/coresight/devices# dd if=/dev/20010000.etb \ -of=~/cstrace.bin - -64+0 records in -64+0 records out -32768 bytes (33 kB) copied, 0.00125258 s, 26.2 MB/s -root:/sys/bus/coresight/devices# - -The file cstrace.bin can be decompressed using "ptm2human", DS-5 or Trace32. - -Following is a DS-5 output of an experimental loop that increments a variable up -to a certain value. The example is simple and yet provides a glimpse of the -wealth of possibilities that coresight provides. - -Info Tracing enabled -Instruction 106378866 0x8026B53C E52DE004 false PUSH {lr} -Instruction 0 0x8026B540 E24DD00C false SUB sp,sp,#0xc -Instruction 0 0x8026B544 E3A03000 false MOV r3,#0 -Instruction 0 0x8026B548 E58D3004 false STR r3,[sp,#4] -Instruction 0 0x8026B54C E59D3004 false LDR r3,[sp,#4] -Instruction 0 0x8026B550 E3530004 false CMP r3,#4 -Instruction 0 0x8026B554 E2833001 false ADD r3,r3,#1 -Instruction 0 0x8026B558 E58D3004 false STR r3,[sp,#4] -Instruction 0 0x8026B55C DAFFFFFA true BLE {pc}-0x10 ; 0x8026b54c -Timestamp Timestamp: 17106715833 -Instruction 319 0x8026B54C E59D3004 false LDR r3,[sp,#4] -Instruction 0 0x8026B550 E3530004 false CMP r3,#4 -Instruction 0 0x8026B554 E2833001 false ADD r3,r3,#1 -Instruction 0 0x8026B558 E58D3004 false STR r3,[sp,#4] -Instruction 0 0x8026B55C DAFFFFFA true BLE {pc}-0x10 ; 0x8026b54c -Instruction 9 0x8026B54C E59D3004 false LDR r3,[sp,#4] -Instruction 0 0x8026B550 E3530004 false CMP r3,#4 -Instruction 0 0x8026B554 E2833001 false ADD r3,r3,#1 -Instruction 0 0x8026B558 E58D3004 false STR r3,[sp,#4] -Instruction 0 0x8026B55C DAFFFFFA true BLE {pc}-0x10 ; 0x8026b54c -Instruction 7 0x8026B54C E59D3004 false LDR r3,[sp,#4] -Instruction 0 0x8026B550 E3530004 false CMP r3,#4 -Instruction 0 0x8026B554 E2833001 false ADD r3,r3,#1 -Instruction 0 0x8026B558 E58D3004 false STR r3,[sp,#4] -Instruction 0 0x8026B55C DAFFFFFA true BLE {pc}-0x10 ; 0x8026b54c -Instruction 7 0x8026B54C E59D3004 false LDR r3,[sp,#4] -Instruction 0 0x8026B550 E3530004 false CMP r3,#4 -Instruction 0 0x8026B554 E2833001 false ADD r3,r3,#1 -Instruction 0 0x8026B558 E58D3004 false STR r3,[sp,#4] -Instruction 0 0x8026B55C DAFFFFFA true BLE {pc}-0x10 ; 0x8026b54c -Instruction 10 0x8026B54C E59D3004 false LDR r3,[sp,#4] -Instruction 0 0x8026B550 E3530004 false CMP r3,#4 -Instruction 0 0x8026B554 E2833001 false ADD r3,r3,#1 -Instruction 0 0x8026B558 E58D3004 false STR r3,[sp,#4] -Instruction 0 0x8026B55C DAFFFFFA true BLE {pc}-0x10 ; 0x8026b54c -Instruction 6 0x8026B560 EE1D3F30 false MRC p15,#0x0,r3,c13,c0,#1 -Instruction 0 0x8026B564 E1A0100D false MOV r1,sp -Instruction 0 0x8026B568 E3C12D7F false BIC r2,r1,#0x1fc0 -Instruction 0 0x8026B56C E3C2203F false BIC r2,r2,#0x3f -Instruction 0 0x8026B570 E59D1004 false LDR r1,[sp,#4] -Instruction 0 0x8026B574 E59F0010 false LDR r0,[pc,#16] ; [0x8026B58C] = 0x80550368 -Instruction 0 0x8026B578 E592200C false LDR r2,[r2,#0xc] -Instruction 0 0x8026B57C E59221D0 false LDR r2,[r2,#0x1d0] -Instruction 0 0x8026B580 EB07A4CF true BL {pc}+0x1e9344 ; 0x804548c4 -Info Tracing enabled -Instruction 13570831 0x8026B584 E28DD00C false ADD sp,sp,#0xc -Instruction 0 0x8026B588 E8BD8000 true LDM sp!,{pc} -Timestamp Timestamp: 17107041535 diff --git a/Documentation/trace/ftrace.txt b/Documentation/trace/ftrace.txt index 29064c3bfcd1..bfe8c29b1f1d 100644 --- a/Documentation/trace/ftrace.txt +++ b/Documentation/trace/ftrace.txt @@ -2013,35 +2013,6 @@ will produce: 1) 1.449 us | } -You can disable the hierarchical function call formatting and instead print a -flat list of function entry and return events. This uses the format described -in the Output Formatting section and respects all the trace options that -control that formatting. Hierarchical formatting is the default. - - hierachical: echo nofuncgraph-flat > trace_options - flat: echo funcgraph-flat > trace_options - - ie: - - # tracer: function_graph - # - # entries-in-buffer/entries-written: 68355/68355 #P:2 - # - # _-----=> irqs-off - # / _----=> need-resched - # | / _---=> hardirq/softirq - # || / _--=> preempt-depth - # ||| / delay - # TASK-PID CPU# |||| TIMESTAMP FUNCTION - # | | | |||| | | - sh-1806 [001] d... 198.843443: graph_ent: func=_raw_spin_lock - sh-1806 [001] d... 198.843445: graph_ent: func=__raw_spin_lock - sh-1806 [001] d..1 198.843447: graph_ret: func=__raw_spin_lock - sh-1806 [001] d..1 198.843449: graph_ret: func=_raw_spin_lock - sh-1806 [001] d..1 198.843451: graph_ent: func=_raw_spin_unlock_irqrestore - sh-1806 [001] d... 198.843453: graph_ret: func=_raw_spin_unlock_irqrestore - - You might find other useful features for this tracer in the following "dynamic ftrace" section such as tracing only specific functions or tasks. diff --git a/Documentation/video4linux/gspca.txt b/Documentation/video4linux/gspca.txt index d2ba80bb7af5..1e6b6531bbcc 100644 --- a/Documentation/video4linux/gspca.txt +++ b/Documentation/video4linux/gspca.txt @@ -55,7 +55,6 @@ zc3xx 0458:700f Genius VideoCam Web V2 sonixj 0458:7025 Genius Eye 311Q sn9c20x 0458:7029 Genius Look 320s sonixj 0458:702e Genius Slim 310 NB -sn9c20x 0458:7045 Genius Look 1320 V2 sn9c20x 0458:704a Genius Slim 1320 sn9c20x 0458:704c Genius i-Look 1321 sn9c20x 045e:00f4 LifeCam VX-6000 (SN9C20x + OV9650) diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt index 257a1f1eecc7..5f91eda91647 100644 --- a/Documentation/virtual/kvm/api.txt +++ b/Documentation/virtual/kvm/api.txt @@ -148,9 +148,9 @@ of banks, as set via the KVM_X86_SETUP_MCE ioctl. 4.4 KVM_CHECK_EXTENSION -Capability: basic, KVM_CAP_CHECK_EXTENSION_VM for vm ioctl +Capability: basic Architectures: all -Type: system ioctl, vm ioctl +Type: system ioctl Parameters: extension identifier (KVM_CAP_*) Returns: 0 if unsupported; 1 (or some other positive integer) if supported @@ -160,9 +160,6 @@ receives an integer that describes the extension availability. Generally 0 means no and 1 means yes, but some extensions may report additional information in the integer return value. -Based on their initialization different VMs may have different capabilities. -It is thus encouraged to use the vm ioctl to query for capabilities (available -with KVM_CAP_CHECK_EXTENSION_VM on the vm fd) 4.5 KVM_GET_VCPU_MMAP_SIZE @@ -283,7 +280,7 @@ kvm_run' (see below). 4.11 KVM_GET_REGS Capability: basic -Architectures: all except ARM, arm64 +Architectures: all except ARM Type: vcpu ioctl Parameters: struct kvm_regs (out) Returns: 0 on success, -1 on error @@ -304,7 +301,7 @@ struct kvm_regs { 4.12 KVM_SET_REGS Capability: basic -Architectures: all except ARM, arm64 +Architectures: all except ARM Type: vcpu ioctl Parameters: struct kvm_regs (in) Returns: 0 on success, -1 on error @@ -590,7 +587,7 @@ struct kvm_fpu { 4.24 KVM_CREATE_IRQCHIP Capability: KVM_CAP_IRQCHIP -Architectures: x86, ia64, ARM, arm64 +Architectures: x86, ia64, ARM Type: vm ioctl Parameters: none Returns: 0 on success, -1 on error @@ -598,14 +595,14 @@ Returns: 0 on success, -1 on error Creates an interrupt controller model in the kernel. On x86, creates a virtual ioapic, a virtual PIC (two PICs, nested), and sets up future vcpus to have a local APIC. IRQ routing for GSIs 0-15 is set to both PIC and IOAPIC; GSI 16-23 -only go to the IOAPIC. On ia64, a IOSAPIC is created. On ARM/arm64, a GIC is +only go to the IOAPIC. On ia64, a IOSAPIC is created. On ARM, a GIC is created. 4.25 KVM_IRQ_LINE Capability: KVM_CAP_IRQCHIP -Architectures: x86, ia64, arm, arm64 +Architectures: x86, ia64, arm Type: vm ioctl Parameters: struct kvm_irq_level Returns: 0 on success, -1 on error @@ -615,10 +612,9 @@ On some architectures it is required that an interrupt controller model has been previously created with KVM_CREATE_IRQCHIP. Note that edge-triggered interrupts require the level to be set to 1 and then back to 0. -ARM/arm64 can signal an interrupt either at the CPU level, or at the -in-kernel irqchip (GIC), and for in-kernel irqchip can tell the GIC to -use PPIs designated for specific cpus. The irq field is interpreted -like this: +ARM can signal an interrupt either at the CPU level, or at the in-kernel irqchip +(GIC), and for in-kernel irqchip can tell the GIC to use PPIs designated for +specific cpus. The irq field is interpreted like this:  bits: | 31 ... 24 | 23 ... 16 | 15 ... 0 | field: | irq_type | vcpu_index | irq_id | @@ -972,20 +968,18 @@ uniprocessor guests). Possible values are: - - KVM_MP_STATE_RUNNABLE: the vcpu is currently running [x86, ia64] + - KVM_MP_STATE_RUNNABLE: the vcpu is currently running - KVM_MP_STATE_UNINITIALIZED: the vcpu is an application processor (AP) - which has not yet received an INIT signal [x86, - ia64] + which has not yet received an INIT signal - KVM_MP_STATE_INIT_RECEIVED: the vcpu has received an INIT signal, and is - now ready for a SIPI [x86, ia64] + now ready for a SIPI - KVM_MP_STATE_HALTED: the vcpu has executed a HLT instruction and - is waiting for an interrupt [x86, ia64] + is waiting for an interrupt - KVM_MP_STATE_SIPI_RECEIVED: the vcpu has just received a SIPI (vector - accessible via KVM_GET_VCPU_EVENTS) [x86, ia64] + accessible via KVM_GET_VCPU_EVENTS) -On x86 and ia64, this ioctl is only useful after KVM_CREATE_IRQCHIP. Without an -in-kernel irqchip, the multiprocessing state must be maintained by userspace on -these architectures. +This ioctl is only useful after KVM_CREATE_IRQCHIP. Without an in-kernel +irqchip, the multiprocessing state must be maintained by userspace. 4.39 KVM_SET_MP_STATE @@ -999,9 +993,8 @@ Returns: 0 on success; -1 on error Sets the vcpu's current "multiprocessing state"; see KVM_GET_MP_STATE for arguments. -On x86 and ia64, this ioctl is only useful after KVM_CREATE_IRQCHIP. Without an -in-kernel irqchip, the multiprocessing state must be maintained by userspace on -these architectures. +This ioctl is only useful after KVM_CREATE_IRQCHIP. Without an in-kernel +irqchip, the multiprocessing state must be maintained by userspace. 4.40 KVM_SET_IDENTITY_MAP_ADDR @@ -1128,9 +1121,9 @@ struct kvm_cpuid2 { struct kvm_cpuid_entry2 entries[0]; }; -#define KVM_CPUID_FLAG_SIGNIFCANT_INDEX BIT(0) -#define KVM_CPUID_FLAG_STATEFUL_FUNC BIT(1) -#define KVM_CPUID_FLAG_STATE_READ_NEXT BIT(2) +#define KVM_CPUID_FLAG_SIGNIFCANT_INDEX 1 +#define KVM_CPUID_FLAG_STATEFUL_FUNC 2 +#define KVM_CPUID_FLAG_STATE_READ_NEXT 4 struct kvm_cpuid_entry2 { __u32 function; @@ -1838,22 +1831,6 @@ ARM 32-bit VFP control registers have the following id bit patterns: ARM 64-bit FP registers have the following id bit patterns: 0x4030 0000 0012 0 - -arm64 registers are mapped using the lower 32 bits. The upper 16 of -that is the register group type, or coprocessor number: - -arm64 core/FP-SIMD registers have the following id bit patterns. Note -that the size of the access is variable, as the kvm_regs structure -contains elements ranging from 32 to 128 bits. The index is a 32bit -value in the kvm_regs structure seen as a 32bit array. - 0x60x0 0000 0010 - -arm64 CCSIDR registers are demultiplexed by CSSELR value: - 0x6020 0000 0011 00 - -arm64 system registers have the following id bit patterns: - 0x6030 0000 0013 - 4.69 KVM_GET_ONE_REG Capability: KVM_CAP_ONE_REG @@ -2287,7 +2264,7 @@ current state. "addr" is ignored. 4.77 KVM_ARM_VCPU_INIT Capability: basic -Architectures: arm, arm64 +Architectures: arm Type: vcpu ioctl Parameters: struct struct kvm_vcpu_init (in) Returns: 0 on success; -1 on error @@ -2306,14 +2283,12 @@ should be created before this ioctl is invoked. Possible features: - KVM_ARM_VCPU_POWER_OFF: Starts the CPU in a power-off state. Depends on KVM_CAP_ARM_PSCI. - - KVM_ARM_VCPU_EL1_32BIT: Starts the CPU in a 32bit mode. - Depends on KVM_CAP_ARM_EL1_32BIT (arm64 only). 4.78 KVM_GET_REG_LIST Capability: basic -Architectures: arm, arm64 +Architectures: arm Type: vcpu ioctl Parameters: struct kvm_reg_list (in/out) Returns: 0 on success; -1 on error @@ -2330,10 +2305,10 @@ This ioctl returns the guest registers that are supported for the KVM_GET_ONE_REG/KVM_SET_ONE_REG calls. -4.85 KVM_ARM_SET_DEVICE_ADDR (deprecated) +4.80 KVM_ARM_SET_DEVICE_ADDR Capability: KVM_CAP_ARM_SET_DEVICE_ADDR -Architectures: arm, arm64 +Architectures: arm Type: vm ioctl Parameters: struct kvm_arm_device_address (in) Returns: 0 on success, -1 on error @@ -2354,25 +2329,20 @@ can access emulated or directly exposed devices, which the host kernel needs to know about. The id field is an architecture specific identifier for a specific device. -ARM/arm64 divides the id field into two parts, a device id and an -address type id specific to the individual device. +ARM divides the id field into two parts, a device id and an address type id +specific to the individual device.  bits: | 63 ... 32 | 31 ... 16 | 15 ... 0 | field: | 0x00000000 | device id | addr type id | -ARM/arm64 currently only require this when using the in-kernel GIC -support for the hardware VGIC features, using KVM_ARM_DEVICE_VGIC_V2 -as the device id. When setting the base address for the guest's -mapping of the VGIC virtual CPU and distributor interface, the ioctl -must be called after calling KVM_CREATE_IRQCHIP, but before calling -KVM_RUN on any of the VCPUs. Calling this ioctl twice for any of the -base addresses will return -EEXIST. - -Note, this IOCTL is deprecated and the more flexible SET/GET_DEVICE_ATTR API -should be used instead. +ARM currently only require this when using the in-kernel GIC support for the +hardware VGIC features, using KVM_ARM_DEVICE_VGIC_V2 as the device id. When +setting the base address for the guest's mapping of the VGIC virtual CPU +and distributor interface, the ioctl must be called after calling +KVM_CREATE_IRQCHIP, but before calling KVM_RUN on any of the VCPUs. Calling +this ioctl twice for any of the base addresses will return -EEXIST. - -4.86 KVM_PPC_RTAS_DEFINE_TOKEN +4.82 KVM_PPC_RTAS_DEFINE_TOKEN Capability: KVM_CAP_PPC_RTAS Architectures: ppc @@ -2642,21 +2612,6 @@ It gets triggered whenever both KVM_CAP_PPC_EPR are enabled and an external interrupt has just been delivered into the guest. User space should put the acknowledged interrupt vector into the 'epr' field. - /* KVM_EXIT_SYSTEM_EVENT */ - struct { -#define KVM_SYSTEM_EVENT_SHUTDOWN 1 -#define KVM_SYSTEM_EVENT_RESET 2 - __u32 type; - __u64 flags; - } system_event; - -If exit_reason is KVM_EXIT_SYSTEM_EVENT then the vcpu has triggered -a system-level event using some architecture specific mechanism (hypercall -or some special instruction). In case of ARM/ARM64, this is triggered using -HVC instruction based PSCI call from the vcpu. The 'type' field describes -the system-level event type. The 'flags' field describes architecture -specific flags for the system-level event. - /* Fix the size of the union. */ char padding[256]; }; @@ -2686,77 +2641,6 @@ and usually define the validity of a groups of registers. (e.g. one bit }; -4.81 KVM_GET_EMULATED_CPUID - -Capability: KVM_CAP_EXT_EMUL_CPUID -Architectures: x86 -Type: system ioctl -Parameters: struct kvm_cpuid2 (in/out) -Returns: 0 on success, -1 on error - -struct kvm_cpuid2 { - __u32 nent; - __u32 flags; - struct kvm_cpuid_entry2 entries[0]; -}; - -The member 'flags' is used for passing flags from userspace. - -#define KVM_CPUID_FLAG_SIGNIFCANT_INDEX BIT(0) -#define KVM_CPUID_FLAG_STATEFUL_FUNC BIT(1) -#define KVM_CPUID_FLAG_STATE_READ_NEXT BIT(2) - -struct kvm_cpuid_entry2 { - __u32 function; - __u32 index; - __u32 flags; - __u32 eax; - __u32 ebx; - __u32 ecx; - __u32 edx; - __u32 padding[3]; -}; - -This ioctl returns x86 cpuid features which are emulated by -kvm.Userspace can use the information returned by this ioctl to query -which features are emulated by kvm instead of being present natively. - -Userspace invokes KVM_GET_EMULATED_CPUID by passing a kvm_cpuid2 -structure with the 'nent' field indicating the number of entries in -the variable-size array 'entries'. If the number of entries is too low -to describe the cpu capabilities, an error (E2BIG) is returned. If the -number is too high, the 'nent' field is adjusted and an error (ENOMEM) -is returned. If the number is just right, the 'nent' field is adjusted -to the number of valid entries in the 'entries' array, which is then -filled. - -The entries returned are the set CPUID bits of the respective features -which kvm emulates, as returned by the CPUID instruction, with unknown -or unsupported feature bits cleared. - -Features like x2apic, for example, may not be present in the host cpu -but are exposed by kvm in KVM_GET_SUPPORTED_CPUID because they can be -emulated efficiently and thus not included here. - -The fields in each entry are defined as follows: - - function: the eax value used to obtain the entry - index: the ecx value used to obtain the entry (for entries that are - affected by ecx) - flags: an OR of zero or more of the following: - KVM_CPUID_FLAG_SIGNIFCANT_INDEX: - if the index field is valid - KVM_CPUID_FLAG_STATEFUL_FUNC: - if cpuid for this function returns different values for successive - invocations; there will be several entries with the same function, - all with this flag set - KVM_CPUID_FLAG_STATE_READ_NEXT: - for KVM_CPUID_FLAG_STATEFUL_FUNC entries, set if this entry is - the first entry to be read by a cpu - eax, ebx, ecx, edx: the values returned by the cpuid instruction for - this function/index combination - - 6. Capabilities that can be enabled ----------------------------------- diff --git a/Documentation/virtual/kvm/devices/arm-vgic.txt b/Documentation/virtual/kvm/devices/arm-vgic.txt deleted file mode 100644 index df8b0c7540b6..000000000000 --- a/Documentation/virtual/kvm/devices/arm-vgic.txt +++ /dev/null @@ -1,83 +0,0 @@ -ARM Virtual Generic Interrupt Controller (VGIC) -=============================================== - -Device types supported: - KVM_DEV_TYPE_ARM_VGIC_V2 ARM Generic Interrupt Controller v2.0 - -Only one VGIC instance may be instantiated through either this API or the -legacy KVM_CREATE_IRQCHIP api. The created VGIC will act as the VM interrupt -controller, requiring emulated user-space devices to inject interrupts to the -VGIC instead of directly to CPUs. - -Groups: - KVM_DEV_ARM_VGIC_GRP_ADDR - Attributes: - KVM_VGIC_V2_ADDR_TYPE_DIST (rw, 64-bit) - Base address in the guest physical address space of the GIC distributor - register mappings. - - KVM_VGIC_V2_ADDR_TYPE_CPU (rw, 64-bit) - Base address in the guest physical address space of the GIC virtual cpu - interface register mappings. - - KVM_DEV_ARM_VGIC_GRP_DIST_REGS - Attributes: - The attr field of kvm_device_attr encodes two values: - bits: | 63 .... 40 | 39 .. 32 | 31 .... 0 | - values: | reserved | cpu id | offset | - - All distributor regs are (rw, 32-bit) - - The offset is relative to the "Distributor base address" as defined in the - GICv2 specs. Getting or setting such a register has the same effect as - reading or writing the register on the actual hardware from the cpu - specified with cpu id field. Note that most distributor fields are not - banked, but return the same value regardless of the cpu id used to access - the register. - Limitations: - - Priorities are not implemented, and registers are RAZ/WI - Errors: - -ENODEV: Getting or setting this register is not yet supported - -EBUSY: One or more VCPUs are running - - KVM_DEV_ARM_VGIC_GRP_CPU_REGS - Attributes: - The attr field of kvm_device_attr encodes two values: - bits: | 63 .... 40 | 39 .. 32 | 31 .... 0 | - values: | reserved | cpu id | offset | - - All CPU interface regs are (rw, 32-bit) - - The offset specifies the offset from the "CPU interface base address" as - defined in the GICv2 specs. Getting or setting such a register has the - same effect as reading or writing the register on the actual hardware. - - The Active Priorities Registers APRn are implementation defined, so we set a - fixed format for our implementation that fits with the model of a "GICv2 - implementation without the security extensions" which we present to the - guest. This interface always exposes four register APR[0-3] describing the - maximum possible 128 preemption levels. The semantics of the register - indicate if any interrupts in a given preemption level are in the active - state by setting the corresponding bit. - - Thus, preemption level X has one or more active interrupts if and only if: - - APRn[X mod 32] == 0b1, where n = X / 32 - - Bits for undefined preemption levels are RAZ/WI. - - Limitations: - - Priorities are not implemented, and registers are RAZ/WI - Errors: - -ENODEV: Getting or setting this register is not yet supported - -EBUSY: One or more VCPUs are running - - KVM_DEV_ARM_VGIC_GRP_NR_IRQS - Attributes: - A value describing the number of interrupts (SGI, PPI and SPI) for - this GIC instance, ranging from 64 to 1024, in increments of 32. - - Errors: - -EINVAL: Value set is out of the expected range - -EBUSY: Value has already be set, or GIC has already been initialized - with default values. diff --git a/Documentation/virtual/kvm/devices/vfio.txt b/Documentation/virtual/kvm/devices/vfio.txt deleted file mode 100644 index ef51740c67ca..000000000000 --- a/Documentation/virtual/kvm/devices/vfio.txt +++ /dev/null @@ -1,22 +0,0 @@ -VFIO virtual device -=================== - -Device types supported: - KVM_DEV_TYPE_VFIO - -Only one VFIO instance may be created per VM. The created device -tracks VFIO groups in use by the VM and features of those groups -important to the correctness and acceleration of the VM. As groups -are enabled and disabled for use by the VM, KVM should be updated -about their presence. When registered with KVM, a reference to the -VFIO-group is held by KVM. - -Groups: - KVM_DEV_VFIO_GROUP - -KVM_DEV_VFIO_GROUP attributes: - KVM_DEV_VFIO_GROUP_ADD: Add a VFIO group to VFIO-KVM device tracking - KVM_DEV_VFIO_GROUP_DEL: Remove a VFIO group from VFIO-KVM device tracking - -For each, kvm_device_attr.addr points to an int32_t file descriptor -for the VFIO group. diff --git a/Documentation/virtual/kvm/locking.txt b/Documentation/virtual/kvm/locking.txt index ba035c33d01c..41b7ac9884b5 100644 --- a/Documentation/virtual/kvm/locking.txt +++ b/Documentation/virtual/kvm/locking.txt @@ -132,14 +132,10 @@ See the comments in spte_has_volatile_bits() and mmu_spte_update(). ------------ Name: kvm_lock -Type: spinlock_t +Type: raw_spinlock Arch: any Protects: - vm_list - -Name: kvm_count_lock -Type: raw_spinlock_t -Arch: any -Protects: - hardware virtualization enable/disable + - hardware virtualization enable/disable Comment: 'raw' because hardware enabling/disabling must be atomic /wrt migration. diff --git a/Documentation/x86/x86_64/mm.txt b/Documentation/x86/x86_64/mm.txt index bd4370487b07..881582f75c9c 100644 --- a/Documentation/x86/x86_64/mm.txt +++ b/Documentation/x86/x86_64/mm.txt @@ -12,8 +12,6 @@ ffffc90000000000 - ffffe8ffffffffff (=45 bits) vmalloc/ioremap space ffffe90000000000 - ffffe9ffffffffff (=40 bits) hole ffffea0000000000 - ffffeaffffffffff (=40 bits) virtual memory map (1TB) ... unused hole ... -ffffff0000000000 - ffffff7fffffffff (=39 bits) %esp fixup stacks -... unused hole ... ffffffff80000000 - ffffffffa0000000 (=512 MB) kernel text mapping, from phys 0 ffffffffa0000000 - ffffffffff5fffff (=1525 MB) module mapping space ffffffffff600000 - ffffffffffdfffff (=8 MB) vsyscalls diff --git a/Documentation/zh_CN/HOWTO b/Documentation/zh_CN/HOWTO index 7599eb38b764..7fba5aab9ef9 100644 --- a/Documentation/zh_CN/HOWTO +++ b/Documentation/zh_CN/HOWTO @@ -237,7 +237,7 @@ kernel.org网站的pub/linux/kernel/v2.6/目录下找到它。它的开发遵循 如果没有2.6.x.y版本内核存在，那么最新的2.6.x版本内核就相当于是当前的稳定 版内核。 -2.6.x.y版本由“稳定版”小组（邮件地址）维护，一般隔周发 +2.6.x.y版本由“稳定版”小组（邮件地址）维护，一般隔周发 布新版本。 内核源码中的Documentation/stable_kernel_rules.txt文件具体描述了可被稳定 diff --git a/Documentation/zh_CN/stable_kernel_rules.txt b/Documentation/zh_CN/stable_kernel_rules.txt index 26ea5ed7cd9c..b5b9b0ab02fd 100644 --- a/Documentation/zh_CN/stable_kernel_rules.txt +++ b/Documentation/zh_CN/stable_kernel_rules.txt @@ -42,7 +42,7 @@ Documentation/stable_kernel_rules.txt 的中文翻译 向稳定版代码树提交补丁的过程： - - 在确认了补丁符合以上的规则后，将补丁发送到stable@vger.kernel.org。 + - 在确认了补丁符合以上的规则后，将补丁发送到stable@kernel.org。 - 如果补丁被接受到队列里，发送者会收到一个ACK回复，如果没有被接受，收 到的是NAK回复。回复需要几天的时间，这取决于开发者的时间安排。 - 被接受的补丁会被加到稳定版本队列里，等待其他开发者的审查。 diff --git a/MAINTAINERS b/MAINTAINERS index 8a8a48b39cd8..ad7e322ad17b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -783,14 +783,6 @@ M: Hubert Feurstein S: Maintained F: arch/arm/mach-ep93xx/micro9.c -ARM/CORESIGHT FRAMEWORK AND DRIVERS -M: Mathieu Poirier -L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) -S: Maintained -F: drivers/coresight/* -F: Documentation/trace/coresight.txt -F: Documentation/devicetree/bindings/arm/coresight.txt - ARM/CORGI MACHINE SUPPORT M: Richard Purdie S: Maintained @@ -4727,15 +4719,6 @@ F: arch/arm/include/uapi/asm/kvm* F: arch/arm/include/asm/kvm* F: arch/arm/kvm/ -KERNEL VIRTUAL MACHINE FOR ARM64 (KVM/arm64) -M: Marc Zyngier -L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) -L: kvmarm@lists.cs.columbia.edu -S: Maintained -F: arch/arm64/include/uapi/asm/kvm* -F: arch/arm64/include/asm/kvm* -F: arch/arm64/kvm/ - KEXEC M: Eric Biederman W: http://kernel.org/pub/linux/utils/kernel/kexec/ @@ -5169,14 +5152,6 @@ S: Maintained F: drivers/net/macvlan.c F: include/linux/if_macvlan.h -MAILBOX API -M: Jassi Brar -L: linux-kernel@vger.kernel.org -S: Maintained -F: drivers/mailbox/ -F: include/linux/mailbox_client.h -F: include/linux/mailbox_controller.h - MAN-PAGES: MANUAL PAGES FOR LINUX -- Sections 2, 3, 4, 5, and 7 M: Michael Kerrisk W: http://www.kernel.org/doc/man-pages @@ -7692,7 +7667,6 @@ STABLE BRANCH M: Greg Kroah-Hartman L: stable@vger.kernel.org S: Supported -F: Documentation/stable_kernel_rules.txt STAGING SUBSYSTEM M: Greg Kroah-Hartman @@ -8098,7 +8072,6 @@ S: Supported F: drivers/thermal/ F: include/linux/thermal.h F: include/linux/cpu_cooling.h -F: Documentation/devicetree/bindings/thermal/ THINGM BLINK(1) USB RGB LED DRIVER M: Vivien Didelot diff --git a/Makefile b/Makefile index 25701b67bb6d..e5e3ba085191 100644 --- a/Makefile +++ b/Makefile @@ -1,8 +1,8 @@ VERSION = 3 PATCHLEVEL = 10 -SUBLEVEL = 92 +SUBLEVEL = 0 EXTRAVERSION = -NAME = TOSSUG Baby Fish +NAME = Unicycling Gorilla # *DOCUMENTATION* # To see a list of typical targets execute "make help" @@ -241,7 +241,7 @@ CONFIG_SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \ HOSTCC = gcc HOSTCXX = g++ -HOSTCFLAGS = -Wall -Wmissing-prototypes -Wstrict-prototypes -O2 -fomit-frame-pointer -std=gnu89 +HOSTCFLAGS = -Wall -Wmissing-prototypes -Wstrict-prototypes -O2 -fomit-frame-pointer HOSTCXXFLAGS = -O2 # Decide whether to build built-in, modular, or both. @@ -373,9 +373,7 @@ KBUILD_CFLAGS := -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \ -fno-strict-aliasing -fno-common \ -Werror-implicit-function-declaration \ -Wno-format-security \ - -fno-delete-null-pointer-checks \ - -std=gnu89 - + -fno-delete-null-pointer-checks KBUILD_AFLAGS_KERNEL := KBUILD_CFLAGS_KERNEL := KBUILD_AFLAGS := -D__ASSEMBLY__ @@ -616,8 +614,6 @@ KBUILD_CFLAGS += -fomit-frame-pointer endif endif -KBUILD_CFLAGS += $(call cc-option, -fno-var-tracking-assignments) - ifdef CONFIG_DEBUG_INFO KBUILD_CFLAGS += -g KBUILD_AFLAGS += -gdwarf-2 diff --git a/android/configs/README b/android/configs/README deleted file mode 100644 index 8798731f8904..000000000000 --- a/android/configs/README +++ /dev/null @@ -1,15 +0,0 @@ -The files in this directory are meant to be used as a base for an Android -kernel config. All devices should have the options in android-base.cfg enabled. -While not mandatory, the options in android-recommended.cfg enable advanced -Android features. - -Assuming you already have a minimalist defconfig for your device, a possible -way to enable these options would be: - - ARCH= scripts/kconfig/merge_config.sh /_defconfig android/configs/android-base.cfg android/configs/android-recommended.cfg - -This will generate a .config that can then be used to save a new defconfig or -compile a new kernel with Android features enabled. - -Because there is no tool to consistently generate these config fragments, -lets keep them alphabetically sorted instead of random. diff --git a/android/configs/android-base.cfg b/android/configs/android-base.cfg deleted file mode 100644 index 1bee5d614d1b..000000000000 --- a/android/configs/android-base.cfg +++ /dev/null @@ -1,152 +0,0 @@ -# KEEP ALPHABETICALLY SORTED -# CONFIG_DEVKMEM is not set -# CONFIG_DEVMEM is not set -# CONFIG_INET_LRO is not set -# CONFIG_MODULES is not set -# CONFIG_OABI_COMPAT is not set -CONFIG_ANDROID=y -CONFIG_ANDROID_BINDER_IPC=y -CONFIG_ANDROID_LOW_MEMORY_KILLER=y -CONFIG_ARMV7_COMPAT=y -CONFIG_ASHMEM=y -CONFIG_AUDIT=y -CONFIG_BLK_DEV_DM=y -CONFIG_BLK_DEV_INITRD=y -CONFIG_CGROUPS=y -CONFIG_CGROUP_CPUACCT=y -CONFIG_CGROUP_DEBUG=y -CONFIG_CGROUP_FREEZER=y -CONFIG_CGROUP_SCHED=y -CONFIG_DM_CRYPT=y -CONFIG_DM_VERITY=y -CONFIG_EMBEDDED=y -CONFIG_FB=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_INET6_AH=y -CONFIG_INET6_ESP=y -CONFIG_INET6_IPCOMP=y -CONFIG_INET=y -CONFIG_INET_ESP=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_IP6_NF_FILTER=y -CONFIG_IP6_NF_IPTABLES=y -CONFIG_IP6_NF_MANGLE=y -CONFIG_IP6_NF_RAW=y -CONFIG_IP6_NF_TARGET_REJECT=y -CONFIG_IP6_NF_TARGET_REJECT_SKERR=y -CONFIG_IPV6_MIP6=y -CONFIG_IPV6_MULTIPLE_TABLES=y -CONFIG_IPV6_OPTIMISTIC_DAD=y -CONFIG_IPV6_PRIVACY=y -CONFIG_IPV6_ROUTER_PREF=y -CONFIG_IPV6_ROUTE_INFO=y -CONFIG_IP_ADVANCED_ROUTER=y -CONFIG_IP_MULTIPLE_TABLES=y -CONFIG_IP_NF_ARPFILTER=y -CONFIG_IP_NF_ARPTABLES=y -CONFIG_IP_NF_ARP_MANGLE=y -CONFIG_IP_NF_FILTER=y -CONFIG_IP_NF_IPTABLES=y -CONFIG_IP_NF_MANGLE=y -CONFIG_IP_NF_MATCH_AH=y -CONFIG_IP_NF_MATCH_ECN=y -CONFIG_IP_NF_MATCH_TTL=y -CONFIG_IP_NF_RAW=y -CONFIG_IP_NF_SECURITY=y -CONFIG_IP_NF_TARGET_MASQUERADE=y -CONFIG_IP_NF_TARGET_NETMAP=y -CONFIG_IP_NF_TARGET_REDIRECT=y -CONFIG_IP_NF_TARGET_REJECT=y -CONFIG_IP_NF_TARGET_REJECT_SKERR=y -CONFIG_NET=y -CONFIG_NETDEVICES=y -CONFIG_NETFILTER=y -CONFIG_NETFILTER_TPROXY=y -CONFIG_NETFILTER_XT_MATCH_COMMENT=y -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y -CONFIG_NETFILTER_XT_MATCH_CONNMARK=y -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y -CONFIG_NETFILTER_XT_MATCH_HELPER=y -CONFIG_NETFILTER_XT_MATCH_IPRANGE=y -CONFIG_NETFILTER_XT_MATCH_LENGTH=y -CONFIG_NETFILTER_XT_MATCH_LIMIT=y -CONFIG_NETFILTER_XT_MATCH_MAC=y -CONFIG_NETFILTER_XT_MATCH_MARK=y -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y -CONFIG_NETFILTER_XT_MATCH_POLICY=y -CONFIG_NETFILTER_XT_MATCH_QTAGUID=y -CONFIG_NETFILTER_XT_MATCH_QUOTA2=y -CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y -CONFIG_NETFILTER_XT_MATCH_QUOTA=y -CONFIG_NETFILTER_XT_MATCH_SOCKET=y -CONFIG_NETFILTER_XT_MATCH_STATE=y -CONFIG_NETFILTER_XT_MATCH_STATISTIC=y -CONFIG_NETFILTER_XT_MATCH_STRING=y -CONFIG_NETFILTER_XT_MATCH_TIME=y -CONFIG_NETFILTER_XT_MATCH_U32=y -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y -CONFIG_NETFILTER_XT_TARGET_CONNMARK=y -CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y -CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y -CONFIG_NETFILTER_XT_TARGET_MARK=y -CONFIG_NETFILTER_XT_TARGET_NFLOG=y -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y -CONFIG_NETFILTER_XT_TARGET_SECMARK=y -CONFIG_NETFILTER_XT_TARGET_TCPMSS=y -CONFIG_NETFILTER_XT_TARGET_TPROXY=y -CONFIG_NETFILTER_XT_TARGET_TRACE=y -CONFIG_NET_CLS_ACT=y -CONFIG_NET_CLS_U32=y -CONFIG_NET_EMATCH=y -CONFIG_NET_EMATCH_U32=y -CONFIG_NET_KEY=y -CONFIG_NET_SCHED=y -CONFIG_NET_SCH_HTB=y -CONFIG_NF_CONNTRACK=y -CONFIG_NF_CONNTRACK_AMANDA=y -CONFIG_NF_CONNTRACK_EVENTS=y -CONFIG_NF_CONNTRACK_FTP=y -CONFIG_NF_CONNTRACK_H323=y -CONFIG_NF_CONNTRACK_IPV4=y -CONFIG_NF_CONNTRACK_IPV6=y -CONFIG_NF_CONNTRACK_IRC=y -CONFIG_NF_CONNTRACK_NETBIOS_NS=y -CONFIG_NF_CONNTRACK_PPTP=y -CONFIG_NF_CONNTRACK_SANE=y -CONFIG_NF_CONNTRACK_SECMARK=y -CONFIG_NF_CONNTRACK_TFTP=y -CONFIG_NF_CT_NETLINK=y -CONFIG_NF_CT_PROTO_DCCP=y -CONFIG_NF_CT_PROTO_SCTP=y -CONFIG_NF_CT_PROTO_UDPLITE=y -CONFIG_NF_NAT=y -CONFIG_NO_HZ=y -CONFIG_PACKET=y -CONFIG_PM_AUTOSLEEP=y -CONFIG_PM_WAKELOCKS=y -CONFIG_PPP=y -CONFIG_PPPOLAC=y -CONFIG_PPPOPNS=y -CONFIG_PPP_BSDCOMP=y -CONFIG_PPP_DEFLATE=y -CONFIG_PPP_MPPE=y -CONFIG_PREEMPT=y -CONFIG_RESOURCE_COUNTERS=y -CONFIG_RTC_CLASS=y -CONFIG_RT_GROUP_SCHED=y -CONFIG_SECURITY=y -CONFIG_SECURITY_NETWORK=y -CONFIG_SECURITY_SELINUX=y -CONFIG_SND=y -CONFIG_SOUND=y -CONFIG_STAGING=y -CONFIG_SWITCH=y -CONFIG_SYNC=y -CONFIG_SYSVIPC=y -CONFIG_TUN=y -CONFIG_UNIX=y -CONFIG_USB_GADGET=y -CONFIG_USB_G_ANDROID=y -CONFIG_USB_OTG_WAKELOCK=y -CONFIG_XFRM_USER=y diff --git a/android/configs/android-recommended.cfg b/android/configs/android-recommended.cfg deleted file mode 100644 index 960b9de2860d..000000000000 --- a/android/configs/android-recommended.cfg +++ /dev/null @@ -1,121 +0,0 @@ -# KEEP ALPHABETICALLY SORTED -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_LEGACY_PTYS is not set -# CONFIG_NF_CONNTRACK_SIP is not set -# CONFIG_PM_WAKELOCKS_GC is not set -# CONFIG_VT is not set -CONFIG_ANDROID_TIMED_GPIO=y -CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=8192 -CONFIG_COMPACTION=y -CONFIG_DM_UEVENT=y -CONFIG_DRAGONRISE_FF=y -CONFIG_ENABLE_DEFAULT_TRACERS=y -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_SECURITY=y -CONFIG_FUSE_FS=y -CONFIG_GREENASIA_FF=y -CONFIG_HIDRAW=y -CONFIG_HID_A4TECH=y -CONFIG_HID_ACRUX=y -CONFIG_HID_ACRUX_FF=y -CONFIG_HID_APPLE=y -CONFIG_HID_BELKIN=y -CONFIG_HID_CHERRY=y -CONFIG_HID_CHICONY=y -CONFIG_HID_CYPRESS=y -CONFIG_HID_DRAGONRISE=y -CONFIG_HID_ELECOM=y -CONFIG_HID_EMS_FF=y -CONFIG_HID_EZKEY=y -CONFIG_HID_GREENASIA=y -CONFIG_HID_GYRATION=y -CONFIG_HID_HOLTEK=y -CONFIG_HID_KENSINGTON=y -CONFIG_HID_KEYTOUCH=y -CONFIG_HID_KYE=y -CONFIG_HID_LCPOWER=y -CONFIG_HID_LOGITECH=y -CONFIG_HID_LOGITECH_DJ=y -CONFIG_HID_MAGICMOUSE=y -CONFIG_HID_MICROSOFT=y -CONFIG_HID_MONTEREY=y -CONFIG_HID_MULTITOUCH=y -CONFIG_HID_NTRIG=y -CONFIG_HID_ORTEK=y -CONFIG_HID_PANTHERLORD=y -CONFIG_HID_PETALYNX=y -CONFIG_HID_PICOLCD=y -CONFIG_HID_PRIMAX=y -CONFIG_HID_PRODIKEYS=y -CONFIG_HID_ROCCAT=y -CONFIG_HID_SAITEK=y -CONFIG_HID_SAMSUNG=y -CONFIG_HID_SMARTJOYPLUS=y -CONFIG_HID_SONY=y -CONFIG_HID_SPEEDLINK=y -CONFIG_HID_SUNPLUS=y -CONFIG_HID_THRUSTMASTER=y -CONFIG_HID_TIVO=y -CONFIG_HID_TOPSEED=y -CONFIG_HID_TWINHAN=y -CONFIG_HID_UCLOGIC=y -CONFIG_HID_WACOM=y -CONFIG_HID_WALTOP=y -CONFIG_HID_WIIMOTE=y -CONFIG_HID_ZEROPLUS=y -CONFIG_HID_ZYDACRON=y -CONFIG_INPUT_EVDEV=y -CONFIG_INPUT_GPIO=y -CONFIG_INPUT_JOYSTICK=y -CONFIG_INPUT_KEYCHORD=y -CONFIG_INPUT_KEYRESET=y -CONFIG_INPUT_MISC=y -CONFIG_INPUT_TABLET=y -CONFIG_INPUT_UINPUT=y -CONFIG_ION=y -CONFIG_JOYSTICK_XPAD=y -CONFIG_JOYSTICK_XPAD_FF=y -CONFIG_JOYSTICK_XPAD_LEDS=y -CONFIG_KALLSYMS_ALL=y -CONFIG_KSM=y -CONFIG_LOGIG940_FF=y -CONFIG_LOGIRUMBLEPAD2_FF=y -CONFIG_LOGITECH_FF=y -CONFIG_MD=y -CONFIG_MEDIA_SUPPORT=y -CONFIG_MSDOS_FS=y -CONFIG_PANIC_TIMEOUT=5 -CONFIG_PANTHERLORD_FF=y -CONFIG_PERF_EVENTS=y -CONFIG_PM_DEBUG=y -CONFIG_PM_RUNTIME=y -CONFIG_PM_WAKELOCKS_LIMIT=0 -CONFIG_POWER_SUPPLY=y -CONFIG_PSTORE=y -CONFIG_PSTORE_CONSOLE=y -CONFIG_PSTORE_RAM=y -CONFIG_SCHEDSTATS=y -CONFIG_SMARTJOYPLUS_FF=y -CONFIG_SND=y -CONFIG_SOUND=y -CONFIG_SUSPEND_TIME=y -CONFIG_TABLET_USB_ACECAD=y -CONFIG_TABLET_USB_AIPTEK=y -CONFIG_TABLET_USB_GTCO=y -CONFIG_TABLET_USB_HANWANG=y -CONFIG_TABLET_USB_KBTAB=y -CONFIG_TABLET_USB_WACOM=y -CONFIG_TIMER_STATS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -CONFIG_UHID=y -CONFIG_UID_STAT=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_HIDDEV=y -CONFIG_USB_USBNET=y -CONFIG_VFAT_FS=y diff --git a/arch/Kconfig b/arch/Kconfig index 4c0a1d03ae0d..a4429bcd609e 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -331,7 +331,6 @@ config HAVE_ARCH_SECCOMP_FILTER - secure_computing is called from a ptrace_event()-safe context - secure_computing return value is checked and a return value of -1 results in the system call being skipped immediately. - - seccomp syscall wired up config SECCOMP_FILTER def_bool y @@ -405,12 +404,6 @@ config CLONE_BACKWARDS2 help Architecture has the first two arguments of clone(2) swapped. -config CLONE_BACKWARDS3 - bool - help - Architecture has tls passed as the 3rd argument of clone(2), - not the 5th one. - config ODD_RT_SIGACTION bool help diff --git a/arch/alpha/kernel/osf_sys.c b/arch/alpha/kernel/osf_sys.c index 1402fcc11c2c..b9e37ad6fa19 100644 --- a/arch/alpha/kernel/osf_sys.c +++ b/arch/alpha/kernel/osf_sys.c @@ -96,7 +96,6 @@ struct osf_dirent { }; struct osf_dirent_callback { - struct dir_context ctx; struct osf_dirent __user *dirent; long __user *basep; unsigned int count; @@ -147,17 +146,17 @@ SYSCALL_DEFINE4(osf_getdirentries, unsigned int, fd, { int error; struct fd arg = fdget(fd); - struct osf_dirent_callback buf = { - .ctx.actor = osf_filldir, - .dirent = dirent, - .basep = basep, - .count = count - }; + struct osf_dirent_callback buf; if (!arg.file) return -EBADF; - error = iterate_dir(arg.file, &buf.ctx); + buf.dirent = dirent; + buf.basep = basep; + buf.count = count; + buf.error = 0; + + error = vfs_readdir(arg.file, osf_filldir, &buf); if (error >= 0) error = buf.error; if (count != buf.count) diff --git a/arch/alpha/mm/fault.c b/arch/alpha/mm/fault.c index 9d0ac091a52a..0c4132dd3507 100644 --- a/arch/alpha/mm/fault.c +++ b/arch/alpha/mm/fault.c @@ -89,7 +89,8 @@ do_page_fault(unsigned long address, unsigned long mmcsr, const struct exception_table_entry *fixup; int fault, si_code = SEGV_MAPERR; siginfo_t info; - unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE; + unsigned int flags = (FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE | + (cause > 0 ? FAULT_FLAG_WRITE : 0)); /* As of EV6, a load into $31/$f31 is a prefetch, and never faults (or is suppressed by the PALcode). Support that for older CPUs @@ -114,8 +115,7 @@ do_page_fault(unsigned long address, unsigned long mmcsr, if (address >= TASK_SIZE) goto vmalloc_fault; #endif - if (user_mode(regs)) - flags |= FAULT_FLAG_USER; + retry: down_read(&mm->mmap_sem); vma = find_vma(mm, address); @@ -142,7 +142,6 @@ retry: } else { if (!(vma->vm_flags & VM_WRITE)) goto bad_area; - flags |= FAULT_FLAG_WRITE; } /* If for any reason at all we couldn't handle the fault, @@ -156,8 +155,6 @@ retry: if (unlikely(fault & VM_FAULT_ERROR)) { if (fault & VM_FAULT_OOM) goto out_of_memory; - else if (fault & VM_FAULT_SIGSEGV) - goto bad_area; else if (fault & VM_FAULT_SIGBUS) goto do_sigbus; BUG(); diff --git a/arch/arc/boot/dts/nsimosci.dts b/arch/arc/boot/dts/nsimosci.dts index 4c169d825415..ea16d782af58 100644 --- a/arch/arc/boot/dts/nsimosci.dts +++ b/arch/arc/boot/dts/nsimosci.dts @@ -11,16 +11,13 @@ / { compatible = "snps,nsimosci"; - clock-frequency = <20000000>; /* 20 MHZ */ + clock-frequency = <80000000>; /* 80 MHZ */ #address-cells = <1>; #size-cells = <1>; interrupt-parent = <&intc>; chosen { - /* this is for console on PGU */ - /* bootargs = "console=tty0 consoleblank=0"; */ - /* this is for console on serial */ - bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblank=0 debug"; + bootargs = "console=tty0 consoleblank=0"; }; aliases { @@ -46,32 +43,33 @@ #interrupt-cells = <1>; }; - uart0: serial@f0000000 { - compatible = "ns8250"; - reg = <0xf0000000 0x2000>; + uart0: serial@c0000000 { + compatible = "snps,dw-apb-uart"; + reg = <0xc0000000 0x2000>; interrupts = <11>; + #clock-frequency = <80000000>; clock-frequency = <3686400>; baud = <115200>; reg-shift = <2>; reg-io-width = <4>; - no-loopback-test = <1>; + status = "okay"; }; - pgu0: pgu@f9000000 { + pgu0: pgu@c9000000 { compatible = "snps,arcpgufb"; - reg = <0xf9000000 0x400>; + reg = <0xc9000000 0x400>; }; - ps2: ps2@f9001000 { + ps2: ps2@c9001000 { compatible = "snps,arc_ps2"; - reg = <0xf9000400 0x14>; + reg = <0xc9000400 0x14>; interrupts = <13>; interrupt-names = "arc_ps2_irq"; }; - eth0: ethernet@f0003000 { + eth0: ethernet@c0003000 { compatible = "snps,oscilan"; - reg = <0xf0003000 0x44>; + reg = <0xc0003000 0x44>; interrupts = <7>, <8>; interrupt-names = "rx", "tx"; }; diff --git a/arch/arc/configs/nsimosci_defconfig b/arch/arc/configs/nsimosci_defconfig index 00788e741ce7..446c96c24eff 100644 --- a/arch/arc/configs/nsimosci_defconfig +++ b/arch/arc/configs/nsimosci_defconfig @@ -54,7 +54,6 @@ CONFIG_SERIO_ARC_PS2=y CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_DW=y -CONFIG_SERIAL_OF_PLATFORM=y CONFIG_SERIAL_ARC=y CONFIG_SERIAL_ARC_CONSOLE=y # CONFIG_HW_RANDOM is not set diff --git a/arch/arc/include/asm/cmpxchg.h b/arch/arc/include/asm/cmpxchg.h index 90de5c528da2..03cd6894855d 100644 --- a/arch/arc/include/asm/cmpxchg.h +++ b/arch/arc/include/asm/cmpxchg.h @@ -25,11 +25,10 @@ __cmpxchg(volatile void *ptr, unsigned long expected, unsigned long new) " scond %3, [%1] \n" " bnz 1b \n" "2: \n" - : "=&r"(prev) /* Early clobber, to prevent reg reuse */ - : "r"(ptr), /* Not "m": llock only supports reg direct addr mode */ - "ir"(expected), - "r"(new) /* can't be "ir". scond can't take LIMM for "b" */ - : "cc", "memory"); /* so that gcc knows memory is being written here */ + : "=&r"(prev) + : "r"(ptr), "ir"(expected), + "r"(new) /* can't be "ir". scond can't take limm for "b" */ + : "cc"); return prev; } diff --git a/arch/arc/include/asm/delay.h b/arch/arc/include/asm/delay.h index 43de30256981..442ce5d0f709 100644 --- a/arch/arc/include/asm/delay.h +++ b/arch/arc/include/asm/delay.h @@ -53,10 +53,11 @@ static inline void __udelay(unsigned long usecs) { unsigned long loops; - /* (u64) cast ensures 64 bit MPY - real or emulated + /* (long long) cast ensures 64 bit MPY - real or emulated * HZ * 4295 is pre-evaluated by gcc - hence only 2 mpy ops */ - loops = ((u64) usecs * 4295 * HZ * loops_per_jiffy) >> 32; + loops = ((long long)(usecs * 4295 * HZ) * + (long long)(loops_per_jiffy)) >> 32; __delay(loops); } diff --git a/arch/arc/include/asm/irqflags.h b/arch/arc/include/asm/irqflags.h index c29d56587bf0..eac071668201 100644 --- a/arch/arc/include/asm/irqflags.h +++ b/arch/arc/include/asm/irqflags.h @@ -137,6 +137,13 @@ static inline void arch_unmask_irq(unsigned int irq) flag \scratch .endm +.macro IRQ_DISABLE_SAVE scratch, save + lr \scratch, [status32] + mov \save, \scratch /* Make a copy */ + bic \scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK) + flag \scratch +.endm + .macro IRQ_ENABLE scratch lr \scratch, [status32] or \scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK) diff --git a/arch/arc/include/asm/kgdb.h b/arch/arc/include/asm/kgdb.h index e897610c657a..4930957ca3d3 100644 --- a/arch/arc/include/asm/kgdb.h +++ b/arch/arc/include/asm/kgdb.h @@ -19,7 +19,7 @@ * register API yet */ #undef DBG_MAX_REG_NUM -#define GDB_MAX_REGS 87 +#define GDB_MAX_REGS 39 #define BREAK_INSTR_SIZE 2 #define CACHE_FLUSH_IS_SAFE 1 @@ -33,27 +33,23 @@ static inline void arch_kgdb_breakpoint(void) extern void kgdb_trap(struct pt_regs *regs, int param); -/* This is the numbering of registers according to the GDB. See GDB's - * arc-tdep.h for details. - * - * Registers are ordered for GDB 7.5. It is incompatible with GDB 6.8. */ -enum arc_linux_regnums { +enum arc700_linux_regnums { _R0 = 0, _R1, _R2, _R3, _R4, _R5, _R6, _R7, _R8, _R9, _R10, _R11, _R12, _R13, _R14, _R15, _R16, _R17, _R18, _R19, _R20, _R21, _R22, _R23, _R24, _R25, _R26, - _FP = 27, - __SP = 28, - _R30 = 30, - _BLINK = 31, - _LP_COUNT = 60, - _STOP_PC = 64, - _RET = 64, - _LP_START = 65, - _LP_END = 66, - _STATUS32 = 67, - _ECR = 76, - _BTA = 82, + _BTA = 27, + _LP_START = 28, + _LP_END = 29, + _LP_COUNT = 30, + _STATUS32 = 31, + _BLINK = 32, + _FP = 33, + __SP = 34, + _EFA = 35, + _RET = 36, + _ORIG_R8 = 37, + _STOP_PC = 38 }; #else diff --git a/arch/arc/include/asm/pgtable.h b/arch/arc/include/asm/pgtable.h index ecf23eaa20c1..95b1522212a7 100644 --- a/arch/arc/include/asm/pgtable.h +++ b/arch/arc/include/asm/pgtable.h @@ -270,8 +270,7 @@ static inline void pmd_set(pmd_t *pmdp, pte_t *ptep) #define pmd_clear(xp) do { pmd_val(*(xp)) = 0; } while (0) #define pte_page(x) (mem_map + \ - (unsigned long)(((pte_val(x) - CONFIG_LINUX_LINK_BASE) >> \ - PAGE_SHIFT))) + (unsigned long)(((pte_val(x) - PAGE_OFFSET) >> PAGE_SHIFT))) #define mk_pte(page, pgprot) \ ({ \ diff --git a/arch/arc/include/asm/ptrace.h b/arch/arc/include/asm/ptrace.h index 78485493639a..6179de7e07c2 100644 --- a/arch/arc/include/asm/ptrace.h +++ b/arch/arc/include/asm/ptrace.h @@ -52,14 +52,12 @@ struct pt_regs { /*to distinguish bet excp, syscall, irq */ union { - struct { #ifdef CONFIG_CPU_BIG_ENDIAN /* so that assembly code is same for LE/BE */ unsigned long orig_r8:16, event:16; #else unsigned long event:16, orig_r8:16; #endif - }; long orig_r8_word; }; }; @@ -83,7 +81,7 @@ struct callee_regs { long r13; }; -#define instruction_pointer(regs) (unsigned long)((regs)->ret) +#define instruction_pointer(regs) ((regs)->ret) #define profile_pc(regs) instruction_pointer(regs) /* return 1 if user mode or 0 if kernel mode */ diff --git a/arch/arc/include/asm/sections.h b/arch/arc/include/asm/sections.h index 764f1e3ba752..6fc1159dfefe 100644 --- a/arch/arc/include/asm/sections.h +++ b/arch/arc/include/asm/sections.h @@ -11,6 +11,7 @@ #include +extern char _int_vec_base_lds[]; extern char __arc_dccm_base[]; extern char __dtb_start[]; diff --git a/arch/arc/include/asm/spinlock.h b/arch/arc/include/asm/spinlock.h index b6a8c2dfbe6e..f158197ac5b0 100644 --- a/arch/arc/include/asm/spinlock.h +++ b/arch/arc/include/asm/spinlock.h @@ -45,14 +45,7 @@ static inline int arch_spin_trylock(arch_spinlock_t *lock) static inline void arch_spin_unlock(arch_spinlock_t *lock) { - unsigned int tmp = __ARCH_SPIN_LOCK_UNLOCKED__; - - __asm__ __volatile__( - " ex %0, [%1] \n" - : "+r" (tmp) - : "r"(&(lock->slock)) - : "memory"); - + lock->slock = __ARCH_SPIN_LOCK_UNLOCKED__; smp_mb(); } diff --git a/arch/arc/include/asm/syscall.h b/arch/arc/include/asm/syscall.h index 29de09804306..33ab3048e9b2 100644 --- a/arch/arc/include/asm/syscall.h +++ b/arch/arc/include/asm/syscall.h @@ -18,7 +18,7 @@ static inline long syscall_get_nr(struct task_struct *task, struct pt_regs *regs) { if (user_mode(regs) && in_syscall(regs)) - return regs->r8; + return regs->orig_r8; else return -1; } @@ -26,7 +26,8 @@ syscall_get_nr(struct task_struct *task, struct pt_regs *regs) static inline void syscall_rollback(struct task_struct *task, struct pt_regs *regs) { - regs->r0 = regs->orig_r0; + /* XXX: I can't fathom how pt_regs->r8 will be clobbered ? */ + regs->r8 = regs->orig_r8; } static inline long diff --git a/arch/arc/include/asm/uaccess.h b/arch/arc/include/asm/uaccess.h index 30c9baffa96f..32420824375b 100644 --- a/arch/arc/include/asm/uaccess.h +++ b/arch/arc/include/asm/uaccess.h @@ -43,7 +43,7 @@ * Because it essentially checks if buffer end is within limit and @len is * non-ngeative, which implies that buffer start will be within limit too. * - * The reason for rewriting being, for majority of cases, @len is generally + * The reason for rewriting being, for majorit yof cases, @len is generally * compile time constant, causing first sub-expression to be compile time * subsumed. * @@ -53,7 +53,7 @@ * */ #define __user_ok(addr, sz) (((sz) <= TASK_SIZE) && \ - ((addr) <= (get_fs() - (sz)))) + (((addr)+(sz)) <= get_fs())) #define __access_ok(addr, sz) (unlikely(__kernel_ok) || \ likely(__user_ok((addr), (sz)))) diff --git a/arch/arc/include/uapi/asm/ptrace.h b/arch/arc/include/uapi/asm/ptrace.h index ef9d79a3db25..30333cec0fef 100644 --- a/arch/arc/include/uapi/asm/ptrace.h +++ b/arch/arc/include/uapi/asm/ptrace.h @@ -11,7 +11,6 @@ #ifndef _UAPI__ASM_ARC_PTRACE_H #define _UAPI__ASM_ARC_PTRACE_H -#define PTRACE_GET_THREAD_AREA 25 #ifndef __ASSEMBLY__ /* diff --git a/arch/arc/kernel/devtree.c b/arch/arc/kernel/devtree.c index afdd13cf881c..bdee3a812052 100644 --- a/arch/arc/kernel/devtree.c +++ b/arch/arc/kernel/devtree.c @@ -40,7 +40,7 @@ struct machine_desc * __init setup_machine_fdt(void *dt) const char *model, *compat; void *clk; char manufacturer[16]; - int len; + unsigned long len; /* check device tree validity */ if (be32_to_cpu(devtree->magic) != OF_DT_HEADER) diff --git a/arch/arc/kernel/entry.S b/arch/arc/kernel/entry.S index 6f3cd0fb4b54..0c6d664d4a83 100644 --- a/arch/arc/kernel/entry.S +++ b/arch/arc/kernel/entry.S @@ -498,7 +498,7 @@ tracesys_exit: trap_with_param: ; stop_pc info by gdb needs this info - st orig_r8_IS_BRKPT, [sp, PT_orig_r8] + stw orig_r8_IS_BRKPT, [sp, PT_orig_r8] mov r0, r12 lr r1, [efa] @@ -589,7 +589,11 @@ ARC_ENTRY ret_from_exception ; Pre-{IRQ,Trap,Exception} K/U mode from pt_regs->status32 ld r8, [sp, PT_status32] ; returning to User/Kernel Mode +#ifdef CONFIG_PREEMPT bbit0 r8, STATUS_U_BIT, resume_kernel_mode +#else + bbit0 r8, STATUS_U_BIT, restore_regs +#endif ; Before returning to User mode check-for-and-complete any pending work ; such as rescheduling/signal-delivery etc. @@ -649,15 +653,10 @@ resume_user_mode_begin: b resume_user_mode_begin ; unconditionally back to U mode ret chks ; for single exit point from this block -resume_kernel_mode: - - ; Disable Interrupts from this point on - ; CONFIG_PREEMPT: This is a must for preempt_schedule_irq() - ; !CONFIG_PREEMPT: To ensure restore_regs is intr safe - IRQ_DISABLE r9 - #ifdef CONFIG_PREEMPT +resume_kernel_mode: + ; Can't preempt if preemption disabled GET_CURR_THR_INFO_FROM_SP r10 ld r8, [r10, THREAD_INFO_PREEMPT_COUNT] @@ -667,6 +666,8 @@ resume_kernel_mode: ld r9, [r10, THREAD_INFO_FLAGS] bbit0 r9, TIF_NEED_RESCHED, restore_regs + IRQ_DISABLE r9 + ; Invoke PREEMPTION bl preempt_schedule_irq @@ -679,11 +680,12 @@ resume_kernel_mode: ; ; Restore the saved sys context (common exit-path for EXCPN/IRQ/Trap) ; IRQ shd definitely not happen between now and rtie -; All 2 entry points to here already disable interrupts restore_regs : - lr r10, [status32] + ; Disable Interrupts while restoring reg-file back + ; XXX can this be optimised out + IRQ_DISABLE_SAVE r9, r10 ;@r10 has prisitine (pre-disable) copy #ifdef CONFIG_ARC_CURR_IN_REG ; Restore User R25 @@ -721,7 +723,7 @@ not_exception: ; things to what they were, before returning from L2 context ;---------------------------------------------------------------- - ld r9, [sp, PT_orig_r8] ; get orig_r8 to make sure it is + ldw r9, [sp, PT_orig_r8] ; get orig_r8 to make sure it is brne r9, orig_r8_IS_IRQ2, 149f ; infact a L2 ISR ret path ld r9, [sp, PT_status32] ; get statu32_l2 (saved in pt_regs) diff --git a/arch/arc/kernel/head.S b/arch/arc/kernel/head.S index 0f944f024513..006dec3fc353 100644 --- a/arch/arc/kernel/head.S +++ b/arch/arc/kernel/head.S @@ -27,16 +27,11 @@ stext: ; Don't clobber r0-r4 yet. It might have bootloader provided info ;------------------------------------------------------------------- - sr @_int_vec_base_lds, [AUX_INTR_VEC_BASE] - #ifdef CONFIG_SMP ; Only Boot (Master) proceeds. Others wait in platform dependent way ; IDENTITY Reg [ 3 2 1 0 ] ; (cpu-id) ^^^ => Zero for UP ARC700 ; => #Core-ID if SMP (Master 0) - ; Note that non-boot CPUs might not land here if halt-on-reset and - ; instead breath life from @first_lines_of_secondary, but we still - ; need to make sure only boot cpu takes this path. GET_CPU_ID r5 cmp r5, 0 jnz arc_platform_smp_wait_to_boot @@ -101,8 +96,6 @@ stext: first_lines_of_secondary: - sr @_int_vec_base_lds, [AUX_INTR_VEC_BASE] - ; setup per-cpu idle task as "current" on this CPU ld r0, [@secondary_idle_tsk] SET_CURR_TASK_ON_CPU r0, r1 diff --git a/arch/arc/kernel/irq.c b/arch/arc/kernel/irq.c index a199471ce01e..8115fa531575 100644 --- a/arch/arc/kernel/irq.c +++ b/arch/arc/kernel/irq.c @@ -24,6 +24,7 @@ * -Needed for each CPU (hence not foldable into init_IRQ) * * what it does ? + * -setup Vector Table Base Reg - in case Linux not linked at 0x8000_0000 * -Disable all IRQs (on CPU side) * -Optionally, setup the High priority Interrupts as Level 2 IRQs */ @@ -31,6 +32,8 @@ void __cpuinit arc_init_IRQ(void) { int level_mask = 0; + write_aux_reg(AUX_INTR_VEC_BASE, _int_vec_base_lds); + /* Disable all IRQs: enable them as devices request */ write_aux_reg(AUX_IENABLE, 0); diff --git a/arch/arc/kernel/ptrace.c b/arch/arc/kernel/ptrace.c index f8a36ed9e0d5..c6a81c58d0f3 100644 --- a/arch/arc/kernel/ptrace.c +++ b/arch/arc/kernel/ptrace.c @@ -92,7 +92,7 @@ static int genregs_set(struct task_struct *target, REG_IN_CHUNK(scratch, callee, ptregs); /* pt_regs[bta..orig_r8] */ REG_IN_CHUNK(callee, efa, cregs); /* callee_regs[r25..r13] */ REG_IGNORE_ONE(efa); /* efa update invalid */ - REG_IGNORE_ONE(stop_pc); /* PC updated via @ret */ + REG_IN_ONE(stop_pc, &ptregs->ret); /* stop_pc: PC update */ return ret; } @@ -136,10 +136,6 @@ long arch_ptrace(struct task_struct *child, long request, pr_debug("REQ=%ld: ADDR =0x%lx, DATA=0x%lx)\n", request, addr, data); switch (request) { - case PTRACE_GET_THREAD_AREA: - ret = put_user(task_thread_info(child)->thr_ptr, - (unsigned long __user *)data); - break; default: ret = ptrace_request(child, request, addr, data); break; diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c index 2d7786b69a8a..b2b3731dd1e9 100644 --- a/arch/arc/kernel/setup.c +++ b/arch/arc/kernel/setup.c @@ -47,7 +47,10 @@ void __cpuinit read_arc_build_cfg_regs(void) READ_BCR(AUX_IDENTITY, cpu->core); cpu->timers = read_aux_reg(ARC_REG_TIMERS_BCR); + cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE); + if (cpu->vec_base == 0) + cpu->vec_base = (unsigned int)_int_vec_base_lds; READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space); cpu->uncached_base = uncached_space.start << 24; diff --git a/arch/arc/kernel/signal.c b/arch/arc/kernel/signal.c index 6763654239a2..ee6ef2f60a28 100644 --- a/arch/arc/kernel/signal.c +++ b/arch/arc/kernel/signal.c @@ -101,6 +101,7 @@ SYSCALL_DEFINE0(rt_sigreturn) { struct rt_sigframe __user *sf; unsigned int magic; + int err; struct pt_regs *regs = current_pt_regs(); /* Always make any pending restarted system calls return -EINTR */ @@ -118,28 +119,18 @@ SYSCALL_DEFINE0(rt_sigreturn) if (!access_ok(VERIFY_READ, sf, sizeof(*sf))) goto badframe; - if (__get_user(magic, &sf->sigret_magic)) + err = restore_usr_regs(regs, sf); + err |= __get_user(magic, &sf->sigret_magic); + if (err) goto badframe; if (unlikely(is_do_ss_needed(magic))) if (restore_altstack(&sf->uc.uc_stack)) goto badframe; - if (restore_usr_regs(regs, sf)) - goto badframe; - /* Don't restart from sigreturn */ syscall_wont_restart(regs); - /* - * Ensure that sigreturn always returns to user mode (in case the - * regs saved on user stack got fudged between save and sigreturn) - * Otherwise it is easy to panic the kernel with a custom - * signal handler and/or restorer which clobberes the status32/ret - * to return to a bogus location in kernel mode. - */ - regs->status32 |= STATUS_U_MASK; - return regs->r0; badframe: @@ -199,15 +190,6 @@ setup_rt_frame(int signo, struct k_sigaction *ka, siginfo_t *info, if (!sf) return 1; - /* - * w/o SA_SIGINFO, struct ucontext is partially populated (only - * uc_mcontext/uc_sigmask) for kernel's normal user state preservation - * during signal handler execution. This works for SA_SIGINFO as well - * although the semantics are now overloaded (the same reg state can be - * inspected by userland: but are they allowed to fiddle with it ? - */ - err |= stash_usr_regs(sf, regs, set); - /* * SA_SIGINFO requires 3 args to signal handler: * #1: sig-no (common to any handler) @@ -231,6 +213,14 @@ setup_rt_frame(int signo, struct k_sigaction *ka, siginfo_t *info, magic = MAGIC_SIGALTSTK; } + /* + * w/o SA_SIGINFO, struct ucontext is partially populated (only + * uc_mcontext/uc_sigmask) for kernel's normal user state preservation + * during signal handler execution. This works for SA_SIGINFO as well + * although the semantics are now overloaded (the same reg state can be + * inspected by userland: but are they allowed to fiddle with it ? + */ + err |= stash_usr_regs(sf, regs, set); err |= __put_user(magic, &sf->sigret_magic); if (err) return err; @@ -243,11 +233,8 @@ setup_rt_frame(int signo, struct k_sigaction *ka, siginfo_t *info, /* * handler returns using sigreturn stub provided already by userpsace - * If not, nuke the process right away */ - if(!(ka->sa.sa_flags & SA_RESTORER)) - return 1; - + BUG_ON(!(ka->sa.sa_flags & SA_RESTORER)); regs->blink = (unsigned long)ka->sa.sa_restorer; /* User Stack for signal handler will be above the frame just carved */ @@ -314,12 +301,12 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info, struct pt_regs *regs) { sigset_t *oldset = sigmask_to_save(); - int failed; + int ret; /* Set up the stack frame */ - failed = setup_rt_frame(sig, ka, info, oldset, regs); + ret = setup_rt_frame(sig, ka, info, oldset, regs); - if (failed) + if (ret) force_sigsegv(sig, current); else signal_delivered(sig, info, ka, regs, 0); diff --git a/arch/arc/kernel/unaligned.c b/arch/arc/kernel/unaligned.c index 116d3e09b5b5..4cd81633febd 100644 --- a/arch/arc/kernel/unaligned.c +++ b/arch/arc/kernel/unaligned.c @@ -233,12 +233,6 @@ int misaligned_fixup(unsigned long address, struct pt_regs *regs, regs->status32 &= ~STATUS_DE_MASK; } else { regs->ret += state.instr_len; - - /* handle zero-overhead-loop */ - if ((regs->ret == regs->lp_end) && (regs->lp_count)) { - regs->ret = regs->lp_start; - regs->lp_count--; - } } return 0; diff --git a/arch/arc/lib/strchr-700.S b/arch/arc/lib/strchr-700.S index 9c548c7cf001..99c10475d477 100644 --- a/arch/arc/lib/strchr-700.S +++ b/arch/arc/lib/strchr-700.S @@ -39,18 +39,9 @@ ARC_ENTRY strchr ld.a r2,[r0,4] sub r12,r6,r7 bic r12,r12,r6 -#ifdef __LITTLE_ENDIAN__ and r7,r12,r4 breq r7,0,.Loop ; For speed, we want this branch to be unaligned. b .Lfound_char ; Likewise this one. -#else - and r12,r12,r4 - breq r12,0,.Loop ; For speed, we want this branch to be unaligned. - lsr_s r12,r12,7 - bic r2,r7,r6 - b.d .Lfound_char_b - and_s r2,r2,r12 -#endif ; /* We require this code address to be unaligned for speed... */ .Laligned: ld_s r2,[r0] @@ -104,7 +95,6 @@ ARC_ENTRY strchr lsr r7,r7,7 bic r2,r7,r6 -.Lfound_char_b: norm r2,r2 sub_s r0,r0,4 asr_s r2,r2,3 diff --git a/arch/arc/mm/fault.c b/arch/arc/mm/fault.c index 08f65bcf9130..689ffd86d5e9 100644 --- a/arch/arc/mm/fault.c +++ b/arch/arc/mm/fault.c @@ -16,7 +16,7 @@ #include #include -static int handle_vmalloc_fault(unsigned long address) +static int handle_vmalloc_fault(struct mm_struct *mm, unsigned long address) { /* * Synchronize this task's top level page-table @@ -26,7 +26,7 @@ static int handle_vmalloc_fault(unsigned long address) pud_t *pud, *pud_k; pmd_t *pmd, *pmd_k; - pgd = pgd_offset_fast(current->active_mm, address); + pgd = pgd_offset_fast(mm, address); pgd_k = pgd_offset_k(address); if (!pgd_present(*pgd_k)) @@ -59,7 +59,8 @@ void do_page_fault(struct pt_regs *regs, int write, unsigned long address, struct mm_struct *mm = tsk->mm; siginfo_t info; int fault, ret; - unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE; + unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE | + (write ? FAULT_FLAG_WRITE : 0); /* * We fault-in kernel-space virtual memory on-demand. The @@ -71,7 +72,7 @@ void do_page_fault(struct pt_regs *regs, int write, unsigned long address, * nothing more. */ if (address >= VMALLOC_START && address <= VMALLOC_END) { - ret = handle_vmalloc_fault(address); + ret = handle_vmalloc_fault(mm, address); if (unlikely(ret)) goto bad_area_nosemaphore; else @@ -87,8 +88,6 @@ void do_page_fault(struct pt_regs *regs, int write, unsigned long address, if (in_atomic() || !mm) goto no_context; - if (user_mode(regs)) - flags |= FAULT_FLAG_USER; retry: down_read(&mm->mmap_sem); vma = find_vma(mm, address); @@ -116,12 +115,12 @@ good_area: if (write) { if (!(vma->vm_flags & VM_WRITE)) goto bad_area; - flags |= FAULT_FLAG_WRITE; } else { if (!(vma->vm_flags & (VM_READ | VM_EXEC))) goto bad_area; } +survive: /* * If for any reason at all we couldn't handle the fault, * make sure we exit gracefully rather than endlessly redo @@ -160,8 +159,6 @@ good_area: /* TBD: switch to pagefault_out_of_memory() */ if (fault & VM_FAULT_OOM) goto out_of_memory; - else if (fault & VM_FAULT_SIGSEGV) - goto bad_area; else if (fault & VM_FAULT_SIGBUS) goto do_sigbus; @@ -203,12 +200,14 @@ no_context: die("Oops", regs, address, cause_code); out_of_memory: + if (is_global_init(tsk)) { + yield(); + goto survive; + } up_read(&mm->mmap_sem); - if (user_mode(regs)) { - pagefault_out_of_memory(); - return; - } + if (user_mode(regs)) + do_group_exit(SIGKILL); /* This will never return */ goto no_context; diff --git a/arch/arc/mm/init.c b/arch/arc/mm/init.c index 7991e08d606b..4a177365b2c4 100644 --- a/arch/arc/mm/init.c +++ b/arch/arc/mm/init.c @@ -157,8 +157,9 @@ void __init free_initrd_mem(unsigned long start, unsigned long end) #endif #ifdef CONFIG_OF_FLATTREE -void __init early_init_dt_setup_initrd_arch(u64 start, u64 end) +void __init early_init_dt_setup_initrd_arch(unsigned long start, + unsigned long end) { - pr_err("%s(%llx, %llx)\n", __func__, start, end); + pr_err("%s(%lx, %lx)\n", __func__, start, end); } #endif /* CONFIG_OF_FLATTREE */ diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 1a86004f3f27..136f263ed47b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -4,9 +4,7 @@ config ARM select ARCH_BINFMT_ELF_RANDOMIZE_PIE select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE select ARCH_HAVE_CUSTOM_GPIO_H - select ARCH_SUPPORTS_ATOMIC_RMW select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST - select ARCH_HAS_GCOV_PROFILE_ALL select ARCH_WANT_IPC_PARSE_VERSION select BUILDTIME_EXTABLE_SORT if MMU select CPU_PM if (SUSPEND || CPU_IDLE) @@ -21,6 +19,7 @@ config ARM select GENERIC_STRNCPY_FROM_USER select GENERIC_STRNLEN_USER select HARDIRQS_SW_RESEND + select HAVE_AOUT select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL select HAVE_ARCH_KGDB select HAVE_ARCH_SECCOMP_FILTER @@ -214,8 +213,7 @@ config VECTORS_BASE default DRAM_BASE if REMAP_VECTORS_TO_RAM default 0x00000000 help - The base address of exception vectors. This must be two pages - in size. + The base address of exception vectors. config ARM_PATCH_PHYS_VIRT bool "Patch physical to virtual translations at runtime" if EMBEDDED @@ -476,7 +474,6 @@ config ARCH_IXP4XX bool "IXP4xx-based" depends on MMU select ARCH_HAS_DMA_SET_COHERENT_MASK - select ARCH_SUPPORTS_BIG_ENDIAN select ARCH_REQUIRE_GPIOLIB select CLKSRC_MMIO select CPU_XSCALE @@ -1497,109 +1494,6 @@ config SCHED_SMT MultiThreading at a cost of slightly increased overhead in some places. If unsure say N here. -config DISABLE_CPU_SCHED_DOMAIN_BALANCE - bool "(EXPERIMENTAL) Disable CPU level scheduler load-balancing" - help - Disables scheduler load-balancing at CPU sched domain level. - -config SCHED_HMP - bool "(EXPERIMENTAL) Heterogenous multiprocessor scheduling" - depends on DISABLE_CPU_SCHED_DOMAIN_BALANCE && SCHED_MC && FAIR_GROUP_SCHED && !SCHED_AUTOGROUP - help - Experimental scheduler optimizations for heterogeneous platforms. - Attempts to introspectively select task affinity to optimize power - and performance. Basic support for multiple (>2) cpu types is in place, - but it has only been tested with two types of cpus. - There is currently no support for migration of task groups, hence - !SCHED_AUTOGROUP. Furthermore, normal load-balancing must be disabled - between cpus of different type (DISABLE_CPU_SCHED_DOMAIN_BALANCE). - When turned on, this option adds sys/kernel/hmp directory which - contains the following files: - up_threshold - the load average threshold used for up migration - (0 - 1023) - down_threshold - the load average threshold used for down migration - (0 - 1023) - hmp_domains - a list of cpumasks for the present HMP domains, - starting with the 'biggest' and ending with the - 'smallest'. - Note that both the threshold files can be written at runtime to - control scheduler behaviour. - -config SCHED_HMP_PRIO_FILTER - bool "(EXPERIMENTAL) Filter HMP migrations by task priority" - depends on SCHED_HMP - help - Enables task priority based HMP migration filter. Any task with - a NICE value above the threshold will always be on low-power cpus - with less compute capacity. - -config SCHED_HMP_PRIO_FILTER_VAL - int "NICE priority threshold" - default 5 - depends on SCHED_HMP_PRIO_FILTER - -config HMP_FAST_CPU_MASK - string "HMP scheduler fast CPU mask" - depends on SCHED_HMP - help - Leave empty to use device tree information. - Specify the cpuids of the fast CPUs in the system as a list string, - e.g. cpuid 0+1 should be specified as 0-1. - -config HMP_SLOW_CPU_MASK - string "HMP scheduler slow CPU mask" - depends on SCHED_HMP - help - Leave empty to use device tree information. - Specify the cpuids of the slow CPUs in the system as a list string, - e.g. cpuid 0+1 should be specified as 0-1. - -config HMP_VARIABLE_SCALE - bool "Allows changing the load tracking scale through sysfs" - depends on SCHED_HMP - help - When turned on, this option exports the load average period value - for the load tracking patches through sysfs. - The values can be modified to change the rate of load accumulation - used for HMP migration. 'load_avg_period_ms' is the time in ms to - reach a load average of 0.5 for an idle task of 0 load average - ratio which becomes 100% busy. - For example, with load_avg_period_ms = 128 and up_threshold = 512, - a running task with a load of 0 will be migrated to a bigger CPU after - 128ms, because after 128ms its load_avg_ratio is 0.5 and the real - up_threshold is 0.5. - This patch has the same behavior as changing the Y of the load - average computation to - (1002/1024)^(LOAD_AVG_PERIOD/load_avg_period_ms) - but removes intermediate overflows in computation. - -config HMP_FREQUENCY_INVARIANT_SCALE - bool "(EXPERIMENTAL) Frequency-Invariant Tracked Load for HMP" - depends on SCHED_HMP && CPU_FREQ - help - Scales the current load contribution in line with the frequency - of the CPU that the task was executed on. - In this version, we use a simple linear scale derived from the - maximum frequency reported by CPUFreq. - Restricting tracked load to be scaled by the CPU's frequency - represents the consumption of possible compute capacity - (rather than consumption of actual instantaneous capacity as - normal) and allows the HMP migration's simple threshold - migration strategy to interact more predictably with CPUFreq's - asynchronous compute capacity changes. - -config SCHED_HMP_LITTLE_PACKING - bool "Small task packing for HMP" - depends on SCHED_HMP - default n - help - Allows the HMP Scheduler to pack small tasks into CPUs in the - smallest HMP domain. - Controlled by two sysfs files in sys/kernel/hmp. - packing_enable: 1 to enable, 0 to disable packing. Default 1. - packing_limit: runqueue load ratio where a RQ is considered - to be full. Default is NICE_0_LOAD * 9/8. - config HAVE_ARM_SCU bool help @@ -1627,31 +1521,6 @@ config MCPM for (multi-)cluster based systems, such as big.LITTLE based systems. -config BIG_LITTLE - bool "big.LITTLE support (Experimental)" - depends on CPU_V7 && SMP - select MCPM - help - This option enables support for the big.LITTLE architecture. - -config BL_SWITCHER - bool "big.LITTLE switcher support" - depends on BIG_LITTLE && MCPM && HOTPLUG_CPU - select CPU_PM - select ARM_CPU_SUSPEND - help - The big.LITTLE "switcher" provides the core functionality to - transparently handle transition between a cluster of A15's - and a cluster of A7's in a big.LITTLE system. - -config BL_SWITCHER_DUMMY_IF - tristate "Simple big.LITTLE switcher user interface" - depends on BL_SWITCHER && DEBUG_KERNEL - help - This is a simple and dummy char dev interface to control - the big.LITTLE switcher core code. It is meant for - debugging purposes only. - choice prompt "Memory split" default VMSPLIT_3G @@ -1862,14 +1731,6 @@ config HW_PERF_EVENTS Enable hardware performance counter support for perf events. If disabled, perf events will use software events only. -config SYS_SUPPORTS_HUGETLBFS - def_bool y - depends on ARM_LPAE - -config HAVE_ARCH_TRANSPARENT_HUGEPAGE - def_bool y - depends on ARM_LPAE - source "mm/Kconfig" config FORCE_MAX_ZONEORDER @@ -1958,15 +1819,6 @@ config XEN help Say Y if you want to run Linux in a Virtual Machine on Xen on ARM. -config ARM_FLUSH_CONSOLE_ON_RESTART - bool "Force flush the console on restart" - help - If the console is locked while the system is rebooted, the messages - in the temporary logbuffer would not have propogated to all the - console drivers. This option forces the console lock to be - released if it failed to be acquired, which will cause all the - pending messages to be flushed. - endmenu menu "Boot options" @@ -1996,21 +1848,6 @@ config DEPRECATED_PARAM_STRUCT This was deprecated in 2001 and announced to live on for 5 years. Some old boot loaders still use this way. -config BUILD_ARM_APPENDED_DTB_IMAGE - bool "Build a concatenated zImage/dtb by default" - depends on OF - help - Enabling this option will cause a concatenated zImage and DTB to - be built by default (instead of a standalone zImage.) The image - will built in arch/arm/boot/zImage-dtb. - -config BUILD_ARM_APPENDED_DTB_IMAGE_NAME - string "Default dtb name" - depends on BUILD_ARM_APPENDED_DTB_IMAGE - help - name of the dtb to append when building a concatenated - zImage/dtb. - # Compressed boot loader in ROM. Yes, we really want to ask about # TEXT and BSS so we preserve their values in the config files. config ZBOOT_ROM_TEXT @@ -2360,13 +2197,6 @@ config NEON Say Y to include support code for NEON, the ARMv7 Advanced SIMD Extension. -config KERNEL_MODE_NEON - bool "Support for NEON in kernel mode" - default n - depends on NEON - help - Say Y to include support for NEON in kernel mode. - endmenu menu "Userspace binary formats" diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 4d1793474c9c..1d41908d5cda 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -63,27 +63,6 @@ config DEBUG_USER 8 - SIGSEGV faults 16 - SIGBUS faults -config DEBUG_RODATA - bool "Write protect kernel text section" - default n - depends on DEBUG_KERNEL && MMU - ---help--- - Mark the kernel text section as write-protected in the pagetables, - in order to catch accidental (and incorrect) writes to such const - data. This will cause the size of the kernel, plus up to 4MB, to - be mapped as pages instead of sections, which will increase TLB - pressure. - If in doubt, say "N". - -config DEBUG_RODATA_TEST - bool "Testcase for the DEBUG_RODATA feature" - depends on DEBUG_RODATA - default n - ---help--- - This option enables a testcase for the DEBUG_RODATA - feature. - If in doubt, say "N" - # These options are only for real kernel hackers who want to get their hands dirty. config DEBUG_LL bool "Kernel low-level debugging functions (read help!)" @@ -690,6 +669,14 @@ config EARLY_PRINTK kernel low-level debugging functions. Add earlyprintk to your kernel parameters to enable this console. +config OC_ETM + bool "On-chip ETM and ETB" + depends on ARM_AMBA + help + Enables the on-chip embedded trace macrocell and embedded trace + buffer driver that will allow you to collect traces of the + kernel code. + config ARM_KPROBES_TEST tristate "Kprobes test module" depends on KPROBES && MODULES @@ -705,70 +692,4 @@ config PID_IN_CONTEXTIDR additional instructions during context switch. Say Y here only if you are planning to use hardware trace tools with this kernel. -config DEBUG_SET_MODULE_RONX - bool "Set loadable kernel module data as NX and text as RO" - depends on MODULES - ---help--- - This option helps catch unintended modifications to loadable - kernel module's text and read-only data. It also prevents execution - of module data. Such protection may interfere with run-time code - patching and dynamic kernel tracing - and they might also protect - against certain classes of kernel exploits. - If in doubt, say "N". - -menuconfig CORESIGHT - bool "CoreSight Tracing Support" - select ARM_AMBA - help - This framework provides a kernel interface for the CoreSight debug - and trace drivers to register themselves with. It's intended to build - a topological view of the CoreSight components based on a DT - specification and configure the right serie of components when a - trace source gets enabled. - -if CORESIGHT -config CORESIGHT_LINKS_AND_SINKS - bool "CoreSight Link and Sink drivers" - help - This enables support for CoreSight link and sink drivers that are - responsible for transporting and collecting the trace data - respectively. Link and sinks are dynamically aggregated with a trace - entity at run time to form a complete trace path. - -config CORESIGHT_LINK_AND_SINK_TMC - bool "Coresight generic TMC driver" - depends on CORESIGHT_LINKS_AND_SINKS - help - This enables support for the Trace Memory Controller driver. Depending - on its configuration the device can act as a link (embedded trace router - - ETR) or sink (embedded trace FIFO). The driver complies with the - generic implementation of the component without special enhancement or - added features. - -config CORESIGHT_SINK_TPIU - bool "Coresight generic TPIU driver" - depends on CORESIGHT_LINKS_AND_SINKS - help - This enables support for the Trace Port Interface Unit driver, responsible - for bridging the gap between the on-chip coresight components and a trace - port collection engine, typically connected to an external host for use - case capturing more traces than the on-board coresight memory can handle. - -config CORESIGHT_SINK_ETBV10 - bool "Coresight ETBv1.0 driver" - depends on CORESIGHT_LINKS_AND_SINKS - help - This enables support for the Embedded Trace Buffer version 1.0 driver - that complies with the generic implementation of the component without - special enhancement or added features. - -config CORESIGHT_SOURCE_ETM3X - bool "CoreSight Embedded Trace Macrocell 3.x driver" - select CORESIGHT_LINKS_AND_SINKS - help - This driver provides support for processor ETM3.x and PTM1.x modules, - which allows tracing the instructions that a processor is executing - This is primarily useful for instruction level tracing. Depending - the ETM version data tracing may also be available. -endif endmenu diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 10fcf105bfce..1ba358ba16b8 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -16,7 +16,6 @@ LDFLAGS := LDFLAGS_vmlinux :=-p --no-undefined -X ifeq ($(CONFIG_CPU_ENDIAN_BE8),y) LDFLAGS_vmlinux += --be8 -LDFLAGS_MODULE += --be8 endif OBJCOPYFLAGS :=-O binary -R .comment -S @@ -56,14 +55,6 @@ endif comma = , -# -# The Scalar Replacement of Aggregates (SRA) optimization pass in GCC 4.9 and -# later may result in code being generated that handles signed short and signed -# char struct members incorrectly. So disable it. -# (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65932) -# -KBUILD_CFLAGS += $(call cc-option,-fno-ipa-sra) - # This selects which instruction set is used. # Note that GCC does not numerically define an architecture version # macro, but instead defines a whole series of macros which makes @@ -273,8 +264,6 @@ libs-y := arch/arm/lib/ $(libs-y) # Default target when executing plain make ifeq ($(CONFIG_XIP_KERNEL),y) KBUILD_IMAGE := xipImage -else ifeq ($(CONFIG_BUILD_ARM_APPENDED_DTB_IMAGE),y) -KBUILD_IMAGE := zImage-dtb.$(CONFIG_BUILD_ARM_APPENDED_DTB_IMAGE_NAME) else KBUILD_IMAGE := zImage endif diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile index 085bb96493a3..84aa2caf07ed 100644 --- a/arch/arm/boot/Makefile +++ b/arch/arm/boot/Makefile @@ -14,7 +14,6 @@ ifneq ($(MACHINE),) include $(srctree)/$(MACHINE)/Makefile.boot endif -include $(srctree)/arch/arm/boot/dts/Makefile # Note: the following conditions must always be true: # ZRELADDR == virt_to_phys(PAGE_OFFSET + TEXT_OFFSET) diff --git a/arch/arm/boot/bootp/Makefile b/arch/arm/boot/bootp/Makefile index 5761f0039133..c394e305447c 100644 --- a/arch/arm/boot/bootp/Makefile +++ b/arch/arm/boot/bootp/Makefile @@ -5,8 +5,6 @@ # architecture-specific flags and dependencies. # -GCOV_PROFILE := n - LDFLAGS_bootp :=-p --no-undefined -X \ --defsym initrd_phys=$(INITRD_PHYS) \ --defsym params_phys=$(PARAMS_PHYS) -T diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index e1fc76ee441b..120b83bfde20 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile @@ -37,8 +37,6 @@ ifeq ($(CONFIG_ARM_VIRT_EXT),y) OBJS += hyp-stub.o endif -GCOV_PROFILE := n - # # Architecture dependencies # diff --git a/arch/arm/boot/compressed/atags_to_fdt.c b/arch/arm/boot/compressed/atags_to_fdt.c index d1153c8a765a..aabc02a68482 100644 --- a/arch/arm/boot/compressed/atags_to_fdt.c +++ b/arch/arm/boot/compressed/atags_to_fdt.c @@ -53,17 +53,6 @@ static const void *getprop(const void *fdt, const char *node_path, return fdt_getprop(fdt, offset, property, len); } -static uint32_t get_cell_size(const void *fdt) -{ - int len; - uint32_t cell_size = 1; - const uint32_t *size_len = getprop(fdt, "/", "#size-cells", &len); - - if (size_len) - cell_size = fdt32_to_cpu(*size_len); - return cell_size; -} - static void merge_fdt_bootargs(void *fdt, const char *fdt_cmdline) { char cmdline[COMMAND_LINE_SIZE]; @@ -106,11 +95,9 @@ static void merge_fdt_bootargs(void *fdt, const char *fdt_cmdline) int atags_to_fdt(void *atag_list, void *fdt, int total_space) { struct tag *atag = atag_list; - /* In the case of 64 bits memory size, need to reserve 2 cells for - * address and size for each bank */ - uint32_t mem_reg_property[2 * 2 * NR_BANKS]; + uint32_t mem_reg_property[2 * NR_BANKS]; int memcount = 0; - int ret, memsize; + int ret; /* make sure we've got an aligned pointer */ if ((u32)atag_list & 0x3) @@ -150,25 +137,8 @@ int atags_to_fdt(void *atag_list, void *fdt, int total_space) continue; if (!atag->u.mem.size) continue; - memsize = get_cell_size(fdt); - - if (memsize == 2) { - /* if memsize is 2, that means that - * each data needs 2 cells of 32 bits, - * so the data are 64 bits */ - uint64_t *mem_reg_prop64 = - (uint64_t *)mem_reg_property; - mem_reg_prop64[memcount++] = - cpu_to_fdt64(atag->u.mem.start); - mem_reg_prop64[memcount++] = - cpu_to_fdt64(atag->u.mem.size); - } else { - mem_reg_property[memcount++] = - cpu_to_fdt32(atag->u.mem.start); - mem_reg_property[memcount++] = - cpu_to_fdt32(atag->u.mem.size); - } - + mem_reg_property[memcount++] = cpu_to_fdt32(atag->u.mem.start); + mem_reg_property[memcount++] = cpu_to_fdt32(atag->u.mem.size); } else if (atag->hdr.tag == ATAG_INITRD2) { uint32_t initrd_start, initrd_size; initrd_start = atag->u.initrd.start; @@ -180,10 +150,8 @@ int atags_to_fdt(void *atag_list, void *fdt, int total_space) } } - if (memcount) { - setprop(fdt, "/memory", "reg", mem_reg_property, - 4 * memcount * memsize); - } + if (memcount) + setprop(fdt, "/memory", "reg", mem_reg_property, 4*memcount); return fdt_pack(fdt); } diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index a8264aa9b03a..032a8d987148 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -135,7 +135,6 @@ start: .word _edata @ zImage end address THUMB( .thumb ) 1: - ARM_BE8( setend be ) @ go BE8 if compiled for BE8 mrs r9, cpsr #ifdef CONFIG_ARM_VIRT_EXT bl __hyp_stub_install @ get into SVC mode, reversibly @@ -680,7 +679,9 @@ __armv4_mmu_cache_on: mrc p15, 0, r0, c1, c0, 0 @ read control reg orr r0, r0, #0x5000 @ I-cache enable, RR cache replacement orr r0, r0, #0x0030 - ARM_BE8( orr r0, r0, #1 << 25 ) @ big-endian page tables +#ifdef CONFIG_CPU_ENDIAN_BE8 + orr r0, r0, #1 << 25 @ big-endian page tables +#endif bl __common_mmu_cache_on mov r0, #0 mcr p15, 0, r0, c8, c7, 0 @ flush I,D TLBs @@ -707,15 +708,15 @@ __armv7_mmu_cache_on: orr r0, r0, #1 << 22 @ U (v6 unaligned access model) @ (needed for ARM1176) #ifdef CONFIG_MMU - ARM_BE8( orr r0, r0, #1 << 25 ) @ big-endian page tables +#ifdef CONFIG_CPU_ENDIAN_BE8 + orr r0, r0, #1 << 25 @ big-endian page tables +#endif mrcne p15, 0, r6, c2, c0, 2 @ read ttb control reg orrne r0, r0, #1 @ MMU enabled movne r1, #0xfffffffd @ domain 0 = client bic r6, r6, #1 << 31 @ 32-bit translation system bic r6, r6, #3 << 0 @ use only ttbr0 mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer - mcrne p15, 0, r0, c8, c7, 0 @ flush I,D TLBs - mcr p15, 0, r0, c7, c5, 4 @ ISB mcrne p15, 0, r1, c3, c0, 0 @ load domain access control mcrne p15, 0, r6, c2, c0, 2 @ load ttb control #endif diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 00baf9f5766a..f0895c581a89 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -202,14 +202,7 @@ dtb-$(CONFIG_ARCH_VERSATILE) += versatile-ab.dtb \ dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \ vexpress-v2p-ca9.dtb \ vexpress-v2p-ca15-tc1.dtb \ - vexpress-v2p-ca15_a7.dtb \ - rtsm_ve-cortex_a9x2.dtb \ - rtsm_ve-cortex_a9x4.dtb \ - rtsm_ve-cortex_a15x1.dtb \ - rtsm_ve-cortex_a15x2.dtb \ - rtsm_ve-cortex_a15x4.dtb \ - rtsm_ve-v2p-ca15x1-ca7x1.dtb \ - rtsm_ve-v2p-ca15x4-ca7x4.dtb + vexpress-v2p-ca15_a7.dtb dtb-$(CONFIG_ARCH_VIRT) += xenvm-4.2.dtb dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \ wm8505-ref.dtb \ diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi index ddd068bb1457..550eb772c30e 100644 --- a/arch/arm/boot/dts/armada-370-xp.dtsi +++ b/arch/arm/boot/dts/armada-370-xp.dtsi @@ -51,7 +51,7 @@ coherency-fabric@20200 { compatible = "marvell,coherency-fabric"; - reg = <0x20200 0xb0>, <0x21010 0x1c>; + reg = <0x20200 0xb0>, <0x21810 0x1c>; }; serial@12000 { @@ -92,7 +92,6 @@ #size-cells = <0>; compatible = "marvell,orion-mdio"; reg = <0x72004 0x4>; - clocks = <&gateclk 4>; }; ethernet@70000 { diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts index f97550420fcc..76db557adbe7 100644 --- a/arch/arm/boot/dts/armada-xp-gp.dts +++ b/arch/arm/boot/dts/armada-xp-gp.dts @@ -124,7 +124,7 @@ /* Device Bus parameters are required */ /* Read parameters */ - devbus,bus-width = <16>; + devbus,bus-width = <8>; devbus,turn-off-ps = <60000>; devbus,badr-skew-ps = <0>; devbus,acc-first-ps = <124000>; diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi index f94cdbc579cb..f8eaa383e07f 100644 --- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi @@ -81,7 +81,7 @@ /* * MV78230 has 2 PCIe units Gen2.0: One unit can be * configured as x4 or quad x1 lanes. One unit is - * x1 only. + * x4/x1. */ pcie-controller { compatible = "marvell,armada-xp-pcie"; @@ -94,10 +94,10 @@ bus-range = <0x00 0xff>; ranges = <0x82000000 0 0x40000 0x40000 0 0x00002000 /* Port 0.0 registers */ + 0x82000000 0 0x42000 0x42000 0 0x00002000 /* Port 2.0 registers */ 0x82000000 0 0x44000 0x44000 0 0x00002000 /* Port 0.1 registers */ 0x82000000 0 0x48000 0x48000 0 0x00002000 /* Port 0.2 registers */ 0x82000000 0 0x4c000 0x4c000 0 0x00002000 /* Port 0.3 registers */ - 0x82000000 0 0x80000 0x80000 0 0x00002000 /* Port 1.0 registers */ 0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */ 0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */ @@ -165,19 +165,19 @@ status = "disabled"; }; - pcie@5,0 { + pcie@9,0 { device_type = "pci"; - assigned-addresses = <0x82000800 0 0x80000 0 0x2000>; - reg = <0x2800 0 0 0 0>; + assigned-addresses = <0x82000800 0 0x42000 0 0x2000>; + reg = <0x4800 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; #interrupt-cells = <1>; ranges; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 62>; - marvell,pcie-port = <1>; + interrupt-map = <0 0 0 0 &mpic 99>; + marvell,pcie-port = <2>; marvell,pcie-lane = <0>; - clocks = <&gateclk 9>; + clocks = <&gateclk 26>; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi index 55cdd58c155f..f4029f015aff 100644 --- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi @@ -101,7 +101,7 @@ /* * MV78260 has 3 PCIe units Gen2.0: Two units can be * configured as x4 or quad x1 lanes. One unit is - * x4 only. + * x4/x1. */ pcie-controller { compatible = "marvell,armada-xp-pcie"; @@ -119,9 +119,7 @@ 0x82000000 0 0x48000 0x48000 0 0x00002000 /* Port 0.2 registers */ 0x82000000 0 0x4c000 0x4c000 0 0x00002000 /* Port 0.3 registers */ 0x82000000 0 0x80000 0x80000 0 0x00002000 /* Port 1.0 registers */ - 0x82000000 0 0x84000 0x84000 0 0x00002000 /* Port 1.1 registers */ - 0x82000000 0 0x88000 0x88000 0 0x00002000 /* Port 1.2 registers */ - 0x82000000 0 0x8c000 0x8c000 0 0x00002000 /* Port 1.3 registers */ + 0x82000000 0 0x82000 0x82000 0 0x00002000 /* Port 3.0 registers */ 0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */ 0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */ @@ -189,83 +187,35 @@ status = "disabled"; }; - pcie@5,0 { + pcie@9,0 { device_type = "pci"; - assigned-addresses = <0x82000800 0 0x80000 0 0x2000>; - reg = <0x2800 0 0 0 0>; + assigned-addresses = <0x82000800 0 0x42000 0 0x2000>; + reg = <0x4800 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; #interrupt-cells = <1>; ranges; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 62>; - marvell,pcie-port = <1>; + interrupt-map = <0 0 0 0 &mpic 99>; + marvell,pcie-port = <2>; marvell,pcie-lane = <0>; - clocks = <&gateclk 9>; - status = "disabled"; - }; - - pcie@6,0 { - device_type = "pci"; - assigned-addresses = <0x82000800 0 0x84000 0 0x2000>; - reg = <0x3000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - ranges; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 63>; - marvell,pcie-port = <1>; - marvell,pcie-lane = <1>; - clocks = <&gateclk 10>; - status = "disabled"; - }; - - pcie@7,0 { - device_type = "pci"; - assigned-addresses = <0x82000800 0 0x88000 0 0x2000>; - reg = <0x3800 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - ranges; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 64>; - marvell,pcie-port = <1>; - marvell,pcie-lane = <2>; - clocks = <&gateclk 11>; - status = "disabled"; - }; - - pcie@8,0 { - device_type = "pci"; - assigned-addresses = <0x82000800 0 0x8c000 0 0x2000>; - reg = <0x4000 0 0 0 0>; - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - ranges; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 65>; - marvell,pcie-port = <1>; - marvell,pcie-lane = <3>; - clocks = <&gateclk 12>; + clocks = <&gateclk 26>; status = "disabled"; }; - pcie@9,0 { + pcie@10,0 { device_type = "pci"; - assigned-addresses = <0x82000800 0 0x42000 0 0x2000>; - reg = <0x4800 0 0 0 0>; + assigned-addresses = <0x82000800 0 0x82000 0 0x2000>; + reg = <0x5000 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; #interrupt-cells = <1>; ranges; interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 99>; - marvell,pcie-port = <2>; + interrupt-map = <0 0 0 0 &mpic 103>; + marvell,pcie-port = <3>; marvell,pcie-lane = <0>; - clocks = <&gateclk 26>; + clocks = <&gateclk 27>; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts index 5dfb3d354470..fdea75c73411 100644 --- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts +++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts @@ -32,10 +32,6 @@ 0xf0000000 0 0xf0000000 0x8000000 /* Device Bus, NOR 128MiB */>; internal-regs { - rtc@10300 { - /* No crystal connected to the internal RTC */ - status = "disabled"; - }; serial@12000 { clock-frequency = <250000000>; status = "okay"; @@ -156,7 +152,7 @@ /* Device Bus parameters are required */ /* Read parameters */ - devbus,bus-width = <16>; + devbus,bus-width = <8>; devbus,turn-off-ps = <60000>; devbus,badr-skew-ps = <0>; devbus,acc-first-ps = <124000>; diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi index 0af879a4eafa..5d3ed5aafc69 100644 --- a/arch/arm/boot/dts/at91rm9200.dtsi +++ b/arch/arm/boot/dts/at91rm9200.dtsi @@ -35,12 +35,8 @@ ssc2 = &ssc2; }; cpus { - #address-cells = <0>; - #size-cells = <0>; - - cpu { + cpu@0 { compatible = "arm,arm920t"; - device_type = "cpu"; }; }; diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi index 0dbdb846f90a..84c4bef2d726 100644 --- a/arch/arm/boot/dts/at91sam9260.dtsi +++ b/arch/arm/boot/dts/at91sam9260.dtsi @@ -32,12 +32,8 @@ ssc0 = &ssc0; }; cpus { - #address-cells = <0>; - #size-cells = <0>; - - cpu { - compatible = "arm,arm926ej-s"; - device_type = "cpu"; + cpu@0 { + compatible = "arm,arm926ejs"; }; }; @@ -344,14 +340,6 @@ }; }; - i2c_gpio0 { - pinctrl_i2c_gpio0: i2c_gpio0-0 { - atmel,pins = - <0 23 0x0 0x3 /* PA23 gpio I2C_SDA pin */ - 0 24 0x0 0x3>; /* PA24 gpio I2C_SCL pin */ - }; - }; - pioA: gpio@fffff400 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x200>; @@ -604,8 +592,6 @@ i2c-gpio,delay-us = <2>; /* ~100 kHz */ #address-cells = <1>; #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c_gpio0>; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi index fcd38f89904e..94b58ab2cc08 100644 --- a/arch/arm/boot/dts/at91sam9263.dtsi +++ b/arch/arm/boot/dts/at91sam9263.dtsi @@ -29,12 +29,8 @@ ssc1 = &ssc1; }; cpus { - #address-cells = <0>; - #size-cells = <0>; - - cpu { - compatible = "arm,arm926ej-s"; - device_type = "cpu"; + cpu@0 { + compatible = "arm,arm926ejs"; }; }; diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi index 479a0622cdb8..bf18a735c37d 100644 --- a/arch/arm/boot/dts/at91sam9g45.dtsi +++ b/arch/arm/boot/dts/at91sam9g45.dtsi @@ -35,12 +35,8 @@ ssc1 = &ssc1; }; cpus { - #address-cells = <0>; - #size-cells = <0>; - - cpu { - compatible = "arm,arm926ej-s"; - device_type = "cpu"; + cpu@0 { + compatible = "arm,arm926ejs"; }; }; diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi index a92ec78349a2..8d25f889928e 100644 --- a/arch/arm/boot/dts/at91sam9n12.dtsi +++ b/arch/arm/boot/dts/at91sam9n12.dtsi @@ -31,12 +31,8 @@ ssc0 = &ssc0; }; cpus { - #address-cells = <0>; - #size-cells = <0>; - - cpu { - compatible = "arm,arm926ej-s"; - device_type = "cpu"; + cpu@0 { + compatible = "arm,arm926ejs"; }; }; diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts b/arch/arm/boot/dts/at91sam9n12ek.dts index 28ba79893877..d30e48bd1e9d 100644 --- a/arch/arm/boot/dts/at91sam9n12ek.dts +++ b/arch/arm/boot/dts/at91sam9n12ek.dts @@ -14,11 +14,11 @@ compatible = "atmel,at91sam9n12ek", "atmel,at91sam9n12", "atmel,at91sam9"; chosen { - bootargs = "console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=jffs2"; + bootargs = "mem=128M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=jffs2"; }; memory { - reg = <0x20000000 0x8000000>; + reg = <0x20000000 0x10000000>; }; clocks { diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index 2b2b6923d16b..1145ac330fb7 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi @@ -33,12 +33,8 @@ ssc0 = &ssc0; }; cpus { - #address-cells = <0>; - #size-cells = <0>; - - cpu { - compatible = "arm,arm926ej-s"; - device_type = "cpu"; + cpu@0 { + compatible = "arm,arm926ejs"; }; }; @@ -647,7 +643,7 @@ }; rtc@fffffeb0 { - compatible = "atmel,at91sam9x5-rtc"; + compatible = "atmel,at91rm9200-rtc"; reg = <0xfffffeb0 0x40>; interrupts = <1 4 7>; status = "disabled"; diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi index aa537ed13f0a..1e12aeff403b 100644 --- a/arch/arm/boot/dts/bcm2835.dtsi +++ b/arch/arm/boot/dts/bcm2835.dtsi @@ -85,8 +85,6 @@ reg = <0x7e205000 0x1000>; interrupts = <2 21>; clocks = <&clk_i2c>; - #address-cells = <1>; - #size-cells = <0>; status = "disabled"; }; @@ -95,8 +93,6 @@ reg = <0x7e804000 0x1000>; interrupts = <2 21>; clocks = <&clk_i2c>; - #address-cells = <1>; - #size-cells = <0>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/clcd-panels.dtsi b/arch/arm/boot/dts/clcd-panels.dtsi deleted file mode 100644 index 0b0ff6ead4b2..000000000000 --- a/arch/arm/boot/dts/clcd-panels.dtsi +++ /dev/null @@ -1,52 +0,0 @@ -/* - * ARM Ltd. Versatile Express - * - */ - -/ { - panels { - panel@0 { - compatible = "panel"; - mode = "VGA"; - refresh = <60>; - xres = <640>; - yres = <480>; - pixclock = <39721>; - left_margin = <40>; - right_margin = <24>; - upper_margin = <32>; - lower_margin = <11>; - hsync_len = <96>; - vsync_len = <2>; - sync = <0>; - vmode = "FB_VMODE_NONINTERLACED"; - - tim2 = "TIM2_BCD", "TIM2_IPC"; - cntl = "CNTL_LCDTFT", "CNTL_BGR", "CNTL_LCDVCOMP(1)"; - caps = "CLCD_CAP_5551", "CLCD_CAP_565", "CLCD_CAP_888"; - bpp = <16>; - }; - - panel@1 { - compatible = "panel"; - mode = "XVGA"; - refresh = <60>; - xres = <1024>; - yres = <768>; - pixclock = <15748>; - left_margin = <152>; - right_margin = <48>; - upper_margin = <23>; - lower_margin = <3>; - hsync_len = <104>; - vsync_len = <4>; - sync = <0>; - vmode = "FB_VMODE_NONINTERLACED"; - - tim2 = "TIM2_BCD", "TIM2_IPC"; - cntl = "CNTL_LCDTFT", "CNTL_BGR", "CNTL_LCDVCOMP(1)"; - caps = "CLCD_CAP_5551", "CLCD_CAP_565", "CLCD_CAP_888"; - bpp = <16>; - }; - }; -}; diff --git a/arch/arm/boot/dts/cros5250-common.dtsi b/arch/arm/boot/dts/cros5250-common.dtsi index 49d8da2779a6..3f0239ec1bc5 100644 --- a/arch/arm/boot/dts/cros5250-common.dtsi +++ b/arch/arm/boot/dts/cros5250-common.dtsi @@ -27,13 +27,6 @@ i2c2_bus: i2c2-bus { samsung,pin-pud = <0>; }; - - max77686_irq: max77686-irq { - samsung,pins = "gpx3-2"; - samsung,pin-function = <0>; - samsung,pin-pud = <0>; - samsung,pin-drv = <0>; - }; }; i2c@12C60000 { @@ -42,11 +35,6 @@ max77686@09 { compatible = "maxim,max77686"; - interrupt-parent = <&gpx3>; - interrupts = <2 0>; - pinctrl-names = "default"; - pinctrl-0 = <&max77686_irq>; - wakeup-source; reg = <0x09>; voltage-regulators { diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi index d1e47092d21a..6cab46849cdb 100644 --- a/arch/arm/boot/dts/dove.dtsi +++ b/arch/arm/boot/dts/dove.dtsi @@ -75,7 +75,7 @@ uart2: serial@12200 { compatible = "ns16550a"; - reg = <0x12200 0x100>; + reg = <0x12000 0x100>; reg-shift = <2>; interrupts = <9>; clocks = <&core_clk 0>; @@ -84,7 +84,7 @@ uart3: serial@12300 { compatible = "ns16550a"; - reg = <0x12300 0x100>; + reg = <0x12100 0x100>; reg-shift = <2>; interrupts = <10>; clocks = <&core_clk 0>; diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index b64cb43a7295..02cfc76d002f 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -263,7 +263,6 @@ regulator-name = "vdd_g3d"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; - regulator-always-on; regulator-boot-on; op_mode = <1>; }; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 19b910989189..fc9fb3d526e2 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -89,11 +89,6 @@ <1 14 0xf08>, <1 11 0xf08>, <1 10 0xf08>; - /* Unfortunately we need this since some versions of U-Boot - * on Exynos don't set the CNTFRQ register, so we need the - * value from DT. - */ - clock-frequency = <24000000>; }; combiner:interrupt-controller@10440000 { @@ -550,7 +545,7 @@ compatible = "arm,pl330", "arm,primecell"; reg = <0x10800000 0x1000>; interrupts = <0 33 0>; - clocks = <&clock 346>; + clocks = <&clock 271>; clock-names = "apb_pclk"; #dma-cells = <1>; #dma-channels = <8>; diff --git a/arch/arm/boot/dts/hip04.dtsi b/arch/arm/boot/dts/hip04.dtsi deleted file mode 100644 index 238814596a87..000000000000 --- a/arch/arm/boot/dts/hip04.dtsi +++ /dev/null @@ -1,984 +0,0 @@ -/* - * Hisilicon Ltd. HiP04 SoC - * - * Copyright (C) 2013-2014 Hisilicon Ltd. - * Copyright (C) 2013-2014 Linaro Ltd. - * - * Author: Haojian Zhuang - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/ { - /* memory bus is 64-bit */ - #address-cells = <2>; - #size-cells = <2>; - - aliases { - serial0 = &uart0; - }; - - bootwrapper { - compatible = "hisilicon,hip04-bootwrapper"; - boot-method = <0x10c00000 0x10000>, <0xe0000100 0x1000>; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu-map { - cluster0 { - core0 { - cpu = <&CPU0>; - }; - core1 { - cpu = <&CPU1>; - }; - core2 { - cpu = <&CPU2>; - }; - core3 { - cpu = <&CPU3>; - }; - }; - cluster1 { - core0 { - cpu = <&CPU4>; - }; - core1 { - cpu = <&CPU5>; - }; - core2 { - cpu = <&CPU6>; - }; - core3 { - cpu = <&CPU7>; - }; - }; - cluster2 { - core0 { - cpu = <&CPU8>; - }; - core1 { - cpu = <&CPU9>; - }; - core2 { - cpu = <&CPU10>; - }; - core3 { - cpu = <&CPU11>; - }; - }; - cluster3 { - core0 { - cpu = <&CPU12>; - }; - core1 { - cpu = <&CPU13>; - }; - core2 { - cpu = <&CPU14>; - }; - core3 { - cpu = <&CPU15>; - }; - }; - }; - CPU0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0>; - }; - CPU1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <1>; - }; - CPU2: cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <2>; - }; - CPU3: cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <3>; - }; - CPU4: cpu@100 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0x100>; - }; - CPU5: cpu@101 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0x101>; - }; - CPU6: cpu@102 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0x102>; - }; - CPU7: cpu@103 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0x103>; - }; - CPU8: cpu@200 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0x200>; - }; - CPU9: cpu@201 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0x201>; - }; - CPU10: cpu@202 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0x202>; - }; - CPU11: cpu@203 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0x203>; - }; - CPU12: cpu@300 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0x300>; - }; - CPU13: cpu@301 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0x301>; - }; - CPU14: cpu@302 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0x302>; - }; - CPU15: cpu@303 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0x303>; - }; - }; - - timer { - compatible = "arm,armv7-timer"; - interrupt-parent = <&gic>; - interrupts = <1 13 0xf08>, - <1 14 0xf08>, - <1 11 0xf08>, - <1 10 0xf08>; - }; - - clk_50m: clk_50m { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <50000000>; - }; - - clk_168m: clk_168m { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <168000000>; - }; - - clk_375m: clk_375m { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <375000000>; - }; - - soc { - /* It's a 32-bit SoC. */ - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - interrupt-parent = <&gic>; - ranges = <0 0 0xe0000000 0x10000000>; - - gic: interrupt-controller@c01000 { - compatible = "hisilicon,hip04-intc"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - interrupts = <1 9 0xf04>; - - reg = <0xc01000 0x1000>, <0xc02000 0x1000>, - <0xc04000 0x2000>, <0xc06000 0x2000>; - }; - - sysctrl: sysctrl { - compatible = "hisilicon,sysctrl"; - reg = <0x3e00000 0x00100000>; - }; - - fabric: fabric { - compatible = "hisilicon,hip04-fabric"; - reg = <0x302a000 0x1000>; - }; - - dual_timer0: dual_timer@3000000 { - compatible = "arm,sp804", "arm,primecell"; - reg = <0x3000000 0x1000>; - interrupts = <0 224 4>; - clocks = <&clk_50m>, <&clk_50m>; - clock-names = "apb_pclk"; - }; - - arm-pmu { - compatible = "arm,cortex-a15-pmu"; - interrupts = <0 64 4>, - <0 65 4>, - <0 66 4>, - <0 67 4>, - <0 68 4>, - <0 69 4>, - <0 70 4>, - <0 71 4>, - <0 72 4>, - <0 73 4>, - <0 74 4>, - <0 75 4>, - <0 76 4>, - <0 77 4>, - <0 78 4>, - <0 79 4>; - }; - - uart0: uart@4007000 { - compatible = "snps,dw-apb-uart"; - reg = <0x4007000 0x1000>; - interrupts = <0 381 4>; - clocks = <&clk_168m>; - clock-names = "uartclk"; - reg-shift = <2>; - status = "disabled"; - }; - - sata0: sata@a000000 { - compatible = "hisilicon,hisi-ahci"; - reg = <0xa000000 0x1000000>; - interrupts = <0 372 4>; - }; - - }; - - etb@0,e3c42000 { - compatible = "arm,coresight-etb10", "arm,primecell"; - reg = <0 0xe3c42000 0 0x1000>; - - coresight-default-sink; - clocks = <&clk_375m>; - clock-names = "apb_pclk"; - port { - etb0_in_port: endpoint@0 { - slave-mode; - remote-endpoint = <&replicator0_out_port0>; - }; - }; - }; - - etb@0,e3c82000 { - compatible = "arm,coresight-etb10", "arm,primecell"; - reg = <0 0xe3c82000 0 0x1000>; - - clocks = <&clk_375m>; - clock-names = "apb_pclk"; - port { - etb1_in_port: endpoint@0 { - slave-mode; - remote-endpoint = <&replicator1_out_port0>; - }; - }; - }; - - etb@0,e3cc2000 { - compatible = "arm,coresight-etb10", "arm,primecell"; - reg = <0 0xe3cc2000 0 0x1000>; - - clocks = <&clk_375m>; - clock-names = "apb_pclk"; - port { - etb2_in_port: endpoint@0 { - slave-mode; - remote-endpoint = <&replicator2_out_port0>; - }; - }; - }; - - etb@0,e3d02000 { - compatible = "arm,coresight-etb10", "arm,primecell"; - reg = <0 0xe3d02000 0 0x1000>; - - clocks = <&clk_375m>; - clock-names = "apb_pclk"; - port { - etb3_in_port: endpoint@0 { - slave-mode; - remote-endpoint = <&replicator3_out_port0>; - }; - }; - }; - - tpiu@0,e3c05000 { - compatible = "arm,coresight-tpiu", "arm,primecell"; - reg = <0 0xe3c05000 0 0x1000>; - - clocks = <&clk_375m>; - clock-names = "apb_pclk"; - port { - tpiu_in_port: endpoint@0 { - slave-mode; - remote-endpoint = <&funnel4_out_port0>; - }; - }; - }; - - replicator0 { - /* non-configurable replicators don't show up on the - * AMBA bus. As such no need to add "arm,primecell". - */ - compatible = "arm,coresight-replicator"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - /* replicator output ports */ - port@0 { - reg = <0>; - replicator0_out_port0: endpoint { - remote-endpoint = <&etb0_in_port>; - }; - }; - - port@1 { - reg = <1>; - replicator0_out_port1: endpoint { - remote-endpoint = <&funnel4_in_port0>; - }; - }; - - /* replicator input port */ - port@2 { - reg = <0>; - replicator0_in_port0: endpoint { - slave-mode; - remote-endpoint = <&funnel0_out_port0>; - }; - }; - }; - }; - - replicator1 { - /* non-configurable replicators don't show up on the - * AMBA bus. As such no need to add "arm,primecell". - */ - compatible = "arm,coresight-replicator"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - /* replicator output ports */ - port@0 { - reg = <0>; - replicator1_out_port0: endpoint { - remote-endpoint = <&etb1_in_port>; - }; - }; - - port@1 { - reg = <1>; - replicator1_out_port1: endpoint { - remote-endpoint = <&funnel4_in_port1>; - }; - }; - - /* replicator input port */ - port@2 { - reg = <0>; - replicator1_in_port0: endpoint { - slave-mode; - remote-endpoint = <&funnel1_out_port0>; - }; - }; - }; - }; - - replicator2 { - /* non-configurable replicators don't show up on the - * AMBA bus. As such no need to add "arm,primecell". - */ - compatible = "arm,coresight-replicator"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - /* replicator output ports */ - port@0 { - reg = <0>; - replicator2_out_port0: endpoint { - remote-endpoint = <&etb2_in_port>; - }; - }; - - port@1 { - reg = <1>; - replicator2_out_port1: endpoint { - remote-endpoint = <&funnel4_in_port2>; - }; - }; - - /* replicator input port */ - port@2 { - reg = <0>; - replicator2_in_port0: endpoint { - slave-mode; - remote-endpoint = <&funnel2_out_port0>; - }; - }; - }; - }; - - replicator3 { - /* non-configurable replicators don't show up on the - * AMBA bus. As such no need to add "arm,primecell". - */ - compatible = "arm,coresight-replicator"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - /* replicator output ports */ - port@0 { - reg = <0>; - replicator3_out_port0: endpoint { - remote-endpoint = <&etb3_in_port>; - }; - }; - - port@1 { - reg = <1>; - replicator3_out_port1: endpoint { - remote-endpoint = <&funnel4_in_port3>; - }; - }; - - /* replicator input port */ - port@2 { - reg = <0>; - replicator3_in_port0: endpoint { - slave-mode; - remote-endpoint = <&funnel3_out_port0>; - }; - }; - }; - }; - - funnel@0,e3c41000 { - compatible = "arm,coresight-funnel", "arm,primecell"; - reg = <0 0xe3c41000 0 0x1000>; - - clocks = <&clk_375m>; - clock-names = "apb_pclk"; - ports { - #address-cells = <1>; - #size-cells = <0>; - - /* funnel output port */ - port@0 { - reg = <0>; - funnel0_out_port0: endpoint { - remote-endpoint = - <&replicator0_in_port0>; - }; - }; - - /* funnel input ports */ - port@1 { - reg = <0>; - funnel0_in_port0: endpoint { - slave-mode; - remote-endpoint = <&ptm0_out_port>; - }; - }; - - port@2 { - reg = <1>; - funnel0_in_port1: endpoint { - slave-mode; - remote-endpoint = <&ptm1_out_port>; - }; - }; - - port@3 { - reg = <2>; - funnel0_in_port2: endpoint { - slave-mode; - remote-endpoint = <&ptm2_out_port>; - }; - }; - - port@4 { - reg = <3>; - funnel0_in_port3: endpoint { - slave-mode; - remote-endpoint = <&ptm3_out_port>; - }; - }; - }; - }; - - funnel@0,e3c81000 { - compatible = "arm,coresight-funnel", "arm,primecell"; - reg = <0 0xe3c81000 0 0x1000>; - - clocks = <&clk_375m>; - clock-names = "apb_pclk"; - ports { - #address-cells = <1>; - #size-cells = <0>; - - /* funnel output port */ - port@0 { - reg = <0>; - funnel1_out_port0: endpoint { - remote-endpoint = - <&replicator1_in_port0>; - }; - }; - - /* funnel input ports */ - port@1 { - reg = <0>; - funnel1_in_port0: endpoint { - slave-mode; - remote-endpoint = <&ptm4_out_port>; - }; - }; - - port@2 { - reg = <1>; - funnel1_in_port1: endpoint { - slave-mode; - remote-endpoint = <&ptm5_out_port>; - }; - }; - - port@3 { - reg = <2>; - funnel1_in_port2: endpoint { - slave-mode; - remote-endpoint = <&ptm6_out_port>; - }; - }; - - port@4 { - reg = <3>; - funnel1_in_port3: endpoint { - slave-mode; - remote-endpoint = <&ptm7_out_port>; - }; - }; - }; - }; - - funnel@0,e3cc1000 { - compatible = "arm,coresight-funnel", "arm,primecell"; - reg = <0 0xe3cc1000 0 0x1000>; - - clocks = <&clk_375m>; - clock-names = "apb_pclk"; - ports { - #address-cells = <1>; - #size-cells = <0>; - - /* funnel output port */ - port@0 { - reg = <0>; - funnel2_out_port0: endpoint { - remote-endpoint = - <&replicator2_in_port0>; - }; - }; - - /* funnel input ports */ - port@1 { - reg = <0>; - funnel2_in_port0: endpoint { - slave-mode; - remote-endpoint = <&ptm8_out_port>; - }; - }; - - port@2 { - reg = <1>; - funnel2_in_port1: endpoint { - slave-mode; - remote-endpoint = <&ptm9_out_port>; - }; - }; - - port@3 { - reg = <2>; - funnel2_in_port2: endpoint { - slave-mode; - remote-endpoint = <&ptm10_out_port>; - }; - }; - - port@4 { - reg = <3>; - funnel2_in_port3: endpoint { - slave-mode; - remote-endpoint = <&ptm11_out_port>; - }; - }; - }; - }; - - funnel@0,e3d01000 { - compatible = "arm,coresight-funnel", "arm,primecell"; - reg = <0 0xe3d01000 0 0x1000>; - - clocks = <&clk_375m>; - clock-names = "apb_pclk"; - ports { - #address-cells = <1>; - #size-cells = <0>; - - /* funnel output port */ - port@0 { - reg = <0>; - funnel3_out_port0: endpoint { - remote-endpoint = - <&replicator3_in_port0>; - }; - }; - - /* funnel input ports */ - port@1 { - reg = <0>; - funnel3_in_port0: endpoint { - slave-mode; - remote-endpoint = <&ptm12_out_port>; - }; - }; - - port@2 { - reg = <1>; - funnel3_in_port1: endpoint { - slave-mode; - remote-endpoint = <&ptm13_out_port>; - }; - }; - - port@3 { - reg = <2>; - funnel3_in_port2: endpoint { - slave-mode; - remote-endpoint = <&ptm14_out_port>; - }; - }; - - port@4 { - reg = <3>; - funnel3_in_port3: endpoint { - slave-mode; - remote-endpoint = <&ptm15_out_port>; - }; - }; - }; - }; - - funnel@0,e3c04000 { - compatible = "arm,coresight-funnel", "arm,primecell"; - reg = <0 0xe3c04000 0 0x1000>; - - clocks = <&clk_375m>; - clock-names = "apb_pclk"; - ports { - #address-cells = <1>; - #size-cells = <0>; - - /* funnel output port */ - port@0 { - reg = <0>; - funnel4_out_port0: endpoint { - remote-endpoint = <&tpiu_in_port>; - }; - }; - - /* funnel input ports */ - port@1 { - reg = <0>; - funnel4_in_port0: endpoint { - slave-mode; - remote-endpoint = - <&replicator0_out_port1>; - }; - }; - - port@2 { - reg = <1>; - funnel4_in_port1: endpoint { - slave-mode; - remote-endpoint = - <&replicator1_out_port1>; - }; - }; - - port@3 { - reg = <2>; - funnel4_in_port2: endpoint { - slave-mode; - remote-endpoint = - <&replicator2_out_port1>; - }; - }; - - port@4 { - reg = <3>; - funnel4_in_port3: endpoint { - slave-mode; - remote-endpoint = - <&replicator3_out_port1>; - }; - }; - }; - }; - - ptm@0,e3c7c000 { - compatible = "arm,coresight-etm3x", "arm,primecell"; - reg = <0 0xe3c7c000 0 0x1000>; - - clocks = <&clk_375m>; - clock-names = "apb_pclk"; - cpu = <&CPU0>; - port { - ptm0_out_port: endpoint { - remote-endpoint = <&funnel0_in_port0>; - }; - }; - }; - - ptm@0,e3c7d000 { - compatible = "arm,coresight-etm3x", "arm,primecell"; - reg = <0 0xe3c7d000 0 0x1000>; - - clocks = <&clk_375m>; - clock-names = "apb_pclk"; - cpu = <&CPU1>; - port { - ptm1_out_port: endpoint { - remote-endpoint = <&funnel0_in_port1>; - }; - }; - }; - - ptm@0,e3c7e000 { - compatible = "arm,coresight-etm3x", "arm,primecell"; - reg = <0 0xe3c7e000 0 0x1000>; - - clocks = <&clk_375m>; - clock-names = "apb_pclk"; - cpu = <&CPU2>; - port { - ptm2_out_port: endpoint { - remote-endpoint = <&funnel0_in_port2>; - }; - }; - }; - - ptm@0,e3c7f000 { - compatible = "arm,coresight-etm3x", "arm,primecell"; - reg = <0 0xe3c7f000 0 0x1000>; - - clocks = <&clk_375m>; - clock-names = "apb_pclk"; - cpu = <&CPU3>; - port { - ptm3_out_port: endpoint { - remote-endpoint = <&funnel0_in_port3>; - }; - }; - }; - - ptm@0,e3cbc000 { - compatible = "arm,coresight-etm3x", "arm,primecell"; - reg = <0 0xe3cbc000 0 0x1000>; - - clocks = <&clk_375m>; - clock-names = "apb_pclk"; - cpu = <&CPU4>; - port { - ptm4_out_port: endpoint { - remote-endpoint = <&funnel1_in_port0>; - }; - }; - }; - - ptm@0,e3cbd000 { - compatible = "arm,coresight-etm3x", "arm,primecell"; - reg = <0 0xe3cbd000 0 0x1000>; - - clocks = <&clk_375m>; - clock-names = "apb_pclk"; - cpu = <&CPU5>; - port { - ptm5_out_port: endpoint { - remote-endpoint = <&funnel1_in_port1>; - }; - }; - }; - - ptm@0,e3cbe000 { - compatible = "arm,coresight-etm3x", "arm,primecell"; - reg = <0 0xe3cbe000 0 0x1000>; - - clocks = <&clk_375m>; - clock-names = "apb_pclk"; - cpu = <&CPU6>; - port { - ptm6_out_port: endpoint { - remote-endpoint = <&funnel1_in_port2>; - }; - }; - }; - - ptm@0,e3cbf000 { - compatible = "arm,coresight-etm3x", "arm,primecell"; - reg = <0 0xe3cbf000 0 0x1000>; - - clocks = <&clk_375m>; - clock-names = "apb_pclk"; - cpu = <&CPU7>; - port { - ptm7_out_port: endpoint { - remote-endpoint = <&funnel1_in_port3>; - }; - }; - }; - - ptm@0,e3cfc000 { - compatible = "arm,coresight-etm3x", "arm,primecell"; - reg = <0 0xe3cfc000 0 0x1000>; - - clocks = <&clk_375m>; - clock-names = "apb_pclk"; - cpu = <&CPU8>; - port { - ptm8_out_port: endpoint { - remote-endpoint = <&funnel2_in_port0>; - }; - }; - }; - - ptm@0,e3cfd000 { - compatible = "arm,coresight-etm3x", "arm,primecell"; - reg = <0 0xe3cfd000 0 0x1000>; - clocks = <&clk_375m>; - clock-names = "apb_pclk"; - cpu = <&CPU9>; - port { - ptm9_out_port: endpoint { - remote-endpoint = <&funnel2_in_port1>; - }; - }; - }; - - ptm@0,e3cfe000 { - compatible = "arm,coresight-etm3x", "arm,primecell"; - reg = <0 0xe3cfe000 0 0x1000>; - - clocks = <&clk_375m>; - clock-names = "apb_pclk"; - cpu = <&CPU10>; - port { - ptm10_out_port: endpoint { - remote-endpoint = <&funnel2_in_port2>; - }; - }; - }; - - ptm@0,e3cff000 { - compatible = "arm,coresight-etm3x", "arm,primecell"; - reg = <0 0xe3cff000 0 0x1000>; - - clocks = <&clk_375m>; - clock-names = "apb_pclk"; - cpu = <&CPU11>; - port { - ptm11_out_port: endpoint { - remote-endpoint = <&funnel2_in_port3>; - }; - }; - }; - - ptm@0,e3d3c000 { - compatible = "arm,coresight-etm3x", "arm,primecell"; - reg = <0 0xe3d3c000 0 0x1000>; - - clocks = <&clk_375m>; - clock-names = "apb_pclk"; - cpu = <&CPU12>; - port { - ptm12_out_port: endpoint { - remote-endpoint = <&funnel3_in_port0>; - }; - }; - }; - - ptm@0,e3d3d000 { - compatible = "arm,coresight-etm3x", "arm,primecell"; - reg = <0 0xe3d3d000 0 0x1000>; - - clocks = <&clk_375m>; - clock-names = "apb_pclk"; - cpu = <&CPU13>; - port { - ptm13_out_port: endpoint { - remote-endpoint = <&funnel3_in_port1>; - }; - }; - }; - - ptm@0,e3d3e000 { - compatible = "arm,coresight-etm3x", "arm,primecell"; - reg = <0 0xe3d3e000 0 0x1000>; - - clocks = <&clk_375m>; - clock-names = "apb_pclk"; - cpu = <&CPU14>; - port { - ptm14_out_port: endpoint { - remote-endpoint = <&funnel3_in_port2>; - }; - }; - }; - - ptm@0,e3d3f000 { - compatible = "arm,coresight-etm3x", "arm,primecell"; - reg = <0 0xe3d3f000 0 0x1000>; - - clocks = <&clk_375m>; - clock-names = "apb_pclk"; - cpu = <&CPU15>; - port { - ptm15_out_port: endpoint { - remote-endpoint = <&funnel3_in_port3>; - }; - }; - }; -}; diff --git a/arch/arm/boot/dts/imx23-olinuxino.dts b/arch/arm/boot/dts/imx23-olinuxino.dts index 6fef54416cbf..d107c4af321f 100644 --- a/arch/arm/boot/dts/imx23-olinuxino.dts +++ b/arch/arm/boot/dts/imx23-olinuxino.dts @@ -89,7 +89,6 @@ ahb@80080000 { usb0: usb@80080000 { - dr_mode = "host"; vbus-supply = <®_usb0_vbus>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi index 587ceef81e45..73fd7d0887b5 100644 --- a/arch/arm/boot/dts/imx23.dtsi +++ b/arch/arm/boot/dts/imx23.dtsi @@ -23,12 +23,8 @@ }; cpus { - #address-cells = <0>; - #size-cells = <0>; - - cpu { - compatible = "arm,arm926ej-s"; - device_type = "cpu"; + cpu@0 { + compatible = "arm,arm926ejs"; }; }; diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi index 2a571bcacaf4..701153992c69 100644 --- a/arch/arm/boot/dts/imx25.dtsi +++ b/arch/arm/boot/dts/imx25.dtsi @@ -141,7 +141,7 @@ #size-cells = <0>; compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; reg = <0x43fa4000 0x4000>; - clocks = <&clks 78>, <&clks 78>; + clocks = <&clks 62>, <&clks 62>; clock-names = "ipg", "per"; interrupts = <14>; status = "disabled"; @@ -335,7 +335,7 @@ compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; #pwm-cells = <2>; reg = <0x53fa0000 0x4000>; - clocks = <&clks 106>, <&clks 52>; + clocks = <&clks 106>, <&clks 36>; clock-names = "ipg", "per"; interrupts = <36>; }; @@ -354,7 +354,7 @@ compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; #pwm-cells = <2>; reg = <0x53fa8000 0x4000>; - clocks = <&clks 107>, <&clks 52>; + clocks = <&clks 107>, <&clks 36>; clock-names = "ipg", "per"; interrupts = <41>; }; @@ -393,9 +393,8 @@ pwm4: pwm@53fc8000 { compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; - #pwm-cells = <2>; reg = <0x53fc8000 0x4000>; - clocks = <&clks 108>, <&clks 52>; + clocks = <&clks 108>, <&clks 36>; clock-names = "ipg", "per"; interrupts = <42>; }; @@ -440,7 +439,7 @@ compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; #pwm-cells = <2>; reg = <0x53fe0000 0x4000>; - clocks = <&clks 105>, <&clks 52>; + clocks = <&clks 105>, <&clks 36>; clock-names = "ipg", "per"; interrupts = <26>; }; diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi index 77730a37344e..75bd11386516 100644 --- a/arch/arm/boot/dts/imx27.dtsi +++ b/arch/arm/boot/dts/imx27.dtsi @@ -290,7 +290,7 @@ fec: ethernet@1002b000 { compatible = "fsl,imx27-fec"; - reg = <0x1002b000 0x1000>; + reg = <0x1002b000 0x4000>; interrupts = <50>; clocks = <&clks 48>, <&clks 67>, <&clks 0>; clock-names = "ipg", "ahb", "ptp"; diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi index 2e76b84c6bad..600f7cb51f3e 100644 --- a/arch/arm/boot/dts/imx28.dtsi +++ b/arch/arm/boot/dts/imx28.dtsi @@ -32,12 +32,8 @@ }; cpus { - #address-cells = <0>; - #size-cells = <0>; - - cpu { - compatible = "arm,arm926ej-s"; - device_type = "cpu"; + cpu@0 { + compatible = "arm,arm926ejs"; }; }; @@ -691,7 +687,7 @@ 80 81 68 69 70 71 72 73 74 75 76 77>; - interrupt-names = "auart4-rx", "auart4-tx", "spdif-tx", "empty", + interrupt-names = "auart4-rx", "aurat4-tx", "spdif-tx", "empty", "saif0", "saif1", "i2c0", "i2c1", "auart0-rx", "auart0-tx", "auart1-rx", "auart1-tx", "auart2-rx", "auart2-tx", "auart3-rx", "auart3-tx"; diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index e524316998f4..eb83aa039b8b 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi @@ -71,7 +71,7 @@ ipu: ipu@18000000 { #crtc-cells = <1>; compatible = "fsl,imx53-ipu"; - reg = <0x18000000 0x08000000>; + reg = <0x18000000 0x080000000>; interrupts = <11 10>; clocks = <&clks 59>, <&clks 110>, <&clks 61>; clock-names = "bus", "di0", "di1"; diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi index 62dc78126795..5bcdf3a90bb3 100644 --- a/arch/arm/boot/dts/imx6dl.dtsi +++ b/arch/arm/boot/dts/imx6dl.dtsi @@ -18,14 +18,12 @@ cpu@0 { compatible = "arm,cortex-a9"; - device_type = "cpu"; reg = <0>; next-level-cache = <&L2>; }; cpu@1 { compatible = "arm,cortex-a9"; - device_type = "cpu"; reg = <1>; next-level-cache = <&L2>; }; diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index dc54a72a3bcd..21e675848bd1 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -18,7 +18,6 @@ cpu@0 { compatible = "arm,cortex-a9"; - device_type = "cpu"; reg = <0>; next-level-cache = <&L2>; operating-points = < @@ -40,21 +39,18 @@ cpu@1 { compatible = "arm,cortex-a9"; - device_type = "cpu"; reg = <1>; next-level-cache = <&L2>; }; cpu@2 { compatible = "arm,cortex-a9"; - device_type = "cpu"; reg = <2>; next-level-cache = <&L2>; }; cpu@3 { compatible = "arm,cortex-a9"; - device_type = "cpu"; reg = <3>; next-level-cache = <&L2>; }; diff --git a/arch/arm/boot/dts/integratorcp.dts b/arch/arm/boot/dts/integratorcp.dts index 72693a69f830..ff1aea0ee043 100644 --- a/arch/arm/boot/dts/integratorcp.dts +++ b/arch/arm/boot/dts/integratorcp.dts @@ -9,6 +9,11 @@ model = "ARM Integrator/CP"; compatible = "arm,integrator-cp"; + aliases { + arm,timer-primary = &timer2; + arm,timer-secondary = &timer1; + }; + chosen { bootargs = "root=/dev/ram0 console=ttyAMA0,38400n8 earlyprintk"; }; @@ -19,18 +24,14 @@ }; timer0: timer@13000000 { - /* TIMER0 runs @ 25MHz */ compatible = "arm,integrator-cp-timer"; - status = "disabled"; }; timer1: timer@13000100 { - /* TIMER1 runs @ 1MHz */ compatible = "arm,integrator-cp-timer"; }; timer2: timer@13000200 { - /* TIMER2 runs @ 1MHz */ compatible = "arm,integrator-cp-timer"; }; diff --git a/arch/arm/boot/dts/rtsm_ve-cortex_a15x1.dts b/arch/arm/boot/dts/rtsm_ve-cortex_a15x1.dts deleted file mode 100644 index c9eee916aa7e..000000000000 --- a/arch/arm/boot/dts/rtsm_ve-cortex_a15x1.dts +++ /dev/null @@ -1,159 +0,0 @@ -/* - * ARM Ltd. Fast Models - * - * Versatile Express (VE) system model - * ARMCortexA15x1CT - * - * RTSM_VE_Cortex_A15x1.lisa - */ - -/dts-v1/; - -/ { - model = "RTSM_VE_CortexA15x1"; - arm,vexpress,site = <0xf>; - compatible = "arm,rtsm_ve,cortex_a15x1", "arm,vexpress"; - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - - chosen { }; - - aliases { - serial0 = &v2m_serial0; - serial1 = &v2m_serial1; - serial2 = &v2m_serial2; - serial3 = &v2m_serial3; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0>; - }; - }; - - memory@80000000 { - device_type = "memory"; - reg = <0 0x80000000 0 0x80000000>; - }; - - gic: interrupt-controller@2c001000 { - compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0 0x2c001000 0 0x1000>, - <0 0x2c002000 0 0x1000>, - <0 0x2c004000 0 0x2000>, - <0 0x2c006000 0 0x2000>; - interrupts = <1 9 0xf04>; - }; - - timer { - compatible = "arm,armv7-timer"; - interrupts = <1 13 0xf08>, - <1 14 0xf08>, - <1 11 0xf08>, - <1 10 0xf08>; - }; - - dcc { - compatible = "arm,vexpress,config-bus"; - arm,vexpress,config-bridge = <&v2m_sysreg>; - - osc@0 { - /* ACLK clock to the AXI master port on the test chip */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 0>; - freq-range = <30000000 50000000>; - #clock-cells = <0>; - clock-output-names = "extsaxiclk"; - }; - - oscclk1: osc@1 { - /* Reference clock for the CLCD */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 1>; - freq-range = <10000000 80000000>; - #clock-cells = <0>; - clock-output-names = "clcdclk"; - }; - - smbclk: oscclk2: osc@2 { - /* Reference clock for the test chip internal PLLs */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 2>; - freq-range = <33000000 100000000>; - #clock-cells = <0>; - clock-output-names = "tcrefclk"; - }; - }; - - smb { - compatible = "simple-bus"; - - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0 0x08000000 0x04000000>, - <1 0 0 0x14000000 0x04000000>, - <2 0 0 0x18000000 0x04000000>, - <3 0 0 0x1c000000 0x04000000>, - <4 0 0 0x0c000000 0x04000000>, - <5 0 0 0x10000000 0x04000000>; - - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 63>; - interrupt-map = <0 0 0 &gic 0 0 4>, - <0 0 1 &gic 0 1 4>, - <0 0 2 &gic 0 2 4>, - <0 0 3 &gic 0 3 4>, - <0 0 4 &gic 0 4 4>, - <0 0 5 &gic 0 5 4>, - <0 0 6 &gic 0 6 4>, - <0 0 7 &gic 0 7 4>, - <0 0 8 &gic 0 8 4>, - <0 0 9 &gic 0 9 4>, - <0 0 10 &gic 0 10 4>, - <0 0 11 &gic 0 11 4>, - <0 0 12 &gic 0 12 4>, - <0 0 13 &gic 0 13 4>, - <0 0 14 &gic 0 14 4>, - <0 0 15 &gic 0 15 4>, - <0 0 16 &gic 0 16 4>, - <0 0 17 &gic 0 17 4>, - <0 0 18 &gic 0 18 4>, - <0 0 19 &gic 0 19 4>, - <0 0 20 &gic 0 20 4>, - <0 0 21 &gic 0 21 4>, - <0 0 22 &gic 0 22 4>, - <0 0 23 &gic 0 23 4>, - <0 0 24 &gic 0 24 4>, - <0 0 25 &gic 0 25 4>, - <0 0 26 &gic 0 26 4>, - <0 0 27 &gic 0 27 4>, - <0 0 28 &gic 0 28 4>, - <0 0 29 &gic 0 29 4>, - <0 0 30 &gic 0 30 4>, - <0 0 31 &gic 0 31 4>, - <0 0 32 &gic 0 32 4>, - <0 0 33 &gic 0 33 4>, - <0 0 34 &gic 0 34 4>, - <0 0 35 &gic 0 35 4>, - <0 0 36 &gic 0 36 4>, - <0 0 37 &gic 0 37 4>, - <0 0 38 &gic 0 38 4>, - <0 0 39 &gic 0 39 4>, - <0 0 40 &gic 0 40 4>, - <0 0 41 &gic 0 41 4>, - <0 0 42 &gic 0 42 4>; - - /include/ "rtsm_ve-motherboard.dtsi" - }; -}; - -/include/ "clcd-panels.dtsi" diff --git a/arch/arm/boot/dts/rtsm_ve-cortex_a15x2.dts b/arch/arm/boot/dts/rtsm_ve-cortex_a15x2.dts deleted file mode 100644 index 853a166e3c32..000000000000 --- a/arch/arm/boot/dts/rtsm_ve-cortex_a15x2.dts +++ /dev/null @@ -1,165 +0,0 @@ -/* - * ARM Ltd. Fast Models - * - * Versatile Express (VE) system model - * ARMCortexA15x2CT - * - * RTSM_VE_Cortex_A15x2.lisa - */ - -/dts-v1/; - -/ { - model = "RTSM_VE_CortexA15x2"; - arm,vexpress,site = <0xf>; - compatible = "arm,rtsm_ve,cortex_a15x2", "arm,vexpress"; - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - - chosen { }; - - aliases { - serial0 = &v2m_serial0; - serial1 = &v2m_serial1; - serial2 = &v2m_serial2; - serial3 = &v2m_serial3; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <1>; - }; - }; - - memory@80000000 { - device_type = "memory"; - reg = <0 0x80000000 0 0x80000000>; - }; - - gic: interrupt-controller@2c001000 { - compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0 0x2c001000 0 0x1000>, - <0 0x2c002000 0 0x1000>, - <0 0x2c004000 0 0x2000>, - <0 0x2c006000 0 0x2000>; - interrupts = <1 9 0xf04>; - }; - - timer { - compatible = "arm,armv7-timer"; - interrupts = <1 13 0xf08>, - <1 14 0xf08>, - <1 11 0xf08>, - <1 10 0xf08>; - }; - - dcc { - compatible = "arm,vexpress,config-bus"; - arm,vexpress,config-bridge = <&v2m_sysreg>; - - osc@0 { - /* ACLK clock to the AXI master port on the test chip */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 0>; - freq-range = <30000000 50000000>; - #clock-cells = <0>; - clock-output-names = "extsaxiclk"; - }; - - oscclk1: osc@1 { - /* Reference clock for the CLCD */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 1>; - freq-range = <10000000 80000000>; - #clock-cells = <0>; - clock-output-names = "clcdclk"; - }; - - smbclk: oscclk2: osc@2 { - /* Reference clock for the test chip internal PLLs */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 2>; - freq-range = <33000000 100000000>; - #clock-cells = <0>; - clock-output-names = "tcrefclk"; - }; - }; - - smb { - compatible = "simple-bus"; - - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0 0x08000000 0x04000000>, - <1 0 0 0x14000000 0x04000000>, - <2 0 0 0x18000000 0x04000000>, - <3 0 0 0x1c000000 0x04000000>, - <4 0 0 0x0c000000 0x04000000>, - <5 0 0 0x10000000 0x04000000>; - - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 63>; - interrupt-map = <0 0 0 &gic 0 0 4>, - <0 0 1 &gic 0 1 4>, - <0 0 2 &gic 0 2 4>, - <0 0 3 &gic 0 3 4>, - <0 0 4 &gic 0 4 4>, - <0 0 5 &gic 0 5 4>, - <0 0 6 &gic 0 6 4>, - <0 0 7 &gic 0 7 4>, - <0 0 8 &gic 0 8 4>, - <0 0 9 &gic 0 9 4>, - <0 0 10 &gic 0 10 4>, - <0 0 11 &gic 0 11 4>, - <0 0 12 &gic 0 12 4>, - <0 0 13 &gic 0 13 4>, - <0 0 14 &gic 0 14 4>, - <0 0 15 &gic 0 15 4>, - <0 0 16 &gic 0 16 4>, - <0 0 17 &gic 0 17 4>, - <0 0 18 &gic 0 18 4>, - <0 0 19 &gic 0 19 4>, - <0 0 20 &gic 0 20 4>, - <0 0 21 &gic 0 21 4>, - <0 0 22 &gic 0 22 4>, - <0 0 23 &gic 0 23 4>, - <0 0 24 &gic 0 24 4>, - <0 0 25 &gic 0 25 4>, - <0 0 26 &gic 0 26 4>, - <0 0 27 &gic 0 27 4>, - <0 0 28 &gic 0 28 4>, - <0 0 29 &gic 0 29 4>, - <0 0 30 &gic 0 30 4>, - <0 0 31 &gic 0 31 4>, - <0 0 32 &gic 0 32 4>, - <0 0 33 &gic 0 33 4>, - <0 0 34 &gic 0 34 4>, - <0 0 35 &gic 0 35 4>, - <0 0 36 &gic 0 36 4>, - <0 0 37 &gic 0 37 4>, - <0 0 38 &gic 0 38 4>, - <0 0 39 &gic 0 39 4>, - <0 0 40 &gic 0 40 4>, - <0 0 41 &gic 0 41 4>, - <0 0 42 &gic 0 42 4>; - - /include/ "rtsm_ve-motherboard.dtsi" - }; -}; - -/include/ "clcd-panels.dtsi" diff --git a/arch/arm/boot/dts/rtsm_ve-cortex_a15x4.dts b/arch/arm/boot/dts/rtsm_ve-cortex_a15x4.dts deleted file mode 100644 index c1947a3a5c88..000000000000 --- a/arch/arm/boot/dts/rtsm_ve-cortex_a15x4.dts +++ /dev/null @@ -1,177 +0,0 @@ -/* - * ARM Ltd. Fast Models - * - * Versatile Express (VE) system model - * ARMCortexA15x4CT - * - * RTSM_VE_Cortex_A15x4.lisa - */ - -/dts-v1/; - -/ { - model = "RTSM_VE_CortexA15x4"; - arm,vexpress,site = <0xf>; - compatible = "arm,rtsm_ve,cortex_a15x4", "arm,vexpress"; - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - - chosen { }; - - aliases { - serial0 = &v2m_serial0; - serial1 = &v2m_serial1; - serial2 = &v2m_serial2; - serial3 = &v2m_serial3; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <1>; - }; - - cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <2>; - }; - - cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <3>; - }; - }; - - memory@80000000 { - device_type = "memory"; - reg = <0 0x80000000 0 0x80000000>; - }; - - gic: interrupt-controller@2c001000 { - compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0 0x2c001000 0 0x1000>, - <0 0x2c002000 0 0x1000>, - <0 0x2c004000 0 0x2000>, - <0 0x2c006000 0 0x2000>; - interrupts = <1 9 0xf04>; - }; - - timer { - compatible = "arm,armv7-timer"; - interrupts = <1 13 0xf08>, - <1 14 0xf08>, - <1 11 0xf08>, - <1 10 0xf08>; - }; - - dcc { - compatible = "arm,vexpress,config-bus"; - arm,vexpress,config-bridge = <&v2m_sysreg>; - - osc@0 { - /* ACLK clock to the AXI master port on the test chip */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 0>; - freq-range = <30000000 50000000>; - #clock-cells = <0>; - clock-output-names = "extsaxiclk"; - }; - - oscclk1: osc@1 { - /* Reference clock for the CLCD */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 1>; - freq-range = <10000000 80000000>; - #clock-cells = <0>; - clock-output-names = "clcdclk"; - }; - - smbclk: oscclk2: osc@2 { - /* Reference clock for the test chip internal PLLs */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 2>; - freq-range = <33000000 100000000>; - #clock-cells = <0>; - clock-output-names = "tcrefclk"; - }; - }; - - smb { - compatible = "simple-bus"; - - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0 0x08000000 0x04000000>, - <1 0 0 0x14000000 0x04000000>, - <2 0 0 0x18000000 0x04000000>, - <3 0 0 0x1c000000 0x04000000>, - <4 0 0 0x0c000000 0x04000000>, - <5 0 0 0x10000000 0x04000000>; - - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 63>; - interrupt-map = <0 0 0 &gic 0 0 4>, - <0 0 1 &gic 0 1 4>, - <0 0 2 &gic 0 2 4>, - <0 0 3 &gic 0 3 4>, - <0 0 4 &gic 0 4 4>, - <0 0 5 &gic 0 5 4>, - <0 0 6 &gic 0 6 4>, - <0 0 7 &gic 0 7 4>, - <0 0 8 &gic 0 8 4>, - <0 0 9 &gic 0 9 4>, - <0 0 10 &gic 0 10 4>, - <0 0 11 &gic 0 11 4>, - <0 0 12 &gic 0 12 4>, - <0 0 13 &gic 0 13 4>, - <0 0 14 &gic 0 14 4>, - <0 0 15 &gic 0 15 4>, - <0 0 16 &gic 0 16 4>, - <0 0 17 &gic 0 17 4>, - <0 0 18 &gic 0 18 4>, - <0 0 19 &gic 0 19 4>, - <0 0 20 &gic 0 20 4>, - <0 0 21 &gic 0 21 4>, - <0 0 22 &gic 0 22 4>, - <0 0 23 &gic 0 23 4>, - <0 0 24 &gic 0 24 4>, - <0 0 25 &gic 0 25 4>, - <0 0 26 &gic 0 26 4>, - <0 0 27 &gic 0 27 4>, - <0 0 28 &gic 0 28 4>, - <0 0 29 &gic 0 29 4>, - <0 0 30 &gic 0 30 4>, - <0 0 31 &gic 0 31 4>, - <0 0 32 &gic 0 32 4>, - <0 0 33 &gic 0 33 4>, - <0 0 34 &gic 0 34 4>, - <0 0 35 &gic 0 35 4>, - <0 0 36 &gic 0 36 4>, - <0 0 37 &gic 0 37 4>, - <0 0 38 &gic 0 38 4>, - <0 0 39 &gic 0 39 4>, - <0 0 40 &gic 0 40 4>, - <0 0 41 &gic 0 41 4>, - <0 0 42 &gic 0 42 4>; - - /include/ "rtsm_ve-motherboard.dtsi" - }; -}; - -/include/ "clcd-panels.dtsi" diff --git a/arch/arm/boot/dts/rtsm_ve-cortex_a9x2.dts b/arch/arm/boot/dts/rtsm_ve-cortex_a9x2.dts deleted file mode 100644 index fca6b2f79677..000000000000 --- a/arch/arm/boot/dts/rtsm_ve-cortex_a9x2.dts +++ /dev/null @@ -1,171 +0,0 @@ -/* - * ARM Ltd. Fast Models - * - * Versatile Express (VE) system model - * ARMCortexA9MPx2CT - * - * RTSM_VE_Cortex_A9x2.lisa - */ - -/dts-v1/; - -/ { - model = "RTSM_VE_CortexA9x2"; - arm,vexpress,site = <0xf>; - compatible = "arm,rtsm_ve,cortex_a9x2", "arm,vexpress"; - interrupt-parent = <&gic>; - #address-cells = <1>; - #size-cells = <1>; - - chosen { }; - - aliases { - serial0 = &v2m_serial0; - serial1 = &v2m_serial1; - serial2 = &v2m_serial2; - serial3 = &v2m_serial3; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - reg = <0>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - reg = <1>; - }; - }; - - memory@80000000 { - device_type = "memory"; - reg = <0x80000000 0x80000000>; - }; - - scu@2c000000 { - compatible = "arm,cortex-a9-scu"; - reg = <0x2c000000 0x58>; - }; - - timer@2c000600 { - compatible = "arm,cortex-a9-twd-timer"; - reg = <0x2c000600 0x20>; - interrupts = <1 13 0xf04>; - }; - - watchdog@2c000620 { - compatible = "arm,cortex-a9-twd-wdt"; - reg = <0x2c000620 0x20>; - interrupts = <1 14 0xf04>; - }; - - gic: interrupt-controller@2c001000 { - compatible = "arm,cortex-a9-gic"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x2c001000 0x1000>, - <0x2c000100 0x100>; - }; - - dcc { - compatible = "arm,vexpress,config-bus"; - arm,vexpress,config-bridge = <&v2m_sysreg>; - - osc@0 { - /* ACLK clock to the AXI master port on the test chip */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 0>; - freq-range = <30000000 50000000>; - #clock-cells = <0>; - clock-output-names = "extsaxiclk"; - }; - - oscclk1: osc@1 { - /* Reference clock for the CLCD */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 1>; - freq-range = <10000000 80000000>; - #clock-cells = <0>; - clock-output-names = "clcdclk"; - }; - - smbclk: oscclk2: osc@2 { - /* Reference clock for the test chip internal PLLs */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 2>; - freq-range = <33000000 100000000>; - #clock-cells = <0>; - clock-output-names = "tcrefclk"; - }; - }; - - smb { - compatible = "simple-bus"; - - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0x08000000 0x04000000>, - <1 0 0x14000000 0x04000000>, - <2 0 0x18000000 0x04000000>, - <3 0 0x1c000000 0x04000000>, - <4 0 0x0c000000 0x04000000>, - <5 0 0x10000000 0x04000000>; - - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 63>; - interrupt-map = <0 0 0 &gic 0 0 4>, - <0 0 1 &gic 0 1 4>, - <0 0 2 &gic 0 2 4>, - <0 0 3 &gic 0 3 4>, - <0 0 4 &gic 0 4 4>, - <0 0 5 &gic 0 5 4>, - <0 0 6 &gic 0 6 4>, - <0 0 7 &gic 0 7 4>, - <0 0 8 &gic 0 8 4>, - <0 0 9 &gic 0 9 4>, - <0 0 10 &gic 0 10 4>, - <0 0 11 &gic 0 11 4>, - <0 0 12 &gic 0 12 4>, - <0 0 13 &gic 0 13 4>, - <0 0 14 &gic 0 14 4>, - <0 0 15 &gic 0 15 4>, - <0 0 16 &gic 0 16 4>, - <0 0 17 &gic 0 17 4>, - <0 0 18 &gic 0 18 4>, - <0 0 19 &gic 0 19 4>, - <0 0 20 &gic 0 20 4>, - <0 0 21 &gic 0 21 4>, - <0 0 22 &gic 0 22 4>, - <0 0 23 &gic 0 23 4>, - <0 0 24 &gic 0 24 4>, - <0 0 25 &gic 0 25 4>, - <0 0 26 &gic 0 26 4>, - <0 0 27 &gic 0 27 4>, - <0 0 28 &gic 0 28 4>, - <0 0 29 &gic 0 29 4>, - <0 0 30 &gic 0 30 4>, - <0 0 31 &gic 0 31 4>, - <0 0 32 &gic 0 32 4>, - <0 0 33 &gic 0 33 4>, - <0 0 34 &gic 0 34 4>, - <0 0 35 &gic 0 35 4>, - <0 0 36 &gic 0 36 4>, - <0 0 37 &gic 0 37 4>, - <0 0 38 &gic 0 38 4>, - <0 0 39 &gic 0 39 4>, - <0 0 40 &gic 0 40 4>, - <0 0 41 &gic 0 41 4>, - <0 0 42 &gic 0 42 4>; - - /include/ "rtsm_ve-motherboard.dtsi" - }; -}; - -/include/ "clcd-panels.dtsi" diff --git a/arch/arm/boot/dts/rtsm_ve-cortex_a9x4.dts b/arch/arm/boot/dts/rtsm_ve-cortex_a9x4.dts deleted file mode 100644 index fd8a6ed97a04..000000000000 --- a/arch/arm/boot/dts/rtsm_ve-cortex_a9x4.dts +++ /dev/null @@ -1,183 +0,0 @@ -/* - * ARM Ltd. Fast Models - * - * Versatile Express (VE) system model - * ARMCortexA9MPx4CT - * - * RTSM_VE_Cortex_A9x4.lisa - */ - -/dts-v1/; - -/ { - model = "RTSM_VE_CortexA9x4"; - arm,vexpress,site = <0xf>; - compatible = "arm,rtsm_ve,cortex_a9x4", "arm,vexpress"; - interrupt-parent = <&gic>; - #address-cells = <1>; - #size-cells = <1>; - - chosen { }; - - aliases { - serial0 = &v2m_serial0; - serial1 = &v2m_serial1; - serial2 = &v2m_serial2; - serial3 = &v2m_serial3; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - reg = <0>; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - reg = <1>; - }; - - cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - reg = <2>; - }; - - cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - reg = <3>; - }; - }; - - memory@80000000 { - device_type = "memory"; - reg = <0x80000000 0x80000000>; - }; - - scu@2c000000 { - compatible = "arm,cortex-a9-scu"; - reg = <0x2c000000 0x58>; - }; - - timer@2c000600 { - compatible = "arm,cortex-a9-twd-timer"; - reg = <0x2c000600 0x20>; - interrupts = <1 13 0xf04>; - }; - - watchdog@2c000620 { - compatible = "arm,cortex-a9-twd-wdt"; - reg = <0x2c000620 0x20>; - interrupts = <1 14 0xf04>; - }; - - gic: interrupt-controller@2c001000 { - compatible = "arm,cortex-a9-gic"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x2c001000 0x1000>, - <0x2c000100 0x100>; - }; - - dcc { - compatible = "arm,vexpress,config-bus"; - arm,vexpress,config-bridge = <&v2m_sysreg>; - - osc@0 { - /* ACLK clock to the AXI master port on the test chip */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 0>; - freq-range = <30000000 50000000>; - #clock-cells = <0>; - clock-output-names = "extsaxiclk"; - }; - - oscclk1: osc@1 { - /* Reference clock for the CLCD */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 1>; - freq-range = <10000000 80000000>; - #clock-cells = <0>; - clock-output-names = "clcdclk"; - }; - - smbclk: oscclk2: osc@2 { - /* Reference clock for the test chip internal PLLs */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 2>; - freq-range = <33000000 100000000>; - #clock-cells = <0>; - clock-output-names = "tcrefclk"; - }; - }; - - smb { - compatible = "simple-bus"; - - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0x08000000 0x04000000>, - <1 0 0x14000000 0x04000000>, - <2 0 0x18000000 0x04000000>, - <3 0 0x1c000000 0x04000000>, - <4 0 0x0c000000 0x04000000>, - <5 0 0x10000000 0x04000000>; - - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 63>; - interrupt-map = <0 0 0 &gic 0 0 4>, - <0 0 1 &gic 0 1 4>, - <0 0 2 &gic 0 2 4>, - <0 0 3 &gic 0 3 4>, - <0 0 4 &gic 0 4 4>, - <0 0 5 &gic 0 5 4>, - <0 0 6 &gic 0 6 4>, - <0 0 7 &gic 0 7 4>, - <0 0 8 &gic 0 8 4>, - <0 0 9 &gic 0 9 4>, - <0 0 10 &gic 0 10 4>, - <0 0 11 &gic 0 11 4>, - <0 0 12 &gic 0 12 4>, - <0 0 13 &gic 0 13 4>, - <0 0 14 &gic 0 14 4>, - <0 0 15 &gic 0 15 4>, - <0 0 16 &gic 0 16 4>, - <0 0 17 &gic 0 17 4>, - <0 0 18 &gic 0 18 4>, - <0 0 19 &gic 0 19 4>, - <0 0 20 &gic 0 20 4>, - <0 0 21 &gic 0 21 4>, - <0 0 22 &gic 0 22 4>, - <0 0 23 &gic 0 23 4>, - <0 0 24 &gic 0 24 4>, - <0 0 25 &gic 0 25 4>, - <0 0 26 &gic 0 26 4>, - <0 0 27 &gic 0 27 4>, - <0 0 28 &gic 0 28 4>, - <0 0 29 &gic 0 29 4>, - <0 0 30 &gic 0 30 4>, - <0 0 31 &gic 0 31 4>, - <0 0 32 &gic 0 32 4>, - <0 0 33 &gic 0 33 4>, - <0 0 34 &gic 0 34 4>, - <0 0 35 &gic 0 35 4>, - <0 0 36 &gic 0 36 4>, - <0 0 37 &gic 0 37 4>, - <0 0 38 &gic 0 38 4>, - <0 0 39 &gic 0 39 4>, - <0 0 40 &gic 0 40 4>, - <0 0 41 &gic 0 41 4>, - <0 0 42 &gic 0 42 4>; - - /include/ "rtsm_ve-motherboard.dtsi" - }; -}; - -/include/ "clcd-panels.dtsi" diff --git a/arch/arm/boot/dts/rtsm_ve-motherboard.dtsi b/arch/arm/boot/dts/rtsm_ve-motherboard.dtsi deleted file mode 100644 index a2d895ee5faa..000000000000 --- a/arch/arm/boot/dts/rtsm_ve-motherboard.dtsi +++ /dev/null @@ -1,231 +0,0 @@ -/* - * ARM Ltd. Fast Models - * - * Versatile Express (VE) system model - * Motherboard component - * - * VEMotherBoard.lisa - */ - - motherboard { - compatible = "arm,vexpress,v2m-p1", "simple-bus"; - arm,hbi = <0x190>; - arm,vexpress,site = <0>; - arm,v2m-memory-map = "rs1"; - #address-cells = <2>; /* SMB chipselect number and offset */ - #size-cells = <1>; - #interrupt-cells = <1>; - ranges; - - flash@0,00000000 { - compatible = "arm,vexpress-flash", "cfi-flash"; - reg = <0 0x00000000 0x04000000>, - <4 0x00000000 0x04000000>; - bank-width = <4>; - }; - - vram@2,00000000 { - compatible = "arm,vexpress-vram"; - reg = <2 0x00000000 0x00800000>; - }; - - ethernet@2,02000000 { - compatible = "smsc,lan91c111"; - reg = <2 0x02000000 0x10000>; - interrupts = <15>; - }; - - iofpga@3,00000000 { - compatible = "arm,amba-bus", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 3 0 0x200000>; - - v2m_sysreg: sysreg@010000 { - compatible = "arm,vexpress-sysreg"; - reg = <0x010000 0x1000>; - gpio-controller; - #gpio-cells = <2>; - }; - - v2m_sysctl: sysctl@020000 { - compatible = "arm,sp810", "arm,primecell"; - reg = <0x020000 0x1000>; - clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>; - clock-names = "refclk", "timclk", "apb_pclk"; - #clock-cells = <1>; - clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3"; - }; - - aaci@040000 { - compatible = "arm,pl041", "arm,primecell"; - reg = <0x040000 0x1000>; - interrupts = <11>; - clocks = <&smbclk>; - clock-names = "apb_pclk"; - }; - - mmci@050000 { - compatible = "arm,pl180", "arm,primecell"; - reg = <0x050000 0x1000>; - interrupts = <9 10>; - cd-gpios = <&v2m_sysreg 0 0>; - wp-gpios = <&v2m_sysreg 1 0>; - max-frequency = <12000000>; - vmmc-supply = <&v2m_fixed_3v3>; - clocks = <&v2m_clk24mhz>, <&smbclk>; - clock-names = "mclk", "apb_pclk"; - }; - - kmi@060000 { - compatible = "arm,pl050", "arm,primecell"; - reg = <0x060000 0x1000>; - interrupts = <12>; - clocks = <&v2m_clk24mhz>, <&smbclk>; - clock-names = "KMIREFCLK", "apb_pclk"; - }; - - kmi@070000 { - compatible = "arm,pl050", "arm,primecell"; - reg = <0x070000 0x1000>; - interrupts = <13>; - clocks = <&v2m_clk24mhz>, <&smbclk>; - clock-names = "KMIREFCLK", "apb_pclk"; - }; - - v2m_serial0: uart@090000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x090000 0x1000>; - interrupts = <5>; - clocks = <&v2m_clk24mhz>, <&smbclk>; - clock-names = "uartclk", "apb_pclk"; - }; - - v2m_serial1: uart@0a0000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x0a0000 0x1000>; - interrupts = <6>; - clocks = <&v2m_clk24mhz>, <&smbclk>; - clock-names = "uartclk", "apb_pclk"; - }; - - v2m_serial2: uart@0b0000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x0b0000 0x1000>; - interrupts = <7>; - clocks = <&v2m_clk24mhz>, <&smbclk>; - clock-names = "uartclk", "apb_pclk"; - }; - - v2m_serial3: uart@0c0000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x0c0000 0x1000>; - interrupts = <8>; - clocks = <&v2m_clk24mhz>, <&smbclk>; - clock-names = "uartclk", "apb_pclk"; - }; - - wdt@0f0000 { - compatible = "arm,sp805", "arm,primecell"; - reg = <0x0f0000 0x1000>; - interrupts = <0>; - clocks = <&v2m_refclk32khz>, <&smbclk>; - clock-names = "wdogclk", "apb_pclk"; - }; - - v2m_timer01: timer@110000 { - compatible = "arm,sp804", "arm,primecell"; - reg = <0x110000 0x1000>; - interrupts = <2>; - clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&smbclk>; - clock-names = "timclken1", "timclken2", "apb_pclk"; - }; - - v2m_timer23: timer@120000 { - compatible = "arm,sp804", "arm,primecell"; - reg = <0x120000 0x1000>; - interrupts = <3>; - clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&smbclk>; - clock-names = "timclken1", "timclken2", "apb_pclk"; - }; - - rtc@170000 { - compatible = "arm,pl031", "arm,primecell"; - reg = <0x170000 0x1000>; - interrupts = <4>; - clocks = <&smbclk>; - clock-names = "apb_pclk"; - }; - - clcd@1f0000 { - compatible = "arm,pl111", "arm,primecell"; - reg = <0x1f0000 0x1000>; - interrupts = <14>; - clocks = <&v2m_oscclk1>, <&smbclk>; - clock-names = "v2m:oscclk1", "apb_pclk"; - mode = "VGA"; - use_dma = <0>; - framebuffer = <0x18000000 0x00180000>; - }; - - virtio_block@0130000 { - compatible = "virtio,mmio"; - reg = <0x130000 0x200>; - interrupts = <42>; - }; - - }; - - v2m_fixed_3v3: fixedregulator@0 { - compatible = "regulator-fixed"; - regulator-name = "3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - v2m_clk24mhz: clk24mhz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <24000000>; - clock-output-names = "v2m:clk24mhz"; - }; - - v2m_refclk1mhz: refclk1mhz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <1000000>; - clock-output-names = "v2m:refclk1mhz"; - }; - - v2m_refclk32khz: refclk32khz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <32768>; - clock-output-names = "v2m:refclk32khz"; - }; - - mcc { - compatible = "simple-bus"; - arm,vexpress,config-bridge = <&v2m_sysreg>; - - v2m_oscclk1: osc@1 { - /* CLCD clock */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 1>; - freq-range = <23750000 63500000>; - #clock-cells = <0>; - clock-output-names = "v2m:oscclk1"; - }; - - muxfpga@0 { - compatible = "arm,vexpress-muxfpga"; - arm,vexpress-sysreg,func = <7 0>; - }; - - shutdown@0 { - compatible = "arm,vexpress-shutdown"; - arm,vexpress-sysreg,func = <8 0>; - }; - }; - }; diff --git a/arch/arm/boot/dts/rtsm_ve-v2p-ca15x1-ca7x1.dts b/arch/arm/boot/dts/rtsm_ve-v2p-ca15x1-ca7x1.dts deleted file mode 100644 index fe8cf5dc8570..000000000000 --- a/arch/arm/boot/dts/rtsm_ve-v2p-ca15x1-ca7x1.dts +++ /dev/null @@ -1,244 +0,0 @@ -/* - * ARM Ltd. Fast Models - * - * Versatile Express (VE) system model - * ARMCortexA15x4CT - * ARMCortexA7x4CT - * RTSM_VE_Cortex_A15x1_A7x1.lisa - */ - -/dts-v1/; - -/memreserve/ 0xff000000 0x01000000; - -/ { - model = "RTSM_VE_CortexA15x1-A7x1"; - arm,vexpress,site = <0xf>; - compatible = "arm,rtsm_ve,cortex_a15x1_a7x1", "arm,vexpress"; - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - - chosen { }; - - aliases { - serial0 = &v2m_serial0; - serial1 = &v2m_serial1; - serial2 = &v2m_serial2; - serial3 = &v2m_serial3; - }; - - clusters { - #address-cells = <1>; - #size-cells = <0>; - - cluster0: cluster@0 { - reg = <0>; -// freqs = <500000000 600000000 700000000 800000000 900000000 1000000000 1100000000 1200000000>; - cores { - #address-cells = <1>; - #size-cells = <0>; - - core0: core@0 { - reg = <0>; - }; - - }; - }; - - cluster1: cluster@1 { - reg = <1>; -// freqs = <350000000 400000000 500000000 600000000 700000000 800000000 900000000 1000000000>; - cores { - #address-cells = <1>; - #size-cells = <0>; - - core1: core@0 { - reg = <0>; - }; - - }; - }; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0>; - cluster = <&cluster0>; - core = <&core0>; -// clock-frequency = <1000000000>; - cci-control-port = <&cci_control1>; - }; - - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x100>; - cluster = <&cluster1>; - core = <&core1>; -// clock-frequency = <800000000>; - cci-control-port = <&cci_control2>; - }; - }; - - memory@80000000 { - device_type = "memory"; - reg = <0 0x80000000 0 0x80000000>; - }; - - cci@2c090000 { - compatible = "arm,cci-400", "arm,cci"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0 0x2c090000 0 0x1000>; - ranges = <0x0 0x0 0x2c090000 0x10000>; - - cci_control1: slave-if@4000 { - compatible = "arm,cci-400-ctrl-if"; - interface-type = "ace"; - reg = <0x4000 0x1000>; - }; - - cci_control2: slave-if@5000 { - compatible = "arm,cci-400-ctrl-if"; - interface-type = "ace"; - reg = <0x5000 0x1000>; - }; - }; - - dcscb@60000000 { - compatible = "arm,rtsm,dcscb"; - reg = <0 0x60000000 0 0x1000>; - }; - - gic: interrupt-controller@2c001000 { - compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0 0x2c001000 0 0x1000>, - <0 0x2c002000 0 0x1000>, - <0 0x2c004000 0 0x2000>, - <0 0x2c006000 0 0x2000>; - interrupts = <1 9 0xf04>; - - gic-cpuif@0 { - compatible = "arm,gic-cpuif"; - cpuif-id = <0>; - cpu = <&cpu0>; - }; - gic-cpuif@1 { - compatible = "arm,gic-cpuif"; - cpuif-id = <1>; - cpu = <&cpu1>; - }; - }; - - timer { - compatible = "arm,armv7-timer"; - interrupts = <1 13 0xf08>, - <1 14 0xf08>, - <1 11 0xf08>, - <1 10 0xf08>; - }; - - dcc { - compatible = "arm,vexpress,config-bus"; - arm,vexpress,config-bridge = <&v2m_sysreg>; - - osc@0 { - /* ACLK clock to the AXI master port on the test chip */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 0>; - freq-range = <30000000 50000000>; - #clock-cells = <0>; - clock-output-names = "extsaxiclk"; - }; - - oscclk1: osc@1 { - /* Reference clock for the CLCD */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 1>; - freq-range = <10000000 80000000>; - #clock-cells = <0>; - clock-output-names = "clcdclk"; - }; - - smbclk: oscclk2: osc@2 { - /* Reference clock for the test chip internal PLLs */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 2>; - freq-range = <33000000 100000000>; - #clock-cells = <0>; - clock-output-names = "tcrefclk"; - }; - }; - - smb { - compatible = "simple-bus"; - - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0 0x08000000 0x04000000>, - <1 0 0 0x14000000 0x04000000>, - <2 0 0 0x18000000 0x04000000>, - <3 0 0 0x1c000000 0x04000000>, - <4 0 0 0x0c000000 0x04000000>, - <5 0 0 0x10000000 0x04000000>; - - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 63>; - interrupt-map = <0 0 0 &gic 0 0 4>, - <0 0 1 &gic 0 1 4>, - <0 0 2 &gic 0 2 4>, - <0 0 3 &gic 0 3 4>, - <0 0 4 &gic 0 4 4>, - <0 0 5 &gic 0 5 4>, - <0 0 6 &gic 0 6 4>, - <0 0 7 &gic 0 7 4>, - <0 0 8 &gic 0 8 4>, - <0 0 9 &gic 0 9 4>, - <0 0 10 &gic 0 10 4>, - <0 0 11 &gic 0 11 4>, - <0 0 12 &gic 0 12 4>, - <0 0 13 &gic 0 13 4>, - <0 0 14 &gic 0 14 4>, - <0 0 15 &gic 0 15 4>, - <0 0 16 &gic 0 16 4>, - <0 0 17 &gic 0 17 4>, - <0 0 18 &gic 0 18 4>, - <0 0 19 &gic 0 19 4>, - <0 0 20 &gic 0 20 4>, - <0 0 21 &gic 0 21 4>, - <0 0 22 &gic 0 22 4>, - <0 0 23 &gic 0 23 4>, - <0 0 24 &gic 0 24 4>, - <0 0 25 &gic 0 25 4>, - <0 0 26 &gic 0 26 4>, - <0 0 27 &gic 0 27 4>, - <0 0 28 &gic 0 28 4>, - <0 0 29 &gic 0 29 4>, - <0 0 30 &gic 0 30 4>, - <0 0 31 &gic 0 31 4>, - <0 0 32 &gic 0 32 4>, - <0 0 33 &gic 0 33 4>, - <0 0 34 &gic 0 34 4>, - <0 0 35 &gic 0 35 4>, - <0 0 36 &gic 0 36 4>, - <0 0 37 &gic 0 37 4>, - <0 0 38 &gic 0 38 4>, - <0 0 39 &gic 0 39 4>, - <0 0 40 &gic 0 40 4>, - <0 0 41 &gic 0 41 4>, - <0 0 42 &gic 0 42 4>; - - /include/ "rtsm_ve-motherboard.dtsi" - }; -}; - -/include/ "clcd-panels.dtsi" diff --git a/arch/arm/boot/dts/rtsm_ve-v2p-ca15x4-ca7x4.dts b/arch/arm/boot/dts/rtsm_ve-v2p-ca15x4-ca7x4.dts deleted file mode 100644 index f715285131d8..000000000000 --- a/arch/arm/boot/dts/rtsm_ve-v2p-ca15x4-ca7x4.dts +++ /dev/null @@ -1,358 +0,0 @@ -/* - * ARM Ltd. Fast Models - * - * Versatile Express (VE) system model - * ARMCortexA15x4CT - * ARMCortexA7x4CT - * RTSM_VE_Cortex_A15x4_A7x4.lisa - */ - -/dts-v1/; - -/memreserve/ 0xff000000 0x01000000; - -/ { - model = "RTSM_VE_CortexA15x4-A7x4"; - arm,vexpress,site = <0xf>; - compatible = "arm,rtsm_ve,cortex_a15x4_a7x4", "arm,vexpress"; - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - - chosen { }; - - aliases { - serial0 = &v2m_serial0; - serial1 = &v2m_serial1; - serial2 = &v2m_serial2; - serial3 = &v2m_serial3; - }; - - clusters { - #address-cells = <1>; - #size-cells = <0>; - - cluster0: cluster@0 { - reg = <0>; -// freqs = <500000000 600000000 700000000 800000000 900000000 1000000000 1100000000 1200000000>; - cores { - #address-cells = <1>; - #size-cells = <0>; - - core0: core@0 { - reg = <0>; - }; - - core1: core@1 { - reg = <1>; - }; - - core2: core@2 { - reg = <2>; - }; - - core3: core@3 { - reg = <3>; - }; - - }; - }; - - cluster1: cluster@1 { - reg = <1>; -// freqs = <350000000 400000000 500000000 600000000 700000000 800000000 900000000 1000000000>; - cores { - #address-cells = <1>; - #size-cells = <0>; - - core4: core@0 { - reg = <0>; - }; - - core5: core@1 { - reg = <1>; - }; - - core6: core@2 { - reg = <2>; - }; - - core7: core@3 { - reg = <3>; - }; - - }; - }; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0>; - cluster = <&cluster0>; - core = <&core0>; -// clock-frequency = <1000000000>; - cci-control-port = <&cci_control1>; - }; - - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <1>; - cluster = <&cluster0>; - core = <&core1>; -// clock-frequency = <1000000000>; - cci-control-port = <&cci_control1>; - }; - - cpu2: cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <2>; - cluster = <&cluster0>; - core = <&core2>; -// clock-frequency = <1000000000>; - cci-control-port = <&cci_control1>; - }; - - cpu3: cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <3>; - cluster = <&cluster0>; - core = <&core3>; -// clock-frequency = <1000000000>; - cci-control-port = <&cci_control1>; - }; - - cpu4: cpu@4 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x100>; - cluster = <&cluster1>; - core = <&core4>; -// clock-frequency = <800000000>; - cci-control-port = <&cci_control2>; - }; - - cpu5: cpu@5 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x101>; - cluster = <&cluster1>; - core = <&core5>; -// clock-frequency = <800000000>; - cci-control-port = <&cci_control2>; - }; - - cpu6: cpu@6 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x102>; - cluster = <&cluster1>; - core = <&core6>; -// clock-frequency = <800000000>; - cci-control-port = <&cci_control2>; - }; - - cpu7: cpu@7 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x103>; - cluster = <&cluster1>; - core = <&core7>; -// clock-frequency = <800000000>; - cci-control-port = <&cci_control2>; - }; - }; - - memory@80000000 { - device_type = "memory"; - reg = <0 0x80000000 0 0x80000000>; - }; - - cci@2c090000 { - compatible = "arm,cci-400", "arm,cci"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0 0x2c090000 0 0x1000>; - ranges = <0x0 0x0 0x2c090000 0x10000>; - - cci_control1: slave-if@4000 { - compatible = "arm,cci-400-ctrl-if"; - interface-type = "ace"; - reg = <0x4000 0x1000>; - }; - - cci_control2: slave-if@5000 { - compatible = "arm,cci-400-ctrl-if"; - interface-type = "ace"; - reg = <0x5000 0x1000>; - }; - }; - - dcscb@60000000 { - compatible = "arm,rtsm,dcscb"; - reg = <0 0x60000000 0 0x1000>; - }; - - gic: interrupt-controller@2c001000 { - compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0 0x2c001000 0 0x1000>, - <0 0x2c002000 0 0x1000>, - <0 0x2c004000 0 0x2000>, - <0 0x2c006000 0 0x2000>; - interrupts = <1 9 0xf04>; - - gic-cpuif@0 { - compatible = "arm,gic-cpuif"; - cpuif-id = <0>; - cpu = <&cpu0>; - }; - gic-cpuif@1 { - compatible = "arm,gic-cpuif"; - cpuif-id = <1>; - cpu = <&cpu1>; - }; - gic-cpuif@2 { - compatible = "arm,gic-cpuif"; - cpuif-id = <2>; - cpu = <&cpu2>; - }; - gic-cpuif@3 { - compatible = "arm,gic-cpuif"; - cpuif-id = <3>; - cpu = <&cpu3>; - }; - gic-cpuif@4 { - compatible = "arm,gic-cpuif"; - cpuif-id = <4>; - cpu = <&cpu4>; - }; - gic-cpuif@5 { - compatible = "arm,gic-cpuif"; - cpuif-id = <5>; - cpu = <&cpu5>; - }; - gic-cpuif@6 { - compatible = "arm,gic-cpuif"; - cpuif-id = <6>; - cpu = <&cpu6>; - }; - gic-cpuif@7 { - compatible = "arm,gic-cpuif"; - cpuif-id = <7>; - cpu = <&cpu7>; - }; - }; - - timer { - compatible = "arm,armv7-timer"; - interrupts = <1 13 0xf08>, - <1 14 0xf08>, - <1 11 0xf08>, - <1 10 0xf08>; - }; - - dcc { - compatible = "arm,vexpress,config-bus"; - arm,vexpress,config-bridge = <&v2m_sysreg>; - - osc@0 { - /* ACLK clock to the AXI master port on the test chip */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 0>; - freq-range = <30000000 50000000>; - #clock-cells = <0>; - clock-output-names = "extsaxiclk"; - }; - - oscclk1: osc@1 { - /* Reference clock for the CLCD */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 1>; - freq-range = <10000000 80000000>; - #clock-cells = <0>; - clock-output-names = "clcdclk"; - }; - - smbclk: oscclk2: osc@2 { - /* Reference clock for the test chip internal PLLs */ - compatible = "arm,vexpress-osc"; - arm,vexpress-sysreg,func = <1 2>; - freq-range = <33000000 100000000>; - #clock-cells = <0>; - clock-output-names = "tcrefclk"; - }; - }; - - smb { - compatible = "simple-bus"; - - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0 0x08000000 0x04000000>, - <1 0 0 0x14000000 0x04000000>, - <2 0 0 0x18000000 0x04000000>, - <3 0 0 0x1c000000 0x04000000>, - <4 0 0 0x0c000000 0x04000000>, - <5 0 0 0x10000000 0x04000000>; - - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 63>; - interrupt-map = <0 0 0 &gic 0 0 4>, - <0 0 1 &gic 0 1 4>, - <0 0 2 &gic 0 2 4>, - <0 0 3 &gic 0 3 4>, - <0 0 4 &gic 0 4 4>, - <0 0 5 &gic 0 5 4>, - <0 0 6 &gic 0 6 4>, - <0 0 7 &gic 0 7 4>, - <0 0 8 &gic 0 8 4>, - <0 0 9 &gic 0 9 4>, - <0 0 10 &gic 0 10 4>, - <0 0 11 &gic 0 11 4>, - <0 0 12 &gic 0 12 4>, - <0 0 13 &gic 0 13 4>, - <0 0 14 &gic 0 14 4>, - <0 0 15 &gic 0 15 4>, - <0 0 16 &gic 0 16 4>, - <0 0 17 &gic 0 17 4>, - <0 0 18 &gic 0 18 4>, - <0 0 19 &gic 0 19 4>, - <0 0 20 &gic 0 20 4>, - <0 0 21 &gic 0 21 4>, - <0 0 22 &gic 0 22 4>, - <0 0 23 &gic 0 23 4>, - <0 0 24 &gic 0 24 4>, - <0 0 25 &gic 0 25 4>, - <0 0 26 &gic 0 26 4>, - <0 0 27 &gic 0 27 4>, - <0 0 28 &gic 0 28 4>, - <0 0 29 &gic 0 29 4>, - <0 0 30 &gic 0 30 4>, - <0 0 31 &gic 0 31 4>, - <0 0 32 &gic 0 32 4>, - <0 0 33 &gic 0 33 4>, - <0 0 34 &gic 0 34 4>, - <0 0 35 &gic 0 35 4>, - <0 0 36 &gic 0 36 4>, - <0 0 37 &gic 0 37 4>, - <0 0 38 &gic 0 38 4>, - <0 0 39 &gic 0 39 4>, - <0 0 40 &gic 0 40 4>, - <0 0 41 &gic 0 41 4>, - <0 0 42 &gic 0 42 4>; - - /include/ "rtsm_ve-motherboard.dtsi" - }; -}; - -/include/ "clcd-panels.dtsi" diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi index 642775d7ca67..5000e0d42849 100644 --- a/arch/arm/boot/dts/sama5d3.dtsi +++ b/arch/arm/boot/dts/sama5d3.dtsi @@ -35,12 +35,8 @@ ssc1 = &ssc1; }; cpus { - #address-cells = <1>; - #size-cells = <0>; cpu@0 { - device_type = "cpu"; compatible = "arm,cortex-a5"; - reg = <0x0>; }; }; diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index 06ef8b625dba..e7ef619a70a2 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -16,12 +16,8 @@ interrupt-parent = <&intc>; cpus { - #address-cells = <1>; - #size-cells = <0>; cpu@0 { - device_type = "cpu"; compatible = "arm,cortex-a8"; - reg = <0x0>; }; }; diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi index d2852547b572..31fa38f8cc98 100644 --- a/arch/arm/boot/dts/sun5i-a13.dtsi +++ b/arch/arm/boot/dts/sun5i-a13.dtsi @@ -17,12 +17,8 @@ interrupt-parent = <&intc>; cpus { - #address-cells = <1>; - #size-cells = <0>; cpu@0 { - device_type = "cpu"; compatible = "arm,cortex-a8"; - reg = <0x0>; }; }; diff --git a/arch/arm/boot/dts/testcases/tests-phandle.dtsi b/arch/arm/boot/dts/testcases/tests-phandle.dtsi index 788a4c24b8f5..0007d3cd7dc2 100644 --- a/arch/arm/boot/dts/testcases/tests-phandle.dtsi +++ b/arch/arm/boot/dts/testcases/tests-phandle.dtsi @@ -1,9 +1,6 @@ / { testcase-data { - security-password = "password"; - duplicate-name = "duplicate"; - duplicate-name { }; phandle-tests { provider0: provider0 { #phandle-cells = <0>; diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi index 9584232ee6b6..ac870fb3fa0d 100644 --- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi +++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi @@ -228,7 +228,6 @@ }; clcd@1f0000 { - status = "disabled"; compatible = "arm,pl111", "arm,primecell"; reg = <0x1f0000 0x1000>; interrupts = <14>; diff --git a/arch/arm/boot/dts/vexpress-v2m.dtsi b/arch/arm/boot/dts/vexpress-v2m.dtsi index 6593398c11ae..f1420368355b 100644 --- a/arch/arm/boot/dts/vexpress-v2m.dtsi +++ b/arch/arm/boot/dts/vexpress-v2m.dtsi @@ -227,7 +227,6 @@ }; clcd@1f000 { - status = "disabled"; compatible = "arm,pl111", "arm,primecell"; reg = <0x1f000 0x1000>; interrupts = <14>; diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts index cc6a8c0cfe33..9420053acc14 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts @@ -9,8 +9,6 @@ /dts-v1/; -/memreserve/ 0xbf000000 0x01000000; - / { model = "V2P-CA15"; arm,hbi = <0x237>; @@ -59,8 +57,6 @@ interrupts = <0 85 4>; clocks = <&oscclk5>; clock-names = "pxlclk"; - mode = "1024x768-16@60"; - framebuffer = <0 0xff000000 0 0x01000000>; }; memory-controller@2b0a0000 { diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts index f1dc620c5c45..d2803be4e1a8 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts @@ -9,13 +9,11 @@ /dts-v1/; -/memreserve/ 0xff000000 0x01000000; - / { model = "V2P-CA15_CA7"; arm,hbi = <0x249>; arm,vexpress,site = <0xf>; - compatible = "arm,vexpress,v2p-ca15_a7", "arm,vexpress", "arm,generic"; + compatible = "arm,vexpress,v2p-ca15_a7", "arm,vexpress"; interrupt-parent = <&gic>; #address-cells = <2>; #size-cells = <2>; @@ -31,106 +29,44 @@ i2c1 = &v2m_i2c_pcie; }; - clusters { + cpus { #address-cells = <1>; #size-cells = <0>; - cluster0: cluster@0 { + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; reg = <0>; - cores { - #address-cells = <1>; - #size-cells = <0>; - - core0: core@0 { - reg = <0>; - }; - - core1: core@1 { - reg = <1>; - }; - - }; }; - cluster1: cluster@1 { + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; reg = <1>; - cores { - #address-cells = <1>; - #size-cells = <0>; - - core2: core@0 { - reg = <0>; - }; - - core3: core@1 { - reg = <1>; - }; - - core4: core@2 { - reg = <2>; - }; - }; }; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; cpu2: cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x100>; - cluster = <&cluster1>; - core = <&core2>; - clock-frequency = <800000000>; - cci-control-port = <&cci_control2>; }; cpu3: cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x101>; - cluster = <&cluster1>; - core = <&core3>; - clock-frequency = <800000000>; - cci-control-port = <&cci_control2>; }; cpu4: cpu@4 { device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x102>; - cluster = <&cluster1>; - core = <&core4>; - clock-frequency = <800000000>; - cci-control-port = <&cci_control2>; - }; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0>; - cluster = <&cluster0>; - core = <&core0>; - clock-frequency = <1000000000>; - cci-control-port = <&cci_control1>; - }; - - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <1>; - cluster = <&cluster0>; - core = <&core1>; - clock-frequency = <1000000000>; - cci-control-port = <&cci_control1>; }; }; memory@80000000 { device_type = "memory"; - reg = <0 0x80000000 0 0x80000000>; + reg = <0 0x80000000 0 0x40000000>; }; wdt@2a490000 { @@ -145,8 +81,6 @@ compatible = "arm,hdlcd"; reg = <0 0x2b000000 0 0x1000>; interrupts = <0 85 4>; - mode = "1024x768-16@60"; - framebuffer = <0 0xff000000 0 0x01000000>; clocks = <&oscclk5>; clock-names = "pxlclk"; }; @@ -168,64 +102,6 @@ <0 0x2c004000 0 0x2000>, <0 0x2c006000 0 0x2000>; interrupts = <1 9 0xf04>; - - gic-cpuif@0 { - compatible = "arm,gic-cpuif"; - cpuif-id = <0>; - cpu = <&cpu0>; - }; - gic-cpuif@1 { - compatible = "arm,gic-cpuif"; - cpuif-id = <1>; - cpu = <&cpu1>; - }; - gic-cpuif@2 { - compatible = "arm,gic-cpuif"; - cpuif-id = <2>; - cpu = <&cpu2>; - }; - - gic-cpuif@3 { - compatible = "arm,gic-cpuif"; - cpuif-id = <3>; - cpu = <&cpu3>; - }; - - gic-cpuif@4 { - compatible = "arm,gic-cpuif"; - cpuif-id = <4>; - cpu = <&cpu4>; - }; - }; - - cci@2c090000 { - compatible = "arm,cci-400"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0 0x2c090000 0 0x1000>; - ranges = <0x0 0x0 0x2c090000 0x10000>; - - cci_control1: slave-if@4000 { - compatible = "arm,cci-400-ctrl-if"; - interface-type = "ace"; - reg = <0x4000 0x1000>; - }; - - cci_control2: slave-if@5000 { - compatible = "arm,cci-400-ctrl-if"; - interface-type = "ace"; - reg = <0x5000 0x1000>; - }; - }; - - cci-pmu@2c099000 { - compatible = "arm,cci-400-pmu"; - reg = <0 0x2c099000 0 0x6000>; - interrupts = <0 101 4>, - <0 102 4>, - <0 103 4>, - <0 104 4>, - <0 105 4>; }; memory-controller@7ffd0000 { @@ -249,12 +125,6 @@ clock-names = "apb_pclk"; }; - spc@7fff0000 { - compatible = "arm,vexpress-spc,v2p-ca15_a7","arm,vexpress-spc"; - reg = <0 0x7fff0000 0 0x1000>; - interrupts = <0 95 4>; - }; - timer { compatible = "arm,armv7-timer"; interrupts = <1 13 0xf08>, @@ -263,21 +133,12 @@ <1 10 0xf08>; }; - pmu_a15 { + pmu { compatible = "arm,cortex-a15-pmu"; - cluster = <&cluster0>; interrupts = <0 68 4>, <0 69 4>; }; - pmu_a7 { - compatible = "arm,cortex-a7-pmu"; - cluster = <&cluster1>; - interrupts = <0 128 4>, - <0 129 4>, - <0 130 4>; - }; - oscclk6a: oscclk6a { /* Reference 24MHz clock */ compatible = "fixed-clock"; @@ -286,15 +147,6 @@ clock-output-names = "oscclk6a"; }; - psci { - compatible = "arm,psci"; - method = "smc"; - cpu_suspend = <0x80100001>; - cpu_off = <0x80100002>; - cpu_on = <0x80100003>; - migrate = <0x80100004>; - }; - dcc { compatible = "arm,vexpress,config-bus"; arm,vexpress,config-bridge = <&v2m_sysreg>; diff --git a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts index cf633ed6a1b4..c544a5504591 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts @@ -9,8 +9,6 @@ /dts-v1/; -/memreserve/ 0xbf000000 0x01000000; - / { model = "V2P-CA5s"; arm,hbi = <0x225>; @@ -61,8 +59,6 @@ interrupts = <0 85 4>; clocks = <&oscclk3>; clock-names = "pxlclk"; - mode = "640x480-16@60"; - framebuffer = <0xbf000000 0x01000000>; }; memory-controller@2a150000 { diff --git a/arch/arm/boot/dts/vexpress-v2p-ca9.dts b/arch/arm/boot/dts/vexpress-v2p-ca9.dts index f83706bd3f9a..62d9b225dcce 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca9.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca9.dts @@ -9,8 +9,6 @@ /dts-v1/; -/include/ "clcd-panels.dtsi" - / { model = "V2P-CA9"; arm,hbi = <0x191>; @@ -75,8 +73,6 @@ interrupts = <0 44 4>; clocks = <&oscclk1>, <&oscclk2>; clock-names = "clcdclk", "apb_pclk"; - mode = "XVGA"; - use_dma = <1>; }; memory-controller@100e0000 { diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig index ce01364a96e3..9353184d730d 100644 --- a/arch/arm/common/Kconfig +++ b/arch/arm/common/Kconfig @@ -17,7 +17,3 @@ config SHARP_PARAM config SHARP_SCOOP bool - -config FIQ_GLUE - bool - select FIQ diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile index 505c479202b6..48434cbe3e89 100644 --- a/arch/arm/common/Makefile +++ b/arch/arm/common/Makefile @@ -4,7 +4,6 @@ obj-y += firmware.o -obj-$(CONFIG_FIQ_GLUE) += fiq_glue.o fiq_glue_setup.o obj-$(CONFIG_ICST) += icst.o obj-$(CONFIG_SA1111) += sa1111.o obj-$(CONFIG_PCI_HOST_VIA82C505) += via82c505.o @@ -15,9 +14,5 @@ obj-$(CONFIG_SHARP_SCOOP) += scoop.o obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o obj-$(CONFIG_ARM_TIMER_SP804) += timer-sp.o obj-$(CONFIG_MCPM) += mcpm_head.o mcpm_entry.o mcpm_platsmp.o vlock.o -obj-$(CONFIG_BL_SWITCHER) += bL_switcher.o -obj-$(CONFIG_BL_SWITCHER_DUMMY_IF) += bL_switcher_dummy_if.o - AFLAGS_mcpm_head.o := -march=armv7-a AFLAGS_vlock.o := -march=armv7-a -CFLAGS_REMOVE_mcpm_entry.o = -pg diff --git a/arch/arm/common/bL_switcher.c b/arch/arm/common/bL_switcher.c deleted file mode 100644 index 8fee70dfb302..000000000000 --- a/arch/arm/common/bL_switcher.c +++ /dev/null @@ -1,864 +0,0 @@ -/* - * arch/arm/common/bL_switcher.c -- big.LITTLE cluster switcher core driver - * - * Created by: Nicolas Pitre, March 2012 - * Copyright: (C) 2012 Linaro Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#define CREATE_TRACE_POINTS -#include - - -/* - * Use our own MPIDR accessors as the generic ones in asm/cputype.h have - * __attribute_const__ and we don't want the compiler to assume any - * constness here as the value _does_ change along some code paths. - */ - -static int read_mpidr(void) -{ - unsigned int id; - asm volatile ("mrc\tp15, 0, %0, c0, c0, 5" : "=r" (id)); - return id & MPIDR_HWID_BITMASK; -} - -/* - * Get a global nanosecond time stamp for tracing. - */ -static s64 get_ns(void) -{ - struct timespec ts; - getnstimeofday(&ts); - return timespec_to_ns(&ts); -} - -/* - * bL switcher core code. - */ - -static void bL_do_switch(void *_arg) -{ - unsigned ib_mpidr, ib_cpu, ib_cluster; - long volatile handshake, **handshake_ptr = _arg; - - pr_debug("%s\n", __func__); - - ib_mpidr = cpu_logical_map(smp_processor_id()); - ib_cpu = MPIDR_AFFINITY_LEVEL(ib_mpidr, 0); - ib_cluster = MPIDR_AFFINITY_LEVEL(ib_mpidr, 1); - - /* Advertise our handshake location */ - if (handshake_ptr) { - handshake = 0; - *handshake_ptr = &handshake; - } else - handshake = -1; - - /* - * Our state has been saved at this point. Let's release our - * inbound CPU. - */ - mcpm_set_entry_vector(ib_cpu, ib_cluster, cpu_resume); - sev(); - - /* - * From this point, we must assume that our counterpart CPU might - * have taken over in its parallel world already, as if execution - * just returned from cpu_suspend(). It is therefore important to - * be very careful not to make any change the other guy is not - * expecting. This is why we need stack isolation. - * - * Fancy under cover tasks could be performed here. For now - * we have none. - */ - - /* - * Let's wait until our inbound is alive. - */ - while (!handshake) { - wfe(); - smp_mb(); - } - - /* Let's put ourself down. */ - mcpm_cpu_power_down(); - - /* should never get here */ - BUG(); -} - -/* - * Stack isolation. To ensure 'current' remains valid, we just use another - * piece of our thread's stack space which should be fairly lightly used. - * The selected area starts just above the thread_info structure located - * at the very bottom of the stack, aligned to a cache line, and indexed - * with the cluster number. - */ -#define STACK_SIZE 512 -extern void call_with_stack(void (*fn)(void *), void *arg, void *sp); -static int bL_switchpoint(unsigned long _arg) -{ - unsigned int mpidr = read_mpidr(); - unsigned int clusterid = MPIDR_AFFINITY_LEVEL(mpidr, 1); - void *stack = current_thread_info() + 1; - stack = PTR_ALIGN(stack, L1_CACHE_BYTES); - stack += clusterid * STACK_SIZE + STACK_SIZE; - call_with_stack(bL_do_switch, (void *)_arg, stack); - BUG(); -} - -/* - * Generic switcher interface - */ - -static unsigned int bL_gic_id[MAX_CPUS_PER_CLUSTER][MAX_NR_CLUSTERS]; -static int bL_switcher_cpu_pairing[NR_CPUS]; - -/* - * bL_switch_to - Switch to a specific cluster for the current CPU - * @new_cluster_id: the ID of the cluster to switch to. - * - * This function must be called on the CPU to be switched. - * Returns 0 on success, else a negative status code. - */ -static int bL_switch_to(unsigned int new_cluster_id) -{ - unsigned int mpidr, this_cpu, that_cpu; - unsigned int ob_mpidr, ob_cpu, ob_cluster, ib_mpidr, ib_cpu, ib_cluster; - struct completion inbound_alive; - struct tick_device *tdev; - enum clock_event_mode tdev_mode; - long volatile *handshake_ptr; - int ipi_nr, ret; - - this_cpu = smp_processor_id(); - ob_mpidr = read_mpidr(); - ob_cpu = MPIDR_AFFINITY_LEVEL(ob_mpidr, 0); - ob_cluster = MPIDR_AFFINITY_LEVEL(ob_mpidr, 1); - BUG_ON(cpu_logical_map(this_cpu) != ob_mpidr); - - if (new_cluster_id == ob_cluster) - return 0; - - that_cpu = bL_switcher_cpu_pairing[this_cpu]; - ib_mpidr = cpu_logical_map(that_cpu); - ib_cpu = MPIDR_AFFINITY_LEVEL(ib_mpidr, 0); - ib_cluster = MPIDR_AFFINITY_LEVEL(ib_mpidr, 1); - - pr_debug("before switch: CPU %d MPIDR %#x -> %#x\n", - this_cpu, ob_mpidr, ib_mpidr); - - this_cpu = smp_processor_id(); - - /* Close the gate for our entry vectors */ - mcpm_set_entry_vector(ob_cpu, ob_cluster, NULL); - mcpm_set_entry_vector(ib_cpu, ib_cluster, NULL); - - /* Install our "inbound alive" notifier. */ - init_completion(&inbound_alive); - ipi_nr = register_ipi_completion(&inbound_alive, this_cpu); - ipi_nr |= ((1 << 16) << bL_gic_id[ob_cpu][ob_cluster]); - mcpm_set_early_poke(ib_cpu, ib_cluster, gic_get_sgir_physaddr(), ipi_nr); - - /* - * Let's wake up the inbound CPU now in case it requires some delay - * to come online, but leave it gated in our entry vector code. - */ - ret = mcpm_cpu_power_up(ib_cpu, ib_cluster); - if (ret) { - pr_err("%s: mcpm_cpu_power_up() returned %d\n", __func__, ret); - return ret; - } - - /* - * Raise a SGI on the inbound CPU to make sure it doesn't stall - * in a possible WFI, such as in bL_power_down(). - */ - gic_send_sgi(bL_gic_id[ib_cpu][ib_cluster], 0); - - /* - * Wait for the inbound to come up. This allows for other - * tasks to be scheduled in the mean time. - */ - wait_for_completion(&inbound_alive); - mcpm_set_early_poke(ib_cpu, ib_cluster, 0, 0); - - /* - * From this point we are entering the switch critical zone - * and can't sleep/schedule anymore. - */ - local_irq_disable(); - local_fiq_disable(); - trace_cpu_migrate_begin(get_ns(), ob_mpidr); - - /* redirect GIC's SGIs to our counterpart */ - gic_migrate_target(bL_gic_id[ib_cpu][ib_cluster]); - - tdev = tick_get_device(this_cpu); - if (tdev && !cpumask_equal(tdev->evtdev->cpumask, cpumask_of(this_cpu))) - tdev = NULL; - if (tdev) { - tdev_mode = tdev->evtdev->mode; - clockevents_set_mode(tdev->evtdev, CLOCK_EVT_MODE_SHUTDOWN); - } - - ret = cpu_pm_enter(); - - /* we can not tolerate errors at this point */ - if (ret) - panic("%s: cpu_pm_enter() returned %d\n", __func__, ret); - - /* - * Swap the physical CPUs in the logical map for this logical CPU. - * This must be flushed to RAM as the resume code - * needs to access it while the caches are still disabled. - */ - cpu_logical_map(this_cpu) = ib_mpidr; - cpu_logical_map(that_cpu) = ob_mpidr; - sync_cache_w(&cpu_logical_map(this_cpu)); - - /* Let's do the actual CPU switch. */ - ret = cpu_suspend((unsigned long)&handshake_ptr, bL_switchpoint); - if (ret > 0) - panic("%s: cpu_suspend() returned %d\n", __func__, ret); - - /* We are executing on the inbound CPU at this point */ - mpidr = read_mpidr(); - pr_debug("after switch: CPU %d MPIDR %#x\n", this_cpu, mpidr); - BUG_ON(mpidr != ib_mpidr); - - mcpm_cpu_powered_up(); - - ret = cpu_pm_exit(); - - if (tdev) { - clockevents_set_mode(tdev->evtdev, tdev_mode); - clockevents_program_event(tdev->evtdev, - tdev->evtdev->next_event, 1); - } - - trace_cpu_migrate_finish(get_ns(), ib_mpidr); - local_fiq_enable(); - local_irq_enable(); - - *handshake_ptr = 1; - dsb_sev(); - - if (ret) - pr_err("%s exiting with error %d\n", __func__, ret); - return ret; -} - -struct bL_thread { - spinlock_t lock; - struct task_struct *task; - wait_queue_head_t wq; - int wanted_cluster; - struct completion started; - bL_switch_completion_handler completer; - void *completer_cookie; -}; - -static struct bL_thread bL_threads[NR_CPUS]; - -static int bL_switcher_thread(void *arg) -{ - struct bL_thread *t = arg; - struct sched_param param = { .sched_priority = 1 }; - int cluster; - bL_switch_completion_handler completer; - void *completer_cookie; - - sched_setscheduler_nocheck(current, SCHED_FIFO, ¶m); - complete(&t->started); - - do { - if (signal_pending(current)) - flush_signals(current); - wait_event_interruptible(t->wq, - t->wanted_cluster != -1 || - kthread_should_stop()); - - spin_lock(&t->lock); - cluster = t->wanted_cluster; - completer = t->completer; - completer_cookie = t->completer_cookie; - t->wanted_cluster = -1; - t->completer = NULL; - spin_unlock(&t->lock); - - if (cluster != -1) { - bL_switch_to(cluster); - - if (completer) - completer(completer_cookie); - } - } while (!kthread_should_stop()); - - return 0; -} - -static struct task_struct * bL_switcher_thread_create(int cpu, void *arg) -{ - struct task_struct *task; - - task = kthread_create_on_node(bL_switcher_thread, arg, - cpu_to_node(cpu), "kswitcher_%d", cpu); - if (!IS_ERR(task)) { - kthread_bind(task, cpu); - wake_up_process(task); - } else - pr_err("%s failed for CPU %d\n", __func__, cpu); - return task; -} - -/* - * bL_switch_request_cb - Switch to a specific cluster for the given CPU, - * with completion notification via a callback - * - * @cpu: the CPU to switch - * @new_cluster_id: the ID of the cluster to switch to. - * @completer: switch completion callback. if non-NULL, - * @completer(@completer_cookie) will be called on completion of - * the switch, in non-atomic context. - * @completer_cookie: opaque context argument for @completer. - * - * This function causes a cluster switch on the given CPU by waking up - * the appropriate switcher thread. This function may or may not return - * before the switch has occurred. - * - * If a @completer callback function is supplied, it will be called when - * the switch is complete. This can be used to determine asynchronously - * when the switch is complete, regardless of when bL_switch_request() - * returns. When @completer is supplied, no new switch request is permitted - * for the affected CPU until after the switch is complete, and @completer - * has returned. - */ -int bL_switch_request_cb(unsigned int cpu, unsigned int new_cluster_id, - bL_switch_completion_handler completer, - void *completer_cookie) -{ - struct bL_thread *t; - - if (cpu >= ARRAY_SIZE(bL_threads)) { - pr_err("%s: cpu %d out of bounds\n", __func__, cpu); - return -EINVAL; - } - - t = &bL_threads[cpu]; - - if (IS_ERR(t->task)) - return PTR_ERR(t->task); - if (!t->task) - return -ESRCH; - - spin_lock(&t->lock); - if (t->completer) { - spin_unlock(&t->lock); - return -EBUSY; - } - t->completer = completer; - t->completer_cookie = completer_cookie; - t->wanted_cluster = new_cluster_id; - spin_unlock(&t->lock); - wake_up(&t->wq); - return 0; -} - -EXPORT_SYMBOL_GPL(bL_switch_request_cb); - -/* - * Detach an outstanding switch request. - * - * The switcher will continue with the switch request in the background, - * but the completer function will not be called. - * - * This may be necessary if the completer is in a kernel module which is - * about to be unloaded. - */ -void bL_switch_request_detach(unsigned int cpu, - bL_switch_completion_handler completer) -{ - struct bL_thread *t; - - if (cpu >= ARRAY_SIZE(bL_threads)) { - pr_err("%s: cpu %d out of bounds\n", __func__, cpu); - return; - } - - t = &bL_threads[cpu]; - - if (IS_ERR(t->task) || !t->task) - return; - - spin_lock(&t->lock); - if (t->completer == completer) - t->completer = NULL; - spin_unlock(&t->lock); -} - -EXPORT_SYMBOL_GPL(bL_switch_request_detach); - -/* - * Activation and configuration code. - */ - -static DEFINE_MUTEX(bL_switcher_activation_lock); -static BLOCKING_NOTIFIER_HEAD(bL_activation_notifier); -static unsigned int bL_switcher_active; -static unsigned int bL_switcher_cpu_original_cluster[NR_CPUS]; -static cpumask_t bL_switcher_removed_logical_cpus; - -int bL_switcher_register_notifier(struct notifier_block *nb) -{ - return blocking_notifier_chain_register(&bL_activation_notifier, nb); -} -EXPORT_SYMBOL_GPL(bL_switcher_register_notifier); - -int bL_switcher_unregister_notifier(struct notifier_block *nb) -{ - return blocking_notifier_chain_unregister(&bL_activation_notifier, nb); -} -EXPORT_SYMBOL_GPL(bL_switcher_unregister_notifier); - -static int bL_activation_notify(unsigned long val) -{ - int ret; - - ret = blocking_notifier_call_chain(&bL_activation_notifier, val, NULL); - if (ret & NOTIFY_STOP_MASK) - pr_err("%s: notifier chain failed with status 0x%x\n", - __func__, ret); - return notifier_to_errno(ret); -} - -static void bL_switcher_restore_cpus(void) -{ - int i; - - for_each_cpu(i, &bL_switcher_removed_logical_cpus) - cpu_up(i); -} - -static int bL_switcher_halve_cpus(void) -{ - int i, j, cluster_0, gic_id, ret; - unsigned int cpu, cluster, mask; - cpumask_t available_cpus; - - /* First pass to validate what we have */ - mask = 0; - for_each_online_cpu(i) { - cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(i), 0); - cluster = MPIDR_AFFINITY_LEVEL(cpu_logical_map(i), 1); - if (cluster >= 2) { - pr_err("%s: only dual cluster systems are supported\n", __func__); - return -EINVAL; - } - if (WARN_ON(cpu >= MAX_CPUS_PER_CLUSTER)) - return -EINVAL; - mask |= (1 << cluster); - } - if (mask != 3) { - pr_err("%s: no CPU pairing possible\n", __func__); - return -EINVAL; - } - - /* - * Now let's do the pairing. We match each CPU with another CPU - * from a different cluster. To get a uniform scheduling behavior - * without fiddling with CPU topology and compute capacity data, - * we'll use logical CPUs initially belonging to the same cluster. - */ - memset(bL_switcher_cpu_pairing, -1, sizeof(bL_switcher_cpu_pairing)); - cpumask_copy(&available_cpus, cpu_online_mask); - cluster_0 = -1; - for_each_cpu(i, &available_cpus) { - int match = -1; - cluster = MPIDR_AFFINITY_LEVEL(cpu_logical_map(i), 1); - if (cluster_0 == -1) - cluster_0 = cluster; - if (cluster != cluster_0) - continue; - cpumask_clear_cpu(i, &available_cpus); - for_each_cpu(j, &available_cpus) { - cluster = MPIDR_AFFINITY_LEVEL(cpu_logical_map(j), 1); - /* - * Let's remember the last match to create "odd" - * pairing on purpose in order for other code not - * to assume any relation between physical and - * logical CPU numbers. - */ - if (cluster != cluster_0) - match = j; - } - if (match != -1) { - bL_switcher_cpu_pairing[i] = match; - cpumask_clear_cpu(match, &available_cpus); - pr_info("CPU%d paired with CPU%d\n", i, match); - } - } - - /* - * Now we disable the unwanted CPUs i.e. everything that has no - * pairing information (that includes the pairing counterparts). - */ - cpumask_clear(&bL_switcher_removed_logical_cpus); - for_each_online_cpu(i) { - cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(i), 0); - cluster = MPIDR_AFFINITY_LEVEL(cpu_logical_map(i), 1); - - /* Let's take note of the GIC ID for this CPU */ - gic_id = gic_get_cpu_id(i); - if (gic_id < 0) { - pr_err("%s: bad GIC ID for CPU %d\n", __func__, i); - bL_switcher_restore_cpus(); - return -EINVAL; - } - bL_gic_id[cpu][cluster] = gic_id; - pr_info("GIC ID for CPU %u cluster %u is %u\n", - cpu, cluster, gic_id); - - if (bL_switcher_cpu_pairing[i] != -1) { - bL_switcher_cpu_original_cluster[i] = cluster; - continue; - } - - ret = cpu_down(i); - if (ret) { - bL_switcher_restore_cpus(); - return ret; - } - cpumask_set_cpu(i, &bL_switcher_removed_logical_cpus); - } - - return 0; -} - -/* Determine the logical CPU a given physical CPU is grouped on. */ -int bL_switcher_get_logical_index(u32 mpidr) -{ - int cpu; - - if (!bL_switcher_active) - return -EUNATCH; - - mpidr &= MPIDR_HWID_BITMASK; - for_each_online_cpu(cpu) { - int pairing = bL_switcher_cpu_pairing[cpu]; - if (pairing == -1) - continue; - if ((mpidr == cpu_logical_map(cpu)) || - (mpidr == cpu_logical_map(pairing))) - return cpu; - } - return -EINVAL; -} - -static void bL_switcher_trace_trigger_cpu(void *__always_unused info) -{ - trace_cpu_migrate_current(get_ns(), read_mpidr()); -} - -int bL_switcher_trace_trigger(void) -{ - int ret; - - preempt_disable(); - - bL_switcher_trace_trigger_cpu(NULL); - ret = smp_call_function(bL_switcher_trace_trigger_cpu, NULL, true); - - preempt_enable(); - - return ret; -} -EXPORT_SYMBOL_GPL(bL_switcher_trace_trigger); - -static int bL_switcher_enable(void) -{ - int cpu, ret; - - mutex_lock(&bL_switcher_activation_lock); - cpu_hotplug_driver_lock(); - if (bL_switcher_active) { - cpu_hotplug_driver_unlock(); - mutex_unlock(&bL_switcher_activation_lock); - return 0; - } - - pr_info("big.LITTLE switcher initializing\n"); - - ret = bL_activation_notify(BL_NOTIFY_PRE_ENABLE); - if (ret) - goto error; - - ret = bL_switcher_halve_cpus(); - if (ret) - goto error; - - bL_switcher_trace_trigger(); - - for_each_online_cpu(cpu) { - struct bL_thread *t = &bL_threads[cpu]; - spin_lock_init(&t->lock); - init_waitqueue_head(&t->wq); - init_completion(&t->started); - t->wanted_cluster = -1; - t->task = bL_switcher_thread_create(cpu, t); - } - - bL_switcher_active = 1; - bL_activation_notify(BL_NOTIFY_POST_ENABLE); - pr_info("big.LITTLE switcher initialized\n"); - goto out; - -error: - pr_warning("big.LITTLE switcher initialization failed\n"); - bL_activation_notify(BL_NOTIFY_POST_DISABLE); - -out: - cpu_hotplug_driver_unlock(); - mutex_unlock(&bL_switcher_activation_lock); - return ret; -} - -#ifdef CONFIG_SYSFS - -static void bL_switcher_disable(void) -{ - unsigned int cpu, cluster; - struct bL_thread *t; - struct task_struct *task; - - mutex_lock(&bL_switcher_activation_lock); - cpu_hotplug_driver_lock(); - - if (!bL_switcher_active) - goto out; - - if (bL_activation_notify(BL_NOTIFY_PRE_DISABLE) != 0) { - bL_activation_notify(BL_NOTIFY_POST_ENABLE); - goto out; - } - - bL_switcher_active = 0; - - /* - * To deactivate the switcher, we must shut down the switcher - * threads to prevent any other requests from being accepted. - * Then, if the final cluster for given logical CPU is not the - * same as the original one, we'll recreate a switcher thread - * just for the purpose of switching the CPU back without any - * possibility for interference from external requests. - */ - for_each_online_cpu(cpu) { - t = &bL_threads[cpu]; - task = t->task; - t->task = NULL; - if (!task || IS_ERR(task)) - continue; - kthread_stop(task); - /* no more switch may happen on this CPU at this point */ - cluster = MPIDR_AFFINITY_LEVEL(cpu_logical_map(cpu), 1); - if (cluster == bL_switcher_cpu_original_cluster[cpu]) - continue; - init_completion(&t->started); - t->wanted_cluster = bL_switcher_cpu_original_cluster[cpu]; - task = bL_switcher_thread_create(cpu, t); - if (!IS_ERR(task)) { - wait_for_completion(&t->started); - kthread_stop(task); - cluster = MPIDR_AFFINITY_LEVEL(cpu_logical_map(cpu), 1); - if (cluster == bL_switcher_cpu_original_cluster[cpu]) - continue; - } - /* If execution gets here, we're in trouble. */ - pr_crit("%s: unable to restore original cluster for CPU %d\n", - __func__, cpu); - pr_crit("%s: CPU %d can't be restored\n", - __func__, bL_switcher_cpu_pairing[cpu]); - cpumask_clear_cpu(bL_switcher_cpu_pairing[cpu], - &bL_switcher_removed_logical_cpus); - } - - bL_switcher_restore_cpus(); - bL_switcher_trace_trigger(); - - bL_activation_notify(BL_NOTIFY_POST_DISABLE); - -out: - cpu_hotplug_driver_unlock(); - mutex_unlock(&bL_switcher_activation_lock); -} - -static ssize_t bL_switcher_active_show(struct kobject *kobj, - struct kobj_attribute *attr, char *buf) -{ - return sprintf(buf, "%u\n", bL_switcher_active); -} - -static ssize_t bL_switcher_active_store(struct kobject *kobj, - struct kobj_attribute *attr, const char *buf, size_t count) -{ - int ret; - - switch (buf[0]) { - case '0': - bL_switcher_disable(); - ret = 0; - break; - case '1': - ret = bL_switcher_enable(); - break; - default: - ret = -EINVAL; - } - - return (ret >= 0) ? count : ret; -} - -static ssize_t bL_switcher_trace_trigger_store(struct kobject *kobj, - struct kobj_attribute *attr, const char *buf, size_t count) -{ - int ret = bL_switcher_trace_trigger(); - - return ret ? ret : count; -} - -static struct kobj_attribute bL_switcher_active_attr = - __ATTR(active, 0644, bL_switcher_active_show, bL_switcher_active_store); - -static struct kobj_attribute bL_switcher_trace_trigger_attr = - __ATTR(trace_trigger, 0200, NULL, bL_switcher_trace_trigger_store); - -static struct attribute *bL_switcher_attrs[] = { - &bL_switcher_active_attr.attr, - &bL_switcher_trace_trigger_attr.attr, - NULL, -}; - -static struct attribute_group bL_switcher_attr_group = { - .attrs = bL_switcher_attrs, -}; - -static struct kobject *bL_switcher_kobj; - -static int __init bL_switcher_sysfs_init(void) -{ - int ret; - - bL_switcher_kobj = kobject_create_and_add("bL_switcher", kernel_kobj); - if (!bL_switcher_kobj) - return -ENOMEM; - ret = sysfs_create_group(bL_switcher_kobj, &bL_switcher_attr_group); - if (ret) - kobject_put(bL_switcher_kobj); - return ret; -} - -#endif /* CONFIG_SYSFS */ - -bool bL_switcher_get_enabled(void) -{ - mutex_lock(&bL_switcher_activation_lock); - - return bL_switcher_active; -} -EXPORT_SYMBOL_GPL(bL_switcher_get_enabled); - -void bL_switcher_put_enabled(void) -{ - mutex_unlock(&bL_switcher_activation_lock); -} -EXPORT_SYMBOL_GPL(bL_switcher_put_enabled); - -/* - * Veto any CPU hotplug operation while the switcher is active. - * We're just not ready to deal with that given the trickery involved. - */ -static int bL_switcher_hotplug_callback(struct notifier_block *nfb, - unsigned long action, void *hcpu) -{ - switch (action) { - case CPU_UP_PREPARE: - case CPU_DOWN_PREPARE: - if (bL_switcher_active) - return NOTIFY_BAD; - } - return NOTIFY_DONE; -} - -static struct notifier_block bL_switcher_hotplug_notifier = - { &bL_switcher_hotplug_callback, NULL, 0 }; - -#ifdef CONFIG_SCHED_HMP -static bool no_bL_switcher = true; -#else -static bool no_bL_switcher; -#endif -core_param(no_bL_switcher, no_bL_switcher, bool, 0644); - -static int __init bL_switcher_init(void) -{ - int ret; - - if (MAX_NR_CLUSTERS != 2) { - pr_err("%s: only dual cluster systems are supported\n", __func__); - return -EINVAL; - } - - register_cpu_notifier(&bL_switcher_hotplug_notifier); - - if (!no_bL_switcher) { - ret = bL_switcher_enable(); - if (ret) - return ret; - } - -#ifdef CONFIG_SYSFS - ret = bL_switcher_sysfs_init(); - if (ret) - pr_err("%s: unable to create sysfs entry\n", __func__); -#endif - - return 0; -} - -late_initcall(bL_switcher_init); diff --git a/arch/arm/common/bL_switcher_dummy_if.c b/arch/arm/common/bL_switcher_dummy_if.c deleted file mode 100644 index 5e2dd197e728..000000000000 --- a/arch/arm/common/bL_switcher_dummy_if.c +++ /dev/null @@ -1,71 +0,0 @@ -/* - * arch/arm/common/bL_switcher_dummy_if.c -- b.L switcher dummy interface - * - * Created by: Nicolas Pitre, November 2012 - * Copyright: (C) 2012 Linaro Limited - * - * Dummy interface to user space for debugging purpose only. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include - -static ssize_t bL_switcher_write(struct file *file, const char __user *buf, - size_t len, loff_t *pos) -{ - unsigned char val[3]; - unsigned int cpu, cluster; - int ret; - - pr_debug("%s\n", __func__); - - if (len < 3) - return -EINVAL; - - if (copy_from_user(val, buf, 3)) - return -EFAULT; - - /* format: , */ - if (val[0] < '0' || val[0] > '4' || - val[1] != ',' || - val[2] < '0' || val[2] > '1') - return -EINVAL; - - cpu = val[0] - '0'; - cluster = val[2] - '0'; - ret = bL_switch_request(cpu, cluster); - - return ret ? : len; -} - -static const struct file_operations bL_switcher_fops = { - .write = bL_switcher_write, - .owner = THIS_MODULE, -}; - -static struct miscdevice bL_switcher_device = { - MISC_DYNAMIC_MINOR, - "b.L_switcher", - &bL_switcher_fops -}; - -static int __init bL_switcher_dummy_if_init(void) -{ - return misc_register(&bL_switcher_device); -} - -static void __exit bL_switcher_dummy_if_exit(void) -{ - misc_deregister(&bL_switcher_device); -} - -module_init(bL_switcher_dummy_if_init); -module_exit(bL_switcher_dummy_if_exit); diff --git a/arch/arm/common/fiq_glue.S b/arch/arm/common/fiq_glue.S deleted file mode 100644 index 24b42cec4813..000000000000 --- a/arch/arm/common/fiq_glue.S +++ /dev/null @@ -1,118 +0,0 @@ -/* - * Copyright (C) 2008 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include -#include - - .text - - .global fiq_glue_end - - /* fiq stack: r0-r15,cpsr,spsr of interrupted mode */ - -ENTRY(fiq_glue) - /* store pc, cpsr from previous mode, reserve space for spsr */ - mrs r12, spsr - sub lr, lr, #4 - subs r10, #1 - bne nested_fiq - - str r12, [sp, #-8]! - str lr, [sp, #-4]! - - /* store r8-r14 from previous mode */ - sub sp, sp, #(7 * 4) - stmia sp, {r8-r14}^ - nop - - /* store r0-r7 from previous mode */ - stmfd sp!, {r0-r7} - - /* setup func(data,regs) arguments */ - mov r0, r9 - mov r1, sp - mov r3, r8 - - mov r7, sp - - /* Get sp and lr from non-user modes */ - and r4, r12, #MODE_MASK - cmp r4, #USR_MODE - beq fiq_from_usr_mode - - mov r7, sp - orr r4, r4, #(PSR_I_BIT | PSR_F_BIT) - msr cpsr_c, r4 - str sp, [r7, #(4 * 13)] - str lr, [r7, #(4 * 14)] - mrs r5, spsr - str r5, [r7, #(4 * 17)] - - cmp r4, #(SVC_MODE | PSR_I_BIT | PSR_F_BIT) - /* use fiq stack if we reenter this mode */ - subne sp, r7, #(4 * 3) - -fiq_from_usr_mode: - msr cpsr_c, #(SVC_MODE | PSR_I_BIT | PSR_F_BIT) - mov r2, sp - sub sp, r7, #12 - stmfd sp!, {r2, ip, lr} - /* call func(data,regs) */ - blx r3 - ldmfd sp, {r2, ip, lr} - mov sp, r2 - - /* restore/discard saved state */ - cmp r4, #USR_MODE - beq fiq_from_usr_mode_exit - - msr cpsr_c, r4 - ldr sp, [r7, #(4 * 13)] - ldr lr, [r7, #(4 * 14)] - msr spsr_cxsf, r5 - -fiq_from_usr_mode_exit: - msr cpsr_c, #(FIQ_MODE | PSR_I_BIT | PSR_F_BIT) - - ldmfd sp!, {r0-r7} - ldr lr, [sp, #(4 * 7)] - ldr r12, [sp, #(4 * 8)] - add sp, sp, #(10 * 4) -exit_fiq: - msr spsr_cxsf, r12 - add r10, #1 - cmp r11, #0 - moveqs pc, lr - bx r11 /* jump to custom fiq return function */ - -nested_fiq: - orr r12, r12, #(PSR_F_BIT) - b exit_fiq - -fiq_glue_end: - -ENTRY(fiq_glue_setup) /* func, data, sp, smc call number */ - stmfd sp!, {r4} - mrs r4, cpsr - msr cpsr_c, #(FIQ_MODE | PSR_I_BIT | PSR_F_BIT) - movs r8, r0 - mov r9, r1 - mov sp, r2 - mov r11, r3 - moveq r10, #0 - movne r10, #1 - msr cpsr_c, r4 - ldmfd sp!, {r4} - bx lr - diff --git a/arch/arm/common/fiq_glue_setup.c b/arch/arm/common/fiq_glue_setup.c deleted file mode 100644 index 8cb1b611c6d5..000000000000 --- a/arch/arm/common/fiq_glue_setup.c +++ /dev/null @@ -1,147 +0,0 @@ -/* - * Copyright (C) 2010 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include - -extern unsigned char fiq_glue, fiq_glue_end; -extern void fiq_glue_setup(void *func, void *data, void *sp, - fiq_return_handler_t fiq_return_handler); - -static struct fiq_handler fiq_debbuger_fiq_handler = { - .name = "fiq_glue", -}; -DEFINE_PER_CPU(void *, fiq_stack); -static struct fiq_glue_handler *current_handler; -static fiq_return_handler_t fiq_return_handler; -static DEFINE_MUTEX(fiq_glue_lock); - -static void fiq_glue_setup_helper(void *info) -{ - struct fiq_glue_handler *handler = info; - fiq_glue_setup(handler->fiq, handler, - __get_cpu_var(fiq_stack) + THREAD_START_SP, - fiq_return_handler); -} - -int fiq_glue_register_handler(struct fiq_glue_handler *handler) -{ - int ret; - int cpu; - - if (!handler || !handler->fiq) - return -EINVAL; - - mutex_lock(&fiq_glue_lock); - if (fiq_stack) { - ret = -EBUSY; - goto err_busy; - } - - for_each_possible_cpu(cpu) { - void *stack; - stack = (void *)__get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER); - if (WARN_ON(!stack)) { - ret = -ENOMEM; - goto err_alloc_fiq_stack; - } - per_cpu(fiq_stack, cpu) = stack; - } - - ret = claim_fiq(&fiq_debbuger_fiq_handler); - if (WARN_ON(ret)) - goto err_claim_fiq; - - current_handler = handler; - on_each_cpu(fiq_glue_setup_helper, handler, true); - set_fiq_handler(&fiq_glue, &fiq_glue_end - &fiq_glue); - - mutex_unlock(&fiq_glue_lock); - return 0; - -err_claim_fiq: -err_alloc_fiq_stack: - for_each_possible_cpu(cpu) { - __free_pages(per_cpu(fiq_stack, cpu), THREAD_SIZE_ORDER); - per_cpu(fiq_stack, cpu) = NULL; - } -err_busy: - mutex_unlock(&fiq_glue_lock); - return ret; -} - -static void fiq_glue_update_return_handler(void (*fiq_return)(void)) -{ - fiq_return_handler = fiq_return; - if (current_handler) - on_each_cpu(fiq_glue_setup_helper, current_handler, true); -} - -int fiq_glue_set_return_handler(void (*fiq_return)(void)) -{ - int ret; - - mutex_lock(&fiq_glue_lock); - if (fiq_return_handler) { - ret = -EBUSY; - goto err_busy; - } - fiq_glue_update_return_handler(fiq_return); - ret = 0; -err_busy: - mutex_unlock(&fiq_glue_lock); - - return ret; -} -EXPORT_SYMBOL(fiq_glue_set_return_handler); - -int fiq_glue_clear_return_handler(void (*fiq_return)(void)) -{ - int ret; - - mutex_lock(&fiq_glue_lock); - if (WARN_ON(fiq_return_handler != fiq_return)) { - ret = -EINVAL; - goto err_inval; - } - fiq_glue_update_return_handler(NULL); - ret = 0; -err_inval: - mutex_unlock(&fiq_glue_lock); - - return ret; -} -EXPORT_SYMBOL(fiq_glue_clear_return_handler); - -/** - * fiq_glue_resume - Restore fiqs after suspend or low power idle states - * - * This must be called before calling local_fiq_enable after returning from a - * power state where the fiq mode registers were lost. If a driver provided - * a resume hook when it registered the handler it will be called. - */ - -void fiq_glue_resume(void) -{ - if (!current_handler) - return; - fiq_glue_setup(current_handler->fiq, current_handler, - __get_cpu_var(fiq_stack) + THREAD_START_SP, - fiq_return_handler); - if (current_handler->resume) - current_handler->resume(current_handler); -} - diff --git a/arch/arm/common/mcpm_entry.c b/arch/arm/common/mcpm_entry.c index 4a2b32fd53a1..370236dd1a03 100644 --- a/arch/arm/common/mcpm_entry.c +++ b/arch/arm/common/mcpm_entry.c @@ -27,18 +27,6 @@ void mcpm_set_entry_vector(unsigned cpu, unsigned cluster, void *ptr) sync_cache_w(&mcpm_entry_vectors[cluster][cpu]); } -extern unsigned long mcpm_entry_early_pokes[MAX_NR_CLUSTERS][MAX_CPUS_PER_CLUSTER][2]; - -void mcpm_set_early_poke(unsigned cpu, unsigned cluster, - unsigned long poke_phys_addr, unsigned long poke_val) -{ - unsigned long *poke = &mcpm_entry_early_pokes[cluster][cpu][0]; - poke[0] = poke_phys_addr; - poke[1] = poke_val; - __cpuc_flush_dcache_area((void *)poke, 8); - outer_clean_range(__pa(poke), __pa(poke + 2)); -} - static const struct mcpm_platform_ops *platform_ops; int __init mcpm_platform_register(const struct mcpm_platform_ops *ops) diff --git a/arch/arm/common/mcpm_head.S b/arch/arm/common/mcpm_head.S index 0decb3c07165..8178705c4b24 100644 --- a/arch/arm/common/mcpm_head.S +++ b/arch/arm/common/mcpm_head.S @@ -15,7 +15,6 @@ #include #include -#include #include "vlock.h" @@ -48,7 +47,6 @@ ENTRY(mcpm_entry_point) - ARM_BE8(setend be) THUMB( adr r12, BSYM(1f) ) THUMB( bx r12 ) THUMB( .thumb ) @@ -73,19 +71,12 @@ ENTRY(mcpm_entry_point) * position independent way. */ adr r5, 3f - ldmia r5, {r0, r6, r7, r8, r11} - add r0, r5, r0 @ r0 = mcpm_entry_early_pokes + ldmia r5, {r6, r7, r8, r11} add r6, r5, r6 @ r6 = mcpm_entry_vectors ldr r7, [r5, r7] @ r7 = mcpm_power_up_setup_phys add r8, r5, r8 @ r8 = mcpm_sync add r11, r5, r11 @ r11 = first_man_locks - @ Perform an early poke, if any - add r0, r0, r4, lsl #3 - ldmia r0, {r0, r1} - teq r0, #0 - strne r1, [r0] - mov r0, #MCPM_SYNC_CLUSTER_SIZE mla r8, r0, r10, r8 @ r8 = sync cluster base @@ -204,8 +195,7 @@ mcpm_entry_gated: .align 2 -3: .word mcpm_entry_early_pokes - . - .word mcpm_entry_vectors - 3b +3: .word mcpm_entry_vectors - . .word mcpm_power_up_setup_phys - 3b .word mcpm_sync - 3b .word first_man_locks - 3b @@ -224,10 +214,6 @@ first_man_locks: ENTRY(mcpm_entry_vectors) .space 4 * MAX_NR_CLUSTERS * MAX_CPUS_PER_CLUSTER - .type mcpm_entry_early_pokes, #object -ENTRY(mcpm_entry_early_pokes) - .space 8 * MAX_NR_CLUSTERS * MAX_CPUS_PER_CLUSTER - .type mcpm_power_up_setup_phys, #object ENTRY(mcpm_power_up_setup_phys) .space 4 @ set by mcpm_sync_init() diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index adb9aa5c88c7..2e67a272df70 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig @@ -1,7 +1,6 @@ CONFIG_EXPERIMENTAL=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y -CONFIG_BLK_DEV_INITRD=y CONFIG_ARCH_MVEBU=y CONFIG_MACH_ARMADA_370=y CONFIG_ARCH_SIRF=y @@ -23,7 +22,6 @@ CONFIG_AEABI=y CONFIG_HIGHMEM=y CONFIG_HIGHPTE=y CONFIG_ARM_APPENDED_DTB=y -CONFIG_ARM_ATAG_DTB_COMPAT=y CONFIG_VFP=y CONFIG_NEON=y CONFIG_NET=y @@ -48,8 +46,6 @@ CONFIG_SERIAL_SIRFSOC=y CONFIG_SERIAL_SIRFSOC_CONSOLE=y CONFIG_SERIAL_VT8500=y CONFIG_SERIAL_VT8500_CONSOLE=y -CONFIG_SERIAL_XILINX_PS_UART=y -CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y CONFIG_IPMI_HANDLER=y CONFIG_IPMI_SI=y CONFIG_I2C=y diff --git a/arch/arm/crypto/.gitignore b/arch/arm/crypto/.gitignore deleted file mode 100644 index 6231d36b3635..000000000000 --- a/arch/arm/crypto/.gitignore +++ /dev/null @@ -1 +0,0 @@ -aesbs-core.S diff --git a/arch/arm/crypto/Makefile b/arch/arm/crypto/Makefile index 2cee53b27238..a2c83851bc90 100644 --- a/arch/arm/crypto/Makefile +++ b/arch/arm/crypto/Makefile @@ -3,27 +3,7 @@ # obj-$(CONFIG_CRYPTO_AES_ARM) += aes-arm.o -obj-$(CONFIG_CRYPTO_AES_ARM_BS) += aes-arm-bs.o obj-$(CONFIG_CRYPTO_SHA1_ARM) += sha1-arm.o -obj-$(CONFIG_CRYPTO_SHA1_ARM_NEON) += sha1-arm-neon.o -obj-$(CONFIG_CRYPTO_SHA256_ARM) += sha256-arm.o -obj-$(CONFIG_CRYPTO_SHA512_ARM_NEON) += sha512-arm-neon.o -aes-arm-y := aes-armv4.o aes_glue.o -aes-arm-bs-y := aesbs-core.o aesbs-glue.o -sha1-arm-y := sha1-armv4-large.o sha1_glue.o -sha1-arm-neon-y := sha1-armv7-neon.o sha1_neon_glue.o -sha256-arm-neon-$(CONFIG_KERNEL_MODE_NEON) := sha256_neon_glue.o -sha256-arm-y := sha256-core.o sha256_glue.o $(sha256-arm-neon-y) -sha512-arm-neon-y := sha512-armv7-neon.o sha512_neon_glue.o - -quiet_cmd_perl = PERL $@ - cmd_perl = $(PERL) $(<) > $(@) - -$(src)/aesbs-core.S_shipped: $(src)/bsaes-armv7.pl - $(call cmd,perl) - -$(src)/sha256-core.S_shipped: $(src)/sha256-armv4.pl - $(call cmd,perl) - -.PRECIOUS: $(obj)/aesbs-core.S $(obj)/sha256-core.S +aes-arm-y := aes-armv4.o aes_glue.o +sha1-arm-y := sha1-armv4-large.o sha1_glue.o diff --git a/arch/arm/crypto/aes-armv4.S b/arch/arm/crypto/aes-armv4.S index 3a14ea8fe97e..19d6cd6f29f9 100644 --- a/arch/arm/crypto/aes-armv4.S +++ b/arch/arm/crypto/aes-armv4.S @@ -148,7 +148,7 @@ AES_Te: @ const AES_KEY *key) { .align 5 ENTRY(AES_encrypt) - adr r3,AES_encrypt + sub r3,pc,#8 @ AES_encrypt stmdb sp!,{r1,r4-r12,lr} mov r12,r0 @ inp mov r11,r2 @@ -381,7 +381,7 @@ _armv4_AES_encrypt: .align 5 ENTRY(private_AES_set_encrypt_key) _armv4_AES_set_encrypt_key: - adr r3,_armv4_AES_set_encrypt_key + sub r3,pc,#8 @ AES_set_encrypt_key teq r0,#0 moveq r0,#-1 beq .Labrt @@ -843,7 +843,7 @@ AES_Td: @ const AES_KEY *key) { .align 5 ENTRY(AES_decrypt) - adr r3,AES_decrypt + sub r3,pc,#8 @ AES_decrypt stmdb sp!,{r1,r4-r12,lr} mov r12,r0 @ inp mov r11,r2 diff --git a/arch/arm/crypto/aes_glue.c b/arch/arm/crypto/aes_glue.c index 0409b8f89782..59f7877ead6a 100644 --- a/arch/arm/crypto/aes_glue.c +++ b/arch/arm/crypto/aes_glue.c @@ -6,12 +6,22 @@ #include #include -#include "aes_glue.h" +#define AES_MAXNR 14 -EXPORT_SYMBOL(AES_encrypt); -EXPORT_SYMBOL(AES_decrypt); -EXPORT_SYMBOL(private_AES_set_encrypt_key); -EXPORT_SYMBOL(private_AES_set_decrypt_key); +typedef struct { + unsigned int rd_key[4 *(AES_MAXNR + 1)]; + int rounds; +} AES_KEY; + +struct AES_CTX { + AES_KEY enc_key; + AES_KEY dec_key; +}; + +asmlinkage void AES_encrypt(const u8 *in, u8 *out, AES_KEY *ctx); +asmlinkage void AES_decrypt(const u8 *in, u8 *out, AES_KEY *ctx); +asmlinkage int private_AES_set_decrypt_key(const unsigned char *userKey, const int bits, AES_KEY *key); +asmlinkage int private_AES_set_encrypt_key(const unsigned char *userKey, const int bits, AES_KEY *key); static void aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src) { @@ -71,7 +81,7 @@ static struct crypto_alg aes_alg = { .cipher = { .cia_min_keysize = AES_MIN_KEY_SIZE, .cia_max_keysize = AES_MAX_KEY_SIZE, - .cia_setkey = aes_set_key, + .cia_setkey = aes_set_key, .cia_encrypt = aes_encrypt, .cia_decrypt = aes_decrypt } @@ -93,6 +103,6 @@ module_exit(aes_fini); MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm (ASM)"); MODULE_LICENSE("GPL"); -MODULE_ALIAS_CRYPTO("aes"); -MODULE_ALIAS_CRYPTO("aes-asm"); +MODULE_ALIAS("aes"); +MODULE_ALIAS("aes-asm"); MODULE_AUTHOR("David McCullough "); diff --git a/arch/arm/crypto/aes_glue.h b/arch/arm/crypto/aes_glue.h deleted file mode 100644 index cca3e51eb606..000000000000 --- a/arch/arm/crypto/aes_glue.h +++ /dev/null @@ -1,19 +0,0 @@ - -#define AES_MAXNR 14 - -struct AES_KEY { - unsigned int rd_key[4 * (AES_MAXNR + 1)]; - int rounds; -}; - -struct AES_CTX { - struct AES_KEY enc_key; - struct AES_KEY dec_key; -}; - -asmlinkage void AES_encrypt(const u8 *in, u8 *out, struct AES_KEY *ctx); -asmlinkage void AES_decrypt(const u8 *in, u8 *out, struct AES_KEY *ctx); -asmlinkage int private_AES_set_decrypt_key(const unsigned char *userKey, - const int bits, struct AES_KEY *key); -asmlinkage int private_AES_set_encrypt_key(const unsigned char *userKey, - const int bits, struct AES_KEY *key); diff --git a/arch/arm/crypto/aesbs-core.S_shipped b/arch/arm/crypto/aesbs-core.S_shipped deleted file mode 100644 index 71e5fc7cfb18..000000000000 --- a/arch/arm/crypto/aesbs-core.S_shipped +++ /dev/null @@ -1,2544 +0,0 @@ - -@ ==================================================================== -@ Written by Andy Polyakov for the OpenSSL -@ project. The module is, however, dual licensed under OpenSSL and -@ CRYPTOGAMS licenses depending on where you obtain it. For further -@ details see http://www.openssl.org/~appro/cryptogams/. -@ -@ Specific modes and adaptation for Linux kernel by Ard Biesheuvel -@ . Permission to use under GPL terms is -@ granted. -@ ==================================================================== - -@ Bit-sliced AES for ARM NEON -@ -@ February 2012. -@ -@ This implementation is direct adaptation of bsaes-x86_64 module for -@ ARM NEON. Except that this module is endian-neutral [in sense that -@ it can be compiled for either endianness] by courtesy of vld1.8's -@ neutrality. Initial version doesn't implement interface to OpenSSL, -@ only low-level primitives and unsupported entry points, just enough -@ to collect performance results, which for Cortex-A8 core are: -@ -@ encrypt 19.5 cycles per byte processed with 128-bit key -@ decrypt 22.1 cycles per byte processed with 128-bit key -@ key conv. 440 cycles per 128-bit key/0.18 of 8x block -@ -@ Snapdragon S4 encrypts byte in 17.6 cycles and decrypts in 19.7, -@ which is [much] worse than anticipated (for further details see -@ http://www.openssl.org/~appro/Snapdragon-S4.html). -@ -@ Cortex-A15 manages in 14.2/16.1 cycles [when integer-only code -@ manages in 20.0 cycles]. -@ -@ When comparing to x86_64 results keep in mind that NEON unit is -@ [mostly] single-issue and thus can't [fully] benefit from -@ instruction-level parallelism. And when comparing to aes-armv4 -@ results keep in mind key schedule conversion overhead (see -@ bsaes-x86_64.pl for further details)... -@ -@ - -@ April-August 2013 -@ -@ Add CBC, CTR and XTS subroutines, adapt for kernel use. -@ -@ - -#ifndef __KERNEL__ -# include "arm_arch.h" - -# define VFP_ABI_PUSH vstmdb sp!,{d8-d15} -# define VFP_ABI_POP vldmia sp!,{d8-d15} -# define VFP_ABI_FRAME 0x40 -#else -# define VFP_ABI_PUSH -# define VFP_ABI_POP -# define VFP_ABI_FRAME 0 -# define BSAES_ASM_EXTENDED_KEY -# define XTS_CHAIN_TWEAK -# define __ARM_ARCH__ 7 -#endif - -#ifdef __thumb__ -# define adrl adr -#endif - -#if __ARM_ARCH__>=7 -.text -.syntax unified @ ARMv7-capable assembler is expected to handle this -#ifdef __thumb2__ -.thumb -#else -.code 32 -#endif - -.fpu neon - -.type _bsaes_decrypt8,%function -.align 4 -_bsaes_decrypt8: - adr r6,_bsaes_decrypt8 - vldmia r4!, {q9} @ round 0 key - add r6,r6,#.LM0ISR-_bsaes_decrypt8 - - vldmia r6!, {q8} @ .LM0ISR - veor q10, q0, q9 @ xor with round0 key - veor q11, q1, q9 - vtbl.8 d0, {q10}, d16 - vtbl.8 d1, {q10}, d17 - veor q12, q2, q9 - vtbl.8 d2, {q11}, d16 - vtbl.8 d3, {q11}, d17 - veor q13, q3, q9 - vtbl.8 d4, {q12}, d16 - vtbl.8 d5, {q12}, d17 - veor q14, q4, q9 - vtbl.8 d6, {q13}, d16 - vtbl.8 d7, {q13}, d17 - veor q15, q5, q9 - vtbl.8 d8, {q14}, d16 - vtbl.8 d9, {q14}, d17 - veor q10, q6, q9 - vtbl.8 d10, {q15}, d16 - vtbl.8 d11, {q15}, d17 - veor q11, q7, q9 - vtbl.8 d12, {q10}, d16 - vtbl.8 d13, {q10}, d17 - vtbl.8 d14, {q11}, d16 - vtbl.8 d15, {q11}, d17 - vmov.i8 q8,#0x55 @ compose .LBS0 - vmov.i8 q9,#0x33 @ compose .LBS1 - vshr.u64 q10, q6, #1 - vshr.u64 q11, q4, #1 - veor q10, q10, q7 - veor q11, q11, q5 - vand q10, q10, q8 - vand q11, q11, q8 - veor q7, q7, q10 - vshl.u64 q10, q10, #1 - veor q5, q5, q11 - vshl.u64 q11, q11, #1 - veor q6, q6, q10 - veor q4, q4, q11 - vshr.u64 q10, q2, #1 - vshr.u64 q11, q0, #1 - veor q10, q10, q3 - veor q11, q11, q1 - vand q10, q10, q8 - vand q11, q11, q8 - veor q3, q3, q10 - vshl.u64 q10, q10, #1 - veor q1, q1, q11 - vshl.u64 q11, q11, #1 - veor q2, q2, q10 - veor q0, q0, q11 - vmov.i8 q8,#0x0f @ compose .LBS2 - vshr.u64 q10, q5, #2 - vshr.u64 q11, q4, #2 - veor q10, q10, q7 - veor q11, q11, q6 - vand q10, q10, q9 - vand q11, q11, q9 - veor q7, q7, q10 - vshl.u64 q10, q10, #2 - veor q6, q6, q11 - vshl.u64 q11, q11, #2 - veor q5, q5, q10 - veor q4, q4, q11 - vshr.u64 q10, q1, #2 - vshr.u64 q11, q0, #2 - veor q10, q10, q3 - veor q11, q11, q2 - vand q10, q10, q9 - vand q11, q11, q9 - veor q3, q3, q10 - vshl.u64 q10, q10, #2 - veor q2, q2, q11 - vshl.u64 q11, q11, #2 - veor q1, q1, q10 - veor q0, q0, q11 - vshr.u64 q10, q3, #4 - vshr.u64 q11, q2, #4 - veor q10, q10, q7 - veor q11, q11, q6 - vand q10, q10, q8 - vand q11, q11, q8 - veor q7, q7, q10 - vshl.u64 q10, q10, #4 - veor q6, q6, q11 - vshl.u64 q11, q11, #4 - veor q3, q3, q10 - veor q2, q2, q11 - vshr.u64 q10, q1, #4 - vshr.u64 q11, q0, #4 - veor q10, q10, q5 - veor q11, q11, q4 - vand q10, q10, q8 - vand q11, q11, q8 - veor q5, q5, q10 - vshl.u64 q10, q10, #4 - veor q4, q4, q11 - vshl.u64 q11, q11, #4 - veor q1, q1, q10 - veor q0, q0, q11 - sub r5,r5,#1 - b .Ldec_sbox -.align 4 -.Ldec_loop: - vldmia r4!, {q8-q11} - veor q8, q8, q0 - veor q9, q9, q1 - vtbl.8 d0, {q8}, d24 - vtbl.8 d1, {q8}, d25 - vldmia r4!, {q8} - veor q10, q10, q2 - vtbl.8 d2, {q9}, d24 - vtbl.8 d3, {q9}, d25 - vldmia r4!, {q9} - veor q11, q11, q3 - vtbl.8 d4, {q10}, d24 - vtbl.8 d5, {q10}, d25 - vldmia r4!, {q10} - vtbl.8 d6, {q11}, d24 - vtbl.8 d7, {q11}, d25 - vldmia r4!, {q11} - veor q8, q8, q4 - veor q9, q9, q5 - vtbl.8 d8, {q8}, d24 - vtbl.8 d9, {q8}, d25 - veor q10, q10, q6 - vtbl.8 d10, {q9}, d24 - vtbl.8 d11, {q9}, d25 - veor q11, q11, q7 - vtbl.8 d12, {q10}, d24 - vtbl.8 d13, {q10}, d25 - vtbl.8 d14, {q11}, d24 - vtbl.8 d15, {q11}, d25 -.Ldec_sbox: - veor q1, q1, q4 - veor q3, q3, q4 - - veor q4, q4, q7 - veor q1, q1, q6 - veor q2, q2, q7 - veor q6, q6, q4 - - veor q0, q0, q1 - veor q2, q2, q5 - veor q7, q7, q6 - veor q3, q3, q0 - veor q5, q5, q0 - veor q1, q1, q3 - veor q11, q3, q0 - veor q10, q7, q4 - veor q9, q1, q6 - veor q13, q4, q0 - vmov q8, q10 - veor q12, q5, q2 - - vorr q10, q10, q9 - veor q15, q11, q8 - vand q14, q11, q12 - vorr q11, q11, q12 - veor q12, q12, q9 - vand q8, q8, q9 - veor q9, q6, q2 - vand q15, q15, q12 - vand q13, q13, q9 - veor q9, q3, q7 - veor q12, q1, q5 - veor q11, q11, q13 - veor q10, q10, q13 - vand q13, q9, q12 - vorr q9, q9, q12 - veor q11, q11, q15 - veor q8, q8, q13 - veor q10, q10, q14 - veor q9, q9, q15 - veor q8, q8, q14 - vand q12, q4, q6 - veor q9, q9, q14 - vand q13, q0, q2 - vand q14, q7, q1 - vorr q15, q3, q5 - veor q11, q11, q12 - veor q9, q9, q14 - veor q8, q8, q15 - veor q10, q10, q13 - - @ Inv_GF16 0, 1, 2, 3, s0, s1, s2, s3 - - @ new smaller inversion - - vand q14, q11, q9 - vmov q12, q8 - - veor q13, q10, q14 - veor q15, q8, q14 - veor q14, q8, q14 @ q14=q15 - - vbsl q13, q9, q8 - vbsl q15, q11, q10 - veor q11, q11, q10 - - vbsl q12, q13, q14 - vbsl q8, q14, q13 - - vand q14, q12, q15 - veor q9, q9, q8 - - veor q14, q14, q11 - veor q12, q5, q2 - veor q8, q1, q6 - veor q10, q15, q14 - vand q10, q10, q5 - veor q5, q5, q1 - vand q11, q1, q15 - vand q5, q5, q14 - veor q1, q11, q10 - veor q5, q5, q11 - veor q15, q15, q13 - veor q14, q14, q9 - veor q11, q15, q14 - veor q10, q13, q9 - vand q11, q11, q12 - vand q10, q10, q2 - veor q12, q12, q8 - veor q2, q2, q6 - vand q8, q8, q15 - vand q6, q6, q13 - vand q12, q12, q14 - vand q2, q2, q9 - veor q8, q8, q12 - veor q2, q2, q6 - veor q12, q12, q11 - veor q6, q6, q10 - veor q5, q5, q12 - veor q2, q2, q12 - veor q1, q1, q8 - veor q6, q6, q8 - - veor q12, q3, q0 - veor q8, q7, q4 - veor q11, q15, q14 - veor q10, q13, q9 - vand q11, q11, q12 - vand q10, q10, q0 - veor q12, q12, q8 - veor q0, q0, q4 - vand q8, q8, q15 - vand q4, q4, q13 - vand q12, q12, q14 - vand q0, q0, q9 - veor q8, q8, q12 - veor q0, q0, q4 - veor q12, q12, q11 - veor q4, q4, q10 - veor q15, q15, q13 - veor q14, q14, q9 - veor q10, q15, q14 - vand q10, q10, q3 - veor q3, q3, q7 - vand q11, q7, q15 - vand q3, q3, q14 - veor q7, q11, q10 - veor q3, q3, q11 - veor q3, q3, q12 - veor q0, q0, q12 - veor q7, q7, q8 - veor q4, q4, q8 - veor q1, q1, q7 - veor q6, q6, q5 - - veor q4, q4, q1 - veor q2, q2, q7 - veor q5, q5, q7 - veor q4, q4, q2 - veor q7, q7, q0 - veor q4, q4, q5 - veor q3, q3, q6 - veor q6, q6, q1 - veor q3, q3, q4 - - veor q4, q4, q0 - veor q7, q7, q3 - subs r5,r5,#1 - bcc .Ldec_done - @ multiplication by 0x05-0x00-0x04-0x00 - vext.8 q8, q0, q0, #8 - vext.8 q14, q3, q3, #8 - vext.8 q15, q5, q5, #8 - veor q8, q8, q0 - vext.8 q9, q1, q1, #8 - veor q14, q14, q3 - vext.8 q10, q6, q6, #8 - veor q15, q15, q5 - vext.8 q11, q4, q4, #8 - veor q9, q9, q1 - vext.8 q12, q2, q2, #8 - veor q10, q10, q6 - vext.8 q13, q7, q7, #8 - veor q11, q11, q4 - veor q12, q12, q2 - veor q13, q13, q7 - - veor q0, q0, q14 - veor q1, q1, q14 - veor q6, q6, q8 - veor q2, q2, q10 - veor q4, q4, q9 - veor q1, q1, q15 - veor q6, q6, q15 - veor q2, q2, q14 - veor q7, q7, q11 - veor q4, q4, q14 - veor q3, q3, q12 - veor q2, q2, q15 - veor q7, q7, q15 - veor q5, q5, q13 - vext.8 q8, q0, q0, #12 @ x0 <<< 32 - vext.8 q9, q1, q1, #12 - veor q0, q0, q8 @ x0 ^ (x0 <<< 32) - vext.8 q10, q6, q6, #12 - veor q1, q1, q9 - vext.8 q11, q4, q4, #12 - veor q6, q6, q10 - vext.8 q12, q2, q2, #12 - veor q4, q4, q11 - vext.8 q13, q7, q7, #12 - veor q2, q2, q12 - vext.8 q14, q3, q3, #12 - veor q7, q7, q13 - vext.8 q15, q5, q5, #12 - veor q3, q3, q14 - - veor q9, q9, q0 - veor q5, q5, q15 - vext.8 q0, q0, q0, #8 @ (x0 ^ (x0 <<< 32)) <<< 64) - veor q10, q10, q1 - veor q8, q8, q5 - veor q9, q9, q5 - vext.8 q1, q1, q1, #8 - veor q13, q13, q2 - veor q0, q0, q8 - veor q14, q14, q7 - veor q1, q1, q9 - vext.8 q8, q2, q2, #8 - veor q12, q12, q4 - vext.8 q9, q7, q7, #8 - veor q15, q15, q3 - vext.8 q2, q4, q4, #8 - veor q11, q11, q6 - vext.8 q7, q5, q5, #8 - veor q12, q12, q5 - vext.8 q4, q3, q3, #8 - veor q11, q11, q5 - vext.8 q3, q6, q6, #8 - veor q5, q9, q13 - veor q11, q11, q2 - veor q7, q7, q15 - veor q6, q4, q14 - veor q4, q8, q12 - veor q2, q3, q10 - vmov q3, q11 - @ vmov q5, q9 - vldmia r6, {q12} @ .LISR - ite eq @ Thumb2 thing, sanity check in ARM - addeq r6,r6,#0x10 - bne .Ldec_loop - vldmia r6, {q12} @ .LISRM0 - b .Ldec_loop -.align 4 -.Ldec_done: - vmov.i8 q8,#0x55 @ compose .LBS0 - vmov.i8 q9,#0x33 @ compose .LBS1 - vshr.u64 q10, q3, #1 - vshr.u64 q11, q2, #1 - veor q10, q10, q5 - veor q11, q11, q7 - vand q10, q10, q8 - vand q11, q11, q8 - veor q5, q5, q10 - vshl.u64 q10, q10, #1 - veor q7, q7, q11 - vshl.u64 q11, q11, #1 - veor q3, q3, q10 - veor q2, q2, q11 - vshr.u64 q10, q6, #1 - vshr.u64 q11, q0, #1 - veor q10, q10, q4 - veor q11, q11, q1 - vand q10, q10, q8 - vand q11, q11, q8 - veor q4, q4, q10 - vshl.u64 q10, q10, #1 - veor q1, q1, q11 - vshl.u64 q11, q11, #1 - veor q6, q6, q10 - veor q0, q0, q11 - vmov.i8 q8,#0x0f @ compose .LBS2 - vshr.u64 q10, q7, #2 - vshr.u64 q11, q2, #2 - veor q10, q10, q5 - veor q11, q11, q3 - vand q10, q10, q9 - vand q11, q11, q9 - veor q5, q5, q10 - vshl.u64 q10, q10, #2 - veor q3, q3, q11 - vshl.u64 q11, q11, #2 - veor q7, q7, q10 - veor q2, q2, q11 - vshr.u64 q10, q1, #2 - vshr.u64 q11, q0, #2 - veor q10, q10, q4 - veor q11, q11, q6 - vand q10, q10, q9 - vand q11, q11, q9 - veor q4, q4, q10 - vshl.u64 q10, q10, #2 - veor q6, q6, q11 - vshl.u64 q11, q11, #2 - veor q1, q1, q10 - veor q0, q0, q11 - vshr.u64 q10, q4, #4 - vshr.u64 q11, q6, #4 - veor q10, q10, q5 - veor q11, q11, q3 - vand q10, q10, q8 - vand q11, q11, q8 - veor q5, q5, q10 - vshl.u64 q10, q10, #4 - veor q3, q3, q11 - vshl.u64 q11, q11, #4 - veor q4, q4, q10 - veor q6, q6, q11 - vshr.u64 q10, q1, #4 - vshr.u64 q11, q0, #4 - veor q10, q10, q7 - veor q11, q11, q2 - vand q10, q10, q8 - vand q11, q11, q8 - veor q7, q7, q10 - vshl.u64 q10, q10, #4 - veor q2, q2, q11 - vshl.u64 q11, q11, #4 - veor q1, q1, q10 - veor q0, q0, q11 - vldmia r4, {q8} @ last round key - veor q6, q6, q8 - veor q4, q4, q8 - veor q2, q2, q8 - veor q7, q7, q8 - veor q3, q3, q8 - veor q5, q5, q8 - veor q0, q0, q8 - veor q1, q1, q8 - bx lr -.size _bsaes_decrypt8,.-_bsaes_decrypt8 - -.type _bsaes_const,%object -.align 6 -_bsaes_const: -.LM0ISR: @ InvShiftRows constants - .quad 0x0a0e0206070b0f03, 0x0004080c0d010509 -.LISR: - .quad 0x0504070602010003, 0x0f0e0d0c080b0a09 -.LISRM0: - .quad 0x01040b0e0205080f, 0x0306090c00070a0d -.LM0SR: @ ShiftRows constants - .quad 0x0a0e02060f03070b, 0x0004080c05090d01 -.LSR: - .quad 0x0504070600030201, 0x0f0e0d0c0a09080b -.LSRM0: - .quad 0x0304090e00050a0f, 0x01060b0c0207080d -.LM0: - .quad 0x02060a0e03070b0f, 0x0004080c0105090d -.LREVM0SR: - .quad 0x090d01050c000408, 0x03070b0f060a0e02 -.asciz "Bit-sliced AES for NEON, CRYPTOGAMS by " -.align 6 -.size _bsaes_const,.-_bsaes_const - -.type _bsaes_encrypt8,%function -.align 4 -_bsaes_encrypt8: - adr r6,_bsaes_encrypt8 - vldmia r4!, {q9} @ round 0 key - sub r6,r6,#_bsaes_encrypt8-.LM0SR - - vldmia r6!, {q8} @ .LM0SR -_bsaes_encrypt8_alt: - veor q10, q0, q9 @ xor with round0 key - veor q11, q1, q9 - vtbl.8 d0, {q10}, d16 - vtbl.8 d1, {q10}, d17 - veor q12, q2, q9 - vtbl.8 d2, {q11}, d16 - vtbl.8 d3, {q11}, d17 - veor q13, q3, q9 - vtbl.8 d4, {q12}, d16 - vtbl.8 d5, {q12}, d17 - veor q14, q4, q9 - vtbl.8 d6, {q13}, d16 - vtbl.8 d7, {q13}, d17 - veor q15, q5, q9 - vtbl.8 d8, {q14}, d16 - vtbl.8 d9, {q14}, d17 - veor q10, q6, q9 - vtbl.8 d10, {q15}, d16 - vtbl.8 d11, {q15}, d17 - veor q11, q7, q9 - vtbl.8 d12, {q10}, d16 - vtbl.8 d13, {q10}, d17 - vtbl.8 d14, {q11}, d16 - vtbl.8 d15, {q11}, d17 -_bsaes_encrypt8_bitslice: - vmov.i8 q8,#0x55 @ compose .LBS0 - vmov.i8 q9,#0x33 @ compose .LBS1 - vshr.u64 q10, q6, #1 - vshr.u64 q11, q4, #1 - veor q10, q10, q7 - veor q11, q11, q5 - vand q10, q10, q8 - vand q11, q11, q8 - veor q7, q7, q10 - vshl.u64 q10, q10, #1 - veor q5, q5, q11 - vshl.u64 q11, q11, #1 - veor q6, q6, q10 - veor q4, q4, q11 - vshr.u64 q10, q2, #1 - vshr.u64 q11, q0, #1 - veor q10, q10, q3 - veor q11, q11, q1 - vand q10, q10, q8 - vand q11, q11, q8 - veor q3, q3, q10 - vshl.u64 q10, q10, #1 - veor q1, q1, q11 - vshl.u64 q11, q11, #1 - veor q2, q2, q10 - veor q0, q0, q11 - vmov.i8 q8,#0x0f @ compose .LBS2 - vshr.u64 q10, q5, #2 - vshr.u64 q11, q4, #2 - veor q10, q10, q7 - veor q11, q11, q6 - vand q10, q10, q9 - vand q11, q11, q9 - veor q7, q7, q10 - vshl.u64 q10, q10, #2 - veor q6, q6, q11 - vshl.u64 q11, q11, #2 - veor q5, q5, q10 - veor q4, q4, q11 - vshr.u64 q10, q1, #2 - vshr.u64 q11, q0, #2 - veor q10, q10, q3 - veor q11, q11, q2 - vand q10, q10, q9 - vand q11, q11, q9 - veor q3, q3, q10 - vshl.u64 q10, q10, #2 - veor q2, q2, q11 - vshl.u64 q11, q11, #2 - veor q1, q1, q10 - veor q0, q0, q11 - vshr.u64 q10, q3, #4 - vshr.u64 q11, q2, #4 - veor q10, q10, q7 - veor q11, q11, q6 - vand q10, q10, q8 - vand q11, q11, q8 - veor q7, q7, q10 - vshl.u64 q10, q10, #4 - veor q6, q6, q11 - vshl.u64 q11, q11, #4 - veor q3, q3, q10 - veor q2, q2, q11 - vshr.u64 q10, q1, #4 - vshr.u64 q11, q0, #4 - veor q10, q10, q5 - veor q11, q11, q4 - vand q10, q10, q8 - vand q11, q11, q8 - veor q5, q5, q10 - vshl.u64 q10, q10, #4 - veor q4, q4, q11 - vshl.u64 q11, q11, #4 - veor q1, q1, q10 - veor q0, q0, q11 - sub r5,r5,#1 - b .Lenc_sbox -.align 4 -.Lenc_loop: - vldmia r4!, {q8-q11} - veor q8, q8, q0 - veor q9, q9, q1 - vtbl.8 d0, {q8}, d24 - vtbl.8 d1, {q8}, d25 - vldmia r4!, {q8} - veor q10, q10, q2 - vtbl.8 d2, {q9}, d24 - vtbl.8 d3, {q9}, d25 - vldmia r4!, {q9} - veor q11, q11, q3 - vtbl.8 d4, {q10}, d24 - vtbl.8 d5, {q10}, d25 - vldmia r4!, {q10} - vtbl.8 d6, {q11}, d24 - vtbl.8 d7, {q11}, d25 - vldmia r4!, {q11} - veor q8, q8, q4 - veor q9, q9, q5 - vtbl.8 d8, {q8}, d24 - vtbl.8 d9, {q8}, d25 - veor q10, q10, q6 - vtbl.8 d10, {q9}, d24 - vtbl.8 d11, {q9}, d25 - veor q11, q11, q7 - vtbl.8 d12, {q10}, d24 - vtbl.8 d13, {q10}, d25 - vtbl.8 d14, {q11}, d24 - vtbl.8 d15, {q11}, d25 -.Lenc_sbox: - veor q2, q2, q1 - veor q5, q5, q6 - veor q3, q3, q0 - veor q6, q6, q2 - veor q5, q5, q0 - - veor q6, q6, q3 - veor q3, q3, q7 - veor q7, q7, q5 - veor q3, q3, q4 - veor q4, q4, q5 - - veor q2, q2, q7 - veor q3, q3, q1 - veor q1, q1, q5 - veor q11, q7, q4 - veor q10, q1, q2 - veor q9, q5, q3 - veor q13, q2, q4 - vmov q8, q10 - veor q12, q6, q0 - - vorr q10, q10, q9 - veor q15, q11, q8 - vand q14, q11, q12 - vorr q11, q11, q12 - veor q12, q12, q9 - vand q8, q8, q9 - veor q9, q3, q0 - vand q15, q15, q12 - vand q13, q13, q9 - veor q9, q7, q1 - veor q12, q5, q6 - veor q11, q11, q13 - veor q10, q10, q13 - vand q13, q9, q12 - vorr q9, q9, q12 - veor q11, q11, q15 - veor q8, q8, q13 - veor q10, q10, q14 - veor q9, q9, q15 - veor q8, q8, q14 - vand q12, q2, q3 - veor q9, q9, q14 - vand q13, q4, q0 - vand q14, q1, q5 - vorr q15, q7, q6 - veor q11, q11, q12 - veor q9, q9, q14 - veor q8, q8, q15 - veor q10, q10, q13 - - @ Inv_GF16 0, 1, 2, 3, s0, s1, s2, s3 - - @ new smaller inversion - - vand q14, q11, q9 - vmov q12, q8 - - veor q13, q10, q14 - veor q15, q8, q14 - veor q14, q8, q14 @ q14=q15 - - vbsl q13, q9, q8 - vbsl q15, q11, q10 - veor q11, q11, q10 - - vbsl q12, q13, q14 - vbsl q8, q14, q13 - - vand q14, q12, q15 - veor q9, q9, q8 - - veor q14, q14, q11 - veor q12, q6, q0 - veor q8, q5, q3 - veor q10, q15, q14 - vand q10, q10, q6 - veor q6, q6, q5 - vand q11, q5, q15 - vand q6, q6, q14 - veor q5, q11, q10 - veor q6, q6, q11 - veor q15, q15, q13 - veor q14, q14, q9 - veor q11, q15, q14 - veor q10, q13, q9 - vand q11, q11, q12 - vand q10, q10, q0 - veor q12, q12, q8 - veor q0, q0, q3 - vand q8, q8, q15 - vand q3, q3, q13 - vand q12, q12, q14 - vand q0, q0, q9 - veor q8, q8, q12 - veor q0, q0, q3 - veor q12, q12, q11 - veor q3, q3, q10 - veor q6, q6, q12 - veor q0, q0, q12 - veor q5, q5, q8 - veor q3, q3, q8 - - veor q12, q7, q4 - veor q8, q1, q2 - veor q11, q15, q14 - veor q10, q13, q9 - vand q11, q11, q12 - vand q10, q10, q4 - veor q12, q12, q8 - veor q4, q4, q2 - vand q8, q8, q15 - vand q2, q2, q13 - vand q12, q12, q14 - vand q4, q4, q9 - veor q8, q8, q12 - veor q4, q4, q2 - veor q12, q12, q11 - veor q2, q2, q10 - veor q15, q15, q13 - veor q14, q14, q9 - veor q10, q15, q14 - vand q10, q10, q7 - veor q7, q7, q1 - vand q11, q1, q15 - vand q7, q7, q14 - veor q1, q11, q10 - veor q7, q7, q11 - veor q7, q7, q12 - veor q4, q4, q12 - veor q1, q1, q8 - veor q2, q2, q8 - veor q7, q7, q0 - veor q1, q1, q6 - veor q6, q6, q0 - veor q4, q4, q7 - veor q0, q0, q1 - - veor q1, q1, q5 - veor q5, q5, q2 - veor q2, q2, q3 - veor q3, q3, q5 - veor q4, q4, q5 - - veor q6, q6, q3 - subs r5,r5,#1 - bcc .Lenc_done - vext.8 q8, q0, q0, #12 @ x0 <<< 32 - vext.8 q9, q1, q1, #12 - veor q0, q0, q8 @ x0 ^ (x0 <<< 32) - vext.8 q10, q4, q4, #12 - veor q1, q1, q9 - vext.8 q11, q6, q6, #12 - veor q4, q4, q10 - vext.8 q12, q3, q3, #12 - veor q6, q6, q11 - vext.8 q13, q7, q7, #12 - veor q3, q3, q12 - vext.8 q14, q2, q2, #12 - veor q7, q7, q13 - vext.8 q15, q5, q5, #12 - veor q2, q2, q14 - - veor q9, q9, q0 - veor q5, q5, q15 - vext.8 q0, q0, q0, #8 @ (x0 ^ (x0 <<< 32)) <<< 64) - veor q10, q10, q1 - veor q8, q8, q5 - veor q9, q9, q5 - vext.8 q1, q1, q1, #8 - veor q13, q13, q3 - veor q0, q0, q8 - veor q14, q14, q7 - veor q1, q1, q9 - vext.8 q8, q3, q3, #8 - veor q12, q12, q6 - vext.8 q9, q7, q7, #8 - veor q15, q15, q2 - vext.8 q3, q6, q6, #8 - veor q11, q11, q4 - vext.8 q7, q5, q5, #8 - veor q12, q12, q5 - vext.8 q6, q2, q2, #8 - veor q11, q11, q5 - vext.8 q2, q4, q4, #8 - veor q5, q9, q13 - veor q4, q8, q12 - veor q3, q3, q11 - veor q7, q7, q15 - veor q6, q6, q14 - @ vmov q4, q8 - veor q2, q2, q10 - @ vmov q5, q9 - vldmia r6, {q12} @ .LSR - ite eq @ Thumb2 thing, samity check in ARM - addeq r6,r6,#0x10 - bne .Lenc_loop - vldmia r6, {q12} @ .LSRM0 - b .Lenc_loop -.align 4 -.Lenc_done: - vmov.i8 q8,#0x55 @ compose .LBS0 - vmov.i8 q9,#0x33 @ compose .LBS1 - vshr.u64 q10, q2, #1 - vshr.u64 q11, q3, #1 - veor q10, q10, q5 - veor q11, q11, q7 - vand q10, q10, q8 - vand q11, q11, q8 - veor q5, q5, q10 - vshl.u64 q10, q10, #1 - veor q7, q7, q11 - vshl.u64 q11, q11, #1 - veor q2, q2, q10 - veor q3, q3, q11 - vshr.u64 q10, q4, #1 - vshr.u64 q11, q0, #1 - veor q10, q10, q6 - veor q11, q11, q1 - vand q10, q10, q8 - vand q11, q11, q8 - veor q6, q6, q10 - vshl.u64 q10, q10, #1 - veor q1, q1, q11 - vshl.u64 q11, q11, #1 - veor q4, q4, q10 - veor q0, q0, q11 - vmov.i8 q8,#0x0f @ compose .LBS2 - vshr.u64 q10, q7, #2 - vshr.u64 q11, q3, #2 - veor q10, q10, q5 - veor q11, q11, q2 - vand q10, q10, q9 - vand q11, q11, q9 - veor q5, q5, q10 - vshl.u64 q10, q10, #2 - veor q2, q2, q11 - vshl.u64 q11, q11, #2 - veor q7, q7, q10 - veor q3, q3, q11 - vshr.u64 q10, q1, #2 - vshr.u64 q11, q0, #2 - veor q10, q10, q6 - veor q11, q11, q4 - vand q10, q10, q9 - vand q11, q11, q9 - veor q6, q6, q10 - vshl.u64 q10, q10, #2 - veor q4, q4, q11 - vshl.u64 q11, q11, #2 - veor q1, q1, q10 - veor q0, q0, q11 - vshr.u64 q10, q6, #4 - vshr.u64 q11, q4, #4 - veor q10, q10, q5 - veor q11, q11, q2 - vand q10, q10, q8 - vand q11, q11, q8 - veor q5, q5, q10 - vshl.u64 q10, q10, #4 - veor q2, q2, q11 - vshl.u64 q11, q11, #4 - veor q6, q6, q10 - veor q4, q4, q11 - vshr.u64 q10, q1, #4 - vshr.u64 q11, q0, #4 - veor q10, q10, q7 - veor q11, q11, q3 - vand q10, q10, q8 - vand q11, q11, q8 - veor q7, q7, q10 - vshl.u64 q10, q10, #4 - veor q3, q3, q11 - vshl.u64 q11, q11, #4 - veor q1, q1, q10 - veor q0, q0, q11 - vldmia r4, {q8} @ last round key - veor q4, q4, q8 - veor q6, q6, q8 - veor q3, q3, q8 - veor q7, q7, q8 - veor q2, q2, q8 - veor q5, q5, q8 - veor q0, q0, q8 - veor q1, q1, q8 - bx lr -.size _bsaes_encrypt8,.-_bsaes_encrypt8 -.type _bsaes_key_convert,%function -.align 4 -_bsaes_key_convert: - adr r6,_bsaes_key_convert - vld1.8 {q7}, [r4]! @ load round 0 key - sub r6,r6,#_bsaes_key_convert-.LM0 - vld1.8 {q15}, [r4]! @ load round 1 key - - vmov.i8 q8, #0x01 @ bit masks - vmov.i8 q9, #0x02 - vmov.i8 q10, #0x04 - vmov.i8 q11, #0x08 - vmov.i8 q12, #0x10 - vmov.i8 q13, #0x20 - vldmia r6, {q14} @ .LM0 - -#ifdef __ARMEL__ - vrev32.8 q7, q7 - vrev32.8 q15, q15 -#endif - sub r5,r5,#1 - vstmia r12!, {q7} @ save round 0 key - b .Lkey_loop - -.align 4 -.Lkey_loop: - vtbl.8 d14,{q15},d28 - vtbl.8 d15,{q15},d29 - vmov.i8 q6, #0x40 - vmov.i8 q15, #0x80 - - vtst.8 q0, q7, q8 - vtst.8 q1, q7, q9 - vtst.8 q2, q7, q10 - vtst.8 q3, q7, q11 - vtst.8 q4, q7, q12 - vtst.8 q5, q7, q13 - vtst.8 q6, q7, q6 - vtst.8 q7, q7, q15 - vld1.8 {q15}, [r4]! @ load next round key - vmvn q0, q0 @ "pnot" - vmvn q1, q1 - vmvn q5, q5 - vmvn q6, q6 -#ifdef __ARMEL__ - vrev32.8 q15, q15 -#endif - subs r5,r5,#1 - vstmia r12!,{q0-q7} @ write bit-sliced round key - bne .Lkey_loop - - vmov.i8 q7,#0x63 @ compose .L63 - @ don't save last round key - bx lr -.size _bsaes_key_convert,.-_bsaes_key_convert -.extern AES_cbc_encrypt -.extern AES_decrypt - -.global bsaes_cbc_encrypt -.type bsaes_cbc_encrypt,%function -.align 5 -bsaes_cbc_encrypt: -#ifndef __KERNEL__ - cmp r2, #128 -#ifndef __thumb__ - blo AES_cbc_encrypt -#else - bhs 1f - b AES_cbc_encrypt -1: -#endif -#endif - - @ it is up to the caller to make sure we are called with enc == 0 - - mov ip, sp - stmdb sp!, {r4-r10, lr} - VFP_ABI_PUSH - ldr r8, [ip] @ IV is 1st arg on the stack - mov r2, r2, lsr#4 @ len in 16 byte blocks - sub sp, #0x10 @ scratch space to carry over the IV - mov r9, sp @ save sp - - ldr r10, [r3, #240] @ get # of rounds -#ifndef BSAES_ASM_EXTENDED_KEY - @ allocate the key schedule on the stack - sub r12, sp, r10, lsl#7 @ 128 bytes per inner round key - add r12, #96 @ sifze of bit-slices key schedule - - @ populate the key schedule - mov r4, r3 @ pass key - mov r5, r10 @ pass # of rounds - mov sp, r12 @ sp is sp - bl _bsaes_key_convert - vldmia sp, {q6} - vstmia r12, {q15} @ save last round key - veor q7, q7, q6 @ fix up round 0 key - vstmia sp, {q7} -#else - ldr r12, [r3, #244] - eors r12, #1 - beq 0f - - @ populate the key schedule - str r12, [r3, #244] - mov r4, r3 @ pass key - mov r5, r10 @ pass # of rounds - add r12, r3, #248 @ pass key schedule - bl _bsaes_key_convert - add r4, r3, #248 - vldmia r4, {q6} - vstmia r12, {q15} @ save last round key - veor q7, q7, q6 @ fix up round 0 key - vstmia r4, {q7} - -.align 2 -0: -#endif - - vld1.8 {q15}, [r8] @ load IV - b .Lcbc_dec_loop - -.align 4 -.Lcbc_dec_loop: - subs r2, r2, #0x8 - bmi .Lcbc_dec_loop_finish - - vld1.8 {q0-q1}, [r0]! @ load input - vld1.8 {q2-q3}, [r0]! -#ifndef BSAES_ASM_EXTENDED_KEY - mov r4, sp @ pass the key -#else - add r4, r3, #248 -#endif - vld1.8 {q4-q5}, [r0]! - mov r5, r10 - vld1.8 {q6-q7}, [r0] - sub r0, r0, #0x60 - vstmia r9, {q15} @ put aside IV - - bl _bsaes_decrypt8 - - vldmia r9, {q14} @ reload IV - vld1.8 {q8-q9}, [r0]! @ reload input - veor q0, q0, q14 @ ^= IV - vld1.8 {q10-q11}, [r0]! - veor q1, q1, q8 - veor q6, q6, q9 - vld1.8 {q12-q13}, [r0]! - veor q4, q4, q10 - veor q2, q2, q11 - vld1.8 {q14-q15}, [r0]! - veor q7, q7, q12 - vst1.8 {q0-q1}, [r1]! @ write output - veor q3, q3, q13 - vst1.8 {q6}, [r1]! - veor q5, q5, q14 - vst1.8 {q4}, [r1]! - vst1.8 {q2}, [r1]! - vst1.8 {q7}, [r1]! - vst1.8 {q3}, [r1]! - vst1.8 {q5}, [r1]! - - b .Lcbc_dec_loop - -.Lcbc_dec_loop_finish: - adds r2, r2, #8 - beq .Lcbc_dec_done - - vld1.8 {q0}, [r0]! @ load input - cmp r2, #2 - blo .Lcbc_dec_one - vld1.8 {q1}, [r0]! -#ifndef BSAES_ASM_EXTENDED_KEY - mov r4, sp @ pass the key -#else - add r4, r3, #248 -#endif - mov r5, r10 - vstmia r9, {q15} @ put aside IV - beq .Lcbc_dec_two - vld1.8 {q2}, [r0]! - cmp r2, #4 - blo .Lcbc_dec_three - vld1.8 {q3}, [r0]! - beq .Lcbc_dec_four - vld1.8 {q4}, [r0]! - cmp r2, #6 - blo .Lcbc_dec_five - vld1.8 {q5}, [r0]! - beq .Lcbc_dec_six - vld1.8 {q6}, [r0]! - sub r0, r0, #0x70 - - bl _bsaes_decrypt8 - - vldmia r9, {q14} @ reload IV - vld1.8 {q8-q9}, [r0]! @ reload input - veor q0, q0, q14 @ ^= IV - vld1.8 {q10-q11}, [r0]! - veor q1, q1, q8 - veor q6, q6, q9 - vld1.8 {q12-q13}, [r0]! - veor q4, q4, q10 - veor q2, q2, q11 - vld1.8 {q15}, [r0]! - veor q7, q7, q12 - vst1.8 {q0-q1}, [r1]! @ write output - veor q3, q3, q13 - vst1.8 {q6}, [r1]! - vst1.8 {q4}, [r1]! - vst1.8 {q2}, [r1]! - vst1.8 {q7}, [r1]! - vst1.8 {q3}, [r1]! - b .Lcbc_dec_done -.align 4 -.Lcbc_dec_six: - sub r0, r0, #0x60 - bl _bsaes_decrypt8 - vldmia r9,{q14} @ reload IV - vld1.8 {q8-q9}, [r0]! @ reload input - veor q0, q0, q14 @ ^= IV - vld1.8 {q10-q11}, [r0]! - veor q1, q1, q8 - veor q6, q6, q9 - vld1.8 {q12}, [r0]! - veor q4, q4, q10 - veor q2, q2, q11 - vld1.8 {q15}, [r0]! - veor q7, q7, q12 - vst1.8 {q0-q1}, [r1]! @ write output - vst1.8 {q6}, [r1]! - vst1.8 {q4}, [r1]! - vst1.8 {q2}, [r1]! - vst1.8 {q7}, [r1]! - b .Lcbc_dec_done -.align 4 -.Lcbc_dec_five: - sub r0, r0, #0x50 - bl _bsaes_decrypt8 - vldmia r9, {q14} @ reload IV - vld1.8 {q8-q9}, [r0]! @ reload input - veor q0, q0, q14 @ ^= IV - vld1.8 {q10-q11}, [r0]! - veor q1, q1, q8 - veor q6, q6, q9 - vld1.8 {q15}, [r0]! - veor q4, q4, q10 - vst1.8 {q0-q1}, [r1]! @ write output - veor q2, q2, q11 - vst1.8 {q6}, [r1]! - vst1.8 {q4}, [r1]! - vst1.8 {q2}, [r1]! - b .Lcbc_dec_done -.align 4 -.Lcbc_dec_four: - sub r0, r0, #0x40 - bl _bsaes_decrypt8 - vldmia r9, {q14} @ reload IV - vld1.8 {q8-q9}, [r0]! @ reload input - veor q0, q0, q14 @ ^= IV - vld1.8 {q10}, [r0]! - veor q1, q1, q8 - veor q6, q6, q9 - vld1.8 {q15}, [r0]! - veor q4, q4, q10 - vst1.8 {q0-q1}, [r1]! @ write output - vst1.8 {q6}, [r1]! - vst1.8 {q4}, [r1]! - b .Lcbc_dec_done -.align 4 -.Lcbc_dec_three: - sub r0, r0, #0x30 - bl _bsaes_decrypt8 - vldmia r9, {q14} @ reload IV - vld1.8 {q8-q9}, [r0]! @ reload input - veor q0, q0, q14 @ ^= IV - vld1.8 {q15}, [r0]! - veor q1, q1, q8 - veor q6, q6, q9 - vst1.8 {q0-q1}, [r1]! @ write output - vst1.8 {q6}, [r1]! - b .Lcbc_dec_done -.align 4 -.Lcbc_dec_two: - sub r0, r0, #0x20 - bl _bsaes_decrypt8 - vldmia r9, {q14} @ reload IV - vld1.8 {q8}, [r0]! @ reload input - veor q0, q0, q14 @ ^= IV - vld1.8 {q15}, [r0]! @ reload input - veor q1, q1, q8 - vst1.8 {q0-q1}, [r1]! @ write output - b .Lcbc_dec_done -.align 4 -.Lcbc_dec_one: - sub r0, r0, #0x10 - mov r10, r1 @ save original out pointer - mov r1, r9 @ use the iv scratch space as out buffer - mov r2, r3 - vmov q4,q15 @ just in case ensure that IV - vmov q5,q0 @ and input are preserved - bl AES_decrypt - vld1.8 {q0}, [r9,:64] @ load result - veor q0, q0, q4 @ ^= IV - vmov q15, q5 @ q5 holds input - vst1.8 {q0}, [r10] @ write output - -.Lcbc_dec_done: -#ifndef BSAES_ASM_EXTENDED_KEY - vmov.i32 q0, #0 - vmov.i32 q1, #0 -.Lcbc_dec_bzero: @ wipe key schedule [if any] - vstmia sp!, {q0-q1} - cmp sp, r9 - bne .Lcbc_dec_bzero -#endif - - mov sp, r9 - add sp, #0x10 @ add sp,r9,#0x10 is no good for thumb - vst1.8 {q15}, [r8] @ return IV - VFP_ABI_POP - ldmia sp!, {r4-r10, pc} -.size bsaes_cbc_encrypt,.-bsaes_cbc_encrypt -.extern AES_encrypt -.global bsaes_ctr32_encrypt_blocks -.type bsaes_ctr32_encrypt_blocks,%function -.align 5 -bsaes_ctr32_encrypt_blocks: - cmp r2, #8 @ use plain AES for - blo .Lctr_enc_short @ small sizes - - mov ip, sp - stmdb sp!, {r4-r10, lr} - VFP_ABI_PUSH - ldr r8, [ip] @ ctr is 1st arg on the stack - sub sp, sp, #0x10 @ scratch space to carry over the ctr - mov r9, sp @ save sp - - ldr r10, [r3, #240] @ get # of rounds -#ifndef BSAES_ASM_EXTENDED_KEY - @ allocate the key schedule on the stack - sub r12, sp, r10, lsl#7 @ 128 bytes per inner round key - add r12, #96 @ size of bit-sliced key schedule - - @ populate the key schedule - mov r4, r3 @ pass key - mov r5, r10 @ pass # of rounds - mov sp, r12 @ sp is sp - bl _bsaes_key_convert - veor q7,q7,q15 @ fix up last round key - vstmia r12, {q7} @ save last round key - - vld1.8 {q0}, [r8] @ load counter - add r8, r6, #.LREVM0SR-.LM0 @ borrow r8 - vldmia sp, {q4} @ load round0 key -#else - ldr r12, [r3, #244] - eors r12, #1 - beq 0f - - @ populate the key schedule - str r12, [r3, #244] - mov r4, r3 @ pass key - mov r5, r10 @ pass # of rounds - add r12, r3, #248 @ pass key schedule - bl _bsaes_key_convert - veor q7,q7,q15 @ fix up last round key - vstmia r12, {q7} @ save last round key - -.align 2 -0: add r12, r3, #248 - vld1.8 {q0}, [r8] @ load counter - adrl r8, .LREVM0SR @ borrow r8 - vldmia r12, {q4} @ load round0 key - sub sp, #0x10 @ place for adjusted round0 key -#endif - - vmov.i32 q8,#1 @ compose 1<<96 - veor q9,q9,q9 - vrev32.8 q0,q0 - vext.8 q8,q9,q8,#4 - vrev32.8 q4,q4 - vadd.u32 q9,q8,q8 @ compose 2<<96 - vstmia sp, {q4} @ save adjusted round0 key - b .Lctr_enc_loop - -.align 4 -.Lctr_enc_loop: - vadd.u32 q10, q8, q9 @ compose 3<<96 - vadd.u32 q1, q0, q8 @ +1 - vadd.u32 q2, q0, q9 @ +2 - vadd.u32 q3, q0, q10 @ +3 - vadd.u32 q4, q1, q10 - vadd.u32 q5, q2, q10 - vadd.u32 q6, q3, q10 - vadd.u32 q7, q4, q10 - vadd.u32 q10, q5, q10 @ next counter - - @ Borrow prologue from _bsaes_encrypt8 to use the opportunity - @ to flip byte order in 32-bit counter - - vldmia sp, {q9} @ load round0 key -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x10 @ pass next round key -#else - add r4, r3, #264 -#endif - vldmia r8, {q8} @ .LREVM0SR - mov r5, r10 @ pass rounds - vstmia r9, {q10} @ save next counter - sub r6, r8, #.LREVM0SR-.LSR @ pass constants - - bl _bsaes_encrypt8_alt - - subs r2, r2, #8 - blo .Lctr_enc_loop_done - - vld1.8 {q8-q9}, [r0]! @ load input - vld1.8 {q10-q11}, [r0]! - veor q0, q8 - veor q1, q9 - vld1.8 {q12-q13}, [r0]! - veor q4, q10 - veor q6, q11 - vld1.8 {q14-q15}, [r0]! - veor q3, q12 - vst1.8 {q0-q1}, [r1]! @ write output - veor q7, q13 - veor q2, q14 - vst1.8 {q4}, [r1]! - veor q5, q15 - vst1.8 {q6}, [r1]! - vmov.i32 q8, #1 @ compose 1<<96 - vst1.8 {q3}, [r1]! - veor q9, q9, q9 - vst1.8 {q7}, [r1]! - vext.8 q8, q9, q8, #4 - vst1.8 {q2}, [r1]! - vadd.u32 q9,q8,q8 @ compose 2<<96 - vst1.8 {q5}, [r1]! - vldmia r9, {q0} @ load counter - - bne .Lctr_enc_loop - b .Lctr_enc_done - -.align 4 -.Lctr_enc_loop_done: - add r2, r2, #8 - vld1.8 {q8}, [r0]! @ load input - veor q0, q8 - vst1.8 {q0}, [r1]! @ write output - cmp r2, #2 - blo .Lctr_enc_done - vld1.8 {q9}, [r0]! - veor q1, q9 - vst1.8 {q1}, [r1]! - beq .Lctr_enc_done - vld1.8 {q10}, [r0]! - veor q4, q10 - vst1.8 {q4}, [r1]! - cmp r2, #4 - blo .Lctr_enc_done - vld1.8 {q11}, [r0]! - veor q6, q11 - vst1.8 {q6}, [r1]! - beq .Lctr_enc_done - vld1.8 {q12}, [r0]! - veor q3, q12 - vst1.8 {q3}, [r1]! - cmp r2, #6 - blo .Lctr_enc_done - vld1.8 {q13}, [r0]! - veor q7, q13 - vst1.8 {q7}, [r1]! - beq .Lctr_enc_done - vld1.8 {q14}, [r0] - veor q2, q14 - vst1.8 {q2}, [r1]! - -.Lctr_enc_done: - vmov.i32 q0, #0 - vmov.i32 q1, #0 -#ifndef BSAES_ASM_EXTENDED_KEY -.Lctr_enc_bzero: @ wipe key schedule [if any] - vstmia sp!, {q0-q1} - cmp sp, r9 - bne .Lctr_enc_bzero -#else - vstmia sp, {q0-q1} -#endif - - mov sp, r9 - add sp, #0x10 @ add sp,r9,#0x10 is no good for thumb - VFP_ABI_POP - ldmia sp!, {r4-r10, pc} @ return - -.align 4 -.Lctr_enc_short: - ldr ip, [sp] @ ctr pointer is passed on stack - stmdb sp!, {r4-r8, lr} - - mov r4, r0 @ copy arguments - mov r5, r1 - mov r6, r2 - mov r7, r3 - ldr r8, [ip, #12] @ load counter LSW - vld1.8 {q1}, [ip] @ load whole counter value -#ifdef __ARMEL__ - rev r8, r8 -#endif - sub sp, sp, #0x10 - vst1.8 {q1}, [sp,:64] @ copy counter value - sub sp, sp, #0x10 - -.Lctr_enc_short_loop: - add r0, sp, #0x10 @ input counter value - mov r1, sp @ output on the stack - mov r2, r7 @ key - - bl AES_encrypt - - vld1.8 {q0}, [r4]! @ load input - vld1.8 {q1}, [sp,:64] @ load encrypted counter - add r8, r8, #1 -#ifdef __ARMEL__ - rev r0, r8 - str r0, [sp, #0x1c] @ next counter value -#else - str r8, [sp, #0x1c] @ next counter value -#endif - veor q0,q0,q1 - vst1.8 {q0}, [r5]! @ store output - subs r6, r6, #1 - bne .Lctr_enc_short_loop - - vmov.i32 q0, #0 - vmov.i32 q1, #0 - vstmia sp!, {q0-q1} - - ldmia sp!, {r4-r8, pc} -.size bsaes_ctr32_encrypt_blocks,.-bsaes_ctr32_encrypt_blocks -.globl bsaes_xts_encrypt -.type bsaes_xts_encrypt,%function -.align 4 -bsaes_xts_encrypt: - mov ip, sp - stmdb sp!, {r4-r10, lr} @ 0x20 - VFP_ABI_PUSH - mov r6, sp @ future r3 - - mov r7, r0 - mov r8, r1 - mov r9, r2 - mov r10, r3 - - sub r0, sp, #0x10 @ 0x10 - bic r0, #0xf @ align at 16 bytes - mov sp, r0 - -#ifdef XTS_CHAIN_TWEAK - ldr r0, [ip] @ pointer to input tweak -#else - @ generate initial tweak - ldr r0, [ip, #4] @ iv[] - mov r1, sp - ldr r2, [ip, #0] @ key2 - bl AES_encrypt - mov r0,sp @ pointer to initial tweak -#endif - - ldr r1, [r10, #240] @ get # of rounds - mov r3, r6 -#ifndef BSAES_ASM_EXTENDED_KEY - @ allocate the key schedule on the stack - sub r12, sp, r1, lsl#7 @ 128 bytes per inner round key - @ add r12, #96 @ size of bit-sliced key schedule - sub r12, #48 @ place for tweak[9] - - @ populate the key schedule - mov r4, r10 @ pass key - mov r5, r1 @ pass # of rounds - mov sp, r12 - add r12, #0x90 @ pass key schedule - bl _bsaes_key_convert - veor q7, q7, q15 @ fix up last round key - vstmia r12, {q7} @ save last round key -#else - ldr r12, [r10, #244] - eors r12, #1 - beq 0f - - str r12, [r10, #244] - mov r4, r10 @ pass key - mov r5, r1 @ pass # of rounds - add r12, r10, #248 @ pass key schedule - bl _bsaes_key_convert - veor q7, q7, q15 @ fix up last round key - vstmia r12, {q7} - -.align 2 -0: sub sp, #0x90 @ place for tweak[9] -#endif - - vld1.8 {q8}, [r0] @ initial tweak - adr r2, .Lxts_magic - - subs r9, #0x80 - blo .Lxts_enc_short - b .Lxts_enc_loop - -.align 4 -.Lxts_enc_loop: - vldmia r2, {q5} @ load XTS magic - vshr.s64 q6, q8, #63 - mov r0, sp - vand q6, q6, q5 - vadd.u64 q9, q8, q8 - vst1.64 {q8}, [r0,:128]! - vswp d13,d12 - vshr.s64 q7, q9, #63 - veor q9, q9, q6 - vand q7, q7, q5 - vadd.u64 q10, q9, q9 - vst1.64 {q9}, [r0,:128]! - vswp d15,d14 - vshr.s64 q6, q10, #63 - veor q10, q10, q7 - vand q6, q6, q5 - vld1.8 {q0}, [r7]! - vadd.u64 q11, q10, q10 - vst1.64 {q10}, [r0,:128]! - vswp d13,d12 - vshr.s64 q7, q11, #63 - veor q11, q11, q6 - vand q7, q7, q5 - vld1.8 {q1}, [r7]! - veor q0, q0, q8 - vadd.u64 q12, q11, q11 - vst1.64 {q11}, [r0,:128]! - vswp d15,d14 - vshr.s64 q6, q12, #63 - veor q12, q12, q7 - vand q6, q6, q5 - vld1.8 {q2}, [r7]! - veor q1, q1, q9 - vadd.u64 q13, q12, q12 - vst1.64 {q12}, [r0,:128]! - vswp d13,d12 - vshr.s64 q7, q13, #63 - veor q13, q13, q6 - vand q7, q7, q5 - vld1.8 {q3}, [r7]! - veor q2, q2, q10 - vadd.u64 q14, q13, q13 - vst1.64 {q13}, [r0,:128]! - vswp d15,d14 - vshr.s64 q6, q14, #63 - veor q14, q14, q7 - vand q6, q6, q5 - vld1.8 {q4}, [r7]! - veor q3, q3, q11 - vadd.u64 q15, q14, q14 - vst1.64 {q14}, [r0,:128]! - vswp d13,d12 - vshr.s64 q7, q15, #63 - veor q15, q15, q6 - vand q7, q7, q5 - vld1.8 {q5}, [r7]! - veor q4, q4, q12 - vadd.u64 q8, q15, q15 - vst1.64 {q15}, [r0,:128]! - vswp d15,d14 - veor q8, q8, q7 - vst1.64 {q8}, [r0,:128] @ next round tweak - - vld1.8 {q6-q7}, [r7]! - veor q5, q5, q13 -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x90 @ pass key schedule -#else - add r4, r10, #248 @ pass key schedule -#endif - veor q6, q6, q14 - mov r5, r1 @ pass rounds - veor q7, q7, q15 - mov r0, sp - - bl _bsaes_encrypt8 - - vld1.64 {q8-q9}, [r0,:128]! - vld1.64 {q10-q11}, [r0,:128]! - veor q0, q0, q8 - vld1.64 {q12-q13}, [r0,:128]! - veor q1, q1, q9 - veor q8, q4, q10 - vst1.8 {q0-q1}, [r8]! - veor q9, q6, q11 - vld1.64 {q14-q15}, [r0,:128]! - veor q10, q3, q12 - vst1.8 {q8-q9}, [r8]! - veor q11, q7, q13 - veor q12, q2, q14 - vst1.8 {q10-q11}, [r8]! - veor q13, q5, q15 - vst1.8 {q12-q13}, [r8]! - - vld1.64 {q8}, [r0,:128] @ next round tweak - - subs r9, #0x80 - bpl .Lxts_enc_loop - -.Lxts_enc_short: - adds r9, #0x70 - bmi .Lxts_enc_done - - vldmia r2, {q5} @ load XTS magic - vshr.s64 q7, q8, #63 - mov r0, sp - vand q7, q7, q5 - vadd.u64 q9, q8, q8 - vst1.64 {q8}, [r0,:128]! - vswp d15,d14 - vshr.s64 q6, q9, #63 - veor q9, q9, q7 - vand q6, q6, q5 - vadd.u64 q10, q9, q9 - vst1.64 {q9}, [r0,:128]! - vswp d13,d12 - vshr.s64 q7, q10, #63 - veor q10, q10, q6 - vand q7, q7, q5 - vld1.8 {q0}, [r7]! - subs r9, #0x10 - bmi .Lxts_enc_1 - vadd.u64 q11, q10, q10 - vst1.64 {q10}, [r0,:128]! - vswp d15,d14 - vshr.s64 q6, q11, #63 - veor q11, q11, q7 - vand q6, q6, q5 - vld1.8 {q1}, [r7]! - subs r9, #0x10 - bmi .Lxts_enc_2 - veor q0, q0, q8 - vadd.u64 q12, q11, q11 - vst1.64 {q11}, [r0,:128]! - vswp d13,d12 - vshr.s64 q7, q12, #63 - veor q12, q12, q6 - vand q7, q7, q5 - vld1.8 {q2}, [r7]! - subs r9, #0x10 - bmi .Lxts_enc_3 - veor q1, q1, q9 - vadd.u64 q13, q12, q12 - vst1.64 {q12}, [r0,:128]! - vswp d15,d14 - vshr.s64 q6, q13, #63 - veor q13, q13, q7 - vand q6, q6, q5 - vld1.8 {q3}, [r7]! - subs r9, #0x10 - bmi .Lxts_enc_4 - veor q2, q2, q10 - vadd.u64 q14, q13, q13 - vst1.64 {q13}, [r0,:128]! - vswp d13,d12 - vshr.s64 q7, q14, #63 - veor q14, q14, q6 - vand q7, q7, q5 - vld1.8 {q4}, [r7]! - subs r9, #0x10 - bmi .Lxts_enc_5 - veor q3, q3, q11 - vadd.u64 q15, q14, q14 - vst1.64 {q14}, [r0,:128]! - vswp d15,d14 - vshr.s64 q6, q15, #63 - veor q15, q15, q7 - vand q6, q6, q5 - vld1.8 {q5}, [r7]! - subs r9, #0x10 - bmi .Lxts_enc_6 - veor q4, q4, q12 - sub r9, #0x10 - vst1.64 {q15}, [r0,:128] @ next round tweak - - vld1.8 {q6}, [r7]! - veor q5, q5, q13 -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x90 @ pass key schedule -#else - add r4, r10, #248 @ pass key schedule -#endif - veor q6, q6, q14 - mov r5, r1 @ pass rounds - mov r0, sp - - bl _bsaes_encrypt8 - - vld1.64 {q8-q9}, [r0,:128]! - vld1.64 {q10-q11}, [r0,:128]! - veor q0, q0, q8 - vld1.64 {q12-q13}, [r0,:128]! - veor q1, q1, q9 - veor q8, q4, q10 - vst1.8 {q0-q1}, [r8]! - veor q9, q6, q11 - vld1.64 {q14}, [r0,:128]! - veor q10, q3, q12 - vst1.8 {q8-q9}, [r8]! - veor q11, q7, q13 - veor q12, q2, q14 - vst1.8 {q10-q11}, [r8]! - vst1.8 {q12}, [r8]! - - vld1.64 {q8}, [r0,:128] @ next round tweak - b .Lxts_enc_done -.align 4 -.Lxts_enc_6: - vst1.64 {q14}, [r0,:128] @ next round tweak - - veor q4, q4, q12 -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x90 @ pass key schedule -#else - add r4, r10, #248 @ pass key schedule -#endif - veor q5, q5, q13 - mov r5, r1 @ pass rounds - mov r0, sp - - bl _bsaes_encrypt8 - - vld1.64 {q8-q9}, [r0,:128]! - vld1.64 {q10-q11}, [r0,:128]! - veor q0, q0, q8 - vld1.64 {q12-q13}, [r0,:128]! - veor q1, q1, q9 - veor q8, q4, q10 - vst1.8 {q0-q1}, [r8]! - veor q9, q6, q11 - veor q10, q3, q12 - vst1.8 {q8-q9}, [r8]! - veor q11, q7, q13 - vst1.8 {q10-q11}, [r8]! - - vld1.64 {q8}, [r0,:128] @ next round tweak - b .Lxts_enc_done - -@ put this in range for both ARM and Thumb mode adr instructions -.align 5 -.Lxts_magic: - .quad 1, 0x87 - -.align 5 -.Lxts_enc_5: - vst1.64 {q13}, [r0,:128] @ next round tweak - - veor q3, q3, q11 -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x90 @ pass key schedule -#else - add r4, r10, #248 @ pass key schedule -#endif - veor q4, q4, q12 - mov r5, r1 @ pass rounds - mov r0, sp - - bl _bsaes_encrypt8 - - vld1.64 {q8-q9}, [r0,:128]! - vld1.64 {q10-q11}, [r0,:128]! - veor q0, q0, q8 - vld1.64 {q12}, [r0,:128]! - veor q1, q1, q9 - veor q8, q4, q10 - vst1.8 {q0-q1}, [r8]! - veor q9, q6, q11 - veor q10, q3, q12 - vst1.8 {q8-q9}, [r8]! - vst1.8 {q10}, [r8]! - - vld1.64 {q8}, [r0,:128] @ next round tweak - b .Lxts_enc_done -.align 4 -.Lxts_enc_4: - vst1.64 {q12}, [r0,:128] @ next round tweak - - veor q2, q2, q10 -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x90 @ pass key schedule -#else - add r4, r10, #248 @ pass key schedule -#endif - veor q3, q3, q11 - mov r5, r1 @ pass rounds - mov r0, sp - - bl _bsaes_encrypt8 - - vld1.64 {q8-q9}, [r0,:128]! - vld1.64 {q10-q11}, [r0,:128]! - veor q0, q0, q8 - veor q1, q1, q9 - veor q8, q4, q10 - vst1.8 {q0-q1}, [r8]! - veor q9, q6, q11 - vst1.8 {q8-q9}, [r8]! - - vld1.64 {q8}, [r0,:128] @ next round tweak - b .Lxts_enc_done -.align 4 -.Lxts_enc_3: - vst1.64 {q11}, [r0,:128] @ next round tweak - - veor q1, q1, q9 -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x90 @ pass key schedule -#else - add r4, r10, #248 @ pass key schedule -#endif - veor q2, q2, q10 - mov r5, r1 @ pass rounds - mov r0, sp - - bl _bsaes_encrypt8 - - vld1.64 {q8-q9}, [r0,:128]! - vld1.64 {q10}, [r0,:128]! - veor q0, q0, q8 - veor q1, q1, q9 - veor q8, q4, q10 - vst1.8 {q0-q1}, [r8]! - vst1.8 {q8}, [r8]! - - vld1.64 {q8}, [r0,:128] @ next round tweak - b .Lxts_enc_done -.align 4 -.Lxts_enc_2: - vst1.64 {q10}, [r0,:128] @ next round tweak - - veor q0, q0, q8 -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x90 @ pass key schedule -#else - add r4, r10, #248 @ pass key schedule -#endif - veor q1, q1, q9 - mov r5, r1 @ pass rounds - mov r0, sp - - bl _bsaes_encrypt8 - - vld1.64 {q8-q9}, [r0,:128]! - veor q0, q0, q8 - veor q1, q1, q9 - vst1.8 {q0-q1}, [r8]! - - vld1.64 {q8}, [r0,:128] @ next round tweak - b .Lxts_enc_done -.align 4 -.Lxts_enc_1: - mov r0, sp - veor q0, q8 - mov r1, sp - vst1.8 {q0}, [sp,:128] - mov r2, r10 - mov r4, r3 @ preserve fp - - bl AES_encrypt - - vld1.8 {q0}, [sp,:128] - veor q0, q0, q8 - vst1.8 {q0}, [r8]! - mov r3, r4 - - vmov q8, q9 @ next round tweak - -.Lxts_enc_done: -#ifndef XTS_CHAIN_TWEAK - adds r9, #0x10 - beq .Lxts_enc_ret - sub r6, r8, #0x10 - -.Lxts_enc_steal: - ldrb r0, [r7], #1 - ldrb r1, [r8, #-0x10] - strb r0, [r8, #-0x10] - strb r1, [r8], #1 - - subs r9, #1 - bhi .Lxts_enc_steal - - vld1.8 {q0}, [r6] - mov r0, sp - veor q0, q0, q8 - mov r1, sp - vst1.8 {q0}, [sp,:128] - mov r2, r10 - mov r4, r3 @ preserve fp - - bl AES_encrypt - - vld1.8 {q0}, [sp,:128] - veor q0, q0, q8 - vst1.8 {q0}, [r6] - mov r3, r4 -#endif - -.Lxts_enc_ret: - bic r0, r3, #0xf - vmov.i32 q0, #0 - vmov.i32 q1, #0 -#ifdef XTS_CHAIN_TWEAK - ldr r1, [r3, #0x20+VFP_ABI_FRAME] @ chain tweak -#endif -.Lxts_enc_bzero: @ wipe key schedule [if any] - vstmia sp!, {q0-q1} - cmp sp, r0 - bne .Lxts_enc_bzero - - mov sp, r3 -#ifdef XTS_CHAIN_TWEAK - vst1.8 {q8}, [r1] -#endif - VFP_ABI_POP - ldmia sp!, {r4-r10, pc} @ return - -.size bsaes_xts_encrypt,.-bsaes_xts_encrypt - -.globl bsaes_xts_decrypt -.type bsaes_xts_decrypt,%function -.align 4 -bsaes_xts_decrypt: - mov ip, sp - stmdb sp!, {r4-r10, lr} @ 0x20 - VFP_ABI_PUSH - mov r6, sp @ future r3 - - mov r7, r0 - mov r8, r1 - mov r9, r2 - mov r10, r3 - - sub r0, sp, #0x10 @ 0x10 - bic r0, #0xf @ align at 16 bytes - mov sp, r0 - -#ifdef XTS_CHAIN_TWEAK - ldr r0, [ip] @ pointer to input tweak -#else - @ generate initial tweak - ldr r0, [ip, #4] @ iv[] - mov r1, sp - ldr r2, [ip, #0] @ key2 - bl AES_encrypt - mov r0, sp @ pointer to initial tweak -#endif - - ldr r1, [r10, #240] @ get # of rounds - mov r3, r6 -#ifndef BSAES_ASM_EXTENDED_KEY - @ allocate the key schedule on the stack - sub r12, sp, r1, lsl#7 @ 128 bytes per inner round key - @ add r12, #96 @ size of bit-sliced key schedule - sub r12, #48 @ place for tweak[9] - - @ populate the key schedule - mov r4, r10 @ pass key - mov r5, r1 @ pass # of rounds - mov sp, r12 - add r12, #0x90 @ pass key schedule - bl _bsaes_key_convert - add r4, sp, #0x90 - vldmia r4, {q6} - vstmia r12, {q15} @ save last round key - veor q7, q7, q6 @ fix up round 0 key - vstmia r4, {q7} -#else - ldr r12, [r10, #244] - eors r12, #1 - beq 0f - - str r12, [r10, #244] - mov r4, r10 @ pass key - mov r5, r1 @ pass # of rounds - add r12, r10, #248 @ pass key schedule - bl _bsaes_key_convert - add r4, r10, #248 - vldmia r4, {q6} - vstmia r12, {q15} @ save last round key - veor q7, q7, q6 @ fix up round 0 key - vstmia r4, {q7} - -.align 2 -0: sub sp, #0x90 @ place for tweak[9] -#endif - vld1.8 {q8}, [r0] @ initial tweak - adr r2, .Lxts_magic - - tst r9, #0xf @ if not multiple of 16 - it ne @ Thumb2 thing, sanity check in ARM - subne r9, #0x10 @ subtract another 16 bytes - subs r9, #0x80 - - blo .Lxts_dec_short - b .Lxts_dec_loop - -.align 4 -.Lxts_dec_loop: - vldmia r2, {q5} @ load XTS magic - vshr.s64 q6, q8, #63 - mov r0, sp - vand q6, q6, q5 - vadd.u64 q9, q8, q8 - vst1.64 {q8}, [r0,:128]! - vswp d13,d12 - vshr.s64 q7, q9, #63 - veor q9, q9, q6 - vand q7, q7, q5 - vadd.u64 q10, q9, q9 - vst1.64 {q9}, [r0,:128]! - vswp d15,d14 - vshr.s64 q6, q10, #63 - veor q10, q10, q7 - vand q6, q6, q5 - vld1.8 {q0}, [r7]! - vadd.u64 q11, q10, q10 - vst1.64 {q10}, [r0,:128]! - vswp d13,d12 - vshr.s64 q7, q11, #63 - veor q11, q11, q6 - vand q7, q7, q5 - vld1.8 {q1}, [r7]! - veor q0, q0, q8 - vadd.u64 q12, q11, q11 - vst1.64 {q11}, [r0,:128]! - vswp d15,d14 - vshr.s64 q6, q12, #63 - veor q12, q12, q7 - vand q6, q6, q5 - vld1.8 {q2}, [r7]! - veor q1, q1, q9 - vadd.u64 q13, q12, q12 - vst1.64 {q12}, [r0,:128]! - vswp d13,d12 - vshr.s64 q7, q13, #63 - veor q13, q13, q6 - vand q7, q7, q5 - vld1.8 {q3}, [r7]! - veor q2, q2, q10 - vadd.u64 q14, q13, q13 - vst1.64 {q13}, [r0,:128]! - vswp d15,d14 - vshr.s64 q6, q14, #63 - veor q14, q14, q7 - vand q6, q6, q5 - vld1.8 {q4}, [r7]! - veor q3, q3, q11 - vadd.u64 q15, q14, q14 - vst1.64 {q14}, [r0,:128]! - vswp d13,d12 - vshr.s64 q7, q15, #63 - veor q15, q15, q6 - vand q7, q7, q5 - vld1.8 {q5}, [r7]! - veor q4, q4, q12 - vadd.u64 q8, q15, q15 - vst1.64 {q15}, [r0,:128]! - vswp d15,d14 - veor q8, q8, q7 - vst1.64 {q8}, [r0,:128] @ next round tweak - - vld1.8 {q6-q7}, [r7]! - veor q5, q5, q13 -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x90 @ pass key schedule -#else - add r4, r10, #248 @ pass key schedule -#endif - veor q6, q6, q14 - mov r5, r1 @ pass rounds - veor q7, q7, q15 - mov r0, sp - - bl _bsaes_decrypt8 - - vld1.64 {q8-q9}, [r0,:128]! - vld1.64 {q10-q11}, [r0,:128]! - veor q0, q0, q8 - vld1.64 {q12-q13}, [r0,:128]! - veor q1, q1, q9 - veor q8, q6, q10 - vst1.8 {q0-q1}, [r8]! - veor q9, q4, q11 - vld1.64 {q14-q15}, [r0,:128]! - veor q10, q2, q12 - vst1.8 {q8-q9}, [r8]! - veor q11, q7, q13 - veor q12, q3, q14 - vst1.8 {q10-q11}, [r8]! - veor q13, q5, q15 - vst1.8 {q12-q13}, [r8]! - - vld1.64 {q8}, [r0,:128] @ next round tweak - - subs r9, #0x80 - bpl .Lxts_dec_loop - -.Lxts_dec_short: - adds r9, #0x70 - bmi .Lxts_dec_done - - vldmia r2, {q5} @ load XTS magic - vshr.s64 q7, q8, #63 - mov r0, sp - vand q7, q7, q5 - vadd.u64 q9, q8, q8 - vst1.64 {q8}, [r0,:128]! - vswp d15,d14 - vshr.s64 q6, q9, #63 - veor q9, q9, q7 - vand q6, q6, q5 - vadd.u64 q10, q9, q9 - vst1.64 {q9}, [r0,:128]! - vswp d13,d12 - vshr.s64 q7, q10, #63 - veor q10, q10, q6 - vand q7, q7, q5 - vld1.8 {q0}, [r7]! - subs r9, #0x10 - bmi .Lxts_dec_1 - vadd.u64 q11, q10, q10 - vst1.64 {q10}, [r0,:128]! - vswp d15,d14 - vshr.s64 q6, q11, #63 - veor q11, q11, q7 - vand q6, q6, q5 - vld1.8 {q1}, [r7]! - subs r9, #0x10 - bmi .Lxts_dec_2 - veor q0, q0, q8 - vadd.u64 q12, q11, q11 - vst1.64 {q11}, [r0,:128]! - vswp d13,d12 - vshr.s64 q7, q12, #63 - veor q12, q12, q6 - vand q7, q7, q5 - vld1.8 {q2}, [r7]! - subs r9, #0x10 - bmi .Lxts_dec_3 - veor q1, q1, q9 - vadd.u64 q13, q12, q12 - vst1.64 {q12}, [r0,:128]! - vswp d15,d14 - vshr.s64 q6, q13, #63 - veor q13, q13, q7 - vand q6, q6, q5 - vld1.8 {q3}, [r7]! - subs r9, #0x10 - bmi .Lxts_dec_4 - veor q2, q2, q10 - vadd.u64 q14, q13, q13 - vst1.64 {q13}, [r0,:128]! - vswp d13,d12 - vshr.s64 q7, q14, #63 - veor q14, q14, q6 - vand q7, q7, q5 - vld1.8 {q4}, [r7]! - subs r9, #0x10 - bmi .Lxts_dec_5 - veor q3, q3, q11 - vadd.u64 q15, q14, q14 - vst1.64 {q14}, [r0,:128]! - vswp d15,d14 - vshr.s64 q6, q15, #63 - veor q15, q15, q7 - vand q6, q6, q5 - vld1.8 {q5}, [r7]! - subs r9, #0x10 - bmi .Lxts_dec_6 - veor q4, q4, q12 - sub r9, #0x10 - vst1.64 {q15}, [r0,:128] @ next round tweak - - vld1.8 {q6}, [r7]! - veor q5, q5, q13 -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x90 @ pass key schedule -#else - add r4, r10, #248 @ pass key schedule -#endif - veor q6, q6, q14 - mov r5, r1 @ pass rounds - mov r0, sp - - bl _bsaes_decrypt8 - - vld1.64 {q8-q9}, [r0,:128]! - vld1.64 {q10-q11}, [r0,:128]! - veor q0, q0, q8 - vld1.64 {q12-q13}, [r0,:128]! - veor q1, q1, q9 - veor q8, q6, q10 - vst1.8 {q0-q1}, [r8]! - veor q9, q4, q11 - vld1.64 {q14}, [r0,:128]! - veor q10, q2, q12 - vst1.8 {q8-q9}, [r8]! - veor q11, q7, q13 - veor q12, q3, q14 - vst1.8 {q10-q11}, [r8]! - vst1.8 {q12}, [r8]! - - vld1.64 {q8}, [r0,:128] @ next round tweak - b .Lxts_dec_done -.align 4 -.Lxts_dec_6: - vst1.64 {q14}, [r0,:128] @ next round tweak - - veor q4, q4, q12 -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x90 @ pass key schedule -#else - add r4, r10, #248 @ pass key schedule -#endif - veor q5, q5, q13 - mov r5, r1 @ pass rounds - mov r0, sp - - bl _bsaes_decrypt8 - - vld1.64 {q8-q9}, [r0,:128]! - vld1.64 {q10-q11}, [r0,:128]! - veor q0, q0, q8 - vld1.64 {q12-q13}, [r0,:128]! - veor q1, q1, q9 - veor q8, q6, q10 - vst1.8 {q0-q1}, [r8]! - veor q9, q4, q11 - veor q10, q2, q12 - vst1.8 {q8-q9}, [r8]! - veor q11, q7, q13 - vst1.8 {q10-q11}, [r8]! - - vld1.64 {q8}, [r0,:128] @ next round tweak - b .Lxts_dec_done -.align 4 -.Lxts_dec_5: - vst1.64 {q13}, [r0,:128] @ next round tweak - - veor q3, q3, q11 -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x90 @ pass key schedule -#else - add r4, r10, #248 @ pass key schedule -#endif - veor q4, q4, q12 - mov r5, r1 @ pass rounds - mov r0, sp - - bl _bsaes_decrypt8 - - vld1.64 {q8-q9}, [r0,:128]! - vld1.64 {q10-q11}, [r0,:128]! - veor q0, q0, q8 - vld1.64 {q12}, [r0,:128]! - veor q1, q1, q9 - veor q8, q6, q10 - vst1.8 {q0-q1}, [r8]! - veor q9, q4, q11 - veor q10, q2, q12 - vst1.8 {q8-q9}, [r8]! - vst1.8 {q10}, [r8]! - - vld1.64 {q8}, [r0,:128] @ next round tweak - b .Lxts_dec_done -.align 4 -.Lxts_dec_4: - vst1.64 {q12}, [r0,:128] @ next round tweak - - veor q2, q2, q10 -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x90 @ pass key schedule -#else - add r4, r10, #248 @ pass key schedule -#endif - veor q3, q3, q11 - mov r5, r1 @ pass rounds - mov r0, sp - - bl _bsaes_decrypt8 - - vld1.64 {q8-q9}, [r0,:128]! - vld1.64 {q10-q11}, [r0,:128]! - veor q0, q0, q8 - veor q1, q1, q9 - veor q8, q6, q10 - vst1.8 {q0-q1}, [r8]! - veor q9, q4, q11 - vst1.8 {q8-q9}, [r8]! - - vld1.64 {q8}, [r0,:128] @ next round tweak - b .Lxts_dec_done -.align 4 -.Lxts_dec_3: - vst1.64 {q11}, [r0,:128] @ next round tweak - - veor q1, q1, q9 -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x90 @ pass key schedule -#else - add r4, r10, #248 @ pass key schedule -#endif - veor q2, q2, q10 - mov r5, r1 @ pass rounds - mov r0, sp - - bl _bsaes_decrypt8 - - vld1.64 {q8-q9}, [r0,:128]! - vld1.64 {q10}, [r0,:128]! - veor q0, q0, q8 - veor q1, q1, q9 - veor q8, q6, q10 - vst1.8 {q0-q1}, [r8]! - vst1.8 {q8}, [r8]! - - vld1.64 {q8}, [r0,:128] @ next round tweak - b .Lxts_dec_done -.align 4 -.Lxts_dec_2: - vst1.64 {q10}, [r0,:128] @ next round tweak - - veor q0, q0, q8 -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x90 @ pass key schedule -#else - add r4, r10, #248 @ pass key schedule -#endif - veor q1, q1, q9 - mov r5, r1 @ pass rounds - mov r0, sp - - bl _bsaes_decrypt8 - - vld1.64 {q8-q9}, [r0,:128]! - veor q0, q0, q8 - veor q1, q1, q9 - vst1.8 {q0-q1}, [r8]! - - vld1.64 {q8}, [r0,:128] @ next round tweak - b .Lxts_dec_done -.align 4 -.Lxts_dec_1: - mov r0, sp - veor q0, q8 - mov r1, sp - vst1.8 {q0}, [sp,:128] - mov r2, r10 - mov r4, r3 @ preserve fp - mov r5, r2 @ preserve magic - - bl AES_decrypt - - vld1.8 {q0}, [sp,:128] - veor q0, q0, q8 - vst1.8 {q0}, [r8]! - mov r3, r4 - mov r2, r5 - - vmov q8, q9 @ next round tweak - -.Lxts_dec_done: -#ifndef XTS_CHAIN_TWEAK - adds r9, #0x10 - beq .Lxts_dec_ret - - @ calculate one round of extra tweak for the stolen ciphertext - vldmia r2, {q5} - vshr.s64 q6, q8, #63 - vand q6, q6, q5 - vadd.u64 q9, q8, q8 - vswp d13,d12 - veor q9, q9, q6 - - @ perform the final decryption with the last tweak value - vld1.8 {q0}, [r7]! - mov r0, sp - veor q0, q0, q9 - mov r1, sp - vst1.8 {q0}, [sp,:128] - mov r2, r10 - mov r4, r3 @ preserve fp - - bl AES_decrypt - - vld1.8 {q0}, [sp,:128] - veor q0, q0, q9 - vst1.8 {q0}, [r8] - - mov r6, r8 -.Lxts_dec_steal: - ldrb r1, [r8] - ldrb r0, [r7], #1 - strb r1, [r8, #0x10] - strb r0, [r8], #1 - - subs r9, #1 - bhi .Lxts_dec_steal - - vld1.8 {q0}, [r6] - mov r0, sp - veor q0, q8 - mov r1, sp - vst1.8 {q0}, [sp,:128] - mov r2, r10 - - bl AES_decrypt - - vld1.8 {q0}, [sp,:128] - veor q0, q0, q8 - vst1.8 {q0}, [r6] - mov r3, r4 -#endif - -.Lxts_dec_ret: - bic r0, r3, #0xf - vmov.i32 q0, #0 - vmov.i32 q1, #0 -#ifdef XTS_CHAIN_TWEAK - ldr r1, [r3, #0x20+VFP_ABI_FRAME] @ chain tweak -#endif -.Lxts_dec_bzero: @ wipe key schedule [if any] - vstmia sp!, {q0-q1} - cmp sp, r0 - bne .Lxts_dec_bzero - - mov sp, r3 -#ifdef XTS_CHAIN_TWEAK - vst1.8 {q8}, [r1] -#endif - VFP_ABI_POP - ldmia sp!, {r4-r10, pc} @ return - -.size bsaes_xts_decrypt,.-bsaes_xts_decrypt -#endif diff --git a/arch/arm/crypto/aesbs-glue.c b/arch/arm/crypto/aesbs-glue.c deleted file mode 100644 index 15468fbbdea3..000000000000 --- a/arch/arm/crypto/aesbs-glue.c +++ /dev/null @@ -1,434 +0,0 @@ -/* - * linux/arch/arm/crypto/aesbs-glue.c - glue code for NEON bit sliced AES - * - * Copyright (C) 2013 Linaro Ltd - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include - -#include "aes_glue.h" - -#define BIT_SLICED_KEY_MAXSIZE (128 * (AES_MAXNR - 1) + 2 * AES_BLOCK_SIZE) - -struct BS_KEY { - struct AES_KEY rk; - int converted; - u8 __aligned(8) bs[BIT_SLICED_KEY_MAXSIZE]; -} __aligned(8); - -asmlinkage void bsaes_enc_key_convert(u8 out[], struct AES_KEY const *in); -asmlinkage void bsaes_dec_key_convert(u8 out[], struct AES_KEY const *in); - -asmlinkage void bsaes_cbc_encrypt(u8 const in[], u8 out[], u32 bytes, - struct BS_KEY *key, u8 iv[]); - -asmlinkage void bsaes_ctr32_encrypt_blocks(u8 const in[], u8 out[], u32 blocks, - struct BS_KEY *key, u8 const iv[]); - -asmlinkage void bsaes_xts_encrypt(u8 const in[], u8 out[], u32 bytes, - struct BS_KEY *key, u8 tweak[]); - -asmlinkage void bsaes_xts_decrypt(u8 const in[], u8 out[], u32 bytes, - struct BS_KEY *key, u8 tweak[]); - -struct aesbs_cbc_ctx { - struct AES_KEY enc; - struct BS_KEY dec; -}; - -struct aesbs_ctr_ctx { - struct BS_KEY enc; -}; - -struct aesbs_xts_ctx { - struct BS_KEY enc; - struct BS_KEY dec; - struct AES_KEY twkey; -}; - -static int aesbs_cbc_set_key(struct crypto_tfm *tfm, const u8 *in_key, - unsigned int key_len) -{ - struct aesbs_cbc_ctx *ctx = crypto_tfm_ctx(tfm); - int bits = key_len * 8; - - if (private_AES_set_encrypt_key(in_key, bits, &ctx->enc)) { - tfm->crt_flags |= CRYPTO_TFM_RES_BAD_KEY_LEN; - return -EINVAL; - } - ctx->dec.rk = ctx->enc; - private_AES_set_decrypt_key(in_key, bits, &ctx->dec.rk); - ctx->dec.converted = 0; - return 0; -} - -static int aesbs_ctr_set_key(struct crypto_tfm *tfm, const u8 *in_key, - unsigned int key_len) -{ - struct aesbs_ctr_ctx *ctx = crypto_tfm_ctx(tfm); - int bits = key_len * 8; - - if (private_AES_set_encrypt_key(in_key, bits, &ctx->enc.rk)) { - tfm->crt_flags |= CRYPTO_TFM_RES_BAD_KEY_LEN; - return -EINVAL; - } - ctx->enc.converted = 0; - return 0; -} - -static int aesbs_xts_set_key(struct crypto_tfm *tfm, const u8 *in_key, - unsigned int key_len) -{ - struct aesbs_xts_ctx *ctx = crypto_tfm_ctx(tfm); - int bits = key_len * 4; - - if (private_AES_set_encrypt_key(in_key, bits, &ctx->enc.rk)) { - tfm->crt_flags |= CRYPTO_TFM_RES_BAD_KEY_LEN; - return -EINVAL; - } - ctx->dec.rk = ctx->enc.rk; - private_AES_set_decrypt_key(in_key, bits, &ctx->dec.rk); - private_AES_set_encrypt_key(in_key + key_len / 2, bits, &ctx->twkey); - ctx->enc.converted = ctx->dec.converted = 0; - return 0; -} - -static int aesbs_cbc_encrypt(struct blkcipher_desc *desc, - struct scatterlist *dst, - struct scatterlist *src, unsigned int nbytes) -{ - struct aesbs_cbc_ctx *ctx = crypto_blkcipher_ctx(desc->tfm); - struct blkcipher_walk walk; - int err; - - blkcipher_walk_init(&walk, dst, src, nbytes); - err = blkcipher_walk_virt(desc, &walk); - - while (walk.nbytes) { - u32 blocks = walk.nbytes / AES_BLOCK_SIZE; - u8 *src = walk.src.virt.addr; - - if (walk.dst.virt.addr == walk.src.virt.addr) { - u8 *iv = walk.iv; - - do { - crypto_xor(src, iv, AES_BLOCK_SIZE); - AES_encrypt(src, src, &ctx->enc); - iv = src; - src += AES_BLOCK_SIZE; - } while (--blocks); - memcpy(walk.iv, iv, AES_BLOCK_SIZE); - } else { - u8 *dst = walk.dst.virt.addr; - - do { - crypto_xor(walk.iv, src, AES_BLOCK_SIZE); - AES_encrypt(walk.iv, dst, &ctx->enc); - memcpy(walk.iv, dst, AES_BLOCK_SIZE); - src += AES_BLOCK_SIZE; - dst += AES_BLOCK_SIZE; - } while (--blocks); - } - err = blkcipher_walk_done(desc, &walk, walk.nbytes % AES_BLOCK_SIZE); - } - return err; -} - -static int aesbs_cbc_decrypt(struct blkcipher_desc *desc, - struct scatterlist *dst, - struct scatterlist *src, unsigned int nbytes) -{ - struct aesbs_cbc_ctx *ctx = crypto_blkcipher_ctx(desc->tfm); - struct blkcipher_walk walk; - int err; - - blkcipher_walk_init(&walk, dst, src, nbytes); - err = blkcipher_walk_virt_block(desc, &walk, 8 * AES_BLOCK_SIZE); - - while ((walk.nbytes / AES_BLOCK_SIZE) >= 8) { - kernel_neon_begin(); - bsaes_cbc_encrypt(walk.src.virt.addr, walk.dst.virt.addr, - walk.nbytes, &ctx->dec, walk.iv); - kernel_neon_end(); - err = blkcipher_walk_done(desc, &walk, walk.nbytes % AES_BLOCK_SIZE); - } - while (walk.nbytes) { - u32 blocks = walk.nbytes / AES_BLOCK_SIZE; - u8 *dst = walk.dst.virt.addr; - u8 *src = walk.src.virt.addr; - u8 bk[2][AES_BLOCK_SIZE]; - u8 *iv = walk.iv; - - do { - if (walk.dst.virt.addr == walk.src.virt.addr) - memcpy(bk[blocks & 1], src, AES_BLOCK_SIZE); - - AES_decrypt(src, dst, &ctx->dec.rk); - crypto_xor(dst, iv, AES_BLOCK_SIZE); - - if (walk.dst.virt.addr == walk.src.virt.addr) - iv = bk[blocks & 1]; - else - iv = src; - - dst += AES_BLOCK_SIZE; - src += AES_BLOCK_SIZE; - } while (--blocks); - err = blkcipher_walk_done(desc, &walk, walk.nbytes % AES_BLOCK_SIZE); - } - return err; -} - -static void inc_be128_ctr(__be32 ctr[], u32 addend) -{ - int i; - - for (i = 3; i >= 0; i--, addend = 1) { - u32 n = be32_to_cpu(ctr[i]) + addend; - - ctr[i] = cpu_to_be32(n); - if (n >= addend) - break; - } -} - -static int aesbs_ctr_encrypt(struct blkcipher_desc *desc, - struct scatterlist *dst, struct scatterlist *src, - unsigned int nbytes) -{ - struct aesbs_ctr_ctx *ctx = crypto_blkcipher_ctx(desc->tfm); - struct blkcipher_walk walk; - u32 blocks; - int err; - - blkcipher_walk_init(&walk, dst, src, nbytes); - err = blkcipher_walk_virt_block(desc, &walk, 8 * AES_BLOCK_SIZE); - - while ((blocks = walk.nbytes / AES_BLOCK_SIZE)) { - u32 tail = walk.nbytes % AES_BLOCK_SIZE; - __be32 *ctr = (__be32 *)walk.iv; - u32 headroom = UINT_MAX - be32_to_cpu(ctr[3]); - - /* avoid 32 bit counter overflow in the NEON code */ - if (unlikely(headroom < blocks)) { - blocks = headroom + 1; - tail = walk.nbytes - blocks * AES_BLOCK_SIZE; - } - kernel_neon_begin(); - bsaes_ctr32_encrypt_blocks(walk.src.virt.addr, - walk.dst.virt.addr, blocks, - &ctx->enc, walk.iv); - kernel_neon_end(); - inc_be128_ctr(ctr, blocks); - - nbytes -= blocks * AES_BLOCK_SIZE; - if (nbytes && nbytes == tail && nbytes <= AES_BLOCK_SIZE) - break; - - err = blkcipher_walk_done(desc, &walk, tail); - } - if (walk.nbytes) { - u8 *tdst = walk.dst.virt.addr + blocks * AES_BLOCK_SIZE; - u8 *tsrc = walk.src.virt.addr + blocks * AES_BLOCK_SIZE; - u8 ks[AES_BLOCK_SIZE]; - - AES_encrypt(walk.iv, ks, &ctx->enc.rk); - if (tdst != tsrc) - memcpy(tdst, tsrc, nbytes); - crypto_xor(tdst, ks, nbytes); - err = blkcipher_walk_done(desc, &walk, 0); - } - return err; -} - -static int aesbs_xts_encrypt(struct blkcipher_desc *desc, - struct scatterlist *dst, - struct scatterlist *src, unsigned int nbytes) -{ - struct aesbs_xts_ctx *ctx = crypto_blkcipher_ctx(desc->tfm); - struct blkcipher_walk walk; - int err; - - blkcipher_walk_init(&walk, dst, src, nbytes); - err = blkcipher_walk_virt_block(desc, &walk, 8 * AES_BLOCK_SIZE); - - /* generate the initial tweak */ - AES_encrypt(walk.iv, walk.iv, &ctx->twkey); - - while (walk.nbytes) { - kernel_neon_begin(); - bsaes_xts_encrypt(walk.src.virt.addr, walk.dst.virt.addr, - walk.nbytes, &ctx->enc, walk.iv); - kernel_neon_end(); - err = blkcipher_walk_done(desc, &walk, walk.nbytes % AES_BLOCK_SIZE); - } - return err; -} - -static int aesbs_xts_decrypt(struct blkcipher_desc *desc, - struct scatterlist *dst, - struct scatterlist *src, unsigned int nbytes) -{ - struct aesbs_xts_ctx *ctx = crypto_blkcipher_ctx(desc->tfm); - struct blkcipher_walk walk; - int err; - - blkcipher_walk_init(&walk, dst, src, nbytes); - err = blkcipher_walk_virt_block(desc, &walk, 8 * AES_BLOCK_SIZE); - - /* generate the initial tweak */ - AES_encrypt(walk.iv, walk.iv, &ctx->twkey); - - while (walk.nbytes) { - kernel_neon_begin(); - bsaes_xts_decrypt(walk.src.virt.addr, walk.dst.virt.addr, - walk.nbytes, &ctx->dec, walk.iv); - kernel_neon_end(); - err = blkcipher_walk_done(desc, &walk, walk.nbytes % AES_BLOCK_SIZE); - } - return err; -} - -static struct crypto_alg aesbs_algs[] = { { - .cra_name = "__cbc-aes-neonbs", - .cra_driver_name = "__driver-cbc-aes-neonbs", - .cra_priority = 0, - .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER, - .cra_blocksize = AES_BLOCK_SIZE, - .cra_ctxsize = sizeof(struct aesbs_cbc_ctx), - .cra_alignmask = 7, - .cra_type = &crypto_blkcipher_type, - .cra_module = THIS_MODULE, - .cra_blkcipher = { - .min_keysize = AES_MIN_KEY_SIZE, - .max_keysize = AES_MAX_KEY_SIZE, - .ivsize = AES_BLOCK_SIZE, - .setkey = aesbs_cbc_set_key, - .encrypt = aesbs_cbc_encrypt, - .decrypt = aesbs_cbc_decrypt, - }, -}, { - .cra_name = "__ctr-aes-neonbs", - .cra_driver_name = "__driver-ctr-aes-neonbs", - .cra_priority = 0, - .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER, - .cra_blocksize = 1, - .cra_ctxsize = sizeof(struct aesbs_ctr_ctx), - .cra_alignmask = 7, - .cra_type = &crypto_blkcipher_type, - .cra_module = THIS_MODULE, - .cra_blkcipher = { - .min_keysize = AES_MIN_KEY_SIZE, - .max_keysize = AES_MAX_KEY_SIZE, - .ivsize = AES_BLOCK_SIZE, - .setkey = aesbs_ctr_set_key, - .encrypt = aesbs_ctr_encrypt, - .decrypt = aesbs_ctr_encrypt, - }, -}, { - .cra_name = "__xts-aes-neonbs", - .cra_driver_name = "__driver-xts-aes-neonbs", - .cra_priority = 0, - .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER, - .cra_blocksize = AES_BLOCK_SIZE, - .cra_ctxsize = sizeof(struct aesbs_xts_ctx), - .cra_alignmask = 7, - .cra_type = &crypto_blkcipher_type, - .cra_module = THIS_MODULE, - .cra_blkcipher = { - .min_keysize = 2 * AES_MIN_KEY_SIZE, - .max_keysize = 2 * AES_MAX_KEY_SIZE, - .ivsize = AES_BLOCK_SIZE, - .setkey = aesbs_xts_set_key, - .encrypt = aesbs_xts_encrypt, - .decrypt = aesbs_xts_decrypt, - }, -}, { - .cra_name = "cbc(aes)", - .cra_driver_name = "cbc-aes-neonbs", - .cra_priority = 300, - .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC, - .cra_blocksize = AES_BLOCK_SIZE, - .cra_ctxsize = sizeof(struct async_helper_ctx), - .cra_alignmask = 7, - .cra_type = &crypto_ablkcipher_type, - .cra_module = THIS_MODULE, - .cra_init = ablk_init, - .cra_exit = ablk_exit, - .cra_ablkcipher = { - .min_keysize = AES_MIN_KEY_SIZE, - .max_keysize = AES_MAX_KEY_SIZE, - .ivsize = AES_BLOCK_SIZE, - .setkey = ablk_set_key, - .encrypt = __ablk_encrypt, - .decrypt = ablk_decrypt, - } -}, { - .cra_name = "ctr(aes)", - .cra_driver_name = "ctr-aes-neonbs", - .cra_priority = 300, - .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC, - .cra_blocksize = 1, - .cra_ctxsize = sizeof(struct async_helper_ctx), - .cra_alignmask = 7, - .cra_type = &crypto_ablkcipher_type, - .cra_module = THIS_MODULE, - .cra_init = ablk_init, - .cra_exit = ablk_exit, - .cra_ablkcipher = { - .min_keysize = AES_MIN_KEY_SIZE, - .max_keysize = AES_MAX_KEY_SIZE, - .ivsize = AES_BLOCK_SIZE, - .setkey = ablk_set_key, - .encrypt = ablk_encrypt, - .decrypt = ablk_decrypt, - } -}, { - .cra_name = "xts(aes)", - .cra_driver_name = "xts-aes-neonbs", - .cra_priority = 300, - .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC, - .cra_blocksize = AES_BLOCK_SIZE, - .cra_ctxsize = sizeof(struct async_helper_ctx), - .cra_alignmask = 7, - .cra_type = &crypto_ablkcipher_type, - .cra_module = THIS_MODULE, - .cra_init = ablk_init, - .cra_exit = ablk_exit, - .cra_ablkcipher = { - .min_keysize = 2 * AES_MIN_KEY_SIZE, - .max_keysize = 2 * AES_MAX_KEY_SIZE, - .ivsize = AES_BLOCK_SIZE, - .setkey = ablk_set_key, - .encrypt = ablk_encrypt, - .decrypt = ablk_decrypt, - } -} }; - -static int __init aesbs_mod_init(void) -{ - if (!cpu_has_neon()) - return -ENODEV; - - return crypto_register_algs(aesbs_algs, ARRAY_SIZE(aesbs_algs)); -} - -static void __exit aesbs_mod_exit(void) -{ - crypto_unregister_algs(aesbs_algs, ARRAY_SIZE(aesbs_algs)); -} - -module_init(aesbs_mod_init); -module_exit(aesbs_mod_exit); - -MODULE_DESCRIPTION("Bit sliced AES in CBC/CTR/XTS modes using NEON"); -MODULE_AUTHOR("Ard Biesheuvel "); -MODULE_LICENSE("GPL"); diff --git a/arch/arm/crypto/bsaes-armv7.pl b/arch/arm/crypto/bsaes-armv7.pl deleted file mode 100644 index be068db960ee..000000000000 --- a/arch/arm/crypto/bsaes-armv7.pl +++ /dev/null @@ -1,2467 +0,0 @@ -#!/usr/bin/env perl - -# ==================================================================== -# Written by Andy Polyakov for the OpenSSL -# project. The module is, however, dual licensed under OpenSSL and -# CRYPTOGAMS licenses depending on where you obtain it. For further -# details see http://www.openssl.org/~appro/cryptogams/. -# -# Specific modes and adaptation for Linux kernel by Ard Biesheuvel -# . Permission to use under GPL terms is -# granted. -# ==================================================================== - -# Bit-sliced AES for ARM NEON -# -# February 2012. -# -# This implementation is direct adaptation of bsaes-x86_64 module for -# ARM NEON. Except that this module is endian-neutral [in sense that -# it can be compiled for either endianness] by courtesy of vld1.8's -# neutrality. Initial version doesn't implement interface to OpenSSL, -# only low-level primitives and unsupported entry points, just enough -# to collect performance results, which for Cortex-A8 core are: -# -# encrypt 19.5 cycles per byte processed with 128-bit key -# decrypt 22.1 cycles per byte processed with 128-bit key -# key conv. 440 cycles per 128-bit key/0.18 of 8x block -# -# Snapdragon S4 encrypts byte in 17.6 cycles and decrypts in 19.7, -# which is [much] worse than anticipated (for further details see -# http://www.openssl.org/~appro/Snapdragon-S4.html). -# -# Cortex-A15 manages in 14.2/16.1 cycles [when integer-only code -# manages in 20.0 cycles]. -# -# When comparing to x86_64 results keep in mind that NEON unit is -# [mostly] single-issue and thus can't [fully] benefit from -# instruction-level parallelism. And when comparing to aes-armv4 -# results keep in mind key schedule conversion overhead (see -# bsaes-x86_64.pl for further details)... -# -# - -# April-August 2013 -# -# Add CBC, CTR and XTS subroutines, adapt for kernel use. -# -# - -while (($output=shift) && ($output!~/^\w[\w\-]*\.\w+$/)) {} -open STDOUT,">$output"; - -my ($inp,$out,$len,$key)=("r0","r1","r2","r3"); -my @XMM=map("q$_",(0..15)); - -{ -my ($key,$rounds,$const)=("r4","r5","r6"); - -sub Dlo() { shift=~m|q([1]?[0-9])|?"d".($1*2):""; } -sub Dhi() { shift=~m|q([1]?[0-9])|?"d".($1*2+1):""; } - -sub Sbox { -# input in lsb > [b0, b1, b2, b3, b4, b5, b6, b7] < msb -# output in lsb > [b0, b1, b4, b6, b3, b7, b2, b5] < msb -my @b=@_[0..7]; -my @t=@_[8..11]; -my @s=@_[12..15]; - &InBasisChange (@b); - &Inv_GF256 (@b[6,5,0,3,7,1,4,2],@t,@s); - &OutBasisChange (@b[7,1,4,2,6,5,0,3]); -} - -sub InBasisChange { -# input in lsb > [b0, b1, b2, b3, b4, b5, b6, b7] < msb -# output in lsb > [b6, b5, b0, b3, b7, b1, b4, b2] < msb -my @b=@_[0..7]; -$code.=<<___; - veor @b[2], @b[2], @b[1] - veor @b[5], @b[5], @b[6] - veor @b[3], @b[3], @b[0] - veor @b[6], @b[6], @b[2] - veor @b[5], @b[5], @b[0] - - veor @b[6], @b[6], @b[3] - veor @b[3], @b[3], @b[7] - veor @b[7], @b[7], @b[5] - veor @b[3], @b[3], @b[4] - veor @b[4], @b[4], @b[5] - - veor @b[2], @b[2], @b[7] - veor @b[3], @b[3], @b[1] - veor @b[1], @b[1], @b[5] -___ -} - -sub OutBasisChange { -# input in lsb > [b0, b1, b2, b3, b4, b5, b6, b7] < msb -# output in lsb > [b6, b1, b2, b4, b7, b0, b3, b5] < msb -my @b=@_[0..7]; -$code.=<<___; - veor @b[0], @b[0], @b[6] - veor @b[1], @b[1], @b[4] - veor @b[4], @b[4], @b[6] - veor @b[2], @b[2], @b[0] - veor @b[6], @b[6], @b[1] - - veor @b[1], @b[1], @b[5] - veor @b[5], @b[5], @b[3] - veor @b[3], @b[3], @b[7] - veor @b[7], @b[7], @b[5] - veor @b[2], @b[2], @b[5] - - veor @b[4], @b[4], @b[7] -___ -} - -sub InvSbox { -# input in lsb > [b0, b1, b2, b3, b4, b5, b6, b7] < msb -# output in lsb > [b0, b1, b6, b4, b2, b7, b3, b5] < msb -my @b=@_[0..7]; -my @t=@_[8..11]; -my @s=@_[12..15]; - &InvInBasisChange (@b); - &Inv_GF256 (@b[5,1,2,6,3,7,0,4],@t,@s); - &InvOutBasisChange (@b[3,7,0,4,5,1,2,6]); -} - -sub InvInBasisChange { # OutBasisChange in reverse (with twist) -my @b=@_[5,1,2,6,3,7,0,4]; -$code.=<<___ - veor @b[1], @b[1], @b[7] - veor @b[4], @b[4], @b[7] - - veor @b[7], @b[7], @b[5] - veor @b[1], @b[1], @b[3] - veor @b[2], @b[2], @b[5] - veor @b[3], @b[3], @b[7] - - veor @b[6], @b[6], @b[1] - veor @b[2], @b[2], @b[0] - veor @b[5], @b[5], @b[3] - veor @b[4], @b[4], @b[6] - veor @b[0], @b[0], @b[6] - veor @b[1], @b[1], @b[4] -___ -} - -sub InvOutBasisChange { # InBasisChange in reverse -my @b=@_[2,5,7,3,6,1,0,4]; -$code.=<<___; - veor @b[1], @b[1], @b[5] - veor @b[2], @b[2], @b[7] - - veor @b[3], @b[3], @b[1] - veor @b[4], @b[4], @b[5] - veor @b[7], @b[7], @b[5] - veor @b[3], @b[3], @b[4] - veor @b[5], @b[5], @b[0] - veor @b[3], @b[3], @b[7] - veor @b[6], @b[6], @b[2] - veor @b[2], @b[2], @b[1] - veor @b[6], @b[6], @b[3] - - veor @b[3], @b[3], @b[0] - veor @b[5], @b[5], @b[6] -___ -} - -sub Mul_GF4 { -#;************************************************************* -#;* Mul_GF4: Input x0-x1,y0-y1 Output x0-x1 Temp t0 (8) * -#;************************************************************* -my ($x0,$x1,$y0,$y1,$t0,$t1)=@_; -$code.=<<___; - veor $t0, $y0, $y1 - vand $t0, $t0, $x0 - veor $x0, $x0, $x1 - vand $t1, $x1, $y0 - vand $x0, $x0, $y1 - veor $x1, $t1, $t0 - veor $x0, $x0, $t1 -___ -} - -sub Mul_GF4_N { # not used, see next subroutine -# multiply and scale by N -my ($x0,$x1,$y0,$y1,$t0)=@_; -$code.=<<___; - veor $t0, $y0, $y1 - vand $t0, $t0, $x0 - veor $x0, $x0, $x1 - vand $x1, $x1, $y0 - vand $x0, $x0, $y1 - veor $x1, $x1, $x0 - veor $x0, $x0, $t0 -___ -} - -sub Mul_GF4_N_GF4 { -# interleaved Mul_GF4_N and Mul_GF4 -my ($x0,$x1,$y0,$y1,$t0, - $x2,$x3,$y2,$y3,$t1)=@_; -$code.=<<___; - veor $t0, $y0, $y1 - veor $t1, $y2, $y3 - vand $t0, $t0, $x0 - vand $t1, $t1, $x2 - veor $x0, $x0, $x1 - veor $x2, $x2, $x3 - vand $x1, $x1, $y0 - vand $x3, $x3, $y2 - vand $x0, $x0, $y1 - vand $x2, $x2, $y3 - veor $x1, $x1, $x0 - veor $x2, $x2, $x3 - veor $x0, $x0, $t0 - veor $x3, $x3, $t1 -___ -} -sub Mul_GF16_2 { -my @x=@_[0..7]; -my @y=@_[8..11]; -my @t=@_[12..15]; -$code.=<<___; - veor @t[0], @x[0], @x[2] - veor @t[1], @x[1], @x[3] -___ - &Mul_GF4 (@x[0], @x[1], @y[0], @y[1], @t[2..3]); -$code.=<<___; - veor @y[0], @y[0], @y[2] - veor @y[1], @y[1], @y[3] -___ - Mul_GF4_N_GF4 (@t[0], @t[1], @y[0], @y[1], @t[3], - @x[2], @x[3], @y[2], @y[3], @t[2]); -$code.=<<___; - veor @x[0], @x[0], @t[0] - veor @x[2], @x[2], @t[0] - veor @x[1], @x[1], @t[1] - veor @x[3], @x[3], @t[1] - - veor @t[0], @x[4], @x[6] - veor @t[1], @x[5], @x[7] -___ - &Mul_GF4_N_GF4 (@t[0], @t[1], @y[0], @y[1], @t[3], - @x[6], @x[7], @y[2], @y[3], @t[2]); -$code.=<<___; - veor @y[0], @y[0], @y[2] - veor @y[1], @y[1], @y[3] -___ - &Mul_GF4 (@x[4], @x[5], @y[0], @y[1], @t[2..3]); -$code.=<<___; - veor @x[4], @x[4], @t[0] - veor @x[6], @x[6], @t[0] - veor @x[5], @x[5], @t[1] - veor @x[7], @x[7], @t[1] -___ -} -sub Inv_GF256 { -#;******************************************************************** -#;* Inv_GF256: Input x0-x7 Output x0-x7 Temp t0-t3,s0-s3 (144) * -#;******************************************************************** -my @x=@_[0..7]; -my @t=@_[8..11]; -my @s=@_[12..15]; -# direct optimizations from hardware -$code.=<<___; - veor @t[3], @x[4], @x[6] - veor @t[2], @x[5], @x[7] - veor @t[1], @x[1], @x[3] - veor @s[1], @x[7], @x[6] - vmov @t[0], @t[2] - veor @s[0], @x[0], @x[2] - - vorr @t[2], @t[2], @t[1] - veor @s[3], @t[3], @t[0] - vand @s[2], @t[3], @s[0] - vorr @t[3], @t[3], @s[0] - veor @s[0], @s[0], @t[1] - vand @t[0], @t[0], @t[1] - veor @t[1], @x[3], @x[2] - vand @s[3], @s[3], @s[0] - vand @s[1], @s[1], @t[1] - veor @t[1], @x[4], @x[5] - veor @s[0], @x[1], @x[0] - veor @t[3], @t[3], @s[1] - veor @t[2], @t[2], @s[1] - vand @s[1], @t[1], @s[0] - vorr @t[1], @t[1], @s[0] - veor @t[3], @t[3], @s[3] - veor @t[0], @t[0], @s[1] - veor @t[2], @t[2], @s[2] - veor @t[1], @t[1], @s[3] - veor @t[0], @t[0], @s[2] - vand @s[0], @x[7], @x[3] - veor @t[1], @t[1], @s[2] - vand @s[1], @x[6], @x[2] - vand @s[2], @x[5], @x[1] - vorr @s[3], @x[4], @x[0] - veor @t[3], @t[3], @s[0] - veor @t[1], @t[1], @s[2] - veor @t[0], @t[0], @s[3] - veor @t[2], @t[2], @s[1] - - @ Inv_GF16 \t0, \t1, \t2, \t3, \s0, \s1, \s2, \s3 - - @ new smaller inversion - - vand @s[2], @t[3], @t[1] - vmov @s[0], @t[0] - - veor @s[1], @t[2], @s[2] - veor @s[3], @t[0], @s[2] - veor @s[2], @t[0], @s[2] @ @s[2]=@s[3] - - vbsl @s[1], @t[1], @t[0] - vbsl @s[3], @t[3], @t[2] - veor @t[3], @t[3], @t[2] - - vbsl @s[0], @s[1], @s[2] - vbsl @t[0], @s[2], @s[1] - - vand @s[2], @s[0], @s[3] - veor @t[1], @t[1], @t[0] - - veor @s[2], @s[2], @t[3] -___ -# output in s3, s2, s1, t1 - -# Mul_GF16_2 \x0, \x1, \x2, \x3, \x4, \x5, \x6, \x7, \t2, \t3, \t0, \t1, \s0, \s1, \s2, \s3 - -# Mul_GF16_2 \x0, \x1, \x2, \x3, \x4, \x5, \x6, \x7, \s3, \s2, \s1, \t1, \s0, \t0, \t2, \t3 - &Mul_GF16_2(@x,@s[3,2,1],@t[1],@s[0],@t[0,2,3]); - -### output msb > [x3,x2,x1,x0,x7,x6,x5,x4] < lsb -} - -# AES linear components - -sub ShiftRows { -my @x=@_[0..7]; -my @t=@_[8..11]; -my $mask=pop; -$code.=<<___; - vldmia $key!, {@t[0]-@t[3]} - veor @t[0], @t[0], @x[0] - veor @t[1], @t[1], @x[1] - vtbl.8 `&Dlo(@x[0])`, {@t[0]}, `&Dlo($mask)` - vtbl.8 `&Dhi(@x[0])`, {@t[0]}, `&Dhi($mask)` - vldmia $key!, {@t[0]} - veor @t[2], @t[2], @x[2] - vtbl.8 `&Dlo(@x[1])`, {@t[1]}, `&Dlo($mask)` - vtbl.8 `&Dhi(@x[1])`, {@t[1]}, `&Dhi($mask)` - vldmia $key!, {@t[1]} - veor @t[3], @t[3], @x[3] - vtbl.8 `&Dlo(@x[2])`, {@t[2]}, `&Dlo($mask)` - vtbl.8 `&Dhi(@x[2])`, {@t[2]}, `&Dhi($mask)` - vldmia $key!, {@t[2]} - vtbl.8 `&Dlo(@x[3])`, {@t[3]}, `&Dlo($mask)` - vtbl.8 `&Dhi(@x[3])`, {@t[3]}, `&Dhi($mask)` - vldmia $key!, {@t[3]} - veor @t[0], @t[0], @x[4] - veor @t[1], @t[1], @x[5] - vtbl.8 `&Dlo(@x[4])`, {@t[0]}, `&Dlo($mask)` - vtbl.8 `&Dhi(@x[4])`, {@t[0]}, `&Dhi($mask)` - veor @t[2], @t[2], @x[6] - vtbl.8 `&Dlo(@x[5])`, {@t[1]}, `&Dlo($mask)` - vtbl.8 `&Dhi(@x[5])`, {@t[1]}, `&Dhi($mask)` - veor @t[3], @t[3], @x[7] - vtbl.8 `&Dlo(@x[6])`, {@t[2]}, `&Dlo($mask)` - vtbl.8 `&Dhi(@x[6])`, {@t[2]}, `&Dhi($mask)` - vtbl.8 `&Dlo(@x[7])`, {@t[3]}, `&Dlo($mask)` - vtbl.8 `&Dhi(@x[7])`, {@t[3]}, `&Dhi($mask)` -___ -} - -sub MixColumns { -# modified to emit output in order suitable for feeding back to aesenc[last] -my @x=@_[0..7]; -my @t=@_[8..15]; -my $inv=@_[16]; # optional -$code.=<<___; - vext.8 @t[0], @x[0], @x[0], #12 @ x0 <<< 32 - vext.8 @t[1], @x[1], @x[1], #12 - veor @x[0], @x[0], @t[0] @ x0 ^ (x0 <<< 32) - vext.8 @t[2], @x[2], @x[2], #12 - veor @x[1], @x[1], @t[1] - vext.8 @t[3], @x[3], @x[3], #12 - veor @x[2], @x[2], @t[2] - vext.8 @t[4], @x[4], @x[4], #12 - veor @x[3], @x[3], @t[3] - vext.8 @t[5], @x[5], @x[5], #12 - veor @x[4], @x[4], @t[4] - vext.8 @t[6], @x[6], @x[6], #12 - veor @x[5], @x[5], @t[5] - vext.8 @t[7], @x[7], @x[7], #12 - veor @x[6], @x[6], @t[6] - - veor @t[1], @t[1], @x[0] - veor @x[7], @x[7], @t[7] - vext.8 @x[0], @x[0], @x[0], #8 @ (x0 ^ (x0 <<< 32)) <<< 64) - veor @t[2], @t[2], @x[1] - veor @t[0], @t[0], @x[7] - veor @t[1], @t[1], @x[7] - vext.8 @x[1], @x[1], @x[1], #8 - veor @t[5], @t[5], @x[4] - veor @x[0], @x[0], @t[0] - veor @t[6], @t[6], @x[5] - veor @x[1], @x[1], @t[1] - vext.8 @t[0], @x[4], @x[4], #8 - veor @t[4], @t[4], @x[3] - vext.8 @t[1], @x[5], @x[5], #8 - veor @t[7], @t[7], @x[6] - vext.8 @x[4], @x[3], @x[3], #8 - veor @t[3], @t[3], @x[2] - vext.8 @x[5], @x[7], @x[7], #8 - veor @t[4], @t[4], @x[7] - vext.8 @x[3], @x[6], @x[6], #8 - veor @t[3], @t[3], @x[7] - vext.8 @x[6], @x[2], @x[2], #8 - veor @x[7], @t[1], @t[5] -___ -$code.=<<___ if (!$inv); - veor @x[2], @t[0], @t[4] - veor @x[4], @x[4], @t[3] - veor @x[5], @x[5], @t[7] - veor @x[3], @x[3], @t[6] - @ vmov @x[2], @t[0] - veor @x[6], @x[6], @t[2] - @ vmov @x[7], @t[1] -___ -$code.=<<___ if ($inv); - veor @t[3], @t[3], @x[4] - veor @x[5], @x[5], @t[7] - veor @x[2], @x[3], @t[6] - veor @x[3], @t[0], @t[4] - veor @x[4], @x[6], @t[2] - vmov @x[6], @t[3] - @ vmov @x[7], @t[1] -___ -} - -sub InvMixColumns_orig { -my @x=@_[0..7]; -my @t=@_[8..15]; - -$code.=<<___; - @ multiplication by 0x0e - vext.8 @t[7], @x[7], @x[7], #12 - vmov @t[2], @x[2] - veor @x[2], @x[2], @x[5] @ 2 5 - veor @x[7], @x[7], @x[5] @ 7 5 - vext.8 @t[0], @x[0], @x[0], #12 - vmov @t[5], @x[5] - veor @x[5], @x[5], @x[0] @ 5 0 [1] - veor @x[0], @x[0], @x[1] @ 0 1 - vext.8 @t[1], @x[1], @x[1], #12 - veor @x[1], @x[1], @x[2] @ 1 25 - veor @x[0], @x[0], @x[6] @ 01 6 [2] - vext.8 @t[3], @x[3], @x[3], #12 - veor @x[1], @x[1], @x[3] @ 125 3 [4] - veor @x[2], @x[2], @x[0] @ 25 016 [3] - veor @x[3], @x[3], @x[7] @ 3 75 - veor @x[7], @x[7], @x[6] @ 75 6 [0] - vext.8 @t[6], @x[6], @x[6], #12 - vmov @t[4], @x[4] - veor @x[6], @x[6], @x[4] @ 6 4 - veor @x[4], @x[4], @x[3] @ 4 375 [6] - veor @x[3], @x[3], @x[7] @ 375 756=36 - veor @x[6], @x[6], @t[5] @ 64 5 [7] - veor @x[3], @x[3], @t[2] @ 36 2 - vext.8 @t[5], @t[5], @t[5], #12 - veor @x[3], @x[3], @t[4] @ 362 4 [5] -___ - my @y = @x[7,5,0,2,1,3,4,6]; -$code.=<<___; - @ multiplication by 0x0b - veor @y[1], @y[1], @y[0] - veor @y[0], @y[0], @t[0] - vext.8 @t[2], @t[2], @t[2], #12 - veor @y[1], @y[1], @t[1] - veor @y[0], @y[0], @t[5] - vext.8 @t[4], @t[4], @t[4], #12 - veor @y[1], @y[1], @t[6] - veor @y[0], @y[0], @t[7] - veor @t[7], @t[7], @t[6] @ clobber t[7] - - veor @y[3], @y[3], @t[0] - veor @y[1], @y[1], @y[0] - vext.8 @t[0], @t[0], @t[0], #12 - veor @y[2], @y[2], @t[1] - veor @y[4], @y[4], @t[1] - vext.8 @t[1], @t[1], @t[1], #12 - veor @y[2], @y[2], @t[2] - veor @y[3], @y[3], @t[2] - veor @y[5], @y[5], @t[2] - veor @y[2], @y[2], @t[7] - vext.8 @t[2], @t[2], @t[2], #12 - veor @y[3], @y[3], @t[3] - veor @y[6], @y[6], @t[3] - veor @y[4], @y[4], @t[3] - veor @y[7], @y[7], @t[4] - vext.8 @t[3], @t[3], @t[3], #12 - veor @y[5], @y[5], @t[4] - veor @y[7], @y[7], @t[7] - veor @t[7], @t[7], @t[5] @ clobber t[7] even more - veor @y[3], @y[3], @t[5] - veor @y[4], @y[4], @t[4] - - veor @y[5], @y[5], @t[7] - vext.8 @t[4], @t[4], @t[4], #12 - veor @y[6], @y[6], @t[7] - veor @y[4], @y[4], @t[7] - - veor @t[7], @t[7], @t[5] - vext.8 @t[5], @t[5], @t[5], #12 - - @ multiplication by 0x0d - veor @y[4], @y[4], @y[7] - veor @t[7], @t[7], @t[6] @ restore t[7] - veor @y[7], @y[7], @t[4] - vext.8 @t[6], @t[6], @t[6], #12 - veor @y[2], @y[2], @t[0] - veor @y[7], @y[7], @t[5] - vext.8 @t[7], @t[7], @t[7], #12 - veor @y[2], @y[2], @t[2] - - veor @y[3], @y[3], @y[1] - veor @y[1], @y[1], @t[1] - veor @y[0], @y[0], @t[0] - veor @y[3], @y[3], @t[0] - veor @y[1], @y[1], @t[5] - veor @y[0], @y[0], @t[5] - vext.8 @t[0], @t[0], @t[0], #12 - veor @y[1], @y[1], @t[7] - veor @y[0], @y[0], @t[6] - veor @y[3], @y[3], @y[1] - veor @y[4], @y[4], @t[1] - vext.8 @t[1], @t[1], @t[1], #12 - - veor @y[7], @y[7], @t[7] - veor @y[4], @y[4], @t[2] - veor @y[5], @y[5], @t[2] - veor @y[2], @y[2], @t[6] - veor @t[6], @t[6], @t[3] @ clobber t[6] - vext.8 @t[2], @t[2], @t[2], #12 - veor @y[4], @y[4], @y[7] - veor @y[3], @y[3], @t[6] - - veor @y[6], @y[6], @t[6] - veor @y[5], @y[5], @t[5] - vext.8 @t[5], @t[5], @t[5], #12 - veor @y[6], @y[6], @t[4] - vext.8 @t[4], @t[4], @t[4], #12 - veor @y[5], @y[5], @t[6] - veor @y[6], @y[6], @t[7] - vext.8 @t[7], @t[7], @t[7], #12 - veor @t[6], @t[6], @t[3] @ restore t[6] - vext.8 @t[3], @t[3], @t[3], #12 - - @ multiplication by 0x09 - veor @y[4], @y[4], @y[1] - veor @t[1], @t[1], @y[1] @ t[1]=y[1] - veor @t[0], @t[0], @t[5] @ clobber t[0] - vext.8 @t[6], @t[6], @t[6], #12 - veor @t[1], @t[1], @t[5] - veor @y[3], @y[3], @t[0] - veor @t[0], @t[0], @y[0] @ t[0]=y[0] - veor @t[1], @t[1], @t[6] - veor @t[6], @t[6], @t[7] @ clobber t[6] - veor @y[4], @y[4], @t[1] - veor @y[7], @y[7], @t[4] - veor @y[6], @y[6], @t[3] - veor @y[5], @y[5], @t[2] - veor @t[4], @t[4], @y[4] @ t[4]=y[4] - veor @t[3], @t[3], @y[3] @ t[3]=y[3] - veor @t[5], @t[5], @y[5] @ t[5]=y[5] - veor @t[2], @t[2], @y[2] @ t[2]=y[2] - veor @t[3], @t[3], @t[7] - veor @XMM[5], @t[5], @t[6] - veor @XMM[6], @t[6], @y[6] @ t[6]=y[6] - veor @XMM[2], @t[2], @t[6] - veor @XMM[7], @t[7], @y[7] @ t[7]=y[7] - - vmov @XMM[0], @t[0] - vmov @XMM[1], @t[1] - @ vmov @XMM[2], @t[2] - vmov @XMM[3], @t[3] - vmov @XMM[4], @t[4] - @ vmov @XMM[5], @t[5] - @ vmov @XMM[6], @t[6] - @ vmov @XMM[7], @t[7] -___ -} - -sub InvMixColumns { -my @x=@_[0..7]; -my @t=@_[8..15]; - -# Thanks to Jussi Kivilinna for providing pointer to -# -# | 0e 0b 0d 09 | | 02 03 01 01 | | 05 00 04 00 | -# | 09 0e 0b 0d | = | 01 02 03 01 | x | 00 05 00 04 | -# | 0d 09 0e 0b | | 01 01 02 03 | | 04 00 05 00 | -# | 0b 0d 09 0e | | 03 01 01 02 | | 00 04 00 05 | - -$code.=<<___; - @ multiplication by 0x05-0x00-0x04-0x00 - vext.8 @t[0], @x[0], @x[0], #8 - vext.8 @t[6], @x[6], @x[6], #8 - vext.8 @t[7], @x[7], @x[7], #8 - veor @t[0], @t[0], @x[0] - vext.8 @t[1], @x[1], @x[1], #8 - veor @t[6], @t[6], @x[6] - vext.8 @t[2], @x[2], @x[2], #8 - veor @t[7], @t[7], @x[7] - vext.8 @t[3], @x[3], @x[3], #8 - veor @t[1], @t[1], @x[1] - vext.8 @t[4], @x[4], @x[4], #8 - veor @t[2], @t[2], @x[2] - vext.8 @t[5], @x[5], @x[5], #8 - veor @t[3], @t[3], @x[3] - veor @t[4], @t[4], @x[4] - veor @t[5], @t[5], @x[5] - - veor @x[0], @x[0], @t[6] - veor @x[1], @x[1], @t[6] - veor @x[2], @x[2], @t[0] - veor @x[4], @x[4], @t[2] - veor @x[3], @x[3], @t[1] - veor @x[1], @x[1], @t[7] - veor @x[2], @x[2], @t[7] - veor @x[4], @x[4], @t[6] - veor @x[5], @x[5], @t[3] - veor @x[3], @x[3], @t[6] - veor @x[6], @x[6], @t[4] - veor @x[4], @x[4], @t[7] - veor @x[5], @x[5], @t[7] - veor @x[7], @x[7], @t[5] -___ - &MixColumns (@x,@t,1); # flipped 2<->3 and 4<->6 -} - -sub swapmove { -my ($a,$b,$n,$mask,$t)=@_; -$code.=<<___; - vshr.u64 $t, $b, #$n - veor $t, $t, $a - vand $t, $t, $mask - veor $a, $a, $t - vshl.u64 $t, $t, #$n - veor $b, $b, $t -___ -} -sub swapmove2x { -my ($a0,$b0,$a1,$b1,$n,$mask,$t0,$t1)=@_; -$code.=<<___; - vshr.u64 $t0, $b0, #$n - vshr.u64 $t1, $b1, #$n - veor $t0, $t0, $a0 - veor $t1, $t1, $a1 - vand $t0, $t0, $mask - vand $t1, $t1, $mask - veor $a0, $a0, $t0 - vshl.u64 $t0, $t0, #$n - veor $a1, $a1, $t1 - vshl.u64 $t1, $t1, #$n - veor $b0, $b0, $t0 - veor $b1, $b1, $t1 -___ -} - -sub bitslice { -my @x=reverse(@_[0..7]); -my ($t0,$t1,$t2,$t3)=@_[8..11]; -$code.=<<___; - vmov.i8 $t0,#0x55 @ compose .LBS0 - vmov.i8 $t1,#0x33 @ compose .LBS1 -___ - &swapmove2x(@x[0,1,2,3],1,$t0,$t2,$t3); - &swapmove2x(@x[4,5,6,7],1,$t0,$t2,$t3); -$code.=<<___; - vmov.i8 $t0,#0x0f @ compose .LBS2 -___ - &swapmove2x(@x[0,2,1,3],2,$t1,$t2,$t3); - &swapmove2x(@x[4,6,5,7],2,$t1,$t2,$t3); - - &swapmove2x(@x[0,4,1,5],4,$t0,$t2,$t3); - &swapmove2x(@x[2,6,3,7],4,$t0,$t2,$t3); -} - -$code.=<<___; -#ifndef __KERNEL__ -# include "arm_arch.h" - -# define VFP_ABI_PUSH vstmdb sp!,{d8-d15} -# define VFP_ABI_POP vldmia sp!,{d8-d15} -# define VFP_ABI_FRAME 0x40 -#else -# define VFP_ABI_PUSH -# define VFP_ABI_POP -# define VFP_ABI_FRAME 0 -# define BSAES_ASM_EXTENDED_KEY -# define XTS_CHAIN_TWEAK -# define __ARM_ARCH__ 7 -#endif - -#ifdef __thumb__ -# define adrl adr -#endif - -#if __ARM_ARCH__>=7 -.text -.syntax unified @ ARMv7-capable assembler is expected to handle this -#ifdef __thumb2__ -.thumb -#else -.code 32 -#endif - -.fpu neon - -.type _bsaes_decrypt8,%function -.align 4 -_bsaes_decrypt8: - adr $const,_bsaes_decrypt8 - vldmia $key!, {@XMM[9]} @ round 0 key - add $const,$const,#.LM0ISR-_bsaes_decrypt8 - - vldmia $const!, {@XMM[8]} @ .LM0ISR - veor @XMM[10], @XMM[0], @XMM[9] @ xor with round0 key - veor @XMM[11], @XMM[1], @XMM[9] - vtbl.8 `&Dlo(@XMM[0])`, {@XMM[10]}, `&Dlo(@XMM[8])` - vtbl.8 `&Dhi(@XMM[0])`, {@XMM[10]}, `&Dhi(@XMM[8])` - veor @XMM[12], @XMM[2], @XMM[9] - vtbl.8 `&Dlo(@XMM[1])`, {@XMM[11]}, `&Dlo(@XMM[8])` - vtbl.8 `&Dhi(@XMM[1])`, {@XMM[11]}, `&Dhi(@XMM[8])` - veor @XMM[13], @XMM[3], @XMM[9] - vtbl.8 `&Dlo(@XMM[2])`, {@XMM[12]}, `&Dlo(@XMM[8])` - vtbl.8 `&Dhi(@XMM[2])`, {@XMM[12]}, `&Dhi(@XMM[8])` - veor @XMM[14], @XMM[4], @XMM[9] - vtbl.8 `&Dlo(@XMM[3])`, {@XMM[13]}, `&Dlo(@XMM[8])` - vtbl.8 `&Dhi(@XMM[3])`, {@XMM[13]}, `&Dhi(@XMM[8])` - veor @XMM[15], @XMM[5], @XMM[9] - vtbl.8 `&Dlo(@XMM[4])`, {@XMM[14]}, `&Dlo(@XMM[8])` - vtbl.8 `&Dhi(@XMM[4])`, {@XMM[14]}, `&Dhi(@XMM[8])` - veor @XMM[10], @XMM[6], @XMM[9] - vtbl.8 `&Dlo(@XMM[5])`, {@XMM[15]}, `&Dlo(@XMM[8])` - vtbl.8 `&Dhi(@XMM[5])`, {@XMM[15]}, `&Dhi(@XMM[8])` - veor @XMM[11], @XMM[7], @XMM[9] - vtbl.8 `&Dlo(@XMM[6])`, {@XMM[10]}, `&Dlo(@XMM[8])` - vtbl.8 `&Dhi(@XMM[6])`, {@XMM[10]}, `&Dhi(@XMM[8])` - vtbl.8 `&Dlo(@XMM[7])`, {@XMM[11]}, `&Dlo(@XMM[8])` - vtbl.8 `&Dhi(@XMM[7])`, {@XMM[11]}, `&Dhi(@XMM[8])` -___ - &bitslice (@XMM[0..7, 8..11]); -$code.=<<___; - sub $rounds,$rounds,#1 - b .Ldec_sbox -.align 4 -.Ldec_loop: -___ - &ShiftRows (@XMM[0..7, 8..12]); -$code.=".Ldec_sbox:\n"; - &InvSbox (@XMM[0..7, 8..15]); -$code.=<<___; - subs $rounds,$rounds,#1 - bcc .Ldec_done -___ - &InvMixColumns (@XMM[0,1,6,4,2,7,3,5, 8..15]); -$code.=<<___; - vldmia $const, {@XMM[12]} @ .LISR - ite eq @ Thumb2 thing, sanity check in ARM - addeq $const,$const,#0x10 - bne .Ldec_loop - vldmia $const, {@XMM[12]} @ .LISRM0 - b .Ldec_loop -.align 4 -.Ldec_done: -___ - &bitslice (@XMM[0,1,6,4,2,7,3,5, 8..11]); -$code.=<<___; - vldmia $key, {@XMM[8]} @ last round key - veor @XMM[6], @XMM[6], @XMM[8] - veor @XMM[4], @XMM[4], @XMM[8] - veor @XMM[2], @XMM[2], @XMM[8] - veor @XMM[7], @XMM[7], @XMM[8] - veor @XMM[3], @XMM[3], @XMM[8] - veor @XMM[5], @XMM[5], @XMM[8] - veor @XMM[0], @XMM[0], @XMM[8] - veor @XMM[1], @XMM[1], @XMM[8] - bx lr -.size _bsaes_decrypt8,.-_bsaes_decrypt8 - -.type _bsaes_const,%object -.align 6 -_bsaes_const: -.LM0ISR: @ InvShiftRows constants - .quad 0x0a0e0206070b0f03, 0x0004080c0d010509 -.LISR: - .quad 0x0504070602010003, 0x0f0e0d0c080b0a09 -.LISRM0: - .quad 0x01040b0e0205080f, 0x0306090c00070a0d -.LM0SR: @ ShiftRows constants - .quad 0x0a0e02060f03070b, 0x0004080c05090d01 -.LSR: - .quad 0x0504070600030201, 0x0f0e0d0c0a09080b -.LSRM0: - .quad 0x0304090e00050a0f, 0x01060b0c0207080d -.LM0: - .quad 0x02060a0e03070b0f, 0x0004080c0105090d -.LREVM0SR: - .quad 0x090d01050c000408, 0x03070b0f060a0e02 -.asciz "Bit-sliced AES for NEON, CRYPTOGAMS by " -.align 6 -.size _bsaes_const,.-_bsaes_const - -.type _bsaes_encrypt8,%function -.align 4 -_bsaes_encrypt8: - adr $const,_bsaes_encrypt8 - vldmia $key!, {@XMM[9]} @ round 0 key - sub $const,$const,#_bsaes_encrypt8-.LM0SR - - vldmia $const!, {@XMM[8]} @ .LM0SR -_bsaes_encrypt8_alt: - veor @XMM[10], @XMM[0], @XMM[9] @ xor with round0 key - veor @XMM[11], @XMM[1], @XMM[9] - vtbl.8 `&Dlo(@XMM[0])`, {@XMM[10]}, `&Dlo(@XMM[8])` - vtbl.8 `&Dhi(@XMM[0])`, {@XMM[10]}, `&Dhi(@XMM[8])` - veor @XMM[12], @XMM[2], @XMM[9] - vtbl.8 `&Dlo(@XMM[1])`, {@XMM[11]}, `&Dlo(@XMM[8])` - vtbl.8 `&Dhi(@XMM[1])`, {@XMM[11]}, `&Dhi(@XMM[8])` - veor @XMM[13], @XMM[3], @XMM[9] - vtbl.8 `&Dlo(@XMM[2])`, {@XMM[12]}, `&Dlo(@XMM[8])` - vtbl.8 `&Dhi(@XMM[2])`, {@XMM[12]}, `&Dhi(@XMM[8])` - veor @XMM[14], @XMM[4], @XMM[9] - vtbl.8 `&Dlo(@XMM[3])`, {@XMM[13]}, `&Dlo(@XMM[8])` - vtbl.8 `&Dhi(@XMM[3])`, {@XMM[13]}, `&Dhi(@XMM[8])` - veor @XMM[15], @XMM[5], @XMM[9] - vtbl.8 `&Dlo(@XMM[4])`, {@XMM[14]}, `&Dlo(@XMM[8])` - vtbl.8 `&Dhi(@XMM[4])`, {@XMM[14]}, `&Dhi(@XMM[8])` - veor @XMM[10], @XMM[6], @XMM[9] - vtbl.8 `&Dlo(@XMM[5])`, {@XMM[15]}, `&Dlo(@XMM[8])` - vtbl.8 `&Dhi(@XMM[5])`, {@XMM[15]}, `&Dhi(@XMM[8])` - veor @XMM[11], @XMM[7], @XMM[9] - vtbl.8 `&Dlo(@XMM[6])`, {@XMM[10]}, `&Dlo(@XMM[8])` - vtbl.8 `&Dhi(@XMM[6])`, {@XMM[10]}, `&Dhi(@XMM[8])` - vtbl.8 `&Dlo(@XMM[7])`, {@XMM[11]}, `&Dlo(@XMM[8])` - vtbl.8 `&Dhi(@XMM[7])`, {@XMM[11]}, `&Dhi(@XMM[8])` -_bsaes_encrypt8_bitslice: -___ - &bitslice (@XMM[0..7, 8..11]); -$code.=<<___; - sub $rounds,$rounds,#1 - b .Lenc_sbox -.align 4 -.Lenc_loop: -___ - &ShiftRows (@XMM[0..7, 8..12]); -$code.=".Lenc_sbox:\n"; - &Sbox (@XMM[0..7, 8..15]); -$code.=<<___; - subs $rounds,$rounds,#1 - bcc .Lenc_done -___ - &MixColumns (@XMM[0,1,4,6,3,7,2,5, 8..15]); -$code.=<<___; - vldmia $const, {@XMM[12]} @ .LSR - ite eq @ Thumb2 thing, samity check in ARM - addeq $const,$const,#0x10 - bne .Lenc_loop - vldmia $const, {@XMM[12]} @ .LSRM0 - b .Lenc_loop -.align 4 -.Lenc_done: -___ - # output in lsb > [t0, t1, t4, t6, t3, t7, t2, t5] < msb - &bitslice (@XMM[0,1,4,6,3,7,2,5, 8..11]); -$code.=<<___; - vldmia $key, {@XMM[8]} @ last round key - veor @XMM[4], @XMM[4], @XMM[8] - veor @XMM[6], @XMM[6], @XMM[8] - veor @XMM[3], @XMM[3], @XMM[8] - veor @XMM[7], @XMM[7], @XMM[8] - veor @XMM[2], @XMM[2], @XMM[8] - veor @XMM[5], @XMM[5], @XMM[8] - veor @XMM[0], @XMM[0], @XMM[8] - veor @XMM[1], @XMM[1], @XMM[8] - bx lr -.size _bsaes_encrypt8,.-_bsaes_encrypt8 -___ -} -{ -my ($out,$inp,$rounds,$const)=("r12","r4","r5","r6"); - -sub bitslice_key { -my @x=reverse(@_[0..7]); -my ($bs0,$bs1,$bs2,$t2,$t3)=@_[8..12]; - - &swapmove (@x[0,1],1,$bs0,$t2,$t3); -$code.=<<___; - @ &swapmove(@x[2,3],1,$t0,$t2,$t3); - vmov @x[2], @x[0] - vmov @x[3], @x[1] -___ - #&swapmove2x(@x[4,5,6,7],1,$t0,$t2,$t3); - - &swapmove2x (@x[0,2,1,3],2,$bs1,$t2,$t3); -$code.=<<___; - @ &swapmove2x(@x[4,6,5,7],2,$t1,$t2,$t3); - vmov @x[4], @x[0] - vmov @x[6], @x[2] - vmov @x[5], @x[1] - vmov @x[7], @x[3] -___ - &swapmove2x (@x[0,4,1,5],4,$bs2,$t2,$t3); - &swapmove2x (@x[2,6,3,7],4,$bs2,$t2,$t3); -} - -$code.=<<___; -.type _bsaes_key_convert,%function -.align 4 -_bsaes_key_convert: - adr $const,_bsaes_key_convert - vld1.8 {@XMM[7]}, [$inp]! @ load round 0 key - sub $const,$const,#_bsaes_key_convert-.LM0 - vld1.8 {@XMM[15]}, [$inp]! @ load round 1 key - - vmov.i8 @XMM[8], #0x01 @ bit masks - vmov.i8 @XMM[9], #0x02 - vmov.i8 @XMM[10], #0x04 - vmov.i8 @XMM[11], #0x08 - vmov.i8 @XMM[12], #0x10 - vmov.i8 @XMM[13], #0x20 - vldmia $const, {@XMM[14]} @ .LM0 - -#ifdef __ARMEL__ - vrev32.8 @XMM[7], @XMM[7] - vrev32.8 @XMM[15], @XMM[15] -#endif - sub $rounds,$rounds,#1 - vstmia $out!, {@XMM[7]} @ save round 0 key - b .Lkey_loop - -.align 4 -.Lkey_loop: - vtbl.8 `&Dlo(@XMM[7])`,{@XMM[15]},`&Dlo(@XMM[14])` - vtbl.8 `&Dhi(@XMM[7])`,{@XMM[15]},`&Dhi(@XMM[14])` - vmov.i8 @XMM[6], #0x40 - vmov.i8 @XMM[15], #0x80 - - vtst.8 @XMM[0], @XMM[7], @XMM[8] - vtst.8 @XMM[1], @XMM[7], @XMM[9] - vtst.8 @XMM[2], @XMM[7], @XMM[10] - vtst.8 @XMM[3], @XMM[7], @XMM[11] - vtst.8 @XMM[4], @XMM[7], @XMM[12] - vtst.8 @XMM[5], @XMM[7], @XMM[13] - vtst.8 @XMM[6], @XMM[7], @XMM[6] - vtst.8 @XMM[7], @XMM[7], @XMM[15] - vld1.8 {@XMM[15]}, [$inp]! @ load next round key - vmvn @XMM[0], @XMM[0] @ "pnot" - vmvn @XMM[1], @XMM[1] - vmvn @XMM[5], @XMM[5] - vmvn @XMM[6], @XMM[6] -#ifdef __ARMEL__ - vrev32.8 @XMM[15], @XMM[15] -#endif - subs $rounds,$rounds,#1 - vstmia $out!,{@XMM[0]-@XMM[7]} @ write bit-sliced round key - bne .Lkey_loop - - vmov.i8 @XMM[7],#0x63 @ compose .L63 - @ don't save last round key - bx lr -.size _bsaes_key_convert,.-_bsaes_key_convert -___ -} - -if (0) { # following four functions are unsupported interface - # used for benchmarking... -$code.=<<___; -.globl bsaes_enc_key_convert -.type bsaes_enc_key_convert,%function -.align 4 -bsaes_enc_key_convert: - stmdb sp!,{r4-r6,lr} - vstmdb sp!,{d8-d15} @ ABI specification says so - - ldr r5,[$inp,#240] @ pass rounds - mov r4,$inp @ pass key - mov r12,$out @ pass key schedule - bl _bsaes_key_convert - veor @XMM[7],@XMM[7],@XMM[15] @ fix up last round key - vstmia r12, {@XMM[7]} @ save last round key - - vldmia sp!,{d8-d15} - ldmia sp!,{r4-r6,pc} -.size bsaes_enc_key_convert,.-bsaes_enc_key_convert - -.globl bsaes_encrypt_128 -.type bsaes_encrypt_128,%function -.align 4 -bsaes_encrypt_128: - stmdb sp!,{r4-r6,lr} - vstmdb sp!,{d8-d15} @ ABI specification says so -.Lenc128_loop: - vld1.8 {@XMM[0]-@XMM[1]}, [$inp]! @ load input - vld1.8 {@XMM[2]-@XMM[3]}, [$inp]! - mov r4,$key @ pass the key - vld1.8 {@XMM[4]-@XMM[5]}, [$inp]! - mov r5,#10 @ pass rounds - vld1.8 {@XMM[6]-@XMM[7]}, [$inp]! - - bl _bsaes_encrypt8 - - vst1.8 {@XMM[0]-@XMM[1]}, [$out]! @ write output - vst1.8 {@XMM[4]}, [$out]! - vst1.8 {@XMM[6]}, [$out]! - vst1.8 {@XMM[3]}, [$out]! - vst1.8 {@XMM[7]}, [$out]! - vst1.8 {@XMM[2]}, [$out]! - subs $len,$len,#0x80 - vst1.8 {@XMM[5]}, [$out]! - bhi .Lenc128_loop - - vldmia sp!,{d8-d15} - ldmia sp!,{r4-r6,pc} -.size bsaes_encrypt_128,.-bsaes_encrypt_128 - -.globl bsaes_dec_key_convert -.type bsaes_dec_key_convert,%function -.align 4 -bsaes_dec_key_convert: - stmdb sp!,{r4-r6,lr} - vstmdb sp!,{d8-d15} @ ABI specification says so - - ldr r5,[$inp,#240] @ pass rounds - mov r4,$inp @ pass key - mov r12,$out @ pass key schedule - bl _bsaes_key_convert - vldmia $out, {@XMM[6]} - vstmia r12, {@XMM[15]} @ save last round key - veor @XMM[7], @XMM[7], @XMM[6] @ fix up round 0 key - vstmia $out, {@XMM[7]} - - vldmia sp!,{d8-d15} - ldmia sp!,{r4-r6,pc} -.size bsaes_dec_key_convert,.-bsaes_dec_key_convert - -.globl bsaes_decrypt_128 -.type bsaes_decrypt_128,%function -.align 4 -bsaes_decrypt_128: - stmdb sp!,{r4-r6,lr} - vstmdb sp!,{d8-d15} @ ABI specification says so -.Ldec128_loop: - vld1.8 {@XMM[0]-@XMM[1]}, [$inp]! @ load input - vld1.8 {@XMM[2]-@XMM[3]}, [$inp]! - mov r4,$key @ pass the key - vld1.8 {@XMM[4]-@XMM[5]}, [$inp]! - mov r5,#10 @ pass rounds - vld1.8 {@XMM[6]-@XMM[7]}, [$inp]! - - bl _bsaes_decrypt8 - - vst1.8 {@XMM[0]-@XMM[1]}, [$out]! @ write output - vst1.8 {@XMM[6]}, [$out]! - vst1.8 {@XMM[4]}, [$out]! - vst1.8 {@XMM[2]}, [$out]! - vst1.8 {@XMM[7]}, [$out]! - vst1.8 {@XMM[3]}, [$out]! - subs $len,$len,#0x80 - vst1.8 {@XMM[5]}, [$out]! - bhi .Ldec128_loop - - vldmia sp!,{d8-d15} - ldmia sp!,{r4-r6,pc} -.size bsaes_decrypt_128,.-bsaes_decrypt_128 -___ -} -{ -my ($inp,$out,$len,$key, $ivp,$fp,$rounds)=map("r$_",(0..3,8..10)); -my ($keysched)=("sp"); - -$code.=<<___; -.extern AES_cbc_encrypt -.extern AES_decrypt - -.global bsaes_cbc_encrypt -.type bsaes_cbc_encrypt,%function -.align 5 -bsaes_cbc_encrypt: -#ifndef __KERNEL__ - cmp $len, #128 -#ifndef __thumb__ - blo AES_cbc_encrypt -#else - bhs 1f - b AES_cbc_encrypt -1: -#endif -#endif - - @ it is up to the caller to make sure we are called with enc == 0 - - mov ip, sp - stmdb sp!, {r4-r10, lr} - VFP_ABI_PUSH - ldr $ivp, [ip] @ IV is 1st arg on the stack - mov $len, $len, lsr#4 @ len in 16 byte blocks - sub sp, #0x10 @ scratch space to carry over the IV - mov $fp, sp @ save sp - - ldr $rounds, [$key, #240] @ get # of rounds -#ifndef BSAES_ASM_EXTENDED_KEY - @ allocate the key schedule on the stack - sub r12, sp, $rounds, lsl#7 @ 128 bytes per inner round key - add r12, #`128-32` @ sifze of bit-slices key schedule - - @ populate the key schedule - mov r4, $key @ pass key - mov r5, $rounds @ pass # of rounds - mov sp, r12 @ sp is $keysched - bl _bsaes_key_convert - vldmia $keysched, {@XMM[6]} - vstmia r12, {@XMM[15]} @ save last round key - veor @XMM[7], @XMM[7], @XMM[6] @ fix up round 0 key - vstmia $keysched, {@XMM[7]} -#else - ldr r12, [$key, #244] - eors r12, #1 - beq 0f - - @ populate the key schedule - str r12, [$key, #244] - mov r4, $key @ pass key - mov r5, $rounds @ pass # of rounds - add r12, $key, #248 @ pass key schedule - bl _bsaes_key_convert - add r4, $key, #248 - vldmia r4, {@XMM[6]} - vstmia r12, {@XMM[15]} @ save last round key - veor @XMM[7], @XMM[7], @XMM[6] @ fix up round 0 key - vstmia r4, {@XMM[7]} - -.align 2 -0: -#endif - - vld1.8 {@XMM[15]}, [$ivp] @ load IV - b .Lcbc_dec_loop - -.align 4 -.Lcbc_dec_loop: - subs $len, $len, #0x8 - bmi .Lcbc_dec_loop_finish - - vld1.8 {@XMM[0]-@XMM[1]}, [$inp]! @ load input - vld1.8 {@XMM[2]-@XMM[3]}, [$inp]! -#ifndef BSAES_ASM_EXTENDED_KEY - mov r4, $keysched @ pass the key -#else - add r4, $key, #248 -#endif - vld1.8 {@XMM[4]-@XMM[5]}, [$inp]! - mov r5, $rounds - vld1.8 {@XMM[6]-@XMM[7]}, [$inp] - sub $inp, $inp, #0x60 - vstmia $fp, {@XMM[15]} @ put aside IV - - bl _bsaes_decrypt8 - - vldmia $fp, {@XMM[14]} @ reload IV - vld1.8 {@XMM[8]-@XMM[9]}, [$inp]! @ reload input - veor @XMM[0], @XMM[0], @XMM[14] @ ^= IV - vld1.8 {@XMM[10]-@XMM[11]}, [$inp]! - veor @XMM[1], @XMM[1], @XMM[8] - veor @XMM[6], @XMM[6], @XMM[9] - vld1.8 {@XMM[12]-@XMM[13]}, [$inp]! - veor @XMM[4], @XMM[4], @XMM[10] - veor @XMM[2], @XMM[2], @XMM[11] - vld1.8 {@XMM[14]-@XMM[15]}, [$inp]! - veor @XMM[7], @XMM[7], @XMM[12] - vst1.8 {@XMM[0]-@XMM[1]}, [$out]! @ write output - veor @XMM[3], @XMM[3], @XMM[13] - vst1.8 {@XMM[6]}, [$out]! - veor @XMM[5], @XMM[5], @XMM[14] - vst1.8 {@XMM[4]}, [$out]! - vst1.8 {@XMM[2]}, [$out]! - vst1.8 {@XMM[7]}, [$out]! - vst1.8 {@XMM[3]}, [$out]! - vst1.8 {@XMM[5]}, [$out]! - - b .Lcbc_dec_loop - -.Lcbc_dec_loop_finish: - adds $len, $len, #8 - beq .Lcbc_dec_done - - vld1.8 {@XMM[0]}, [$inp]! @ load input - cmp $len, #2 - blo .Lcbc_dec_one - vld1.8 {@XMM[1]}, [$inp]! -#ifndef BSAES_ASM_EXTENDED_KEY - mov r4, $keysched @ pass the key -#else - add r4, $key, #248 -#endif - mov r5, $rounds - vstmia $fp, {@XMM[15]} @ put aside IV - beq .Lcbc_dec_two - vld1.8 {@XMM[2]}, [$inp]! - cmp $len, #4 - blo .Lcbc_dec_three - vld1.8 {@XMM[3]}, [$inp]! - beq .Lcbc_dec_four - vld1.8 {@XMM[4]}, [$inp]! - cmp $len, #6 - blo .Lcbc_dec_five - vld1.8 {@XMM[5]}, [$inp]! - beq .Lcbc_dec_six - vld1.8 {@XMM[6]}, [$inp]! - sub $inp, $inp, #0x70 - - bl _bsaes_decrypt8 - - vldmia $fp, {@XMM[14]} @ reload IV - vld1.8 {@XMM[8]-@XMM[9]}, [$inp]! @ reload input - veor @XMM[0], @XMM[0], @XMM[14] @ ^= IV - vld1.8 {@XMM[10]-@XMM[11]}, [$inp]! - veor @XMM[1], @XMM[1], @XMM[8] - veor @XMM[6], @XMM[6], @XMM[9] - vld1.8 {@XMM[12]-@XMM[13]}, [$inp]! - veor @XMM[4], @XMM[4], @XMM[10] - veor @XMM[2], @XMM[2], @XMM[11] - vld1.8 {@XMM[15]}, [$inp]! - veor @XMM[7], @XMM[7], @XMM[12] - vst1.8 {@XMM[0]-@XMM[1]}, [$out]! @ write output - veor @XMM[3], @XMM[3], @XMM[13] - vst1.8 {@XMM[6]}, [$out]! - vst1.8 {@XMM[4]}, [$out]! - vst1.8 {@XMM[2]}, [$out]! - vst1.8 {@XMM[7]}, [$out]! - vst1.8 {@XMM[3]}, [$out]! - b .Lcbc_dec_done -.align 4 -.Lcbc_dec_six: - sub $inp, $inp, #0x60 - bl _bsaes_decrypt8 - vldmia $fp,{@XMM[14]} @ reload IV - vld1.8 {@XMM[8]-@XMM[9]}, [$inp]! @ reload input - veor @XMM[0], @XMM[0], @XMM[14] @ ^= IV - vld1.8 {@XMM[10]-@XMM[11]}, [$inp]! - veor @XMM[1], @XMM[1], @XMM[8] - veor @XMM[6], @XMM[6], @XMM[9] - vld1.8 {@XMM[12]}, [$inp]! - veor @XMM[4], @XMM[4], @XMM[10] - veor @XMM[2], @XMM[2], @XMM[11] - vld1.8 {@XMM[15]}, [$inp]! - veor @XMM[7], @XMM[7], @XMM[12] - vst1.8 {@XMM[0]-@XMM[1]}, [$out]! @ write output - vst1.8 {@XMM[6]}, [$out]! - vst1.8 {@XMM[4]}, [$out]! - vst1.8 {@XMM[2]}, [$out]! - vst1.8 {@XMM[7]}, [$out]! - b .Lcbc_dec_done -.align 4 -.Lcbc_dec_five: - sub $inp, $inp, #0x50 - bl _bsaes_decrypt8 - vldmia $fp, {@XMM[14]} @ reload IV - vld1.8 {@XMM[8]-@XMM[9]}, [$inp]! @ reload input - veor @XMM[0], @XMM[0], @XMM[14] @ ^= IV - vld1.8 {@XMM[10]-@XMM[11]}, [$inp]! - veor @XMM[1], @XMM[1], @XMM[8] - veor @XMM[6], @XMM[6], @XMM[9] - vld1.8 {@XMM[15]}, [$inp]! - veor @XMM[4], @XMM[4], @XMM[10] - vst1.8 {@XMM[0]-@XMM[1]}, [$out]! @ write output - veor @XMM[2], @XMM[2], @XMM[11] - vst1.8 {@XMM[6]}, [$out]! - vst1.8 {@XMM[4]}, [$out]! - vst1.8 {@XMM[2]}, [$out]! - b .Lcbc_dec_done -.align 4 -.Lcbc_dec_four: - sub $inp, $inp, #0x40 - bl _bsaes_decrypt8 - vldmia $fp, {@XMM[14]} @ reload IV - vld1.8 {@XMM[8]-@XMM[9]}, [$inp]! @ reload input - veor @XMM[0], @XMM[0], @XMM[14] @ ^= IV - vld1.8 {@XMM[10]}, [$inp]! - veor @XMM[1], @XMM[1], @XMM[8] - veor @XMM[6], @XMM[6], @XMM[9] - vld1.8 {@XMM[15]}, [$inp]! - veor @XMM[4], @XMM[4], @XMM[10] - vst1.8 {@XMM[0]-@XMM[1]}, [$out]! @ write output - vst1.8 {@XMM[6]}, [$out]! - vst1.8 {@XMM[4]}, [$out]! - b .Lcbc_dec_done -.align 4 -.Lcbc_dec_three: - sub $inp, $inp, #0x30 - bl _bsaes_decrypt8 - vldmia $fp, {@XMM[14]} @ reload IV - vld1.8 {@XMM[8]-@XMM[9]}, [$inp]! @ reload input - veor @XMM[0], @XMM[0], @XMM[14] @ ^= IV - vld1.8 {@XMM[15]}, [$inp]! - veor @XMM[1], @XMM[1], @XMM[8] - veor @XMM[6], @XMM[6], @XMM[9] - vst1.8 {@XMM[0]-@XMM[1]}, [$out]! @ write output - vst1.8 {@XMM[6]}, [$out]! - b .Lcbc_dec_done -.align 4 -.Lcbc_dec_two: - sub $inp, $inp, #0x20 - bl _bsaes_decrypt8 - vldmia $fp, {@XMM[14]} @ reload IV - vld1.8 {@XMM[8]}, [$inp]! @ reload input - veor @XMM[0], @XMM[0], @XMM[14] @ ^= IV - vld1.8 {@XMM[15]}, [$inp]! @ reload input - veor @XMM[1], @XMM[1], @XMM[8] - vst1.8 {@XMM[0]-@XMM[1]}, [$out]! @ write output - b .Lcbc_dec_done -.align 4 -.Lcbc_dec_one: - sub $inp, $inp, #0x10 - mov $rounds, $out @ save original out pointer - mov $out, $fp @ use the iv scratch space as out buffer - mov r2, $key - vmov @XMM[4],@XMM[15] @ just in case ensure that IV - vmov @XMM[5],@XMM[0] @ and input are preserved - bl AES_decrypt - vld1.8 {@XMM[0]}, [$fp,:64] @ load result - veor @XMM[0], @XMM[0], @XMM[4] @ ^= IV - vmov @XMM[15], @XMM[5] @ @XMM[5] holds input - vst1.8 {@XMM[0]}, [$rounds] @ write output - -.Lcbc_dec_done: -#ifndef BSAES_ASM_EXTENDED_KEY - vmov.i32 q0, #0 - vmov.i32 q1, #0 -.Lcbc_dec_bzero: @ wipe key schedule [if any] - vstmia $keysched!, {q0-q1} - cmp $keysched, $fp - bne .Lcbc_dec_bzero -#endif - - mov sp, $fp - add sp, #0x10 @ add sp,$fp,#0x10 is no good for thumb - vst1.8 {@XMM[15]}, [$ivp] @ return IV - VFP_ABI_POP - ldmia sp!, {r4-r10, pc} -.size bsaes_cbc_encrypt,.-bsaes_cbc_encrypt -___ -} -{ -my ($inp,$out,$len,$key, $ctr,$fp,$rounds)=(map("r$_",(0..3,8..10))); -my $const = "r6"; # shared with _bsaes_encrypt8_alt -my $keysched = "sp"; - -$code.=<<___; -.extern AES_encrypt -.global bsaes_ctr32_encrypt_blocks -.type bsaes_ctr32_encrypt_blocks,%function -.align 5 -bsaes_ctr32_encrypt_blocks: - cmp $len, #8 @ use plain AES for - blo .Lctr_enc_short @ small sizes - - mov ip, sp - stmdb sp!, {r4-r10, lr} - VFP_ABI_PUSH - ldr $ctr, [ip] @ ctr is 1st arg on the stack - sub sp, sp, #0x10 @ scratch space to carry over the ctr - mov $fp, sp @ save sp - - ldr $rounds, [$key, #240] @ get # of rounds -#ifndef BSAES_ASM_EXTENDED_KEY - @ allocate the key schedule on the stack - sub r12, sp, $rounds, lsl#7 @ 128 bytes per inner round key - add r12, #`128-32` @ size of bit-sliced key schedule - - @ populate the key schedule - mov r4, $key @ pass key - mov r5, $rounds @ pass # of rounds - mov sp, r12 @ sp is $keysched - bl _bsaes_key_convert - veor @XMM[7],@XMM[7],@XMM[15] @ fix up last round key - vstmia r12, {@XMM[7]} @ save last round key - - vld1.8 {@XMM[0]}, [$ctr] @ load counter - add $ctr, $const, #.LREVM0SR-.LM0 @ borrow $ctr - vldmia $keysched, {@XMM[4]} @ load round0 key -#else - ldr r12, [$key, #244] - eors r12, #1 - beq 0f - - @ populate the key schedule - str r12, [$key, #244] - mov r4, $key @ pass key - mov r5, $rounds @ pass # of rounds - add r12, $key, #248 @ pass key schedule - bl _bsaes_key_convert - veor @XMM[7],@XMM[7],@XMM[15] @ fix up last round key - vstmia r12, {@XMM[7]} @ save last round key - -.align 2 -0: add r12, $key, #248 - vld1.8 {@XMM[0]}, [$ctr] @ load counter - adrl $ctr, .LREVM0SR @ borrow $ctr - vldmia r12, {@XMM[4]} @ load round0 key - sub sp, #0x10 @ place for adjusted round0 key -#endif - - vmov.i32 @XMM[8],#1 @ compose 1<<96 - veor @XMM[9],@XMM[9],@XMM[9] - vrev32.8 @XMM[0],@XMM[0] - vext.8 @XMM[8],@XMM[9],@XMM[8],#4 - vrev32.8 @XMM[4],@XMM[4] - vadd.u32 @XMM[9],@XMM[8],@XMM[8] @ compose 2<<96 - vstmia $keysched, {@XMM[4]} @ save adjusted round0 key - b .Lctr_enc_loop - -.align 4 -.Lctr_enc_loop: - vadd.u32 @XMM[10], @XMM[8], @XMM[9] @ compose 3<<96 - vadd.u32 @XMM[1], @XMM[0], @XMM[8] @ +1 - vadd.u32 @XMM[2], @XMM[0], @XMM[9] @ +2 - vadd.u32 @XMM[3], @XMM[0], @XMM[10] @ +3 - vadd.u32 @XMM[4], @XMM[1], @XMM[10] - vadd.u32 @XMM[5], @XMM[2], @XMM[10] - vadd.u32 @XMM[6], @XMM[3], @XMM[10] - vadd.u32 @XMM[7], @XMM[4], @XMM[10] - vadd.u32 @XMM[10], @XMM[5], @XMM[10] @ next counter - - @ Borrow prologue from _bsaes_encrypt8 to use the opportunity - @ to flip byte order in 32-bit counter - - vldmia $keysched, {@XMM[9]} @ load round0 key -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, $keysched, #0x10 @ pass next round key -#else - add r4, $key, #`248+16` -#endif - vldmia $ctr, {@XMM[8]} @ .LREVM0SR - mov r5, $rounds @ pass rounds - vstmia $fp, {@XMM[10]} @ save next counter - sub $const, $ctr, #.LREVM0SR-.LSR @ pass constants - - bl _bsaes_encrypt8_alt - - subs $len, $len, #8 - blo .Lctr_enc_loop_done - - vld1.8 {@XMM[8]-@XMM[9]}, [$inp]! @ load input - vld1.8 {@XMM[10]-@XMM[11]}, [$inp]! - veor @XMM[0], @XMM[8] - veor @XMM[1], @XMM[9] - vld1.8 {@XMM[12]-@XMM[13]}, [$inp]! - veor @XMM[4], @XMM[10] - veor @XMM[6], @XMM[11] - vld1.8 {@XMM[14]-@XMM[15]}, [$inp]! - veor @XMM[3], @XMM[12] - vst1.8 {@XMM[0]-@XMM[1]}, [$out]! @ write output - veor @XMM[7], @XMM[13] - veor @XMM[2], @XMM[14] - vst1.8 {@XMM[4]}, [$out]! - veor @XMM[5], @XMM[15] - vst1.8 {@XMM[6]}, [$out]! - vmov.i32 @XMM[8], #1 @ compose 1<<96 - vst1.8 {@XMM[3]}, [$out]! - veor @XMM[9], @XMM[9], @XMM[9] - vst1.8 {@XMM[7]}, [$out]! - vext.8 @XMM[8], @XMM[9], @XMM[8], #4 - vst1.8 {@XMM[2]}, [$out]! - vadd.u32 @XMM[9],@XMM[8],@XMM[8] @ compose 2<<96 - vst1.8 {@XMM[5]}, [$out]! - vldmia $fp, {@XMM[0]} @ load counter - - bne .Lctr_enc_loop - b .Lctr_enc_done - -.align 4 -.Lctr_enc_loop_done: - add $len, $len, #8 - vld1.8 {@XMM[8]}, [$inp]! @ load input - veor @XMM[0], @XMM[8] - vst1.8 {@XMM[0]}, [$out]! @ write output - cmp $len, #2 - blo .Lctr_enc_done - vld1.8 {@XMM[9]}, [$inp]! - veor @XMM[1], @XMM[9] - vst1.8 {@XMM[1]}, [$out]! - beq .Lctr_enc_done - vld1.8 {@XMM[10]}, [$inp]! - veor @XMM[4], @XMM[10] - vst1.8 {@XMM[4]}, [$out]! - cmp $len, #4 - blo .Lctr_enc_done - vld1.8 {@XMM[11]}, [$inp]! - veor @XMM[6], @XMM[11] - vst1.8 {@XMM[6]}, [$out]! - beq .Lctr_enc_done - vld1.8 {@XMM[12]}, [$inp]! - veor @XMM[3], @XMM[12] - vst1.8 {@XMM[3]}, [$out]! - cmp $len, #6 - blo .Lctr_enc_done - vld1.8 {@XMM[13]}, [$inp]! - veor @XMM[7], @XMM[13] - vst1.8 {@XMM[7]}, [$out]! - beq .Lctr_enc_done - vld1.8 {@XMM[14]}, [$inp] - veor @XMM[2], @XMM[14] - vst1.8 {@XMM[2]}, [$out]! - -.Lctr_enc_done: - vmov.i32 q0, #0 - vmov.i32 q1, #0 -#ifndef BSAES_ASM_EXTENDED_KEY -.Lctr_enc_bzero: @ wipe key schedule [if any] - vstmia $keysched!, {q0-q1} - cmp $keysched, $fp - bne .Lctr_enc_bzero -#else - vstmia $keysched, {q0-q1} -#endif - - mov sp, $fp - add sp, #0x10 @ add sp,$fp,#0x10 is no good for thumb - VFP_ABI_POP - ldmia sp!, {r4-r10, pc} @ return - -.align 4 -.Lctr_enc_short: - ldr ip, [sp] @ ctr pointer is passed on stack - stmdb sp!, {r4-r8, lr} - - mov r4, $inp @ copy arguments - mov r5, $out - mov r6, $len - mov r7, $key - ldr r8, [ip, #12] @ load counter LSW - vld1.8 {@XMM[1]}, [ip] @ load whole counter value -#ifdef __ARMEL__ - rev r8, r8 -#endif - sub sp, sp, #0x10 - vst1.8 {@XMM[1]}, [sp,:64] @ copy counter value - sub sp, sp, #0x10 - -.Lctr_enc_short_loop: - add r0, sp, #0x10 @ input counter value - mov r1, sp @ output on the stack - mov r2, r7 @ key - - bl AES_encrypt - - vld1.8 {@XMM[0]}, [r4]! @ load input - vld1.8 {@XMM[1]}, [sp,:64] @ load encrypted counter - add r8, r8, #1 -#ifdef __ARMEL__ - rev r0, r8 - str r0, [sp, #0x1c] @ next counter value -#else - str r8, [sp, #0x1c] @ next counter value -#endif - veor @XMM[0],@XMM[0],@XMM[1] - vst1.8 {@XMM[0]}, [r5]! @ store output - subs r6, r6, #1 - bne .Lctr_enc_short_loop - - vmov.i32 q0, #0 - vmov.i32 q1, #0 - vstmia sp!, {q0-q1} - - ldmia sp!, {r4-r8, pc} -.size bsaes_ctr32_encrypt_blocks,.-bsaes_ctr32_encrypt_blocks -___ -} -{ -###################################################################### -# void bsaes_xts_[en|de]crypt(const char *inp,char *out,size_t len, -# const AES_KEY *key1, const AES_KEY *key2, -# const unsigned char iv[16]); -# -my ($inp,$out,$len,$key,$rounds,$magic,$fp)=(map("r$_",(7..10,1..3))); -my $const="r6"; # returned by _bsaes_key_convert -my $twmask=@XMM[5]; -my @T=@XMM[6..7]; - -$code.=<<___; -.globl bsaes_xts_encrypt -.type bsaes_xts_encrypt,%function -.align 4 -bsaes_xts_encrypt: - mov ip, sp - stmdb sp!, {r4-r10, lr} @ 0x20 - VFP_ABI_PUSH - mov r6, sp @ future $fp - - mov $inp, r0 - mov $out, r1 - mov $len, r2 - mov $key, r3 - - sub r0, sp, #0x10 @ 0x10 - bic r0, #0xf @ align at 16 bytes - mov sp, r0 - -#ifdef XTS_CHAIN_TWEAK - ldr r0, [ip] @ pointer to input tweak -#else - @ generate initial tweak - ldr r0, [ip, #4] @ iv[] - mov r1, sp - ldr r2, [ip, #0] @ key2 - bl AES_encrypt - mov r0,sp @ pointer to initial tweak -#endif - - ldr $rounds, [$key, #240] @ get # of rounds - mov $fp, r6 -#ifndef BSAES_ASM_EXTENDED_KEY - @ allocate the key schedule on the stack - sub r12, sp, $rounds, lsl#7 @ 128 bytes per inner round key - @ add r12, #`128-32` @ size of bit-sliced key schedule - sub r12, #`32+16` @ place for tweak[9] - - @ populate the key schedule - mov r4, $key @ pass key - mov r5, $rounds @ pass # of rounds - mov sp, r12 - add r12, #0x90 @ pass key schedule - bl _bsaes_key_convert - veor @XMM[7], @XMM[7], @XMM[15] @ fix up last round key - vstmia r12, {@XMM[7]} @ save last round key -#else - ldr r12, [$key, #244] - eors r12, #1 - beq 0f - - str r12, [$key, #244] - mov r4, $key @ pass key - mov r5, $rounds @ pass # of rounds - add r12, $key, #248 @ pass key schedule - bl _bsaes_key_convert - veor @XMM[7], @XMM[7], @XMM[15] @ fix up last round key - vstmia r12, {@XMM[7]} - -.align 2 -0: sub sp, #0x90 @ place for tweak[9] -#endif - - vld1.8 {@XMM[8]}, [r0] @ initial tweak - adr $magic, .Lxts_magic - - subs $len, #0x80 - blo .Lxts_enc_short - b .Lxts_enc_loop - -.align 4 -.Lxts_enc_loop: - vldmia $magic, {$twmask} @ load XTS magic - vshr.s64 @T[0], @XMM[8], #63 - mov r0, sp - vand @T[0], @T[0], $twmask -___ -for($i=9;$i<16;$i++) { -$code.=<<___; - vadd.u64 @XMM[$i], @XMM[$i-1], @XMM[$i-1] - vst1.64 {@XMM[$i-1]}, [r0,:128]! - vswp `&Dhi("@T[0]")`,`&Dlo("@T[0]")` - vshr.s64 @T[1], @XMM[$i], #63 - veor @XMM[$i], @XMM[$i], @T[0] - vand @T[1], @T[1], $twmask -___ - @T=reverse(@T); - -$code.=<<___ if ($i>=10); - vld1.8 {@XMM[$i-10]}, [$inp]! -___ -$code.=<<___ if ($i>=11); - veor @XMM[$i-11], @XMM[$i-11], @XMM[$i-3] -___ -} -$code.=<<___; - vadd.u64 @XMM[8], @XMM[15], @XMM[15] - vst1.64 {@XMM[15]}, [r0,:128]! - vswp `&Dhi("@T[0]")`,`&Dlo("@T[0]")` - veor @XMM[8], @XMM[8], @T[0] - vst1.64 {@XMM[8]}, [r0,:128] @ next round tweak - - vld1.8 {@XMM[6]-@XMM[7]}, [$inp]! - veor @XMM[5], @XMM[5], @XMM[13] -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x90 @ pass key schedule -#else - add r4, $key, #248 @ pass key schedule -#endif - veor @XMM[6], @XMM[6], @XMM[14] - mov r5, $rounds @ pass rounds - veor @XMM[7], @XMM[7], @XMM[15] - mov r0, sp - - bl _bsaes_encrypt8 - - vld1.64 {@XMM[ 8]-@XMM[ 9]}, [r0,:128]! - vld1.64 {@XMM[10]-@XMM[11]}, [r0,:128]! - veor @XMM[0], @XMM[0], @XMM[ 8] - vld1.64 {@XMM[12]-@XMM[13]}, [r0,:128]! - veor @XMM[1], @XMM[1], @XMM[ 9] - veor @XMM[8], @XMM[4], @XMM[10] - vst1.8 {@XMM[0]-@XMM[1]}, [$out]! - veor @XMM[9], @XMM[6], @XMM[11] - vld1.64 {@XMM[14]-@XMM[15]}, [r0,:128]! - veor @XMM[10], @XMM[3], @XMM[12] - vst1.8 {@XMM[8]-@XMM[9]}, [$out]! - veor @XMM[11], @XMM[7], @XMM[13] - veor @XMM[12], @XMM[2], @XMM[14] - vst1.8 {@XMM[10]-@XMM[11]}, [$out]! - veor @XMM[13], @XMM[5], @XMM[15] - vst1.8 {@XMM[12]-@XMM[13]}, [$out]! - - vld1.64 {@XMM[8]}, [r0,:128] @ next round tweak - - subs $len, #0x80 - bpl .Lxts_enc_loop - -.Lxts_enc_short: - adds $len, #0x70 - bmi .Lxts_enc_done - - vldmia $magic, {$twmask} @ load XTS magic - vshr.s64 @T[0], @XMM[8], #63 - mov r0, sp - vand @T[0], @T[0], $twmask -___ -for($i=9;$i<16;$i++) { -$code.=<<___; - vadd.u64 @XMM[$i], @XMM[$i-1], @XMM[$i-1] - vst1.64 {@XMM[$i-1]}, [r0,:128]! - vswp `&Dhi("@T[0]")`,`&Dlo("@T[0]")` - vshr.s64 @T[1], @XMM[$i], #63 - veor @XMM[$i], @XMM[$i], @T[0] - vand @T[1], @T[1], $twmask -___ - @T=reverse(@T); - -$code.=<<___ if ($i>=10); - vld1.8 {@XMM[$i-10]}, [$inp]! - subs $len, #0x10 - bmi .Lxts_enc_`$i-9` -___ -$code.=<<___ if ($i>=11); - veor @XMM[$i-11], @XMM[$i-11], @XMM[$i-3] -___ -} -$code.=<<___; - sub $len, #0x10 - vst1.64 {@XMM[15]}, [r0,:128] @ next round tweak - - vld1.8 {@XMM[6]}, [$inp]! - veor @XMM[5], @XMM[5], @XMM[13] -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x90 @ pass key schedule -#else - add r4, $key, #248 @ pass key schedule -#endif - veor @XMM[6], @XMM[6], @XMM[14] - mov r5, $rounds @ pass rounds - mov r0, sp - - bl _bsaes_encrypt8 - - vld1.64 {@XMM[ 8]-@XMM[ 9]}, [r0,:128]! - vld1.64 {@XMM[10]-@XMM[11]}, [r0,:128]! - veor @XMM[0], @XMM[0], @XMM[ 8] - vld1.64 {@XMM[12]-@XMM[13]}, [r0,:128]! - veor @XMM[1], @XMM[1], @XMM[ 9] - veor @XMM[8], @XMM[4], @XMM[10] - vst1.8 {@XMM[0]-@XMM[1]}, [$out]! - veor @XMM[9], @XMM[6], @XMM[11] - vld1.64 {@XMM[14]}, [r0,:128]! - veor @XMM[10], @XMM[3], @XMM[12] - vst1.8 {@XMM[8]-@XMM[9]}, [$out]! - veor @XMM[11], @XMM[7], @XMM[13] - veor @XMM[12], @XMM[2], @XMM[14] - vst1.8 {@XMM[10]-@XMM[11]}, [$out]! - vst1.8 {@XMM[12]}, [$out]! - - vld1.64 {@XMM[8]}, [r0,:128] @ next round tweak - b .Lxts_enc_done -.align 4 -.Lxts_enc_6: - vst1.64 {@XMM[14]}, [r0,:128] @ next round tweak - - veor @XMM[4], @XMM[4], @XMM[12] -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x90 @ pass key schedule -#else - add r4, $key, #248 @ pass key schedule -#endif - veor @XMM[5], @XMM[5], @XMM[13] - mov r5, $rounds @ pass rounds - mov r0, sp - - bl _bsaes_encrypt8 - - vld1.64 {@XMM[ 8]-@XMM[ 9]}, [r0,:128]! - vld1.64 {@XMM[10]-@XMM[11]}, [r0,:128]! - veor @XMM[0], @XMM[0], @XMM[ 8] - vld1.64 {@XMM[12]-@XMM[13]}, [r0,:128]! - veor @XMM[1], @XMM[1], @XMM[ 9] - veor @XMM[8], @XMM[4], @XMM[10] - vst1.8 {@XMM[0]-@XMM[1]}, [$out]! - veor @XMM[9], @XMM[6], @XMM[11] - veor @XMM[10], @XMM[3], @XMM[12] - vst1.8 {@XMM[8]-@XMM[9]}, [$out]! - veor @XMM[11], @XMM[7], @XMM[13] - vst1.8 {@XMM[10]-@XMM[11]}, [$out]! - - vld1.64 {@XMM[8]}, [r0,:128] @ next round tweak - b .Lxts_enc_done - -@ put this in range for both ARM and Thumb mode adr instructions -.align 5 -.Lxts_magic: - .quad 1, 0x87 - -.align 5 -.Lxts_enc_5: - vst1.64 {@XMM[13]}, [r0,:128] @ next round tweak - - veor @XMM[3], @XMM[3], @XMM[11] -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x90 @ pass key schedule -#else - add r4, $key, #248 @ pass key schedule -#endif - veor @XMM[4], @XMM[4], @XMM[12] - mov r5, $rounds @ pass rounds - mov r0, sp - - bl _bsaes_encrypt8 - - vld1.64 {@XMM[ 8]-@XMM[ 9]}, [r0,:128]! - vld1.64 {@XMM[10]-@XMM[11]}, [r0,:128]! - veor @XMM[0], @XMM[0], @XMM[ 8] - vld1.64 {@XMM[12]}, [r0,:128]! - veor @XMM[1], @XMM[1], @XMM[ 9] - veor @XMM[8], @XMM[4], @XMM[10] - vst1.8 {@XMM[0]-@XMM[1]}, [$out]! - veor @XMM[9], @XMM[6], @XMM[11] - veor @XMM[10], @XMM[3], @XMM[12] - vst1.8 {@XMM[8]-@XMM[9]}, [$out]! - vst1.8 {@XMM[10]}, [$out]! - - vld1.64 {@XMM[8]}, [r0,:128] @ next round tweak - b .Lxts_enc_done -.align 4 -.Lxts_enc_4: - vst1.64 {@XMM[12]}, [r0,:128] @ next round tweak - - veor @XMM[2], @XMM[2], @XMM[10] -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x90 @ pass key schedule -#else - add r4, $key, #248 @ pass key schedule -#endif - veor @XMM[3], @XMM[3], @XMM[11] - mov r5, $rounds @ pass rounds - mov r0, sp - - bl _bsaes_encrypt8 - - vld1.64 {@XMM[ 8]-@XMM[ 9]}, [r0,:128]! - vld1.64 {@XMM[10]-@XMM[11]}, [r0,:128]! - veor @XMM[0], @XMM[0], @XMM[ 8] - veor @XMM[1], @XMM[1], @XMM[ 9] - veor @XMM[8], @XMM[4], @XMM[10] - vst1.8 {@XMM[0]-@XMM[1]}, [$out]! - veor @XMM[9], @XMM[6], @XMM[11] - vst1.8 {@XMM[8]-@XMM[9]}, [$out]! - - vld1.64 {@XMM[8]}, [r0,:128] @ next round tweak - b .Lxts_enc_done -.align 4 -.Lxts_enc_3: - vst1.64 {@XMM[11]}, [r0,:128] @ next round tweak - - veor @XMM[1], @XMM[1], @XMM[9] -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x90 @ pass key schedule -#else - add r4, $key, #248 @ pass key schedule -#endif - veor @XMM[2], @XMM[2], @XMM[10] - mov r5, $rounds @ pass rounds - mov r0, sp - - bl _bsaes_encrypt8 - - vld1.64 {@XMM[8]-@XMM[9]}, [r0,:128]! - vld1.64 {@XMM[10]}, [r0,:128]! - veor @XMM[0], @XMM[0], @XMM[ 8] - veor @XMM[1], @XMM[1], @XMM[ 9] - veor @XMM[8], @XMM[4], @XMM[10] - vst1.8 {@XMM[0]-@XMM[1]}, [$out]! - vst1.8 {@XMM[8]}, [$out]! - - vld1.64 {@XMM[8]}, [r0,:128] @ next round tweak - b .Lxts_enc_done -.align 4 -.Lxts_enc_2: - vst1.64 {@XMM[10]}, [r0,:128] @ next round tweak - - veor @XMM[0], @XMM[0], @XMM[8] -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x90 @ pass key schedule -#else - add r4, $key, #248 @ pass key schedule -#endif - veor @XMM[1], @XMM[1], @XMM[9] - mov r5, $rounds @ pass rounds - mov r0, sp - - bl _bsaes_encrypt8 - - vld1.64 {@XMM[8]-@XMM[9]}, [r0,:128]! - veor @XMM[0], @XMM[0], @XMM[ 8] - veor @XMM[1], @XMM[1], @XMM[ 9] - vst1.8 {@XMM[0]-@XMM[1]}, [$out]! - - vld1.64 {@XMM[8]}, [r0,:128] @ next round tweak - b .Lxts_enc_done -.align 4 -.Lxts_enc_1: - mov r0, sp - veor @XMM[0], @XMM[8] - mov r1, sp - vst1.8 {@XMM[0]}, [sp,:128] - mov r2, $key - mov r4, $fp @ preserve fp - - bl AES_encrypt - - vld1.8 {@XMM[0]}, [sp,:128] - veor @XMM[0], @XMM[0], @XMM[8] - vst1.8 {@XMM[0]}, [$out]! - mov $fp, r4 - - vmov @XMM[8], @XMM[9] @ next round tweak - -.Lxts_enc_done: -#ifndef XTS_CHAIN_TWEAK - adds $len, #0x10 - beq .Lxts_enc_ret - sub r6, $out, #0x10 - -.Lxts_enc_steal: - ldrb r0, [$inp], #1 - ldrb r1, [$out, #-0x10] - strb r0, [$out, #-0x10] - strb r1, [$out], #1 - - subs $len, #1 - bhi .Lxts_enc_steal - - vld1.8 {@XMM[0]}, [r6] - mov r0, sp - veor @XMM[0], @XMM[0], @XMM[8] - mov r1, sp - vst1.8 {@XMM[0]}, [sp,:128] - mov r2, $key - mov r4, $fp @ preserve fp - - bl AES_encrypt - - vld1.8 {@XMM[0]}, [sp,:128] - veor @XMM[0], @XMM[0], @XMM[8] - vst1.8 {@XMM[0]}, [r6] - mov $fp, r4 -#endif - -.Lxts_enc_ret: - bic r0, $fp, #0xf - vmov.i32 q0, #0 - vmov.i32 q1, #0 -#ifdef XTS_CHAIN_TWEAK - ldr r1, [$fp, #0x20+VFP_ABI_FRAME] @ chain tweak -#endif -.Lxts_enc_bzero: @ wipe key schedule [if any] - vstmia sp!, {q0-q1} - cmp sp, r0 - bne .Lxts_enc_bzero - - mov sp, $fp -#ifdef XTS_CHAIN_TWEAK - vst1.8 {@XMM[8]}, [r1] -#endif - VFP_ABI_POP - ldmia sp!, {r4-r10, pc} @ return - -.size bsaes_xts_encrypt,.-bsaes_xts_encrypt - -.globl bsaes_xts_decrypt -.type bsaes_xts_decrypt,%function -.align 4 -bsaes_xts_decrypt: - mov ip, sp - stmdb sp!, {r4-r10, lr} @ 0x20 - VFP_ABI_PUSH - mov r6, sp @ future $fp - - mov $inp, r0 - mov $out, r1 - mov $len, r2 - mov $key, r3 - - sub r0, sp, #0x10 @ 0x10 - bic r0, #0xf @ align at 16 bytes - mov sp, r0 - -#ifdef XTS_CHAIN_TWEAK - ldr r0, [ip] @ pointer to input tweak -#else - @ generate initial tweak - ldr r0, [ip, #4] @ iv[] - mov r1, sp - ldr r2, [ip, #0] @ key2 - bl AES_encrypt - mov r0, sp @ pointer to initial tweak -#endif - - ldr $rounds, [$key, #240] @ get # of rounds - mov $fp, r6 -#ifndef BSAES_ASM_EXTENDED_KEY - @ allocate the key schedule on the stack - sub r12, sp, $rounds, lsl#7 @ 128 bytes per inner round key - @ add r12, #`128-32` @ size of bit-sliced key schedule - sub r12, #`32+16` @ place for tweak[9] - - @ populate the key schedule - mov r4, $key @ pass key - mov r5, $rounds @ pass # of rounds - mov sp, r12 - add r12, #0x90 @ pass key schedule - bl _bsaes_key_convert - add r4, sp, #0x90 - vldmia r4, {@XMM[6]} - vstmia r12, {@XMM[15]} @ save last round key - veor @XMM[7], @XMM[7], @XMM[6] @ fix up round 0 key - vstmia r4, {@XMM[7]} -#else - ldr r12, [$key, #244] - eors r12, #1 - beq 0f - - str r12, [$key, #244] - mov r4, $key @ pass key - mov r5, $rounds @ pass # of rounds - add r12, $key, #248 @ pass key schedule - bl _bsaes_key_convert - add r4, $key, #248 - vldmia r4, {@XMM[6]} - vstmia r12, {@XMM[15]} @ save last round key - veor @XMM[7], @XMM[7], @XMM[6] @ fix up round 0 key - vstmia r4, {@XMM[7]} - -.align 2 -0: sub sp, #0x90 @ place for tweak[9] -#endif - vld1.8 {@XMM[8]}, [r0] @ initial tweak - adr $magic, .Lxts_magic - - tst $len, #0xf @ if not multiple of 16 - it ne @ Thumb2 thing, sanity check in ARM - subne $len, #0x10 @ subtract another 16 bytes - subs $len, #0x80 - - blo .Lxts_dec_short - b .Lxts_dec_loop - -.align 4 -.Lxts_dec_loop: - vldmia $magic, {$twmask} @ load XTS magic - vshr.s64 @T[0], @XMM[8], #63 - mov r0, sp - vand @T[0], @T[0], $twmask -___ -for($i=9;$i<16;$i++) { -$code.=<<___; - vadd.u64 @XMM[$i], @XMM[$i-1], @XMM[$i-1] - vst1.64 {@XMM[$i-1]}, [r0,:128]! - vswp `&Dhi("@T[0]")`,`&Dlo("@T[0]")` - vshr.s64 @T[1], @XMM[$i], #63 - veor @XMM[$i], @XMM[$i], @T[0] - vand @T[1], @T[1], $twmask -___ - @T=reverse(@T); - -$code.=<<___ if ($i>=10); - vld1.8 {@XMM[$i-10]}, [$inp]! -___ -$code.=<<___ if ($i>=11); - veor @XMM[$i-11], @XMM[$i-11], @XMM[$i-3] -___ -} -$code.=<<___; - vadd.u64 @XMM[8], @XMM[15], @XMM[15] - vst1.64 {@XMM[15]}, [r0,:128]! - vswp `&Dhi("@T[0]")`,`&Dlo("@T[0]")` - veor @XMM[8], @XMM[8], @T[0] - vst1.64 {@XMM[8]}, [r0,:128] @ next round tweak - - vld1.8 {@XMM[6]-@XMM[7]}, [$inp]! - veor @XMM[5], @XMM[5], @XMM[13] -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x90 @ pass key schedule -#else - add r4, $key, #248 @ pass key schedule -#endif - veor @XMM[6], @XMM[6], @XMM[14] - mov r5, $rounds @ pass rounds - veor @XMM[7], @XMM[7], @XMM[15] - mov r0, sp - - bl _bsaes_decrypt8 - - vld1.64 {@XMM[ 8]-@XMM[ 9]}, [r0,:128]! - vld1.64 {@XMM[10]-@XMM[11]}, [r0,:128]! - veor @XMM[0], @XMM[0], @XMM[ 8] - vld1.64 {@XMM[12]-@XMM[13]}, [r0,:128]! - veor @XMM[1], @XMM[1], @XMM[ 9] - veor @XMM[8], @XMM[6], @XMM[10] - vst1.8 {@XMM[0]-@XMM[1]}, [$out]! - veor @XMM[9], @XMM[4], @XMM[11] - vld1.64 {@XMM[14]-@XMM[15]}, [r0,:128]! - veor @XMM[10], @XMM[2], @XMM[12] - vst1.8 {@XMM[8]-@XMM[9]}, [$out]! - veor @XMM[11], @XMM[7], @XMM[13] - veor @XMM[12], @XMM[3], @XMM[14] - vst1.8 {@XMM[10]-@XMM[11]}, [$out]! - veor @XMM[13], @XMM[5], @XMM[15] - vst1.8 {@XMM[12]-@XMM[13]}, [$out]! - - vld1.64 {@XMM[8]}, [r0,:128] @ next round tweak - - subs $len, #0x80 - bpl .Lxts_dec_loop - -.Lxts_dec_short: - adds $len, #0x70 - bmi .Lxts_dec_done - - vldmia $magic, {$twmask} @ load XTS magic - vshr.s64 @T[0], @XMM[8], #63 - mov r0, sp - vand @T[0], @T[0], $twmask -___ -for($i=9;$i<16;$i++) { -$code.=<<___; - vadd.u64 @XMM[$i], @XMM[$i-1], @XMM[$i-1] - vst1.64 {@XMM[$i-1]}, [r0,:128]! - vswp `&Dhi("@T[0]")`,`&Dlo("@T[0]")` - vshr.s64 @T[1], @XMM[$i], #63 - veor @XMM[$i], @XMM[$i], @T[0] - vand @T[1], @T[1], $twmask -___ - @T=reverse(@T); - -$code.=<<___ if ($i>=10); - vld1.8 {@XMM[$i-10]}, [$inp]! - subs $len, #0x10 - bmi .Lxts_dec_`$i-9` -___ -$code.=<<___ if ($i>=11); - veor @XMM[$i-11], @XMM[$i-11], @XMM[$i-3] -___ -} -$code.=<<___; - sub $len, #0x10 - vst1.64 {@XMM[15]}, [r0,:128] @ next round tweak - - vld1.8 {@XMM[6]}, [$inp]! - veor @XMM[5], @XMM[5], @XMM[13] -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x90 @ pass key schedule -#else - add r4, $key, #248 @ pass key schedule -#endif - veor @XMM[6], @XMM[6], @XMM[14] - mov r5, $rounds @ pass rounds - mov r0, sp - - bl _bsaes_decrypt8 - - vld1.64 {@XMM[ 8]-@XMM[ 9]}, [r0,:128]! - vld1.64 {@XMM[10]-@XMM[11]}, [r0,:128]! - veor @XMM[0], @XMM[0], @XMM[ 8] - vld1.64 {@XMM[12]-@XMM[13]}, [r0,:128]! - veor @XMM[1], @XMM[1], @XMM[ 9] - veor @XMM[8], @XMM[6], @XMM[10] - vst1.8 {@XMM[0]-@XMM[1]}, [$out]! - veor @XMM[9], @XMM[4], @XMM[11] - vld1.64 {@XMM[14]}, [r0,:128]! - veor @XMM[10], @XMM[2], @XMM[12] - vst1.8 {@XMM[8]-@XMM[9]}, [$out]! - veor @XMM[11], @XMM[7], @XMM[13] - veor @XMM[12], @XMM[3], @XMM[14] - vst1.8 {@XMM[10]-@XMM[11]}, [$out]! - vst1.8 {@XMM[12]}, [$out]! - - vld1.64 {@XMM[8]}, [r0,:128] @ next round tweak - b .Lxts_dec_done -.align 4 -.Lxts_dec_6: - vst1.64 {@XMM[14]}, [r0,:128] @ next round tweak - - veor @XMM[4], @XMM[4], @XMM[12] -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x90 @ pass key schedule -#else - add r4, $key, #248 @ pass key schedule -#endif - veor @XMM[5], @XMM[5], @XMM[13] - mov r5, $rounds @ pass rounds - mov r0, sp - - bl _bsaes_decrypt8 - - vld1.64 {@XMM[ 8]-@XMM[ 9]}, [r0,:128]! - vld1.64 {@XMM[10]-@XMM[11]}, [r0,:128]! - veor @XMM[0], @XMM[0], @XMM[ 8] - vld1.64 {@XMM[12]-@XMM[13]}, [r0,:128]! - veor @XMM[1], @XMM[1], @XMM[ 9] - veor @XMM[8], @XMM[6], @XMM[10] - vst1.8 {@XMM[0]-@XMM[1]}, [$out]! - veor @XMM[9], @XMM[4], @XMM[11] - veor @XMM[10], @XMM[2], @XMM[12] - vst1.8 {@XMM[8]-@XMM[9]}, [$out]! - veor @XMM[11], @XMM[7], @XMM[13] - vst1.8 {@XMM[10]-@XMM[11]}, [$out]! - - vld1.64 {@XMM[8]}, [r0,:128] @ next round tweak - b .Lxts_dec_done -.align 4 -.Lxts_dec_5: - vst1.64 {@XMM[13]}, [r0,:128] @ next round tweak - - veor @XMM[3], @XMM[3], @XMM[11] -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x90 @ pass key schedule -#else - add r4, $key, #248 @ pass key schedule -#endif - veor @XMM[4], @XMM[4], @XMM[12] - mov r5, $rounds @ pass rounds - mov r0, sp - - bl _bsaes_decrypt8 - - vld1.64 {@XMM[ 8]-@XMM[ 9]}, [r0,:128]! - vld1.64 {@XMM[10]-@XMM[11]}, [r0,:128]! - veor @XMM[0], @XMM[0], @XMM[ 8] - vld1.64 {@XMM[12]}, [r0,:128]! - veor @XMM[1], @XMM[1], @XMM[ 9] - veor @XMM[8], @XMM[6], @XMM[10] - vst1.8 {@XMM[0]-@XMM[1]}, [$out]! - veor @XMM[9], @XMM[4], @XMM[11] - veor @XMM[10], @XMM[2], @XMM[12] - vst1.8 {@XMM[8]-@XMM[9]}, [$out]! - vst1.8 {@XMM[10]}, [$out]! - - vld1.64 {@XMM[8]}, [r0,:128] @ next round tweak - b .Lxts_dec_done -.align 4 -.Lxts_dec_4: - vst1.64 {@XMM[12]}, [r0,:128] @ next round tweak - - veor @XMM[2], @XMM[2], @XMM[10] -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x90 @ pass key schedule -#else - add r4, $key, #248 @ pass key schedule -#endif - veor @XMM[3], @XMM[3], @XMM[11] - mov r5, $rounds @ pass rounds - mov r0, sp - - bl _bsaes_decrypt8 - - vld1.64 {@XMM[ 8]-@XMM[ 9]}, [r0,:128]! - vld1.64 {@XMM[10]-@XMM[11]}, [r0,:128]! - veor @XMM[0], @XMM[0], @XMM[ 8] - veor @XMM[1], @XMM[1], @XMM[ 9] - veor @XMM[8], @XMM[6], @XMM[10] - vst1.8 {@XMM[0]-@XMM[1]}, [$out]! - veor @XMM[9], @XMM[4], @XMM[11] - vst1.8 {@XMM[8]-@XMM[9]}, [$out]! - - vld1.64 {@XMM[8]}, [r0,:128] @ next round tweak - b .Lxts_dec_done -.align 4 -.Lxts_dec_3: - vst1.64 {@XMM[11]}, [r0,:128] @ next round tweak - - veor @XMM[1], @XMM[1], @XMM[9] -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x90 @ pass key schedule -#else - add r4, $key, #248 @ pass key schedule -#endif - veor @XMM[2], @XMM[2], @XMM[10] - mov r5, $rounds @ pass rounds - mov r0, sp - - bl _bsaes_decrypt8 - - vld1.64 {@XMM[8]-@XMM[9]}, [r0,:128]! - vld1.64 {@XMM[10]}, [r0,:128]! - veor @XMM[0], @XMM[0], @XMM[ 8] - veor @XMM[1], @XMM[1], @XMM[ 9] - veor @XMM[8], @XMM[6], @XMM[10] - vst1.8 {@XMM[0]-@XMM[1]}, [$out]! - vst1.8 {@XMM[8]}, [$out]! - - vld1.64 {@XMM[8]}, [r0,:128] @ next round tweak - b .Lxts_dec_done -.align 4 -.Lxts_dec_2: - vst1.64 {@XMM[10]}, [r0,:128] @ next round tweak - - veor @XMM[0], @XMM[0], @XMM[8] -#ifndef BSAES_ASM_EXTENDED_KEY - add r4, sp, #0x90 @ pass key schedule -#else - add r4, $key, #248 @ pass key schedule -#endif - veor @XMM[1], @XMM[1], @XMM[9] - mov r5, $rounds @ pass rounds - mov r0, sp - - bl _bsaes_decrypt8 - - vld1.64 {@XMM[8]-@XMM[9]}, [r0,:128]! - veor @XMM[0], @XMM[0], @XMM[ 8] - veor @XMM[1], @XMM[1], @XMM[ 9] - vst1.8 {@XMM[0]-@XMM[1]}, [$out]! - - vld1.64 {@XMM[8]}, [r0,:128] @ next round tweak - b .Lxts_dec_done -.align 4 -.Lxts_dec_1: - mov r0, sp - veor @XMM[0], @XMM[8] - mov r1, sp - vst1.8 {@XMM[0]}, [sp,:128] - mov r2, $key - mov r4, $fp @ preserve fp - mov r5, $magic @ preserve magic - - bl AES_decrypt - - vld1.8 {@XMM[0]}, [sp,:128] - veor @XMM[0], @XMM[0], @XMM[8] - vst1.8 {@XMM[0]}, [$out]! - mov $fp, r4 - mov $magic, r5 - - vmov @XMM[8], @XMM[9] @ next round tweak - -.Lxts_dec_done: -#ifndef XTS_CHAIN_TWEAK - adds $len, #0x10 - beq .Lxts_dec_ret - - @ calculate one round of extra tweak for the stolen ciphertext - vldmia $magic, {$twmask} - vshr.s64 @XMM[6], @XMM[8], #63 - vand @XMM[6], @XMM[6], $twmask - vadd.u64 @XMM[9], @XMM[8], @XMM[8] - vswp `&Dhi("@XMM[6]")`,`&Dlo("@XMM[6]")` - veor @XMM[9], @XMM[9], @XMM[6] - - @ perform the final decryption with the last tweak value - vld1.8 {@XMM[0]}, [$inp]! - mov r0, sp - veor @XMM[0], @XMM[0], @XMM[9] - mov r1, sp - vst1.8 {@XMM[0]}, [sp,:128] - mov r2, $key - mov r4, $fp @ preserve fp - - bl AES_decrypt - - vld1.8 {@XMM[0]}, [sp,:128] - veor @XMM[0], @XMM[0], @XMM[9] - vst1.8 {@XMM[0]}, [$out] - - mov r6, $out -.Lxts_dec_steal: - ldrb r1, [$out] - ldrb r0, [$inp], #1 - strb r1, [$out, #0x10] - strb r0, [$out], #1 - - subs $len, #1 - bhi .Lxts_dec_steal - - vld1.8 {@XMM[0]}, [r6] - mov r0, sp - veor @XMM[0], @XMM[8] - mov r1, sp - vst1.8 {@XMM[0]}, [sp,:128] - mov r2, $key - - bl AES_decrypt - - vld1.8 {@XMM[0]}, [sp,:128] - veor @XMM[0], @XMM[0], @XMM[8] - vst1.8 {@XMM[0]}, [r6] - mov $fp, r4 -#endif - -.Lxts_dec_ret: - bic r0, $fp, #0xf - vmov.i32 q0, #0 - vmov.i32 q1, #0 -#ifdef XTS_CHAIN_TWEAK - ldr r1, [$fp, #0x20+VFP_ABI_FRAME] @ chain tweak -#endif -.Lxts_dec_bzero: @ wipe key schedule [if any] - vstmia sp!, {q0-q1} - cmp sp, r0 - bne .Lxts_dec_bzero - - mov sp, $fp -#ifdef XTS_CHAIN_TWEAK - vst1.8 {@XMM[8]}, [r1] -#endif - VFP_ABI_POP - ldmia sp!, {r4-r10, pc} @ return - -.size bsaes_xts_decrypt,.-bsaes_xts_decrypt -___ -} -$code.=<<___; -#endif -___ - -$code =~ s/\`([^\`]*)\`/eval($1)/gem; - -open SELF,$0; -while() { - next if (/^#!/); - last if (!s/^#/@/ and !/^$/); - print; -} -close SELF; - -print $code; - -close STDOUT; diff --git a/arch/arm/crypto/sha1-armv7-neon.S b/arch/arm/crypto/sha1-armv7-neon.S deleted file mode 100644 index 50013c0e2864..000000000000 --- a/arch/arm/crypto/sha1-armv7-neon.S +++ /dev/null @@ -1,634 +0,0 @@ -/* sha1-armv7-neon.S - ARM/NEON accelerated SHA-1 transform function - * - * Copyright © 2013-2014 Jussi Kivilinna - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the Free - * Software Foundation; either version 2 of the License, or (at your option) - * any later version. - */ - -#include - - -.syntax unified -.code 32 -.fpu neon - -.text - - -/* Context structure */ - -#define state_h0 0 -#define state_h1 4 -#define state_h2 8 -#define state_h3 12 -#define state_h4 16 - - -/* Constants */ - -#define K1 0x5A827999 -#define K2 0x6ED9EBA1 -#define K3 0x8F1BBCDC -#define K4 0xCA62C1D6 -.align 4 -.LK_VEC: -.LK1: .long K1, K1, K1, K1 -.LK2: .long K2, K2, K2, K2 -.LK3: .long K3, K3, K3, K3 -.LK4: .long K4, K4, K4, K4 - - -/* Register macros */ - -#define RSTATE r0 -#define RDATA r1 -#define RNBLKS r2 -#define ROLDSTACK r3 -#define RWK lr - -#define _a r4 -#define _b r5 -#define _c r6 -#define _d r7 -#define _e r8 - -#define RT0 r9 -#define RT1 r10 -#define RT2 r11 -#define RT3 r12 - -#define W0 q0 -#define W1 q1 -#define W2 q2 -#define W3 q3 -#define W4 q4 -#define W5 q5 -#define W6 q6 -#define W7 q7 - -#define tmp0 q8 -#define tmp1 q9 -#define tmp2 q10 -#define tmp3 q11 - -#define qK1 q12 -#define qK2 q13 -#define qK3 q14 -#define qK4 q15 - - -/* Round function macros. */ - -#define WK_offs(i) (((i) & 15) * 4) - -#define _R_F1(a,b,c,d,e,i,pre1,pre2,pre3,i16,\ - W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - ldr RT3, [sp, WK_offs(i)]; \ - pre1(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \ - bic RT0, d, b; \ - add e, e, a, ror #(32 - 5); \ - and RT1, c, b; \ - pre2(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \ - add RT0, RT0, RT3; \ - add e, e, RT1; \ - ror b, #(32 - 30); \ - pre3(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \ - add e, e, RT0; - -#define _R_F2(a,b,c,d,e,i,pre1,pre2,pre3,i16,\ - W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - ldr RT3, [sp, WK_offs(i)]; \ - pre1(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \ - eor RT0, d, b; \ - add e, e, a, ror #(32 - 5); \ - eor RT0, RT0, c; \ - pre2(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \ - add e, e, RT3; \ - ror b, #(32 - 30); \ - pre3(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \ - add e, e, RT0; \ - -#define _R_F3(a,b,c,d,e,i,pre1,pre2,pre3,i16,\ - W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - ldr RT3, [sp, WK_offs(i)]; \ - pre1(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \ - eor RT0, b, c; \ - and RT1, b, c; \ - add e, e, a, ror #(32 - 5); \ - pre2(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \ - and RT0, RT0, d; \ - add RT1, RT1, RT3; \ - add e, e, RT0; \ - ror b, #(32 - 30); \ - pre3(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \ - add e, e, RT1; - -#define _R_F4(a,b,c,d,e,i,pre1,pre2,pre3,i16,\ - W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - _R_F2(a,b,c,d,e,i,pre1,pre2,pre3,i16,\ - W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) - -#define _R(a,b,c,d,e,f,i,pre1,pre2,pre3,i16,\ - W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - _R_##f(a,b,c,d,e,i,pre1,pre2,pre3,i16,\ - W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) - -#define R(a,b,c,d,e,f,i) \ - _R_##f(a,b,c,d,e,i,dummy,dummy,dummy,i16,\ - W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) - -#define dummy(...) - - -/* Input expansion macros. */ - -/********* Precalc macros for rounds 0-15 *************************************/ - -#define W_PRECALC_00_15() \ - add RWK, sp, #(WK_offs(0)); \ - \ - vld1.32 {tmp0, tmp1}, [RDATA]!; \ - vrev32.8 W0, tmp0; /* big => little */ \ - vld1.32 {tmp2, tmp3}, [RDATA]!; \ - vadd.u32 tmp0, W0, curK; \ - vrev32.8 W7, tmp1; /* big => little */ \ - vrev32.8 W6, tmp2; /* big => little */ \ - vadd.u32 tmp1, W7, curK; \ - vrev32.8 W5, tmp3; /* big => little */ \ - vadd.u32 tmp2, W6, curK; \ - vst1.32 {tmp0, tmp1}, [RWK]!; \ - vadd.u32 tmp3, W5, curK; \ - vst1.32 {tmp2, tmp3}, [RWK]; \ - -#define WPRECALC_00_15_0(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - vld1.32 {tmp0, tmp1}, [RDATA]!; \ - -#define WPRECALC_00_15_1(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - add RWK, sp, #(WK_offs(0)); \ - -#define WPRECALC_00_15_2(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - vrev32.8 W0, tmp0; /* big => little */ \ - -#define WPRECALC_00_15_3(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - vld1.32 {tmp2, tmp3}, [RDATA]!; \ - -#define WPRECALC_00_15_4(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - vadd.u32 tmp0, W0, curK; \ - -#define WPRECALC_00_15_5(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - vrev32.8 W7, tmp1; /* big => little */ \ - -#define WPRECALC_00_15_6(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - vrev32.8 W6, tmp2; /* big => little */ \ - -#define WPRECALC_00_15_7(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - vadd.u32 tmp1, W7, curK; \ - -#define WPRECALC_00_15_8(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - vrev32.8 W5, tmp3; /* big => little */ \ - -#define WPRECALC_00_15_9(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - vadd.u32 tmp2, W6, curK; \ - -#define WPRECALC_00_15_10(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - vst1.32 {tmp0, tmp1}, [RWK]!; \ - -#define WPRECALC_00_15_11(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - vadd.u32 tmp3, W5, curK; \ - -#define WPRECALC_00_15_12(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - vst1.32 {tmp2, tmp3}, [RWK]; \ - - -/********* Precalc macros for rounds 16-31 ************************************/ - -#define WPRECALC_16_31_0(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - veor tmp0, tmp0; \ - vext.8 W, W_m16, W_m12, #8; \ - -#define WPRECALC_16_31_1(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - add RWK, sp, #(WK_offs(i)); \ - vext.8 tmp0, W_m04, tmp0, #4; \ - -#define WPRECALC_16_31_2(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - veor tmp0, tmp0, W_m16; \ - veor.32 W, W, W_m08; \ - -#define WPRECALC_16_31_3(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - veor tmp1, tmp1; \ - veor W, W, tmp0; \ - -#define WPRECALC_16_31_4(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - vshl.u32 tmp0, W, #1; \ - -#define WPRECALC_16_31_5(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - vext.8 tmp1, tmp1, W, #(16-12); \ - vshr.u32 W, W, #31; \ - -#define WPRECALC_16_31_6(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - vorr tmp0, tmp0, W; \ - vshr.u32 W, tmp1, #30; \ - -#define WPRECALC_16_31_7(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - vshl.u32 tmp1, tmp1, #2; \ - -#define WPRECALC_16_31_8(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - veor tmp0, tmp0, W; \ - -#define WPRECALC_16_31_9(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - veor W, tmp0, tmp1; \ - -#define WPRECALC_16_31_10(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - vadd.u32 tmp0, W, curK; \ - -#define WPRECALC_16_31_11(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - vst1.32 {tmp0}, [RWK]; - - -/********* Precalc macros for rounds 32-79 ************************************/ - -#define WPRECALC_32_79_0(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - veor W, W_m28; \ - -#define WPRECALC_32_79_1(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - vext.8 tmp0, W_m08, W_m04, #8; \ - -#define WPRECALC_32_79_2(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - veor W, W_m16; \ - -#define WPRECALC_32_79_3(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - veor W, tmp0; \ - -#define WPRECALC_32_79_4(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - add RWK, sp, #(WK_offs(i&~3)); \ - -#define WPRECALC_32_79_5(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - vshl.u32 tmp1, W, #2; \ - -#define WPRECALC_32_79_6(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - vshr.u32 tmp0, W, #30; \ - -#define WPRECALC_32_79_7(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - vorr W, tmp0, tmp1; \ - -#define WPRECALC_32_79_8(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - vadd.u32 tmp0, W, curK; \ - -#define WPRECALC_32_79_9(i,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ - vst1.32 {tmp0}, [RWK]; - - -/* - * Transform nblks*64 bytes (nblks*16 32-bit words) at DATA. - * - * unsigned int - * sha1_transform_neon (void *ctx, const unsigned char *data, - * unsigned int nblks) - */ -.align 3 -ENTRY(sha1_transform_neon) - /* input: - * r0: ctx, CTX - * r1: data (64*nblks bytes) - * r2: nblks - */ - - cmp RNBLKS, #0; - beq .Ldo_nothing; - - push {r4-r12, lr}; - /*vpush {q4-q7};*/ - - adr RT3, .LK_VEC; - - mov ROLDSTACK, sp; - - /* Align stack. */ - sub RT0, sp, #(16*4); - and RT0, #(~(16-1)); - mov sp, RT0; - - vld1.32 {qK1-qK2}, [RT3]!; /* Load K1,K2 */ - - /* Get the values of the chaining variables. */ - ldm RSTATE, {_a-_e}; - - vld1.32 {qK3-qK4}, [RT3]; /* Load K3,K4 */ - -#undef curK -#define curK qK1 - /* Precalc 0-15. */ - W_PRECALC_00_15(); - -.Loop: - /* Transform 0-15 + Precalc 16-31. */ - _R( _a, _b, _c, _d, _e, F1, 0, - WPRECALC_16_31_0, WPRECALC_16_31_1, WPRECALC_16_31_2, 16, - W4, W5, W6, W7, W0, _, _, _ ); - _R( _e, _a, _b, _c, _d, F1, 1, - WPRECALC_16_31_3, WPRECALC_16_31_4, WPRECALC_16_31_5, 16, - W4, W5, W6, W7, W0, _, _, _ ); - _R( _d, _e, _a, _b, _c, F1, 2, - WPRECALC_16_31_6, WPRECALC_16_31_7, WPRECALC_16_31_8, 16, - W4, W5, W6, W7, W0, _, _, _ ); - _R( _c, _d, _e, _a, _b, F1, 3, - WPRECALC_16_31_9, WPRECALC_16_31_10,WPRECALC_16_31_11,16, - W4, W5, W6, W7, W0, _, _, _ ); - -#undef curK -#define curK qK2 - _R( _b, _c, _d, _e, _a, F1, 4, - WPRECALC_16_31_0, WPRECALC_16_31_1, WPRECALC_16_31_2, 20, - W3, W4, W5, W6, W7, _, _, _ ); - _R( _a, _b, _c, _d, _e, F1, 5, - WPRECALC_16_31_3, WPRECALC_16_31_4, WPRECALC_16_31_5, 20, - W3, W4, W5, W6, W7, _, _, _ ); - _R( _e, _a, _b, _c, _d, F1, 6, - WPRECALC_16_31_6, WPRECALC_16_31_7, WPRECALC_16_31_8, 20, - W3, W4, W5, W6, W7, _, _, _ ); - _R( _d, _e, _a, _b, _c, F1, 7, - WPRECALC_16_31_9, WPRECALC_16_31_10,WPRECALC_16_31_11,20, - W3, W4, W5, W6, W7, _, _, _ ); - - _R( _c, _d, _e, _a, _b, F1, 8, - WPRECALC_16_31_0, WPRECALC_16_31_1, WPRECALC_16_31_2, 24, - W2, W3, W4, W5, W6, _, _, _ ); - _R( _b, _c, _d, _e, _a, F1, 9, - WPRECALC_16_31_3, WPRECALC_16_31_4, WPRECALC_16_31_5, 24, - W2, W3, W4, W5, W6, _, _, _ ); - _R( _a, _b, _c, _d, _e, F1, 10, - WPRECALC_16_31_6, WPRECALC_16_31_7, WPRECALC_16_31_8, 24, - W2, W3, W4, W5, W6, _, _, _ ); - _R( _e, _a, _b, _c, _d, F1, 11, - WPRECALC_16_31_9, WPRECALC_16_31_10,WPRECALC_16_31_11,24, - W2, W3, W4, W5, W6, _, _, _ ); - - _R( _d, _e, _a, _b, _c, F1, 12, - WPRECALC_16_31_0, WPRECALC_16_31_1, WPRECALC_16_31_2, 28, - W1, W2, W3, W4, W5, _, _, _ ); - _R( _c, _d, _e, _a, _b, F1, 13, - WPRECALC_16_31_3, WPRECALC_16_31_4, WPRECALC_16_31_5, 28, - W1, W2, W3, W4, W5, _, _, _ ); - _R( _b, _c, _d, _e, _a, F1, 14, - WPRECALC_16_31_6, WPRECALC_16_31_7, WPRECALC_16_31_8, 28, - W1, W2, W3, W4, W5, _, _, _ ); - _R( _a, _b, _c, _d, _e, F1, 15, - WPRECALC_16_31_9, WPRECALC_16_31_10,WPRECALC_16_31_11,28, - W1, W2, W3, W4, W5, _, _, _ ); - - /* Transform 16-63 + Precalc 32-79. */ - _R( _e, _a, _b, _c, _d, F1, 16, - WPRECALC_32_79_0, WPRECALC_32_79_1, WPRECALC_32_79_2, 32, - W0, W1, W2, W3, W4, W5, W6, W7); - _R( _d, _e, _a, _b, _c, F1, 17, - WPRECALC_32_79_3, WPRECALC_32_79_4, WPRECALC_32_79_5, 32, - W0, W1, W2, W3, W4, W5, W6, W7); - _R( _c, _d, _e, _a, _b, F1, 18, - WPRECALC_32_79_6, dummy, WPRECALC_32_79_7, 32, - W0, W1, W2, W3, W4, W5, W6, W7); - _R( _b, _c, _d, _e, _a, F1, 19, - WPRECALC_32_79_8, dummy, WPRECALC_32_79_9, 32, - W0, W1, W2, W3, W4, W5, W6, W7); - - _R( _a, _b, _c, _d, _e, F2, 20, - WPRECALC_32_79_0, WPRECALC_32_79_1, WPRECALC_32_79_2, 36, - W7, W0, W1, W2, W3, W4, W5, W6); - _R( _e, _a, _b, _c, _d, F2, 21, - WPRECALC_32_79_3, WPRECALC_32_79_4, WPRECALC_32_79_5, 36, - W7, W0, W1, W2, W3, W4, W5, W6); - _R( _d, _e, _a, _b, _c, F2, 22, - WPRECALC_32_79_6, dummy, WPRECALC_32_79_7, 36, - W7, W0, W1, W2, W3, W4, W5, W6); - _R( _c, _d, _e, _a, _b, F2, 23, - WPRECALC_32_79_8, dummy, WPRECALC_32_79_9, 36, - W7, W0, W1, W2, W3, W4, W5, W6); - -#undef curK -#define curK qK3 - _R( _b, _c, _d, _e, _a, F2, 24, - WPRECALC_32_79_0, WPRECALC_32_79_1, WPRECALC_32_79_2, 40, - W6, W7, W0, W1, W2, W3, W4, W5); - _R( _a, _b, _c, _d, _e, F2, 25, - WPRECALC_32_79_3, WPRECALC_32_79_4, WPRECALC_32_79_5, 40, - W6, W7, W0, W1, W2, W3, W4, W5); - _R( _e, _a, _b, _c, _d, F2, 26, - WPRECALC_32_79_6, dummy, WPRECALC_32_79_7, 40, - W6, W7, W0, W1, W2, W3, W4, W5); - _R( _d, _e, _a, _b, _c, F2, 27, - WPRECALC_32_79_8, dummy, WPRECALC_32_79_9, 40, - W6, W7, W0, W1, W2, W3, W4, W5); - - _R( _c, _d, _e, _a, _b, F2, 28, - WPRECALC_32_79_0, WPRECALC_32_79_1, WPRECALC_32_79_2, 44, - W5, W6, W7, W0, W1, W2, W3, W4); - _R( _b, _c, _d, _e, _a, F2, 29, - WPRECALC_32_79_3, WPRECALC_32_79_4, WPRECALC_32_79_5, 44, - W5, W6, W7, W0, W1, W2, W3, W4); - _R( _a, _b, _c, _d, _e, F2, 30, - WPRECALC_32_79_6, dummy, WPRECALC_32_79_7, 44, - W5, W6, W7, W0, W1, W2, W3, W4); - _R( _e, _a, _b, _c, _d, F2, 31, - WPRECALC_32_79_8, dummy, WPRECALC_32_79_9, 44, - W5, W6, W7, W0, W1, W2, W3, W4); - - _R( _d, _e, _a, _b, _c, F2, 32, - WPRECALC_32_79_0, WPRECALC_32_79_1, WPRECALC_32_79_2, 48, - W4, W5, W6, W7, W0, W1, W2, W3); - _R( _c, _d, _e, _a, _b, F2, 33, - WPRECALC_32_79_3, WPRECALC_32_79_4, WPRECALC_32_79_5, 48, - W4, W5, W6, W7, W0, W1, W2, W3); - _R( _b, _c, _d, _e, _a, F2, 34, - WPRECALC_32_79_6, dummy, WPRECALC_32_79_7, 48, - W4, W5, W6, W7, W0, W1, W2, W3); - _R( _a, _b, _c, _d, _e, F2, 35, - WPRECALC_32_79_8, dummy, WPRECALC_32_79_9, 48, - W4, W5, W6, W7, W0, W1, W2, W3); - - _R( _e, _a, _b, _c, _d, F2, 36, - WPRECALC_32_79_0, WPRECALC_32_79_1, WPRECALC_32_79_2, 52, - W3, W4, W5, W6, W7, W0, W1, W2); - _R( _d, _e, _a, _b, _c, F2, 37, - WPRECALC_32_79_3, WPRECALC_32_79_4, WPRECALC_32_79_5, 52, - W3, W4, W5, W6, W7, W0, W1, W2); - _R( _c, _d, _e, _a, _b, F2, 38, - WPRECALC_32_79_6, dummy, WPRECALC_32_79_7, 52, - W3, W4, W5, W6, W7, W0, W1, W2); - _R( _b, _c, _d, _e, _a, F2, 39, - WPRECALC_32_79_8, dummy, WPRECALC_32_79_9, 52, - W3, W4, W5, W6, W7, W0, W1, W2); - - _R( _a, _b, _c, _d, _e, F3, 40, - WPRECALC_32_79_0, WPRECALC_32_79_1, WPRECALC_32_79_2, 56, - W2, W3, W4, W5, W6, W7, W0, W1); - _R( _e, _a, _b, _c, _d, F3, 41, - WPRECALC_32_79_3, WPRECALC_32_79_4, WPRECALC_32_79_5, 56, - W2, W3, W4, W5, W6, W7, W0, W1); - _R( _d, _e, _a, _b, _c, F3, 42, - WPRECALC_32_79_6, dummy, WPRECALC_32_79_7, 56, - W2, W3, W4, W5, W6, W7, W0, W1); - _R( _c, _d, _e, _a, _b, F3, 43, - WPRECALC_32_79_8, dummy, WPRECALC_32_79_9, 56, - W2, W3, W4, W5, W6, W7, W0, W1); - -#undef curK -#define curK qK4 - _R( _b, _c, _d, _e, _a, F3, 44, - WPRECALC_32_79_0, WPRECALC_32_79_1, WPRECALC_32_79_2, 60, - W1, W2, W3, W4, W5, W6, W7, W0); - _R( _a, _b, _c, _d, _e, F3, 45, - WPRECALC_32_79_3, WPRECALC_32_79_4, WPRECALC_32_79_5, 60, - W1, W2, W3, W4, W5, W6, W7, W0); - _R( _e, _a, _b, _c, _d, F3, 46, - WPRECALC_32_79_6, dummy, WPRECALC_32_79_7, 60, - W1, W2, W3, W4, W5, W6, W7, W0); - _R( _d, _e, _a, _b, _c, F3, 47, - WPRECALC_32_79_8, dummy, WPRECALC_32_79_9, 60, - W1, W2, W3, W4, W5, W6, W7, W0); - - _R( _c, _d, _e, _a, _b, F3, 48, - WPRECALC_32_79_0, WPRECALC_32_79_1, WPRECALC_32_79_2, 64, - W0, W1, W2, W3, W4, W5, W6, W7); - _R( _b, _c, _d, _e, _a, F3, 49, - WPRECALC_32_79_3, WPRECALC_32_79_4, WPRECALC_32_79_5, 64, - W0, W1, W2, W3, W4, W5, W6, W7); - _R( _a, _b, _c, _d, _e, F3, 50, - WPRECALC_32_79_6, dummy, WPRECALC_32_79_7, 64, - W0, W1, W2, W3, W4, W5, W6, W7); - _R( _e, _a, _b, _c, _d, F3, 51, - WPRECALC_32_79_8, dummy, WPRECALC_32_79_9, 64, - W0, W1, W2, W3, W4, W5, W6, W7); - - _R( _d, _e, _a, _b, _c, F3, 52, - WPRECALC_32_79_0, WPRECALC_32_79_1, WPRECALC_32_79_2, 68, - W7, W0, W1, W2, W3, W4, W5, W6); - _R( _c, _d, _e, _a, _b, F3, 53, - WPRECALC_32_79_3, WPRECALC_32_79_4, WPRECALC_32_79_5, 68, - W7, W0, W1, W2, W3, W4, W5, W6); - _R( _b, _c, _d, _e, _a, F3, 54, - WPRECALC_32_79_6, dummy, WPRECALC_32_79_7, 68, - W7, W0, W1, W2, W3, W4, W5, W6); - _R( _a, _b, _c, _d, _e, F3, 55, - WPRECALC_32_79_8, dummy, WPRECALC_32_79_9, 68, - W7, W0, W1, W2, W3, W4, W5, W6); - - _R( _e, _a, _b, _c, _d, F3, 56, - WPRECALC_32_79_0, WPRECALC_32_79_1, WPRECALC_32_79_2, 72, - W6, W7, W0, W1, W2, W3, W4, W5); - _R( _d, _e, _a, _b, _c, F3, 57, - WPRECALC_32_79_3, WPRECALC_32_79_4, WPRECALC_32_79_5, 72, - W6, W7, W0, W1, W2, W3, W4, W5); - _R( _c, _d, _e, _a, _b, F3, 58, - WPRECALC_32_79_6, dummy, WPRECALC_32_79_7, 72, - W6, W7, W0, W1, W2, W3, W4, W5); - _R( _b, _c, _d, _e, _a, F3, 59, - WPRECALC_32_79_8, dummy, WPRECALC_32_79_9, 72, - W6, W7, W0, W1, W2, W3, W4, W5); - - subs RNBLKS, #1; - - _R( _a, _b, _c, _d, _e, F4, 60, - WPRECALC_32_79_0, WPRECALC_32_79_1, WPRECALC_32_79_2, 76, - W5, W6, W7, W0, W1, W2, W3, W4); - _R( _e, _a, _b, _c, _d, F4, 61, - WPRECALC_32_79_3, WPRECALC_32_79_4, WPRECALC_32_79_5, 76, - W5, W6, W7, W0, W1, W2, W3, W4); - _R( _d, _e, _a, _b, _c, F4, 62, - WPRECALC_32_79_6, dummy, WPRECALC_32_79_7, 76, - W5, W6, W7, W0, W1, W2, W3, W4); - _R( _c, _d, _e, _a, _b, F4, 63, - WPRECALC_32_79_8, dummy, WPRECALC_32_79_9, 76, - W5, W6, W7, W0, W1, W2, W3, W4); - - beq .Lend; - - /* Transform 64-79 + Precalc 0-15 of next block. */ -#undef curK -#define curK qK1 - _R( _b, _c, _d, _e, _a, F4, 64, - WPRECALC_00_15_0, dummy, dummy, _, _, _, _, _, _, _, _, _ ); - _R( _a, _b, _c, _d, _e, F4, 65, - WPRECALC_00_15_1, dummy, dummy, _, _, _, _, _, _, _, _, _ ); - _R( _e, _a, _b, _c, _d, F4, 66, - WPRECALC_00_15_2, dummy, dummy, _, _, _, _, _, _, _, _, _ ); - _R( _d, _e, _a, _b, _c, F4, 67, - WPRECALC_00_15_3, dummy, dummy, _, _, _, _, _, _, _, _, _ ); - - _R( _c, _d, _e, _a, _b, F4, 68, - dummy, dummy, dummy, _, _, _, _, _, _, _, _, _ ); - _R( _b, _c, _d, _e, _a, F4, 69, - dummy, dummy, dummy, _, _, _, _, _, _, _, _, _ ); - _R( _a, _b, _c, _d, _e, F4, 70, - WPRECALC_00_15_4, dummy, dummy, _, _, _, _, _, _, _, _, _ ); - _R( _e, _a, _b, _c, _d, F4, 71, - WPRECALC_00_15_5, dummy, dummy, _, _, _, _, _, _, _, _, _ ); - - _R( _d, _e, _a, _b, _c, F4, 72, - dummy, dummy, dummy, _, _, _, _, _, _, _, _, _ ); - _R( _c, _d, _e, _a, _b, F4, 73, - dummy, dummy, dummy, _, _, _, _, _, _, _, _, _ ); - _R( _b, _c, _d, _e, _a, F4, 74, - WPRECALC_00_15_6, dummy, dummy, _, _, _, _, _, _, _, _, _ ); - _R( _a, _b, _c, _d, _e, F4, 75, - WPRECALC_00_15_7, dummy, dummy, _, _, _, _, _, _, _, _, _ ); - - _R( _e, _a, _b, _c, _d, F4, 76, - WPRECALC_00_15_8, dummy, dummy, _, _, _, _, _, _, _, _, _ ); - _R( _d, _e, _a, _b, _c, F4, 77, - WPRECALC_00_15_9, dummy, dummy, _, _, _, _, _, _, _, _, _ ); - _R( _c, _d, _e, _a, _b, F4, 78, - WPRECALC_00_15_10, dummy, dummy, _, _, _, _, _, _, _, _, _ ); - _R( _b, _c, _d, _e, _a, F4, 79, - WPRECALC_00_15_11, dummy, WPRECALC_00_15_12, _, _, _, _, _, _, _, _, _ ); - - /* Update the chaining variables. */ - ldm RSTATE, {RT0-RT3}; - add _a, RT0; - ldr RT0, [RSTATE, #state_h4]; - add _b, RT1; - add _c, RT2; - add _d, RT3; - add _e, RT0; - stm RSTATE, {_a-_e}; - - b .Loop; - -.Lend: - /* Transform 64-79 */ - R( _b, _c, _d, _e, _a, F4, 64 ); - R( _a, _b, _c, _d, _e, F4, 65 ); - R( _e, _a, _b, _c, _d, F4, 66 ); - R( _d, _e, _a, _b, _c, F4, 67 ); - R( _c, _d, _e, _a, _b, F4, 68 ); - R( _b, _c, _d, _e, _a, F4, 69 ); - R( _a, _b, _c, _d, _e, F4, 70 ); - R( _e, _a, _b, _c, _d, F4, 71 ); - R( _d, _e, _a, _b, _c, F4, 72 ); - R( _c, _d, _e, _a, _b, F4, 73 ); - R( _b, _c, _d, _e, _a, F4, 74 ); - R( _a, _b, _c, _d, _e, F4, 75 ); - R( _e, _a, _b, _c, _d, F4, 76 ); - R( _d, _e, _a, _b, _c, F4, 77 ); - R( _c, _d, _e, _a, _b, F4, 78 ); - R( _b, _c, _d, _e, _a, F4, 79 ); - - mov sp, ROLDSTACK; - - /* Update the chaining variables. */ - ldm RSTATE, {RT0-RT3}; - add _a, RT0; - ldr RT0, [RSTATE, #state_h4]; - add _b, RT1; - add _c, RT2; - add _d, RT3; - /*vpop {q4-q7};*/ - add _e, RT0; - stm RSTATE, {_a-_e}; - - pop {r4-r12, pc}; - -.Ldo_nothing: - bx lr -ENDPROC(sha1_transform_neon) diff --git a/arch/arm/crypto/sha1_glue.c b/arch/arm/crypto/sha1_glue.c index e31b0440c613..76cd976230bc 100644 --- a/arch/arm/crypto/sha1_glue.c +++ b/arch/arm/crypto/sha1_glue.c @@ -23,27 +23,32 @@ #include #include #include -#include +struct SHA1_CTX { + uint32_t h0,h1,h2,h3,h4; + u64 count; + u8 data[SHA1_BLOCK_SIZE]; +}; -asmlinkage void sha1_block_data_order(u32 *digest, +asmlinkage void sha1_block_data_order(struct SHA1_CTX *digest, const unsigned char *data, unsigned int rounds); static int sha1_init(struct shash_desc *desc) { - struct sha1_state *sctx = shash_desc_ctx(desc); - - *sctx = (struct sha1_state){ - .state = { SHA1_H0, SHA1_H1, SHA1_H2, SHA1_H3, SHA1_H4 }, - }; - + struct SHA1_CTX *sctx = shash_desc_ctx(desc); + memset(sctx, 0, sizeof(*sctx)); + sctx->h0 = SHA1_H0; + sctx->h1 = SHA1_H1; + sctx->h2 = SHA1_H2; + sctx->h3 = SHA1_H3; + sctx->h4 = SHA1_H4; return 0; } -static int __sha1_update(struct sha1_state *sctx, const u8 *data, - unsigned int len, unsigned int partial) +static int __sha1_update(struct SHA1_CTX *sctx, const u8 *data, + unsigned int len, unsigned int partial) { unsigned int done = 0; @@ -51,44 +56,43 @@ static int __sha1_update(struct sha1_state *sctx, const u8 *data, if (partial) { done = SHA1_BLOCK_SIZE - partial; - memcpy(sctx->buffer + partial, data, done); - sha1_block_data_order(sctx->state, sctx->buffer, 1); + memcpy(sctx->data + partial, data, done); + sha1_block_data_order(sctx, sctx->data, 1); } if (len - done >= SHA1_BLOCK_SIZE) { const unsigned int rounds = (len - done) / SHA1_BLOCK_SIZE; - sha1_block_data_order(sctx->state, data + done, rounds); + sha1_block_data_order(sctx, data + done, rounds); done += rounds * SHA1_BLOCK_SIZE; } - memcpy(sctx->buffer, data + done, len - done); + memcpy(sctx->data, data + done, len - done); return 0; } -int sha1_update_arm(struct shash_desc *desc, const u8 *data, - unsigned int len) +static int sha1_update(struct shash_desc *desc, const u8 *data, + unsigned int len) { - struct sha1_state *sctx = shash_desc_ctx(desc); + struct SHA1_CTX *sctx = shash_desc_ctx(desc); unsigned int partial = sctx->count % SHA1_BLOCK_SIZE; int res; /* Handle the fast case right here */ if (partial + len < SHA1_BLOCK_SIZE) { sctx->count += len; - memcpy(sctx->buffer + partial, data, len); + memcpy(sctx->data + partial, data, len); return 0; } res = __sha1_update(sctx, data, len, partial); return res; } -EXPORT_SYMBOL_GPL(sha1_update_arm); /* Add padding and return the message digest. */ static int sha1_final(struct shash_desc *desc, u8 *out) { - struct sha1_state *sctx = shash_desc_ctx(desc); + struct SHA1_CTX *sctx = shash_desc_ctx(desc); unsigned int i, index, padlen; __be32 *dst = (__be32 *)out; __be64 bits; @@ -102,7 +106,7 @@ static int sha1_final(struct shash_desc *desc, u8 *out) /* We need to fill a whole block for __sha1_update() */ if (padlen <= 56) { sctx->count += padlen; - memcpy(sctx->buffer + index, padding, padlen); + memcpy(sctx->data + index, padding, padlen); } else { __sha1_update(sctx, padding, padlen, index); } @@ -110,7 +114,7 @@ static int sha1_final(struct shash_desc *desc, u8 *out) /* Store state in digest */ for (i = 0; i < 5; i++) - dst[i] = cpu_to_be32(sctx->state[i]); + dst[i] = cpu_to_be32(((u32 *)sctx)[i]); /* Wipe context */ memset(sctx, 0, sizeof(*sctx)); @@ -120,7 +124,7 @@ static int sha1_final(struct shash_desc *desc, u8 *out) static int sha1_export(struct shash_desc *desc, void *out) { - struct sha1_state *sctx = shash_desc_ctx(desc); + struct SHA1_CTX *sctx = shash_desc_ctx(desc); memcpy(out, sctx, sizeof(*sctx)); return 0; } @@ -128,7 +132,7 @@ static int sha1_export(struct shash_desc *desc, void *out) static int sha1_import(struct shash_desc *desc, const void *in) { - struct sha1_state *sctx = shash_desc_ctx(desc); + struct SHA1_CTX *sctx = shash_desc_ctx(desc); memcpy(sctx, in, sizeof(*sctx)); return 0; } @@ -137,12 +141,12 @@ static int sha1_import(struct shash_desc *desc, const void *in) static struct shash_alg alg = { .digestsize = SHA1_DIGEST_SIZE, .init = sha1_init, - .update = sha1_update_arm, + .update = sha1_update, .final = sha1_final, .export = sha1_export, .import = sha1_import, - .descsize = sizeof(struct sha1_state), - .statesize = sizeof(struct sha1_state), + .descsize = sizeof(struct SHA1_CTX), + .statesize = sizeof(struct SHA1_CTX), .base = { .cra_name = "sha1", .cra_driver_name= "sha1-asm", @@ -171,5 +175,5 @@ module_exit(sha1_mod_fini); MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm (ARM)"); -MODULE_ALIAS_CRYPTO("sha1"); +MODULE_ALIAS("sha1"); MODULE_AUTHOR("David McCullough "); diff --git a/arch/arm/crypto/sha1_neon_glue.c b/arch/arm/crypto/sha1_neon_glue.c deleted file mode 100644 index 6f1b411b1d55..000000000000 --- a/arch/arm/crypto/sha1_neon_glue.c +++ /dev/null @@ -1,197 +0,0 @@ -/* - * Glue code for the SHA1 Secure Hash Algorithm assembler implementation using - * ARM NEON instructions. - * - * Copyright © 2014 Jussi Kivilinna - * - * This file is based on sha1_generic.c and sha1_ssse3_glue.c: - * Copyright (c) Alan Smithee. - * Copyright (c) Andrew McDonald - * Copyright (c) Jean-Francois Dive - * Copyright (c) Mathias Krause - * Copyright (c) Chandramouli Narayanan - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the Free - * Software Foundation; either version 2 of the License, or (at your option) - * any later version. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - - -asmlinkage void sha1_transform_neon(void *state_h, const char *data, - unsigned int rounds); - - -static int sha1_neon_init(struct shash_desc *desc) -{ - struct sha1_state *sctx = shash_desc_ctx(desc); - - *sctx = (struct sha1_state){ - .state = { SHA1_H0, SHA1_H1, SHA1_H2, SHA1_H3, SHA1_H4 }, - }; - - return 0; -} - -static int __sha1_neon_update(struct shash_desc *desc, const u8 *data, - unsigned int len, unsigned int partial) -{ - struct sha1_state *sctx = shash_desc_ctx(desc); - unsigned int done = 0; - - sctx->count += len; - - if (partial) { - done = SHA1_BLOCK_SIZE - partial; - memcpy(sctx->buffer + partial, data, done); - sha1_transform_neon(sctx->state, sctx->buffer, 1); - } - - if (len - done >= SHA1_BLOCK_SIZE) { - const unsigned int rounds = (len - done) / SHA1_BLOCK_SIZE; - - sha1_transform_neon(sctx->state, data + done, rounds); - done += rounds * SHA1_BLOCK_SIZE; - } - - memcpy(sctx->buffer, data + done, len - done); - - return 0; -} - -static int sha1_neon_update(struct shash_desc *desc, const u8 *data, - unsigned int len) -{ - struct sha1_state *sctx = shash_desc_ctx(desc); - unsigned int partial = sctx->count % SHA1_BLOCK_SIZE; - int res; - - /* Handle the fast case right here */ - if (partial + len < SHA1_BLOCK_SIZE) { - sctx->count += len; - memcpy(sctx->buffer + partial, data, len); - - return 0; - } - - if (!may_use_simd()) { - res = sha1_update_arm(desc, data, len); - } else { - kernel_neon_begin(); - res = __sha1_neon_update(desc, data, len, partial); - kernel_neon_end(); - } - - return res; -} - - -/* Add padding and return the message digest. */ -static int sha1_neon_final(struct shash_desc *desc, u8 *out) -{ - struct sha1_state *sctx = shash_desc_ctx(desc); - unsigned int i, index, padlen; - __be32 *dst = (__be32 *)out; - __be64 bits; - static const u8 padding[SHA1_BLOCK_SIZE] = { 0x80, }; - - bits = cpu_to_be64(sctx->count << 3); - - /* Pad out to 56 mod 64 and append length */ - index = sctx->count % SHA1_BLOCK_SIZE; - padlen = (index < 56) ? (56 - index) : ((SHA1_BLOCK_SIZE+56) - index); - if (!may_use_simd()) { - sha1_update_arm(desc, padding, padlen); - sha1_update_arm(desc, (const u8 *)&bits, sizeof(bits)); - } else { - kernel_neon_begin(); - /* We need to fill a whole block for __sha1_neon_update() */ - if (padlen <= 56) { - sctx->count += padlen; - memcpy(sctx->buffer + index, padding, padlen); - } else { - __sha1_neon_update(desc, padding, padlen, index); - } - __sha1_neon_update(desc, (const u8 *)&bits, sizeof(bits), 56); - kernel_neon_end(); - } - - /* Store state in digest */ - for (i = 0; i < 5; i++) - dst[i] = cpu_to_be32(sctx->state[i]); - - /* Wipe context */ - memset(sctx, 0, sizeof(*sctx)); - - return 0; -} - -static int sha1_neon_export(struct shash_desc *desc, void *out) -{ - struct sha1_state *sctx = shash_desc_ctx(desc); - - memcpy(out, sctx, sizeof(*sctx)); - - return 0; -} - -static int sha1_neon_import(struct shash_desc *desc, const void *in) -{ - struct sha1_state *sctx = shash_desc_ctx(desc); - - memcpy(sctx, in, sizeof(*sctx)); - - return 0; -} - -static struct shash_alg alg = { - .digestsize = SHA1_DIGEST_SIZE, - .init = sha1_neon_init, - .update = sha1_neon_update, - .final = sha1_neon_final, - .export = sha1_neon_export, - .import = sha1_neon_import, - .descsize = sizeof(struct sha1_state), - .statesize = sizeof(struct sha1_state), - .base = { - .cra_name = "sha1", - .cra_driver_name = "sha1-neon", - .cra_priority = 250, - .cra_flags = CRYPTO_ALG_TYPE_SHASH, - .cra_blocksize = SHA1_BLOCK_SIZE, - .cra_module = THIS_MODULE, - } -}; - -static int __init sha1_neon_mod_init(void) -{ - if (!cpu_has_neon()) - return -ENODEV; - - return crypto_register_shash(&alg); -} - -static void __exit sha1_neon_mod_fini(void) -{ - crypto_unregister_shash(&alg); -} - -module_init(sha1_neon_mod_init); -module_exit(sha1_neon_mod_fini); - -MODULE_LICENSE("GPL"); -MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm, NEON accelerated"); -MODULE_ALIAS("sha1"); diff --git a/arch/arm/crypto/sha256-armv4.pl b/arch/arm/crypto/sha256-armv4.pl deleted file mode 100644 index fac0533ea633..000000000000 --- a/arch/arm/crypto/sha256-armv4.pl +++ /dev/null @@ -1,716 +0,0 @@ -#!/usr/bin/env perl - -# ==================================================================== -# Written by Andy Polyakov for the OpenSSL -# project. The module is, however, dual licensed under OpenSSL and -# CRYPTOGAMS licenses depending on where you obtain it. For further -# details see http://www.openssl.org/~appro/cryptogams/. -# -# Permission to use under GPL terms is granted. -# ==================================================================== - -# SHA256 block procedure for ARMv4. May 2007. - -# Performance is ~2x better than gcc 3.4 generated code and in "abso- -# lute" terms is ~2250 cycles per 64-byte block or ~35 cycles per -# byte [on single-issue Xscale PXA250 core]. - -# July 2010. -# -# Rescheduling for dual-issue pipeline resulted in 22% improvement on -# Cortex A8 core and ~20 cycles per processed byte. - -# February 2011. -# -# Profiler-assisted and platform-specific optimization resulted in 16% -# improvement on Cortex A8 core and ~15.4 cycles per processed byte. - -# September 2013. -# -# Add NEON implementation. On Cortex A8 it was measured to process one -# byte in 12.5 cycles or 23% faster than integer-only code. Snapdragon -# S4 does it in 12.5 cycles too, but it's 50% faster than integer-only -# code (meaning that latter performs sub-optimally, nothing was done -# about it). - -# May 2014. -# -# Add ARMv8 code path performing at 2.0 cpb on Apple A7. - -while (($output=shift) && ($output!~/^\w[\w\-]*\.\w+$/)) {} -open STDOUT,">$output"; - -$ctx="r0"; $t0="r0"; -$inp="r1"; $t4="r1"; -$len="r2"; $t1="r2"; -$T1="r3"; $t3="r3"; -$A="r4"; -$B="r5"; -$C="r6"; -$D="r7"; -$E="r8"; -$F="r9"; -$G="r10"; -$H="r11"; -@V=($A,$B,$C,$D,$E,$F,$G,$H); -$t2="r12"; -$Ktbl="r14"; - -@Sigma0=( 2,13,22); -@Sigma1=( 6,11,25); -@sigma0=( 7,18, 3); -@sigma1=(17,19,10); - -sub BODY_00_15 { -my ($i,$a,$b,$c,$d,$e,$f,$g,$h) = @_; - -$code.=<<___ if ($i<16); -#if __ARM_ARCH__>=7 - @ ldr $t1,[$inp],#4 @ $i -# if $i==15 - str $inp,[sp,#17*4] @ make room for $t4 -# endif - eor $t0,$e,$e,ror#`$Sigma1[1]-$Sigma1[0]` - add $a,$a,$t2 @ h+=Maj(a,b,c) from the past - eor $t0,$t0,$e,ror#`$Sigma1[2]-$Sigma1[0]` @ Sigma1(e) -# ifndef __ARMEB__ - rev $t1,$t1 -# endif -#else - @ ldrb $t1,[$inp,#3] @ $i - add $a,$a,$t2 @ h+=Maj(a,b,c) from the past - ldrb $t2,[$inp,#2] - ldrb $t0,[$inp,#1] - orr $t1,$t1,$t2,lsl#8 - ldrb $t2,[$inp],#4 - orr $t1,$t1,$t0,lsl#16 -# if $i==15 - str $inp,[sp,#17*4] @ make room for $t4 -# endif - eor $t0,$e,$e,ror#`$Sigma1[1]-$Sigma1[0]` - orr $t1,$t1,$t2,lsl#24 - eor $t0,$t0,$e,ror#`$Sigma1[2]-$Sigma1[0]` @ Sigma1(e) -#endif -___ -$code.=<<___; - ldr $t2,[$Ktbl],#4 @ *K256++ - add $h,$h,$t1 @ h+=X[i] - str $t1,[sp,#`$i%16`*4] - eor $t1,$f,$g - add $h,$h,$t0,ror#$Sigma1[0] @ h+=Sigma1(e) - and $t1,$t1,$e - add $h,$h,$t2 @ h+=K256[i] - eor $t1,$t1,$g @ Ch(e,f,g) - eor $t0,$a,$a,ror#`$Sigma0[1]-$Sigma0[0]` - add $h,$h,$t1 @ h+=Ch(e,f,g) -#if $i==31 - and $t2,$t2,#0xff - cmp $t2,#0xf2 @ done? -#endif -#if $i<15 -# if __ARM_ARCH__>=7 - ldr $t1,[$inp],#4 @ prefetch -# else - ldrb $t1,[$inp,#3] -# endif - eor $t2,$a,$b @ a^b, b^c in next round -#else - ldr $t1,[sp,#`($i+2)%16`*4] @ from future BODY_16_xx - eor $t2,$a,$b @ a^b, b^c in next round - ldr $t4,[sp,#`($i+15)%16`*4] @ from future BODY_16_xx -#endif - eor $t0,$t0,$a,ror#`$Sigma0[2]-$Sigma0[0]` @ Sigma0(a) - and $t3,$t3,$t2 @ (b^c)&=(a^b) - add $d,$d,$h @ d+=h - eor $t3,$t3,$b @ Maj(a,b,c) - add $h,$h,$t0,ror#$Sigma0[0] @ h+=Sigma0(a) - @ add $h,$h,$t3 @ h+=Maj(a,b,c) -___ - ($t2,$t3)=($t3,$t2); -} - -sub BODY_16_XX { -my ($i,$a,$b,$c,$d,$e,$f,$g,$h) = @_; - -$code.=<<___; - @ ldr $t1,[sp,#`($i+1)%16`*4] @ $i - @ ldr $t4,[sp,#`($i+14)%16`*4] - mov $t0,$t1,ror#$sigma0[0] - add $a,$a,$t2 @ h+=Maj(a,b,c) from the past - mov $t2,$t4,ror#$sigma1[0] - eor $t0,$t0,$t1,ror#$sigma0[1] - eor $t2,$t2,$t4,ror#$sigma1[1] - eor $t0,$t0,$t1,lsr#$sigma0[2] @ sigma0(X[i+1]) - ldr $t1,[sp,#`($i+0)%16`*4] - eor $t2,$t2,$t4,lsr#$sigma1[2] @ sigma1(X[i+14]) - ldr $t4,[sp,#`($i+9)%16`*4] - - add $t2,$t2,$t0 - eor $t0,$e,$e,ror#`$Sigma1[1]-$Sigma1[0]` @ from BODY_00_15 - add $t1,$t1,$t2 - eor $t0,$t0,$e,ror#`$Sigma1[2]-$Sigma1[0]` @ Sigma1(e) - add $t1,$t1,$t4 @ X[i] -___ - &BODY_00_15(@_); -} - -$code=<<___; -#ifndef __KERNEL__ -# include "arm_arch.h" -#else -# define __ARM_ARCH__ __LINUX_ARM_ARCH__ -# define __ARM_MAX_ARCH__ 7 -#endif - -.text -#if __ARM_ARCH__<7 -.code 32 -#else -.syntax unified -# ifdef __thumb2__ -# define adrl adr -.thumb -# else -.code 32 -# endif -#endif - -.type K256,%object -.align 5 -K256: -.word 0x428a2f98,0x71374491,0xb5c0fbcf,0xe9b5dba5 -.word 0x3956c25b,0x59f111f1,0x923f82a4,0xab1c5ed5 -.word 0xd807aa98,0x12835b01,0x243185be,0x550c7dc3 -.word 0x72be5d74,0x80deb1fe,0x9bdc06a7,0xc19bf174 -.word 0xe49b69c1,0xefbe4786,0x0fc19dc6,0x240ca1cc -.word 0x2de92c6f,0x4a7484aa,0x5cb0a9dc,0x76f988da -.word 0x983e5152,0xa831c66d,0xb00327c8,0xbf597fc7 -.word 0xc6e00bf3,0xd5a79147,0x06ca6351,0x14292967 -.word 0x27b70a85,0x2e1b2138,0x4d2c6dfc,0x53380d13 -.word 0x650a7354,0x766a0abb,0x81c2c92e,0x92722c85 -.word 0xa2bfe8a1,0xa81a664b,0xc24b8b70,0xc76c51a3 -.word 0xd192e819,0xd6990624,0xf40e3585,0x106aa070 -.word 0x19a4c116,0x1e376c08,0x2748774c,0x34b0bcb5 -.word 0x391c0cb3,0x4ed8aa4a,0x5b9cca4f,0x682e6ff3 -.word 0x748f82ee,0x78a5636f,0x84c87814,0x8cc70208 -.word 0x90befffa,0xa4506ceb,0xbef9a3f7,0xc67178f2 -.size K256,.-K256 -.word 0 @ terminator -#if __ARM_MAX_ARCH__>=7 && !defined(__KERNEL__) -.LOPENSSL_armcap: -.word OPENSSL_armcap_P-sha256_block_data_order -#endif -.align 5 - -.global sha256_block_data_order -.type sha256_block_data_order,%function -sha256_block_data_order: -#if __ARM_ARCH__<7 - sub r3,pc,#8 @ sha256_block_data_order -#else - adr r3,sha256_block_data_order -#endif -#if __ARM_MAX_ARCH__>=7 && !defined(__KERNEL__) - ldr r12,.LOPENSSL_armcap - ldr r12,[r3,r12] @ OPENSSL_armcap_P - tst r12,#ARMV8_SHA256 - bne .LARMv8 - tst r12,#ARMV7_NEON - bne .LNEON -#endif - add $len,$inp,$len,lsl#6 @ len to point at the end of inp - stmdb sp!,{$ctx,$inp,$len,r4-r11,lr} - ldmia $ctx,{$A,$B,$C,$D,$E,$F,$G,$H} - sub $Ktbl,r3,#256+32 @ K256 - sub sp,sp,#16*4 @ alloca(X[16]) -.Loop: -# if __ARM_ARCH__>=7 - ldr $t1,[$inp],#4 -# else - ldrb $t1,[$inp,#3] -# endif - eor $t3,$B,$C @ magic - eor $t2,$t2,$t2 -___ -for($i=0;$i<16;$i++) { &BODY_00_15($i,@V); unshift(@V,pop(@V)); } -$code.=".Lrounds_16_xx:\n"; -for (;$i<32;$i++) { &BODY_16_XX($i,@V); unshift(@V,pop(@V)); } -$code.=<<___; -#if __ARM_ARCH__>=7 - ite eq @ Thumb2 thing, sanity check in ARM -#endif - ldreq $t3,[sp,#16*4] @ pull ctx - bne .Lrounds_16_xx - - add $A,$A,$t2 @ h+=Maj(a,b,c) from the past - ldr $t0,[$t3,#0] - ldr $t1,[$t3,#4] - ldr $t2,[$t3,#8] - add $A,$A,$t0 - ldr $t0,[$t3,#12] - add $B,$B,$t1 - ldr $t1,[$t3,#16] - add $C,$C,$t2 - ldr $t2,[$t3,#20] - add $D,$D,$t0 - ldr $t0,[$t3,#24] - add $E,$E,$t1 - ldr $t1,[$t3,#28] - add $F,$F,$t2 - ldr $inp,[sp,#17*4] @ pull inp - ldr $t2,[sp,#18*4] @ pull inp+len - add $G,$G,$t0 - add $H,$H,$t1 - stmia $t3,{$A,$B,$C,$D,$E,$F,$G,$H} - cmp $inp,$t2 - sub $Ktbl,$Ktbl,#256 @ rewind Ktbl - bne .Loop - - add sp,sp,#`16+3`*4 @ destroy frame -#if __ARM_ARCH__>=5 - ldmia sp!,{r4-r11,pc} -#else - ldmia sp!,{r4-r11,lr} - tst lr,#1 - moveq pc,lr @ be binary compatible with V4, yet - bx lr @ interoperable with Thumb ISA:-) -#endif -.size sha256_block_data_order,.-sha256_block_data_order -___ -###################################################################### -# NEON stuff -# -{{{ -my @X=map("q$_",(0..3)); -my ($T0,$T1,$T2,$T3,$T4,$T5)=("q8","q9","q10","q11","d24","d25"); -my $Xfer=$t4; -my $j=0; - -sub Dlo() { shift=~m|q([1]?[0-9])|?"d".($1*2):""; } -sub Dhi() { shift=~m|q([1]?[0-9])|?"d".($1*2+1):""; } - -sub AUTOLOAD() # thunk [simplified] x86-style perlasm -{ my $opcode = $AUTOLOAD; $opcode =~ s/.*:://; $opcode =~ s/_/\./; - my $arg = pop; - $arg = "#$arg" if ($arg*1 eq $arg); - $code .= "\t$opcode\t".join(',',@_,$arg)."\n"; -} - -sub Xupdate() -{ use integer; - my $body = shift; - my @insns = (&$body,&$body,&$body,&$body); - my ($a,$b,$c,$d,$e,$f,$g,$h); - - &vext_8 ($T0,@X[0],@X[1],4); # X[1..4] - eval(shift(@insns)); - eval(shift(@insns)); - eval(shift(@insns)); - &vext_8 ($T1,@X[2],@X[3],4); # X[9..12] - eval(shift(@insns)); - eval(shift(@insns)); - eval(shift(@insns)); - &vshr_u32 ($T2,$T0,$sigma0[0]); - eval(shift(@insns)); - eval(shift(@insns)); - &vadd_i32 (@X[0],@X[0],$T1); # X[0..3] += X[9..12] - eval(shift(@insns)); - eval(shift(@insns)); - &vshr_u32 ($T1,$T0,$sigma0[2]); - eval(shift(@insns)); - eval(shift(@insns)); - &vsli_32 ($T2,$T0,32-$sigma0[0]); - eval(shift(@insns)); - eval(shift(@insns)); - &vshr_u32 ($T3,$T0,$sigma0[1]); - eval(shift(@insns)); - eval(shift(@insns)); - &veor ($T1,$T1,$T2); - eval(shift(@insns)); - eval(shift(@insns)); - &vsli_32 ($T3,$T0,32-$sigma0[1]); - eval(shift(@insns)); - eval(shift(@insns)); - &vshr_u32 ($T4,&Dhi(@X[3]),$sigma1[0]); - eval(shift(@insns)); - eval(shift(@insns)); - &veor ($T1,$T1,$T3); # sigma0(X[1..4]) - eval(shift(@insns)); - eval(shift(@insns)); - &vsli_32 ($T4,&Dhi(@X[3]),32-$sigma1[0]); - eval(shift(@insns)); - eval(shift(@insns)); - &vshr_u32 ($T5,&Dhi(@X[3]),$sigma1[2]); - eval(shift(@insns)); - eval(shift(@insns)); - &vadd_i32 (@X[0],@X[0],$T1); # X[0..3] += sigma0(X[1..4]) - eval(shift(@insns)); - eval(shift(@insns)); - &veor ($T5,$T5,$T4); - eval(shift(@insns)); - eval(shift(@insns)); - &vshr_u32 ($T4,&Dhi(@X[3]),$sigma1[1]); - eval(shift(@insns)); - eval(shift(@insns)); - &vsli_32 ($T4,&Dhi(@X[3]),32-$sigma1[1]); - eval(shift(@insns)); - eval(shift(@insns)); - &veor ($T5,$T5,$T4); # sigma1(X[14..15]) - eval(shift(@insns)); - eval(shift(@insns)); - &vadd_i32 (&Dlo(@X[0]),&Dlo(@X[0]),$T5);# X[0..1] += sigma1(X[14..15]) - eval(shift(@insns)); - eval(shift(@insns)); - &vshr_u32 ($T4,&Dlo(@X[0]),$sigma1[0]); - eval(shift(@insns)); - eval(shift(@insns)); - &vsli_32 ($T4,&Dlo(@X[0]),32-$sigma1[0]); - eval(shift(@insns)); - eval(shift(@insns)); - &vshr_u32 ($T5,&Dlo(@X[0]),$sigma1[2]); - eval(shift(@insns)); - eval(shift(@insns)); - &veor ($T5,$T5,$T4); - eval(shift(@insns)); - eval(shift(@insns)); - &vshr_u32 ($T4,&Dlo(@X[0]),$sigma1[1]); - eval(shift(@insns)); - eval(shift(@insns)); - &vld1_32 ("{$T0}","[$Ktbl,:128]!"); - eval(shift(@insns)); - eval(shift(@insns)); - &vsli_32 ($T4,&Dlo(@X[0]),32-$sigma1[1]); - eval(shift(@insns)); - eval(shift(@insns)); - &veor ($T5,$T5,$T4); # sigma1(X[16..17]) - eval(shift(@insns)); - eval(shift(@insns)); - &vadd_i32 (&Dhi(@X[0]),&Dhi(@X[0]),$T5);# X[2..3] += sigma1(X[16..17]) - eval(shift(@insns)); - eval(shift(@insns)); - &vadd_i32 ($T0,$T0,@X[0]); - while($#insns>=2) { eval(shift(@insns)); } - &vst1_32 ("{$T0}","[$Xfer,:128]!"); - eval(shift(@insns)); - eval(shift(@insns)); - - push(@X,shift(@X)); # "rotate" X[] -} - -sub Xpreload() -{ use integer; - my $body = shift; - my @insns = (&$body,&$body,&$body,&$body); - my ($a,$b,$c,$d,$e,$f,$g,$h); - - eval(shift(@insns)); - eval(shift(@insns)); - eval(shift(@insns)); - eval(shift(@insns)); - &vld1_32 ("{$T0}","[$Ktbl,:128]!"); - eval(shift(@insns)); - eval(shift(@insns)); - eval(shift(@insns)); - eval(shift(@insns)); - &vrev32_8 (@X[0],@X[0]); - eval(shift(@insns)); - eval(shift(@insns)); - eval(shift(@insns)); - eval(shift(@insns)); - &vadd_i32 ($T0,$T0,@X[0]); - foreach (@insns) { eval; } # remaining instructions - &vst1_32 ("{$T0}","[$Xfer,:128]!"); - - push(@X,shift(@X)); # "rotate" X[] -} - -sub body_00_15 () { - ( - '($a,$b,$c,$d,$e,$f,$g,$h)=@V;'. - '&add ($h,$h,$t1)', # h+=X[i]+K[i] - '&eor ($t1,$f,$g)', - '&eor ($t0,$e,$e,"ror#".($Sigma1[1]-$Sigma1[0]))', - '&add ($a,$a,$t2)', # h+=Maj(a,b,c) from the past - '&and ($t1,$t1,$e)', - '&eor ($t2,$t0,$e,"ror#".($Sigma1[2]-$Sigma1[0]))', # Sigma1(e) - '&eor ($t0,$a,$a,"ror#".($Sigma0[1]-$Sigma0[0]))', - '&eor ($t1,$t1,$g)', # Ch(e,f,g) - '&add ($h,$h,$t2,"ror#$Sigma1[0]")', # h+=Sigma1(e) - '&eor ($t2,$a,$b)', # a^b, b^c in next round - '&eor ($t0,$t0,$a,"ror#".($Sigma0[2]-$Sigma0[0]))', # Sigma0(a) - '&add ($h,$h,$t1)', # h+=Ch(e,f,g) - '&ldr ($t1,sprintf "[sp,#%d]",4*(($j+1)&15)) if (($j&15)!=15);'. - '&ldr ($t1,"[$Ktbl]") if ($j==15);'. - '&ldr ($t1,"[sp,#64]") if ($j==31)', - '&and ($t3,$t3,$t2)', # (b^c)&=(a^b) - '&add ($d,$d,$h)', # d+=h - '&add ($h,$h,$t0,"ror#$Sigma0[0]");'. # h+=Sigma0(a) - '&eor ($t3,$t3,$b)', # Maj(a,b,c) - '$j++; unshift(@V,pop(@V)); ($t2,$t3)=($t3,$t2);' - ) -} - -$code.=<<___; -#if __ARM_MAX_ARCH__>=7 -.arch armv7-a -.fpu neon - -.global sha256_block_data_order_neon -.type sha256_block_data_order_neon,%function -.align 4 -sha256_block_data_order_neon: -.LNEON: - stmdb sp!,{r4-r12,lr} - - sub $H,sp,#16*4+16 - adrl $Ktbl,K256 - bic $H,$H,#15 @ align for 128-bit stores - mov $t2,sp - mov sp,$H @ alloca - add $len,$inp,$len,lsl#6 @ len to point at the end of inp - - vld1.8 {@X[0]},[$inp]! - vld1.8 {@X[1]},[$inp]! - vld1.8 {@X[2]},[$inp]! - vld1.8 {@X[3]},[$inp]! - vld1.32 {$T0},[$Ktbl,:128]! - vld1.32 {$T1},[$Ktbl,:128]! - vld1.32 {$T2},[$Ktbl,:128]! - vld1.32 {$T3},[$Ktbl,:128]! - vrev32.8 @X[0],@X[0] @ yes, even on - str $ctx,[sp,#64] - vrev32.8 @X[1],@X[1] @ big-endian - str $inp,[sp,#68] - mov $Xfer,sp - vrev32.8 @X[2],@X[2] - str $len,[sp,#72] - vrev32.8 @X[3],@X[3] - str $t2,[sp,#76] @ save original sp - vadd.i32 $T0,$T0,@X[0] - vadd.i32 $T1,$T1,@X[1] - vst1.32 {$T0},[$Xfer,:128]! - vadd.i32 $T2,$T2,@X[2] - vst1.32 {$T1},[$Xfer,:128]! - vadd.i32 $T3,$T3,@X[3] - vst1.32 {$T2},[$Xfer,:128]! - vst1.32 {$T3},[$Xfer,:128]! - - ldmia $ctx,{$A-$H} - sub $Xfer,$Xfer,#64 - ldr $t1,[sp,#0] - eor $t2,$t2,$t2 - eor $t3,$B,$C - b .L_00_48 - -.align 4 -.L_00_48: -___ - &Xupdate(\&body_00_15); - &Xupdate(\&body_00_15); - &Xupdate(\&body_00_15); - &Xupdate(\&body_00_15); -$code.=<<___; - teq $t1,#0 @ check for K256 terminator - ldr $t1,[sp,#0] - sub $Xfer,$Xfer,#64 - bne .L_00_48 - - ldr $inp,[sp,#68] - ldr $t0,[sp,#72] - sub $Ktbl,$Ktbl,#256 @ rewind $Ktbl - teq $inp,$t0 - it eq - subeq $inp,$inp,#64 @ avoid SEGV - vld1.8 {@X[0]},[$inp]! @ load next input block - vld1.8 {@X[1]},[$inp]! - vld1.8 {@X[2]},[$inp]! - vld1.8 {@X[3]},[$inp]! - it ne - strne $inp,[sp,#68] - mov $Xfer,sp -___ - &Xpreload(\&body_00_15); - &Xpreload(\&body_00_15); - &Xpreload(\&body_00_15); - &Xpreload(\&body_00_15); -$code.=<<___; - ldr $t0,[$t1,#0] - add $A,$A,$t2 @ h+=Maj(a,b,c) from the past - ldr $t2,[$t1,#4] - ldr $t3,[$t1,#8] - ldr $t4,[$t1,#12] - add $A,$A,$t0 @ accumulate - ldr $t0,[$t1,#16] - add $B,$B,$t2 - ldr $t2,[$t1,#20] - add $C,$C,$t3 - ldr $t3,[$t1,#24] - add $D,$D,$t4 - ldr $t4,[$t1,#28] - add $E,$E,$t0 - str $A,[$t1],#4 - add $F,$F,$t2 - str $B,[$t1],#4 - add $G,$G,$t3 - str $C,[$t1],#4 - add $H,$H,$t4 - str $D,[$t1],#4 - stmia $t1,{$E-$H} - - ittte ne - movne $Xfer,sp - ldrne $t1,[sp,#0] - eorne $t2,$t2,$t2 - ldreq sp,[sp,#76] @ restore original sp - itt ne - eorne $t3,$B,$C - bne .L_00_48 - - ldmia sp!,{r4-r12,pc} -.size sha256_block_data_order_neon,.-sha256_block_data_order_neon -#endif -___ -}}} -###################################################################### -# ARMv8 stuff -# -{{{ -my ($ABCD,$EFGH,$abcd)=map("q$_",(0..2)); -my @MSG=map("q$_",(8..11)); -my ($W0,$W1,$ABCD_SAVE,$EFGH_SAVE)=map("q$_",(12..15)); -my $Ktbl="r3"; - -$code.=<<___; -#if __ARM_MAX_ARCH__>=7 && !defined(__KERNEL__) - -# ifdef __thumb2__ -# define INST(a,b,c,d) .byte c,d|0xc,a,b -# else -# define INST(a,b,c,d) .byte a,b,c,d -# endif - -.type sha256_block_data_order_armv8,%function -.align 5 -sha256_block_data_order_armv8: -.LARMv8: - vld1.32 {$ABCD,$EFGH},[$ctx] -# ifdef __thumb2__ - adr $Ktbl,.LARMv8 - sub $Ktbl,$Ktbl,#.LARMv8-K256 -# else - adrl $Ktbl,K256 -# endif - add $len,$inp,$len,lsl#6 @ len to point at the end of inp - -.Loop_v8: - vld1.8 {@MSG[0]-@MSG[1]},[$inp]! - vld1.8 {@MSG[2]-@MSG[3]},[$inp]! - vld1.32 {$W0},[$Ktbl]! - vrev32.8 @MSG[0],@MSG[0] - vrev32.8 @MSG[1],@MSG[1] - vrev32.8 @MSG[2],@MSG[2] - vrev32.8 @MSG[3],@MSG[3] - vmov $ABCD_SAVE,$ABCD @ offload - vmov $EFGH_SAVE,$EFGH - teq $inp,$len -___ -for($i=0;$i<12;$i++) { -$code.=<<___; - vld1.32 {$W1},[$Ktbl]! - vadd.i32 $W0,$W0,@MSG[0] - sha256su0 @MSG[0],@MSG[1] - vmov $abcd,$ABCD - sha256h $ABCD,$EFGH,$W0 - sha256h2 $EFGH,$abcd,$W0 - sha256su1 @MSG[0],@MSG[2],@MSG[3] -___ - ($W0,$W1)=($W1,$W0); push(@MSG,shift(@MSG)); -} -$code.=<<___; - vld1.32 {$W1},[$Ktbl]! - vadd.i32 $W0,$W0,@MSG[0] - vmov $abcd,$ABCD - sha256h $ABCD,$EFGH,$W0 - sha256h2 $EFGH,$abcd,$W0 - - vld1.32 {$W0},[$Ktbl]! - vadd.i32 $W1,$W1,@MSG[1] - vmov $abcd,$ABCD - sha256h $ABCD,$EFGH,$W1 - sha256h2 $EFGH,$abcd,$W1 - - vld1.32 {$W1},[$Ktbl] - vadd.i32 $W0,$W0,@MSG[2] - sub $Ktbl,$Ktbl,#256-16 @ rewind - vmov $abcd,$ABCD - sha256h $ABCD,$EFGH,$W0 - sha256h2 $EFGH,$abcd,$W0 - - vadd.i32 $W1,$W1,@MSG[3] - vmov $abcd,$ABCD - sha256h $ABCD,$EFGH,$W1 - sha256h2 $EFGH,$abcd,$W1 - - vadd.i32 $ABCD,$ABCD,$ABCD_SAVE - vadd.i32 $EFGH,$EFGH,$EFGH_SAVE - it ne - bne .Loop_v8 - - vst1.32 {$ABCD,$EFGH},[$ctx] - - ret @ bx lr -.size sha256_block_data_order_armv8,.-sha256_block_data_order_armv8 -#endif -___ -}}} -$code.=<<___; -.asciz "SHA256 block transform for ARMv4/NEON/ARMv8, CRYPTOGAMS by " -.align 2 -#if __ARM_MAX_ARCH__>=7 && !defined(__KERNEL__) -.comm OPENSSL_armcap_P,4,4 -#endif -___ - -open SELF,$0; -while() { - next if (/^#!/); - last if (!s/^#/@/ and !/^$/); - print; -} -close SELF; - -{ my %opcode = ( - "sha256h" => 0xf3000c40, "sha256h2" => 0xf3100c40, - "sha256su0" => 0xf3ba03c0, "sha256su1" => 0xf3200c40 ); - - sub unsha256 { - my ($mnemonic,$arg)=@_; - - if ($arg =~ m/q([0-9]+)(?:,\s*q([0-9]+))?,\s*q([0-9]+)/o) { - my $word = $opcode{$mnemonic}|(($1&7)<<13)|(($1&8)<<19) - |(($2&7)<<17)|(($2&8)<<4) - |(($3&7)<<1) |(($3&8)<<2); - # since ARMv7 instructions are always encoded little-endian. - # correct solution is to use .inst directive, but older - # assemblers don't implement it:-( - sprintf "INST(0x%02x,0x%02x,0x%02x,0x%02x)\t@ %s %s", - $word&0xff,($word>>8)&0xff, - ($word>>16)&0xff,($word>>24)&0xff, - $mnemonic,$arg; - } - } -} - -foreach (split($/,$code)) { - - s/\`([^\`]*)\`/eval $1/geo; - - s/\b(sha256\w+)\s+(q.*)/unsha256($1,$2)/geo; - - s/\bret\b/bx lr/go or - s/\bbx\s+lr\b/.word\t0xe12fff1e/go; # make it possible to compile with -march=armv4 - - print $_,"\n"; -} - -close STDOUT; # enforce flush diff --git a/arch/arm/crypto/sha256-core.S_shipped b/arch/arm/crypto/sha256-core.S_shipped deleted file mode 100644 index 555a1a8eec90..000000000000 --- a/arch/arm/crypto/sha256-core.S_shipped +++ /dev/null @@ -1,2808 +0,0 @@ - -@ ==================================================================== -@ Written by Andy Polyakov for the OpenSSL -@ project. The module is, however, dual licensed under OpenSSL and -@ CRYPTOGAMS licenses depending on where you obtain it. For further -@ details see http://www.openssl.org/~appro/cryptogams/. -@ -@ Permission to use under GPL terms is granted. -@ ==================================================================== - -@ SHA256 block procedure for ARMv4. May 2007. - -@ Performance is ~2x better than gcc 3.4 generated code and in "abso- -@ lute" terms is ~2250 cycles per 64-byte block or ~35 cycles per -@ byte [on single-issue Xscale PXA250 core]. - -@ July 2010. -@ -@ Rescheduling for dual-issue pipeline resulted in 22% improvement on -@ Cortex A8 core and ~20 cycles per processed byte. - -@ February 2011. -@ -@ Profiler-assisted and platform-specific optimization resulted in 16% -@ improvement on Cortex A8 core and ~15.4 cycles per processed byte. - -@ September 2013. -@ -@ Add NEON implementation. On Cortex A8 it was measured to process one -@ byte in 12.5 cycles or 23% faster than integer-only code. Snapdragon -@ S4 does it in 12.5 cycles too, but it's 50% faster than integer-only -@ code (meaning that latter performs sub-optimally, nothing was done -@ about it). - -@ May 2014. -@ -@ Add ARMv8 code path performing at 2.0 cpb on Apple A7. - -#ifndef __KERNEL__ -# include "arm_arch.h" -#else -# define __ARM_ARCH__ __LINUX_ARM_ARCH__ -# define __ARM_MAX_ARCH__ 7 -#endif - -.text -#if __ARM_ARCH__<7 -.code 32 -#else -.syntax unified -# ifdef __thumb2__ -# define adrl adr -.thumb -# else -.code 32 -# endif -#endif - -.type K256,%object -.align 5 -K256: -.word 0x428a2f98,0x71374491,0xb5c0fbcf,0xe9b5dba5 -.word 0x3956c25b,0x59f111f1,0x923f82a4,0xab1c5ed5 -.word 0xd807aa98,0x12835b01,0x243185be,0x550c7dc3 -.word 0x72be5d74,0x80deb1fe,0x9bdc06a7,0xc19bf174 -.word 0xe49b69c1,0xefbe4786,0x0fc19dc6,0x240ca1cc -.word 0x2de92c6f,0x4a7484aa,0x5cb0a9dc,0x76f988da -.word 0x983e5152,0xa831c66d,0xb00327c8,0xbf597fc7 -.word 0xc6e00bf3,0xd5a79147,0x06ca6351,0x14292967 -.word 0x27b70a85,0x2e1b2138,0x4d2c6dfc,0x53380d13 -.word 0x650a7354,0x766a0abb,0x81c2c92e,0x92722c85 -.word 0xa2bfe8a1,0xa81a664b,0xc24b8b70,0xc76c51a3 -.word 0xd192e819,0xd6990624,0xf40e3585,0x106aa070 -.word 0x19a4c116,0x1e376c08,0x2748774c,0x34b0bcb5 -.word 0x391c0cb3,0x4ed8aa4a,0x5b9cca4f,0x682e6ff3 -.word 0x748f82ee,0x78a5636f,0x84c87814,0x8cc70208 -.word 0x90befffa,0xa4506ceb,0xbef9a3f7,0xc67178f2 -.size K256,.-K256 -.word 0 @ terminator -#if __ARM_MAX_ARCH__>=7 && !defined(__KERNEL__) -.LOPENSSL_armcap: -.word OPENSSL_armcap_P-sha256_block_data_order -#endif -.align 5 - -.global sha256_block_data_order -.type sha256_block_data_order,%function -sha256_block_data_order: -#if __ARM_ARCH__<7 - sub r3,pc,#8 @ sha256_block_data_order -#else - adr r3,sha256_block_data_order -#endif -#if __ARM_MAX_ARCH__>=7 && !defined(__KERNEL__) - ldr r12,.LOPENSSL_armcap - ldr r12,[r3,r12] @ OPENSSL_armcap_P - tst r12,#ARMV8_SHA256 - bne .LARMv8 - tst r12,#ARMV7_NEON - bne .LNEON -#endif - add r2,r1,r2,lsl#6 @ len to point at the end of inp - stmdb sp!,{r0,r1,r2,r4-r11,lr} - ldmia r0,{r4,r5,r6,r7,r8,r9,r10,r11} - sub r14,r3,#256+32 @ K256 - sub sp,sp,#16*4 @ alloca(X[16]) -.Loop: -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 -# else - ldrb r2,[r1,#3] -# endif - eor r3,r5,r6 @ magic - eor r12,r12,r12 -#if __ARM_ARCH__>=7 - @ ldr r2,[r1],#4 @ 0 -# if 0==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r8,r8,ror#5 - add r4,r4,r12 @ h+=Maj(a,b,c) from the past - eor r0,r0,r8,ror#19 @ Sigma1(e) -# ifndef __ARMEB__ - rev r2,r2 -# endif -#else - @ ldrb r2,[r1,#3] @ 0 - add r4,r4,r12 @ h+=Maj(a,b,c) from the past - ldrb r12,[r1,#2] - ldrb r0,[r1,#1] - orr r2,r2,r12,lsl#8 - ldrb r12,[r1],#4 - orr r2,r2,r0,lsl#16 -# if 0==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r8,r8,ror#5 - orr r2,r2,r12,lsl#24 - eor r0,r0,r8,ror#19 @ Sigma1(e) -#endif - ldr r12,[r14],#4 @ *K256++ - add r11,r11,r2 @ h+=X[i] - str r2,[sp,#0*4] - eor r2,r9,r10 - add r11,r11,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r8 - add r11,r11,r12 @ h+=K256[i] - eor r2,r2,r10 @ Ch(e,f,g) - eor r0,r4,r4,ror#11 - add r11,r11,r2 @ h+=Ch(e,f,g) -#if 0==31 - and r12,r12,#0xff - cmp r12,#0xf2 @ done? -#endif -#if 0<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r12,r4,r5 @ a^b, b^c in next round -#else - ldr r2,[sp,#2*4] @ from future BODY_16_xx - eor r12,r4,r5 @ a^b, b^c in next round - ldr r1,[sp,#15*4] @ from future BODY_16_xx -#endif - eor r0,r0,r4,ror#20 @ Sigma0(a) - and r3,r3,r12 @ (b^c)&=(a^b) - add r7,r7,r11 @ d+=h - eor r3,r3,r5 @ Maj(a,b,c) - add r11,r11,r0,ror#2 @ h+=Sigma0(a) - @ add r11,r11,r3 @ h+=Maj(a,b,c) -#if __ARM_ARCH__>=7 - @ ldr r2,[r1],#4 @ 1 -# if 1==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r7,r7,ror#5 - add r11,r11,r3 @ h+=Maj(a,b,c) from the past - eor r0,r0,r7,ror#19 @ Sigma1(e) -# ifndef __ARMEB__ - rev r2,r2 -# endif -#else - @ ldrb r2,[r1,#3] @ 1 - add r11,r11,r3 @ h+=Maj(a,b,c) from the past - ldrb r3,[r1,#2] - ldrb r0,[r1,#1] - orr r2,r2,r3,lsl#8 - ldrb r3,[r1],#4 - orr r2,r2,r0,lsl#16 -# if 1==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r7,r7,ror#5 - orr r2,r2,r3,lsl#24 - eor r0,r0,r7,ror#19 @ Sigma1(e) -#endif - ldr r3,[r14],#4 @ *K256++ - add r10,r10,r2 @ h+=X[i] - str r2,[sp,#1*4] - eor r2,r8,r9 - add r10,r10,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r7 - add r10,r10,r3 @ h+=K256[i] - eor r2,r2,r9 @ Ch(e,f,g) - eor r0,r11,r11,ror#11 - add r10,r10,r2 @ h+=Ch(e,f,g) -#if 1==31 - and r3,r3,#0xff - cmp r3,#0xf2 @ done? -#endif -#if 1<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r3,r11,r4 @ a^b, b^c in next round -#else - ldr r2,[sp,#3*4] @ from future BODY_16_xx - eor r3,r11,r4 @ a^b, b^c in next round - ldr r1,[sp,#0*4] @ from future BODY_16_xx -#endif - eor r0,r0,r11,ror#20 @ Sigma0(a) - and r12,r12,r3 @ (b^c)&=(a^b) - add r6,r6,r10 @ d+=h - eor r12,r12,r4 @ Maj(a,b,c) - add r10,r10,r0,ror#2 @ h+=Sigma0(a) - @ add r10,r10,r12 @ h+=Maj(a,b,c) -#if __ARM_ARCH__>=7 - @ ldr r2,[r1],#4 @ 2 -# if 2==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r6,r6,ror#5 - add r10,r10,r12 @ h+=Maj(a,b,c) from the past - eor r0,r0,r6,ror#19 @ Sigma1(e) -# ifndef __ARMEB__ - rev r2,r2 -# endif -#else - @ ldrb r2,[r1,#3] @ 2 - add r10,r10,r12 @ h+=Maj(a,b,c) from the past - ldrb r12,[r1,#2] - ldrb r0,[r1,#1] - orr r2,r2,r12,lsl#8 - ldrb r12,[r1],#4 - orr r2,r2,r0,lsl#16 -# if 2==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r6,r6,ror#5 - orr r2,r2,r12,lsl#24 - eor r0,r0,r6,ror#19 @ Sigma1(e) -#endif - ldr r12,[r14],#4 @ *K256++ - add r9,r9,r2 @ h+=X[i] - str r2,[sp,#2*4] - eor r2,r7,r8 - add r9,r9,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r6 - add r9,r9,r12 @ h+=K256[i] - eor r2,r2,r8 @ Ch(e,f,g) - eor r0,r10,r10,ror#11 - add r9,r9,r2 @ h+=Ch(e,f,g) -#if 2==31 - and r12,r12,#0xff - cmp r12,#0xf2 @ done? -#endif -#if 2<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r12,r10,r11 @ a^b, b^c in next round -#else - ldr r2,[sp,#4*4] @ from future BODY_16_xx - eor r12,r10,r11 @ a^b, b^c in next round - ldr r1,[sp,#1*4] @ from future BODY_16_xx -#endif - eor r0,r0,r10,ror#20 @ Sigma0(a) - and r3,r3,r12 @ (b^c)&=(a^b) - add r5,r5,r9 @ d+=h - eor r3,r3,r11 @ Maj(a,b,c) - add r9,r9,r0,ror#2 @ h+=Sigma0(a) - @ add r9,r9,r3 @ h+=Maj(a,b,c) -#if __ARM_ARCH__>=7 - @ ldr r2,[r1],#4 @ 3 -# if 3==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r5,r5,ror#5 - add r9,r9,r3 @ h+=Maj(a,b,c) from the past - eor r0,r0,r5,ror#19 @ Sigma1(e) -# ifndef __ARMEB__ - rev r2,r2 -# endif -#else - @ ldrb r2,[r1,#3] @ 3 - add r9,r9,r3 @ h+=Maj(a,b,c) from the past - ldrb r3,[r1,#2] - ldrb r0,[r1,#1] - orr r2,r2,r3,lsl#8 - ldrb r3,[r1],#4 - orr r2,r2,r0,lsl#16 -# if 3==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r5,r5,ror#5 - orr r2,r2,r3,lsl#24 - eor r0,r0,r5,ror#19 @ Sigma1(e) -#endif - ldr r3,[r14],#4 @ *K256++ - add r8,r8,r2 @ h+=X[i] - str r2,[sp,#3*4] - eor r2,r6,r7 - add r8,r8,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r5 - add r8,r8,r3 @ h+=K256[i] - eor r2,r2,r7 @ Ch(e,f,g) - eor r0,r9,r9,ror#11 - add r8,r8,r2 @ h+=Ch(e,f,g) -#if 3==31 - and r3,r3,#0xff - cmp r3,#0xf2 @ done? -#endif -#if 3<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r3,r9,r10 @ a^b, b^c in next round -#else - ldr r2,[sp,#5*4] @ from future BODY_16_xx - eor r3,r9,r10 @ a^b, b^c in next round - ldr r1,[sp,#2*4] @ from future BODY_16_xx -#endif - eor r0,r0,r9,ror#20 @ Sigma0(a) - and r12,r12,r3 @ (b^c)&=(a^b) - add r4,r4,r8 @ d+=h - eor r12,r12,r10 @ Maj(a,b,c) - add r8,r8,r0,ror#2 @ h+=Sigma0(a) - @ add r8,r8,r12 @ h+=Maj(a,b,c) -#if __ARM_ARCH__>=7 - @ ldr r2,[r1],#4 @ 4 -# if 4==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r4,r4,ror#5 - add r8,r8,r12 @ h+=Maj(a,b,c) from the past - eor r0,r0,r4,ror#19 @ Sigma1(e) -# ifndef __ARMEB__ - rev r2,r2 -# endif -#else - @ ldrb r2,[r1,#3] @ 4 - add r8,r8,r12 @ h+=Maj(a,b,c) from the past - ldrb r12,[r1,#2] - ldrb r0,[r1,#1] - orr r2,r2,r12,lsl#8 - ldrb r12,[r1],#4 - orr r2,r2,r0,lsl#16 -# if 4==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r4,r4,ror#5 - orr r2,r2,r12,lsl#24 - eor r0,r0,r4,ror#19 @ Sigma1(e) -#endif - ldr r12,[r14],#4 @ *K256++ - add r7,r7,r2 @ h+=X[i] - str r2,[sp,#4*4] - eor r2,r5,r6 - add r7,r7,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r4 - add r7,r7,r12 @ h+=K256[i] - eor r2,r2,r6 @ Ch(e,f,g) - eor r0,r8,r8,ror#11 - add r7,r7,r2 @ h+=Ch(e,f,g) -#if 4==31 - and r12,r12,#0xff - cmp r12,#0xf2 @ done? -#endif -#if 4<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r12,r8,r9 @ a^b, b^c in next round -#else - ldr r2,[sp,#6*4] @ from future BODY_16_xx - eor r12,r8,r9 @ a^b, b^c in next round - ldr r1,[sp,#3*4] @ from future BODY_16_xx -#endif - eor r0,r0,r8,ror#20 @ Sigma0(a) - and r3,r3,r12 @ (b^c)&=(a^b) - add r11,r11,r7 @ d+=h - eor r3,r3,r9 @ Maj(a,b,c) - add r7,r7,r0,ror#2 @ h+=Sigma0(a) - @ add r7,r7,r3 @ h+=Maj(a,b,c) -#if __ARM_ARCH__>=7 - @ ldr r2,[r1],#4 @ 5 -# if 5==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r11,r11,ror#5 - add r7,r7,r3 @ h+=Maj(a,b,c) from the past - eor r0,r0,r11,ror#19 @ Sigma1(e) -# ifndef __ARMEB__ - rev r2,r2 -# endif -#else - @ ldrb r2,[r1,#3] @ 5 - add r7,r7,r3 @ h+=Maj(a,b,c) from the past - ldrb r3,[r1,#2] - ldrb r0,[r1,#1] - orr r2,r2,r3,lsl#8 - ldrb r3,[r1],#4 - orr r2,r2,r0,lsl#16 -# if 5==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r11,r11,ror#5 - orr r2,r2,r3,lsl#24 - eor r0,r0,r11,ror#19 @ Sigma1(e) -#endif - ldr r3,[r14],#4 @ *K256++ - add r6,r6,r2 @ h+=X[i] - str r2,[sp,#5*4] - eor r2,r4,r5 - add r6,r6,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r11 - add r6,r6,r3 @ h+=K256[i] - eor r2,r2,r5 @ Ch(e,f,g) - eor r0,r7,r7,ror#11 - add r6,r6,r2 @ h+=Ch(e,f,g) -#if 5==31 - and r3,r3,#0xff - cmp r3,#0xf2 @ done? -#endif -#if 5<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r3,r7,r8 @ a^b, b^c in next round -#else - ldr r2,[sp,#7*4] @ from future BODY_16_xx - eor r3,r7,r8 @ a^b, b^c in next round - ldr r1,[sp,#4*4] @ from future BODY_16_xx -#endif - eor r0,r0,r7,ror#20 @ Sigma0(a) - and r12,r12,r3 @ (b^c)&=(a^b) - add r10,r10,r6 @ d+=h - eor r12,r12,r8 @ Maj(a,b,c) - add r6,r6,r0,ror#2 @ h+=Sigma0(a) - @ add r6,r6,r12 @ h+=Maj(a,b,c) -#if __ARM_ARCH__>=7 - @ ldr r2,[r1],#4 @ 6 -# if 6==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r10,r10,ror#5 - add r6,r6,r12 @ h+=Maj(a,b,c) from the past - eor r0,r0,r10,ror#19 @ Sigma1(e) -# ifndef __ARMEB__ - rev r2,r2 -# endif -#else - @ ldrb r2,[r1,#3] @ 6 - add r6,r6,r12 @ h+=Maj(a,b,c) from the past - ldrb r12,[r1,#2] - ldrb r0,[r1,#1] - orr r2,r2,r12,lsl#8 - ldrb r12,[r1],#4 - orr r2,r2,r0,lsl#16 -# if 6==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r10,r10,ror#5 - orr r2,r2,r12,lsl#24 - eor r0,r0,r10,ror#19 @ Sigma1(e) -#endif - ldr r12,[r14],#4 @ *K256++ - add r5,r5,r2 @ h+=X[i] - str r2,[sp,#6*4] - eor r2,r11,r4 - add r5,r5,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r10 - add r5,r5,r12 @ h+=K256[i] - eor r2,r2,r4 @ Ch(e,f,g) - eor r0,r6,r6,ror#11 - add r5,r5,r2 @ h+=Ch(e,f,g) -#if 6==31 - and r12,r12,#0xff - cmp r12,#0xf2 @ done? -#endif -#if 6<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r12,r6,r7 @ a^b, b^c in next round -#else - ldr r2,[sp,#8*4] @ from future BODY_16_xx - eor r12,r6,r7 @ a^b, b^c in next round - ldr r1,[sp,#5*4] @ from future BODY_16_xx -#endif - eor r0,r0,r6,ror#20 @ Sigma0(a) - and r3,r3,r12 @ (b^c)&=(a^b) - add r9,r9,r5 @ d+=h - eor r3,r3,r7 @ Maj(a,b,c) - add r5,r5,r0,ror#2 @ h+=Sigma0(a) - @ add r5,r5,r3 @ h+=Maj(a,b,c) -#if __ARM_ARCH__>=7 - @ ldr r2,[r1],#4 @ 7 -# if 7==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r9,r9,ror#5 - add r5,r5,r3 @ h+=Maj(a,b,c) from the past - eor r0,r0,r9,ror#19 @ Sigma1(e) -# ifndef __ARMEB__ - rev r2,r2 -# endif -#else - @ ldrb r2,[r1,#3] @ 7 - add r5,r5,r3 @ h+=Maj(a,b,c) from the past - ldrb r3,[r1,#2] - ldrb r0,[r1,#1] - orr r2,r2,r3,lsl#8 - ldrb r3,[r1],#4 - orr r2,r2,r0,lsl#16 -# if 7==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r9,r9,ror#5 - orr r2,r2,r3,lsl#24 - eor r0,r0,r9,ror#19 @ Sigma1(e) -#endif - ldr r3,[r14],#4 @ *K256++ - add r4,r4,r2 @ h+=X[i] - str r2,[sp,#7*4] - eor r2,r10,r11 - add r4,r4,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r9 - add r4,r4,r3 @ h+=K256[i] - eor r2,r2,r11 @ Ch(e,f,g) - eor r0,r5,r5,ror#11 - add r4,r4,r2 @ h+=Ch(e,f,g) -#if 7==31 - and r3,r3,#0xff - cmp r3,#0xf2 @ done? -#endif -#if 7<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r3,r5,r6 @ a^b, b^c in next round -#else - ldr r2,[sp,#9*4] @ from future BODY_16_xx - eor r3,r5,r6 @ a^b, b^c in next round - ldr r1,[sp,#6*4] @ from future BODY_16_xx -#endif - eor r0,r0,r5,ror#20 @ Sigma0(a) - and r12,r12,r3 @ (b^c)&=(a^b) - add r8,r8,r4 @ d+=h - eor r12,r12,r6 @ Maj(a,b,c) - add r4,r4,r0,ror#2 @ h+=Sigma0(a) - @ add r4,r4,r12 @ h+=Maj(a,b,c) -#if __ARM_ARCH__>=7 - @ ldr r2,[r1],#4 @ 8 -# if 8==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r8,r8,ror#5 - add r4,r4,r12 @ h+=Maj(a,b,c) from the past - eor r0,r0,r8,ror#19 @ Sigma1(e) -# ifndef __ARMEB__ - rev r2,r2 -# endif -#else - @ ldrb r2,[r1,#3] @ 8 - add r4,r4,r12 @ h+=Maj(a,b,c) from the past - ldrb r12,[r1,#2] - ldrb r0,[r1,#1] - orr r2,r2,r12,lsl#8 - ldrb r12,[r1],#4 - orr r2,r2,r0,lsl#16 -# if 8==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r8,r8,ror#5 - orr r2,r2,r12,lsl#24 - eor r0,r0,r8,ror#19 @ Sigma1(e) -#endif - ldr r12,[r14],#4 @ *K256++ - add r11,r11,r2 @ h+=X[i] - str r2,[sp,#8*4] - eor r2,r9,r10 - add r11,r11,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r8 - add r11,r11,r12 @ h+=K256[i] - eor r2,r2,r10 @ Ch(e,f,g) - eor r0,r4,r4,ror#11 - add r11,r11,r2 @ h+=Ch(e,f,g) -#if 8==31 - and r12,r12,#0xff - cmp r12,#0xf2 @ done? -#endif -#if 8<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r12,r4,r5 @ a^b, b^c in next round -#else - ldr r2,[sp,#10*4] @ from future BODY_16_xx - eor r12,r4,r5 @ a^b, b^c in next round - ldr r1,[sp,#7*4] @ from future BODY_16_xx -#endif - eor r0,r0,r4,ror#20 @ Sigma0(a) - and r3,r3,r12 @ (b^c)&=(a^b) - add r7,r7,r11 @ d+=h - eor r3,r3,r5 @ Maj(a,b,c) - add r11,r11,r0,ror#2 @ h+=Sigma0(a) - @ add r11,r11,r3 @ h+=Maj(a,b,c) -#if __ARM_ARCH__>=7 - @ ldr r2,[r1],#4 @ 9 -# if 9==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r7,r7,ror#5 - add r11,r11,r3 @ h+=Maj(a,b,c) from the past - eor r0,r0,r7,ror#19 @ Sigma1(e) -# ifndef __ARMEB__ - rev r2,r2 -# endif -#else - @ ldrb r2,[r1,#3] @ 9 - add r11,r11,r3 @ h+=Maj(a,b,c) from the past - ldrb r3,[r1,#2] - ldrb r0,[r1,#1] - orr r2,r2,r3,lsl#8 - ldrb r3,[r1],#4 - orr r2,r2,r0,lsl#16 -# if 9==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r7,r7,ror#5 - orr r2,r2,r3,lsl#24 - eor r0,r0,r7,ror#19 @ Sigma1(e) -#endif - ldr r3,[r14],#4 @ *K256++ - add r10,r10,r2 @ h+=X[i] - str r2,[sp,#9*4] - eor r2,r8,r9 - add r10,r10,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r7 - add r10,r10,r3 @ h+=K256[i] - eor r2,r2,r9 @ Ch(e,f,g) - eor r0,r11,r11,ror#11 - add r10,r10,r2 @ h+=Ch(e,f,g) -#if 9==31 - and r3,r3,#0xff - cmp r3,#0xf2 @ done? -#endif -#if 9<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r3,r11,r4 @ a^b, b^c in next round -#else - ldr r2,[sp,#11*4] @ from future BODY_16_xx - eor r3,r11,r4 @ a^b, b^c in next round - ldr r1,[sp,#8*4] @ from future BODY_16_xx -#endif - eor r0,r0,r11,ror#20 @ Sigma0(a) - and r12,r12,r3 @ (b^c)&=(a^b) - add r6,r6,r10 @ d+=h - eor r12,r12,r4 @ Maj(a,b,c) - add r10,r10,r0,ror#2 @ h+=Sigma0(a) - @ add r10,r10,r12 @ h+=Maj(a,b,c) -#if __ARM_ARCH__>=7 - @ ldr r2,[r1],#4 @ 10 -# if 10==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r6,r6,ror#5 - add r10,r10,r12 @ h+=Maj(a,b,c) from the past - eor r0,r0,r6,ror#19 @ Sigma1(e) -# ifndef __ARMEB__ - rev r2,r2 -# endif -#else - @ ldrb r2,[r1,#3] @ 10 - add r10,r10,r12 @ h+=Maj(a,b,c) from the past - ldrb r12,[r1,#2] - ldrb r0,[r1,#1] - orr r2,r2,r12,lsl#8 - ldrb r12,[r1],#4 - orr r2,r2,r0,lsl#16 -# if 10==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r6,r6,ror#5 - orr r2,r2,r12,lsl#24 - eor r0,r0,r6,ror#19 @ Sigma1(e) -#endif - ldr r12,[r14],#4 @ *K256++ - add r9,r9,r2 @ h+=X[i] - str r2,[sp,#10*4] - eor r2,r7,r8 - add r9,r9,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r6 - add r9,r9,r12 @ h+=K256[i] - eor r2,r2,r8 @ Ch(e,f,g) - eor r0,r10,r10,ror#11 - add r9,r9,r2 @ h+=Ch(e,f,g) -#if 10==31 - and r12,r12,#0xff - cmp r12,#0xf2 @ done? -#endif -#if 10<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r12,r10,r11 @ a^b, b^c in next round -#else - ldr r2,[sp,#12*4] @ from future BODY_16_xx - eor r12,r10,r11 @ a^b, b^c in next round - ldr r1,[sp,#9*4] @ from future BODY_16_xx -#endif - eor r0,r0,r10,ror#20 @ Sigma0(a) - and r3,r3,r12 @ (b^c)&=(a^b) - add r5,r5,r9 @ d+=h - eor r3,r3,r11 @ Maj(a,b,c) - add r9,r9,r0,ror#2 @ h+=Sigma0(a) - @ add r9,r9,r3 @ h+=Maj(a,b,c) -#if __ARM_ARCH__>=7 - @ ldr r2,[r1],#4 @ 11 -# if 11==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r5,r5,ror#5 - add r9,r9,r3 @ h+=Maj(a,b,c) from the past - eor r0,r0,r5,ror#19 @ Sigma1(e) -# ifndef __ARMEB__ - rev r2,r2 -# endif -#else - @ ldrb r2,[r1,#3] @ 11 - add r9,r9,r3 @ h+=Maj(a,b,c) from the past - ldrb r3,[r1,#2] - ldrb r0,[r1,#1] - orr r2,r2,r3,lsl#8 - ldrb r3,[r1],#4 - orr r2,r2,r0,lsl#16 -# if 11==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r5,r5,ror#5 - orr r2,r2,r3,lsl#24 - eor r0,r0,r5,ror#19 @ Sigma1(e) -#endif - ldr r3,[r14],#4 @ *K256++ - add r8,r8,r2 @ h+=X[i] - str r2,[sp,#11*4] - eor r2,r6,r7 - add r8,r8,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r5 - add r8,r8,r3 @ h+=K256[i] - eor r2,r2,r7 @ Ch(e,f,g) - eor r0,r9,r9,ror#11 - add r8,r8,r2 @ h+=Ch(e,f,g) -#if 11==31 - and r3,r3,#0xff - cmp r3,#0xf2 @ done? -#endif -#if 11<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r3,r9,r10 @ a^b, b^c in next round -#else - ldr r2,[sp,#13*4] @ from future BODY_16_xx - eor r3,r9,r10 @ a^b, b^c in next round - ldr r1,[sp,#10*4] @ from future BODY_16_xx -#endif - eor r0,r0,r9,ror#20 @ Sigma0(a) - and r12,r12,r3 @ (b^c)&=(a^b) - add r4,r4,r8 @ d+=h - eor r12,r12,r10 @ Maj(a,b,c) - add r8,r8,r0,ror#2 @ h+=Sigma0(a) - @ add r8,r8,r12 @ h+=Maj(a,b,c) -#if __ARM_ARCH__>=7 - @ ldr r2,[r1],#4 @ 12 -# if 12==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r4,r4,ror#5 - add r8,r8,r12 @ h+=Maj(a,b,c) from the past - eor r0,r0,r4,ror#19 @ Sigma1(e) -# ifndef __ARMEB__ - rev r2,r2 -# endif -#else - @ ldrb r2,[r1,#3] @ 12 - add r8,r8,r12 @ h+=Maj(a,b,c) from the past - ldrb r12,[r1,#2] - ldrb r0,[r1,#1] - orr r2,r2,r12,lsl#8 - ldrb r12,[r1],#4 - orr r2,r2,r0,lsl#16 -# if 12==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r4,r4,ror#5 - orr r2,r2,r12,lsl#24 - eor r0,r0,r4,ror#19 @ Sigma1(e) -#endif - ldr r12,[r14],#4 @ *K256++ - add r7,r7,r2 @ h+=X[i] - str r2,[sp,#12*4] - eor r2,r5,r6 - add r7,r7,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r4 - add r7,r7,r12 @ h+=K256[i] - eor r2,r2,r6 @ Ch(e,f,g) - eor r0,r8,r8,ror#11 - add r7,r7,r2 @ h+=Ch(e,f,g) -#if 12==31 - and r12,r12,#0xff - cmp r12,#0xf2 @ done? -#endif -#if 12<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r12,r8,r9 @ a^b, b^c in next round -#else - ldr r2,[sp,#14*4] @ from future BODY_16_xx - eor r12,r8,r9 @ a^b, b^c in next round - ldr r1,[sp,#11*4] @ from future BODY_16_xx -#endif - eor r0,r0,r8,ror#20 @ Sigma0(a) - and r3,r3,r12 @ (b^c)&=(a^b) - add r11,r11,r7 @ d+=h - eor r3,r3,r9 @ Maj(a,b,c) - add r7,r7,r0,ror#2 @ h+=Sigma0(a) - @ add r7,r7,r3 @ h+=Maj(a,b,c) -#if __ARM_ARCH__>=7 - @ ldr r2,[r1],#4 @ 13 -# if 13==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r11,r11,ror#5 - add r7,r7,r3 @ h+=Maj(a,b,c) from the past - eor r0,r0,r11,ror#19 @ Sigma1(e) -# ifndef __ARMEB__ - rev r2,r2 -# endif -#else - @ ldrb r2,[r1,#3] @ 13 - add r7,r7,r3 @ h+=Maj(a,b,c) from the past - ldrb r3,[r1,#2] - ldrb r0,[r1,#1] - orr r2,r2,r3,lsl#8 - ldrb r3,[r1],#4 - orr r2,r2,r0,lsl#16 -# if 13==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r11,r11,ror#5 - orr r2,r2,r3,lsl#24 - eor r0,r0,r11,ror#19 @ Sigma1(e) -#endif - ldr r3,[r14],#4 @ *K256++ - add r6,r6,r2 @ h+=X[i] - str r2,[sp,#13*4] - eor r2,r4,r5 - add r6,r6,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r11 - add r6,r6,r3 @ h+=K256[i] - eor r2,r2,r5 @ Ch(e,f,g) - eor r0,r7,r7,ror#11 - add r6,r6,r2 @ h+=Ch(e,f,g) -#if 13==31 - and r3,r3,#0xff - cmp r3,#0xf2 @ done? -#endif -#if 13<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r3,r7,r8 @ a^b, b^c in next round -#else - ldr r2,[sp,#15*4] @ from future BODY_16_xx - eor r3,r7,r8 @ a^b, b^c in next round - ldr r1,[sp,#12*4] @ from future BODY_16_xx -#endif - eor r0,r0,r7,ror#20 @ Sigma0(a) - and r12,r12,r3 @ (b^c)&=(a^b) - add r10,r10,r6 @ d+=h - eor r12,r12,r8 @ Maj(a,b,c) - add r6,r6,r0,ror#2 @ h+=Sigma0(a) - @ add r6,r6,r12 @ h+=Maj(a,b,c) -#if __ARM_ARCH__>=7 - @ ldr r2,[r1],#4 @ 14 -# if 14==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r10,r10,ror#5 - add r6,r6,r12 @ h+=Maj(a,b,c) from the past - eor r0,r0,r10,ror#19 @ Sigma1(e) -# ifndef __ARMEB__ - rev r2,r2 -# endif -#else - @ ldrb r2,[r1,#3] @ 14 - add r6,r6,r12 @ h+=Maj(a,b,c) from the past - ldrb r12,[r1,#2] - ldrb r0,[r1,#1] - orr r2,r2,r12,lsl#8 - ldrb r12,[r1],#4 - orr r2,r2,r0,lsl#16 -# if 14==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r10,r10,ror#5 - orr r2,r2,r12,lsl#24 - eor r0,r0,r10,ror#19 @ Sigma1(e) -#endif - ldr r12,[r14],#4 @ *K256++ - add r5,r5,r2 @ h+=X[i] - str r2,[sp,#14*4] - eor r2,r11,r4 - add r5,r5,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r10 - add r5,r5,r12 @ h+=K256[i] - eor r2,r2,r4 @ Ch(e,f,g) - eor r0,r6,r6,ror#11 - add r5,r5,r2 @ h+=Ch(e,f,g) -#if 14==31 - and r12,r12,#0xff - cmp r12,#0xf2 @ done? -#endif -#if 14<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r12,r6,r7 @ a^b, b^c in next round -#else - ldr r2,[sp,#0*4] @ from future BODY_16_xx - eor r12,r6,r7 @ a^b, b^c in next round - ldr r1,[sp,#13*4] @ from future BODY_16_xx -#endif - eor r0,r0,r6,ror#20 @ Sigma0(a) - and r3,r3,r12 @ (b^c)&=(a^b) - add r9,r9,r5 @ d+=h - eor r3,r3,r7 @ Maj(a,b,c) - add r5,r5,r0,ror#2 @ h+=Sigma0(a) - @ add r5,r5,r3 @ h+=Maj(a,b,c) -#if __ARM_ARCH__>=7 - @ ldr r2,[r1],#4 @ 15 -# if 15==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r9,r9,ror#5 - add r5,r5,r3 @ h+=Maj(a,b,c) from the past - eor r0,r0,r9,ror#19 @ Sigma1(e) -# ifndef __ARMEB__ - rev r2,r2 -# endif -#else - @ ldrb r2,[r1,#3] @ 15 - add r5,r5,r3 @ h+=Maj(a,b,c) from the past - ldrb r3,[r1,#2] - ldrb r0,[r1,#1] - orr r2,r2,r3,lsl#8 - ldrb r3,[r1],#4 - orr r2,r2,r0,lsl#16 -# if 15==15 - str r1,[sp,#17*4] @ make room for r1 -# endif - eor r0,r9,r9,ror#5 - orr r2,r2,r3,lsl#24 - eor r0,r0,r9,ror#19 @ Sigma1(e) -#endif - ldr r3,[r14],#4 @ *K256++ - add r4,r4,r2 @ h+=X[i] - str r2,[sp,#15*4] - eor r2,r10,r11 - add r4,r4,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r9 - add r4,r4,r3 @ h+=K256[i] - eor r2,r2,r11 @ Ch(e,f,g) - eor r0,r5,r5,ror#11 - add r4,r4,r2 @ h+=Ch(e,f,g) -#if 15==31 - and r3,r3,#0xff - cmp r3,#0xf2 @ done? -#endif -#if 15<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r3,r5,r6 @ a^b, b^c in next round -#else - ldr r2,[sp,#1*4] @ from future BODY_16_xx - eor r3,r5,r6 @ a^b, b^c in next round - ldr r1,[sp,#14*4] @ from future BODY_16_xx -#endif - eor r0,r0,r5,ror#20 @ Sigma0(a) - and r12,r12,r3 @ (b^c)&=(a^b) - add r8,r8,r4 @ d+=h - eor r12,r12,r6 @ Maj(a,b,c) - add r4,r4,r0,ror#2 @ h+=Sigma0(a) - @ add r4,r4,r12 @ h+=Maj(a,b,c) -.Lrounds_16_xx: - @ ldr r2,[sp,#1*4] @ 16 - @ ldr r1,[sp,#14*4] - mov r0,r2,ror#7 - add r4,r4,r12 @ h+=Maj(a,b,c) from the past - mov r12,r1,ror#17 - eor r0,r0,r2,ror#18 - eor r12,r12,r1,ror#19 - eor r0,r0,r2,lsr#3 @ sigma0(X[i+1]) - ldr r2,[sp,#0*4] - eor r12,r12,r1,lsr#10 @ sigma1(X[i+14]) - ldr r1,[sp,#9*4] - - add r12,r12,r0 - eor r0,r8,r8,ror#5 @ from BODY_00_15 - add r2,r2,r12 - eor r0,r0,r8,ror#19 @ Sigma1(e) - add r2,r2,r1 @ X[i] - ldr r12,[r14],#4 @ *K256++ - add r11,r11,r2 @ h+=X[i] - str r2,[sp,#0*4] - eor r2,r9,r10 - add r11,r11,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r8 - add r11,r11,r12 @ h+=K256[i] - eor r2,r2,r10 @ Ch(e,f,g) - eor r0,r4,r4,ror#11 - add r11,r11,r2 @ h+=Ch(e,f,g) -#if 16==31 - and r12,r12,#0xff - cmp r12,#0xf2 @ done? -#endif -#if 16<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r12,r4,r5 @ a^b, b^c in next round -#else - ldr r2,[sp,#2*4] @ from future BODY_16_xx - eor r12,r4,r5 @ a^b, b^c in next round - ldr r1,[sp,#15*4] @ from future BODY_16_xx -#endif - eor r0,r0,r4,ror#20 @ Sigma0(a) - and r3,r3,r12 @ (b^c)&=(a^b) - add r7,r7,r11 @ d+=h - eor r3,r3,r5 @ Maj(a,b,c) - add r11,r11,r0,ror#2 @ h+=Sigma0(a) - @ add r11,r11,r3 @ h+=Maj(a,b,c) - @ ldr r2,[sp,#2*4] @ 17 - @ ldr r1,[sp,#15*4] - mov r0,r2,ror#7 - add r11,r11,r3 @ h+=Maj(a,b,c) from the past - mov r3,r1,ror#17 - eor r0,r0,r2,ror#18 - eor r3,r3,r1,ror#19 - eor r0,r0,r2,lsr#3 @ sigma0(X[i+1]) - ldr r2,[sp,#1*4] - eor r3,r3,r1,lsr#10 @ sigma1(X[i+14]) - ldr r1,[sp,#10*4] - - add r3,r3,r0 - eor r0,r7,r7,ror#5 @ from BODY_00_15 - add r2,r2,r3 - eor r0,r0,r7,ror#19 @ Sigma1(e) - add r2,r2,r1 @ X[i] - ldr r3,[r14],#4 @ *K256++ - add r10,r10,r2 @ h+=X[i] - str r2,[sp,#1*4] - eor r2,r8,r9 - add r10,r10,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r7 - add r10,r10,r3 @ h+=K256[i] - eor r2,r2,r9 @ Ch(e,f,g) - eor r0,r11,r11,ror#11 - add r10,r10,r2 @ h+=Ch(e,f,g) -#if 17==31 - and r3,r3,#0xff - cmp r3,#0xf2 @ done? -#endif -#if 17<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r3,r11,r4 @ a^b, b^c in next round -#else - ldr r2,[sp,#3*4] @ from future BODY_16_xx - eor r3,r11,r4 @ a^b, b^c in next round - ldr r1,[sp,#0*4] @ from future BODY_16_xx -#endif - eor r0,r0,r11,ror#20 @ Sigma0(a) - and r12,r12,r3 @ (b^c)&=(a^b) - add r6,r6,r10 @ d+=h - eor r12,r12,r4 @ Maj(a,b,c) - add r10,r10,r0,ror#2 @ h+=Sigma0(a) - @ add r10,r10,r12 @ h+=Maj(a,b,c) - @ ldr r2,[sp,#3*4] @ 18 - @ ldr r1,[sp,#0*4] - mov r0,r2,ror#7 - add r10,r10,r12 @ h+=Maj(a,b,c) from the past - mov r12,r1,ror#17 - eor r0,r0,r2,ror#18 - eor r12,r12,r1,ror#19 - eor r0,r0,r2,lsr#3 @ sigma0(X[i+1]) - ldr r2,[sp,#2*4] - eor r12,r12,r1,lsr#10 @ sigma1(X[i+14]) - ldr r1,[sp,#11*4] - - add r12,r12,r0 - eor r0,r6,r6,ror#5 @ from BODY_00_15 - add r2,r2,r12 - eor r0,r0,r6,ror#19 @ Sigma1(e) - add r2,r2,r1 @ X[i] - ldr r12,[r14],#4 @ *K256++ - add r9,r9,r2 @ h+=X[i] - str r2,[sp,#2*4] - eor r2,r7,r8 - add r9,r9,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r6 - add r9,r9,r12 @ h+=K256[i] - eor r2,r2,r8 @ Ch(e,f,g) - eor r0,r10,r10,ror#11 - add r9,r9,r2 @ h+=Ch(e,f,g) -#if 18==31 - and r12,r12,#0xff - cmp r12,#0xf2 @ done? -#endif -#if 18<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r12,r10,r11 @ a^b, b^c in next round -#else - ldr r2,[sp,#4*4] @ from future BODY_16_xx - eor r12,r10,r11 @ a^b, b^c in next round - ldr r1,[sp,#1*4] @ from future BODY_16_xx -#endif - eor r0,r0,r10,ror#20 @ Sigma0(a) - and r3,r3,r12 @ (b^c)&=(a^b) - add r5,r5,r9 @ d+=h - eor r3,r3,r11 @ Maj(a,b,c) - add r9,r9,r0,ror#2 @ h+=Sigma0(a) - @ add r9,r9,r3 @ h+=Maj(a,b,c) - @ ldr r2,[sp,#4*4] @ 19 - @ ldr r1,[sp,#1*4] - mov r0,r2,ror#7 - add r9,r9,r3 @ h+=Maj(a,b,c) from the past - mov r3,r1,ror#17 - eor r0,r0,r2,ror#18 - eor r3,r3,r1,ror#19 - eor r0,r0,r2,lsr#3 @ sigma0(X[i+1]) - ldr r2,[sp,#3*4] - eor r3,r3,r1,lsr#10 @ sigma1(X[i+14]) - ldr r1,[sp,#12*4] - - add r3,r3,r0 - eor r0,r5,r5,ror#5 @ from BODY_00_15 - add r2,r2,r3 - eor r0,r0,r5,ror#19 @ Sigma1(e) - add r2,r2,r1 @ X[i] - ldr r3,[r14],#4 @ *K256++ - add r8,r8,r2 @ h+=X[i] - str r2,[sp,#3*4] - eor r2,r6,r7 - add r8,r8,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r5 - add r8,r8,r3 @ h+=K256[i] - eor r2,r2,r7 @ Ch(e,f,g) - eor r0,r9,r9,ror#11 - add r8,r8,r2 @ h+=Ch(e,f,g) -#if 19==31 - and r3,r3,#0xff - cmp r3,#0xf2 @ done? -#endif -#if 19<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r3,r9,r10 @ a^b, b^c in next round -#else - ldr r2,[sp,#5*4] @ from future BODY_16_xx - eor r3,r9,r10 @ a^b, b^c in next round - ldr r1,[sp,#2*4] @ from future BODY_16_xx -#endif - eor r0,r0,r9,ror#20 @ Sigma0(a) - and r12,r12,r3 @ (b^c)&=(a^b) - add r4,r4,r8 @ d+=h - eor r12,r12,r10 @ Maj(a,b,c) - add r8,r8,r0,ror#2 @ h+=Sigma0(a) - @ add r8,r8,r12 @ h+=Maj(a,b,c) - @ ldr r2,[sp,#5*4] @ 20 - @ ldr r1,[sp,#2*4] - mov r0,r2,ror#7 - add r8,r8,r12 @ h+=Maj(a,b,c) from the past - mov r12,r1,ror#17 - eor r0,r0,r2,ror#18 - eor r12,r12,r1,ror#19 - eor r0,r0,r2,lsr#3 @ sigma0(X[i+1]) - ldr r2,[sp,#4*4] - eor r12,r12,r1,lsr#10 @ sigma1(X[i+14]) - ldr r1,[sp,#13*4] - - add r12,r12,r0 - eor r0,r4,r4,ror#5 @ from BODY_00_15 - add r2,r2,r12 - eor r0,r0,r4,ror#19 @ Sigma1(e) - add r2,r2,r1 @ X[i] - ldr r12,[r14],#4 @ *K256++ - add r7,r7,r2 @ h+=X[i] - str r2,[sp,#4*4] - eor r2,r5,r6 - add r7,r7,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r4 - add r7,r7,r12 @ h+=K256[i] - eor r2,r2,r6 @ Ch(e,f,g) - eor r0,r8,r8,ror#11 - add r7,r7,r2 @ h+=Ch(e,f,g) -#if 20==31 - and r12,r12,#0xff - cmp r12,#0xf2 @ done? -#endif -#if 20<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r12,r8,r9 @ a^b, b^c in next round -#else - ldr r2,[sp,#6*4] @ from future BODY_16_xx - eor r12,r8,r9 @ a^b, b^c in next round - ldr r1,[sp,#3*4] @ from future BODY_16_xx -#endif - eor r0,r0,r8,ror#20 @ Sigma0(a) - and r3,r3,r12 @ (b^c)&=(a^b) - add r11,r11,r7 @ d+=h - eor r3,r3,r9 @ Maj(a,b,c) - add r7,r7,r0,ror#2 @ h+=Sigma0(a) - @ add r7,r7,r3 @ h+=Maj(a,b,c) - @ ldr r2,[sp,#6*4] @ 21 - @ ldr r1,[sp,#3*4] - mov r0,r2,ror#7 - add r7,r7,r3 @ h+=Maj(a,b,c) from the past - mov r3,r1,ror#17 - eor r0,r0,r2,ror#18 - eor r3,r3,r1,ror#19 - eor r0,r0,r2,lsr#3 @ sigma0(X[i+1]) - ldr r2,[sp,#5*4] - eor r3,r3,r1,lsr#10 @ sigma1(X[i+14]) - ldr r1,[sp,#14*4] - - add r3,r3,r0 - eor r0,r11,r11,ror#5 @ from BODY_00_15 - add r2,r2,r3 - eor r0,r0,r11,ror#19 @ Sigma1(e) - add r2,r2,r1 @ X[i] - ldr r3,[r14],#4 @ *K256++ - add r6,r6,r2 @ h+=X[i] - str r2,[sp,#5*4] - eor r2,r4,r5 - add r6,r6,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r11 - add r6,r6,r3 @ h+=K256[i] - eor r2,r2,r5 @ Ch(e,f,g) - eor r0,r7,r7,ror#11 - add r6,r6,r2 @ h+=Ch(e,f,g) -#if 21==31 - and r3,r3,#0xff - cmp r3,#0xf2 @ done? -#endif -#if 21<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r3,r7,r8 @ a^b, b^c in next round -#else - ldr r2,[sp,#7*4] @ from future BODY_16_xx - eor r3,r7,r8 @ a^b, b^c in next round - ldr r1,[sp,#4*4] @ from future BODY_16_xx -#endif - eor r0,r0,r7,ror#20 @ Sigma0(a) - and r12,r12,r3 @ (b^c)&=(a^b) - add r10,r10,r6 @ d+=h - eor r12,r12,r8 @ Maj(a,b,c) - add r6,r6,r0,ror#2 @ h+=Sigma0(a) - @ add r6,r6,r12 @ h+=Maj(a,b,c) - @ ldr r2,[sp,#7*4] @ 22 - @ ldr r1,[sp,#4*4] - mov r0,r2,ror#7 - add r6,r6,r12 @ h+=Maj(a,b,c) from the past - mov r12,r1,ror#17 - eor r0,r0,r2,ror#18 - eor r12,r12,r1,ror#19 - eor r0,r0,r2,lsr#3 @ sigma0(X[i+1]) - ldr r2,[sp,#6*4] - eor r12,r12,r1,lsr#10 @ sigma1(X[i+14]) - ldr r1,[sp,#15*4] - - add r12,r12,r0 - eor r0,r10,r10,ror#5 @ from BODY_00_15 - add r2,r2,r12 - eor r0,r0,r10,ror#19 @ Sigma1(e) - add r2,r2,r1 @ X[i] - ldr r12,[r14],#4 @ *K256++ - add r5,r5,r2 @ h+=X[i] - str r2,[sp,#6*4] - eor r2,r11,r4 - add r5,r5,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r10 - add r5,r5,r12 @ h+=K256[i] - eor r2,r2,r4 @ Ch(e,f,g) - eor r0,r6,r6,ror#11 - add r5,r5,r2 @ h+=Ch(e,f,g) -#if 22==31 - and r12,r12,#0xff - cmp r12,#0xf2 @ done? -#endif -#if 22<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r12,r6,r7 @ a^b, b^c in next round -#else - ldr r2,[sp,#8*4] @ from future BODY_16_xx - eor r12,r6,r7 @ a^b, b^c in next round - ldr r1,[sp,#5*4] @ from future BODY_16_xx -#endif - eor r0,r0,r6,ror#20 @ Sigma0(a) - and r3,r3,r12 @ (b^c)&=(a^b) - add r9,r9,r5 @ d+=h - eor r3,r3,r7 @ Maj(a,b,c) - add r5,r5,r0,ror#2 @ h+=Sigma0(a) - @ add r5,r5,r3 @ h+=Maj(a,b,c) - @ ldr r2,[sp,#8*4] @ 23 - @ ldr r1,[sp,#5*4] - mov r0,r2,ror#7 - add r5,r5,r3 @ h+=Maj(a,b,c) from the past - mov r3,r1,ror#17 - eor r0,r0,r2,ror#18 - eor r3,r3,r1,ror#19 - eor r0,r0,r2,lsr#3 @ sigma0(X[i+1]) - ldr r2,[sp,#7*4] - eor r3,r3,r1,lsr#10 @ sigma1(X[i+14]) - ldr r1,[sp,#0*4] - - add r3,r3,r0 - eor r0,r9,r9,ror#5 @ from BODY_00_15 - add r2,r2,r3 - eor r0,r0,r9,ror#19 @ Sigma1(e) - add r2,r2,r1 @ X[i] - ldr r3,[r14],#4 @ *K256++ - add r4,r4,r2 @ h+=X[i] - str r2,[sp,#7*4] - eor r2,r10,r11 - add r4,r4,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r9 - add r4,r4,r3 @ h+=K256[i] - eor r2,r2,r11 @ Ch(e,f,g) - eor r0,r5,r5,ror#11 - add r4,r4,r2 @ h+=Ch(e,f,g) -#if 23==31 - and r3,r3,#0xff - cmp r3,#0xf2 @ done? -#endif -#if 23<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r3,r5,r6 @ a^b, b^c in next round -#else - ldr r2,[sp,#9*4] @ from future BODY_16_xx - eor r3,r5,r6 @ a^b, b^c in next round - ldr r1,[sp,#6*4] @ from future BODY_16_xx -#endif - eor r0,r0,r5,ror#20 @ Sigma0(a) - and r12,r12,r3 @ (b^c)&=(a^b) - add r8,r8,r4 @ d+=h - eor r12,r12,r6 @ Maj(a,b,c) - add r4,r4,r0,ror#2 @ h+=Sigma0(a) - @ add r4,r4,r12 @ h+=Maj(a,b,c) - @ ldr r2,[sp,#9*4] @ 24 - @ ldr r1,[sp,#6*4] - mov r0,r2,ror#7 - add r4,r4,r12 @ h+=Maj(a,b,c) from the past - mov r12,r1,ror#17 - eor r0,r0,r2,ror#18 - eor r12,r12,r1,ror#19 - eor r0,r0,r2,lsr#3 @ sigma0(X[i+1]) - ldr r2,[sp,#8*4] - eor r12,r12,r1,lsr#10 @ sigma1(X[i+14]) - ldr r1,[sp,#1*4] - - add r12,r12,r0 - eor r0,r8,r8,ror#5 @ from BODY_00_15 - add r2,r2,r12 - eor r0,r0,r8,ror#19 @ Sigma1(e) - add r2,r2,r1 @ X[i] - ldr r12,[r14],#4 @ *K256++ - add r11,r11,r2 @ h+=X[i] - str r2,[sp,#8*4] - eor r2,r9,r10 - add r11,r11,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r8 - add r11,r11,r12 @ h+=K256[i] - eor r2,r2,r10 @ Ch(e,f,g) - eor r0,r4,r4,ror#11 - add r11,r11,r2 @ h+=Ch(e,f,g) -#if 24==31 - and r12,r12,#0xff - cmp r12,#0xf2 @ done? -#endif -#if 24<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r12,r4,r5 @ a^b, b^c in next round -#else - ldr r2,[sp,#10*4] @ from future BODY_16_xx - eor r12,r4,r5 @ a^b, b^c in next round - ldr r1,[sp,#7*4] @ from future BODY_16_xx -#endif - eor r0,r0,r4,ror#20 @ Sigma0(a) - and r3,r3,r12 @ (b^c)&=(a^b) - add r7,r7,r11 @ d+=h - eor r3,r3,r5 @ Maj(a,b,c) - add r11,r11,r0,ror#2 @ h+=Sigma0(a) - @ add r11,r11,r3 @ h+=Maj(a,b,c) - @ ldr r2,[sp,#10*4] @ 25 - @ ldr r1,[sp,#7*4] - mov r0,r2,ror#7 - add r11,r11,r3 @ h+=Maj(a,b,c) from the past - mov r3,r1,ror#17 - eor r0,r0,r2,ror#18 - eor r3,r3,r1,ror#19 - eor r0,r0,r2,lsr#3 @ sigma0(X[i+1]) - ldr r2,[sp,#9*4] - eor r3,r3,r1,lsr#10 @ sigma1(X[i+14]) - ldr r1,[sp,#2*4] - - add r3,r3,r0 - eor r0,r7,r7,ror#5 @ from BODY_00_15 - add r2,r2,r3 - eor r0,r0,r7,ror#19 @ Sigma1(e) - add r2,r2,r1 @ X[i] - ldr r3,[r14],#4 @ *K256++ - add r10,r10,r2 @ h+=X[i] - str r2,[sp,#9*4] - eor r2,r8,r9 - add r10,r10,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r7 - add r10,r10,r3 @ h+=K256[i] - eor r2,r2,r9 @ Ch(e,f,g) - eor r0,r11,r11,ror#11 - add r10,r10,r2 @ h+=Ch(e,f,g) -#if 25==31 - and r3,r3,#0xff - cmp r3,#0xf2 @ done? -#endif -#if 25<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r3,r11,r4 @ a^b, b^c in next round -#else - ldr r2,[sp,#11*4] @ from future BODY_16_xx - eor r3,r11,r4 @ a^b, b^c in next round - ldr r1,[sp,#8*4] @ from future BODY_16_xx -#endif - eor r0,r0,r11,ror#20 @ Sigma0(a) - and r12,r12,r3 @ (b^c)&=(a^b) - add r6,r6,r10 @ d+=h - eor r12,r12,r4 @ Maj(a,b,c) - add r10,r10,r0,ror#2 @ h+=Sigma0(a) - @ add r10,r10,r12 @ h+=Maj(a,b,c) - @ ldr r2,[sp,#11*4] @ 26 - @ ldr r1,[sp,#8*4] - mov r0,r2,ror#7 - add r10,r10,r12 @ h+=Maj(a,b,c) from the past - mov r12,r1,ror#17 - eor r0,r0,r2,ror#18 - eor r12,r12,r1,ror#19 - eor r0,r0,r2,lsr#3 @ sigma0(X[i+1]) - ldr r2,[sp,#10*4] - eor r12,r12,r1,lsr#10 @ sigma1(X[i+14]) - ldr r1,[sp,#3*4] - - add r12,r12,r0 - eor r0,r6,r6,ror#5 @ from BODY_00_15 - add r2,r2,r12 - eor r0,r0,r6,ror#19 @ Sigma1(e) - add r2,r2,r1 @ X[i] - ldr r12,[r14],#4 @ *K256++ - add r9,r9,r2 @ h+=X[i] - str r2,[sp,#10*4] - eor r2,r7,r8 - add r9,r9,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r6 - add r9,r9,r12 @ h+=K256[i] - eor r2,r2,r8 @ Ch(e,f,g) - eor r0,r10,r10,ror#11 - add r9,r9,r2 @ h+=Ch(e,f,g) -#if 26==31 - and r12,r12,#0xff - cmp r12,#0xf2 @ done? -#endif -#if 26<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r12,r10,r11 @ a^b, b^c in next round -#else - ldr r2,[sp,#12*4] @ from future BODY_16_xx - eor r12,r10,r11 @ a^b, b^c in next round - ldr r1,[sp,#9*4] @ from future BODY_16_xx -#endif - eor r0,r0,r10,ror#20 @ Sigma0(a) - and r3,r3,r12 @ (b^c)&=(a^b) - add r5,r5,r9 @ d+=h - eor r3,r3,r11 @ Maj(a,b,c) - add r9,r9,r0,ror#2 @ h+=Sigma0(a) - @ add r9,r9,r3 @ h+=Maj(a,b,c) - @ ldr r2,[sp,#12*4] @ 27 - @ ldr r1,[sp,#9*4] - mov r0,r2,ror#7 - add r9,r9,r3 @ h+=Maj(a,b,c) from the past - mov r3,r1,ror#17 - eor r0,r0,r2,ror#18 - eor r3,r3,r1,ror#19 - eor r0,r0,r2,lsr#3 @ sigma0(X[i+1]) - ldr r2,[sp,#11*4] - eor r3,r3,r1,lsr#10 @ sigma1(X[i+14]) - ldr r1,[sp,#4*4] - - add r3,r3,r0 - eor r0,r5,r5,ror#5 @ from BODY_00_15 - add r2,r2,r3 - eor r0,r0,r5,ror#19 @ Sigma1(e) - add r2,r2,r1 @ X[i] - ldr r3,[r14],#4 @ *K256++ - add r8,r8,r2 @ h+=X[i] - str r2,[sp,#11*4] - eor r2,r6,r7 - add r8,r8,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r5 - add r8,r8,r3 @ h+=K256[i] - eor r2,r2,r7 @ Ch(e,f,g) - eor r0,r9,r9,ror#11 - add r8,r8,r2 @ h+=Ch(e,f,g) -#if 27==31 - and r3,r3,#0xff - cmp r3,#0xf2 @ done? -#endif -#if 27<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r3,r9,r10 @ a^b, b^c in next round -#else - ldr r2,[sp,#13*4] @ from future BODY_16_xx - eor r3,r9,r10 @ a^b, b^c in next round - ldr r1,[sp,#10*4] @ from future BODY_16_xx -#endif - eor r0,r0,r9,ror#20 @ Sigma0(a) - and r12,r12,r3 @ (b^c)&=(a^b) - add r4,r4,r8 @ d+=h - eor r12,r12,r10 @ Maj(a,b,c) - add r8,r8,r0,ror#2 @ h+=Sigma0(a) - @ add r8,r8,r12 @ h+=Maj(a,b,c) - @ ldr r2,[sp,#13*4] @ 28 - @ ldr r1,[sp,#10*4] - mov r0,r2,ror#7 - add r8,r8,r12 @ h+=Maj(a,b,c) from the past - mov r12,r1,ror#17 - eor r0,r0,r2,ror#18 - eor r12,r12,r1,ror#19 - eor r0,r0,r2,lsr#3 @ sigma0(X[i+1]) - ldr r2,[sp,#12*4] - eor r12,r12,r1,lsr#10 @ sigma1(X[i+14]) - ldr r1,[sp,#5*4] - - add r12,r12,r0 - eor r0,r4,r4,ror#5 @ from BODY_00_15 - add r2,r2,r12 - eor r0,r0,r4,ror#19 @ Sigma1(e) - add r2,r2,r1 @ X[i] - ldr r12,[r14],#4 @ *K256++ - add r7,r7,r2 @ h+=X[i] - str r2,[sp,#12*4] - eor r2,r5,r6 - add r7,r7,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r4 - add r7,r7,r12 @ h+=K256[i] - eor r2,r2,r6 @ Ch(e,f,g) - eor r0,r8,r8,ror#11 - add r7,r7,r2 @ h+=Ch(e,f,g) -#if 28==31 - and r12,r12,#0xff - cmp r12,#0xf2 @ done? -#endif -#if 28<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r12,r8,r9 @ a^b, b^c in next round -#else - ldr r2,[sp,#14*4] @ from future BODY_16_xx - eor r12,r8,r9 @ a^b, b^c in next round - ldr r1,[sp,#11*4] @ from future BODY_16_xx -#endif - eor r0,r0,r8,ror#20 @ Sigma0(a) - and r3,r3,r12 @ (b^c)&=(a^b) - add r11,r11,r7 @ d+=h - eor r3,r3,r9 @ Maj(a,b,c) - add r7,r7,r0,ror#2 @ h+=Sigma0(a) - @ add r7,r7,r3 @ h+=Maj(a,b,c) - @ ldr r2,[sp,#14*4] @ 29 - @ ldr r1,[sp,#11*4] - mov r0,r2,ror#7 - add r7,r7,r3 @ h+=Maj(a,b,c) from the past - mov r3,r1,ror#17 - eor r0,r0,r2,ror#18 - eor r3,r3,r1,ror#19 - eor r0,r0,r2,lsr#3 @ sigma0(X[i+1]) - ldr r2,[sp,#13*4] - eor r3,r3,r1,lsr#10 @ sigma1(X[i+14]) - ldr r1,[sp,#6*4] - - add r3,r3,r0 - eor r0,r11,r11,ror#5 @ from BODY_00_15 - add r2,r2,r3 - eor r0,r0,r11,ror#19 @ Sigma1(e) - add r2,r2,r1 @ X[i] - ldr r3,[r14],#4 @ *K256++ - add r6,r6,r2 @ h+=X[i] - str r2,[sp,#13*4] - eor r2,r4,r5 - add r6,r6,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r11 - add r6,r6,r3 @ h+=K256[i] - eor r2,r2,r5 @ Ch(e,f,g) - eor r0,r7,r7,ror#11 - add r6,r6,r2 @ h+=Ch(e,f,g) -#if 29==31 - and r3,r3,#0xff - cmp r3,#0xf2 @ done? -#endif -#if 29<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r3,r7,r8 @ a^b, b^c in next round -#else - ldr r2,[sp,#15*4] @ from future BODY_16_xx - eor r3,r7,r8 @ a^b, b^c in next round - ldr r1,[sp,#12*4] @ from future BODY_16_xx -#endif - eor r0,r0,r7,ror#20 @ Sigma0(a) - and r12,r12,r3 @ (b^c)&=(a^b) - add r10,r10,r6 @ d+=h - eor r12,r12,r8 @ Maj(a,b,c) - add r6,r6,r0,ror#2 @ h+=Sigma0(a) - @ add r6,r6,r12 @ h+=Maj(a,b,c) - @ ldr r2,[sp,#15*4] @ 30 - @ ldr r1,[sp,#12*4] - mov r0,r2,ror#7 - add r6,r6,r12 @ h+=Maj(a,b,c) from the past - mov r12,r1,ror#17 - eor r0,r0,r2,ror#18 - eor r12,r12,r1,ror#19 - eor r0,r0,r2,lsr#3 @ sigma0(X[i+1]) - ldr r2,[sp,#14*4] - eor r12,r12,r1,lsr#10 @ sigma1(X[i+14]) - ldr r1,[sp,#7*4] - - add r12,r12,r0 - eor r0,r10,r10,ror#5 @ from BODY_00_15 - add r2,r2,r12 - eor r0,r0,r10,ror#19 @ Sigma1(e) - add r2,r2,r1 @ X[i] - ldr r12,[r14],#4 @ *K256++ - add r5,r5,r2 @ h+=X[i] - str r2,[sp,#14*4] - eor r2,r11,r4 - add r5,r5,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r10 - add r5,r5,r12 @ h+=K256[i] - eor r2,r2,r4 @ Ch(e,f,g) - eor r0,r6,r6,ror#11 - add r5,r5,r2 @ h+=Ch(e,f,g) -#if 30==31 - and r12,r12,#0xff - cmp r12,#0xf2 @ done? -#endif -#if 30<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r12,r6,r7 @ a^b, b^c in next round -#else - ldr r2,[sp,#0*4] @ from future BODY_16_xx - eor r12,r6,r7 @ a^b, b^c in next round - ldr r1,[sp,#13*4] @ from future BODY_16_xx -#endif - eor r0,r0,r6,ror#20 @ Sigma0(a) - and r3,r3,r12 @ (b^c)&=(a^b) - add r9,r9,r5 @ d+=h - eor r3,r3,r7 @ Maj(a,b,c) - add r5,r5,r0,ror#2 @ h+=Sigma0(a) - @ add r5,r5,r3 @ h+=Maj(a,b,c) - @ ldr r2,[sp,#0*4] @ 31 - @ ldr r1,[sp,#13*4] - mov r0,r2,ror#7 - add r5,r5,r3 @ h+=Maj(a,b,c) from the past - mov r3,r1,ror#17 - eor r0,r0,r2,ror#18 - eor r3,r3,r1,ror#19 - eor r0,r0,r2,lsr#3 @ sigma0(X[i+1]) - ldr r2,[sp,#15*4] - eor r3,r3,r1,lsr#10 @ sigma1(X[i+14]) - ldr r1,[sp,#8*4] - - add r3,r3,r0 - eor r0,r9,r9,ror#5 @ from BODY_00_15 - add r2,r2,r3 - eor r0,r0,r9,ror#19 @ Sigma1(e) - add r2,r2,r1 @ X[i] - ldr r3,[r14],#4 @ *K256++ - add r4,r4,r2 @ h+=X[i] - str r2,[sp,#15*4] - eor r2,r10,r11 - add r4,r4,r0,ror#6 @ h+=Sigma1(e) - and r2,r2,r9 - add r4,r4,r3 @ h+=K256[i] - eor r2,r2,r11 @ Ch(e,f,g) - eor r0,r5,r5,ror#11 - add r4,r4,r2 @ h+=Ch(e,f,g) -#if 31==31 - and r3,r3,#0xff - cmp r3,#0xf2 @ done? -#endif -#if 31<15 -# if __ARM_ARCH__>=7 - ldr r2,[r1],#4 @ prefetch -# else - ldrb r2,[r1,#3] -# endif - eor r3,r5,r6 @ a^b, b^c in next round -#else - ldr r2,[sp,#1*4] @ from future BODY_16_xx - eor r3,r5,r6 @ a^b, b^c in next round - ldr r1,[sp,#14*4] @ from future BODY_16_xx -#endif - eor r0,r0,r5,ror#20 @ Sigma0(a) - and r12,r12,r3 @ (b^c)&=(a^b) - add r8,r8,r4 @ d+=h - eor r12,r12,r6 @ Maj(a,b,c) - add r4,r4,r0,ror#2 @ h+=Sigma0(a) - @ add r4,r4,r12 @ h+=Maj(a,b,c) -#if __ARM_ARCH__>=7 - ite eq @ Thumb2 thing, sanity check in ARM -#endif - ldreq r3,[sp,#16*4] @ pull ctx - bne .Lrounds_16_xx - - add r4,r4,r12 @ h+=Maj(a,b,c) from the past - ldr r0,[r3,#0] - ldr r2,[r3,#4] - ldr r12,[r3,#8] - add r4,r4,r0 - ldr r0,[r3,#12] - add r5,r5,r2 - ldr r2,[r3,#16] - add r6,r6,r12 - ldr r12,[r3,#20] - add r7,r7,r0 - ldr r0,[r3,#24] - add r8,r8,r2 - ldr r2,[r3,#28] - add r9,r9,r12 - ldr r1,[sp,#17*4] @ pull inp - ldr r12,[sp,#18*4] @ pull inp+len - add r10,r10,r0 - add r11,r11,r2 - stmia r3,{r4,r5,r6,r7,r8,r9,r10,r11} - cmp r1,r12 - sub r14,r14,#256 @ rewind Ktbl - bne .Loop - - add sp,sp,#19*4 @ destroy frame -#if __ARM_ARCH__>=5 - ldmia sp!,{r4-r11,pc} -#else - ldmia sp!,{r4-r11,lr} - tst lr,#1 - moveq pc,lr @ be binary compatible with V4, yet - .word 0xe12fff1e @ interoperable with Thumb ISA:-) -#endif -.size sha256_block_data_order,.-sha256_block_data_order -#if __ARM_MAX_ARCH__>=7 -.arch armv7-a -.fpu neon - -.global sha256_block_data_order_neon -.type sha256_block_data_order_neon,%function -.align 4 -sha256_block_data_order_neon: -.LNEON: - stmdb sp!,{r4-r12,lr} - - sub r11,sp,#16*4+16 - adrl r14,K256 - bic r11,r11,#15 @ align for 128-bit stores - mov r12,sp - mov sp,r11 @ alloca - add r2,r1,r2,lsl#6 @ len to point at the end of inp - - vld1.8 {q0},[r1]! - vld1.8 {q1},[r1]! - vld1.8 {q2},[r1]! - vld1.8 {q3},[r1]! - vld1.32 {q8},[r14,:128]! - vld1.32 {q9},[r14,:128]! - vld1.32 {q10},[r14,:128]! - vld1.32 {q11},[r14,:128]! - vrev32.8 q0,q0 @ yes, even on - str r0,[sp,#64] - vrev32.8 q1,q1 @ big-endian - str r1,[sp,#68] - mov r1,sp - vrev32.8 q2,q2 - str r2,[sp,#72] - vrev32.8 q3,q3 - str r12,[sp,#76] @ save original sp - vadd.i32 q8,q8,q0 - vadd.i32 q9,q9,q1 - vst1.32 {q8},[r1,:128]! - vadd.i32 q10,q10,q2 - vst1.32 {q9},[r1,:128]! - vadd.i32 q11,q11,q3 - vst1.32 {q10},[r1,:128]! - vst1.32 {q11},[r1,:128]! - - ldmia r0,{r4-r11} - sub r1,r1,#64 - ldr r2,[sp,#0] - eor r12,r12,r12 - eor r3,r5,r6 - b .L_00_48 - -.align 4 -.L_00_48: - vext.8 q8,q0,q1,#4 - add r11,r11,r2 - eor r2,r9,r10 - eor r0,r8,r8,ror#5 - vext.8 q9,q2,q3,#4 - add r4,r4,r12 - and r2,r2,r8 - eor r12,r0,r8,ror#19 - vshr.u32 q10,q8,#7 - eor r0,r4,r4,ror#11 - eor r2,r2,r10 - vadd.i32 q0,q0,q9 - add r11,r11,r12,ror#6 - eor r12,r4,r5 - vshr.u32 q9,q8,#3 - eor r0,r0,r4,ror#20 - add r11,r11,r2 - vsli.32 q10,q8,#25 - ldr r2,[sp,#4] - and r3,r3,r12 - vshr.u32 q11,q8,#18 - add r7,r7,r11 - add r11,r11,r0,ror#2 - eor r3,r3,r5 - veor q9,q9,q10 - add r10,r10,r2 - vsli.32 q11,q8,#14 - eor r2,r8,r9 - eor r0,r7,r7,ror#5 - vshr.u32 d24,d7,#17 - add r11,r11,r3 - and r2,r2,r7 - veor q9,q9,q11 - eor r3,r0,r7,ror#19 - eor r0,r11,r11,ror#11 - vsli.32 d24,d7,#15 - eor r2,r2,r9 - add r10,r10,r3,ror#6 - vshr.u32 d25,d7,#10 - eor r3,r11,r4 - eor r0,r0,r11,ror#20 - vadd.i32 q0,q0,q9 - add r10,r10,r2 - ldr r2,[sp,#8] - veor d25,d25,d24 - and r12,r12,r3 - add r6,r6,r10 - vshr.u32 d24,d7,#19 - add r10,r10,r0,ror#2 - eor r12,r12,r4 - vsli.32 d24,d7,#13 - add r9,r9,r2 - eor r2,r7,r8 - veor d25,d25,d24 - eor r0,r6,r6,ror#5 - add r10,r10,r12 - vadd.i32 d0,d0,d25 - and r2,r2,r6 - eor r12,r0,r6,ror#19 - vshr.u32 d24,d0,#17 - eor r0,r10,r10,ror#11 - eor r2,r2,r8 - vsli.32 d24,d0,#15 - add r9,r9,r12,ror#6 - eor r12,r10,r11 - vshr.u32 d25,d0,#10 - eor r0,r0,r10,ror#20 - add r9,r9,r2 - veor d25,d25,d24 - ldr r2,[sp,#12] - and r3,r3,r12 - vshr.u32 d24,d0,#19 - add r5,r5,r9 - add r9,r9,r0,ror#2 - eor r3,r3,r11 - vld1.32 {q8},[r14,:128]! - add r8,r8,r2 - vsli.32 d24,d0,#13 - eor r2,r6,r7 - eor r0,r5,r5,ror#5 - veor d25,d25,d24 - add r9,r9,r3 - and r2,r2,r5 - vadd.i32 d1,d1,d25 - eor r3,r0,r5,ror#19 - eor r0,r9,r9,ror#11 - vadd.i32 q8,q8,q0 - eor r2,r2,r7 - add r8,r8,r3,ror#6 - eor r3,r9,r10 - eor r0,r0,r9,ror#20 - add r8,r8,r2 - ldr r2,[sp,#16] - and r12,r12,r3 - add r4,r4,r8 - vst1.32 {q8},[r1,:128]! - add r8,r8,r0,ror#2 - eor r12,r12,r10 - vext.8 q8,q1,q2,#4 - add r7,r7,r2 - eor r2,r5,r6 - eor r0,r4,r4,ror#5 - vext.8 q9,q3,q0,#4 - add r8,r8,r12 - and r2,r2,r4 - eor r12,r0,r4,ror#19 - vshr.u32 q10,q8,#7 - eor r0,r8,r8,ror#11 - eor r2,r2,r6 - vadd.i32 q1,q1,q9 - add r7,r7,r12,ror#6 - eor r12,r8,r9 - vshr.u32 q9,q8,#3 - eor r0,r0,r8,ror#20 - add r7,r7,r2 - vsli.32 q10,q8,#25 - ldr r2,[sp,#20] - and r3,r3,r12 - vshr.u32 q11,q8,#18 - add r11,r11,r7 - add r7,r7,r0,ror#2 - eor r3,r3,r9 - veor q9,q9,q10 - add r6,r6,r2 - vsli.32 q11,q8,#14 - eor r2,r4,r5 - eor r0,r11,r11,ror#5 - vshr.u32 d24,d1,#17 - add r7,r7,r3 - and r2,r2,r11 - veor q9,q9,q11 - eor r3,r0,r11,ror#19 - eor r0,r7,r7,ror#11 - vsli.32 d24,d1,#15 - eor r2,r2,r5 - add r6,r6,r3,ror#6 - vshr.u32 d25,d1,#10 - eor r3,r7,r8 - eor r0,r0,r7,ror#20 - vadd.i32 q1,q1,q9 - add r6,r6,r2 - ldr r2,[sp,#24] - veor d25,d25,d24 - and r12,r12,r3 - add r10,r10,r6 - vshr.u32 d24,d1,#19 - add r6,r6,r0,ror#2 - eor r12,r12,r8 - vsli.32 d24,d1,#13 - add r5,r5,r2 - eor r2,r11,r4 - veor d25,d25,d24 - eor r0,r10,r10,ror#5 - add r6,r6,r12 - vadd.i32 d2,d2,d25 - and r2,r2,r10 - eor r12,r0,r10,ror#19 - vshr.u32 d24,d2,#17 - eor r0,r6,r6,ror#11 - eor r2,r2,r4 - vsli.32 d24,d2,#15 - add r5,r5,r12,ror#6 - eor r12,r6,r7 - vshr.u32 d25,d2,#10 - eor r0,r0,r6,ror#20 - add r5,r5,r2 - veor d25,d25,d24 - ldr r2,[sp,#28] - and r3,r3,r12 - vshr.u32 d24,d2,#19 - add r9,r9,r5 - add r5,r5,r0,ror#2 - eor r3,r3,r7 - vld1.32 {q8},[r14,:128]! - add r4,r4,r2 - vsli.32 d24,d2,#13 - eor r2,r10,r11 - eor r0,r9,r9,ror#5 - veor d25,d25,d24 - add r5,r5,r3 - and r2,r2,r9 - vadd.i32 d3,d3,d25 - eor r3,r0,r9,ror#19 - eor r0,r5,r5,ror#11 - vadd.i32 q8,q8,q1 - eor r2,r2,r11 - add r4,r4,r3,ror#6 - eor r3,r5,r6 - eor r0,r0,r5,ror#20 - add r4,r4,r2 - ldr r2,[sp,#32] - and r12,r12,r3 - add r8,r8,r4 - vst1.32 {q8},[r1,:128]! - add r4,r4,r0,ror#2 - eor r12,r12,r6 - vext.8 q8,q2,q3,#4 - add r11,r11,r2 - eor r2,r9,r10 - eor r0,r8,r8,ror#5 - vext.8 q9,q0,q1,#4 - add r4,r4,r12 - and r2,r2,r8 - eor r12,r0,r8,ror#19 - vshr.u32 q10,q8,#7 - eor r0,r4,r4,ror#11 - eor r2,r2,r10 - vadd.i32 q2,q2,q9 - add r11,r11,r12,ror#6 - eor r12,r4,r5 - vshr.u32 q9,q8,#3 - eor r0,r0,r4,ror#20 - add r11,r11,r2 - vsli.32 q10,q8,#25 - ldr r2,[sp,#36] - and r3,r3,r12 - vshr.u32 q11,q8,#18 - add r7,r7,r11 - add r11,r11,r0,ror#2 - eor r3,r3,r5 - veor q9,q9,q10 - add r10,r10,r2 - vsli.32 q11,q8,#14 - eor r2,r8,r9 - eor r0,r7,r7,ror#5 - vshr.u32 d24,d3,#17 - add r11,r11,r3 - and r2,r2,r7 - veor q9,q9,q11 - eor r3,r0,r7,ror#19 - eor r0,r11,r11,ror#11 - vsli.32 d24,d3,#15 - eor r2,r2,r9 - add r10,r10,r3,ror#6 - vshr.u32 d25,d3,#10 - eor r3,r11,r4 - eor r0,r0,r11,ror#20 - vadd.i32 q2,q2,q9 - add r10,r10,r2 - ldr r2,[sp,#40] - veor d25,d25,d24 - and r12,r12,r3 - add r6,r6,r10 - vshr.u32 d24,d3,#19 - add r10,r10,r0,ror#2 - eor r12,r12,r4 - vsli.32 d24,d3,#13 - add r9,r9,r2 - eor r2,r7,r8 - veor d25,d25,d24 - eor r0,r6,r6,ror#5 - add r10,r10,r12 - vadd.i32 d4,d4,d25 - and r2,r2,r6 - eor r12,r0,r6,ror#19 - vshr.u32 d24,d4,#17 - eor r0,r10,r10,ror#11 - eor r2,r2,r8 - vsli.32 d24,d4,#15 - add r9,r9,r12,ror#6 - eor r12,r10,r11 - vshr.u32 d25,d4,#10 - eor r0,r0,r10,ror#20 - add r9,r9,r2 - veor d25,d25,d24 - ldr r2,[sp,#44] - and r3,r3,r12 - vshr.u32 d24,d4,#19 - add r5,r5,r9 - add r9,r9,r0,ror#2 - eor r3,r3,r11 - vld1.32 {q8},[r14,:128]! - add r8,r8,r2 - vsli.32 d24,d4,#13 - eor r2,r6,r7 - eor r0,r5,r5,ror#5 - veor d25,d25,d24 - add r9,r9,r3 - and r2,r2,r5 - vadd.i32 d5,d5,d25 - eor r3,r0,r5,ror#19 - eor r0,r9,r9,ror#11 - vadd.i32 q8,q8,q2 - eor r2,r2,r7 - add r8,r8,r3,ror#6 - eor r3,r9,r10 - eor r0,r0,r9,ror#20 - add r8,r8,r2 - ldr r2,[sp,#48] - and r12,r12,r3 - add r4,r4,r8 - vst1.32 {q8},[r1,:128]! - add r8,r8,r0,ror#2 - eor r12,r12,r10 - vext.8 q8,q3,q0,#4 - add r7,r7,r2 - eor r2,r5,r6 - eor r0,r4,r4,ror#5 - vext.8 q9,q1,q2,#4 - add r8,r8,r12 - and r2,r2,r4 - eor r12,r0,r4,ror#19 - vshr.u32 q10,q8,#7 - eor r0,r8,r8,ror#11 - eor r2,r2,r6 - vadd.i32 q3,q3,q9 - add r7,r7,r12,ror#6 - eor r12,r8,r9 - vshr.u32 q9,q8,#3 - eor r0,r0,r8,ror#20 - add r7,r7,r2 - vsli.32 q10,q8,#25 - ldr r2,[sp,#52] - and r3,r3,r12 - vshr.u32 q11,q8,#18 - add r11,r11,r7 - add r7,r7,r0,ror#2 - eor r3,r3,r9 - veor q9,q9,q10 - add r6,r6,r2 - vsli.32 q11,q8,#14 - eor r2,r4,r5 - eor r0,r11,r11,ror#5 - vshr.u32 d24,d5,#17 - add r7,r7,r3 - and r2,r2,r11 - veor q9,q9,q11 - eor r3,r0,r11,ror#19 - eor r0,r7,r7,ror#11 - vsli.32 d24,d5,#15 - eor r2,r2,r5 - add r6,r6,r3,ror#6 - vshr.u32 d25,d5,#10 - eor r3,r7,r8 - eor r0,r0,r7,ror#20 - vadd.i32 q3,q3,q9 - add r6,r6,r2 - ldr r2,[sp,#56] - veor d25,d25,d24 - and r12,r12,r3 - add r10,r10,r6 - vshr.u32 d24,d5,#19 - add r6,r6,r0,ror#2 - eor r12,r12,r8 - vsli.32 d24,d5,#13 - add r5,r5,r2 - eor r2,r11,r4 - veor d25,d25,d24 - eor r0,r10,r10,ror#5 - add r6,r6,r12 - vadd.i32 d6,d6,d25 - and r2,r2,r10 - eor r12,r0,r10,ror#19 - vshr.u32 d24,d6,#17 - eor r0,r6,r6,ror#11 - eor r2,r2,r4 - vsli.32 d24,d6,#15 - add r5,r5,r12,ror#6 - eor r12,r6,r7 - vshr.u32 d25,d6,#10 - eor r0,r0,r6,ror#20 - add r5,r5,r2 - veor d25,d25,d24 - ldr r2,[sp,#60] - and r3,r3,r12 - vshr.u32 d24,d6,#19 - add r9,r9,r5 - add r5,r5,r0,ror#2 - eor r3,r3,r7 - vld1.32 {q8},[r14,:128]! - add r4,r4,r2 - vsli.32 d24,d6,#13 - eor r2,r10,r11 - eor r0,r9,r9,ror#5 - veor d25,d25,d24 - add r5,r5,r3 - and r2,r2,r9 - vadd.i32 d7,d7,d25 - eor r3,r0,r9,ror#19 - eor r0,r5,r5,ror#11 - vadd.i32 q8,q8,q3 - eor r2,r2,r11 - add r4,r4,r3,ror#6 - eor r3,r5,r6 - eor r0,r0,r5,ror#20 - add r4,r4,r2 - ldr r2,[r14] - and r12,r12,r3 - add r8,r8,r4 - vst1.32 {q8},[r1,:128]! - add r4,r4,r0,ror#2 - eor r12,r12,r6 - teq r2,#0 @ check for K256 terminator - ldr r2,[sp,#0] - sub r1,r1,#64 - bne .L_00_48 - - ldr r1,[sp,#68] - ldr r0,[sp,#72] - sub r14,r14,#256 @ rewind r14 - teq r1,r0 - it eq - subeq r1,r1,#64 @ avoid SEGV - vld1.8 {q0},[r1]! @ load next input block - vld1.8 {q1},[r1]! - vld1.8 {q2},[r1]! - vld1.8 {q3},[r1]! - it ne - strne r1,[sp,#68] - mov r1,sp - add r11,r11,r2 - eor r2,r9,r10 - eor r0,r8,r8,ror#5 - add r4,r4,r12 - vld1.32 {q8},[r14,:128]! - and r2,r2,r8 - eor r12,r0,r8,ror#19 - eor r0,r4,r4,ror#11 - eor r2,r2,r10 - vrev32.8 q0,q0 - add r11,r11,r12,ror#6 - eor r12,r4,r5 - eor r0,r0,r4,ror#20 - add r11,r11,r2 - vadd.i32 q8,q8,q0 - ldr r2,[sp,#4] - and r3,r3,r12 - add r7,r7,r11 - add r11,r11,r0,ror#2 - eor r3,r3,r5 - add r10,r10,r2 - eor r2,r8,r9 - eor r0,r7,r7,ror#5 - add r11,r11,r3 - and r2,r2,r7 - eor r3,r0,r7,ror#19 - eor r0,r11,r11,ror#11 - eor r2,r2,r9 - add r10,r10,r3,ror#6 - eor r3,r11,r4 - eor r0,r0,r11,ror#20 - add r10,r10,r2 - ldr r2,[sp,#8] - and r12,r12,r3 - add r6,r6,r10 - add r10,r10,r0,ror#2 - eor r12,r12,r4 - add r9,r9,r2 - eor r2,r7,r8 - eor r0,r6,r6,ror#5 - add r10,r10,r12 - and r2,r2,r6 - eor r12,r0,r6,ror#19 - eor r0,r10,r10,ror#11 - eor r2,r2,r8 - add r9,r9,r12,ror#6 - eor r12,r10,r11 - eor r0,r0,r10,ror#20 - add r9,r9,r2 - ldr r2,[sp,#12] - and r3,r3,r12 - add r5,r5,r9 - add r9,r9,r0,ror#2 - eor r3,r3,r11 - add r8,r8,r2 - eor r2,r6,r7 - eor r0,r5,r5,ror#5 - add r9,r9,r3 - and r2,r2,r5 - eor r3,r0,r5,ror#19 - eor r0,r9,r9,ror#11 - eor r2,r2,r7 - add r8,r8,r3,ror#6 - eor r3,r9,r10 - eor r0,r0,r9,ror#20 - add r8,r8,r2 - ldr r2,[sp,#16] - and r12,r12,r3 - add r4,r4,r8 - add r8,r8,r0,ror#2 - eor r12,r12,r10 - vst1.32 {q8},[r1,:128]! - add r7,r7,r2 - eor r2,r5,r6 - eor r0,r4,r4,ror#5 - add r8,r8,r12 - vld1.32 {q8},[r14,:128]! - and r2,r2,r4 - eor r12,r0,r4,ror#19 - eor r0,r8,r8,ror#11 - eor r2,r2,r6 - vrev32.8 q1,q1 - add r7,r7,r12,ror#6 - eor r12,r8,r9 - eor r0,r0,r8,ror#20 - add r7,r7,r2 - vadd.i32 q8,q8,q1 - ldr r2,[sp,#20] - and r3,r3,r12 - add r11,r11,r7 - add r7,r7,r0,ror#2 - eor r3,r3,r9 - add r6,r6,r2 - eor r2,r4,r5 - eor r0,r11,r11,ror#5 - add r7,r7,r3 - and r2,r2,r11 - eor r3,r0,r11,ror#19 - eor r0,r7,r7,ror#11 - eor r2,r2,r5 - add r6,r6,r3,ror#6 - eor r3,r7,r8 - eor r0,r0,r7,ror#20 - add r6,r6,r2 - ldr r2,[sp,#24] - and r12,r12,r3 - add r10,r10,r6 - add r6,r6,r0,ror#2 - eor r12,r12,r8 - add r5,r5,r2 - eor r2,r11,r4 - eor r0,r10,r10,ror#5 - add r6,r6,r12 - and r2,r2,r10 - eor r12,r0,r10,ror#19 - eor r0,r6,r6,ror#11 - eor r2,r2,r4 - add r5,r5,r12,ror#6 - eor r12,r6,r7 - eor r0,r0,r6,ror#20 - add r5,r5,r2 - ldr r2,[sp,#28] - and r3,r3,r12 - add r9,r9,r5 - add r5,r5,r0,ror#2 - eor r3,r3,r7 - add r4,r4,r2 - eor r2,r10,r11 - eor r0,r9,r9,ror#5 - add r5,r5,r3 - and r2,r2,r9 - eor r3,r0,r9,ror#19 - eor r0,r5,r5,ror#11 - eor r2,r2,r11 - add r4,r4,r3,ror#6 - eor r3,r5,r6 - eor r0,r0,r5,ror#20 - add r4,r4,r2 - ldr r2,[sp,#32] - and r12,r12,r3 - add r8,r8,r4 - add r4,r4,r0,ror#2 - eor r12,r12,r6 - vst1.32 {q8},[r1,:128]! - add r11,r11,r2 - eor r2,r9,r10 - eor r0,r8,r8,ror#5 - add r4,r4,r12 - vld1.32 {q8},[r14,:128]! - and r2,r2,r8 - eor r12,r0,r8,ror#19 - eor r0,r4,r4,ror#11 - eor r2,r2,r10 - vrev32.8 q2,q2 - add r11,r11,r12,ror#6 - eor r12,r4,r5 - eor r0,r0,r4,ror#20 - add r11,r11,r2 - vadd.i32 q8,q8,q2 - ldr r2,[sp,#36] - and r3,r3,r12 - add r7,r7,r11 - add r11,r11,r0,ror#2 - eor r3,r3,r5 - add r10,r10,r2 - eor r2,r8,r9 - eor r0,r7,r7,ror#5 - add r11,r11,r3 - and r2,r2,r7 - eor r3,r0,r7,ror#19 - eor r0,r11,r11,ror#11 - eor r2,r2,r9 - add r10,r10,r3,ror#6 - eor r3,r11,r4 - eor r0,r0,r11,ror#20 - add r10,r10,r2 - ldr r2,[sp,#40] - and r12,r12,r3 - add r6,r6,r10 - add r10,r10,r0,ror#2 - eor r12,r12,r4 - add r9,r9,r2 - eor r2,r7,r8 - eor r0,r6,r6,ror#5 - add r10,r10,r12 - and r2,r2,r6 - eor r12,r0,r6,ror#19 - eor r0,r10,r10,ror#11 - eor r2,r2,r8 - add r9,r9,r12,ror#6 - eor r12,r10,r11 - eor r0,r0,r10,ror#20 - add r9,r9,r2 - ldr r2,[sp,#44] - and r3,r3,r12 - add r5,r5,r9 - add r9,r9,r0,ror#2 - eor r3,r3,r11 - add r8,r8,r2 - eor r2,r6,r7 - eor r0,r5,r5,ror#5 - add r9,r9,r3 - and r2,r2,r5 - eor r3,r0,r5,ror#19 - eor r0,r9,r9,ror#11 - eor r2,r2,r7 - add r8,r8,r3,ror#6 - eor r3,r9,r10 - eor r0,r0,r9,ror#20 - add r8,r8,r2 - ldr r2,[sp,#48] - and r12,r12,r3 - add r4,r4,r8 - add r8,r8,r0,ror#2 - eor r12,r12,r10 - vst1.32 {q8},[r1,:128]! - add r7,r7,r2 - eor r2,r5,r6 - eor r0,r4,r4,ror#5 - add r8,r8,r12 - vld1.32 {q8},[r14,:128]! - and r2,r2,r4 - eor r12,r0,r4,ror#19 - eor r0,r8,r8,ror#11 - eor r2,r2,r6 - vrev32.8 q3,q3 - add r7,r7,r12,ror#6 - eor r12,r8,r9 - eor r0,r0,r8,ror#20 - add r7,r7,r2 - vadd.i32 q8,q8,q3 - ldr r2,[sp,#52] - and r3,r3,r12 - add r11,r11,r7 - add r7,r7,r0,ror#2 - eor r3,r3,r9 - add r6,r6,r2 - eor r2,r4,r5 - eor r0,r11,r11,ror#5 - add r7,r7,r3 - and r2,r2,r11 - eor r3,r0,r11,ror#19 - eor r0,r7,r7,ror#11 - eor r2,r2,r5 - add r6,r6,r3,ror#6 - eor r3,r7,r8 - eor r0,r0,r7,ror#20 - add r6,r6,r2 - ldr r2,[sp,#56] - and r12,r12,r3 - add r10,r10,r6 - add r6,r6,r0,ror#2 - eor r12,r12,r8 - add r5,r5,r2 - eor r2,r11,r4 - eor r0,r10,r10,ror#5 - add r6,r6,r12 - and r2,r2,r10 - eor r12,r0,r10,ror#19 - eor r0,r6,r6,ror#11 - eor r2,r2,r4 - add r5,r5,r12,ror#6 - eor r12,r6,r7 - eor r0,r0,r6,ror#20 - add r5,r5,r2 - ldr r2,[sp,#60] - and r3,r3,r12 - add r9,r9,r5 - add r5,r5,r0,ror#2 - eor r3,r3,r7 - add r4,r4,r2 - eor r2,r10,r11 - eor r0,r9,r9,ror#5 - add r5,r5,r3 - and r2,r2,r9 - eor r3,r0,r9,ror#19 - eor r0,r5,r5,ror#11 - eor r2,r2,r11 - add r4,r4,r3,ror#6 - eor r3,r5,r6 - eor r0,r0,r5,ror#20 - add r4,r4,r2 - ldr r2,[sp,#64] - and r12,r12,r3 - add r8,r8,r4 - add r4,r4,r0,ror#2 - eor r12,r12,r6 - vst1.32 {q8},[r1,:128]! - ldr r0,[r2,#0] - add r4,r4,r12 @ h+=Maj(a,b,c) from the past - ldr r12,[r2,#4] - ldr r3,[r2,#8] - ldr r1,[r2,#12] - add r4,r4,r0 @ accumulate - ldr r0,[r2,#16] - add r5,r5,r12 - ldr r12,[r2,#20] - add r6,r6,r3 - ldr r3,[r2,#24] - add r7,r7,r1 - ldr r1,[r2,#28] - add r8,r8,r0 - str r4,[r2],#4 - add r9,r9,r12 - str r5,[r2],#4 - add r10,r10,r3 - str r6,[r2],#4 - add r11,r11,r1 - str r7,[r2],#4 - stmia r2,{r8-r11} - - ittte ne - movne r1,sp - ldrne r2,[sp,#0] - eorne r12,r12,r12 - ldreq sp,[sp,#76] @ restore original sp - itt ne - eorne r3,r5,r6 - bne .L_00_48 - - ldmia sp!,{r4-r12,pc} -.size sha256_block_data_order_neon,.-sha256_block_data_order_neon -#endif -#if __ARM_MAX_ARCH__>=7 && !defined(__KERNEL__) - -# ifdef __thumb2__ -# define INST(a,b,c,d) .byte c,d|0xc,a,b -# else -# define INST(a,b,c,d) .byte a,b,c,d -# endif - -.type sha256_block_data_order_armv8,%function -.align 5 -sha256_block_data_order_armv8: -.LARMv8: - vld1.32 {q0,q1},[r0] -# ifdef __thumb2__ - adr r3,.LARMv8 - sub r3,r3,#.LARMv8-K256 -# else - adrl r3,K256 -# endif - add r2,r1,r2,lsl#6 @ len to point at the end of inp - -.Loop_v8: - vld1.8 {q8-q9},[r1]! - vld1.8 {q10-q11},[r1]! - vld1.32 {q12},[r3]! - vrev32.8 q8,q8 - vrev32.8 q9,q9 - vrev32.8 q10,q10 - vrev32.8 q11,q11 - vmov q14,q0 @ offload - vmov q15,q1 - teq r1,r2 - vld1.32 {q13},[r3]! - vadd.i32 q12,q12,q8 - INST(0xe2,0x03,0xfa,0xf3) @ sha256su0 q8,q9 - vmov q2,q0 - INST(0x68,0x0c,0x02,0xf3) @ sha256h q0,q1,q12 - INST(0x68,0x2c,0x14,0xf3) @ sha256h2 q1,q2,q12 - INST(0xe6,0x0c,0x64,0xf3) @ sha256su1 q8,q10,q11 - vld1.32 {q12},[r3]! - vadd.i32 q13,q13,q9 - INST(0xe4,0x23,0xfa,0xf3) @ sha256su0 q9,q10 - vmov q2,q0 - INST(0x6a,0x0c,0x02,0xf3) @ sha256h q0,q1,q13 - INST(0x6a,0x2c,0x14,0xf3) @ sha256h2 q1,q2,q13 - INST(0xe0,0x2c,0x66,0xf3) @ sha256su1 q9,q11,q8 - vld1.32 {q13},[r3]! - vadd.i32 q12,q12,q10 - INST(0xe6,0x43,0xfa,0xf3) @ sha256su0 q10,q11 - vmov q2,q0 - INST(0x68,0x0c,0x02,0xf3) @ sha256h q0,q1,q12 - INST(0x68,0x2c,0x14,0xf3) @ sha256h2 q1,q2,q12 - INST(0xe2,0x4c,0x60,0xf3) @ sha256su1 q10,q8,q9 - vld1.32 {q12},[r3]! - vadd.i32 q13,q13,q11 - INST(0xe0,0x63,0xfa,0xf3) @ sha256su0 q11,q8 - vmov q2,q0 - INST(0x6a,0x0c,0x02,0xf3) @ sha256h q0,q1,q13 - INST(0x6a,0x2c,0x14,0xf3) @ sha256h2 q1,q2,q13 - INST(0xe4,0x6c,0x62,0xf3) @ sha256su1 q11,q9,q10 - vld1.32 {q13},[r3]! - vadd.i32 q12,q12,q8 - INST(0xe2,0x03,0xfa,0xf3) @ sha256su0 q8,q9 - vmov q2,q0 - INST(0x68,0x0c,0x02,0xf3) @ sha256h q0,q1,q12 - INST(0x68,0x2c,0x14,0xf3) @ sha256h2 q1,q2,q12 - INST(0xe6,0x0c,0x64,0xf3) @ sha256su1 q8,q10,q11 - vld1.32 {q12},[r3]! - vadd.i32 q13,q13,q9 - INST(0xe4,0x23,0xfa,0xf3) @ sha256su0 q9,q10 - vmov q2,q0 - INST(0x6a,0x0c,0x02,0xf3) @ sha256h q0,q1,q13 - INST(0x6a,0x2c,0x14,0xf3) @ sha256h2 q1,q2,q13 - INST(0xe0,0x2c,0x66,0xf3) @ sha256su1 q9,q11,q8 - vld1.32 {q13},[r3]! - vadd.i32 q12,q12,q10 - INST(0xe6,0x43,0xfa,0xf3) @ sha256su0 q10,q11 - vmov q2,q0 - INST(0x68,0x0c,0x02,0xf3) @ sha256h q0,q1,q12 - INST(0x68,0x2c,0x14,0xf3) @ sha256h2 q1,q2,q12 - INST(0xe2,0x4c,0x60,0xf3) @ sha256su1 q10,q8,q9 - vld1.32 {q12},[r3]! - vadd.i32 q13,q13,q11 - INST(0xe0,0x63,0xfa,0xf3) @ sha256su0 q11,q8 - vmov q2,q0 - INST(0x6a,0x0c,0x02,0xf3) @ sha256h q0,q1,q13 - INST(0x6a,0x2c,0x14,0xf3) @ sha256h2 q1,q2,q13 - INST(0xe4,0x6c,0x62,0xf3) @ sha256su1 q11,q9,q10 - vld1.32 {q13},[r3]! - vadd.i32 q12,q12,q8 - INST(0xe2,0x03,0xfa,0xf3) @ sha256su0 q8,q9 - vmov q2,q0 - INST(0x68,0x0c,0x02,0xf3) @ sha256h q0,q1,q12 - INST(0x68,0x2c,0x14,0xf3) @ sha256h2 q1,q2,q12 - INST(0xe6,0x0c,0x64,0xf3) @ sha256su1 q8,q10,q11 - vld1.32 {q12},[r3]! - vadd.i32 q13,q13,q9 - INST(0xe4,0x23,0xfa,0xf3) @ sha256su0 q9,q10 - vmov q2,q0 - INST(0x6a,0x0c,0x02,0xf3) @ sha256h q0,q1,q13 - INST(0x6a,0x2c,0x14,0xf3) @ sha256h2 q1,q2,q13 - INST(0xe0,0x2c,0x66,0xf3) @ sha256su1 q9,q11,q8 - vld1.32 {q13},[r3]! - vadd.i32 q12,q12,q10 - INST(0xe6,0x43,0xfa,0xf3) @ sha256su0 q10,q11 - vmov q2,q0 - INST(0x68,0x0c,0x02,0xf3) @ sha256h q0,q1,q12 - INST(0x68,0x2c,0x14,0xf3) @ sha256h2 q1,q2,q12 - INST(0xe2,0x4c,0x60,0xf3) @ sha256su1 q10,q8,q9 - vld1.32 {q12},[r3]! - vadd.i32 q13,q13,q11 - INST(0xe0,0x63,0xfa,0xf3) @ sha256su0 q11,q8 - vmov q2,q0 - INST(0x6a,0x0c,0x02,0xf3) @ sha256h q0,q1,q13 - INST(0x6a,0x2c,0x14,0xf3) @ sha256h2 q1,q2,q13 - INST(0xe4,0x6c,0x62,0xf3) @ sha256su1 q11,q9,q10 - vld1.32 {q13},[r3]! - vadd.i32 q12,q12,q8 - vmov q2,q0 - INST(0x68,0x0c,0x02,0xf3) @ sha256h q0,q1,q12 - INST(0x68,0x2c,0x14,0xf3) @ sha256h2 q1,q2,q12 - - vld1.32 {q12},[r3]! - vadd.i32 q13,q13,q9 - vmov q2,q0 - INST(0x6a,0x0c,0x02,0xf3) @ sha256h q0,q1,q13 - INST(0x6a,0x2c,0x14,0xf3) @ sha256h2 q1,q2,q13 - - vld1.32 {q13},[r3] - vadd.i32 q12,q12,q10 - sub r3,r3,#256-16 @ rewind - vmov q2,q0 - INST(0x68,0x0c,0x02,0xf3) @ sha256h q0,q1,q12 - INST(0x68,0x2c,0x14,0xf3) @ sha256h2 q1,q2,q12 - - vadd.i32 q13,q13,q11 - vmov q2,q0 - INST(0x6a,0x0c,0x02,0xf3) @ sha256h q0,q1,q13 - INST(0x6a,0x2c,0x14,0xf3) @ sha256h2 q1,q2,q13 - - vadd.i32 q0,q0,q14 - vadd.i32 q1,q1,q15 - it ne - bne .Loop_v8 - - vst1.32 {q0,q1},[r0] - - bx lr @ bx lr -.size sha256_block_data_order_armv8,.-sha256_block_data_order_armv8 -#endif -.asciz "SHA256 block transform for ARMv4/NEON/ARMv8, CRYPTOGAMS by " -.align 2 -#if __ARM_MAX_ARCH__>=7 && !defined(__KERNEL__) -.comm OPENSSL_armcap_P,4,4 -#endif diff --git a/arch/arm/crypto/sha256_glue.c b/arch/arm/crypto/sha256_glue.c deleted file mode 100644 index 0d6fc436564d..000000000000 --- a/arch/arm/crypto/sha256_glue.c +++ /dev/null @@ -1,246 +0,0 @@ -/* - * Glue code for the SHA256 Secure Hash Algorithm assembly implementation - * using optimized ARM assembler and NEON instructions. - * - * Copyright © 2015 Google Inc. - * - * This file is based on sha256_ssse3_glue.c: - * Copyright (C) 2013 Intel Corporation - * Author: Tim Chen - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the Free - * Software Foundation; either version 2 of the License, or (at your option) - * any later version. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "sha256_glue.h" - -asmlinkage void sha256_block_data_order(u32 *digest, const void *data, - unsigned int num_blks); - - -int sha256_init(struct shash_desc *desc) -{ - struct sha256_state *sctx = shash_desc_ctx(desc); - - sctx->state[0] = SHA256_H0; - sctx->state[1] = SHA256_H1; - sctx->state[2] = SHA256_H2; - sctx->state[3] = SHA256_H3; - sctx->state[4] = SHA256_H4; - sctx->state[5] = SHA256_H5; - sctx->state[6] = SHA256_H6; - sctx->state[7] = SHA256_H7; - sctx->count = 0; - - return 0; -} - -int sha224_init(struct shash_desc *desc) -{ - struct sha256_state *sctx = shash_desc_ctx(desc); - - sctx->state[0] = SHA224_H0; - sctx->state[1] = SHA224_H1; - sctx->state[2] = SHA224_H2; - sctx->state[3] = SHA224_H3; - sctx->state[4] = SHA224_H4; - sctx->state[5] = SHA224_H5; - sctx->state[6] = SHA224_H6; - sctx->state[7] = SHA224_H7; - sctx->count = 0; - - return 0; -} - -int __sha256_update(struct shash_desc *desc, const u8 *data, unsigned int len, - unsigned int partial) -{ - struct sha256_state *sctx = shash_desc_ctx(desc); - unsigned int done = 0; - - sctx->count += len; - - if (partial) { - done = SHA256_BLOCK_SIZE - partial; - memcpy(sctx->buf + partial, data, done); - sha256_block_data_order(sctx->state, sctx->buf, 1); - } - - if (len - done >= SHA256_BLOCK_SIZE) { - const unsigned int rounds = (len - done) / SHA256_BLOCK_SIZE; - - sha256_block_data_order(sctx->state, data + done, rounds); - done += rounds * SHA256_BLOCK_SIZE; - } - - memcpy(sctx->buf, data + done, len - done); - - return 0; -} - -int sha256_update(struct shash_desc *desc, const u8 *data, unsigned int len) -{ - struct sha256_state *sctx = shash_desc_ctx(desc); - unsigned int partial = sctx->count % SHA256_BLOCK_SIZE; - - /* Handle the fast case right here */ - if (partial + len < SHA256_BLOCK_SIZE) { - sctx->count += len; - memcpy(sctx->buf + partial, data, len); - - return 0; - } - - return __sha256_update(desc, data, len, partial); -} - -/* Add padding and return the message digest. */ -static int sha256_final(struct shash_desc *desc, u8 *out) -{ - struct sha256_state *sctx = shash_desc_ctx(desc); - unsigned int i, index, padlen; - __be32 *dst = (__be32 *)out; - __be64 bits; - static const u8 padding[SHA256_BLOCK_SIZE] = { 0x80, }; - - /* save number of bits */ - bits = cpu_to_be64(sctx->count << 3); - - /* Pad out to 56 mod 64 and append length */ - index = sctx->count % SHA256_BLOCK_SIZE; - padlen = (index < 56) ? (56 - index) : ((SHA256_BLOCK_SIZE+56)-index); - - /* We need to fill a whole block for __sha256_update */ - if (padlen <= 56) { - sctx->count += padlen; - memcpy(sctx->buf + index, padding, padlen); - } else { - __sha256_update(desc, padding, padlen, index); - } - __sha256_update(desc, (const u8 *)&bits, sizeof(bits), 56); - - /* Store state in digest */ - for (i = 0; i < 8; i++) - dst[i] = cpu_to_be32(sctx->state[i]); - - /* Wipe context */ - memset(sctx, 0, sizeof(*sctx)); - - return 0; -} - -static int sha224_final(struct shash_desc *desc, u8 *out) -{ - u8 D[SHA256_DIGEST_SIZE]; - - sha256_final(desc, D); - - memcpy(out, D, SHA224_DIGEST_SIZE); - memset(D, 0, SHA256_DIGEST_SIZE); - - return 0; -} - -int sha256_export(struct shash_desc *desc, void *out) -{ - struct sha256_state *sctx = shash_desc_ctx(desc); - - memcpy(out, sctx, sizeof(*sctx)); - - return 0; -} - -int sha256_import(struct shash_desc *desc, const void *in) -{ - struct sha256_state *sctx = shash_desc_ctx(desc); - - memcpy(sctx, in, sizeof(*sctx)); - - return 0; -} - -static struct shash_alg algs[] = { { - .digestsize = SHA256_DIGEST_SIZE, - .init = sha256_init, - .update = sha256_update, - .final = sha256_final, - .export = sha256_export, - .import = sha256_import, - .descsize = sizeof(struct sha256_state), - .statesize = sizeof(struct sha256_state), - .base = { - .cra_name = "sha256", - .cra_driver_name = "sha256-asm", - .cra_priority = 150, - .cra_flags = CRYPTO_ALG_TYPE_SHASH, - .cra_blocksize = SHA256_BLOCK_SIZE, - .cra_module = THIS_MODULE, - } -}, { - .digestsize = SHA224_DIGEST_SIZE, - .init = sha224_init, - .update = sha256_update, - .final = sha224_final, - .export = sha256_export, - .import = sha256_import, - .descsize = sizeof(struct sha256_state), - .statesize = sizeof(struct sha256_state), - .base = { - .cra_name = "sha224", - .cra_driver_name = "sha224-asm", - .cra_priority = 150, - .cra_flags = CRYPTO_ALG_TYPE_SHASH, - .cra_blocksize = SHA224_BLOCK_SIZE, - .cra_module = THIS_MODULE, - } -} }; - -static int __init sha256_mod_init(void) -{ - int res = crypto_register_shashes(algs, ARRAY_SIZE(algs)); - - if (res < 0) - return res; - - if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) && cpu_has_neon()) { - res = crypto_register_shashes(sha256_neon_algs, - ARRAY_SIZE(sha256_neon_algs)); - - if (res < 0) - crypto_unregister_shashes(algs, ARRAY_SIZE(algs)); - } - - return res; -} - -static void __exit sha256_mod_fini(void) -{ - crypto_unregister_shashes(algs, ARRAY_SIZE(algs)); - - if (IS_ENABLED(CONFIG_KERNEL_MODE_NEON) && cpu_has_neon()) - crypto_unregister_shashes(sha256_neon_algs, - ARRAY_SIZE(sha256_neon_algs)); -} - -module_init(sha256_mod_init); -module_exit(sha256_mod_fini); - -MODULE_LICENSE("GPL"); -MODULE_DESCRIPTION("SHA256 Secure Hash Algorithm (ARM), including NEON"); - -MODULE_ALIAS("sha256"); diff --git a/arch/arm/crypto/sha256_glue.h b/arch/arm/crypto/sha256_glue.h deleted file mode 100644 index 0312f4ffe8cc..000000000000 --- a/arch/arm/crypto/sha256_glue.h +++ /dev/null @@ -1,23 +0,0 @@ -#ifndef _CRYPTO_SHA256_GLUE_H -#define _CRYPTO_SHA256_GLUE_H - -#include -#include - -extern struct shash_alg sha256_neon_algs[2]; - -extern int sha256_init(struct shash_desc *desc); - -extern int sha224_init(struct shash_desc *desc); - -extern int __sha256_update(struct shash_desc *desc, const u8 *data, - unsigned int len, unsigned int partial); - -extern int sha256_update(struct shash_desc *desc, const u8 *data, - unsigned int len); - -extern int sha256_export(struct shash_desc *desc, void *out); - -extern int sha256_import(struct shash_desc *desc, const void *in); - -#endif /* _CRYPTO_SHA256_GLUE_H */ diff --git a/arch/arm/crypto/sha256_neon_glue.c b/arch/arm/crypto/sha256_neon_glue.c deleted file mode 100644 index 3ff0a7f1d092..000000000000 --- a/arch/arm/crypto/sha256_neon_glue.c +++ /dev/null @@ -1,172 +0,0 @@ -/* - * Glue code for the SHA256 Secure Hash Algorithm assembly implementation - * using NEON instructions. - * - * Copyright © 2015 Google Inc. - * - * This file is based on sha512_neon_glue.c: - * Copyright © 2014 Jussi Kivilinna - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the Free - * Software Foundation; either version 2 of the License, or (at your option) - * any later version. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include "sha256_glue.h" - -asmlinkage void sha256_block_data_order_neon(u32 *digest, const void *data, - unsigned int num_blks); - - -static int __sha256_neon_update(struct shash_desc *desc, const u8 *data, - unsigned int len, unsigned int partial) -{ - struct sha256_state *sctx = shash_desc_ctx(desc); - unsigned int done = 0; - - sctx->count += len; - - if (partial) { - done = SHA256_BLOCK_SIZE - partial; - memcpy(sctx->buf + partial, data, done); - sha256_block_data_order_neon(sctx->state, sctx->buf, 1); - } - - if (len - done >= SHA256_BLOCK_SIZE) { - const unsigned int rounds = (len - done) / SHA256_BLOCK_SIZE; - - sha256_block_data_order_neon(sctx->state, data + done, rounds); - done += rounds * SHA256_BLOCK_SIZE; - } - - memcpy(sctx->buf, data + done, len - done); - - return 0; -} - -static int sha256_neon_update(struct shash_desc *desc, const u8 *data, - unsigned int len) -{ - struct sha256_state *sctx = shash_desc_ctx(desc); - unsigned int partial = sctx->count % SHA256_BLOCK_SIZE; - int res; - - /* Handle the fast case right here */ - if (partial + len < SHA256_BLOCK_SIZE) { - sctx->count += len; - memcpy(sctx->buf + partial, data, len); - - return 0; - } - - if (!may_use_simd()) { - res = __sha256_update(desc, data, len, partial); - } else { - kernel_neon_begin(); - res = __sha256_neon_update(desc, data, len, partial); - kernel_neon_end(); - } - - return res; -} - -/* Add padding and return the message digest. */ -static int sha256_neon_final(struct shash_desc *desc, u8 *out) -{ - struct sha256_state *sctx = shash_desc_ctx(desc); - unsigned int i, index, padlen; - __be32 *dst = (__be32 *)out; - __be64 bits; - static const u8 padding[SHA256_BLOCK_SIZE] = { 0x80, }; - - /* save number of bits */ - bits = cpu_to_be64(sctx->count << 3); - - /* Pad out to 56 mod 64 and append length */ - index = sctx->count % SHA256_BLOCK_SIZE; - padlen = (index < 56) ? (56 - index) : ((SHA256_BLOCK_SIZE+56)-index); - - if (!may_use_simd()) { - sha256_update(desc, padding, padlen); - sha256_update(desc, (const u8 *)&bits, sizeof(bits)); - } else { - kernel_neon_begin(); - /* We need to fill a whole block for __sha256_neon_update() */ - if (padlen <= 56) { - sctx->count += padlen; - memcpy(sctx->buf + index, padding, padlen); - } else { - __sha256_neon_update(desc, padding, padlen, index); - } - __sha256_neon_update(desc, (const u8 *)&bits, - sizeof(bits), 56); - kernel_neon_end(); - } - - /* Store state in digest */ - for (i = 0; i < 8; i++) - dst[i] = cpu_to_be32(sctx->state[i]); - - /* Wipe context */ - memset(sctx, 0, sizeof(*sctx)); - - return 0; -} - -static int sha224_neon_final(struct shash_desc *desc, u8 *out) -{ - u8 D[SHA256_DIGEST_SIZE]; - - sha256_neon_final(desc, D); - - memcpy(out, D, SHA224_DIGEST_SIZE); - memset(D, 0, SHA256_DIGEST_SIZE); - - return 0; -} - -struct shash_alg sha256_neon_algs[] = { { - .digestsize = SHA256_DIGEST_SIZE, - .init = sha256_init, - .update = sha256_neon_update, - .final = sha256_neon_final, - .export = sha256_export, - .import = sha256_import, - .descsize = sizeof(struct sha256_state), - .statesize = sizeof(struct sha256_state), - .base = { - .cra_name = "sha256", - .cra_driver_name = "sha256-neon", - .cra_priority = 250, - .cra_flags = CRYPTO_ALG_TYPE_SHASH, - .cra_blocksize = SHA256_BLOCK_SIZE, - .cra_module = THIS_MODULE, - } -}, { - .digestsize = SHA224_DIGEST_SIZE, - .init = sha224_init, - .update = sha256_neon_update, - .final = sha224_neon_final, - .export = sha256_export, - .import = sha256_import, - .descsize = sizeof(struct sha256_state), - .statesize = sizeof(struct sha256_state), - .base = { - .cra_name = "sha224", - .cra_driver_name = "sha224-neon", - .cra_priority = 250, - .cra_flags = CRYPTO_ALG_TYPE_SHASH, - .cra_blocksize = SHA224_BLOCK_SIZE, - .cra_module = THIS_MODULE, - } -} }; diff --git a/arch/arm/crypto/sha512-armv7-neon.S b/arch/arm/crypto/sha512-armv7-neon.S deleted file mode 100644 index fe99472e507c..000000000000 --- a/arch/arm/crypto/sha512-armv7-neon.S +++ /dev/null @@ -1,455 +0,0 @@ -/* sha512-armv7-neon.S - ARM/NEON assembly implementation of SHA-512 transform - * - * Copyright © 2013-2014 Jussi Kivilinna - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the Free - * Software Foundation; either version 2 of the License, or (at your option) - * any later version. - */ - -#include - - -.syntax unified -.code 32 -.fpu neon - -.text - -/* structure of SHA512_CONTEXT */ -#define hd_a 0 -#define hd_b ((hd_a) + 8) -#define hd_c ((hd_b) + 8) -#define hd_d ((hd_c) + 8) -#define hd_e ((hd_d) + 8) -#define hd_f ((hd_e) + 8) -#define hd_g ((hd_f) + 8) - -/* register macros */ -#define RK %r2 - -#define RA d0 -#define RB d1 -#define RC d2 -#define RD d3 -#define RE d4 -#define RF d5 -#define RG d6 -#define RH d7 - -#define RT0 d8 -#define RT1 d9 -#define RT2 d10 -#define RT3 d11 -#define RT4 d12 -#define RT5 d13 -#define RT6 d14 -#define RT7 d15 - -#define RT01q q4 -#define RT23q q5 -#define RT45q q6 -#define RT67q q7 - -#define RW0 d16 -#define RW1 d17 -#define RW2 d18 -#define RW3 d19 -#define RW4 d20 -#define RW5 d21 -#define RW6 d22 -#define RW7 d23 -#define RW8 d24 -#define RW9 d25 -#define RW10 d26 -#define RW11 d27 -#define RW12 d28 -#define RW13 d29 -#define RW14 d30 -#define RW15 d31 - -#define RW01q q8 -#define RW23q q9 -#define RW45q q10 -#define RW67q q11 -#define RW89q q12 -#define RW1011q q13 -#define RW1213q q14 -#define RW1415q q15 - -/*********************************************************************** - * ARM assembly implementation of sha512 transform - ***********************************************************************/ -#define rounds2_0_63(ra, rb, rc, rd, re, rf, rg, rh, rw0, rw1, rw01q, rw2, \ - rw23q, rw1415q, rw9, rw10, interleave_op, arg1) \ - /* t1 = h + Sum1 (e) + Ch (e, f, g) + k[t] + w[t]; */ \ - vshr.u64 RT2, re, #14; \ - vshl.u64 RT3, re, #64 - 14; \ - interleave_op(arg1); \ - vshr.u64 RT4, re, #18; \ - vshl.u64 RT5, re, #64 - 18; \ - vld1.64 {RT0}, [RK]!; \ - veor.64 RT23q, RT23q, RT45q; \ - vshr.u64 RT4, re, #41; \ - vshl.u64 RT5, re, #64 - 41; \ - vadd.u64 RT0, RT0, rw0; \ - veor.64 RT23q, RT23q, RT45q; \ - vmov.64 RT7, re; \ - veor.64 RT1, RT2, RT3; \ - vbsl.64 RT7, rf, rg; \ - \ - vadd.u64 RT1, RT1, rh; \ - vshr.u64 RT2, ra, #28; \ - vshl.u64 RT3, ra, #64 - 28; \ - vadd.u64 RT1, RT1, RT0; \ - vshr.u64 RT4, ra, #34; \ - vshl.u64 RT5, ra, #64 - 34; \ - vadd.u64 RT1, RT1, RT7; \ - \ - /* h = Sum0 (a) + Maj (a, b, c); */ \ - veor.64 RT23q, RT23q, RT45q; \ - vshr.u64 RT4, ra, #39; \ - vshl.u64 RT5, ra, #64 - 39; \ - veor.64 RT0, ra, rb; \ - veor.64 RT23q, RT23q, RT45q; \ - vbsl.64 RT0, rc, rb; \ - vadd.u64 rd, rd, RT1; /* d+=t1; */ \ - veor.64 rh, RT2, RT3; \ - \ - /* t1 = g + Sum1 (d) + Ch (d, e, f) + k[t] + w[t]; */ \ - vshr.u64 RT2, rd, #14; \ - vshl.u64 RT3, rd, #64 - 14; \ - vadd.u64 rh, rh, RT0; \ - vshr.u64 RT4, rd, #18; \ - vshl.u64 RT5, rd, #64 - 18; \ - vadd.u64 rh, rh, RT1; /* h+=t1; */ \ - vld1.64 {RT0}, [RK]!; \ - veor.64 RT23q, RT23q, RT45q; \ - vshr.u64 RT4, rd, #41; \ - vshl.u64 RT5, rd, #64 - 41; \ - vadd.u64 RT0, RT0, rw1; \ - veor.64 RT23q, RT23q, RT45q; \ - vmov.64 RT7, rd; \ - veor.64 RT1, RT2, RT3; \ - vbsl.64 RT7, re, rf; \ - \ - vadd.u64 RT1, RT1, rg; \ - vshr.u64 RT2, rh, #28; \ - vshl.u64 RT3, rh, #64 - 28; \ - vadd.u64 RT1, RT1, RT0; \ - vshr.u64 RT4, rh, #34; \ - vshl.u64 RT5, rh, #64 - 34; \ - vadd.u64 RT1, RT1, RT7; \ - \ - /* g = Sum0 (h) + Maj (h, a, b); */ \ - veor.64 RT23q, RT23q, RT45q; \ - vshr.u64 RT4, rh, #39; \ - vshl.u64 RT5, rh, #64 - 39; \ - veor.64 RT0, rh, ra; \ - veor.64 RT23q, RT23q, RT45q; \ - vbsl.64 RT0, rb, ra; \ - vadd.u64 rc, rc, RT1; /* c+=t1; */ \ - veor.64 rg, RT2, RT3; \ - \ - /* w[0] += S1 (w[14]) + w[9] + S0 (w[1]); */ \ - /* w[1] += S1 (w[15]) + w[10] + S0 (w[2]); */ \ - \ - /**** S0(w[1:2]) */ \ - \ - /* w[0:1] += w[9:10] */ \ - /* RT23q = rw1:rw2 */ \ - vext.u64 RT23q, rw01q, rw23q, #1; \ - vadd.u64 rw0, rw9; \ - vadd.u64 rg, rg, RT0; \ - vadd.u64 rw1, rw10;\ - vadd.u64 rg, rg, RT1; /* g+=t1; */ \ - \ - vshr.u64 RT45q, RT23q, #1; \ - vshl.u64 RT67q, RT23q, #64 - 1; \ - vshr.u64 RT01q, RT23q, #8; \ - veor.u64 RT45q, RT45q, RT67q; \ - vshl.u64 RT67q, RT23q, #64 - 8; \ - veor.u64 RT45q, RT45q, RT01q; \ - vshr.u64 RT01q, RT23q, #7; \ - veor.u64 RT45q, RT45q, RT67q; \ - \ - /**** S1(w[14:15]) */ \ - vshr.u64 RT23q, rw1415q, #6; \ - veor.u64 RT01q, RT01q, RT45q; \ - vshr.u64 RT45q, rw1415q, #19; \ - vshl.u64 RT67q, rw1415q, #64 - 19; \ - veor.u64 RT23q, RT23q, RT45q; \ - vshr.u64 RT45q, rw1415q, #61; \ - veor.u64 RT23q, RT23q, RT67q; \ - vshl.u64 RT67q, rw1415q, #64 - 61; \ - veor.u64 RT23q, RT23q, RT45q; \ - vadd.u64 rw01q, RT01q; /* w[0:1] += S(w[1:2]) */ \ - veor.u64 RT01q, RT23q, RT67q; -#define vadd_RT01q(rw01q) \ - /* w[0:1] += S(w[14:15]) */ \ - vadd.u64 rw01q, RT01q; - -#define dummy(_) /*_*/ - -#define rounds2_64_79(ra, rb, rc, rd, re, rf, rg, rh, rw0, rw1, \ - interleave_op1, arg1, interleave_op2, arg2) \ - /* t1 = h + Sum1 (e) + Ch (e, f, g) + k[t] + w[t]; */ \ - vshr.u64 RT2, re, #14; \ - vshl.u64 RT3, re, #64 - 14; \ - interleave_op1(arg1); \ - vshr.u64 RT4, re, #18; \ - vshl.u64 RT5, re, #64 - 18; \ - interleave_op2(arg2); \ - vld1.64 {RT0}, [RK]!; \ - veor.64 RT23q, RT23q, RT45q; \ - vshr.u64 RT4, re, #41; \ - vshl.u64 RT5, re, #64 - 41; \ - vadd.u64 RT0, RT0, rw0; \ - veor.64 RT23q, RT23q, RT45q; \ - vmov.64 RT7, re; \ - veor.64 RT1, RT2, RT3; \ - vbsl.64 RT7, rf, rg; \ - \ - vadd.u64 RT1, RT1, rh; \ - vshr.u64 RT2, ra, #28; \ - vshl.u64 RT3, ra, #64 - 28; \ - vadd.u64 RT1, RT1, RT0; \ - vshr.u64 RT4, ra, #34; \ - vshl.u64 RT5, ra, #64 - 34; \ - vadd.u64 RT1, RT1, RT7; \ - \ - /* h = Sum0 (a) + Maj (a, b, c); */ \ - veor.64 RT23q, RT23q, RT45q; \ - vshr.u64 RT4, ra, #39; \ - vshl.u64 RT5, ra, #64 - 39; \ - veor.64 RT0, ra, rb; \ - veor.64 RT23q, RT23q, RT45q; \ - vbsl.64 RT0, rc, rb; \ - vadd.u64 rd, rd, RT1; /* d+=t1; */ \ - veor.64 rh, RT2, RT3; \ - \ - /* t1 = g + Sum1 (d) + Ch (d, e, f) + k[t] + w[t]; */ \ - vshr.u64 RT2, rd, #14; \ - vshl.u64 RT3, rd, #64 - 14; \ - vadd.u64 rh, rh, RT0; \ - vshr.u64 RT4, rd, #18; \ - vshl.u64 RT5, rd, #64 - 18; \ - vadd.u64 rh, rh, RT1; /* h+=t1; */ \ - vld1.64 {RT0}, [RK]!; \ - veor.64 RT23q, RT23q, RT45q; \ - vshr.u64 RT4, rd, #41; \ - vshl.u64 RT5, rd, #64 - 41; \ - vadd.u64 RT0, RT0, rw1; \ - veor.64 RT23q, RT23q, RT45q; \ - vmov.64 RT7, rd; \ - veor.64 RT1, RT2, RT3; \ - vbsl.64 RT7, re, rf; \ - \ - vadd.u64 RT1, RT1, rg; \ - vshr.u64 RT2, rh, #28; \ - vshl.u64 RT3, rh, #64 - 28; \ - vadd.u64 RT1, RT1, RT0; \ - vshr.u64 RT4, rh, #34; \ - vshl.u64 RT5, rh, #64 - 34; \ - vadd.u64 RT1, RT1, RT7; \ - \ - /* g = Sum0 (h) + Maj (h, a, b); */ \ - veor.64 RT23q, RT23q, RT45q; \ - vshr.u64 RT4, rh, #39; \ - vshl.u64 RT5, rh, #64 - 39; \ - veor.64 RT0, rh, ra; \ - veor.64 RT23q, RT23q, RT45q; \ - vbsl.64 RT0, rb, ra; \ - vadd.u64 rc, rc, RT1; /* c+=t1; */ \ - veor.64 rg, RT2, RT3; -#define vadd_rg_RT0(rg) \ - vadd.u64 rg, rg, RT0; -#define vadd_rg_RT1(rg) \ - vadd.u64 rg, rg, RT1; /* g+=t1; */ - -.align 3 -ENTRY(sha512_transform_neon) - /* Input: - * %r0: SHA512_CONTEXT - * %r1: data - * %r2: u64 k[] constants - * %r3: nblks - */ - push {%lr}; - - mov %lr, #0; - - /* Load context to d0-d7 */ - vld1.64 {RA-RD}, [%r0]!; - vld1.64 {RE-RH}, [%r0]; - sub %r0, #(4*8); - - /* Load input to w[16], d16-d31 */ - /* NOTE: Assumes that on ARMv7 unaligned accesses are always allowed. */ - vld1.64 {RW0-RW3}, [%r1]!; - vld1.64 {RW4-RW7}, [%r1]!; - vld1.64 {RW8-RW11}, [%r1]!; - vld1.64 {RW12-RW15}, [%r1]!; -#ifdef __ARMEL__ - /* byteswap */ - vrev64.8 RW01q, RW01q; - vrev64.8 RW23q, RW23q; - vrev64.8 RW45q, RW45q; - vrev64.8 RW67q, RW67q; - vrev64.8 RW89q, RW89q; - vrev64.8 RW1011q, RW1011q; - vrev64.8 RW1213q, RW1213q; - vrev64.8 RW1415q, RW1415q; -#endif - - /* EABI says that d8-d15 must be preserved by callee. */ - /*vpush {RT0-RT7};*/ - -.Loop: - rounds2_0_63(RA, RB, RC, RD, RE, RF, RG, RH, RW0, RW1, RW01q, RW2, - RW23q, RW1415q, RW9, RW10, dummy, _); - b .Lenter_rounds; - -.Loop_rounds: - rounds2_0_63(RA, RB, RC, RD, RE, RF, RG, RH, RW0, RW1, RW01q, RW2, - RW23q, RW1415q, RW9, RW10, vadd_RT01q, RW1415q); -.Lenter_rounds: - rounds2_0_63(RG, RH, RA, RB, RC, RD, RE, RF, RW2, RW3, RW23q, RW4, - RW45q, RW01q, RW11, RW12, vadd_RT01q, RW01q); - rounds2_0_63(RE, RF, RG, RH, RA, RB, RC, RD, RW4, RW5, RW45q, RW6, - RW67q, RW23q, RW13, RW14, vadd_RT01q, RW23q); - rounds2_0_63(RC, RD, RE, RF, RG, RH, RA, RB, RW6, RW7, RW67q, RW8, - RW89q, RW45q, RW15, RW0, vadd_RT01q, RW45q); - rounds2_0_63(RA, RB, RC, RD, RE, RF, RG, RH, RW8, RW9, RW89q, RW10, - RW1011q, RW67q, RW1, RW2, vadd_RT01q, RW67q); - rounds2_0_63(RG, RH, RA, RB, RC, RD, RE, RF, RW10, RW11, RW1011q, RW12, - RW1213q, RW89q, RW3, RW4, vadd_RT01q, RW89q); - add %lr, #16; - rounds2_0_63(RE, RF, RG, RH, RA, RB, RC, RD, RW12, RW13, RW1213q, RW14, - RW1415q, RW1011q, RW5, RW6, vadd_RT01q, RW1011q); - cmp %lr, #64; - rounds2_0_63(RC, RD, RE, RF, RG, RH, RA, RB, RW14, RW15, RW1415q, RW0, - RW01q, RW1213q, RW7, RW8, vadd_RT01q, RW1213q); - bne .Loop_rounds; - - subs %r3, #1; - - rounds2_64_79(RA, RB, RC, RD, RE, RF, RG, RH, RW0, RW1, - vadd_RT01q, RW1415q, dummy, _); - rounds2_64_79(RG, RH, RA, RB, RC, RD, RE, RF, RW2, RW3, - vadd_rg_RT0, RG, vadd_rg_RT1, RG); - beq .Lhandle_tail; - vld1.64 {RW0-RW3}, [%r1]!; - rounds2_64_79(RE, RF, RG, RH, RA, RB, RC, RD, RW4, RW5, - vadd_rg_RT0, RE, vadd_rg_RT1, RE); - rounds2_64_79(RC, RD, RE, RF, RG, RH, RA, RB, RW6, RW7, - vadd_rg_RT0, RC, vadd_rg_RT1, RC); -#ifdef __ARMEL__ - vrev64.8 RW01q, RW01q; - vrev64.8 RW23q, RW23q; -#endif - vld1.64 {RW4-RW7}, [%r1]!; - rounds2_64_79(RA, RB, RC, RD, RE, RF, RG, RH, RW8, RW9, - vadd_rg_RT0, RA, vadd_rg_RT1, RA); - rounds2_64_79(RG, RH, RA, RB, RC, RD, RE, RF, RW10, RW11, - vadd_rg_RT0, RG, vadd_rg_RT1, RG); -#ifdef __ARMEL__ - vrev64.8 RW45q, RW45q; - vrev64.8 RW67q, RW67q; -#endif - vld1.64 {RW8-RW11}, [%r1]!; - rounds2_64_79(RE, RF, RG, RH, RA, RB, RC, RD, RW12, RW13, - vadd_rg_RT0, RE, vadd_rg_RT1, RE); - rounds2_64_79(RC, RD, RE, RF, RG, RH, RA, RB, RW14, RW15, - vadd_rg_RT0, RC, vadd_rg_RT1, RC); -#ifdef __ARMEL__ - vrev64.8 RW89q, RW89q; - vrev64.8 RW1011q, RW1011q; -#endif - vld1.64 {RW12-RW15}, [%r1]!; - vadd_rg_RT0(RA); - vadd_rg_RT1(RA); - - /* Load context */ - vld1.64 {RT0-RT3}, [%r0]!; - vld1.64 {RT4-RT7}, [%r0]; - sub %r0, #(4*8); - -#ifdef __ARMEL__ - vrev64.8 RW1213q, RW1213q; - vrev64.8 RW1415q, RW1415q; -#endif - - vadd.u64 RA, RT0; - vadd.u64 RB, RT1; - vadd.u64 RC, RT2; - vadd.u64 RD, RT3; - vadd.u64 RE, RT4; - vadd.u64 RF, RT5; - vadd.u64 RG, RT6; - vadd.u64 RH, RT7; - - /* Store the first half of context */ - vst1.64 {RA-RD}, [%r0]!; - sub RK, $(8*80); - vst1.64 {RE-RH}, [%r0]; /* Store the last half of context */ - mov %lr, #0; - sub %r0, #(4*8); - - b .Loop; - -.Lhandle_tail: - rounds2_64_79(RE, RF, RG, RH, RA, RB, RC, RD, RW4, RW5, - vadd_rg_RT0, RE, vadd_rg_RT1, RE); - rounds2_64_79(RC, RD, RE, RF, RG, RH, RA, RB, RW6, RW7, - vadd_rg_RT0, RC, vadd_rg_RT1, RC); - rounds2_64_79(RA, RB, RC, RD, RE, RF, RG, RH, RW8, RW9, - vadd_rg_RT0, RA, vadd_rg_RT1, RA); - rounds2_64_79(RG, RH, RA, RB, RC, RD, RE, RF, RW10, RW11, - vadd_rg_RT0, RG, vadd_rg_RT1, RG); - rounds2_64_79(RE, RF, RG, RH, RA, RB, RC, RD, RW12, RW13, - vadd_rg_RT0, RE, vadd_rg_RT1, RE); - rounds2_64_79(RC, RD, RE, RF, RG, RH, RA, RB, RW14, RW15, - vadd_rg_RT0, RC, vadd_rg_RT1, RC); - - /* Load context to d16-d23 */ - vld1.64 {RW0-RW3}, [%r0]!; - vadd_rg_RT0(RA); - vld1.64 {RW4-RW7}, [%r0]; - vadd_rg_RT1(RA); - sub %r0, #(4*8); - - vadd.u64 RA, RW0; - vadd.u64 RB, RW1; - vadd.u64 RC, RW2; - vadd.u64 RD, RW3; - vadd.u64 RE, RW4; - vadd.u64 RF, RW5; - vadd.u64 RG, RW6; - vadd.u64 RH, RW7; - - /* Store the first half of context */ - vst1.64 {RA-RD}, [%r0]!; - - /* Clear used registers */ - /* d16-d31 */ - veor.u64 RW01q, RW01q; - veor.u64 RW23q, RW23q; - veor.u64 RW45q, RW45q; - veor.u64 RW67q, RW67q; - vst1.64 {RE-RH}, [%r0]; /* Store the last half of context */ - veor.u64 RW89q, RW89q; - veor.u64 RW1011q, RW1011q; - veor.u64 RW1213q, RW1213q; - veor.u64 RW1415q, RW1415q; - /* d8-d15 */ - /*vpop {RT0-RT7};*/ - /* d0-d7 (q0-q3) */ - veor.u64 %q0, %q0; - veor.u64 %q1, %q1; - veor.u64 %q2, %q2; - veor.u64 %q3, %q3; - - pop {%pc}; -ENDPROC(sha512_transform_neon) diff --git a/arch/arm/crypto/sha512_neon_glue.c b/arch/arm/crypto/sha512_neon_glue.c deleted file mode 100644 index 0d2758ff5e12..000000000000 --- a/arch/arm/crypto/sha512_neon_glue.c +++ /dev/null @@ -1,305 +0,0 @@ -/* - * Glue code for the SHA512 Secure Hash Algorithm assembly implementation - * using NEON instructions. - * - * Copyright © 2014 Jussi Kivilinna - * - * This file is based on sha512_ssse3_glue.c: - * Copyright (C) 2013 Intel Corporation - * Author: Tim Chen - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the Free - * Software Foundation; either version 2 of the License, or (at your option) - * any later version. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - - -static const u64 sha512_k[] = { - 0x428a2f98d728ae22ULL, 0x7137449123ef65cdULL, - 0xb5c0fbcfec4d3b2fULL, 0xe9b5dba58189dbbcULL, - 0x3956c25bf348b538ULL, 0x59f111f1b605d019ULL, - 0x923f82a4af194f9bULL, 0xab1c5ed5da6d8118ULL, - 0xd807aa98a3030242ULL, 0x12835b0145706fbeULL, - 0x243185be4ee4b28cULL, 0x550c7dc3d5ffb4e2ULL, - 0x72be5d74f27b896fULL, 0x80deb1fe3b1696b1ULL, - 0x9bdc06a725c71235ULL, 0xc19bf174cf692694ULL, - 0xe49b69c19ef14ad2ULL, 0xefbe4786384f25e3ULL, - 0x0fc19dc68b8cd5b5ULL, 0x240ca1cc77ac9c65ULL, - 0x2de92c6f592b0275ULL, 0x4a7484aa6ea6e483ULL, - 0x5cb0a9dcbd41fbd4ULL, 0x76f988da831153b5ULL, - 0x983e5152ee66dfabULL, 0xa831c66d2db43210ULL, - 0xb00327c898fb213fULL, 0xbf597fc7beef0ee4ULL, - 0xc6e00bf33da88fc2ULL, 0xd5a79147930aa725ULL, - 0x06ca6351e003826fULL, 0x142929670a0e6e70ULL, - 0x27b70a8546d22ffcULL, 0x2e1b21385c26c926ULL, - 0x4d2c6dfc5ac42aedULL, 0x53380d139d95b3dfULL, - 0x650a73548baf63deULL, 0x766a0abb3c77b2a8ULL, - 0x81c2c92e47edaee6ULL, 0x92722c851482353bULL, - 0xa2bfe8a14cf10364ULL, 0xa81a664bbc423001ULL, - 0xc24b8b70d0f89791ULL, 0xc76c51a30654be30ULL, - 0xd192e819d6ef5218ULL, 0xd69906245565a910ULL, - 0xf40e35855771202aULL, 0x106aa07032bbd1b8ULL, - 0x19a4c116b8d2d0c8ULL, 0x1e376c085141ab53ULL, - 0x2748774cdf8eeb99ULL, 0x34b0bcb5e19b48a8ULL, - 0x391c0cb3c5c95a63ULL, 0x4ed8aa4ae3418acbULL, - 0x5b9cca4f7763e373ULL, 0x682e6ff3d6b2b8a3ULL, - 0x748f82ee5defb2fcULL, 0x78a5636f43172f60ULL, - 0x84c87814a1f0ab72ULL, 0x8cc702081a6439ecULL, - 0x90befffa23631e28ULL, 0xa4506cebde82bde9ULL, - 0xbef9a3f7b2c67915ULL, 0xc67178f2e372532bULL, - 0xca273eceea26619cULL, 0xd186b8c721c0c207ULL, - 0xeada7dd6cde0eb1eULL, 0xf57d4f7fee6ed178ULL, - 0x06f067aa72176fbaULL, 0x0a637dc5a2c898a6ULL, - 0x113f9804bef90daeULL, 0x1b710b35131c471bULL, - 0x28db77f523047d84ULL, 0x32caab7b40c72493ULL, - 0x3c9ebe0a15c9bebcULL, 0x431d67c49c100d4cULL, - 0x4cc5d4becb3e42b6ULL, 0x597f299cfc657e2aULL, - 0x5fcb6fab3ad6faecULL, 0x6c44198c4a475817ULL -}; - - -asmlinkage void sha512_transform_neon(u64 *digest, const void *data, - const u64 k[], unsigned int num_blks); - - -static int sha512_neon_init(struct shash_desc *desc) -{ - struct sha512_state *sctx = shash_desc_ctx(desc); - - sctx->state[0] = SHA512_H0; - sctx->state[1] = SHA512_H1; - sctx->state[2] = SHA512_H2; - sctx->state[3] = SHA512_H3; - sctx->state[4] = SHA512_H4; - sctx->state[5] = SHA512_H5; - sctx->state[6] = SHA512_H6; - sctx->state[7] = SHA512_H7; - sctx->count[0] = sctx->count[1] = 0; - - return 0; -} - -static int __sha512_neon_update(struct shash_desc *desc, const u8 *data, - unsigned int len, unsigned int partial) -{ - struct sha512_state *sctx = shash_desc_ctx(desc); - unsigned int done = 0; - - sctx->count[0] += len; - if (sctx->count[0] < len) - sctx->count[1]++; - - if (partial) { - done = SHA512_BLOCK_SIZE - partial; - memcpy(sctx->buf + partial, data, done); - sha512_transform_neon(sctx->state, sctx->buf, sha512_k, 1); - } - - if (len - done >= SHA512_BLOCK_SIZE) { - const unsigned int rounds = (len - done) / SHA512_BLOCK_SIZE; - - sha512_transform_neon(sctx->state, data + done, sha512_k, - rounds); - - done += rounds * SHA512_BLOCK_SIZE; - } - - memcpy(sctx->buf, data + done, len - done); - - return 0; -} - -static int sha512_neon_update(struct shash_desc *desc, const u8 *data, - unsigned int len) -{ - struct sha512_state *sctx = shash_desc_ctx(desc); - unsigned int partial = sctx->count[0] % SHA512_BLOCK_SIZE; - int res; - - /* Handle the fast case right here */ - if (partial + len < SHA512_BLOCK_SIZE) { - sctx->count[0] += len; - if (sctx->count[0] < len) - sctx->count[1]++; - memcpy(sctx->buf + partial, data, len); - - return 0; - } - - if (!may_use_simd()) { - res = crypto_sha512_update(desc, data, len); - } else { - kernel_neon_begin(); - res = __sha512_neon_update(desc, data, len, partial); - kernel_neon_end(); - } - - return res; -} - - -/* Add padding and return the message digest. */ -static int sha512_neon_final(struct shash_desc *desc, u8 *out) -{ - struct sha512_state *sctx = shash_desc_ctx(desc); - unsigned int i, index, padlen; - __be64 *dst = (__be64 *)out; - __be64 bits[2]; - static const u8 padding[SHA512_BLOCK_SIZE] = { 0x80, }; - - /* save number of bits */ - bits[1] = cpu_to_be64(sctx->count[0] << 3); - bits[0] = cpu_to_be64(sctx->count[1] << 3 | sctx->count[0] >> 61); - - /* Pad out to 112 mod 128 and append length */ - index = sctx->count[0] & 0x7f; - padlen = (index < 112) ? (112 - index) : ((128+112) - index); - - if (!may_use_simd()) { - crypto_sha512_update(desc, padding, padlen); - crypto_sha512_update(desc, (const u8 *)&bits, sizeof(bits)); - } else { - kernel_neon_begin(); - /* We need to fill a whole block for __sha512_neon_update() */ - if (padlen <= 112) { - sctx->count[0] += padlen; - if (sctx->count[0] < padlen) - sctx->count[1]++; - memcpy(sctx->buf + index, padding, padlen); - } else { - __sha512_neon_update(desc, padding, padlen, index); - } - __sha512_neon_update(desc, (const u8 *)&bits, - sizeof(bits), 112); - kernel_neon_end(); - } - - /* Store state in digest */ - for (i = 0; i < 8; i++) - dst[i] = cpu_to_be64(sctx->state[i]); - - /* Wipe context */ - memset(sctx, 0, sizeof(*sctx)); - - return 0; -} - -static int sha512_neon_export(struct shash_desc *desc, void *out) -{ - struct sha512_state *sctx = shash_desc_ctx(desc); - - memcpy(out, sctx, sizeof(*sctx)); - - return 0; -} - -static int sha512_neon_import(struct shash_desc *desc, const void *in) -{ - struct sha512_state *sctx = shash_desc_ctx(desc); - - memcpy(sctx, in, sizeof(*sctx)); - - return 0; -} - -static int sha384_neon_init(struct shash_desc *desc) -{ - struct sha512_state *sctx = shash_desc_ctx(desc); - - sctx->state[0] = SHA384_H0; - sctx->state[1] = SHA384_H1; - sctx->state[2] = SHA384_H2; - sctx->state[3] = SHA384_H3; - sctx->state[4] = SHA384_H4; - sctx->state[5] = SHA384_H5; - sctx->state[6] = SHA384_H6; - sctx->state[7] = SHA384_H7; - - sctx->count[0] = sctx->count[1] = 0; - - return 0; -} - -static int sha384_neon_final(struct shash_desc *desc, u8 *hash) -{ - u8 D[SHA512_DIGEST_SIZE]; - - sha512_neon_final(desc, D); - - memcpy(hash, D, SHA384_DIGEST_SIZE); - memset(D, 0, SHA512_DIGEST_SIZE); - - return 0; -} - -static struct shash_alg algs[] = { { - .digestsize = SHA512_DIGEST_SIZE, - .init = sha512_neon_init, - .update = sha512_neon_update, - .final = sha512_neon_final, - .export = sha512_neon_export, - .import = sha512_neon_import, - .descsize = sizeof(struct sha512_state), - .statesize = sizeof(struct sha512_state), - .base = { - .cra_name = "sha512", - .cra_driver_name = "sha512-neon", - .cra_priority = 250, - .cra_flags = CRYPTO_ALG_TYPE_SHASH, - .cra_blocksize = SHA512_BLOCK_SIZE, - .cra_module = THIS_MODULE, - } -}, { - .digestsize = SHA384_DIGEST_SIZE, - .init = sha384_neon_init, - .update = sha512_neon_update, - .final = sha384_neon_final, - .export = sha512_neon_export, - .import = sha512_neon_import, - .descsize = sizeof(struct sha512_state), - .statesize = sizeof(struct sha512_state), - .base = { - .cra_name = "sha384", - .cra_driver_name = "sha384-neon", - .cra_priority = 250, - .cra_flags = CRYPTO_ALG_TYPE_SHASH, - .cra_blocksize = SHA384_BLOCK_SIZE, - .cra_module = THIS_MODULE, - } -} }; - -static int __init sha512_neon_mod_init(void) -{ - if (!cpu_has_neon()) - return -ENODEV; - - return crypto_register_shashes(algs, ARRAY_SIZE(algs)); -} - -static void __exit sha512_neon_mod_fini(void) -{ - crypto_unregister_shashes(algs, ARRAY_SIZE(algs)); -} - -module_init(sha512_neon_mod_init); -module_exit(sha512_neon_mod_fini); - -MODULE_LICENSE("GPL"); -MODULE_DESCRIPTION("SHA512 Secure Hash Algorithm, NEON accelerated"); - -MODULE_ALIAS("sha512"); -MODULE_ALIAS("sha384"); diff --git a/arch/arm/include/asm/Kbuild b/arch/arm/include/asm/Kbuild index 6577b8aeb711..d3db39860b9c 100644 --- a/arch/arm/include/asm/Kbuild +++ b/arch/arm/include/asm/Kbuild @@ -24,7 +24,6 @@ generic-y += sembuf.h generic-y += serial.h generic-y += shmbuf.h generic-y += siginfo.h -generic-y += simd.h generic-y += sizes.h generic-y += socket.h generic-y += sockios.h diff --git a/arch/arm/include/asm/arch_timer.h b/arch/arm/include/asm/arch_timer.h index 4b26d14e41b3..7c1bfc0aea0c 100644 --- a/arch/arm/include/asm/arch_timer.h +++ b/arch/arm/include/asm/arch_timer.h @@ -17,8 +17,7 @@ int arch_timer_arch_init(void); * nicely work out which register we want, and chuck away the rest of * the code. At least it does so with a recent GCC (4.6.3). */ -static __always_inline -void arch_timer_reg_write_cp15(int access, enum arch_timer_reg reg, u32 val) +static inline void arch_timer_reg_write(const int access, const int reg, u32 val) { if (access == ARCH_TIMER_PHYS_ACCESS) { switch (reg) { @@ -29,7 +28,9 @@ void arch_timer_reg_write_cp15(int access, enum arch_timer_reg reg, u32 val) asm volatile("mcr p15, 0, %0, c14, c2, 0" : : "r" (val)); break; } - } else if (access == ARCH_TIMER_VIRT_ACCESS) { + } + + if (access == ARCH_TIMER_VIRT_ACCESS) { switch (reg) { case ARCH_TIMER_REG_CTRL: asm volatile("mcr p15, 0, %0, c14, c3, 1" : : "r" (val)); @@ -43,8 +44,7 @@ void arch_timer_reg_write_cp15(int access, enum arch_timer_reg reg, u32 val) isb(); } -static __always_inline -u32 arch_timer_reg_read_cp15(int access, enum arch_timer_reg reg) +static inline u32 arch_timer_reg_read(const int access, const int reg) { u32 val = 0; @@ -57,7 +57,9 @@ u32 arch_timer_reg_read_cp15(int access, enum arch_timer_reg reg) asm volatile("mrc p15, 0, %0, c14, c2, 0" : "=r" (val)); break; } - } else if (access == ARCH_TIMER_VIRT_ACCESS) { + } + + if (access == ARCH_TIMER_VIRT_ACCESS) { switch (reg) { case ARCH_TIMER_REG_CTRL: asm volatile("mrc p15, 0, %0, c14, c3, 1" : "=r" (val)); @@ -78,52 +80,35 @@ static inline u32 arch_timer_get_cntfrq(void) return val; } -static inline u64 arch_counter_get_cntvct(void) +static inline u64 arch_counter_get_cntpct(void) { u64 cval; isb(); - asm volatile("mrrc p15, 1, %Q0, %R0, c14" : "=r" (cval)); + asm volatile("mrrc p15, 0, %Q0, %R0, c14" : "=r" (cval)); return cval; } -static inline u32 arch_timer_get_cntkctl(void) +static inline u64 arch_counter_get_cntvct(void) { - u32 cntkctl; - asm volatile("mrc p15, 0, %0, c14, c1, 0" : "=r" (cntkctl)); - return cntkctl; -} + u64 cval; -static inline void arch_timer_set_cntkctl(u32 cntkctl) -{ - asm volatile("mcr p15, 0, %0, c14, c1, 0" : : "r" (cntkctl)); + isb(); + asm volatile("mrrc p15, 1, %Q0, %R0, c14" : "=r" (cval)); + return cval; } static inline void __cpuinit arch_counter_set_user_access(void) { - u32 cntkctl = arch_timer_get_cntkctl(); - - /* Disable user access to both physical/virtual counters/timers */ - /* Also disable virtual event stream */ - cntkctl &= ~(ARCH_TIMER_USR_PT_ACCESS_EN - | ARCH_TIMER_USR_VT_ACCESS_EN - | ARCH_TIMER_VIRT_EVT_EN - | ARCH_TIMER_USR_VCT_ACCESS_EN - | ARCH_TIMER_USR_PCT_ACCESS_EN); - arch_timer_set_cntkctl(cntkctl); -} + u32 cntkctl; -static inline void arch_timer_evtstrm_enable(int divider) -{ - u32 cntkctl = arch_timer_get_cntkctl(); - cntkctl &= ~ARCH_TIMER_EVT_TRIGGER_MASK; - /* Set the divider and enable virtual event stream */ - cntkctl |= (divider << ARCH_TIMER_EVT_TRIGGER_SHIFT) - | ARCH_TIMER_VIRT_EVT_EN; - arch_timer_set_cntkctl(cntkctl); - elf_hwcap |= HWCAP_EVTSTRM; -} + asm volatile("mrc p15, 0, %0, c14, c1, 0" : "=r" (cntkctl)); + /* disable user access to everything */ + cntkctl &= ~((3 << 8) | (7 << 0)); + + asm volatile("mcr p15, 0, %0, c14, c1, 0" : : "r" (cntkctl)); +} #endif #endif diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h index f0963bb79935..05ee9eebad6b 100644 --- a/arch/arm/include/asm/assembler.h +++ b/arch/arm/include/asm/assembler.h @@ -30,8 +30,8 @@ * Endian independent macros for shifting bytes within registers. */ #ifndef __ARMEB__ -#define lspull lsr -#define lspush lsl +#define pull lsr +#define push lsl #define get_byte_0 lsl #0 #define get_byte_1 lsr #8 #define get_byte_2 lsr #16 @@ -41,8 +41,8 @@ #define put_byte_2 lsl #16 #define put_byte_3 lsl #24 #else -#define lspull lsl -#define lspush lsr +#define pull lsl +#define push lsr #define get_byte_0 lsr #24 #define get_byte_1 lsr #16 #define get_byte_2 lsr #8 @@ -53,13 +53,6 @@ #define put_byte_3 lsl #0 #endif -/* Select code for any configuration running in BE8 mode */ -#ifdef CONFIG_CPU_ENDIAN_BE8 -#define ARM_BE8(code...) code -#else -#define ARM_BE8(code...) -#endif - /* * Data preload for architectures that support it */ @@ -219,9 +212,9 @@ #ifdef CONFIG_SMP #if __LINUX_ARM_ARCH__ >= 7 .ifeqs "\mode","arm" - ALT_SMP(dmb ish) + ALT_SMP(dmb) .else - ALT_SMP(W(dmb) ish) + ALT_SMP(W(dmb)) .endif #elif __LINUX_ARM_ARCH__ == 6 ALT_SMP(mcr p15, 0, r0, c7, c10, 5) @ dmb diff --git a/arch/arm/include/asm/atomic.h b/arch/arm/include/asm/atomic.h index bccea3925f11..da1c77d39327 100644 --- a/arch/arm/include/asm/atomic.h +++ b/arch/arm/include/asm/atomic.h @@ -114,8 +114,7 @@ static inline int atomic_sub_return(int i, atomic_t *v) static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new) { - int oldval; - unsigned long res; + unsigned long oldval, res; smp_mb(); @@ -239,15 +238,15 @@ static inline int __atomic_add_unless(atomic_t *v, int a, int u) #ifndef CONFIG_GENERIC_ATOMIC64 typedef struct { - long long counter; + u64 __aligned(8) counter; } atomic64_t; #define ATOMIC64_INIT(i) { (i) } #ifdef CONFIG_ARM_LPAE -static inline long long atomic64_read(const atomic64_t *v) +static inline u64 atomic64_read(const atomic64_t *v) { - long long result; + u64 result; __asm__ __volatile__("@ atomic64_read\n" " ldrd %0, %H0, [%1]" @@ -258,7 +257,7 @@ static inline long long atomic64_read(const atomic64_t *v) return result; } -static inline void atomic64_set(atomic64_t *v, long long i) +static inline void atomic64_set(atomic64_t *v, u64 i) { __asm__ __volatile__("@ atomic64_set\n" " strd %2, %H2, [%1]" @@ -267,9 +266,9 @@ static inline void atomic64_set(atomic64_t *v, long long i) ); } #else -static inline long long atomic64_read(const atomic64_t *v) +static inline u64 atomic64_read(const atomic64_t *v) { - long long result; + u64 result; __asm__ __volatile__("@ atomic64_read\n" " ldrexd %0, %H0, [%1]" @@ -280,9 +279,9 @@ static inline long long atomic64_read(const atomic64_t *v) return result; } -static inline void atomic64_set(atomic64_t *v, long long i) +static inline void atomic64_set(atomic64_t *v, u64 i) { - long long tmp; + u64 tmp; __asm__ __volatile__("@ atomic64_set\n" "1: ldrexd %0, %H0, [%2]\n" @@ -295,15 +294,15 @@ static inline void atomic64_set(atomic64_t *v, long long i) } #endif -static inline void atomic64_add(long long i, atomic64_t *v) +static inline void atomic64_add(u64 i, atomic64_t *v) { - long long result; + u64 result; unsigned long tmp; __asm__ __volatile__("@ atomic64_add\n" "1: ldrexd %0, %H0, [%3]\n" -" adds %Q0, %Q0, %Q4\n" -" adc %R0, %R0, %R4\n" +" adds %0, %0, %4\n" +" adc %H0, %H0, %H4\n" " strexd %1, %0, %H0, [%3]\n" " teq %1, #0\n" " bne 1b" @@ -312,17 +311,17 @@ static inline void atomic64_add(long long i, atomic64_t *v) : "cc"); } -static inline long long atomic64_add_return(long long i, atomic64_t *v) +static inline u64 atomic64_add_return(u64 i, atomic64_t *v) { - long long result; + u64 result; unsigned long tmp; smp_mb(); __asm__ __volatile__("@ atomic64_add_return\n" "1: ldrexd %0, %H0, [%3]\n" -" adds %Q0, %Q0, %Q4\n" -" adc %R0, %R0, %R4\n" +" adds %0, %0, %4\n" +" adc %H0, %H0, %H4\n" " strexd %1, %0, %H0, [%3]\n" " teq %1, #0\n" " bne 1b" @@ -335,15 +334,15 @@ static inline long long atomic64_add_return(long long i, atomic64_t *v) return result; } -static inline void atomic64_sub(long long i, atomic64_t *v) +static inline void atomic64_sub(u64 i, atomic64_t *v) { - long long result; + u64 result; unsigned long tmp; __asm__ __volatile__("@ atomic64_sub\n" "1: ldrexd %0, %H0, [%3]\n" -" subs %Q0, %Q0, %Q4\n" -" sbc %R0, %R0, %R4\n" +" subs %0, %0, %4\n" +" sbc %H0, %H0, %H4\n" " strexd %1, %0, %H0, [%3]\n" " teq %1, #0\n" " bne 1b" @@ -352,17 +351,17 @@ static inline void atomic64_sub(long long i, atomic64_t *v) : "cc"); } -static inline long long atomic64_sub_return(long long i, atomic64_t *v) +static inline u64 atomic64_sub_return(u64 i, atomic64_t *v) { - long long result; + u64 result; unsigned long tmp; smp_mb(); __asm__ __volatile__("@ atomic64_sub_return\n" "1: ldrexd %0, %H0, [%3]\n" -" subs %Q0, %Q0, %Q4\n" -" sbc %R0, %R0, %R4\n" +" subs %0, %0, %4\n" +" sbc %H0, %H0, %H4\n" " strexd %1, %0, %H0, [%3]\n" " teq %1, #0\n" " bne 1b" @@ -375,10 +374,9 @@ static inline long long atomic64_sub_return(long long i, atomic64_t *v) return result; } -static inline long long atomic64_cmpxchg(atomic64_t *ptr, long long old, - long long new) +static inline u64 atomic64_cmpxchg(atomic64_t *ptr, u64 old, u64 new) { - long long oldval; + u64 oldval; unsigned long res; smp_mb(); @@ -400,9 +398,9 @@ static inline long long atomic64_cmpxchg(atomic64_t *ptr, long long old, return oldval; } -static inline long long atomic64_xchg(atomic64_t *ptr, long long new) +static inline u64 atomic64_xchg(atomic64_t *ptr, u64 new) { - long long result; + u64 result; unsigned long tmp; smp_mb(); @@ -421,18 +419,18 @@ static inline long long atomic64_xchg(atomic64_t *ptr, long long new) return result; } -static inline long long atomic64_dec_if_positive(atomic64_t *v) +static inline u64 atomic64_dec_if_positive(atomic64_t *v) { - long long result; + u64 result; unsigned long tmp; smp_mb(); __asm__ __volatile__("@ atomic64_dec_if_positive\n" "1: ldrexd %0, %H0, [%3]\n" -" subs %Q0, %Q0, #1\n" -" sbc %R0, %R0, #0\n" -" teq %R0, #0\n" +" subs %0, %0, #1\n" +" sbc %H0, %H0, #0\n" +" teq %H0, #0\n" " bmi 2f\n" " strexd %1, %0, %H0, [%3]\n" " teq %1, #0\n" @@ -447,9 +445,9 @@ static inline long long atomic64_dec_if_positive(atomic64_t *v) return result; } -static inline int atomic64_add_unless(atomic64_t *v, long long a, long long u) +static inline int atomic64_add_unless(atomic64_t *v, u64 a, u64 u) { - long long val; + u64 val; unsigned long tmp; int ret = 1; @@ -461,8 +459,8 @@ static inline int atomic64_add_unless(atomic64_t *v, long long a, long long u) " teqeq %H0, %H5\n" " moveq %1, #0\n" " beq 2f\n" -" adds %Q0, %Q0, %Q6\n" -" adc %R0, %R0, %R6\n" +" adds %0, %0, %6\n" +" adc %H0, %H0, %H6\n" " strexd %2, %0, %H0, [%4]\n" " teq %2, #0\n" " bne 1b\n" diff --git a/arch/arm/include/asm/bL_switcher.h b/arch/arm/include/asm/bL_switcher.h deleted file mode 100644 index 482383b45c91..000000000000 --- a/arch/arm/include/asm/bL_switcher.h +++ /dev/null @@ -1,83 +0,0 @@ -/* - * arch/arm/include/asm/bL_switcher.h - * - * Created by: Nicolas Pitre, April 2012 - * Copyright: (C) 2012 Linaro Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef ASM_BL_SWITCHER_H -#define ASM_BL_SWITCHER_H - -#include -#include - -typedef void (*bL_switch_completion_handler)(void *cookie); - -int bL_switch_request_cb(unsigned int cpu, unsigned int new_cluster_id, - bL_switch_completion_handler completer, - void *completer_cookie); -static inline int bL_switch_request(unsigned int cpu, unsigned int new_cluster_id) -{ - return bL_switch_request_cb(cpu, new_cluster_id, NULL, NULL); -} - -/* - * Register here to be notified about runtime enabling/disabling of - * the switcher. - * - * The notifier chain is called with the switcher activation lock held: - * the switcher will not be enabled or disabled during callbacks. - * Callbacks must not call bL_switcher_{get,put}_enabled(). - */ -#define BL_NOTIFY_PRE_ENABLE 0 -#define BL_NOTIFY_POST_ENABLE 1 -#define BL_NOTIFY_PRE_DISABLE 2 -#define BL_NOTIFY_POST_DISABLE 3 - -#ifdef CONFIG_BL_SWITCHER - -void bL_switch_request_detach(unsigned int cpu, - bL_switch_completion_handler completer); - -int bL_switcher_register_notifier(struct notifier_block *nb); -int bL_switcher_unregister_notifier(struct notifier_block *nb); - -/* - * Use these functions to temporarily prevent enabling/disabling of - * the switcher. - * bL_switcher_get_enabled() returns true if the switcher is currently - * enabled. Each call to bL_switcher_get_enabled() must be followed - * by a call to bL_switcher_put_enabled(). These functions are not - * recursive. - */ -bool bL_switcher_get_enabled(void); -void bL_switcher_put_enabled(void); - -int bL_switcher_trace_trigger(void); -int bL_switcher_get_logical_index(u32 mpidr); - -#else -static void bL_switch_request_detach(unsigned int cpu, - bL_switch_completion_handler completer) { } - -static inline int bL_switcher_register_notifier(struct notifier_block *nb) -{ - return 0; -} - -static inline int bL_switcher_unregister_notifier(struct notifier_block *nb) -{ - return 0; -} - -static inline bool bL_switcher_get_enabled(void) { return false; } -static inline void bL_switcher_put_enabled(void) { } -static inline int bL_switcher_trace_trigger(void) { return 0; } -static inline int bL_switcher_get_logical_index(u32 mpidr) { return -EUNATCH; } -#endif /* CONFIG_BL_SWITCHER */ - -#endif diff --git a/arch/arm/include/asm/barrier.h b/arch/arm/include/asm/barrier.h index 2f59f7443396..8dcd9c702d90 100644 --- a/arch/arm/include/asm/barrier.h +++ b/arch/arm/include/asm/barrier.h @@ -14,27 +14,27 @@ #endif #if __LINUX_ARM_ARCH__ >= 7 -#define isb(option) __asm__ __volatile__ ("isb " #option : : : "memory") -#define dsb(option) __asm__ __volatile__ ("dsb " #option : : : "memory") -#define dmb(option) __asm__ __volatile__ ("dmb " #option : : : "memory") +#define isb() __asm__ __volatile__ ("isb" : : : "memory") +#define dsb() __asm__ __volatile__ ("dsb" : : : "memory") +#define dmb() __asm__ __volatile__ ("dmb" : : : "memory") #elif defined(CONFIG_CPU_XSC3) || __LINUX_ARM_ARCH__ == 6 -#define isb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \ +#define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \ : : "r" (0) : "memory") -#define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ +#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ : : "r" (0) : "memory") -#define dmb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \ +#define dmb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \ : : "r" (0) : "memory") #elif defined(CONFIG_CPU_FA526) -#define isb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \ +#define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \ : : "r" (0) : "memory") -#define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ +#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ : : "r" (0) : "memory") -#define dmb(x) __asm__ __volatile__ ("" : : : "memory") +#define dmb() __asm__ __volatile__ ("" : : : "memory") #else -#define isb(x) __asm__ __volatile__ ("" : : : "memory") -#define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ +#define isb() __asm__ __volatile__ ("" : : : "memory") +#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ : : "r" (0) : "memory") -#define dmb(x) __asm__ __volatile__ ("" : : : "memory") +#define dmb() __asm__ __volatile__ ("" : : : "memory") #endif #ifdef CONFIG_ARCH_HAS_BARRIERS @@ -42,7 +42,7 @@ #elif defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP) #define mb() do { dsb(); outer_sync(); } while (0) #define rmb() dsb() -#define wmb() do { dsb(st); outer_sync(); } while (0) +#define wmb() mb() #else #define mb() barrier() #define rmb() barrier() @@ -54,26 +54,11 @@ #define smp_rmb() barrier() #define smp_wmb() barrier() #else -#define smp_mb() dmb(ish) -#define smp_rmb() smp_mb() -#define smp_wmb() dmb(ishst) +#define smp_mb() dmb() +#define smp_rmb() dmb() +#define smp_wmb() dmb() #endif -#define smp_store_release(p, v) \ -do { \ - compiletime_assert_atomic_type(*p); \ - smp_mb(); \ - ACCESS_ONCE(*p) = (v); \ -} while (0) - -#define smp_load_acquire(p) \ -({ \ - typeof(*p) ___p1 = ACCESS_ONCE(*p); \ - compiletime_assert_atomic_type(*p); \ - smp_mb(); \ - ___p1; \ -}) - #define read_barrier_depends() do { } while(0) #define smp_read_barrier_depends() do { } while(0) diff --git a/arch/arm/include/asm/bug.h b/arch/arm/include/asm/bug.h index b274bde24905..7af5c6c3653a 100644 --- a/arch/arm/include/asm/bug.h +++ b/arch/arm/include/asm/bug.h @@ -2,8 +2,6 @@ #define _ASMARM_BUG_H #include -#include -#include #ifdef CONFIG_BUG @@ -14,10 +12,10 @@ */ #ifdef CONFIG_THUMB2_KERNEL #define BUG_INSTR_VALUE 0xde02 -#define BUG_INSTR(__value) __inst_thumb16(__value) +#define BUG_INSTR_TYPE ".hword " #else #define BUG_INSTR_VALUE 0xe7f001f2 -#define BUG_INSTR(__value) __inst_arm(__value) +#define BUG_INSTR_TYPE ".word " #endif @@ -35,7 +33,7 @@ #define __BUG(__file, __line, __value) \ do { \ - asm volatile("1:\t" BUG_INSTR(__value) "\n" \ + asm volatile("1:\t" BUG_INSTR_TYPE #__value "\n" \ ".pushsection .rodata.str, \"aMS\", %progbits, 1\n" \ "2:\t.asciz " #__file "\n" \ ".popsection\n" \ @@ -50,7 +48,7 @@ do { \ #define __BUG(__file, __line, __value) \ do { \ - asm volatile(BUG_INSTR(__value) "\n"); \ + asm volatile(BUG_INSTR_TYPE #__value); \ unreachable(); \ } while (0) #endif /* CONFIG_DEBUG_BUGVERBOSE */ diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h index 455e6637c881..17d0ae8672fa 100644 --- a/arch/arm/include/asm/cacheflush.h +++ b/arch/arm/include/asm/cacheflush.h @@ -16,7 +16,6 @@ #include #include #include -#include #define CACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT) @@ -213,7 +212,6 @@ extern void copy_to_user_page(struct vm_area_struct *, struct page *, static inline void __flush_icache_all(void) { __flush_icache_preferred(); - dsb(); } /* @@ -438,50 +436,4 @@ static inline void __sync_cache_range_r(volatile void *p, size_t size) #define sync_cache_w(ptr) __sync_cache_range_w(ptr, sizeof *(ptr)) #define sync_cache_r(ptr) __sync_cache_range_r(ptr, sizeof *(ptr)) -/* - * Disabling cache access for one CPU in an ARMv7 SMP system is tricky. - * To do so we must: - * - * - Clear the SCTLR.C bit to prevent further cache allocations - * - Flush the desired level of cache - * - Clear the ACTLR "SMP" bit to disable local coherency - * - * ... and so without any intervening memory access in between those steps, - * not even to the stack. - * - * WARNING -- After this has been called: - * - * - No ldrex/strex (and similar) instructions must be used. - * - The CPU is obviously no longer coherent with the other CPUs. - * - This is unlikely to work as expected if Linux is running non-secure. - * - * Note: - * - * - This is known to apply to several ARMv7 processor implementations, - * however some exceptions may exist. Caveat emptor. - * - * - The clobber list is dictated by the call to v7_flush_dcache_*. - * fp is preserved to the stack explicitly prior disabling the cache - * since adding it to the clobber list is incompatible with having - * CONFIG_FRAME_POINTER=y. ip is saved as well if ever r12-clobbering - * trampoline are inserted by the linker and to keep sp 64-bit aligned. - */ -#define v7_exit_coherency_flush(level) \ - asm volatile( \ - "stmfd sp!, {fp, ip} \n\t" \ - "mrc p15, 0, r0, c1, c0, 0 @ get SCTLR \n\t" \ - "bic r0, r0, #"__stringify(CR_C)" \n\t" \ - "mcr p15, 0, r0, c1, c0, 0 @ set SCTLR \n\t" \ - "isb \n\t" \ - "bl v7_flush_dcache_"__stringify(level)" \n\t" \ - "clrex \n\t" \ - "mrc p15, 0, r0, c1, c0, 1 @ get ACTLR \n\t" \ - "bic r0, r0, #(1 << 6) @ disable local coherency \n\t" \ - "mcr p15, 0, r0, c1, c0, 1 @ set ACTLR \n\t" \ - "isb \n\t" \ - "dsb \n\t" \ - "ldmfd sp!, {fp, ip}" \ - : : : "r0","r1","r2","r3","r4","r5","r6","r7", \ - "r9","r10","lr","memory" ) - #endif diff --git a/arch/arm/include/asm/cp15.h b/arch/arm/include/asm/cp15.h index cedd3721318b..1f3262e99d81 100644 --- a/arch/arm/include/asm/cp15.h +++ b/arch/arm/include/asm/cp15.h @@ -61,20 +61,6 @@ static inline void set_cr(unsigned int val) isb(); } -static inline unsigned int get_auxcr(void) -{ - unsigned int val; - asm("mrc p15, 0, %0, c1, c0, 1 @ get AUXCR" : "=r" (val)); - return val; -} - -static inline void set_auxcr(unsigned int val) -{ - asm volatile("mcr p15, 0, %0, c1, c0, 1 @ set AUXCR" - : : "r" (val)); - isb(); -} - #ifndef CONFIG_SMP extern void adjust_cr(unsigned long mask, unsigned long set); #endif diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h index 3392fe2d3174..dba62cb1ad08 100644 --- a/arch/arm/include/asm/cputype.h +++ b/arch/arm/include/asm/cputype.h @@ -43,18 +43,15 @@ #define ARM_CPU_IMP_ARM 0x41 #define ARM_CPU_IMP_INTEL 0x69 -/* ARM implemented processors */ -#define ARM_CPU_PART_ARM1136 0x4100b360 -#define ARM_CPU_PART_ARM1156 0x4100b560 -#define ARM_CPU_PART_ARM1176 0x4100b760 -#define ARM_CPU_PART_ARM11MPCORE 0x4100b020 -#define ARM_CPU_PART_CORTEX_A8 0x4100c080 -#define ARM_CPU_PART_CORTEX_A9 0x4100c090 -#define ARM_CPU_PART_CORTEX_A5 0x4100c050 -#define ARM_CPU_PART_CORTEX_A7 0x4100c070 -#define ARM_CPU_PART_CORTEX_A12 0x4100c0d0 -#define ARM_CPU_PART_CORTEX_A17 0x4100c0e0 -#define ARM_CPU_PART_CORTEX_A15 0x4100c0f0 +#define ARM_CPU_PART_ARM1136 0xB360 +#define ARM_CPU_PART_ARM1156 0xB560 +#define ARM_CPU_PART_ARM1176 0xB760 +#define ARM_CPU_PART_ARM11MPCORE 0xB020 +#define ARM_CPU_PART_CORTEX_A8 0xC080 +#define ARM_CPU_PART_CORTEX_A9 0xC090 +#define ARM_CPU_PART_CORTEX_A5 0xC050 +#define ARM_CPU_PART_CORTEX_A15 0xC0F0 +#define ARM_CPU_PART_CORTEX_A7 0xC070 #define ARM_CPU_XSCALE_ARCH_MASK 0xe000 #define ARM_CPU_XSCALE_ARCH_V1 0x2000 @@ -125,24 +122,14 @@ static inline unsigned int __attribute_const__ read_cpuid_implementor(void) return (read_cpuid_id() & 0xFF000000) >> 24; } -/* - * The CPU part number is meaningless without referring to the CPU - * implementer: implementers are free to define their own part numbers - * which are permitted to clash with other implementer part numbers. - */ -static inline unsigned int __attribute_const__ read_cpuid_part(void) -{ - return read_cpuid_id() & 0xff00fff0; -} - -static inline unsigned int __attribute_const__ __deprecated read_cpuid_part_number(void) +static inline unsigned int __attribute_const__ read_cpuid_part_number(void) { return read_cpuid_id() & 0xFFF0; } static inline unsigned int __attribute_const__ xscale_cpu_arch_version(void) { - return read_cpuid_id() & ARM_CPU_XSCALE_ARCH_MASK; + return read_cpuid_part_number() & ARM_CPU_XSCALE_ARCH_MASK; } static inline unsigned int __attribute_const__ read_cpuid_cachetype(void) diff --git a/arch/arm/include/asm/crypto/sha1.h b/arch/arm/include/asm/crypto/sha1.h deleted file mode 100644 index 75e6a417416b..000000000000 --- a/arch/arm/include/asm/crypto/sha1.h +++ /dev/null @@ -1,10 +0,0 @@ -#ifndef ASM_ARM_CRYPTO_SHA1_H -#define ASM_ARM_CRYPTO_SHA1_H - -#include -#include - -extern int sha1_update_arm(struct shash_desc *desc, const u8 *data, - unsigned int len); - -#endif diff --git a/arch/arm/include/asm/div64.h b/arch/arm/include/asm/div64.h index a66061aef29c..fe92ccf1d0b0 100644 --- a/arch/arm/include/asm/div64.h +++ b/arch/arm/include/asm/div64.h @@ -156,7 +156,7 @@ /* Select the best insn combination to perform the */ \ /* actual __m * __n / (__p << 64) operation. */ \ if (!__c) { \ - asm ( "umull %Q0, %R0, %Q1, %Q2\n\t" \ + asm ( "umull %Q0, %R0, %1, %Q2\n\t" \ "mov %Q0, #0" \ : "=&r" (__res) \ : "r" (__m), "r" (__n) \ diff --git a/arch/arm/include/asm/dma-contiguous.h b/arch/arm/include/asm/dma-contiguous.h index 4f8e9e5514b1..3ed37b4d93da 100644 --- a/arch/arm/include/asm/dma-contiguous.h +++ b/arch/arm/include/asm/dma-contiguous.h @@ -2,9 +2,10 @@ #define ASMARM_DMA_CONTIGUOUS_H #ifdef __KERNEL__ -#ifdef CONFIG_DMA_CMA +#ifdef CONFIG_CMA #include +#include void dma_contiguous_early_fixup(phys_addr_t base, unsigned long size); diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h index 051b7269e639..38050b1c4800 100644 --- a/arch/arm/include/asm/elf.h +++ b/arch/arm/include/asm/elf.h @@ -19,6 +19,8 @@ typedef elf_greg_t elf_gregset_t[ELF_NGREG]; typedef struct user_fp elf_fpregset_t; +#define EM_ARM 40 + #define EF_ARM_EABI_MASK 0xff000000 #define EF_ARM_EABI_UNKNOWN 0x00000000 #define EF_ARM_EABI_VER1 0x01000000 @@ -114,7 +116,7 @@ int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs); the loader. We need to make sure that it is out of the way of the program that it will "exec", and that there is sufficient room for the brk. */ -#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2) +#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3) /* When the program starts, a1 contains a pointer to a function to be registered with atexit, as per the SVR4 ABI. A value of 0 means we @@ -128,10 +130,4 @@ struct mm_struct; extern unsigned long arch_randomize_brk(struct mm_struct *mm); #define arch_randomize_brk arch_randomize_brk -#ifdef CONFIG_MMU -#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1 -struct linux_binprm; -int arch_setup_additional_pages(struct linux_binprm *, int); -#endif - #endif diff --git a/arch/arm/include/asm/fiq_glue.h b/arch/arm/include/asm/fiq_glue.h deleted file mode 100644 index a9e244f9f197..000000000000 --- a/arch/arm/include/asm/fiq_glue.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * Copyright (C) 2010 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __ASM_FIQ_GLUE_H -#define __ASM_FIQ_GLUE_H - -struct fiq_glue_handler { - void (*fiq)(struct fiq_glue_handler *h, void *regs, void *svc_sp); - void (*resume)(struct fiq_glue_handler *h); -}; -typedef void (*fiq_return_handler_t)(void); - -int fiq_glue_register_handler(struct fiq_glue_handler *handler); -int fiq_glue_set_return_handler(fiq_return_handler_t fiq_return); -int fiq_glue_clear_return_handler(fiq_return_handler_t fiq_return); - -#ifdef CONFIG_FIQ_GLUE -void fiq_glue_resume(void); -#else -static inline void fiq_glue_resume(void) {} -#endif - -#endif diff --git a/arch/arm/include/asm/ftrace.h b/arch/arm/include/asm/ftrace.h index 39eb16b0066f..f89515adac60 100644 --- a/arch/arm/include/asm/ftrace.h +++ b/arch/arm/include/asm/ftrace.h @@ -52,7 +52,15 @@ extern inline void *return_address(unsigned int level) #endif -#define ftrace_return_address(n) return_address(n) +#define HAVE_ARCH_CALLER_ADDR + +#define CALLER_ADDR0 ((unsigned long)__builtin_return_address(0)) +#define CALLER_ADDR1 ((unsigned long)return_address(1)) +#define CALLER_ADDR2 ((unsigned long)return_address(2)) +#define CALLER_ADDR3 ((unsigned long)return_address(3)) +#define CALLER_ADDR4 ((unsigned long)return_address(4)) +#define CALLER_ADDR5 ((unsigned long)return_address(5)) +#define CALLER_ADDR6 ((unsigned long)return_address(6)) #endif /* ifndef __ASSEMBLY__ */ diff --git a/arch/arm/include/asm/futex.h b/arch/arm/include/asm/futex.h index 2aff798fbef4..e42cf597f6e6 100644 --- a/arch/arm/include/asm/futex.h +++ b/arch/arm/include/asm/futex.h @@ -3,6 +3,11 @@ #ifdef __KERNEL__ +#if defined(CONFIG_CPU_USE_DOMAINS) && defined(CONFIG_SMP) +/* ARM doesn't provide unprivileged exclusive memory accessors */ +#include +#else + #include #include #include @@ -159,5 +164,6 @@ futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr) return ret; } +#endif /* !(CPU_USE_DOMAINS && SMP) */ #endif /* __KERNEL__ */ #endif /* _ASM_ARM_FUTEX_H */ diff --git a/arch/arm/include/asm/hardirq.h b/arch/arm/include/asm/hardirq.h index fe3ea776dc34..2740c2a2df63 100644 --- a/arch/arm/include/asm/hardirq.h +++ b/arch/arm/include/asm/hardirq.h @@ -5,7 +5,7 @@ #include #include -#define NR_IPI 8 +#define NR_IPI 6 typedef struct { unsigned int __softirq_pending; diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h index 0ca0f5a7c84b..3b2c40b5bfa2 100644 --- a/arch/arm/include/asm/hardware/cache-l2x0.h +++ b/arch/arm/include/asm/hardware/cache-l2x0.h @@ -66,7 +66,6 @@ #define L2X0_STNDBY_MODE_EN (1 << 0) /* Registers shifts and masks */ -#define L2X0_CACHE_ID_REV_MASK (0x3f) #define L2X0_CACHE_ID_PART_MASK (0xf << 6) #define L2X0_CACHE_ID_PART_L210 (1 << 6) #define L2X0_CACHE_ID_PART_L310 (3 << 6) @@ -107,8 +106,6 @@ #define L2X0_WAY_SIZE_SHIFT 3 -#define REV_PL310_R2P0 4 - #ifndef __ASSEMBLY__ extern void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask); #if defined(CONFIG_CACHE_L2X0) && defined(CONFIG_OF) diff --git a/arch/arm/include/asm/hardware/cp14.h b/arch/arm/include/asm/hardware/cp14.h deleted file mode 100644 index 61576dc58ede..000000000000 --- a/arch/arm/include/asm/hardware/cp14.h +++ /dev/null @@ -1,542 +0,0 @@ -/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __ASM_HARDWARE_CP14_H -#define __ASM_HARDWARE_CP14_H - -#include - -/* Accessors for CP14 registers */ -#define dbg_read(reg) RCP14_##reg() -#define dbg_write(val, reg) WCP14_##reg(val) -#define etm_read(reg) RCP14_##reg() -#define etm_write(val, reg) WCP14_##reg(val) - -/* MRC14 and MCR14 */ -#define MRC14(op1, crn, crm, op2) \ -({ \ -u32 val; \ -asm volatile("mrc p14, "#op1", %0, "#crn", "#crm", "#op2 : "=r" (val)); \ -val; \ -}) - -#define MCR14(val, op1, crn, crm, op2) \ -({ \ -asm volatile("mcr p14, "#op1", %0, "#crn", "#crm", "#op2 : : "r" (val));\ -}) - -/* - * Debug Registers - * - * Available only in DBGv7 - * DBGECR, DBGDSCCR, DBGDSMCR, DBGDRCR - * - * Available only in DBGv7.1 - * DBGBXVRm, DBGOSDLR, DBGDEVID2, DBGDEVID1 - * - * Read only - * DBGDIDR, DBGDSCRint, DBGDTRRXint, DBGDRAR, DBGOSLSR, DBGOSSRR, DBGPRSR, - * DBGPRSR, DBGDSAR, DBGAUTHSTATUS, DBGDEVID2, DBGDEVID1, DBGDEVID - * - * Write only - * DBGDTRTXint, DBGOSLAR - */ -#define RCP14_DBGDIDR() MRC14(0, c0, c0, 0) -#define RCP14_DBGDSCRint() MRC14(0, c0, c1, 0) -#define RCP14_DBGDTRRXint() MRC14(0, c0, c5, 0) -#define RCP14_DBGWFAR() MRC14(0, c0, c6, 0) -#define RCP14_DBGVCR() MRC14(0, c0, c7, 0) -#define RCP14_DBGECR() MRC14(0, c0, c9, 0) -#define RCP14_DBGDSCCR() MRC14(0, c0, c10, 0) -#define RCP14_DBGDSMCR() MRC14(0, c0, c11, 0) -#define RCP14_DBGDTRRXext() MRC14(0, c0, c0, 2) -#define RCP14_DBGDSCRext() MRC14(0, c0, c2, 2) -#define RCP14_DBGDTRTXext() MRC14(0, c0, c3, 2) -#define RCP14_DBGDRCR() MRC14(0, c0, c4, 2) -#define RCP14_DBGBVR0() MRC14(0, c0, c0, 4) -#define RCP14_DBGBVR1() MRC14(0, c0, c1, 4) -#define RCP14_DBGBVR2() MRC14(0, c0, c2, 4) -#define RCP14_DBGBVR3() MRC14(0, c0, c3, 4) -#define RCP14_DBGBVR4() MRC14(0, c0, c4, 4) -#define RCP14_DBGBVR5() MRC14(0, c0, c5, 4) -#define RCP14_DBGBVR6() MRC14(0, c0, c6, 4) -#define RCP14_DBGBVR7() MRC14(0, c0, c7, 4) -#define RCP14_DBGBVR8() MRC14(0, c0, c8, 4) -#define RCP14_DBGBVR9() MRC14(0, c0, c9, 4) -#define RCP14_DBGBVR10() MRC14(0, c0, c10, 4) -#define RCP14_DBGBVR11() MRC14(0, c0, c11, 4) -#define RCP14_DBGBVR12() MRC14(0, c0, c12, 4) -#define RCP14_DBGBVR13() MRC14(0, c0, c13, 4) -#define RCP14_DBGBVR14() MRC14(0, c0, c14, 4) -#define RCP14_DBGBVR15() MRC14(0, c0, c15, 4) -#define RCP14_DBGBCR0() MRC14(0, c0, c0, 5) -#define RCP14_DBGBCR1() MRC14(0, c0, c1, 5) -#define RCP14_DBGBCR2() MRC14(0, c0, c2, 5) -#define RCP14_DBGBCR3() MRC14(0, c0, c3, 5) -#define RCP14_DBGBCR4() MRC14(0, c0, c4, 5) -#define RCP14_DBGBCR5() MRC14(0, c0, c5, 5) -#define RCP14_DBGBCR6() MRC14(0, c0, c6, 5) -#define RCP14_DBGBCR7() MRC14(0, c0, c7, 5) -#define RCP14_DBGBCR8() MRC14(0, c0, c8, 5) -#define RCP14_DBGBCR9() MRC14(0, c0, c9, 5) -#define RCP14_DBGBCR10() MRC14(0, c0, c10, 5) -#define RCP14_DBGBCR11() MRC14(0, c0, c11, 5) -#define RCP14_DBGBCR12() MRC14(0, c0, c12, 5) -#define RCP14_DBGBCR13() MRC14(0, c0, c13, 5) -#define RCP14_DBGBCR14() MRC14(0, c0, c14, 5) -#define RCP14_DBGBCR15() MRC14(0, c0, c15, 5) -#define RCP14_DBGWVR0() MRC14(0, c0, c0, 6) -#define RCP14_DBGWVR1() MRC14(0, c0, c1, 6) -#define RCP14_DBGWVR2() MRC14(0, c0, c2, 6) -#define RCP14_DBGWVR3() MRC14(0, c0, c3, 6) -#define RCP14_DBGWVR4() MRC14(0, c0, c4, 6) -#define RCP14_DBGWVR5() MRC14(0, c0, c5, 6) -#define RCP14_DBGWVR6() MRC14(0, c0, c6, 6) -#define RCP14_DBGWVR7() MRC14(0, c0, c7, 6) -#define RCP14_DBGWVR8() MRC14(0, c0, c8, 6) -#define RCP14_DBGWVR9() MRC14(0, c0, c9, 6) -#define RCP14_DBGWVR10() MRC14(0, c0, c10, 6) -#define RCP14_DBGWVR11() MRC14(0, c0, c11, 6) -#define RCP14_DBGWVR12() MRC14(0, c0, c12, 6) -#define RCP14_DBGWVR13() MRC14(0, c0, c13, 6) -#define RCP14_DBGWVR14() MRC14(0, c0, c14, 6) -#define RCP14_DBGWVR15() MRC14(0, c0, c15, 6) -#define RCP14_DBGWCR0() MRC14(0, c0, c0, 7) -#define RCP14_DBGWCR1() MRC14(0, c0, c1, 7) -#define RCP14_DBGWCR2() MRC14(0, c0, c2, 7) -#define RCP14_DBGWCR3() MRC14(0, c0, c3, 7) -#define RCP14_DBGWCR4() MRC14(0, c0, c4, 7) -#define RCP14_DBGWCR5() MRC14(0, c0, c5, 7) -#define RCP14_DBGWCR6() MRC14(0, c0, c6, 7) -#define RCP14_DBGWCR7() MRC14(0, c0, c7, 7) -#define RCP14_DBGWCR8() MRC14(0, c0, c8, 7) -#define RCP14_DBGWCR9() MRC14(0, c0, c9, 7) -#define RCP14_DBGWCR10() MRC14(0, c0, c10, 7) -#define RCP14_DBGWCR11() MRC14(0, c0, c11, 7) -#define RCP14_DBGWCR12() MRC14(0, c0, c12, 7) -#define RCP14_DBGWCR13() MRC14(0, c0, c13, 7) -#define RCP14_DBGWCR14() MRC14(0, c0, c14, 7) -#define RCP14_DBGWCR15() MRC14(0, c0, c15, 7) -#define RCP14_DBGDRAR() MRC14(0, c1, c0, 0) -#define RCP14_DBGBXVR0() MRC14(0, c1, c0, 1) -#define RCP14_DBGBXVR1() MRC14(0, c1, c1, 1) -#define RCP14_DBGBXVR2() MRC14(0, c1, c2, 1) -#define RCP14_DBGBXVR3() MRC14(0, c1, c3, 1) -#define RCP14_DBGBXVR4() MRC14(0, c1, c4, 1) -#define RCP14_DBGBXVR5() MRC14(0, c1, c5, 1) -#define RCP14_DBGBXVR6() MRC14(0, c1, c6, 1) -#define RCP14_DBGBXVR7() MRC14(0, c1, c7, 1) -#define RCP14_DBGBXVR8() MRC14(0, c1, c8, 1) -#define RCP14_DBGBXVR9() MRC14(0, c1, c9, 1) -#define RCP14_DBGBXVR10() MRC14(0, c1, c10, 1) -#define RCP14_DBGBXVR11() MRC14(0, c1, c11, 1) -#define RCP14_DBGBXVR12() MRC14(0, c1, c12, 1) -#define RCP14_DBGBXVR13() MRC14(0, c1, c13, 1) -#define RCP14_DBGBXVR14() MRC14(0, c1, c14, 1) -#define RCP14_DBGBXVR15() MRC14(0, c1, c15, 1) -#define RCP14_DBGOSLSR() MRC14(0, c1, c1, 4) -#define RCP14_DBGOSSRR() MRC14(0, c1, c2, 4) -#define RCP14_DBGOSDLR() MRC14(0, c1, c3, 4) -#define RCP14_DBGPRCR() MRC14(0, c1, c4, 4) -#define RCP14_DBGPRSR() MRC14(0, c1, c5, 4) -#define RCP14_DBGDSAR() MRC14(0, c2, c0, 0) -#define RCP14_DBGITCTRL() MRC14(0, c7, c0, 4) -#define RCP14_DBGCLAIMSET() MRC14(0, c7, c8, 6) -#define RCP14_DBGCLAIMCLR() MRC14(0, c7, c9, 6) -#define RCP14_DBGAUTHSTATUS() MRC14(0, c7, c14, 6) -#define RCP14_DBGDEVID2() MRC14(0, c7, c0, 7) -#define RCP14_DBGDEVID1() MRC14(0, c7, c1, 7) -#define RCP14_DBGDEVID() MRC14(0, c7, c2, 7) - -#define WCP14_DBGDTRTXint(val) MCR14(val, 0, c0, c5, 0) -#define WCP14_DBGWFAR(val) MCR14(val, 0, c0, c6, 0) -#define WCP14_DBGVCR(val) MCR14(val, 0, c0, c7, 0) -#define WCP14_DBGECR(val) MCR14(val, 0, c0, c9, 0) -#define WCP14_DBGDSCCR(val) MCR14(val, 0, c0, c10, 0) -#define WCP14_DBGDSMCR(val) MCR14(val, 0, c0, c11, 0) -#define WCP14_DBGDTRRXext(val) MCR14(val, 0, c0, c0, 2) -#define WCP14_DBGDSCRext(val) MCR14(val, 0, c0, c2, 2) -#define WCP14_DBGDTRTXext(val) MCR14(val, 0, c0, c3, 2) -#define WCP14_DBGDRCR(val) MCR14(val, 0, c0, c4, 2) -#define WCP14_DBGBVR0(val) MCR14(val, 0, c0, c0, 4) -#define WCP14_DBGBVR1(val) MCR14(val, 0, c0, c1, 4) -#define WCP14_DBGBVR2(val) MCR14(val, 0, c0, c2, 4) -#define WCP14_DBGBVR3(val) MCR14(val, 0, c0, c3, 4) -#define WCP14_DBGBVR4(val) MCR14(val, 0, c0, c4, 4) -#define WCP14_DBGBVR5(val) MCR14(val, 0, c0, c5, 4) -#define WCP14_DBGBVR6(val) MCR14(val, 0, c0, c6, 4) -#define WCP14_DBGBVR7(val) MCR14(val, 0, c0, c7, 4) -#define WCP14_DBGBVR8(val) MCR14(val, 0, c0, c8, 4) -#define WCP14_DBGBVR9(val) MCR14(val, 0, c0, c9, 4) -#define WCP14_DBGBVR10(val) MCR14(val, 0, c0, c10, 4) -#define WCP14_DBGBVR11(val) MCR14(val, 0, c0, c11, 4) -#define WCP14_DBGBVR12(val) MCR14(val, 0, c0, c12, 4) -#define WCP14_DBGBVR13(val) MCR14(val, 0, c0, c13, 4) -#define WCP14_DBGBVR14(val) MCR14(val, 0, c0, c14, 4) -#define WCP14_DBGBVR15(val) MCR14(val, 0, c0, c15, 4) -#define WCP14_DBGBCR0(val) MCR14(val, 0, c0, c0, 5) -#define WCP14_DBGBCR1(val) MCR14(val, 0, c0, c1, 5) -#define WCP14_DBGBCR2(val) MCR14(val, 0, c0, c2, 5) -#define WCP14_DBGBCR3(val) MCR14(val, 0, c0, c3, 5) -#define WCP14_DBGBCR4(val) MCR14(val, 0, c0, c4, 5) -#define WCP14_DBGBCR5(val) MCR14(val, 0, c0, c5, 5) -#define WCP14_DBGBCR6(val) MCR14(val, 0, c0, c6, 5) -#define WCP14_DBGBCR7(val) MCR14(val, 0, c0, c7, 5) -#define WCP14_DBGBCR8(val) MCR14(val, 0, c0, c8, 5) -#define WCP14_DBGBCR9(val) MCR14(val, 0, c0, c9, 5) -#define WCP14_DBGBCR10(val) MCR14(val, 0, c0, c10, 5) -#define WCP14_DBGBCR11(val) MCR14(val, 0, c0, c11, 5) -#define WCP14_DBGBCR12(val) MCR14(val, 0, c0, c12, 5) -#define WCP14_DBGBCR13(val) MCR14(val, 0, c0, c13, 5) -#define WCP14_DBGBCR14(val) MCR14(val, 0, c0, c14, 5) -#define WCP14_DBGBCR15(val) MCR14(val, 0, c0, c15, 5) -#define WCP14_DBGWVR0(val) MCR14(val, 0, c0, c0, 6) -#define WCP14_DBGWVR1(val) MCR14(val, 0, c0, c1, 6) -#define WCP14_DBGWVR2(val) MCR14(val, 0, c0, c2, 6) -#define WCP14_DBGWVR3(val) MCR14(val, 0, c0, c3, 6) -#define WCP14_DBGWVR4(val) MCR14(val, 0, c0, c4, 6) -#define WCP14_DBGWVR5(val) MCR14(val, 0, c0, c5, 6) -#define WCP14_DBGWVR6(val) MCR14(val, 0, c0, c6, 6) -#define WCP14_DBGWVR7(val) MCR14(val, 0, c0, c7, 6) -#define WCP14_DBGWVR8(val) MCR14(val, 0, c0, c8, 6) -#define WCP14_DBGWVR9(val) MCR14(val, 0, c0, c9, 6) -#define WCP14_DBGWVR10(val) MCR14(val, 0, c0, c10, 6) -#define WCP14_DBGWVR11(val) MCR14(val, 0, c0, c11, 6) -#define WCP14_DBGWVR12(val) MCR14(val, 0, c0, c12, 6) -#define WCP14_DBGWVR13(val) MCR14(val, 0, c0, c13, 6) -#define WCP14_DBGWVR14(val) MCR14(val, 0, c0, c14, 6) -#define WCP14_DBGWVR15(val) MCR14(val, 0, c0, c15, 6) -#define WCP14_DBGWCR0(val) MCR14(val, 0, c0, c0, 7) -#define WCP14_DBGWCR1(val) MCR14(val, 0, c0, c1, 7) -#define WCP14_DBGWCR2(val) MCR14(val, 0, c0, c2, 7) -#define WCP14_DBGWCR3(val) MCR14(val, 0, c0, c3, 7) -#define WCP14_DBGWCR4(val) MCR14(val, 0, c0, c4, 7) -#define WCP14_DBGWCR5(val) MCR14(val, 0, c0, c5, 7) -#define WCP14_DBGWCR6(val) MCR14(val, 0, c0, c6, 7) -#define WCP14_DBGWCR7(val) MCR14(val, 0, c0, c7, 7) -#define WCP14_DBGWCR8(val) MCR14(val, 0, c0, c8, 7) -#define WCP14_DBGWCR9(val) MCR14(val, 0, c0, c9, 7) -#define WCP14_DBGWCR10(val) MCR14(val, 0, c0, c10, 7) -#define WCP14_DBGWCR11(val) MCR14(val, 0, c0, c11, 7) -#define WCP14_DBGWCR12(val) MCR14(val, 0, c0, c12, 7) -#define WCP14_DBGWCR13(val) MCR14(val, 0, c0, c13, 7) -#define WCP14_DBGWCR14(val) MCR14(val, 0, c0, c14, 7) -#define WCP14_DBGWCR15(val) MCR14(val, 0, c0, c15, 7) -#define WCP14_DBGBXVR0(val) MCR14(val, 0, c1, c0, 1) -#define WCP14_DBGBXVR1(val) MCR14(val, 0, c1, c1, 1) -#define WCP14_DBGBXVR2(val) MCR14(val, 0, c1, c2, 1) -#define WCP14_DBGBXVR3(val) MCR14(val, 0, c1, c3, 1) -#define WCP14_DBGBXVR4(val) MCR14(val, 0, c1, c4, 1) -#define WCP14_DBGBXVR5(val) MCR14(val, 0, c1, c5, 1) -#define WCP14_DBGBXVR6(val) MCR14(val, 0, c1, c6, 1) -#define WCP14_DBGBXVR7(val) MCR14(val, 0, c1, c7, 1) -#define WCP14_DBGBXVR8(val) MCR14(val, 0, c1, c8, 1) -#define WCP14_DBGBXVR9(val) MCR14(val, 0, c1, c9, 1) -#define WCP14_DBGBXVR10(val) MCR14(val, 0, c1, c10, 1) -#define WCP14_DBGBXVR11(val) MCR14(val, 0, c1, c11, 1) -#define WCP14_DBGBXVR12(val) MCR14(val, 0, c1, c12, 1) -#define WCP14_DBGBXVR13(val) MCR14(val, 0, c1, c13, 1) -#define WCP14_DBGBXVR14(val) MCR14(val, 0, c1, c14, 1) -#define WCP14_DBGBXVR15(val) MCR14(val, 0, c1, c15, 1) -#define WCP14_DBGOSLAR(val) MCR14(val, 0, c1, c0, 4) -#define WCP14_DBGOSSRR(val) MCR14(val, 0, c1, c2, 4) -#define WCP14_DBGOSDLR(val) MCR14(val, 0, c1, c3, 4) -#define WCP14_DBGPRCR(val) MCR14(val, 0, c1, c4, 4) -#define WCP14_DBGITCTRL(val) MCR14(val, 0, c7, c0, 4) -#define WCP14_DBGCLAIMSET(val) MCR14(val, 0, c7, c8, 6) -#define WCP14_DBGCLAIMCLR(val) MCR14(val, 0, c7, c9, 6) - -/* - * ETM Registers - * - * Available only in ETMv3.3, 3.4, 3.5 - * ETMASICCR, ETMTECR2, ETMFFRR, ETMVDEVR, ETMVDCR1, ETMVDCR2, ETMVDCR3, - * ETMDCVRn, ETMDCMRn - * - * Available only in ETMv3.5 as read only - * ETMIDR2 - * - * Available only in ETMv3.5, PFTv1.0, 1.1 - * ETMTSEVR, ETMVMIDCVR, ETMPDCR - * - * Read only - * ETMCCR, ETMSCR, ETMIDR, ETMCCER, ETMOSLSR - * ETMLSR, ETMAUTHSTATUS, ETMDEVID, ETMDEVTYPE, ETMPIDR4, ETMPIDR5, ETMPIDR6, - * ETMPIDR7, ETMPIDR0, ETMPIDR1, ETMPIDR2, ETMPIDR2, ETMPIDR3, ETMCIDR0, - * ETMCIDR1, ETMCIDR2, ETMCIDR3 - * - * Write only - * ETMOSLAR, ETMLAR - * Note: ETMCCER[11] controls WO nature of certain regs. Refer ETM arch spec. - */ -#define RCP14_ETMCR() MRC14(1, c0, c0, 0) -#define RCP14_ETMCCR() MRC14(1, c0, c1, 0) -#define RCP14_ETMTRIGGER() MRC14(1, c0, c2, 0) -#define RCP14_ETMASICCR() MRC14(1, c0, c3, 0) -#define RCP14_ETMSR() MRC14(1, c0, c4, 0) -#define RCP14_ETMSCR() MRC14(1, c0, c5, 0) -#define RCP14_ETMTSSCR() MRC14(1, c0, c6, 0) -#define RCP14_ETMTECR2() MRC14(1, c0, c7, 0) -#define RCP14_ETMTEEVR() MRC14(1, c0, c8, 0) -#define RCP14_ETMTECR1() MRC14(1, c0, c9, 0) -#define RCP14_ETMFFRR() MRC14(1, c0, c10, 0) -#define RCP14_ETMFFLR() MRC14(1, c0, c11, 0) -#define RCP14_ETMVDEVR() MRC14(1, c0, c12, 0) -#define RCP14_ETMVDCR1() MRC14(1, c0, c13, 0) -#define RCP14_ETMVDCR2() MRC14(1, c0, c14, 0) -#define RCP14_ETMVDCR3() MRC14(1, c0, c15, 0) -#define RCP14_ETMACVR0() MRC14(1, c0, c0, 1) -#define RCP14_ETMACVR1() MRC14(1, c0, c1, 1) -#define RCP14_ETMACVR2() MRC14(1, c0, c2, 1) -#define RCP14_ETMACVR3() MRC14(1, c0, c3, 1) -#define RCP14_ETMACVR4() MRC14(1, c0, c4, 1) -#define RCP14_ETMACVR5() MRC14(1, c0, c5, 1) -#define RCP14_ETMACVR6() MRC14(1, c0, c6, 1) -#define RCP14_ETMACVR7() MRC14(1, c0, c7, 1) -#define RCP14_ETMACVR8() MRC14(1, c0, c8, 1) -#define RCP14_ETMACVR9() MRC14(1, c0, c9, 1) -#define RCP14_ETMACVR10() MRC14(1, c0, c10, 1) -#define RCP14_ETMACVR11() MRC14(1, c0, c11, 1) -#define RCP14_ETMACVR12() MRC14(1, c0, c12, 1) -#define RCP14_ETMACVR13() MRC14(1, c0, c13, 1) -#define RCP14_ETMACVR14() MRC14(1, c0, c14, 1) -#define RCP14_ETMACVR15() MRC14(1, c0, c15, 1) -#define RCP14_ETMACTR0() MRC14(1, c0, c0, 2) -#define RCP14_ETMACTR1() MRC14(1, c0, c1, 2) -#define RCP14_ETMACTR2() MRC14(1, c0, c2, 2) -#define RCP14_ETMACTR3() MRC14(1, c0, c3, 2) -#define RCP14_ETMACTR4() MRC14(1, c0, c4, 2) -#define RCP14_ETMACTR5() MRC14(1, c0, c5, 2) -#define RCP14_ETMACTR6() MRC14(1, c0, c6, 2) -#define RCP14_ETMACTR7() MRC14(1, c0, c7, 2) -#define RCP14_ETMACTR8() MRC14(1, c0, c8, 2) -#define RCP14_ETMACTR9() MRC14(1, c0, c9, 2) -#define RCP14_ETMACTR10() MRC14(1, c0, c10, 2) -#define RCP14_ETMACTR11() MRC14(1, c0, c11, 2) -#define RCP14_ETMACTR12() MRC14(1, c0, c12, 2) -#define RCP14_ETMACTR13() MRC14(1, c0, c13, 2) -#define RCP14_ETMACTR14() MRC14(1, c0, c14, 2) -#define RCP14_ETMACTR15() MRC14(1, c0, c15, 2) -#define RCP14_ETMDCVR0() MRC14(1, c0, c0, 3) -#define RCP14_ETMDCVR2() MRC14(1, c0, c2, 3) -#define RCP14_ETMDCVR4() MRC14(1, c0, c4, 3) -#define RCP14_ETMDCVR6() MRC14(1, c0, c6, 3) -#define RCP14_ETMDCVR8() MRC14(1, c0, c8, 3) -#define RCP14_ETMDCVR10() MRC14(1, c0, c10, 3) -#define RCP14_ETMDCVR12() MRC14(1, c0, c12, 3) -#define RCP14_ETMDCVR14() MRC14(1, c0, c14, 3) -#define RCP14_ETMDCMR0() MRC14(1, c0, c0, 4) -#define RCP14_ETMDCMR2() MRC14(1, c0, c2, 4) -#define RCP14_ETMDCMR4() MRC14(1, c0, c4, 4) -#define RCP14_ETMDCMR6() MRC14(1, c0, c6, 4) -#define RCP14_ETMDCMR8() MRC14(1, c0, c8, 4) -#define RCP14_ETMDCMR10() MRC14(1, c0, c10, 4) -#define RCP14_ETMDCMR12() MRC14(1, c0, c12, 4) -#define RCP14_ETMDCMR14() MRC14(1, c0, c14, 4) -#define RCP14_ETMCNTRLDVR0() MRC14(1, c0, c0, 5) -#define RCP14_ETMCNTRLDVR1() MRC14(1, c0, c1, 5) -#define RCP14_ETMCNTRLDVR2() MRC14(1, c0, c2, 5) -#define RCP14_ETMCNTRLDVR3() MRC14(1, c0, c3, 5) -#define RCP14_ETMCNTENR0() MRC14(1, c0, c4, 5) -#define RCP14_ETMCNTENR1() MRC14(1, c0, c5, 5) -#define RCP14_ETMCNTENR2() MRC14(1, c0, c6, 5) -#define RCP14_ETMCNTENR3() MRC14(1, c0, c7, 5) -#define RCP14_ETMCNTRLDEVR0() MRC14(1, c0, c8, 5) -#define RCP14_ETMCNTRLDEVR1() MRC14(1, c0, c9, 5) -#define RCP14_ETMCNTRLDEVR2() MRC14(1, c0, c10, 5) -#define RCP14_ETMCNTRLDEVR3() MRC14(1, c0, c11, 5) -#define RCP14_ETMCNTVR0() MRC14(1, c0, c12, 5) -#define RCP14_ETMCNTVR1() MRC14(1, c0, c13, 5) -#define RCP14_ETMCNTVR2() MRC14(1, c0, c14, 5) -#define RCP14_ETMCNTVR3() MRC14(1, c0, c15, 5) -#define RCP14_ETMSQ12EVR() MRC14(1, c0, c0, 6) -#define RCP14_ETMSQ21EVR() MRC14(1, c0, c1, 6) -#define RCP14_ETMSQ23EVR() MRC14(1, c0, c2, 6) -#define RCP14_ETMSQ31EVR() MRC14(1, c0, c3, 6) -#define RCP14_ETMSQ32EVR() MRC14(1, c0, c4, 6) -#define RCP14_ETMSQ13EVR() MRC14(1, c0, c5, 6) -#define RCP14_ETMSQR() MRC14(1, c0, c7, 6) -#define RCP14_ETMEXTOUTEVR0() MRC14(1, c0, c8, 6) -#define RCP14_ETMEXTOUTEVR1() MRC14(1, c0, c9, 6) -#define RCP14_ETMEXTOUTEVR2() MRC14(1, c0, c10, 6) -#define RCP14_ETMEXTOUTEVR3() MRC14(1, c0, c11, 6) -#define RCP14_ETMCIDCVR0() MRC14(1, c0, c12, 6) -#define RCP14_ETMCIDCVR1() MRC14(1, c0, c13, 6) -#define RCP14_ETMCIDCVR2() MRC14(1, c0, c14, 6) -#define RCP14_ETMCIDCMR() MRC14(1, c0, c15, 6) -#define RCP14_ETMIMPSPEC0() MRC14(1, c0, c0, 7) -#define RCP14_ETMIMPSPEC1() MRC14(1, c0, c1, 7) -#define RCP14_ETMIMPSPEC2() MRC14(1, c0, c2, 7) -#define RCP14_ETMIMPSPEC3() MRC14(1, c0, c3, 7) -#define RCP14_ETMIMPSPEC4() MRC14(1, c0, c4, 7) -#define RCP14_ETMIMPSPEC5() MRC14(1, c0, c5, 7) -#define RCP14_ETMIMPSPEC6() MRC14(1, c0, c6, 7) -#define RCP14_ETMIMPSPEC7() MRC14(1, c0, c7, 7) -#define RCP14_ETMSYNCFR() MRC14(1, c0, c8, 7) -#define RCP14_ETMIDR() MRC14(1, c0, c9, 7) -#define RCP14_ETMCCER() MRC14(1, c0, c10, 7) -#define RCP14_ETMEXTINSELR() MRC14(1, c0, c11, 7) -#define RCP14_ETMTESSEICR() MRC14(1, c0, c12, 7) -#define RCP14_ETMEIBCR() MRC14(1, c0, c13, 7) -#define RCP14_ETMTSEVR() MRC14(1, c0, c14, 7) -#define RCP14_ETMAUXCR() MRC14(1, c0, c15, 7) -#define RCP14_ETMTRACEIDR() MRC14(1, c1, c0, 0) -#define RCP14_ETMIDR2() MRC14(1, c1, c2, 0) -#define RCP14_ETMVMIDCVR() MRC14(1, c1, c0, 1) -#define RCP14_ETMOSLSR() MRC14(1, c1, c1, 4) -/* Not available in PFTv1.1 */ -#define RCP14_ETMOSSRR() MRC14(1, c1, c2, 4) -#define RCP14_ETMPDCR() MRC14(1, c1, c4, 4) -#define RCP14_ETMPDSR() MRC14(1, c1, c5, 4) -#define RCP14_ETMITCTRL() MRC14(1, c7, c0, 4) -#define RCP14_ETMCLAIMSET() MRC14(1, c7, c8, 6) -#define RCP14_ETMCLAIMCLR() MRC14(1, c7, c9, 6) -#define RCP14_ETMLSR() MRC14(1, c7, c13, 6) -#define RCP14_ETMAUTHSTATUS() MRC14(1, c7, c14, 6) -#define RCP14_ETMDEVID() MRC14(1, c7, c2, 7) -#define RCP14_ETMDEVTYPE() MRC14(1, c7, c3, 7) -#define RCP14_ETMPIDR4() MRC14(1, c7, c4, 7) -#define RCP14_ETMPIDR5() MRC14(1, c7, c5, 7) -#define RCP14_ETMPIDR6() MRC14(1, c7, c6, 7) -#define RCP14_ETMPIDR7() MRC14(1, c7, c7, 7) -#define RCP14_ETMPIDR0() MRC14(1, c7, c8, 7) -#define RCP14_ETMPIDR1() MRC14(1, c7, c9, 7) -#define RCP14_ETMPIDR2() MRC14(1, c7, c10, 7) -#define RCP14_ETMPIDR3() MRC14(1, c7, c11, 7) -#define RCP14_ETMCIDR0() MRC14(1, c7, c12, 7) -#define RCP14_ETMCIDR1() MRC14(1, c7, c13, 7) -#define RCP14_ETMCIDR2() MRC14(1, c7, c14, 7) -#define RCP14_ETMCIDR3() MRC14(1, c7, c15, 7) - -#define WCP14_ETMCR(val) MCR14(val, 1, c0, c0, 0) -#define WCP14_ETMTRIGGER(val) MCR14(val, 1, c0, c2, 0) -#define WCP14_ETMASICCR(val) MCR14(val, 1, c0, c3, 0) -#define WCP14_ETMSR(val) MCR14(val, 1, c0, c4, 0) -#define WCP14_ETMTSSCR(val) MCR14(val, 1, c0, c6, 0) -#define WCP14_ETMTECR2(val) MCR14(val, 1, c0, c7, 0) -#define WCP14_ETMTEEVR(val) MCR14(val, 1, c0, c8, 0) -#define WCP14_ETMTECR1(val) MCR14(val, 1, c0, c9, 0) -#define WCP14_ETMFFRR(val) MCR14(val, 1, c0, c10, 0) -#define WCP14_ETMFFLR(val) MCR14(val, 1, c0, c11, 0) -#define WCP14_ETMVDEVR(val) MCR14(val, 1, c0, c12, 0) -#define WCP14_ETMVDCR1(val) MCR14(val, 1, c0, c13, 0) -#define WCP14_ETMVDCR2(val) MCR14(val, 1, c0, c14, 0) -#define WCP14_ETMVDCR3(val) MCR14(val, 1, c0, c15, 0) -#define WCP14_ETMACVR0(val) MCR14(val, 1, c0, c0, 1) -#define WCP14_ETMACVR1(val) MCR14(val, 1, c0, c1, 1) -#define WCP14_ETMACVR2(val) MCR14(val, 1, c0, c2, 1) -#define WCP14_ETMACVR3(val) MCR14(val, 1, c0, c3, 1) -#define WCP14_ETMACVR4(val) MCR14(val, 1, c0, c4, 1) -#define WCP14_ETMACVR5(val) MCR14(val, 1, c0, c5, 1) -#define WCP14_ETMACVR6(val) MCR14(val, 1, c0, c6, 1) -#define WCP14_ETMACVR7(val) MCR14(val, 1, c0, c7, 1) -#define WCP14_ETMACVR8(val) MCR14(val, 1, c0, c8, 1) -#define WCP14_ETMACVR9(val) MCR14(val, 1, c0, c9, 1) -#define WCP14_ETMACVR10(val) MCR14(val, 1, c0, c10, 1) -#define WCP14_ETMACVR11(val) MCR14(val, 1, c0, c11, 1) -#define WCP14_ETMACVR12(val) MCR14(val, 1, c0, c12, 1) -#define WCP14_ETMACVR13(val) MCR14(val, 1, c0, c13, 1) -#define WCP14_ETMACVR14(val) MCR14(val, 1, c0, c14, 1) -#define WCP14_ETMACVR15(val) MCR14(val, 1, c0, c15, 1) -#define WCP14_ETMACTR0(val) MCR14(val, 1, c0, c0, 2) -#define WCP14_ETMACTR1(val) MCR14(val, 1, c0, c1, 2) -#define WCP14_ETMACTR2(val) MCR14(val, 1, c0, c2, 2) -#define WCP14_ETMACTR3(val) MCR14(val, 1, c0, c3, 2) -#define WCP14_ETMACTR4(val) MCR14(val, 1, c0, c4, 2) -#define WCP14_ETMACTR5(val) MCR14(val, 1, c0, c5, 2) -#define WCP14_ETMACTR6(val) MCR14(val, 1, c0, c6, 2) -#define WCP14_ETMACTR7(val) MCR14(val, 1, c0, c7, 2) -#define WCP14_ETMACTR8(val) MCR14(val, 1, c0, c8, 2) -#define WCP14_ETMACTR9(val) MCR14(val, 1, c0, c9, 2) -#define WCP14_ETMACTR10(val) MCR14(val, 1, c0, c10, 2) -#define WCP14_ETMACTR11(val) MCR14(val, 1, c0, c11, 2) -#define WCP14_ETMACTR12(val) MCR14(val, 1, c0, c12, 2) -#define WCP14_ETMACTR13(val) MCR14(val, 1, c0, c13, 2) -#define WCP14_ETMACTR14(val) MCR14(val, 1, c0, c14, 2) -#define WCP14_ETMACTR15(val) MCR14(val, 1, c0, c15, 2) -#define WCP14_ETMDCVR0(val) MCR14(val, 1, c0, c0, 3) -#define WCP14_ETMDCVR2(val) MCR14(val, 1, c0, c2, 3) -#define WCP14_ETMDCVR4(val) MCR14(val, 1, c0, c4, 3) -#define WCP14_ETMDCVR6(val) MCR14(val, 1, c0, c6, 3) -#define WCP14_ETMDCVR8(val) MCR14(val, 1, c0, c8, 3) -#define WCP14_ETMDCVR10(val) MCR14(val, 1, c0, c10, 3) -#define WCP14_ETMDCVR12(val) MCR14(val, 1, c0, c12, 3) -#define WCP14_ETMDCVR14(val) MCR14(val, 1, c0, c14, 3) -#define WCP14_ETMDCMR0(val) MCR14(val, 1, c0, c0, 4) -#define WCP14_ETMDCMR2(val) MCR14(val, 1, c0, c2, 4) -#define WCP14_ETMDCMR4(val) MCR14(val, 1, c0, c4, 4) -#define WCP14_ETMDCMR6(val) MCR14(val, 1, c0, c6, 4) -#define WCP14_ETMDCMR8(val) MCR14(val, 1, c0, c8, 4) -#define WCP14_ETMDCMR10(val) MCR14(val, 1, c0, c10, 4) -#define WCP14_ETMDCMR12(val) MCR14(val, 1, c0, c12, 4) -#define WCP14_ETMDCMR14(val) MCR14(val, 1, c0, c14, 4) -#define WCP14_ETMCNTRLDVR0(val) MCR14(val, 1, c0, c0, 5) -#define WCP14_ETMCNTRLDVR1(val) MCR14(val, 1, c0, c1, 5) -#define WCP14_ETMCNTRLDVR2(val) MCR14(val, 1, c0, c2, 5) -#define WCP14_ETMCNTRLDVR3(val) MCR14(val, 1, c0, c3, 5) -#define WCP14_ETMCNTENR0(val) MCR14(val, 1, c0, c4, 5) -#define WCP14_ETMCNTENR1(val) MCR14(val, 1, c0, c5, 5) -#define WCP14_ETMCNTENR2(val) MCR14(val, 1, c0, c6, 5) -#define WCP14_ETMCNTENR3(val) MCR14(val, 1, c0, c7, 5) -#define WCP14_ETMCNTRLDEVR0(val) MCR14(val, 1, c0, c8, 5) -#define WCP14_ETMCNTRLDEVR1(val) MCR14(val, 1, c0, c9, 5) -#define WCP14_ETMCNTRLDEVR2(val) MCR14(val, 1, c0, c10, 5) -#define WCP14_ETMCNTRLDEVR3(val) MCR14(val, 1, c0, c11, 5) -#define WCP14_ETMCNTVR0(val) MCR14(val, 1, c0, c12, 5) -#define WCP14_ETMCNTVR1(val) MCR14(val, 1, c0, c13, 5) -#define WCP14_ETMCNTVR2(val) MCR14(val, 1, c0, c14, 5) -#define WCP14_ETMCNTVR3(val) MCR14(val, 1, c0, c15, 5) -#define WCP14_ETMSQ12EVR(val) MCR14(val, 1, c0, c0, 6) -#define WCP14_ETMSQ21EVR(val) MCR14(val, 1, c0, c1, 6) -#define WCP14_ETMSQ23EVR(val) MCR14(val, 1, c0, c2, 6) -#define WCP14_ETMSQ31EVR(val) MCR14(val, 1, c0, c3, 6) -#define WCP14_ETMSQ32EVR(val) MCR14(val, 1, c0, c4, 6) -#define WCP14_ETMSQ13EVR(val) MCR14(val, 1, c0, c5, 6) -#define WCP14_ETMSQR(val) MCR14(val, 1, c0, c7, 6) -#define WCP14_ETMEXTOUTEVR0(val) MCR14(val, 1, c0, c8, 6) -#define WCP14_ETMEXTOUTEVR1(val) MCR14(val, 1, c0, c9, 6) -#define WCP14_ETMEXTOUTEVR2(val) MCR14(val, 1, c0, c10, 6) -#define WCP14_ETMEXTOUTEVR3(val) MCR14(val, 1, c0, c11, 6) -#define WCP14_ETMCIDCVR0(val) MCR14(val, 1, c0, c12, 6) -#define WCP14_ETMCIDCVR1(val) MCR14(val, 1, c0, c13, 6) -#define WCP14_ETMCIDCVR2(val) MCR14(val, 1, c0, c14, 6) -#define WCP14_ETMCIDCMR(val) MCR14(val, 1, c0, c15, 6) -#define WCP14_ETMIMPSPEC0(val) MCR14(val, 1, c0, c0, 7) -#define WCP14_ETMIMPSPEC1(val) MCR14(val, 1, c0, c1, 7) -#define WCP14_ETMIMPSPEC2(val) MCR14(val, 1, c0, c2, 7) -#define WCP14_ETMIMPSPEC3(val) MCR14(val, 1, c0, c3, 7) -#define WCP14_ETMIMPSPEC4(val) MCR14(val, 1, c0, c4, 7) -#define WCP14_ETMIMPSPEC5(val) MCR14(val, 1, c0, c5, 7) -#define WCP14_ETMIMPSPEC6(val) MCR14(val, 1, c0, c6, 7) -#define WCP14_ETMIMPSPEC7(val) MCR14(val, 1, c0, c7, 7) -/* Can be read only in ETMv3.4, ETMv3.5 */ -#define WCP14_ETMSYNCFR(val) MCR14(val, 1, c0, c8, 7) -#define WCP14_ETMEXTINSELR(val) MCR14(val, 1, c0, c11, 7) -#define WCP14_ETMTESSEICR(val) MCR14(val, 1, c0, c12, 7) -#define WCP14_ETMEIBCR(val) MCR14(val, 1, c0, c13, 7) -#define WCP14_ETMTSEVR(val) MCR14(val, 1, c0, c14, 7) -#define WCP14_ETMAUXCR(val) MCR14(val, 1, c0, c15, 7) -#define WCP14_ETMTRACEIDR(val) MCR14(val, 1, c1, c0, 0) -#define WCP14_ETMIDR2(val) MCR14(val, 1, c1, c2, 0) -#define WCP14_ETMVMIDCVR(val) MCR14(val, 1, c1, c0, 1) -#define WCP14_ETMOSLAR(val) MCR14(val, 1, c1, c0, 4) -/* Not available in PFTv1.1 */ -#define WCP14_ETMOSSRR(val) MCR14(val, 1, c1, c2, 4) -#define WCP14_ETMPDCR(val) MCR14(val, 1, c1, c4, 4) -#define WCP14_ETMPDSR(val) MCR14(val, 1, c1, c5, 4) -#define WCP14_ETMITCTRL(val) MCR14(val, 1, c7, c0, 4) -#define WCP14_ETMCLAIMSET(val) MCR14(val, 1, c7, c8, 6) -#define WCP14_ETMCLAIMCLR(val) MCR14(val, 1, c7, c9, 6) -/* Writes to this from CP14 interface are ignored */ -#define WCP14_ETMLAR(val) MCR14(val, 1, c7, c12, 6) - -#endif diff --git a/arch/arm/include/asm/hardware/debug-pl01x.S b/arch/arm/include/asm/hardware/debug-pl01x.S index 6489d1ffe3c8..f9fd083eff63 100644 --- a/arch/arm/include/asm/hardware/debug-pl01x.S +++ b/arch/arm/include/asm/hardware/debug-pl01x.S @@ -18,14 +18,12 @@ .macro waituart,rd,rx 1001: ldr \rd, [\rx, #UART01x_FR] - ARM_BE8( rev \rd, \rd ) tst \rd, #UART01x_FR_TXFF bne 1001b .endm .macro busyuart,rd,rx 1001: ldr \rd, [\rx, #UART01x_FR] - ARM_BE8( rev \rd, \rd ) tst \rd, #UART01x_FR_BUSY bne 1001b .endm diff --git a/arch/arm/include/asm/hugetlb-3level.h b/arch/arm/include/asm/hugetlb-3level.h deleted file mode 100644 index d4014fbe5ea3..000000000000 --- a/arch/arm/include/asm/hugetlb-3level.h +++ /dev/null @@ -1,71 +0,0 @@ -/* - * arch/arm/include/asm/hugetlb-3level.h - * - * Copyright (C) 2012 ARM Ltd. - * - * Based on arch/x86/include/asm/hugetlb.h. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef _ASM_ARM_HUGETLB_3LEVEL_H -#define _ASM_ARM_HUGETLB_3LEVEL_H - - -/* - * If our huge pte is non-zero then mark the valid bit. - * This allows pte_present(huge_ptep_get(ptep)) to return true for non-zero - * ptes. - * (The valid bit is automatically cleared by set_pte_at for PROT_NONE ptes). - */ -static inline pte_t huge_ptep_get(pte_t *ptep) -{ - pte_t retval = *ptep; - if (pte_val(retval)) - pte_val(retval) |= L_PTE_VALID; - return retval; -} - -static inline void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, - pte_t *ptep, pte_t pte) -{ - set_pte_at(mm, addr, ptep, pte); -} - -static inline void huge_ptep_clear_flush(struct vm_area_struct *vma, - unsigned long addr, pte_t *ptep) -{ - ptep_clear_flush(vma, addr, ptep); -} - -static inline void huge_ptep_set_wrprotect(struct mm_struct *mm, - unsigned long addr, pte_t *ptep) -{ - ptep_set_wrprotect(mm, addr, ptep); -} - -static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm, - unsigned long addr, pte_t *ptep) -{ - return ptep_get_and_clear(mm, addr, ptep); -} - -static inline int huge_ptep_set_access_flags(struct vm_area_struct *vma, - unsigned long addr, pte_t *ptep, - pte_t pte, int dirty) -{ - return ptep_set_access_flags(vma, addr, ptep, pte, dirty); -} - -#endif /* _ASM_ARM_HUGETLB_3LEVEL_H */ diff --git a/arch/arm/include/asm/hugetlb.h b/arch/arm/include/asm/hugetlb.h deleted file mode 100644 index 1f1b1cd112f3..000000000000 --- a/arch/arm/include/asm/hugetlb.h +++ /dev/null @@ -1,84 +0,0 @@ -/* - * arch/arm/include/asm/hugetlb.h - * - * Copyright (C) 2012 ARM Ltd. - * - * Based on arch/x86/include/asm/hugetlb.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef _ASM_ARM_HUGETLB_H -#define _ASM_ARM_HUGETLB_H - -#include -#include - -#include - -static inline void hugetlb_free_pgd_range(struct mmu_gather *tlb, - unsigned long addr, unsigned long end, - unsigned long floor, - unsigned long ceiling) -{ - free_pgd_range(tlb, addr, end, floor, ceiling); -} - - -static inline int is_hugepage_only_range(struct mm_struct *mm, - unsigned long addr, unsigned long len) -{ - return 0; -} - -static inline int prepare_hugepage_range(struct file *file, - unsigned long addr, unsigned long len) -{ - struct hstate *h = hstate_file(file); - if (len & ~huge_page_mask(h)) - return -EINVAL; - if (addr & ~huge_page_mask(h)) - return -EINVAL; - return 0; -} - -static inline void hugetlb_prefault_arch_hook(struct mm_struct *mm) -{ -} - -static inline int huge_pte_none(pte_t pte) -{ - return pte_none(pte); -} - -static inline pte_t huge_pte_wrprotect(pte_t pte) -{ - return pte_wrprotect(pte); -} - -static inline int arch_prepare_hugepage(struct page *page) -{ - return 0; -} - -static inline void arch_release_hugepage(struct page *page) -{ -} - -static inline void arch_clear_hugepage_flags(struct page *page) -{ - clear_bit(PG_dcache_clean, &page->flags); -} - -#endif /* _ASM_ARM_HUGETLB_H */ diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index d070741b2b37..652b56086de7 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -130,16 +130,16 @@ static inline u32 __raw_readl(const volatile void __iomem *addr) */ extern void __iomem *__arm_ioremap_pfn_caller(unsigned long, unsigned long, size_t, unsigned int, void *); -extern void __iomem *__arm_ioremap_caller(phys_addr_t, size_t, unsigned int, +extern void __iomem *__arm_ioremap_caller(unsigned long, size_t, unsigned int, void *); extern void __iomem *__arm_ioremap_pfn(unsigned long, unsigned long, size_t, unsigned int); -extern void __iomem *__arm_ioremap(phys_addr_t, size_t, unsigned int); -extern void __iomem *__arm_ioremap_exec(phys_addr_t, size_t, bool cached); +extern void __iomem *__arm_ioremap(unsigned long, size_t, unsigned int); +extern void __iomem *__arm_ioremap_exec(unsigned long, size_t, bool cached); extern void __iounmap(volatile void __iomem *addr); extern void __arm_iounmap(volatile void __iomem *addr); -extern void __iomem * (*arch_ioremap_caller)(phys_addr_t, size_t, +extern void __iomem * (*arch_ioremap_caller)(unsigned long, size_t, unsigned int, void *); extern void (*arch_iounmap)(volatile void __iomem *); diff --git a/arch/arm/include/asm/irq.h b/arch/arm/include/asm/irq.h index 809203a4b71b..53c15dec7af6 100644 --- a/arch/arm/include/asm/irq.h +++ b/arch/arm/include/asm/irq.h @@ -35,9 +35,6 @@ extern void (*handle_arch_irq)(struct pt_regs *); extern void set_handle_irq(void (*handle_irq)(struct pt_regs *)); #endif -void arch_trigger_all_cpu_backtrace(void); -#define arch_trigger_all_cpu_backtrace arch_trigger_all_cpu_backtrace - #endif #endif diff --git a/arch/arm/include/asm/jump_label.h b/arch/arm/include/asm/jump_label.h index 863c892b4aaa..bfc198c75913 100644 --- a/arch/arm/include/asm/jump_label.h +++ b/arch/arm/include/asm/jump_label.h @@ -16,7 +16,7 @@ static __always_inline bool arch_static_branch(struct static_key *key) { - asm_volatile_goto("1:\n\t" + asm goto("1:\n\t" JUMP_LABEL_NOP "\n\t" ".pushsection __jump_table, \"aw\"\n\t" ".word 1b, %l[l_yes], %c0\n\t" diff --git a/arch/arm/include/asm/kgdb.h b/arch/arm/include/asm/kgdb.h index 0a9d5dd93294..48066ce9ea34 100644 --- a/arch/arm/include/asm/kgdb.h +++ b/arch/arm/include/asm/kgdb.h @@ -11,7 +11,6 @@ #define __ARM_KGDB_H__ #include -#include /* * GDB assumes that we're a user process being debugged, so @@ -42,7 +41,7 @@ static inline void arch_kgdb_breakpoint(void) { - asm(__inst_arm(0xe7ffdeff)); + asm(".word 0xe7ffdeff"); } extern void kgdb_handle_bus_error(void); diff --git a/arch/arm/include/asm/kvm_arm.h b/arch/arm/include/asm/kvm_arm.h index 816db0bf2dd8..124623e5ef14 100644 --- a/arch/arm/include/asm/kvm_arm.h +++ b/arch/arm/include/asm/kvm_arm.h @@ -55,10 +55,8 @@ * The bits we set in HCR: * TAC: Trap ACTLR * TSC: Trap SMC - * TVM: Trap VM ops (until MMU and caches are on) * TSW: Trap cache operations by set/way * TWI: Trap WFI - * TWE: Trap WFE * TIDCP: Trap L2CTLR/L2ECTLR * BSU_IS: Upgrade barriers to the inner shareable domain * FB: Force broadcast of all maintainance operations @@ -69,7 +67,8 @@ */ #define HCR_GUEST_MASK (HCR_TSC | HCR_TSW | HCR_TWI | HCR_VM | HCR_BSU_IS | \ HCR_FB | HCR_TAC | HCR_AMO | HCR_IMO | HCR_FMO | \ - HCR_TVM | HCR_TWE | HCR_SWIO | HCR_TIDCP) + HCR_SWIO | HCR_TIDCP) +#define HCR_VIRT_EXCP_MASK (HCR_VA | HCR_VI | HCR_VF) /* System Control Register (SCTLR) bits */ #define SCTLR_TE (1 << 30) @@ -96,12 +95,12 @@ #define TTBCR_IRGN1 (3 << 24) #define TTBCR_EPD1 (1 << 23) #define TTBCR_A1 (1 << 22) -#define TTBCR_T1SZ (7 << 16) +#define TTBCR_T1SZ (3 << 16) #define TTBCR_SH0 (3 << 12) #define TTBCR_ORGN0 (3 << 10) #define TTBCR_IRGN0 (3 << 8) #define TTBCR_EPD0 (1 << 7) -#define TTBCR_T0SZ (7 << 0) +#define TTBCR_T0SZ 3 #define HTCR_MASK (TTBCR_T0SZ | TTBCR_IRGN0 | TTBCR_ORGN0 | TTBCR_SH0) /* Hyp System Trap Register */ @@ -136,6 +135,7 @@ #define KVM_PHYS_MASK (KVM_PHYS_SIZE - 1ULL) #define PTRS_PER_S2_PGD (1ULL << (KVM_PHYS_SHIFT - 30)) #define S2_PGD_ORDER get_order(PTRS_PER_S2_PGD * sizeof(pgd_t)) +#define S2_PGD_SIZE (1 << S2_PGD_ORDER) /* Virtualization Translation Control Register (VTCR) bits */ #define VTCR_SH0 (3 << 12) @@ -209,8 +209,6 @@ #define HSR_EC_DABT (0x24) #define HSR_EC_DABT_HYP (0x25) -#define HSR_WFI_IS_WFE (1U << 0) - #define HSR_HVC_IMM_MASK ((1UL << 16) - 1) #define HSR_DABT_S1PTW (1U << 7) diff --git a/arch/arm/include/asm/kvm_asm.h b/arch/arm/include/asm/kvm_asm.h index 3a67bec72d0c..18d50322a9e2 100644 --- a/arch/arm/include/asm/kvm_asm.h +++ b/arch/arm/include/asm/kvm_asm.h @@ -37,20 +37,16 @@ #define c5_AIFSR 15 /* Auxilary Instrunction Fault Status R */ #define c6_DFAR 16 /* Data Fault Address Register */ #define c6_IFAR 17 /* Instruction Fault Address Register */ -#define c7_PAR 18 /* Physical Address Register */ -#define c7_PAR_high 19 /* PAR top 32 bits */ -#define c9_L2CTLR 20 /* Cortex A15/A7 L2 Control Register */ -#define c10_PRRR 21 /* Primary Region Remap Register */ -#define c10_NMRR 22 /* Normal Memory Remap Register */ -#define c12_VBAR 23 /* Vector Base Address Register */ -#define c13_CID 24 /* Context ID Register */ -#define c13_TID_URW 25 /* Thread ID, User R/W */ -#define c13_TID_URO 26 /* Thread ID, User R/O */ -#define c13_TID_PRIV 27 /* Thread ID, Privileged */ -#define c14_CNTKCTL 28 /* Timer Control Register (PL1) */ -#define c10_AMAIR0 29 /* Auxilary Memory Attribute Indirection Reg0 */ -#define c10_AMAIR1 30 /* Auxilary Memory Attribute Indirection Reg1 */ -#define NR_CP15_REGS 31 /* Number of regs (incl. invalid) */ +#define c9_L2CTLR 18 /* Cortex A15 L2 Control Register */ +#define c10_PRRR 19 /* Primary Region Remap Register */ +#define c10_NMRR 20 /* Normal Memory Remap Register */ +#define c12_VBAR 21 /* Vector Base Address Register */ +#define c13_CID 22 /* Context ID Register */ +#define c13_TID_URW 23 /* Thread ID, User R/W */ +#define c13_TID_URO 24 /* Thread ID, User R/O */ +#define c13_TID_PRIV 25 /* Thread ID, Privileged */ +#define c14_CNTKCTL 26 /* Timer Control Register (PL1) */ +#define NR_CP15_REGS 27 /* Number of regs (incl. invalid) */ #define ARM_EXCEPTION_RESET 0 #define ARM_EXCEPTION_UNDEFINED 1 @@ -61,24 +57,6 @@ #define ARM_EXCEPTION_FIQ 6 #define ARM_EXCEPTION_HVC 7 -/* - * The rr_lo_hi macro swaps a pair of registers depending on - * current endianness. It is used in conjunction with ldrd and strd - * instructions that load/store a 64-bit value from/to memory to/from - * a pair of registers which are used with the mrrc and mcrr instructions. - * If used with the ldrd/strd instructions, the a1 parameter is the first - * source/destination register and the a2 parameter is the second - * source/destination register. Note that the ldrd/strd instructions - * already swap the bytes within the words correctly according to the - * endianness setting, but the order of the registers need to be effectively - * swapped when used with the mrrc/mcrr instructions. - */ -#ifdef CONFIG_CPU_ENDIAN_BE8 -#define rr_lo_hi(a1, a2) a2, a1 -#else -#define rr_lo_hi(a1, a2) a1, a2 -#endif - #ifndef __ASSEMBLY__ struct kvm; struct kvm_vcpu; @@ -94,6 +72,8 @@ extern char __kvm_hyp_vector[]; extern char __kvm_hyp_code_start[]; extern char __kvm_hyp_code_end[]; +extern void __kvm_tlb_flush_vmid(struct kvm *kvm); + extern void __kvm_flush_vm_context(void); extern void __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa); diff --git a/arch/arm/include/asm/kvm_emulate.h b/arch/arm/include/asm/kvm_emulate.h index b9db269c6e61..82b4babead2c 100644 --- a/arch/arm/include/asm/kvm_emulate.h +++ b/arch/arm/include/asm/kvm_emulate.h @@ -65,6 +65,11 @@ static inline bool vcpu_mode_priv(struct kvm_vcpu *vcpu) return cpsr_mode > USR_MODE;; } +static inline bool kvm_vcpu_reg_is_pc(struct kvm_vcpu *vcpu, int reg) +{ + return reg == 15; +} + static inline u32 kvm_vcpu_get_hsr(struct kvm_vcpu *vcpu) { return vcpu->arch.fault.hsr; @@ -148,11 +153,6 @@ static inline bool kvm_vcpu_trap_is_iabt(struct kvm_vcpu *vcpu) } static inline u8 kvm_vcpu_trap_get_fault(struct kvm_vcpu *vcpu) -{ - return kvm_vcpu_get_hsr(vcpu) & HSR_FSC; -} - -static inline u8 kvm_vcpu_trap_get_fault_type(struct kvm_vcpu *vcpu) { return kvm_vcpu_get_hsr(vcpu) & HSR_FSC_TYPE; } @@ -162,69 +162,4 @@ static inline u32 kvm_vcpu_hvc_get_imm(struct kvm_vcpu *vcpu) return kvm_vcpu_get_hsr(vcpu) & HSR_HVC_IMM_MASK; } -static inline unsigned long kvm_vcpu_get_mpidr(struct kvm_vcpu *vcpu) -{ - return vcpu->arch.cp15[c0_MPIDR]; -} - -static inline void kvm_vcpu_set_be(struct kvm_vcpu *vcpu) -{ - *vcpu_cpsr(vcpu) |= PSR_E_BIT; -} - -static inline bool kvm_vcpu_is_be(struct kvm_vcpu *vcpu) -{ - return !!(*vcpu_cpsr(vcpu) & PSR_E_BIT); -} - -static inline unsigned long vcpu_data_guest_to_host(struct kvm_vcpu *vcpu, - unsigned long data, - unsigned int len) -{ - if (kvm_vcpu_is_be(vcpu)) { - switch (len) { - case 1: - return data & 0xff; - case 2: - return be16_to_cpu(data & 0xffff); - default: - return be32_to_cpu(data); - } - } else { - switch (len) { - case 1: - return data & 0xff; - case 2: - return le16_to_cpu(data & 0xffff); - default: - return le32_to_cpu(data); - } - } -} - -static inline unsigned long vcpu_data_host_to_guest(struct kvm_vcpu *vcpu, - unsigned long data, - unsigned int len) -{ - if (kvm_vcpu_is_be(vcpu)) { - switch (len) { - case 1: - return data & 0xff; - case 2: - return cpu_to_be16(data & 0xffff); - default: - return cpu_to_be32(data); - } - } else { - switch (len) { - case 1: - return data & 0xff; - case 2: - return cpu_to_le16(data & 0xffff); - default: - return cpu_to_le32(data); - } - } -} - #endif /* __ARM_KVM_EMULATE_H__ */ diff --git a/arch/arm/include/asm/kvm_host.h b/arch/arm/include/asm/kvm_host.h index 46e5d4da1989..57cb786a6203 100644 --- a/arch/arm/include/asm/kvm_host.h +++ b/arch/arm/include/asm/kvm_host.h @@ -19,31 +19,30 @@ #ifndef __ARM_KVM_HOST_H__ #define __ARM_KVM_HOST_H__ -#include -#include #include #include #include #include -#include +#include -#if defined(CONFIG_KVM_ARM_MAX_VCPUS) #define KVM_MAX_VCPUS CONFIG_KVM_ARM_MAX_VCPUS -#else -#define KVM_MAX_VCPUS 0 -#endif - #define KVM_USER_MEM_SLOTS 32 #define KVM_PRIVATE_MEM_SLOTS 4 #define KVM_COALESCED_MMIO_PAGE_OFFSET 1 #define KVM_HAVE_ONE_REG -#define KVM_VCPU_MAX_FEATURES 2 +#define KVM_VCPU_MAX_FEATURES 1 + +/* We don't currently support large pages. */ +#define KVM_HPAGE_GFN_SHIFT(x) 0 +#define KVM_NR_PAGE_SIZES 1 +#define KVM_PAGES_PER_HPAGE(x) (1UL<<31) -#include +#include +struct kvm_vcpu; u32 *kvm_vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num, u32 mode); -int __attribute_const__ kvm_target_cpu(void); +int kvm_target_cpu(void); int kvm_reset_vcpu(struct kvm_vcpu *vcpu); void kvm_reset_coprocs(struct kvm_vcpu *vcpu); @@ -102,12 +101,6 @@ struct kvm_vcpu_arch { /* The CPU type we expose to the VM */ u32 midr; - /* HYP trapping configuration */ - u32 hcr; - - /* Interrupt related fields */ - u32 irq_lines; /* IRQ and FIQ levels */ - /* Exception Information */ struct kvm_vcpu_fault_info fault; @@ -135,6 +128,9 @@ struct kvm_vcpu_arch { /* IO related fields */ struct kvm_decode mmio_decode; + /* Interrupt related fields */ + u32 irq_lines; /* IRQ and FIQ levels */ + /* Cache some mmu pages needed inside spinlock regions */ struct kvm_mmu_memory_cache mmu_page_cache; @@ -150,17 +146,19 @@ struct kvm_vcpu_stat { u32 halt_wakeup; }; +struct kvm_vcpu_init; int kvm_vcpu_set_target(struct kvm_vcpu *vcpu, const struct kvm_vcpu_init *init); -int kvm_vcpu_preferred_target(struct kvm_vcpu_init *init); unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu); int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices); +struct kvm_one_reg; int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg); int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg); u64 kvm_call_hyp(void *hypfn, ...); void force_vm_exit(const cpumask_t *mask); #define KVM_ARCH_WANT_MMU_NOTIFIER +struct kvm; int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end); @@ -185,14 +183,15 @@ struct kvm_vcpu __percpu **kvm_get_running_vcpus(void); int kvm_arm_copy_coproc_indices(struct kvm_vcpu *vcpu, u64 __user *uindices); unsigned long kvm_arm_num_coproc_regs(struct kvm_vcpu *vcpu); +struct kvm_one_reg; int kvm_arm_coproc_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *); int kvm_arm_coproc_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *); int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run, int exception_index); -static inline void __cpu_init_hyp_mode(phys_addr_t boot_pgd_ptr, - phys_addr_t pgd_ptr, +static inline void __cpu_init_hyp_mode(unsigned long long boot_pgd_ptr, + unsigned long long pgd_ptr, unsigned long hyp_stack_ptr, unsigned long vector_ptr) { @@ -222,18 +221,7 @@ static inline int kvm_arch_dev_ioctl_check_extension(long ext) return 0; } -static inline void vgic_arch_setup(const struct vgic_params *vgic) -{ - BUG_ON(vgic->type != VGIC_V2); -} - int kvm_perf_init(void); int kvm_perf_teardown(void); -static inline void kvm_arch_hardware_disable(void) {} -static inline void kvm_arch_hardware_unsetup(void) {} -static inline void kvm_arch_sync_events(struct kvm *kvm) {} -static inline void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) {} -static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {} - #endif /* __ARM_KVM_HOST_H__ */ diff --git a/arch/arm/include/asm/kvm_mmu.h b/arch/arm/include/asm/kvm_mmu.h index 3f688b458143..472ac7091003 100644 --- a/arch/arm/include/asm/kvm_mmu.h +++ b/arch/arm/include/asm/kvm_mmu.h @@ -62,15 +62,9 @@ phys_addr_t kvm_get_idmap_vector(void); int kvm_mmu_init(void); void kvm_clear_hyp_idmap(void); -static inline void kvm_set_pmd(pmd_t *pmd, pmd_t new_pmd) -{ - *pmd = new_pmd; - flush_pmd_entry(pmd); -} - static inline void kvm_set_pte(pte_t *pte, pte_t new_pte) { - *pte = new_pte; + pte_val(*pte) = new_pte; /* * flush_pmd_entry just takes a void pointer and cleans the necessary * cache entries, so we can reuse the function for ptes. @@ -78,6 +72,17 @@ static inline void kvm_set_pte(pte_t *pte, pte_t new_pte) flush_pmd_entry(pte); } +static inline bool kvm_is_write_fault(unsigned long hsr) +{ + unsigned long hsr_ec = hsr >> HSR_EC_SHIFT; + if (hsr_ec == HSR_EC_IABT) + return false; + else if ((hsr & HSR_ISV) && !(hsr & HSR_WNR)) + return false; + else + return true; +} + static inline void kvm_clean_pgd(pgd_t *pgd) { clean_dcache_area(pgd, PTRS_PER_S2_PGD * sizeof(pgd_t)); @@ -98,51 +103,10 @@ static inline void kvm_set_s2pte_writable(pte_t *pte) pte_val(*pte) |= L_PTE_S2_RDWR; } -static inline void kvm_set_s2pmd_writable(pmd_t *pmd) -{ - pmd_val(*pmd) |= L_PMD_S2_RDWR; -} - -/* Open coded p*d_addr_end that can deal with 64bit addresses */ -#define kvm_pgd_addr_end(addr, end) \ -({ u64 __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \ - (__boundary - 1 < (end) - 1)? __boundary: (end); \ -}) - -#define kvm_pud_addr_end(addr,end) (end) - -#define kvm_pmd_addr_end(addr, end) \ -({ u64 __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \ - (__boundary - 1 < (end) - 1)? __boundary: (end); \ -}) - -static inline bool kvm_page_empty(void *ptr) -{ - struct page *ptr_page = virt_to_page(ptr); - return page_count(ptr_page) == 1; -} - - -#define kvm_pte_table_empty(ptep) kvm_page_empty(ptep) -#define kvm_pmd_table_empty(pmdp) kvm_page_empty(pmdp) -#define kvm_pud_table_empty(pudp) (0) - - struct kvm; -#define kvm_flush_dcache_to_poc(a,l) __cpuc_flush_dcache_area((a), (l)) - -static inline bool vcpu_has_cache_enabled(struct kvm_vcpu *vcpu) -{ - return (vcpu->arch.cp15[c1_SCTLR] & 0b101) == 0b101; -} - -static inline void coherent_cache_guest_page(struct kvm_vcpu *vcpu, hva_t hva, - unsigned long size) +static inline void coherent_icache_guest_page(struct kvm *kvm, gfn_t gfn) { - if (!vcpu_has_cache_enabled(vcpu)) - kvm_flush_dcache_to_poc((void *)hva, size); - /* * If we are going to insert an instruction page and the icache is * either VIPT or PIPT, there is a potential problem where the host @@ -156,16 +120,15 @@ static inline void coherent_cache_guest_page(struct kvm_vcpu *vcpu, hva_t hva, * need any kind of flushing (DDI 0406C.b - Page B3-1392). */ if (icache_is_pipt()) { - __cpuc_coherent_user_range(hva, hva + size); + unsigned long hva = gfn_to_hva(kvm, gfn); + __cpuc_coherent_user_range(hva, hva + PAGE_SIZE); } else if (!icache_is_vivt_asid_tagged()) { /* any kind of VIPT cache */ __flush_icache_all(); } } -#define kvm_virt_to_phys(x) virt_to_idmap((unsigned long)(x)) - -void stage2_flush_vm(struct kvm *kvm); +#define kvm_flush_dcache_to_poc(a,l) __cpuc_flush_dcache_area((a), (l)) #endif /* !__ASSEMBLY__ */ diff --git a/arch/arm/include/asm/kvm_psci.h b/arch/arm/include/asm/kvm_psci.h index 6bda945d31fa..9a83d98bf170 100644 --- a/arch/arm/include/asm/kvm_psci.h +++ b/arch/arm/include/asm/kvm_psci.h @@ -18,10 +18,6 @@ #ifndef __ARM_KVM_PSCI_H__ #define __ARM_KVM_PSCI_H__ -#define KVM_ARM_PSCI_0_1 1 -#define KVM_ARM_PSCI_0_2 2 - -int kvm_psci_version(struct kvm_vcpu *vcpu); -int kvm_psci_call(struct kvm_vcpu *vcpu); +bool kvm_psci_call(struct kvm_vcpu *vcpu); #endif /* __ARM_KVM_PSCI_H__ */ diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h index 75bf07910b81..308ad7d6f98b 100644 --- a/arch/arm/include/asm/mach/arch.h +++ b/arch/arm/include/asm/mach/arch.h @@ -8,8 +8,6 @@ * published by the Free Software Foundation. */ -#include - #ifndef __ASSEMBLY__ struct tag; @@ -18,10 +16,8 @@ struct pt_regs; struct smp_operations; #ifdef CONFIG_SMP #define smp_ops(ops) (&(ops)) -#define smp_init_ops(ops) (&(ops)) #else #define smp_ops(ops) (struct smp_operations *)NULL -#define smp_init_ops(ops) (bool (*)(void))NULL #endif struct machine_desc { @@ -45,7 +41,6 @@ struct machine_desc { unsigned char reserve_lp2 :1; /* never has lp2 */ char restart_mode; /* default restart mode */ struct smp_operations *smp; /* SMP operations */ - bool (*smp_init)(void); void (*fixup)(struct tag *, char **, struct meminfo *); void (*reserve)(void);/* reserve mem blocks */ diff --git a/arch/arm/include/asm/mach/mmc.h b/arch/arm/include/asm/mach/mmc.h deleted file mode 100644 index bca864ac945f..000000000000 --- a/arch/arm/include/asm/mach/mmc.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * arch/arm/include/asm/mach/mmc.h - */ -#ifndef ASMARM_MACH_MMC_H -#define ASMARM_MACH_MMC_H - -#include -#include -#include - -struct embedded_sdio_data { - struct sdio_cis cis; - struct sdio_cccr cccr; - struct sdio_embedded_func *funcs; - int num_funcs; -}; - -struct mmc_platform_data { - unsigned int ocr_mask; /* available voltages */ - int built_in; /* built-in device flag */ - int card_present; /* card detect state */ - u32 (*translate_vdd)(struct device *, unsigned int); - unsigned int (*status)(struct device *); - struct embedded_sdio_data *embedded_sdio; - int (*register_status_notify)(void (*callback)(int card_present, void *dev_id), void *dev_id); -}; - -#endif diff --git a/arch/arm/include/asm/mcpm.h b/arch/arm/include/asm/mcpm.h index 7626a7fd4938..0f7b7620e9a5 100644 --- a/arch/arm/include/asm/mcpm.h +++ b/arch/arm/include/asm/mcpm.h @@ -41,14 +41,6 @@ extern void mcpm_entry_point(void); */ void mcpm_set_entry_vector(unsigned cpu, unsigned cluster, void *ptr); -/* - * This sets an early poke i.e a value to be poked into some address - * from very early assembly code before the CPU is ungated. The - * address must be physical, and if 0 then nothing will happen. - */ -void mcpm_set_early_poke(unsigned cpu, unsigned cluster, - unsigned long poke_phys_addr, unsigned long poke_val); - /* * CPU/cluster power operations API for higher subsystems to use. */ diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h index d5acecb49af4..57870ab313c5 100644 --- a/arch/arm/include/asm/memory.h +++ b/arch/arm/include/asm/memory.h @@ -98,19 +98,23 @@ #define TASK_UNMAPPED_BASE UL(0x00000000) #endif +#ifndef PHYS_OFFSET +#define PHYS_OFFSET UL(CONFIG_DRAM_BASE) +#endif + #ifndef END_MEM #define END_MEM (UL(CONFIG_DRAM_BASE) + CONFIG_DRAM_SIZE) #endif #ifndef PAGE_OFFSET -#define PAGE_OFFSET PLAT_PHYS_OFFSET +#define PAGE_OFFSET (PHYS_OFFSET) #endif /* * The module can be at any place in ram in nommu mode. */ #define MODULES_END (END_MEM) -#define MODULES_VADDR PAGE_OFFSET +#define MODULES_VADDR (PHYS_OFFSET) #define XIP_VIRT_ADDR(physaddr) (physaddr) @@ -137,16 +141,6 @@ #define page_to_phys(page) (__pfn_to_phys(page_to_pfn(page))) #define phys_to_page(phys) (pfn_to_page(__phys_to_pfn(phys))) -/* - * PLAT_PHYS_OFFSET is the offset (from zero) of the start of physical - * memory. This is used for XIP and NoMMU kernels, or by kernels which - * have their own mach/memory.h. Assembly code must always use - * PLAT_PHYS_OFFSET and not PHYS_OFFSET. - */ -#ifndef PLAT_PHYS_OFFSET -#define PLAT_PHYS_OFFSET UL(CONFIG_PHYS_OFFSET) -#endif - #ifndef __ASSEMBLY__ /* @@ -163,7 +157,6 @@ */ #define __PV_BITS_31_24 0x81000000 -extern phys_addr_t (*arch_virt_to_idmap) (unsigned long x); extern unsigned long __pv_phys_offset; #define PHYS_OFFSET __pv_phys_offset @@ -190,15 +183,22 @@ static inline unsigned long __phys_to_virt(unsigned long x) return t; } #else - -#define PHYS_OFFSET PLAT_PHYS_OFFSET - #define __virt_to_phys(x) ((x) - PAGE_OFFSET + PHYS_OFFSET) #define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET) +#endif +#endif +#endif /* __ASSEMBLY__ */ +#ifndef PHYS_OFFSET +#ifdef PLAT_PHYS_OFFSET +#define PHYS_OFFSET PLAT_PHYS_OFFSET +#else +#define PHYS_OFFSET UL(CONFIG_PHYS_OFFSET) #endif #endif +#ifndef __ASSEMBLY__ + /* * PFNs are used to describe any physical page; this means * PFN 0 == physical address 0. @@ -207,7 +207,7 @@ static inline unsigned long __phys_to_virt(unsigned long x) * direct-mapped view. We assume this is the first page * of RAM in the mem_map as well. */ -#define PHYS_PFN_OFFSET ((unsigned long)(PHYS_OFFSET >> PAGE_SHIFT)) +#define PHYS_PFN_OFFSET (PHYS_OFFSET >> PAGE_SHIFT) /* * These are *only* valid on the kernel direct mapped RAM memory. @@ -232,21 +232,6 @@ static inline void *phys_to_virt(phys_addr_t x) #define __va(x) ((void *)__phys_to_virt((unsigned long)(x))) #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) -/* - * These are for systems that have a hardware interconnect supported alias of - * physical memory for idmap purposes. Most cases should leave these - * untouched. - */ -static inline phys_addr_t __virt_to_idmap(unsigned long x) -{ - if (arch_virt_to_idmap) - return arch_virt_to_idmap(x); - else - return __virt_to_phys(x); -} - -#define virt_to_idmap(x) __virt_to_idmap((unsigned long)(x)) - /* * Virtual <-> DMA view memory address translations * Again, these are *only* valid on the kernel direct mapped RAM @@ -290,8 +275,7 @@ static inline __deprecated void *bus_to_virt(unsigned long x) #define ARCH_PFN_OFFSET PHYS_PFN_OFFSET #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) -#define virt_addr_valid(kaddr) (((unsigned long)(kaddr) >= PAGE_OFFSET && (unsigned long)(kaddr) < (unsigned long)high_memory) \ - && pfn_valid(__pa(kaddr) >> PAGE_SHIFT) ) +#define virt_addr_valid(kaddr) ((unsigned long)(kaddr) >= PAGE_OFFSET && (unsigned long)(kaddr) < (unsigned long)high_memory) #endif diff --git a/arch/arm/include/asm/mmu.h b/arch/arm/include/asm/mmu.h index 64fd15159b7d..e3d55547e755 100644 --- a/arch/arm/include/asm/mmu.h +++ b/arch/arm/include/asm/mmu.h @@ -6,17 +6,14 @@ typedef struct { #ifdef CONFIG_CPU_HAS_ASID atomic64_t id; -#else - int switch_pending; #endif unsigned int vmalloc_seq; - unsigned long sigpage; } mm_context_t; #ifdef CONFIG_CPU_HAS_ASID #define ASID_BITS 8 #define ASID_MASK ((~0ULL) << ASID_BITS) -#define ASID(mm) ((unsigned int)((mm)->context.id.counter & ~ASID_MASK)) +#define ASID(mm) ((mm)->context.id.counter & ~ASID_MASK) #else #define ASID(mm) (0) #endif diff --git a/arch/arm/include/asm/mmu_context.h b/arch/arm/include/asm/mmu_context.h index e0b10f19d679..a7b85e0d0cc1 100644 --- a/arch/arm/include/asm/mmu_context.h +++ b/arch/arm/include/asm/mmu_context.h @@ -27,15 +27,7 @@ void __check_vmalloc_seq(struct mm_struct *mm); void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk); #define init_new_context(tsk,mm) ({ atomic64_set(&mm->context.id, 0); 0; }) -#ifdef CONFIG_ARM_ERRATA_798181 -void a15_erratum_get_cpumask(int this_cpu, struct mm_struct *mm, - cpumask_t *mask); -#else /* !CONFIG_ARM_ERRATA_798181 */ -static inline void a15_erratum_get_cpumask(int this_cpu, struct mm_struct *mm, - cpumask_t *mask) -{ -} -#endif /* CONFIG_ARM_ERRATA_798181 */ +DECLARE_PER_CPU(atomic64_t, active_asids); #else /* !CONFIG_CPU_HAS_ASID */ @@ -55,7 +47,7 @@ static inline void check_and_switch_context(struct mm_struct *mm, * on non-ASID CPUs, the old mm will remain valid until the * finish_arch_post_lock_switch() call. */ - mm->context.switch_pending = 1; + set_ti_thread_flag(task_thread_info(tsk), TIF_SWITCH_MM); else cpu_switch_mm(mm->pgd, mm); } @@ -64,21 +56,9 @@ static inline void check_and_switch_context(struct mm_struct *mm, finish_arch_post_lock_switch static inline void finish_arch_post_lock_switch(void) { - struct mm_struct *mm = current->mm; - - if (mm && mm->context.switch_pending) { - /* - * Preemption must be disabled during cpu_switch_mm() as we - * have some stateful cache flush implementations. Check - * switch_pending again in case we were preempted and the - * switch to this mm was already done. - */ - preempt_disable(); - if (mm->context.switch_pending) { - mm->context.switch_pending = 0; - cpu_switch_mm(mm->pgd, mm); - } - preempt_enable_no_resched(); + if (test_and_clear_thread_flag(TIF_SWITCH_MM)) { + struct mm_struct *mm = current->mm; + cpu_switch_mm(mm->pgd, mm); } } diff --git a/arch/arm/include/asm/module.h b/arch/arm/include/asm/module.h index ed690c49ef93..0d3a28dbc8e5 100644 --- a/arch/arm/include/asm/module.h +++ b/arch/arm/include/asm/module.h @@ -12,8 +12,6 @@ enum { ARM_SEC_CORE, ARM_SEC_EXIT, ARM_SEC_DEVEXIT, - ARM_SEC_HOT, - ARM_SEC_UNLIKELY, ARM_SEC_MAX, }; diff --git a/arch/arm/include/asm/neon.h b/arch/arm/include/asm/neon.h deleted file mode 100644 index 8f730fe70093..000000000000 --- a/arch/arm/include/asm/neon.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * linux/arch/arm/include/asm/neon.h - * - * Copyright (C) 2013 Linaro Ltd - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include - -#define cpu_has_neon() (!!(elf_hwcap & HWCAP_NEON)) - -#ifdef __ARM_NEON__ - -/* - * If you are affected by the BUILD_BUG below, it probably means that you are - * using NEON code /and/ calling the kernel_neon_begin() function from the same - * compilation unit. To prevent issues that may arise from GCC reordering or - * generating(1) NEON instructions outside of these begin/end functions, the - * only supported way of using NEON code in the kernel is by isolating it in a - * separate compilation unit, and calling it from another unit from inside a - * kernel_neon_begin/kernel_neon_end pair. - * - * (1) Current GCC (4.7) might generate NEON instructions at O3 level if - * -mpfu=neon is set. - */ - -#define kernel_neon_begin() \ - BUILD_BUG_ON_MSG(1, "kernel_neon_begin() called from NEON code") - -#else -void kernel_neon_begin(void); -#endif -void kernel_neon_end(void); diff --git a/arch/arm/include/asm/outercache.h b/arch/arm/include/asm/outercache.h index f94784f0e3a6..12f71a190422 100644 --- a/arch/arm/include/asm/outercache.h +++ b/arch/arm/include/asm/outercache.h @@ -37,10 +37,10 @@ struct outer_cache_fns { void (*resume)(void); }; -extern struct outer_cache_fns outer_cache; - #ifdef CONFIG_OUTER_CACHE +extern struct outer_cache_fns outer_cache; + static inline void outer_inv_range(phys_addr_t start, phys_addr_t end) { if (outer_cache.inv_range) diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h index 4355f0ec44d6..812a4944e783 100644 --- a/arch/arm/include/asm/page.h +++ b/arch/arm/include/asm/page.h @@ -13,7 +13,7 @@ /* PAGE_SHIFT determines the page size */ #define PAGE_SHIFT 12 #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) -#define PAGE_MASK (~((1 << PAGE_SHIFT) - 1)) +#define PAGE_MASK (~(PAGE_SIZE-1)) #ifndef __ASSEMBLY__ @@ -142,9 +142,7 @@ extern void __cpu_copy_user_highpage(struct page *to, struct page *from, #define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) extern void copy_page(void *to, const void *from); -#ifdef CONFIG_KUSER_HELPERS #define __HAVE_ARCH_GATE_AREA 1 -#endif #ifdef CONFIG_ARM_LPAE #include diff --git a/arch/arm/include/asm/pgtable-2level.h b/arch/arm/include/asm/pgtable-2level.h index c98c9c89b95c..f97ee02386ee 100644 --- a/arch/arm/include/asm/pgtable-2level.h +++ b/arch/arm/include/asm/pgtable-2level.h @@ -140,7 +140,6 @@ #define L_PTE_MT_DEV_NONSHARED (_AT(pteval_t, 0x0c) << 2) /* 1100 */ #define L_PTE_MT_DEV_WC (_AT(pteval_t, 0x09) << 2) /* 1001 */ #define L_PTE_MT_DEV_CACHED (_AT(pteval_t, 0x0b) << 2) /* 1011 */ -#define L_PTE_MT_VECTORS (_AT(pteval_t, 0x0f) << 2) /* 1111 */ #define L_PTE_MT_MASK (_AT(pteval_t, 0x0f) << 2) #ifndef __ASSEMBLY__ diff --git a/arch/arm/include/asm/pgtable-3level-hwdef.h b/arch/arm/include/asm/pgtable-3level-hwdef.h index 5d9f086e18cd..18f5cef82ad5 100644 --- a/arch/arm/include/asm/pgtable-3level-hwdef.h +++ b/arch/arm/include/asm/pgtable-3level-hwdef.h @@ -30,7 +30,6 @@ #define PMD_TYPE_FAULT (_AT(pmdval_t, 0) << 0) #define PMD_TYPE_TABLE (_AT(pmdval_t, 3) << 0) #define PMD_TYPE_SECT (_AT(pmdval_t, 1) << 0) -#define PMD_TABLE_BIT (_AT(pmdval_t, 1) << 1) #define PMD_BIT4 (_AT(pmdval_t, 0)) #define PMD_DOMAIN(x) (_AT(pmdval_t, 0)) #define PMD_APTABLE_SHIFT (61) @@ -42,8 +41,6 @@ */ #define PMD_SECT_BUFFERABLE (_AT(pmdval_t, 1) << 2) #define PMD_SECT_CACHEABLE (_AT(pmdval_t, 1) << 3) -#define PMD_SECT_USER (_AT(pmdval_t, 1) << 6) /* AP[1] */ -#define PMD_SECT_RDONLY (_AT(pmdval_t, 1) << 7) /* AP[2] */ #define PMD_SECT_S (_AT(pmdval_t, 3) << 8) #define PMD_SECT_AF (_AT(pmdval_t, 1) << 10) #define PMD_SECT_nG (_AT(pmdval_t, 1) << 11) @@ -69,10 +66,8 @@ #define PTE_TYPE_MASK (_AT(pteval_t, 3) << 0) #define PTE_TYPE_FAULT (_AT(pteval_t, 0) << 0) #define PTE_TYPE_PAGE (_AT(pteval_t, 3) << 0) -#define PTE_TABLE_BIT (_AT(pteval_t, 1) << 1) #define PTE_BUFFERABLE (_AT(pteval_t, 1) << 2) /* AttrIndx[0] */ #define PTE_CACHEABLE (_AT(pteval_t, 1) << 3) /* AttrIndx[1] */ -#define PTE_AP2 (_AT(pteval_t, 1) << 7) /* AP[2] */ #define PTE_EXT_SHARED (_AT(pteval_t, 3) << 8) /* SH[1:0], inner shareable */ #define PTE_EXT_AF (_AT(pteval_t, 1) << 10) /* Access Flag */ #define PTE_EXT_NG (_AT(pteval_t, 1) << 11) /* nG */ diff --git a/arch/arm/include/asm/pgtable-3level.h b/arch/arm/include/asm/pgtable-3level.h index 0ea7f99f6d76..86b8fe398b95 100644 --- a/arch/arm/include/asm/pgtable-3level.h +++ b/arch/arm/include/asm/pgtable-3level.h @@ -33,7 +33,7 @@ #define PTRS_PER_PMD 512 #define PTRS_PER_PGD 4 -#define PTE_HWTABLE_PTRS (0) +#define PTE_HWTABLE_PTRS (PTRS_PER_PTE) #define PTE_HWTABLE_OFF (0) #define PTE_HWTABLE_SIZE (PTRS_PER_PTE * sizeof(u64)) @@ -48,27 +48,19 @@ #define PMD_SHIFT 21 #define PMD_SIZE (1UL << PMD_SHIFT) -#define PMD_MASK (~((1 << PMD_SHIFT) - 1)) +#define PMD_MASK (~(PMD_SIZE-1)) #define PGDIR_SIZE (1UL << PGDIR_SHIFT) -#define PGDIR_MASK (~((1 << PGDIR_SHIFT) - 1)) +#define PGDIR_MASK (~(PGDIR_SIZE-1)) /* * section address mask and size definitions. */ #define SECTION_SHIFT 21 #define SECTION_SIZE (1UL << SECTION_SHIFT) -#define SECTION_MASK (~((1 << SECTION_SHIFT) - 1)) +#define SECTION_MASK (~(SECTION_SIZE-1)) #define USER_PTRS_PER_PGD (PAGE_OFFSET / PGDIR_SIZE) -/* - * Hugetlb definitions. - */ -#define HPAGE_SHIFT PMD_SHIFT -#define HPAGE_SIZE (_AC(1, UL) << HPAGE_SHIFT) -#define HPAGE_MASK (~(HPAGE_SIZE - 1)) -#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) - /* * "Linux" PTE definitions for LPAE. * @@ -79,18 +71,13 @@ #define L_PTE_PRESENT (_AT(pteval_t, 3) << 0) /* Present */ #define L_PTE_FILE (_AT(pteval_t, 1) << 2) /* only when !PRESENT */ #define L_PTE_USER (_AT(pteval_t, 1) << 6) /* AP[1] */ +#define L_PTE_RDONLY (_AT(pteval_t, 1) << 7) /* AP[2] */ #define L_PTE_SHARED (_AT(pteval_t, 3) << 8) /* SH[1:0], inner shareable */ #define L_PTE_YOUNG (_AT(pteval_t, 1) << 10) /* AF */ #define L_PTE_XN (_AT(pteval_t, 1) << 54) /* XN */ -#define L_PTE_DIRTY (_AT(pteval_t, 1) << 55) -#define L_PTE_SPECIAL (_AT(pteval_t, 1) << 56) +#define L_PTE_DIRTY (_AT(pteval_t, 1) << 55) /* unused */ +#define L_PTE_SPECIAL (_AT(pteval_t, 1) << 56) /* unused */ #define L_PTE_NONE (_AT(pteval_t, 1) << 57) /* PROT_NONE */ -#define L_PTE_RDONLY (_AT(pteval_t, 1) << 58) /* READ ONLY */ - -#define PMD_SECT_VALID (_AT(pmdval_t, 1) << 0) -#define PMD_SECT_DIRTY (_AT(pmdval_t, 1) << 55) -#define PMD_SECT_SPLITTING (_AT(pmdval_t, 1) << 56) -#define PMD_SECT_NONE (_AT(pmdval_t, 1) << 57) /* * To be used in assembly code with the upper page attributes. @@ -126,8 +113,6 @@ #define L_PTE_S2_RDONLY (_AT(pteval_t, 1) << 6) /* HAP[1] */ #define L_PTE_S2_RDWR (_AT(pteval_t, 3) << 6) /* HAP[2:1] */ -#define L_PMD_S2_RDWR (_AT(pmdval_t, 3) << 6) /* HAP[2:1] */ - /* * Hyp-mode PL2 PTE definitions for LPAE. */ @@ -181,83 +166,8 @@ static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr) clean_pmd_entry(pmdp); \ } while (0) -/* - * For 3 levels of paging the PTE_EXT_NG bit will be set for user address ptes - * that are written to a page table but not for ptes created with mk_pte. - * - * In hugetlb_no_page, a new huge pte (new_pte) is generated and passed to - * hugetlb_cow, where it is compared with an entry in a page table. - * This comparison test fails erroneously leading ultimately to a memory leak. - * - * To correct this behaviour, we mask off PTE_EXT_NG for any pte that is - * present before running the comparison. - */ -#define __HAVE_ARCH_PTE_SAME -#define pte_same(pte_a,pte_b) ((pte_present(pte_a) ? pte_val(pte_a) & ~PTE_EXT_NG \ - : pte_val(pte_a)) \ - == (pte_present(pte_b) ? pte_val(pte_b) & ~PTE_EXT_NG \ - : pte_val(pte_b))) - #define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,__pte(pte_val(pte)|(ext))) -#define pte_huge(pte) (pte_val(pte) && !(pte_val(pte) & PTE_TABLE_BIT)) -#define pte_mkhuge(pte) (__pte(pte_val(pte) & ~PTE_TABLE_BIT)) - -#define pmd_young(pmd) (pmd_val(pmd) & PMD_SECT_AF) - -#define __HAVE_ARCH_PMD_WRITE -#define pmd_write(pmd) (!(pmd_val(pmd) & PMD_SECT_RDONLY)) - -#ifdef CONFIG_TRANSPARENT_HUGEPAGE -#define pmd_trans_huge(pmd) (pmd_val(pmd) && !(pmd_val(pmd) & PMD_TABLE_BIT)) -#define pmd_trans_splitting(pmd) (pmd_val(pmd) & PMD_SECT_SPLITTING) -#endif - -#define PMD_BIT_FUNC(fn,op) \ -static inline pmd_t pmd_##fn(pmd_t pmd) { pmd_val(pmd) op; return pmd; } - -PMD_BIT_FUNC(wrprotect, |= PMD_SECT_RDONLY); -PMD_BIT_FUNC(mkold, &= ~PMD_SECT_AF); -PMD_BIT_FUNC(mksplitting, |= PMD_SECT_SPLITTING); -PMD_BIT_FUNC(mkwrite, &= ~PMD_SECT_RDONLY); -PMD_BIT_FUNC(mkdirty, |= PMD_SECT_DIRTY); -PMD_BIT_FUNC(mkyoung, |= PMD_SECT_AF); - -#define pmd_mkhuge(pmd) (__pmd(pmd_val(pmd) & ~PMD_TABLE_BIT)) - -#define pmd_pfn(pmd) (((pmd_val(pmd) & PMD_MASK) & PHYS_MASK) >> PAGE_SHIFT) -#define pfn_pmd(pfn,prot) (__pmd(((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot))) -#define mk_pmd(page,prot) pfn_pmd(page_to_pfn(page),prot) - -/* represent a notpresent pmd by zero, this is used by pmdp_invalidate */ -#define pmd_mknotpresent(pmd) (__pmd(0)) - -static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) -{ - const pmdval_t mask = PMD_SECT_USER | PMD_SECT_XN | PMD_SECT_RDONLY | - PMD_SECT_VALID | PMD_SECT_NONE; - pmd_val(pmd) = (pmd_val(pmd) & ~mask) | (pgprot_val(newprot) & mask); - return pmd; -} - -static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr, - pmd_t *pmdp, pmd_t pmd) -{ - BUG_ON(addr >= TASK_SIZE); - - /* create a faulting entry if PROT_NONE protected */ - if (pmd_val(pmd) & PMD_SECT_NONE) - pmd_val(pmd) &= ~PMD_SECT_VALID; - - *pmdp = __pmd(pmd_val(pmd) | PMD_SECT_nG); - flush_pmd_entry(pmdp); -} - -static inline int has_transparent_hugepage(void) -{ - return 1; -} - #endif /* __ASSEMBLY__ */ #endif /* _ASM_PGTABLE_3LEVEL_H */ diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h index c312a72114f4..9bcd262a9008 100644 --- a/arch/arm/include/asm/pgtable.h +++ b/arch/arm/include/asm/pgtable.h @@ -24,9 +24,6 @@ #include #include - -#include - #ifdef CONFIG_ARM_LPAE #include #else @@ -61,7 +58,7 @@ extern void __pgd_error(const char *file, int line, pgd_t); * mapping to be mapped at. This is particularly important for * non-high vector CPUs. */ -#define FIRST_USER_ADDRESS (PAGE_SIZE * 2) +#define FIRST_USER_ADDRESS PAGE_SIZE /* * Use TASK_SIZE as the ceiling argument for free_pgtables() and @@ -100,7 +97,7 @@ extern pgprot_t pgprot_s2_device; #define PAGE_HYP _MOD_PROT(pgprot_kernel, L_PTE_HYP) #define PAGE_HYP_DEVICE _MOD_PROT(pgprot_hyp_device, L_PTE_HYP) #define PAGE_S2 _MOD_PROT(pgprot_s2, L_PTE_S2_RDONLY) -#define PAGE_S2_DEVICE _MOD_PROT(pgprot_s2_device, L_PTE_S2_RDWR) +#define PAGE_S2_DEVICE _MOD_PROT(pgprot_s2_device, L_PTE_USER | L_PTE_S2_RDONLY) #define __PAGE_NONE __pgprot(_L_PTE_DEFAULT | L_PTE_RDONLY | L_PTE_XN | L_PTE_NONE) #define __PAGE_SHARED __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_XN) @@ -214,16 +211,12 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd) #define pte_clear(mm,addr,ptep) set_pte_ext(ptep, __pte(0), 0) -#define pte_isset(pte, val) ((u32)(val) == (val) ? pte_val(pte) & (val) \ - : !!(pte_val(pte) & (val))) -#define pte_isclear(pte, val) (!(pte_val(pte) & (val))) - #define pte_none(pte) (!pte_val(pte)) -#define pte_present(pte) (pte_isset((pte), L_PTE_PRESENT)) -#define pte_write(pte) (pte_isclear((pte), L_PTE_RDONLY)) -#define pte_dirty(pte) (pte_isset((pte), L_PTE_DIRTY)) -#define pte_young(pte) (pte_isset((pte), L_PTE_YOUNG)) -#define pte_exec(pte) (pte_isclear((pte), L_PTE_XN)) +#define pte_present(pte) (pte_val(pte) & L_PTE_PRESENT) +#define pte_write(pte) (!(pte_val(pte) & L_PTE_RDONLY)) +#define pte_dirty(pte) (pte_val(pte) & L_PTE_DIRTY) +#define pte_young(pte) (pte_val(pte) & L_PTE_YOUNG) +#define pte_exec(pte) (!(pte_val(pte) & L_PTE_XN)) #define pte_special(pte) (0) #define pte_present_user(pte) (pte_present(pte) && (pte_val(pte) & L_PTE_USER)) diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h index 0cd7824ca762..f24edad26c70 100644 --- a/arch/arm/include/asm/pmu.h +++ b/arch/arm/include/asm/pmu.h @@ -62,19 +62,9 @@ struct pmu_hw_events { raw_spinlock_t pmu_lock; }; -struct cpupmu_regs { - u32 pmc; - u32 pmcntenset; - u32 pmuseren; - u32 pmintenset; - u32 pmxevttype[8]; - u32 pmxevtcnt[8]; -}; - struct arm_pmu { struct pmu pmu; cpumask_t active_irqs; - cpumask_t valid_cpus; char *name; irqreturn_t (*handle_irq)(int irq_num, void *dev); void (*enable)(struct perf_event *event); @@ -91,8 +81,6 @@ struct arm_pmu { int (*request_irq)(struct arm_pmu *, irq_handler_t handler); void (*free_irq)(struct arm_pmu *); int (*map_event)(struct perf_event *event); - void (*save_regs)(struct arm_pmu *, struct cpupmu_regs *); - void (*restore_regs)(struct arm_pmu *, struct cpupmu_regs *); int num_events; atomic_t active_events; struct mutex reserve_mutex; diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h index 413f3876341c..06e7d509eaac 100644 --- a/arch/arm/include/asm/processor.h +++ b/arch/arm/include/asm/processor.h @@ -54,6 +54,7 @@ struct thread_struct { #define start_thread(regs,pc,sp) \ ({ \ + unsigned long *stack = (unsigned long *)sp; \ memset(regs->uregs, 0, sizeof(regs->uregs)); \ if (current->personality & ADDR_LIMIT_32BIT) \ regs->ARM_cpsr = USR_MODE; \ @@ -64,6 +65,9 @@ struct thread_struct { regs->ARM_cpsr |= PSR_ENDSTATE; \ regs->ARM_pc = pc & ~1; /* pc */ \ regs->ARM_sp = sp; /* sp */ \ + regs->ARM_r2 = stack[2]; /* r2 (envp) */ \ + regs->ARM_r1 = stack[1]; /* r1 (argv) */ \ + regs->ARM_r0 = stack[0]; /* r0 (argc) */ \ nommu_start_thread(regs); \ }) diff --git a/arch/arm/include/asm/psci.h b/arch/arm/include/asm/psci.h index f0a8627c9f1c..ce0dbe7c1625 100644 --- a/arch/arm/include/asm/psci.h +++ b/arch/arm/include/asm/psci.h @@ -16,10 +16,6 @@ #define PSCI_POWER_STATE_TYPE_STANDBY 0 #define PSCI_POWER_STATE_TYPE_POWER_DOWN 1 -#define PSCI_POWER_STATE_AFFINITY_LEVEL0 0 -#define PSCI_POWER_STATE_AFFINITY_LEVEL1 1 -#define PSCI_POWER_STATE_AFFINITY_LEVEL2 2 -#define PSCI_POWER_STATE_AFFINITY_LEVEL3 3 struct psci_power_state { u16 id; @@ -36,22 +32,5 @@ struct psci_operations { }; extern struct psci_operations psci_ops; -extern struct smp_operations psci_smp_ops; -#ifdef CONFIG_ARM_PSCI -void psci_init(void); -bool psci_smp_available(void); -#else -static inline void psci_init(void) { } -static inline bool psci_smp_available(void) { return false; } -#endif - -#ifdef CONFIG_ARM_PSCI -extern int __init psci_probe(void); -#else -static inline int psci_probe(void) -{ - return -ENODEV; -} -#endif #endif /* __ASM_ARM_PSCI_H */ diff --git a/arch/arm/include/asm/rodata.h b/arch/arm/include/asm/rodata.h deleted file mode 100644 index 8c8add87bbc5..000000000000 --- a/arch/arm/include/asm/rodata.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * arch/arm/include/asm/rodata.h - * - * Copyright (C) 2011 Google, Inc. - * - * Author: Colin Cross - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef _ASMARM_RODATA_H -#define _ASMARM_RODATA_H - -#ifndef __ASSEMBLY__ - -#ifdef CONFIG_DEBUG_RODATA - -int set_memory_rw(unsigned long virt, int numpages); -int set_memory_ro(unsigned long virt, int numpages); - -void mark_rodata_ro(void); -void set_kernel_text_rw(void); -void set_kernel_text_ro(void); -#else -static inline void set_kernel_text_rw(void) { } -static inline void set_kernel_text_ro(void) { } -#endif - -#endif - -#endif diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h index 67a18a5ed9fa..d3a22bebe6ce 100644 --- a/arch/arm/include/asm/smp.h +++ b/arch/arm/include/asm/smp.h @@ -81,9 +81,6 @@ extern void arch_send_call_function_single_ipi(int cpu); extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); extern void arch_send_wakeup_ipi_mask(const struct cpumask *mask); -extern int register_ipi_completion(struct completion *completion, int cpu); -extern void smp_send_all_cpu_backtrace(void); - struct smp_operations { #ifdef CONFIG_SMP /* diff --git a/arch/arm/include/asm/smp_scu.h b/arch/arm/include/asm/smp_scu.h index 1a292d8be988..18d169373612 100644 --- a/arch/arm/include/asm/smp_scu.h +++ b/arch/arm/include/asm/smp_scu.h @@ -11,7 +11,7 @@ static inline bool scu_a9_has_base(void) { - return read_cpuid_part() == ARM_CPU_PART_CORTEX_A9; + return read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9; } static inline unsigned long scu_a9_get_base(void) diff --git a/arch/arm/include/asm/spinlock.h b/arch/arm/include/asm/spinlock.h index b07c09e5a0ac..6220e9fdf4c7 100644 --- a/arch/arm/include/asm/spinlock.h +++ b/arch/arm/include/asm/spinlock.h @@ -97,22 +97,19 @@ static inline void arch_spin_lock(arch_spinlock_t *lock) static inline int arch_spin_trylock(arch_spinlock_t *lock) { - unsigned long contended, res; + unsigned long tmp; u32 slock; - do { - __asm__ __volatile__( - " ldrex %0, [%3]\n" - " mov %2, #0\n" - " subs %1, %0, %0, ror #16\n" - " addeq %0, %0, %4\n" - " strexeq %2, %0, [%3]" - : "=&r" (slock), "=&r" (contended), "=&r" (res) - : "r" (&lock->slock), "I" (1 << TICKET_SHIFT) - : "cc"); - } while (res); - - if (!contended) { + __asm__ __volatile__( +" ldrex %0, [%2]\n" +" subs %1, %0, %0, ror #16\n" +" addeq %0, %0, %3\n" +" strexeq %1, %0, [%2]" + : "=&r" (slock), "=&r" (tmp) + : "r" (&lock->slock), "I" (1 << TICKET_SHIFT) + : "cc"); + + if (tmp == 0) { smp_mb(); return 1; } else { @@ -168,20 +165,17 @@ static inline void arch_write_lock(arch_rwlock_t *rw) static inline int arch_write_trylock(arch_rwlock_t *rw) { - unsigned long contended, res; - - do { - __asm__ __volatile__( - " ldrex %0, [%2]\n" - " mov %1, #0\n" - " teq %0, #0\n" - " strexeq %1, %3, [%2]" - : "=&r" (contended), "=&r" (res) - : "r" (&rw->lock), "r" (0x80000000) - : "cc"); - } while (res); - - if (!contended) { + unsigned long tmp; + + __asm__ __volatile__( +" ldrex %0, [%1]\n" +" teq %0, #0\n" +" strexeq %0, %2, [%1]" + : "=&r" (tmp) + : "r" (&rw->lock), "r" (0x80000000) + : "cc"); + + if (tmp == 0) { smp_mb(); return 1; } else { @@ -257,26 +251,18 @@ static inline void arch_read_unlock(arch_rwlock_t *rw) static inline int arch_read_trylock(arch_rwlock_t *rw) { - unsigned long contended, res; - - do { - __asm__ __volatile__( - " ldrex %0, [%2]\n" - " mov %1, #0\n" - " adds %0, %0, #1\n" - " strexpl %1, %0, [%2]" - : "=&r" (contended), "=&r" (res) - : "r" (&rw->lock) - : "cc"); - } while (res); - - /* If the lock is negative, then it is already held for write. */ - if (contended < 0x80000000) { - smp_mb(); - return 1; - } else { - return 0; - } + unsigned long tmp, tmp2 = 1; + + __asm__ __volatile__( +" ldrex %0, [%2]\n" +" adds %0, %0, #1\n" +" strexpl %1, %0, [%2]\n" + : "=&r" (tmp), "+r" (tmp2) + : "r" (&rw->lock) + : "cc"); + + smp_mb(); + return tmp2 == 0; } /* read_can_lock - would read_trylock() succeed? */ diff --git a/arch/arm/include/asm/syscall.h b/arch/arm/include/asm/syscall.h index ed805f1d3785..f1d96d4e8092 100644 --- a/arch/arm/include/asm/syscall.h +++ b/arch/arm/include/asm/syscall.h @@ -57,9 +57,6 @@ static inline void syscall_get_arguments(struct task_struct *task, unsigned int i, unsigned int n, unsigned long *args) { - if (n == 0) - return; - if (i + n > SYSCALL_MAX_ARGS) { unsigned long *args_bad = args + SYSCALL_MAX_ARGS - i; unsigned int n_bad = n + i - SYSCALL_MAX_ARGS; @@ -84,9 +81,6 @@ static inline void syscall_set_arguments(struct task_struct *task, unsigned int i, unsigned int n, const unsigned long *args) { - if (n == 0) - return; - if (i + n > SYSCALL_MAX_ARGS) { pr_warning("%s called with max args %d, handling only %d\n", __func__, i + n, SYSCALL_MAX_ARGS); @@ -103,7 +97,8 @@ static inline void syscall_set_arguments(struct task_struct *task, memcpy(®s->ARM_r0 + i, args, n * sizeof(args[0])); } -static inline int syscall_get_arch(void) +static inline int syscall_get_arch(struct task_struct *task, + struct pt_regs *regs) { /* ARM tasks don't change audit architectures on the fly. */ return AUDIT_ARCH_ARM; diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h index f00b5692cd9d..1995d1a84060 100644 --- a/arch/arm/include/asm/thread_info.h +++ b/arch/arm/include/asm/thread_info.h @@ -156,6 +156,7 @@ extern int vfp_restore_user_hwstate(struct user_vfp __user *, #define TIF_USING_IWMMXT 17 #define TIF_MEMDIE 18 /* is terminating due to OOM killer */ #define TIF_RESTORE_SIGMASK 20 +#define TIF_SWITCH_MM 22 /* deferred switch_mm */ #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) diff --git a/arch/arm/include/asm/tlb.h b/arch/arm/include/asm/tlb.h index 0baf7f0d9394..bdf2b8458ec1 100644 --- a/arch/arm/include/asm/tlb.h +++ b/arch/arm/include/asm/tlb.h @@ -43,7 +43,6 @@ struct mmu_gather { struct mm_struct *mm; unsigned int fullmm; struct vm_area_struct *vma; - unsigned long start, end; unsigned long range_start; unsigned long range_end; unsigned int nr; @@ -108,12 +107,10 @@ static inline void tlb_flush_mmu(struct mmu_gather *tlb) } static inline void -tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, unsigned long start, unsigned long end) +tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, unsigned int fullmm) { tlb->mm = mm; - tlb->fullmm = !(start | (end+1)); - tlb->start = start; - tlb->end = end; + tlb->fullmm = fullmm; tlb->vma = NULL; tlb->max = ARRAY_SIZE(tlb->local); tlb->pages = tlb->local; @@ -207,12 +204,6 @@ static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp, #endif } -static inline void -tlb_remove_pmd_tlb_entry(struct mmu_gather *tlb, pmd_t *pmdp, unsigned long addr) -{ - tlb_add_flush(tlb, addr); -} - #define pte_free_tlb(tlb, ptep, addr) __pte_free_tlb(tlb, ptep, addr) #define pmd_free_tlb(tlb, pmdp, addr) __pmd_free_tlb(tlb, pmdp, addr) #define pud_free_tlb(tlb, pudp, addr) pud_free((tlb)->mm, pudp) diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h index c37459299fc9..a3625d141c1d 100644 --- a/arch/arm/include/asm/tlbflush.h +++ b/arch/arm/include/asm/tlbflush.h @@ -535,8 +535,6 @@ static inline void update_mmu_cache(struct vm_area_struct *vma, } #endif -#define update_mmu_cache_pmd(vma, address, pmd) do { } while (0) - #endif #endif /* CONFIG_MMU */ diff --git a/arch/arm/include/asm/topology.h b/arch/arm/include/asm/topology.h index 983fa7c153a2..58b8b84adcd2 100644 --- a/arch/arm/include/asm/topology.h +++ b/arch/arm/include/asm/topology.h @@ -26,45 +26,11 @@ extern struct cputopo_arm cpu_topology[NR_CPUS]; void init_cpu_topology(void); void store_cpu_topology(unsigned int cpuid); const struct cpumask *cpu_coregroup_mask(int cpu); -int cluster_to_logical_mask(unsigned int socket_id, cpumask_t *cluster_mask); - -#ifdef CONFIG_DISABLE_CPU_SCHED_DOMAIN_BALANCE -/* Common values for CPUs */ -#ifndef SD_CPU_INIT -#define SD_CPU_INIT (struct sched_domain) { \ - .min_interval = 1, \ - .max_interval = 4, \ - .busy_factor = 64, \ - .imbalance_pct = 125, \ - .cache_nice_tries = 1, \ - .busy_idx = 2, \ - .idle_idx = 1, \ - .newidle_idx = 0, \ - .wake_idx = 0, \ - .forkexec_idx = 0, \ - \ - .flags = 0*SD_LOAD_BALANCE \ - | 1*SD_BALANCE_NEWIDLE \ - | 1*SD_BALANCE_EXEC \ - | 1*SD_BALANCE_FORK \ - | 0*SD_BALANCE_WAKE \ - | 1*SD_WAKE_AFFINE \ - | 0*SD_SHARE_CPUPOWER \ - | 0*SD_SHARE_PKG_RESOURCES \ - | 0*SD_SERIALIZE \ - , \ - .last_balance = jiffies, \ - .balance_interval = 1, \ -} -#endif -#endif /* CONFIG_DISABLE_CPU_SCHED_DOMAIN_BALANCE */ #else static inline void init_cpu_topology(void) { } static inline void store_cpu_topology(unsigned int cpuid) { } -static inline int cluster_to_logical_mask(unsigned int socket_id, - cpumask_t *cluster_mask) { return -EINVAL; } #endif diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h index 20e1c994669e..7e1f76027f66 100644 --- a/arch/arm/include/asm/uaccess.h +++ b/arch/arm/include/asm/uaccess.h @@ -164,9 +164,8 @@ extern int __put_user_8(void *, unsigned long long); #define __put_user_check(x,p) \ ({ \ unsigned long __limit = current_thread_info()->addr_limit - 1; \ - const typeof(*(p)) __user *__tmp_p = (p); \ register const typeof(*(p)) __r2 asm("r2") = (x); \ - register const typeof(*(p)) __user *__p asm("r0") = __tmp_p; \ + register const typeof(*(p)) __user *__p asm("r0") = (p);\ register unsigned long __l asm("r1") = __limit; \ register int __e asm("r0"); \ switch (sizeof(*(__p))) { \ diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h index 43876245fc57..141baa3f9a72 100644 --- a/arch/arm/include/asm/unistd.h +++ b/arch/arm/include/asm/unistd.h @@ -15,7 +15,7 @@ #include -#define __NR_syscalls (384) +#define __NR_syscalls (380) #define __ARM_NR_cmpxchg (__ARM_NR_BASE+0x00fff0) #define __ARCH_WANT_STAT64 @@ -48,5 +48,6 @@ */ #define __IGNORE_fadvise64_64 #define __IGNORE_migrate_pages +#define __IGNORE_kcmp #endif /* __ASM_ARM_UNISTD_H */ diff --git a/arch/arm/include/uapi/asm/Kbuild b/arch/arm/include/uapi/asm/Kbuild index 18d76fd5a2af..47bcb2d254af 100644 --- a/arch/arm/include/uapi/asm/Kbuild +++ b/arch/arm/include/uapi/asm/Kbuild @@ -1,6 +1,7 @@ # UAPI Header export list include include/uapi/asm-generic/Kbuild.asm +header-y += a.out.h header-y += byteorder.h header-y += fcntl.h header-y += hwcap.h diff --git a/arch/arm/include/uapi/asm/hwcap.h b/arch/arm/include/uapi/asm/hwcap.h index 7dcc10d67253..3688fd15a32d 100644 --- a/arch/arm/include/uapi/asm/hwcap.h +++ b/arch/arm/include/uapi/asm/hwcap.h @@ -25,7 +25,6 @@ #define HWCAP_IDIVT (1 << 18) #define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs (not 16) */ #define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT) -#define HWCAP_LPAE (1 << 20) -#define HWCAP_EVTSTRM (1 << 21) + #endif /* _UAPI__ASMARM_HWCAP_H */ diff --git a/arch/arm/include/uapi/asm/kvm.h b/arch/arm/include/uapi/asm/kvm.h index 09ee408c1a67..c1ee007523d7 100644 --- a/arch/arm/include/uapi/asm/kvm.h +++ b/arch/arm/include/uapi/asm/kvm.h @@ -20,12 +20,10 @@ #define __ARM_KVM_H__ #include -#include #include #define __KVM_HAVE_GUEST_DEBUG #define __KVM_HAVE_IRQ_LINE -#define __KVM_HAVE_READONLY_MEM #define KVM_REG_SIZE(id) \ (1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT)) @@ -65,8 +63,7 @@ struct kvm_regs { /* Supported Processor Types */ #define KVM_ARM_TARGET_CORTEX_A15 0 -#define KVM_ARM_TARGET_CORTEX_A7 1 -#define KVM_ARM_NUM_TARGETS 2 +#define KVM_ARM_NUM_TARGETS 1 /* KVM_ARM_SET_DEVICE_ADDR ioctl id encoding */ #define KVM_ARM_DEVICE_TYPE_SHIFT 0 @@ -85,7 +82,6 @@ struct kvm_regs { #define KVM_VGIC_V2_CPU_SIZE 0x2000 #define KVM_ARM_VCPU_POWER_OFF 0 /* CPU is started in OFF state */ -#define KVM_ARM_VCPU_PSCI_0_2 1 /* CPU uses PSCI v0.2 */ struct kvm_vcpu_init { __u32 target; @@ -122,26 +118,6 @@ struct kvm_arch_memory_slot { #define KVM_REG_ARM_32_CRN_MASK 0x0000000000007800 #define KVM_REG_ARM_32_CRN_SHIFT 11 -#define ARM_CP15_REG_SHIFT_MASK(x,n) \ - (((x) << KVM_REG_ARM_ ## n ## _SHIFT) & KVM_REG_ARM_ ## n ## _MASK) - -#define __ARM_CP15_REG(op1,crn,crm,op2) \ - (KVM_REG_ARM | (15 << KVM_REG_ARM_COPROC_SHIFT) | \ - ARM_CP15_REG_SHIFT_MASK(op1, OPC1) | \ - ARM_CP15_REG_SHIFT_MASK(crn, 32_CRN) | \ - ARM_CP15_REG_SHIFT_MASK(crm, CRM) | \ - ARM_CP15_REG_SHIFT_MASK(op2, 32_OPC2)) - -#define ARM_CP15_REG32(...) (__ARM_CP15_REG(__VA_ARGS__) | KVM_REG_SIZE_U32) - -#define __ARM_CP15_REG64(op1,crm) \ - (__ARM_CP15_REG(op1, 0, crm, 0) | KVM_REG_SIZE_U64) -#define ARM_CP15_REG64(...) __ARM_CP15_REG64(__VA_ARGS__) - -#define KVM_REG_ARM_TIMER_CTL ARM_CP15_REG32(0, 14, 3, 1) -#define KVM_REG_ARM_TIMER_CNT ARM_CP15_REG64(1, 14) -#define KVM_REG_ARM_TIMER_CVAL ARM_CP15_REG64(3, 14) - /* Normal registers are mapped as coprocessor 16. */ #define KVM_REG_ARM_CORE (0x0010 << KVM_REG_ARM_COPROC_SHIFT) #define KVM_REG_ARM_CORE_REG(name) (offsetof(struct kvm_regs, name) / 4) @@ -166,15 +142,6 @@ struct kvm_arch_memory_slot { #define KVM_REG_ARM_VFP_FPINST 0x1009 #define KVM_REG_ARM_VFP_FPINST2 0x100A -/* Device Control API: ARM VGIC */ -#define KVM_DEV_ARM_VGIC_GRP_ADDR 0 -#define KVM_DEV_ARM_VGIC_GRP_DIST_REGS 1 -#define KVM_DEV_ARM_VGIC_GRP_CPU_REGS 2 -#define KVM_DEV_ARM_VGIC_CPUID_SHIFT 32 -#define KVM_DEV_ARM_VGIC_CPUID_MASK (0xffULL << KVM_DEV_ARM_VGIC_CPUID_SHIFT) -#define KVM_DEV_ARM_VGIC_OFFSET_SHIFT 0 -#define KVM_DEV_ARM_VGIC_OFFSET_MASK (0xffffffffULL << KVM_DEV_ARM_VGIC_OFFSET_SHIFT) -#define KVM_DEV_ARM_VGIC_GRP_NR_IRQS 3 /* KVM_IRQ_LINE irq field index values */ #define KVM_ARM_IRQ_TYPE_SHIFT 24 @@ -205,9 +172,9 @@ struct kvm_arch_memory_slot { #define KVM_PSCI_FN_CPU_ON KVM_PSCI_FN(2) #define KVM_PSCI_FN_MIGRATE KVM_PSCI_FN(3) -#define KVM_PSCI_RET_SUCCESS PSCI_RET_SUCCESS -#define KVM_PSCI_RET_NI PSCI_RET_NOT_SUPPORTED -#define KVM_PSCI_RET_INVAL PSCI_RET_INVALID_PARAMS -#define KVM_PSCI_RET_DENIED PSCI_RET_DENIED +#define KVM_PSCI_RET_SUCCESS 0 +#define KVM_PSCI_RET_NI ((unsigned long)-1) +#define KVM_PSCI_RET_INVAL ((unsigned long)-2) +#define KVM_PSCI_RET_DENIED ((unsigned long)-3) #endif /* __ARM_KVM_H__ */ diff --git a/arch/arm/include/uapi/asm/unistd.h b/arch/arm/include/uapi/asm/unistd.h index 17407c92c0da..af33b44990ed 100644 --- a/arch/arm/include/uapi/asm/unistd.h +++ b/arch/arm/include/uapi/asm/unistd.h @@ -406,12 +406,6 @@ #define __NR_process_vm_writev (__NR_SYSCALL_BASE+377) #define __NR_kcmp (__NR_SYSCALL_BASE+378) #define __NR_finit_module (__NR_SYSCALL_BASE+379) -/* Reserve for later -#define __NR_sched_setattr (__NR_SYSCALL_BASE+380) -#define __NR_sched_getattr (__NR_SYSCALL_BASE+381) -#define __NR_renameat2 (__NR_SYSCALL_BASE+382) -*/ -#define __NR_seccomp (__NR_SYSCALL_BASE+383) /* * This may need to be greater than __NR_last_syscall+1 in order to diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index 65160d5fe850..5f3338eacad2 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile @@ -17,13 +17,13 @@ CFLAGS_REMOVE_return_address.o = -pg obj-y := elf.o entry-armv.o entry-common.o irq.o opcodes.o \ process.o ptrace.o return_address.o sched_clock.o \ - setup.o signal.o sigreturn_codes.o \ - stacktrace.o sys_arm.o time.o traps.o + setup.o signal.o stacktrace.o sys_arm.o time.o traps.o obj-$(CONFIG_ATAGS) += atags_parse.o obj-$(CONFIG_ATAGS_PROC) += atags_proc.o obj-$(CONFIG_DEPRECATED_PARAM_STRUCT) += atags_compat.o +obj-$(CONFIG_OC_ETM) += etm.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o obj-$(CONFIG_ISA_DMA_API) += dma.o obj-$(CONFIG_FIQ) += fiq.o fiqasm.o @@ -82,9 +82,6 @@ obj-$(CONFIG_DEBUG_LL) += debug.o obj-$(CONFIG_EARLY_PRINTK) += early_printk.o obj-$(CONFIG_ARM_VIRT_EXT) += hyp-stub.o -ifeq ($(CONFIG_ARM_PSCI),y) -obj-y += psci.o -obj-$(CONFIG_SMP) += psci_smp.o -endif +obj-$(CONFIG_ARM_PSCI) += psci.o extra-y := $(head-y) vmlinux.lds diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c index 776d9186e9c1..ee68cce6b48e 100644 --- a/arch/arm/kernel/asm-offsets.c +++ b/arch/arm/kernel/asm-offsets.c @@ -168,7 +168,6 @@ int main(void) DEFINE(VCPU_FIQ_REGS, offsetof(struct kvm_vcpu, arch.regs.fiq_regs)); DEFINE(VCPU_PC, offsetof(struct kvm_vcpu, arch.regs.usr_regs.ARM_pc)); DEFINE(VCPU_CPSR, offsetof(struct kvm_vcpu, arch.regs.usr_regs.ARM_cpsr)); - DEFINE(VCPU_HCR, offsetof(struct kvm_vcpu, arch.hcr)); DEFINE(VCPU_IRQ_LINES, offsetof(struct kvm_vcpu, arch.irq_lines)); DEFINE(VCPU_HSR, offsetof(struct kvm_vcpu, arch.fault.hsr)); DEFINE(VCPU_HxFAR, offsetof(struct kvm_vcpu, arch.fault.hxfar)); @@ -176,13 +175,13 @@ int main(void) DEFINE(VCPU_HYP_PC, offsetof(struct kvm_vcpu, arch.fault.hyp_pc)); #ifdef CONFIG_KVM_ARM_VGIC DEFINE(VCPU_VGIC_CPU, offsetof(struct kvm_vcpu, arch.vgic_cpu)); - DEFINE(VGIC_V2_CPU_HCR, offsetof(struct vgic_cpu, vgic_v2.vgic_hcr)); - DEFINE(VGIC_V2_CPU_VMCR, offsetof(struct vgic_cpu, vgic_v2.vgic_vmcr)); - DEFINE(VGIC_V2_CPU_MISR, offsetof(struct vgic_cpu, vgic_v2.vgic_misr)); - DEFINE(VGIC_V2_CPU_EISR, offsetof(struct vgic_cpu, vgic_v2.vgic_eisr)); - DEFINE(VGIC_V2_CPU_ELRSR, offsetof(struct vgic_cpu, vgic_v2.vgic_elrsr)); - DEFINE(VGIC_V2_CPU_APR, offsetof(struct vgic_cpu, vgic_v2.vgic_apr)); - DEFINE(VGIC_V2_CPU_LR, offsetof(struct vgic_cpu, vgic_v2.vgic_lr)); + DEFINE(VGIC_CPU_HCR, offsetof(struct vgic_cpu, vgic_hcr)); + DEFINE(VGIC_CPU_VMCR, offsetof(struct vgic_cpu, vgic_vmcr)); + DEFINE(VGIC_CPU_MISR, offsetof(struct vgic_cpu, vgic_misr)); + DEFINE(VGIC_CPU_EISR, offsetof(struct vgic_cpu, vgic_eisr)); + DEFINE(VGIC_CPU_ELRSR, offsetof(struct vgic_cpu, vgic_elrsr)); + DEFINE(VGIC_CPU_APR, offsetof(struct vgic_cpu, vgic_apr)); + DEFINE(VGIC_CPU_LR, offsetof(struct vgic_cpu, vgic_lr)); DEFINE(VGIC_CPU_NR_LR, offsetof(struct vgic_cpu, nr_lr)); #ifdef CONFIG_KVM_ARM_TIMER DEFINE(VCPU_TIMER_CNTV_CTL, offsetof(struct kvm_vcpu, arch.timer_cpu.cntv_ctl)); diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S index 725f844926ea..c6ca7e376773 100644 --- a/arch/arm/kernel/calls.S +++ b/arch/arm/kernel/calls.S @@ -389,11 +389,6 @@ CALL(sys_process_vm_writev) CALL(sys_kcmp) CALL(sys_finit_module) -/* 380 */ CALL(sys_ni_syscall) /* reserved sys_sched_setattr */ - CALL(sys_ni_syscall) /* reserved sys_sched_getattr */ - CALL(sys_ni_syscall) /* reserved sys_renameat2 */ - CALL(sys_seccomp) - #ifndef syscalls_counted .equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls #define syscalls_counted diff --git a/arch/arm/kernel/crash_dump.c b/arch/arm/kernel/crash_dump.c index 5d1286d51154..90c50d4b43f7 100644 --- a/arch/arm/kernel/crash_dump.c +++ b/arch/arm/kernel/crash_dump.c @@ -39,7 +39,7 @@ ssize_t copy_oldmem_page(unsigned long pfn, char *buf, if (!csize) return 0; - vaddr = ioremap(__pfn_to_phys(pfn), PAGE_SIZE); + vaddr = ioremap(pfn << PAGE_SHIFT, PAGE_SIZE); if (!vaddr) return -ENOMEM; diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c index a44e7d11ab02..5859c8bc727c 100644 --- a/arch/arm/kernel/devtree.c +++ b/arch/arm/kernel/devtree.c @@ -212,7 +212,7 @@ struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys) } if (!mdesc_best) { const char *prop; - int size; + long size; early_print("\nError: unrecognized/unsupported " "device tree compatible list:\n[ "); diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index e5dc7c83772e..582b405befc5 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -192,7 +192,6 @@ __dabt_svc: svc_entry mov r2, sp dabt_helper - THUMB( ldr r5, [sp, #S_PSR] ) @ potentially updated CPSR svc_exit r5 @ return from exception UNWIND(.fnend ) ENDPROC(__dabt_svc) @@ -358,8 +357,7 @@ ENDPROC(__pabt_svc) .endm .macro kuser_cmpxchg_check -#if !defined(CONFIG_CPU_32v6K) && defined(CONFIG_KUSER_HELPERS) && \ - !defined(CONFIG_NEEDS_SYSCALL_FOR_CMPXCHG) +#if !defined(CONFIG_CPU_32v6K) && !defined(CONFIG_NEEDS_SYSCALL_FOR_CMPXCHG) #ifndef CONFIG_MMU #warning "NPTL on non MMU needs fixing" #else @@ -417,8 +415,9 @@ __und_usr: bne __und_usr_thumb sub r4, r2, #4 @ ARM instr at LR - 4 1: ldrt r0, [r4] - ARM_BE8(rev r0, r0) @ little endian instruction - +#ifdef CONFIG_CPU_ENDIAN_BE8 + rev r0, r0 @ little endian instruction +#endif @ r0 = 32-bit ARM instruction which caused the exception @ r2 = PC value for the following instruction (:= regs->ARM_pc) @ r4 = PC value for the faulting instruction @@ -742,18 +741,6 @@ ENDPROC(__switch_to) #endif .endm - .macro kuser_pad, sym, size - .if (. - \sym) & 3 - .rept 4 - (. - \sym) & 3 - .byte 0 - .endr - .endif - .rept (\size - (. - \sym)) / 4 - .word 0xe7fddef1 - .endr - .endm - -#ifdef CONFIG_KUSER_HELPERS .align 5 .globl __kuser_helper_start __kuser_helper_start: @@ -844,13 +831,18 @@ kuser_cmpxchg64_fixup: #error "incoherent kernel configuration" #endif - kuser_pad __kuser_cmpxchg64, 64 + /* pad to next slot */ + .rept (16 - (. - __kuser_cmpxchg64)/4) + .word 0 + .endr + + .align 5 __kuser_memory_barrier: @ 0xffff0fa0 smp_dmb arm usr_ret lr - kuser_pad __kuser_memory_barrier, 32 + .align 5 __kuser_cmpxchg: @ 0xffff0fc0 @@ -923,14 +915,13 @@ kuser_cmpxchg32_fixup: #endif - kuser_pad __kuser_cmpxchg, 32 + .align 5 __kuser_get_tls: @ 0xffff0fe0 ldr r0, [pc, #(16 - 8)] @ read TLS, set in kuser_get_tls_init usr_ret lr mrc p15, 0, r0, c13, c0, 3 @ 0xffff0fe8 hardware TLS code - kuser_pad __kuser_get_tls, 16 - .rep 3 + .rep 4 .word 0 @ 0xffff0ff0 software TLS value, then .endr @ pad up to __kuser_helper_version @@ -940,16 +931,14 @@ __kuser_helper_version: @ 0xffff0ffc .globl __kuser_helper_end __kuser_helper_end: -#endif - THUMB( .thumb ) /* * Vector stubs. * - * This code is copied to 0xffff1000 so we can use branches in the - * vectors, rather than ldr's. Note that this code must not exceed - * a page size. + * This code is copied to 0xffff0200 so we can use branches in the + * vectors, rather than ldr's. Note that this code must not + * exceed 0x300 bytes. * * Common stub entry macro: * Enter in IRQ mode, spsr = SVC/USR CPSR, lr = SVC/USR PC @@ -996,17 +985,8 @@ ENDPROC(vector_\name) 1: .endm - .section .stubs, "ax", %progbits + .globl __stubs_start __stubs_start: - @ This must be the first word - .word vector_swi - -vector_rst: - ARM( swi SYS_ERROR0 ) - THUMB( svc #0 ) - THUMB( nop ) - b vector_und - /* * Interrupt dispatcher */ @@ -1100,16 +1080,6 @@ vector_rst: .align 5 -/*============================================================================= - * Address exception handler - *----------------------------------------------------------------------------- - * These aren't too critical. - * (they're not supposed to happen, and won't happen in 32-bit data mode). - */ - -vector_addrexcptn: - b vector_addrexcptn - /*============================================================================= * Undefined FIQs *----------------------------------------------------------------------------- @@ -1123,19 +1093,45 @@ vector_addrexcptn: vector_fiq: subs pc, lr, #4 - .globl vector_fiq_offset - .equ vector_fiq_offset, vector_fiq +/*============================================================================= + * Address exception handler + *----------------------------------------------------------------------------- + * These aren't too critical. + * (they're not supposed to happen, and won't happen in 32-bit data mode). + */ - .section .vectors, "ax", %progbits +vector_addrexcptn: + b vector_addrexcptn + +/* + * We group all the following data together to optimise + * for CPUs with separate I & D caches. + */ + .align 5 + +.LCvswi: + .word vector_swi + + .globl __stubs_end +__stubs_end: + + .equ stubs_offset, __vectors_start + 0x200 - __stubs_start + + .globl __vectors_start __vectors_start: - W(b) vector_rst - W(b) vector_und - W(ldr) pc, __vectors_start + 0x1000 - W(b) vector_pabt - W(b) vector_dabt - W(b) vector_addrexcptn - W(b) vector_irq - W(b) vector_fiq + ARM( swi SYS_ERROR0 ) + THUMB( svc #0 ) + THUMB( nop ) + W(b) vector_und + stubs_offset + W(ldr) pc, .LCvswi + stubs_offset + W(b) vector_pabt + stubs_offset + W(b) vector_dabt + stubs_offset + W(b) vector_addrexcptn + stubs_offset + W(b) vector_irq + stubs_offset + W(b) vector_fiq + stubs_offset + + .globl __vectors_end +__vectors_end: .data diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index ce77f7b78ff3..bc5bc0a97131 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S @@ -32,9 +32,7 @@ ret_fast_syscall: UNWIND(.fnstart ) UNWIND(.cantunwind ) disable_irq @ disable interrupts - ldr r1, [tsk, #TI_FLAGS] @ re-check for syscall tracing - tst r1, #_TIF_SYSCALL_WORK - bne __sys_trace_return + ldr r1, [tsk, #TI_FLAGS] tst r1, #_TIF_WORK_MASK bne fast_work_pending asm_trace_hardirqs_on @@ -364,16 +362,6 @@ ENTRY(vector_swi) str r0, [sp, #S_OLD_R0] @ Save OLD_R0 zero_fp -#ifdef CONFIG_ALIGNMENT_TRAP - ldr ip, __cr_alignment - ldr ip, [ip] - mcr p15, 0, ip, c1, c0 @ update control register -#endif - - enable_irq - ct_user_exit - get_thread_info tsk - /* * Get the system call number. */ @@ -387,11 +375,13 @@ ENTRY(vector_swi) #ifdef CONFIG_ARM_THUMB tst r8, #PSR_T_BIT movne r10, #0 @ no thumb OABI emulation - USER( ldreq r10, [lr, #-4] ) @ get SWI instruction + ldreq r10, [lr, #-4] @ get SWI instruction #else - USER( ldr r10, [lr, #-4] ) @ get SWI instruction + ldr r10, [lr, #-4] @ get SWI instruction +#endif +#ifdef CONFIG_CPU_ENDIAN_BE8 + rev r10, r10 @ little endian instruction #endif - ARM_BE8(rev r10, r10) @ little endian instruction #elif defined(CONFIG_AEABI) @@ -402,13 +392,22 @@ ENTRY(vector_swi) /* Legacy ABI only, possibly thumb mode. */ tst r8, #PSR_T_BIT @ this is SPSR from save_user_regs addne scno, r7, #__NR_SYSCALL_BASE @ put OS number in - USER( ldreq scno, [lr, #-4] ) + ldreq scno, [lr, #-4] #else /* Legacy ABI only. */ - USER( ldr scno, [lr, #-4] ) @ get SWI instruction + ldr scno, [lr, #-4] @ get SWI instruction #endif +#ifdef CONFIG_ALIGNMENT_TRAP + ldr ip, __cr_alignment + ldr ip, [ip] + mcr p15, 0, ip, c1, c0 @ update control register +#endif + enable_irq + ct_user_exit + + get_thread_info tsk adr tbl, sys_call_table @ load syscall table pointer #if defined(CONFIG_OABI_COMPAT) @@ -443,21 +442,6 @@ local_restart: eor r0, scno, #__NR_SYSCALL_BASE @ put OS number back bcs arm_syscall b sys_ni_syscall @ not private func - -#if defined(CONFIG_OABI_COMPAT) || !defined(CONFIG_AEABI) - /* - * We failed to handle a fault trying to access the page - * containing the swi instruction, but we're not really in a - * position to return -EFAULT. Instead, return back to the - * instruction and re-enter the user fault handling path trying - * to page it in. This will likely result in sending SEGV to the - * current task. - */ -9001: - sub lr, lr, #4 - str lr, [sp, #S_PC] - b ret_fast_syscall -#endif ENDPROC(vector_swi) /* diff --git a/arch/arm/kernel/fiq.c b/arch/arm/kernel/fiq.c index 918875d96d5d..2adda11f712f 100644 --- a/arch/arm/kernel/fiq.c +++ b/arch/arm/kernel/fiq.c @@ -47,11 +47,6 @@ #include #include -#define FIQ_OFFSET ({ \ - extern void *vector_fiq_offset; \ - (unsigned)&vector_fiq_offset; \ - }) - static unsigned long no_fiq_insn; /* Default reacquire function @@ -84,14 +79,14 @@ int show_fiq_list(struct seq_file *p, int prec) void set_fiq_handler(void *start, unsigned int length) { - void *base = vectors_page; - unsigned offset = FIQ_OFFSET; - - memcpy(base + offset, start, length); - if (!cache_is_vipt_nonaliasing()) - flush_icache_range((unsigned long)base + offset, offset + - length); - flush_icache_range(0xffff0000 + offset, 0xffff0000 + offset + length); +#if defined(CONFIG_CPU_USE_DOMAINS) + memcpy((void *)0xffff001c, start, length); +#else + memcpy(vectors_page + 0x1c, start, length); +#endif + flush_icache_range(0xffff001c, 0xffff001c + length); + if (!vectors_high()) + flush_icache_range(0x1c, 0x1c + length); } int claim_fiq(struct fiq_handler *f) @@ -149,7 +144,6 @@ EXPORT_SYMBOL(disable_fiq); void __init init_FIQ(int start) { - unsigned offset = FIQ_OFFSET; - no_fiq_insn = *(unsigned long *)(0xffff0000 + offset); + no_fiq_insn = *(unsigned long *)0xffff001c; fiq_start = start; } diff --git a/arch/arm/kernel/ftrace.c b/arch/arm/kernel/ftrace.c index 6a740a93f4bb..34e56647dcee 100644 --- a/arch/arm/kernel/ftrace.c +++ b/arch/arm/kernel/ftrace.c @@ -13,7 +13,6 @@ */ #include -#include #include #include @@ -64,20 +63,6 @@ static unsigned long adjust_address(struct dyn_ftrace *rec, unsigned long addr) } #endif -int ftrace_arch_code_modify_prepare(void) -{ - set_kernel_text_rw(); - set_all_modules_text_rw(); - return 0; -} - -int ftrace_arch_code_modify_post_process(void) -{ - set_all_modules_text_ro(); - set_kernel_text_ro(); - return 0; -} - static unsigned long ftrace_call_replace(unsigned long pc, unsigned long addr) { return arm_gen_branch_link(pc, addr); diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 2d1bf8c6353d..8bac553fe213 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S @@ -77,7 +77,6 @@ __HEAD ENTRY(stext) - ARM_BE8(setend be ) @ ensure we are in BE8 mode THUMB( adr r9, BSYM(1f) ) @ Kernel is always entered in ARM. THUMB( bx r9 ) @ If this is a Thumb-2 kernel, @@ -110,7 +109,7 @@ ENTRY(stext) sub r4, r3, r4 @ (PHYS_OFFSET - PAGE_OFFSET) add r8, r8, r4 @ PHYS_OFFSET #else - ldr r8, =PLAT_PHYS_OFFSET @ always constant in this case + ldr r8, =PHYS_OFFSET @ always constant in this case #endif /* @@ -343,6 +342,7 @@ __turn_mmu_on_loc: .long __turn_mmu_on_end #if defined(CONFIG_SMP) + __CPUINIT ENTRY(secondary_startup) /* * Common entry point for secondary CPUs. @@ -351,9 +351,6 @@ ENTRY(secondary_startup) * the processor type - there is no need to check the machine type * as it has already been validated by the primary processor. */ - - ARM_BE8(setend be) @ ensure we are in BE8 mode - #ifdef CONFIG_ARM_VIRT_EXT bl __hyp_stub_install_secondary #endif @@ -587,10 +584,8 @@ __fixup_a_pv_table: b 2f 1: add r7, r3 ldrh ip, [r7, #2] -ARM_BE8(rev16 ip, ip) and ip, 0x8f00 orr ip, r6 @ mask in offset bits 31-24 -ARM_BE8(rev16 ip, ip) strh ip, [r7, #2] 2: cmp r4, r5 ldrcc r7, [r4], #4 @ use branch for delay slot @@ -599,14 +594,8 @@ ARM_BE8(rev16 ip, ip) #else b 2f 1: ldr ip, [r7, r3] -#ifdef CONFIG_CPU_ENDIAN_BE8 - @ in BE8, we load data in BE, but instructions still in LE - bic ip, ip, #0xff000000 - orr ip, ip, r6, lsl#24 -#else bic ip, ip, #0x000000ff orr ip, ip, r6 @ mask in offset bits 31-24 -#endif str ip, [r7, r3] 2: cmp r4, r5 ldrcc r7, [r4], #4 @ use branch for delay slot diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c index 7eee611b6ee5..1fd749ee4a1b 100644 --- a/arch/arm/kernel/hw_breakpoint.c +++ b/arch/arm/kernel/hw_breakpoint.c @@ -29,7 +29,6 @@ #include #include #include -#include #include #include @@ -37,6 +36,7 @@ #include #include #include +#include /* Breakpoint currently in use for each BRP. */ static DEFINE_PER_CPU(struct perf_event *, bp_on_reg[ARM_MAX_BRP]); @@ -975,7 +975,7 @@ static void reset_ctrl_regs(void *unused) * Unconditionally clear the OS lock by writing a value * other than CS_LAR_KEY to the access register. */ - ARM_DBG_WRITE(c1, c0, 4, ~CORESIGHT_UNLOCK); + ARM_DBG_WRITE(c1, c0, 4, ~CS_LAR_KEY); isb(); /* @@ -1049,8 +1049,7 @@ static struct notifier_block dbg_cpu_pm_nb = { static void __init pm_init(void) { - if (has_ossr) - cpu_pm_register_notifier(&dbg_cpu_pm_nb); + cpu_pm_register_notifier(&dbg_cpu_pm_nb); } #else static inline void pm_init(void) diff --git a/arch/arm/kernel/hyp-stub.S b/arch/arm/kernel/hyp-stub.S index dbe21107945a..1315c4ccfa56 100644 --- a/arch/arm/kernel/hyp-stub.S +++ b/arch/arm/kernel/hyp-stub.S @@ -153,8 +153,6 @@ THUMB( orr r7, #(1 << 30) ) @ HSCTLR.TE mrc p15, 4, r7, c14, c1, 0 @ CNTHCTL orr r7, r7, #3 @ PL1PCEN | PL1PCTEN mcr p15, 4, r7, c14, c1, 0 @ CNTHCTL - mov r7, #0 - mcrr p15, 4, r7, r7, c14 @ CNTVOFF 1: #endif diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c index 1e782bdeee49..9723d17b8f38 100644 --- a/arch/arm/kernel/irq.c +++ b/arch/arm/kernel/irq.c @@ -163,7 +163,7 @@ static bool migrate_one_irq(struct irq_desc *desc) c = irq_data_get_irq_chip(d); if (!c->irq_set_affinity) pr_debug("IRQ%u: unable to set affinity\n", d->irq); - else if (c->irq_set_affinity(d, affinity, false) == IRQ_SET_MASK_OK && ret) + else if (c->irq_set_affinity(d, affinity, true) == IRQ_SET_MASK_OK && ret) cpumask_copy(d->affinity, affinity); return ret; diff --git a/arch/arm/kernel/kgdb.c b/arch/arm/kernel/kgdb.c index b321c8fbb87d..778c2f7024ff 100644 --- a/arch/arm/kernel/kgdb.c +++ b/arch/arm/kernel/kgdb.c @@ -144,8 +144,6 @@ int kgdb_arch_handle_exception(int exception_vector, int signo, static int kgdb_brk_fn(struct pt_regs *regs, unsigned int instr) { - if (user_mode(regs)) - return -1; kgdb_handle_exception(1, SIGTRAP, 0, regs); return 0; @@ -153,8 +151,6 @@ static int kgdb_brk_fn(struct pt_regs *regs, unsigned int instr) static int kgdb_compiled_brk_fn(struct pt_regs *regs, unsigned int instr) { - if (user_mode(regs)) - return -1; compiled_break = 1; kgdb_handle_exception(1, SIGTRAP, 0, regs); diff --git a/arch/arm/kernel/kprobes-common.c b/arch/arm/kernel/kprobes-common.c index 380c20fb9c85..18a76282970e 100644 --- a/arch/arm/kernel/kprobes-common.c +++ b/arch/arm/kernel/kprobes-common.c @@ -14,7 +14,6 @@ #include #include #include -#include #include "kprobes.h" @@ -306,8 +305,7 @@ kprobe_decode_ldmstm(kprobe_opcode_t insn, struct arch_specific_insn *asi) if (handler) { /* We can emulate the instruction in (possibly) modified form */ - asi->insn[0] = __opcode_to_mem_arm((insn & 0xfff00000) | - (rn << 16) | reglist); + asi->insn[0] = (insn & 0xfff00000) | (rn << 16) | reglist; asi->insn_handler = handler; return INSN_GOOD; } @@ -336,14 +334,13 @@ prepare_emulated_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi, #ifdef CONFIG_THUMB2_KERNEL if (thumb) { u16 *thumb_insn = (u16 *)asi->insn; - /* Thumb bx lr */ - thumb_insn[1] = __opcode_to_mem_thumb16(0x4770); - thumb_insn[2] = __opcode_to_mem_thumb16(0x4770); + thumb_insn[1] = 0x4770; /* Thumb bx lr */ + thumb_insn[2] = 0x4770; /* Thumb bx lr */ return insn; } - asi->insn[1] = __opcode_to_mem_arm(0xe12fff1e); /* ARM bx lr */ + asi->insn[1] = 0xe12fff1e; /* ARM bx lr */ #else - asi->insn[1] = __opcode_to_mem_arm(0xe1a0f00e); /* mov pc, lr */ + asi->insn[1] = 0xe1a0f00e; /* mov pc, lr */ #endif /* Make an ARM instruction unconditional */ if (insn < 0xe0000000) @@ -363,12 +360,12 @@ set_emulated_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi, if (thumb) { u16 *ip = (u16 *)asi->insn; if (is_wide_instruction(insn)) - *ip++ = __opcode_to_mem_thumb16(insn >> 16); - *ip++ = __opcode_to_mem_thumb16(insn); + *ip++ = insn >> 16; + *ip++ = insn; return; } #endif - asi->insn[0] = __opcode_to_mem_arm(insn); + asi->insn[0] = insn; } /* diff --git a/arch/arm/kernel/kprobes-thumb.c b/arch/arm/kernel/kprobes-thumb.c index b82e798983c4..6123daf397a7 100644 --- a/arch/arm/kernel/kprobes-thumb.c +++ b/arch/arm/kernel/kprobes-thumb.c @@ -163,9 +163,9 @@ t32_decode_ldmstm(kprobe_opcode_t insn, struct arch_specific_insn *asi) enum kprobe_insn ret = kprobe_decode_ldmstm(insn, asi); /* Fixup modified instruction to have halfwords in correct order...*/ - insn = __mem_to_opcode_arm(asi->insn[0]); - ((u16 *)asi->insn)[0] = __opcode_to_mem_thumb16(insn >> 16); - ((u16 *)asi->insn)[1] = __opcode_to_mem_thumb16(insn & 0xffff); + insn = asi->insn[0]; + ((u16 *)asi->insn)[0] = insn >> 16; + ((u16 *)asi->insn)[1] = insn & 0xffff; return ret; } @@ -1153,7 +1153,7 @@ t16_decode_hiregs(kprobe_opcode_t insn, struct arch_specific_insn *asi) { insn &= ~0x00ff; insn |= 0x001; /* Set Rdn = R1 and Rm = R0 */ - ((u16 *)asi->insn)[0] = __opcode_to_mem_thumb16(insn); + ((u16 *)asi->insn)[0] = insn; asi->insn_handler = t16_emulate_hiregs; return INSN_GOOD; } @@ -1182,10 +1182,8 @@ t16_decode_push(kprobe_opcode_t insn, struct arch_specific_insn *asi) * and call it with R9=SP and LR in the register list represented * by R8. */ - /* 1st half STMDB R9!,{} */ - ((u16 *)asi->insn)[0] = __opcode_to_mem_thumb16(0xe929); - /* 2nd half (register list) */ - ((u16 *)asi->insn)[1] = __opcode_to_mem_thumb16(insn & 0x1ff); + ((u16 *)asi->insn)[0] = 0xe929; /* 1st half STMDB R9!,{} */ + ((u16 *)asi->insn)[1] = insn & 0x1ff; /* 2nd half (register list) */ asi->insn_handler = t16_emulate_push; return INSN_GOOD; } @@ -1234,10 +1232,8 @@ t16_decode_pop(kprobe_opcode_t insn, struct arch_specific_insn *asi) * and call it with R9=SP and PC in the register list represented * by R8. */ - /* 1st half LDMIA R9!,{} */ - ((u16 *)asi->insn)[0] = __opcode_to_mem_thumb16(0xe8b9); - /* 2nd half (register list) */ - ((u16 *)asi->insn)[1] = __opcode_to_mem_thumb16(insn & 0x1ff); + ((u16 *)asi->insn)[0] = 0xe8b9; /* 1st half LDMIA R9!,{} */ + ((u16 *)asi->insn)[1] = insn & 0x1ff; /* 2nd half (register list) */ asi->insn_handler = insn & 0x100 ? t16_emulate_pop_pc : t16_emulate_pop_nopc; return INSN_GOOD; diff --git a/arch/arm/kernel/kprobes.c b/arch/arm/kernel/kprobes.c index 1c6ece51781c..170e9f34003f 100644 --- a/arch/arm/kernel/kprobes.c +++ b/arch/arm/kernel/kprobes.c @@ -26,7 +26,6 @@ #include #include #include -#include #include #include "kprobes.h" @@ -63,10 +62,10 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p) #ifdef CONFIG_THUMB2_KERNEL thumb = true; addr &= ~1; /* Bit 0 would normally be set to indicate Thumb code */ - insn = __mem_to_opcode_thumb16(((u16 *)addr)[0]); + insn = ((u16 *)addr)[0]; if (is_wide_instruction(insn)) { - u16 inst2 = __mem_to_opcode_thumb16(((u16 *)addr)[1]); - insn = __opcode_thumb32_compose(insn, inst2); + insn <<= 16; + insn |= ((u16 *)addr)[1]; decode_insn = thumb32_kprobe_decode_insn; } else decode_insn = thumb16_kprobe_decode_insn; @@ -74,7 +73,7 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p) thumb = false; if (addr & 0x3) return -EINVAL; - insn = __mem_to_opcode_arm(*p->addr); + insn = *p->addr; decode_insn = arm_kprobe_decode_insn; #endif diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c index 70ae735dec53..4fb074c446bf 100644 --- a/arch/arm/kernel/machine_kexec.c +++ b/arch/arm/kernel/machine_kexec.c @@ -14,11 +14,10 @@ #include #include #include -#include #include #include -extern void relocate_new_kernel(void); +extern const unsigned char relocate_new_kernel[]; extern const unsigned int relocate_new_kernel_size; extern unsigned long kexec_start_address; @@ -74,7 +73,6 @@ void machine_crash_nonpanic_core(void *unused) crash_save_cpu(®s, smp_processor_id()); flush_cache_all(); - set_cpu_online(smp_processor_id(), false); atomic_dec(&waiting_for_crash_ipi); while (1) cpu_relax(); @@ -134,8 +132,6 @@ void machine_kexec(struct kimage *image) { unsigned long page_list; unsigned long reboot_code_buffer_phys; - unsigned long reboot_entry = (unsigned long)relocate_new_kernel; - unsigned long reboot_entry_phys; void *reboot_code_buffer; if (num_online_cpus() > 1) { @@ -159,23 +155,16 @@ void machine_kexec(struct kimage *image) /* copy our kernel relocation code to the control code page */ - reboot_entry = fncpy(reboot_code_buffer, - reboot_entry, - relocate_new_kernel_size); - reboot_entry_phys = (unsigned long)reboot_entry + - (reboot_code_buffer_phys - (unsigned long)reboot_code_buffer); + memcpy(reboot_code_buffer, + relocate_new_kernel, relocate_new_kernel_size); + + flush_icache_range((unsigned long) reboot_code_buffer, + (unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE); printk(KERN_INFO "Bye!\n"); if (kexec_reinit) kexec_reinit(); - soft_restart(reboot_entry_phys); -} - -void arch_crash_save_vmcoreinfo(void) -{ -#ifdef CONFIG_ARM_LPAE - VMCOREINFO_CONFIG(ARM_LPAE); -#endif + soft_restart(reboot_code_buffer_phys); } diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c index 1705ee80d097..1e9be5d25e56 100644 --- a/arch/arm/kernel/module.c +++ b/arch/arm/kernel/module.c @@ -24,7 +24,6 @@ #include #include #include -#include #ifdef CONFIG_XIP_KERNEL /* @@ -61,7 +60,6 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, Elf32_Sym *sym; const char *symname; s32 offset; - u32 tmp; #ifdef CONFIG_THUMB2_KERNEL u32 upper, lower, sign, j1, j2; #endif @@ -97,8 +95,7 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, case R_ARM_PC24: case R_ARM_CALL: case R_ARM_JUMP24: - offset = __mem_to_opcode_arm(*(u32 *)loc); - offset = (offset & 0x00ffffff) << 2; + offset = (*(u32 *)loc & 0x00ffffff) << 2; if (offset & 0x02000000) offset -= 0x04000000; @@ -114,10 +111,9 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, } offset >>= 2; - offset &= 0x00ffffff; - *(u32 *)loc &= __opcode_to_mem_arm(0xff000000); - *(u32 *)loc |= __opcode_to_mem_arm(offset); + *(u32 *)loc &= 0xff000000; + *(u32 *)loc |= offset & 0x00ffffff; break; case R_ARM_V4BX: @@ -125,8 +121,8 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, * other bits to re-code instruction as * MOV PC,Rm. */ - *(u32 *)loc &= __opcode_to_mem_arm(0xf000000f); - *(u32 *)loc |= __opcode_to_mem_arm(0x01a0f000); + *(u32 *)loc &= 0xf000000f; + *(u32 *)loc |= 0x01a0f000; break; case R_ARM_PREL31: @@ -136,7 +132,7 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, case R_ARM_MOVW_ABS_NC: case R_ARM_MOVT_ABS: - offset = tmp = __mem_to_opcode_arm(*(u32 *)loc); + offset = *(u32 *)loc; offset = ((offset & 0xf0000) >> 4) | (offset & 0xfff); offset = (offset ^ 0x8000) - 0x8000; @@ -144,18 +140,16 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, if (ELF32_R_TYPE(rel->r_info) == R_ARM_MOVT_ABS) offset >>= 16; - tmp &= 0xfff0f000; - tmp |= ((offset & 0xf000) << 4) | - (offset & 0x0fff); - - *(u32 *)loc = __opcode_to_mem_arm(tmp); + *(u32 *)loc &= 0xfff0f000; + *(u32 *)loc |= ((offset & 0xf000) << 4) | + (offset & 0x0fff); break; #ifdef CONFIG_THUMB2_KERNEL case R_ARM_THM_CALL: case R_ARM_THM_JUMP24: - upper = __mem_to_opcode_thumb16(*(u16 *)loc); - lower = __mem_to_opcode_thumb16(*(u16 *)(loc + 2)); + upper = *(u16 *)loc; + lower = *(u16 *)(loc + 2); /* * 25 bit signed address range (Thumb-2 BL and B.W @@ -204,20 +198,17 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, sign = (offset >> 24) & 1; j1 = sign ^ (~(offset >> 23) & 1); j2 = sign ^ (~(offset >> 22) & 1); - upper = (u16)((upper & 0xf800) | (sign << 10) | + *(u16 *)loc = (u16)((upper & 0xf800) | (sign << 10) | ((offset >> 12) & 0x03ff)); - lower = (u16)((lower & 0xd000) | - (j1 << 13) | (j2 << 11) | - ((offset >> 1) & 0x07ff)); - - *(u16 *)loc = __opcode_to_mem_thumb16(upper); - *(u16 *)(loc + 2) = __opcode_to_mem_thumb16(lower); + *(u16 *)(loc + 2) = (u16)((lower & 0xd000) | + (j1 << 13) | (j2 << 11) | + ((offset >> 1) & 0x07ff)); break; case R_ARM_THM_MOVW_ABS_NC: case R_ARM_THM_MOVT_ABS: - upper = __mem_to_opcode_thumb16(*(u16 *)loc); - lower = __mem_to_opcode_thumb16(*(u16 *)(loc + 2)); + upper = *(u16 *)loc; + lower = *(u16 *)(loc + 2); /* * MOVT/MOVW instructions encoding in Thumb-2: @@ -238,14 +229,12 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, if (ELF32_R_TYPE(rel->r_info) == R_ARM_THM_MOVT_ABS) offset >>= 16; - upper = (u16)((upper & 0xfbf0) | - ((offset & 0xf000) >> 12) | - ((offset & 0x0800) >> 1)); - lower = (u16)((lower & 0x8f00) | - ((offset & 0x0700) << 4) | - (offset & 0x00ff)); - *(u16 *)loc = __opcode_to_mem_thumb16(upper); - *(u16 *)(loc + 2) = __opcode_to_mem_thumb16(lower); + *(u16 *)loc = (u16)((upper & 0xfbf0) | + ((offset & 0xf000) >> 12) | + ((offset & 0x0800) >> 1)); + *(u16 *)(loc + 2) = (u16)((lower & 0x8f00) | + ((offset & 0x0700) << 4) | + (offset & 0x00ff)); break; #endif @@ -307,10 +296,6 @@ int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs, maps[ARM_SEC_EXIT].unw_sec = s; else if (strcmp(".ARM.exidx.devexit.text", secname) == 0) maps[ARM_SEC_DEVEXIT].unw_sec = s; - else if (strcmp(".ARM.exidx.text.unlikely", secname) == 0) - maps[ARM_SEC_UNLIKELY].unw_sec = s; - else if (strcmp(".ARM.exidx.text.hot", secname) == 0) - maps[ARM_SEC_HOT].unw_sec = s; else if (strcmp(".init.text", secname) == 0) maps[ARM_SEC_INIT].txt_sec = s; else if (strcmp(".devinit.text", secname) == 0) @@ -321,10 +306,6 @@ int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs, maps[ARM_SEC_EXIT].txt_sec = s; else if (strcmp(".devexit.text", secname) == 0) maps[ARM_SEC_DEVEXIT].txt_sec = s; - else if (strcmp(".text.unlikely", secname) == 0) - maps[ARM_SEC_UNLIKELY].txt_sec = s; - else if (strcmp(".text.hot", secname) == 0) - maps[ARM_SEC_HOT].txt_sec = s; } for (i = 0; i < ARM_SEC_MAX; i++) diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c index b41749fe56dc..8c3094d0f7b7 100644 --- a/arch/arm/kernel/perf_event.c +++ b/arch/arm/kernel/perf_event.c @@ -12,7 +12,6 @@ */ #define pr_fmt(fmt) "hw perfevents: " fmt -#include #include #include #include @@ -54,12 +53,7 @@ armpmu_map_cache_event(const unsigned (*cache_map) static int armpmu_map_hw_event(const unsigned (*event_map)[PERF_COUNT_HW_MAX], u64 config) { - int mapping; - - if (config >= PERF_COUNT_HW_MAX) - return -ENOENT; - - mapping = (*event_map)[config]; + int mapping = (*event_map)[config]; return mapping == HW_OP_UNSUPPORTED ? -ENOENT : mapping; } @@ -87,9 +81,6 @@ armpmu_map_event(struct perf_event *event, return armpmu_map_cache_event(cache_map, config); case PERF_TYPE_RAW: return armpmu_map_raw_event(raw_event_mask, config); - default: - if (event->attr.type >= PERF_TYPE_MAX) - return armpmu_map_raw_event(raw_event_mask, config); } return -ENOENT; @@ -167,8 +158,6 @@ armpmu_stop(struct perf_event *event, int flags) struct arm_pmu *armpmu = to_arm_pmu(event->pmu); struct hw_perf_event *hwc = &event->hw; - if (!cpumask_test_cpu(smp_processor_id(), &armpmu->valid_cpus)) - return; /* * ARM pmu always has to update the counter, so ignore * PERF_EF_UPDATE, see comments in armpmu_start(). @@ -185,8 +174,6 @@ static void armpmu_start(struct perf_event *event, int flags) struct arm_pmu *armpmu = to_arm_pmu(event->pmu); struct hw_perf_event *hwc = &event->hw; - if (!cpumask_test_cpu(smp_processor_id(), &armpmu->valid_cpus)) - return; /* * ARM pmu always has to reprogram the period, so ignore * PERF_EF_RELOAD, see the comment below. @@ -214,9 +201,6 @@ armpmu_del(struct perf_event *event, int flags) struct hw_perf_event *hwc = &event->hw; int idx = hwc->idx; - if (!cpumask_test_cpu(smp_processor_id(), &armpmu->valid_cpus)) - return; - armpmu_stop(event, PERF_EF_UPDATE); hw_events->events[idx] = NULL; clear_bit(idx, hw_events->used_mask); @@ -233,10 +217,6 @@ armpmu_add(struct perf_event *event, int flags) int idx; int err = 0; - /* An event following a process won't be stopped earlier */ - if (!cpumask_test_cpu(smp_processor_id(), &armpmu->valid_cpus)) - return 0; - perf_pmu_disable(event->pmu); /* If we don't have a space for the counter then finish early. */ @@ -273,9 +253,6 @@ validate_event(struct pmu_hw_events *hw_events, struct arm_pmu *armpmu = to_arm_pmu(event->pmu); struct pmu *leader_pmu = event->group_leader->pmu; - if (is_software_event(event)) - return 1; - if (event->pmu != leader_pmu || event->state < PERF_EVENT_STATE_OFF) return 1; @@ -318,18 +295,11 @@ static irqreturn_t armpmu_dispatch_irq(int irq, void *dev) struct arm_pmu *armpmu = (struct arm_pmu *) dev; struct platform_device *plat_device = armpmu->plat_device; struct arm_pmu_platdata *plat = dev_get_platdata(&plat_device->dev); - int ret; - u64 start_clock, finish_clock; - start_clock = sched_clock(); if (plat && plat->handle_irq) - ret = plat->handle_irq(irq, dev, armpmu->handle_irq); + return plat->handle_irq(irq, dev, armpmu->handle_irq); else - ret = armpmu->handle_irq(irq, dev); - finish_clock = sched_clock(); - - perf_sample_event_took(finish_clock - start_clock); - return ret; + return armpmu->handle_irq(irq, dev); } static void @@ -446,10 +416,6 @@ static int armpmu_event_init(struct perf_event *event) int err = 0; atomic_t *active_events = &armpmu->active_events; - if (event->cpu != -1 && - !cpumask_test_cpu(event->cpu, &armpmu->valid_cpus)) - return -ENOENT; - /* does not support taken branch sampling */ if (has_branch_stack(event)) return -EOPNOTSUPP; @@ -603,7 +569,6 @@ perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs) return; } - perf_callchain_store(entry, regs->ARM_pc); tail = (struct frame_tail __user *)regs->ARM_fp - 1; while ((entry->nr < PERF_MAX_STACK_DEPTH) && diff --git a/arch/arm/kernel/perf_event_cpu.c b/arch/arm/kernel/perf_event_cpu.c index e0665b871f5b..1f2740e3dbc0 100644 --- a/arch/arm/kernel/perf_event_cpu.c +++ b/arch/arm/kernel/perf_event_cpu.c @@ -19,7 +19,6 @@ #define pr_fmt(fmt) "CPU PMU: " fmt #include -#include #include #include #include @@ -32,36 +31,33 @@ #include /* Set at runtime when we know what CPU type we are. */ -static DEFINE_PER_CPU(struct arm_pmu *, cpu_pmu); +static struct arm_pmu *cpu_pmu; static DEFINE_PER_CPU(struct perf_event * [ARMPMU_MAX_HWEVENTS], hw_events); static DEFINE_PER_CPU(unsigned long [BITS_TO_LONGS(ARMPMU_MAX_HWEVENTS)], used_mask); static DEFINE_PER_CPU(struct pmu_hw_events, cpu_hw_events); -static DEFINE_PER_CPU(struct cpupmu_regs, cpu_pmu_regs); - /* * Despite the names, these two functions are CPU-specific and are used * by the OProfile/perf code. */ const char *perf_pmu_name(void) { - struct arm_pmu *pmu = per_cpu(cpu_pmu, 0); - if (!pmu) + if (!cpu_pmu) return NULL; - return pmu->name; + return cpu_pmu->name; } EXPORT_SYMBOL_GPL(perf_pmu_name); int perf_num_counters(void) { - struct arm_pmu *pmu = per_cpu(cpu_pmu, 0); + int max_events = 0; - if (!pmu) - return 0; + if (cpu_pmu != NULL) + max_events = cpu_pmu->num_events; - return pmu->num_events; + return max_events; } EXPORT_SYMBOL_GPL(perf_num_counters); @@ -79,13 +75,11 @@ static void cpu_pmu_free_irq(struct arm_pmu *cpu_pmu) { int i, irq, irqs; struct platform_device *pmu_device = cpu_pmu->plat_device; - int cpu = -1; irqs = min(pmu_device->num_resources, num_possible_cpus()); for (i = 0; i < irqs; ++i) { - cpu = cpumask_next(cpu, &cpu_pmu->valid_cpus); - if (!cpumask_test_and_clear_cpu(cpu, &cpu_pmu->active_irqs)) + if (!cpumask_test_and_clear_cpu(i, &cpu_pmu->active_irqs)) continue; irq = platform_get_irq(pmu_device, i); if (irq >= 0) @@ -97,7 +91,6 @@ static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler) { int i, err, irq, irqs; struct platform_device *pmu_device = cpu_pmu->plat_device; - int cpu = -1; if (!pmu_device) return -ENODEV; @@ -110,7 +103,6 @@ static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler) for (i = 0; i < irqs; ++i) { err = 0; - cpu = cpumask_next(cpu, &cpu_pmu->valid_cpus); irq = platform_get_irq(pmu_device, i); if (irq < 0) continue; @@ -120,7 +112,7 @@ static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler) * assume that we're running on a uniprocessor machine and * continue. Otherwise, continue without this interrupt. */ - if (irq_set_affinity(irq, cpumask_of(cpu)) && irqs > 1) { + if (irq_set_affinity(irq, cpumask_of(i)) && irqs > 1) { pr_warning("unable to set irq affinity (irq=%d, cpu=%u)\n", irq, i); continue; @@ -134,7 +126,7 @@ static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler) return err; } - cpumask_set_cpu(cpu, &cpu_pmu->active_irqs); + cpumask_set_cpu(i, &cpu_pmu->active_irqs); } return 0; @@ -143,7 +135,7 @@ static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler) static void cpu_pmu_init(struct arm_pmu *cpu_pmu) { int cpu; - for_each_cpu_mask(cpu, cpu_pmu->valid_cpus) { + for_each_possible_cpu(cpu) { struct pmu_hw_events *events = &per_cpu(cpu_hw_events, cpu); events->events = per_cpu(hw_events, cpu); events->used_mask = per_cpu(used_mask, cpu); @@ -156,7 +148,7 @@ static void cpu_pmu_init(struct arm_pmu *cpu_pmu) /* Ensure the PMU has sane values out of reset. */ if (cpu_pmu->reset) - on_each_cpu_mask(&cpu_pmu->valid_cpus, cpu_pmu->reset, cpu_pmu, 1); + on_each_cpu(cpu_pmu->reset, cpu_pmu, 1); } /* @@ -168,46 +160,21 @@ static void cpu_pmu_init(struct arm_pmu *cpu_pmu) static int __cpuinit cpu_pmu_notify(struct notifier_block *b, unsigned long action, void *hcpu) { - struct arm_pmu *pmu = per_cpu(cpu_pmu, (long)hcpu); - if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING) return NOTIFY_DONE; - if (pmu && pmu->reset) - pmu->reset(pmu); + if (cpu_pmu && cpu_pmu->reset) + cpu_pmu->reset(cpu_pmu); else return NOTIFY_DONE; return NOTIFY_OK; } -static int cpu_pmu_pm_notify(struct notifier_block *b, - unsigned long action, void *hcpu) -{ - int cpu = smp_processor_id(); - struct arm_pmu *pmu = per_cpu(cpu_pmu, cpu); - struct cpupmu_regs *pmuregs = &per_cpu(cpu_pmu_regs, cpu); - - if (!pmu) - return NOTIFY_DONE; - - if (action == CPU_PM_ENTER && pmu->save_regs) { - pmu->save_regs(pmu, pmuregs); - } else if (action == CPU_PM_EXIT && pmu->restore_regs) { - pmu->restore_regs(pmu, pmuregs); - } - - return NOTIFY_OK; -} - static struct notifier_block __cpuinitdata cpu_pmu_hotplug_notifier = { .notifier_call = cpu_pmu_notify, }; -static struct notifier_block __cpuinitdata cpu_pmu_pm_notifier = { - .notifier_call = cpu_pmu_pm_notify, -}; - /* * PMU platform driver and devicetree bindings. */ @@ -234,44 +201,51 @@ static struct platform_device_id cpu_pmu_plat_device_ids[] = { static int probe_current_pmu(struct arm_pmu *pmu) { int cpu = get_cpu(); + unsigned long implementor = read_cpuid_implementor(); + unsigned long part_number = read_cpuid_part_number(); int ret = -ENODEV; pr_info("probing PMU on CPU %d\n", cpu); - switch (read_cpuid_part()) { /* ARM Ltd CPUs. */ - case ARM_CPU_PART_ARM1136: - case ARM_CPU_PART_ARM1156: - case ARM_CPU_PART_ARM1176: - ret = armv6pmu_init(pmu); - break; - case ARM_CPU_PART_ARM11MPCORE: - ret = armv6mpcore_pmu_init(pmu); - break; - case ARM_CPU_PART_CORTEX_A8: - ret = armv7_a8_pmu_init(pmu); - break; - case ARM_CPU_PART_CORTEX_A9: - ret = armv7_a9_pmu_init(pmu); - break; - - default: - if (read_cpuid_implementor() == ARM_CPU_IMP_INTEL) { - switch (xscale_cpu_arch_version()) { - case ARM_CPU_XSCALE_ARCH_V1: - ret = xscale1pmu_init(pmu); - break; - case ARM_CPU_XSCALE_ARCH_V2: - ret = xscale2pmu_init(pmu); - break; - } + if (implementor == ARM_CPU_IMP_ARM) { + switch (part_number) { + case ARM_CPU_PART_ARM1136: + case ARM_CPU_PART_ARM1156: + case ARM_CPU_PART_ARM1176: + ret = armv6pmu_init(pmu); + break; + case ARM_CPU_PART_ARM11MPCORE: + ret = armv6mpcore_pmu_init(pmu); + break; + case ARM_CPU_PART_CORTEX_A8: + ret = armv7_a8_pmu_init(pmu); + break; + case ARM_CPU_PART_CORTEX_A9: + ret = armv7_a9_pmu_init(pmu); + break; + case ARM_CPU_PART_CORTEX_A5: + ret = armv7_a5_pmu_init(pmu); + break; + case ARM_CPU_PART_CORTEX_A15: + ret = armv7_a15_pmu_init(pmu); + break; + case ARM_CPU_PART_CORTEX_A7: + ret = armv7_a7_pmu_init(pmu); + break; + } + /* Intel CPUs [xscale]. */ + } else if (implementor == ARM_CPU_IMP_INTEL) { + switch (xscale_cpu_arch_version()) { + case ARM_CPU_XSCALE_ARCH_V1: + ret = xscale1pmu_init(pmu); + break; + case ARM_CPU_XSCALE_ARCH_V2: + ret = xscale2pmu_init(pmu); + break; } - break; } - /* assume PMU support all the CPUs in this case */ - cpumask_setall(&pmu->valid_cpus); - put_cpu(); return ret; } @@ -279,10 +253,15 @@ static int probe_current_pmu(struct arm_pmu *pmu) static int cpu_pmu_device_probe(struct platform_device *pdev) { const struct of_device_id *of_id; + int (*init_fn)(struct arm_pmu *); struct device_node *node = pdev->dev.of_node; struct arm_pmu *pmu; - int ret = 0; - int cpu; + int ret = -ENODEV; + + if (cpu_pmu) { + pr_info("attempt to register multiple PMU devices!"); + return -ENOSPC; + } pmu = kzalloc(sizeof(struct arm_pmu), GFP_KERNEL); if (!pmu) { @@ -291,28 +270,8 @@ static int cpu_pmu_device_probe(struct platform_device *pdev) } if (node && (of_id = of_match_node(cpu_pmu_of_device_ids, pdev->dev.of_node))) { - smp_call_func_t init_fn = (smp_call_func_t)of_id->data; - struct device_node *ncluster; - int cluster = -1; - cpumask_t sibling_mask; - - ncluster = of_parse_phandle(node, "cluster", 0); - if (ncluster) { - int len; - const u32 *hwid; - hwid = of_get_property(ncluster, "reg", &len); - if (hwid && len == 4) - cluster = be32_to_cpup(hwid); - } - /* set sibling mask to all cpu mask if socket is not specified */ - if (cluster == -1 || - cluster_to_logical_mask(cluster, &sibling_mask)) - cpumask_setall(&sibling_mask); - - smp_call_function_any(&sibling_mask, init_fn, pmu, 1); - - /* now set the valid_cpus after init */ - cpumask_copy(&pmu->valid_cpus, &sibling_mask); + init_fn = of_id->data; + ret = init_fn(pmu); } else { ret = probe_current_pmu(pmu); } @@ -322,12 +281,10 @@ static int cpu_pmu_device_probe(struct platform_device *pdev) goto out_free; } - for_each_cpu_mask(cpu, pmu->valid_cpus) - per_cpu(cpu_pmu, cpu) = pmu; - - pmu->plat_device = pdev; - cpu_pmu_init(pmu); - ret = armpmu_register(pmu, -1); + cpu_pmu = pmu; + cpu_pmu->plat_device = pdev; + cpu_pmu_init(cpu_pmu); + ret = armpmu_register(cpu_pmu, PERF_TYPE_RAW); if (!ret) return 0; @@ -356,17 +313,9 @@ static int __init register_pmu_driver(void) if (err) return err; - err = cpu_pm_register_notifier(&cpu_pmu_pm_notifier); - if (err) { - unregister_cpu_notifier(&cpu_pmu_hotplug_notifier); - return err; - } - err = platform_driver_register(&cpu_pmu_driver); - if (err) { - cpu_pm_unregister_notifier(&cpu_pmu_pm_notifier); + if (err) unregister_cpu_notifier(&cpu_pmu_hotplug_notifier); - } return err; } diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c index 654db5030c31..039cffb053a7 100644 --- a/arch/arm/kernel/perf_event_v7.c +++ b/arch/arm/kernel/perf_event_v7.c @@ -950,51 +950,6 @@ static void armv7_pmnc_dump_regs(struct arm_pmu *cpu_pmu) } #endif -static void armv7pmu_save_regs(struct arm_pmu *cpu_pmu, - struct cpupmu_regs *regs) -{ - unsigned int cnt; - asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r" (regs->pmc)); - if (!(regs->pmc & ARMV7_PMNC_E)) - return; - - asm volatile("mrc p15, 0, %0, c9, c12, 1" : "=r" (regs->pmcntenset)); - asm volatile("mrc p15, 0, %0, c9, c14, 0" : "=r" (regs->pmuseren)); - asm volatile("mrc p15, 0, %0, c9, c14, 1" : "=r" (regs->pmintenset)); - asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r" (regs->pmxevtcnt[0])); - for (cnt = ARMV7_IDX_COUNTER0; - cnt <= ARMV7_IDX_COUNTER_LAST(cpu_pmu); cnt++) { - armv7_pmnc_select_counter(cnt); - asm volatile("mrc p15, 0, %0, c9, c13, 1" - : "=r"(regs->pmxevttype[cnt])); - asm volatile("mrc p15, 0, %0, c9, c13, 2" - : "=r"(regs->pmxevtcnt[cnt])); - } - return; -} - -static void armv7pmu_restore_regs(struct arm_pmu *cpu_pmu, - struct cpupmu_regs *regs) -{ - unsigned int cnt; - if (!(regs->pmc & ARMV7_PMNC_E)) - return; - - asm volatile("mcr p15, 0, %0, c9, c12, 1" : : "r" (regs->pmcntenset)); - asm volatile("mcr p15, 0, %0, c9, c14, 0" : : "r" (regs->pmuseren)); - asm volatile("mcr p15, 0, %0, c9, c14, 1" : : "r" (regs->pmintenset)); - asm volatile("mcr p15, 0, %0, c9, c13, 0" : : "r" (regs->pmxevtcnt[0])); - for (cnt = ARMV7_IDX_COUNTER0; - cnt <= ARMV7_IDX_COUNTER_LAST(cpu_pmu); cnt++) { - armv7_pmnc_select_counter(cnt); - asm volatile("mcr p15, 0, %0, c9, c13, 1" - : : "r"(regs->pmxevttype[cnt])); - asm volatile("mcr p15, 0, %0, c9, c13, 2" - : : "r"(regs->pmxevtcnt[cnt])); - } - asm volatile("mcr p15, 0, %0, c9, c12, 0" : : "r" (regs->pmc)); -} - static void armv7pmu_enable_event(struct perf_event *event) { unsigned long flags; @@ -1268,8 +1223,6 @@ static void armv7pmu_init(struct arm_pmu *cpu_pmu) cpu_pmu->start = armv7pmu_start; cpu_pmu->stop = armv7pmu_stop; cpu_pmu->reset = armv7pmu_reset; - cpu_pmu->save_regs = armv7pmu_save_regs; - cpu_pmu->restore_regs = armv7pmu_restore_regs; cpu_pmu->max_period = (1LLU << 32) - 1; }; @@ -1287,7 +1240,7 @@ static u32 armv7_read_num_pmnc_events(void) static int armv7_a8_pmu_init(struct arm_pmu *cpu_pmu) { armv7pmu_init(cpu_pmu); - cpu_pmu->name = "ARMv7_Cortex_A8"; + cpu_pmu->name = "ARMv7 Cortex-A8"; cpu_pmu->map_event = armv7_a8_map_event; cpu_pmu->num_events = armv7_read_num_pmnc_events(); return 0; @@ -1296,7 +1249,7 @@ static int armv7_a8_pmu_init(struct arm_pmu *cpu_pmu) static int armv7_a9_pmu_init(struct arm_pmu *cpu_pmu) { armv7pmu_init(cpu_pmu); - cpu_pmu->name = "ARMv7_Cortex_A9"; + cpu_pmu->name = "ARMv7 Cortex-A9"; cpu_pmu->map_event = armv7_a9_map_event; cpu_pmu->num_events = armv7_read_num_pmnc_events(); return 0; @@ -1305,7 +1258,7 @@ static int armv7_a9_pmu_init(struct arm_pmu *cpu_pmu) static int armv7_a5_pmu_init(struct arm_pmu *cpu_pmu) { armv7pmu_init(cpu_pmu); - cpu_pmu->name = "ARMv7_Cortex_A5"; + cpu_pmu->name = "ARMv7 Cortex-A5"; cpu_pmu->map_event = armv7_a5_map_event; cpu_pmu->num_events = armv7_read_num_pmnc_events(); return 0; @@ -1314,7 +1267,7 @@ static int armv7_a5_pmu_init(struct arm_pmu *cpu_pmu) static int armv7_a15_pmu_init(struct arm_pmu *cpu_pmu) { armv7pmu_init(cpu_pmu); - cpu_pmu->name = "ARMv7_Cortex_A15"; + cpu_pmu->name = "ARMv7 Cortex-A15"; cpu_pmu->map_event = armv7_a15_map_event; cpu_pmu->num_events = armv7_read_num_pmnc_events(); cpu_pmu->set_event_filter = armv7pmu_set_event_filter; @@ -1324,7 +1277,7 @@ static int armv7_a15_pmu_init(struct arm_pmu *cpu_pmu) static int armv7_a7_pmu_init(struct arm_pmu *cpu_pmu) { armv7pmu_init(cpu_pmu); - cpu_pmu->name = "ARMv7_Cortex_A7"; + cpu_pmu->name = "ARMv7 Cortex-A7"; cpu_pmu->map_event = armv7_a7_map_event; cpu_pmu->num_events = armv7_read_num_pmnc_events(); cpu_pmu->set_event_filter = armv7pmu_set_event_filter; diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c index 978002e5b406..6e8931ccf13e 100644 --- a/arch/arm/kernel/process.c +++ b/arch/arm/kernel/process.c @@ -32,7 +32,6 @@ #include #include #include -#include #include #include @@ -58,46 +57,9 @@ static const char *isa_modes[] = { "ARM" , "Thumb" , "Jazelle", "ThumbEE" }; -#ifdef CONFIG_SMP -void arch_trigger_all_cpu_backtrace(void) -{ - smp_send_all_cpu_backtrace(); -} -#else -void arch_trigger_all_cpu_backtrace(void) -{ - dump_stack(); -} -#endif - extern void call_with_stack(void (*fn)(void *), void *arg, void *sp); typedef void (*phys_reset_t)(unsigned long); -#ifdef CONFIG_ARM_FLUSH_CONSOLE_ON_RESTART -void arm_machine_flush_console(void) -{ - printk("\n"); - pr_emerg("Restarting %s\n", linux_banner); - if (console_trylock()) { - console_unlock(); - return; - } - - mdelay(50); - - local_irq_disable(); - if (!console_trylock()) - pr_emerg("arm_restart: Console was locked! Busting\n"); - else - pr_emerg("arm_restart: Console was locked!\n"); - console_unlock(); -} -#else -void arm_machine_flush_console(void) -{ -} -#endif - /* * A temporary stack to use for CPU reset. This is static so that we * don't clobber it with the identity mapping. When running with this @@ -185,7 +147,6 @@ void arch_cpu_idle_prepare(void) void arch_cpu_idle_enter(void) { - idle_notifier_call_chain(IDLE_START); ledtrig_cpu(CPU_LED_IDLE_START); #ifdef CONFIG_PL310_ERRATA_769419 wmb(); @@ -195,7 +156,6 @@ void arch_cpu_idle_enter(void) void arch_cpu_idle_exit(void) { ledtrig_cpu(CPU_LED_IDLE_END); - idle_notifier_call_chain(IDLE_END); } #ifdef CONFIG_HOTPLUG_CPU @@ -235,16 +195,6 @@ __setup("reboot=", reboot_setup); */ void machine_shutdown(void) { -#ifdef CONFIG_SMP - /* - * Disable preemption so we're guaranteed to - * run to power off or reboot and prevent - * the possibility of switching to another - * thread that might wind up blocking on - * one of the stopped CPUs. - */ - preempt_disable(); -#endif disable_nonboot_cpus(); } @@ -290,10 +240,6 @@ void machine_restart(char *cmd) { smp_send_stop(); - /* Flush the console to make sure all the relevant messages make it - * out to the console drivers */ - arm_machine_flush_console(); - arm_pm_restart(reboot_mode, cmd); /* Give a grace period for failure to restart of 1s */ @@ -305,77 +251,6 @@ void machine_restart(char *cmd) while (1); } -/* - * dump a block of kernel memory from around the given address - */ -static void show_data(unsigned long addr, int nbytes, const char *name) -{ - int i, j; - int nlines; - u32 *p; - - /* - * don't attempt to dump non-kernel addresses or - * values that are probably just small negative numbers - */ - if (addr < PAGE_OFFSET || addr > -256UL) - return; - - printk("\n%s: %#lx:\n", name, addr); - - /* - * round address down to a 32 bit boundary - * and always dump a multiple of 32 bytes - */ - p = (u32 *)(addr & ~(sizeof(u32) - 1)); - nbytes += (addr & (sizeof(u32) - 1)); - nlines = (nbytes + 31) / 32; - - - for (i = 0; i < nlines; i++) { - /* - * just display low 16 bits of address to keep - * each line of the dump < 80 characters - */ - printk("%04lx ", (unsigned long)p & 0xffff); - for (j = 0; j < 8; j++) { - u32 data; - if (probe_kernel_address(p, data)) { - printk(" ********"); - } else { - printk(" %08x", data); - } - ++p; - } - printk("\n"); - } -} - -static void show_extra_register_data(struct pt_regs *regs, int nbytes) -{ - mm_segment_t fs; - - fs = get_fs(); - set_fs(KERNEL_DS); - show_data(regs->ARM_pc - nbytes, nbytes * 2, "PC"); - show_data(regs->ARM_lr - nbytes, nbytes * 2, "LR"); - show_data(regs->ARM_sp - nbytes, nbytes * 2, "SP"); - show_data(regs->ARM_ip - nbytes, nbytes * 2, "IP"); - show_data(regs->ARM_fp - nbytes, nbytes * 2, "FP"); - show_data(regs->ARM_r0 - nbytes, nbytes * 2, "R0"); - show_data(regs->ARM_r1 - nbytes, nbytes * 2, "R1"); - show_data(regs->ARM_r2 - nbytes, nbytes * 2, "R2"); - show_data(regs->ARM_r3 - nbytes, nbytes * 2, "R3"); - show_data(regs->ARM_r4 - nbytes, nbytes * 2, "R4"); - show_data(regs->ARM_r5 - nbytes, nbytes * 2, "R5"); - show_data(regs->ARM_r6 - nbytes, nbytes * 2, "R6"); - show_data(regs->ARM_r7 - nbytes, nbytes * 2, "R7"); - show_data(regs->ARM_r8 - nbytes, nbytes * 2, "R8"); - show_data(regs->ARM_r9 - nbytes, nbytes * 2, "R9"); - show_data(regs->ARM_r10 - nbytes, nbytes * 2, "R10"); - set_fs(fs); -} - void __show_regs(struct pt_regs *regs) { unsigned long flags; @@ -432,8 +307,6 @@ void __show_regs(struct pt_regs *regs) printk("Control: %08x%s\n", ctrl, buf); } #endif - - show_extra_register_data(regs, 128); } void show_regs(struct pt_regs * regs) @@ -535,7 +408,6 @@ EXPORT_SYMBOL(dump_fpu); unsigned long get_wchan(struct task_struct *p) { struct stackframe frame; - unsigned long stack_page; int count = 0; if (!p || p == current || p->state == TASK_RUNNING) return 0; @@ -544,11 +416,9 @@ unsigned long get_wchan(struct task_struct *p) frame.sp = thread_saved_sp(p); frame.lr = 0; /* recovered from the stack */ frame.pc = thread_saved_pc(p); - stack_page = (unsigned long)task_stack_page(p); do { - if (frame.sp < stack_page || - frame.sp >= stack_page + THREAD_SIZE || - unwind_frame(&frame) < 0) + int ret = unwind_frame(&frame); + if (ret < 0) return 0; if (!in_sched_functions(frame.pc)) return frame.pc; @@ -563,11 +433,10 @@ unsigned long arch_randomize_brk(struct mm_struct *mm) } #ifdef CONFIG_MMU -#ifdef CONFIG_KUSER_HELPERS /* * The vectors page is always readable from user space for the - * atomic helpers. Insert it into the gate_vma so that it is visible - * through ptrace and /proc//mem. + * atomic helpers and the signal restart code. Insert it into the + * gate_vma so that it is visible through ptrace and /proc//mem. */ static struct vm_area_struct gate_vma = { .vm_start = 0xffff0000, @@ -596,48 +465,9 @@ int in_gate_area_no_mm(unsigned long addr) { return in_gate_area(NULL, addr); } -#define is_gate_vma(vma) ((vma) == &gate_vma) -#else -#define is_gate_vma(vma) 0 -#endif const char *arch_vma_name(struct vm_area_struct *vma) { - return is_gate_vma(vma) ? "[vectors]" : - (vma->vm_mm && vma->vm_start == vma->vm_mm->context.sigpage) ? - "[sigpage]" : NULL; -} - -static struct page *signal_page; -extern struct page *get_signal_page(void); - -int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp) -{ - struct mm_struct *mm = current->mm; - unsigned long addr; - int ret; - - if (!signal_page) - signal_page = get_signal_page(); - if (!signal_page) - return -ENOMEM; - - down_write(&mm->mmap_sem); - addr = get_unmapped_area(NULL, 0, PAGE_SIZE, 0, 0); - if (IS_ERR_VALUE(addr)) { - ret = addr; - goto up_fail; - } - - ret = install_special_mapping(mm, addr, PAGE_SIZE, - VM_READ | VM_EXEC | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC, - &signal_page); - - if (ret == 0) - mm->context.sigpage = addr; - - up_fail: - up_write(&mm->mmap_sem); - return ret; + return (vma == &gate_vma) ? "[vectors]" : NULL; } #endif diff --git a/arch/arm/kernel/psci.c b/arch/arm/kernel/psci.c index 0daf4f252284..36531643cc2c 100644 --- a/arch/arm/kernel/psci.c +++ b/arch/arm/kernel/psci.c @@ -17,7 +17,6 @@ #include #include -#include #include #include @@ -27,11 +26,6 @@ struct psci_operations psci_ops; -/* Type of psci support. Currently can only be enabled or disabled */ -#define PSCI_SUP_DISABLED 0 -#define PSCI_SUP_ENABLED 1 - -static unsigned int psci; static int (*invoke_psci_fn)(u32, u32, u32, u32); enum psci_function { @@ -48,7 +42,6 @@ static u32 psci_function_id[PSCI_FN_MAX]; #define PSCI_RET_EOPNOTSUPP -1 #define PSCI_RET_EINVAL -2 #define PSCI_RET_EPERM -3 -#define PSCI_RET_EALREADYON -4 static int psci_to_linux_errno(int errno) { @@ -61,8 +54,6 @@ static int psci_to_linux_errno(int errno) return -EINVAL; case PSCI_RET_EPERM: return -EPERM; - case PSCI_RET_EALREADYON: - return -EAGAIN; }; return -EINVAL; @@ -167,18 +158,15 @@ static const struct of_device_id psci_of_match[] __initconst = { {}, }; -void __init psci_init(void) +static int __init psci_init(void) { struct device_node *np; const char *method; u32 id; - if (psci == PSCI_SUP_DISABLED) - return; - np = of_find_matching_node(NULL, psci_of_match); if (!np) - return; + return 0; pr_info("probing function IDs from device-tree\n"); @@ -218,35 +206,6 @@ void __init psci_init(void) out_put_node: of_node_put(np); - return; -} - -int __init psci_probe(void) -{ - struct device_node *np; - int ret = -ENODEV; - - if (psci == PSCI_SUP_ENABLED) { - np = of_find_matching_node(NULL, psci_of_match); - if (np) - ret = 0; - } - - of_node_put(np); - return ret; -} - -static int __init early_psci(char *val) -{ - int ret = 0; - - if (strcmp(val, "enable") == 0) - psci = PSCI_SUP_ENABLED; - else if (strcmp(val, "disable") == 0) - psci = PSCI_SUP_DISABLED; - else - ret = -EINVAL; - - return ret; + return 0; } -early_param("psci", early_psci); +early_initcall(psci_init); diff --git a/arch/arm/kernel/psci_smp.c b/arch/arm/kernel/psci_smp.c deleted file mode 100644 index 23a11424c568..000000000000 --- a/arch/arm/kernel/psci_smp.c +++ /dev/null @@ -1,84 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Copyright (C) 2012 ARM Limited - * - * Author: Will Deacon - */ - -#include -#include -#include -#include - -#include -#include - -/* - * psci_smp assumes that the following is true about PSCI: - * - * cpu_suspend Suspend the execution on a CPU - * @state we don't currently describe affinity levels, so just pass 0. - * @entry_point the first instruction to be executed on return - * returns 0 success, < 0 on failure - * - * cpu_off Power down a CPU - * @state we don't currently describe affinity levels, so just pass 0. - * no return on successful call - * - * cpu_on Power up a CPU - * @cpuid cpuid of target CPU, as from MPIDR - * @entry_point the first instruction to be executed on return - * returns 0 success, < 0 on failure - * - * migrate Migrate the context to a different CPU - * @cpuid cpuid of target CPU, as from MPIDR - * returns 0 success, < 0 on failure - * - */ - -extern void secondary_startup(void); - -static int __cpuinit psci_boot_secondary(unsigned int cpu, - struct task_struct *idle) -{ - if (psci_ops.cpu_on) - return psci_ops.cpu_on(cpu_logical_map(cpu), - __pa(secondary_startup)); - return -ENODEV; -} - -#ifdef CONFIG_HOTPLUG_CPU -void __ref psci_cpu_die(unsigned int cpu) -{ - const struct psci_power_state ps = { - .type = PSCI_POWER_STATE_TYPE_POWER_DOWN, - }; - - if (psci_ops.cpu_off) - psci_ops.cpu_off(ps); - - /* We should never return */ - panic("psci: cpu %d failed to shutdown\n", cpu); -} -#else -#define psci_cpu_die NULL -#endif - -bool __init psci_smp_available(void) -{ - /* is cpu_on available at least? */ - return (psci_ops.cpu_on != NULL); -} - -struct smp_operations __initdata psci_smp_ops = { - .smp_boot_secondary = psci_boot_secondary, - .cpu_die = psci_cpu_die, -}; diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c index 394424b25254..03deeffd9f6d 100644 --- a/arch/arm/kernel/ptrace.c +++ b/arch/arm/kernel/ptrace.c @@ -916,7 +916,7 @@ enum ptrace_syscall_dir { PTRACE_SYSCALL_EXIT, }; -static void tracehook_report_syscall(struct pt_regs *regs, +static int tracehook_report_syscall(struct pt_regs *regs, enum ptrace_syscall_dir dir) { unsigned long ip; @@ -934,6 +934,7 @@ static void tracehook_report_syscall(struct pt_regs *regs, current_thread_info()->syscall = -1; regs->ARM_ip = ip; + return current_thread_info()->syscall; } asmlinkage int syscall_trace_enter(struct pt_regs *regs, int scno) @@ -945,9 +946,7 @@ asmlinkage int syscall_trace_enter(struct pt_regs *regs, int scno) return -1; if (test_thread_flag(TIF_SYSCALL_TRACE)) - tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER); - - scno = current_thread_info()->syscall; + scno = tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER); if (test_thread_flag(TIF_SYSCALL_TRACEPOINT)) trace_sys_enter(regs, scno); diff --git a/arch/arm/kernel/relocate_kernel.S b/arch/arm/kernel/relocate_kernel.S index 95858966d84e..d0cdedf4864d 100644 --- a/arch/arm/kernel/relocate_kernel.S +++ b/arch/arm/kernel/relocate_kernel.S @@ -2,12 +2,10 @@ * relocate_kernel.S - put the kernel image in place to boot */ -#include #include - .align 3 /* not needed for this code, but keeps fncpy() happy */ - -ENTRY(relocate_new_kernel) + .globl relocate_new_kernel +relocate_new_kernel: ldr r0,kexec_indirection_page ldr r1,kexec_start_address @@ -81,8 +79,6 @@ kexec_mach_type: kexec_boot_atags: .long 0x0 -ENDPROC(relocate_new_kernel) - relocate_new_kernel_end: .globl relocate_new_kernel_size diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c index a57cc5d33540..e8edcaa0e432 100644 --- a/arch/arm/kernel/sched_clock.c +++ b/arch/arm/kernel/sched_clock.c @@ -51,11 +51,10 @@ static inline u64 notrace cyc_to_ns(u64 cyc, u32 mult, u32 shift) return (cyc * mult) >> shift; } -static unsigned long long notrace sched_clock_32(void) +static unsigned long long notrace cyc_to_sched_clock(u32 cyc, u32 mask) { u64 epoch_ns; u32 epoch_cyc; - u32 cyc; if (cd.suspended) return cd.epoch_ns; @@ -74,9 +73,7 @@ static unsigned long long notrace sched_clock_32(void) smp_rmb(); } while (epoch_cyc != cd.epoch_cyc_copy); - cyc = read_sched_clock(); - cyc = (cyc - epoch_cyc) & sched_clock_mask; - return epoch_ns + cyc_to_ns(cyc, cd.mult, cd.shift); + return epoch_ns + cyc_to_ns((cyc - epoch_cyc) & mask, cd.mult, cd.shift); } /* @@ -168,6 +165,12 @@ void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate) pr_debug("Registered %pF as sched_clock source\n", read); } +static unsigned long long notrace sched_clock_32(void) +{ + u32 cyc = read_sched_clock(); + return cyc_to_sched_clock(cyc, sched_clock_mask); +} + unsigned long long __read_mostly (*sched_clock_func)(void) = sched_clock_32; unsigned long long notrace sched_clock(void) diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 29beb8c76560..b4b1d397592b 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -37,7 +37,6 @@ #include #include #include -#include #include #include #include @@ -262,19 +261,6 @@ static int cpu_has_aliasing_icache(unsigned int arch) int aliasing_icache; unsigned int id_reg, num_sets, line_size; -#ifdef CONFIG_BIG_LITTLE - /* - * We expect a combination of Cortex-A15 and Cortex-A7 cores. - * A7 = VIPT aliasing I-cache - * A15 = PIPT (non-aliasing) I-cache - * To cater for this discrepancy, let's assume aliasing I-cache - * all the time. This means unneeded extra work on the A15 but - * only ptrace is affected which is not performance critical. - */ - if ((read_cpuid_id() & 0xff0ffff0) == 0x410fc0f0) - return 1; -#endif - /* PIPT caches never alias. */ if (icache_is_pipt()) return 0; @@ -544,7 +530,6 @@ void __init dump_machine_table(void) int __init arm_add_memory(phys_addr_t start, phys_addr_t size) { struct membank *bank = &meminfo.bank[meminfo.nr_banks]; - u64 aligned_start; if (meminfo.nr_banks >= NR_BANKS) { printk(KERN_CRIT "NR_BANKS too low, " @@ -557,16 +542,10 @@ int __init arm_add_memory(phys_addr_t start, phys_addr_t size) * Size is appropriately rounded down, start is rounded up. */ size -= start & ~PAGE_MASK; - aligned_start = PAGE_ALIGN(start); - -#ifndef CONFIG_ARCH_PHYS_ADDR_T_64BIT - if (aligned_start > ULONG_MAX) { - printk(KERN_CRIT "Ignoring memory at 0x%08llx outside " - "32-bit physical address space\n", (long long)start); - return -EINVAL; - } + bank->start = PAGE_ALIGN(start); - if (aligned_start + size > ULONG_MAX) { +#ifndef CONFIG_ARM_LPAE + if (bank->start + size < bank->start) { printk(KERN_CRIT "Truncating memory at 0x%08llx to fit in " "32-bit physical address space\n", (long long)start); /* @@ -574,25 +553,10 @@ int __init arm_add_memory(phys_addr_t start, phys_addr_t size) * 32 bits, we use ULONG_MAX as the upper limit rather than 4GB. * This means we lose a page after masking. */ - size = ULONG_MAX - aligned_start; + size = ULONG_MAX - bank->start; } #endif - if (aligned_start < PHYS_OFFSET) { - if (aligned_start + size <= PHYS_OFFSET) { - pr_info("Ignoring memory below PHYS_OFFSET: 0x%08llx-0x%08llx\n", - aligned_start, aligned_start + size); - return -EINVAL; - } - - pr_info("Ignoring memory below PHYS_OFFSET: 0x%08llx-0x%08llx\n", - aligned_start, (u64)PHYS_OFFSET); - - size -= PHYS_OFFSET - aligned_start; - aligned_start = PHYS_OFFSET; - } - - bank->start = aligned_start; bank->size = size & ~(phys_addr_t)(PAGE_SIZE - 1); /* @@ -832,15 +796,9 @@ void __init setup_arch(char **cmdline_p) unflatten_device_tree(); arm_dt_init_cpu_maps(); - psci_init(); #ifdef CONFIG_SMP if (is_smp()) { - if (!mdesc->smp_init || !mdesc->smp_init()) { - if (psci_smp_available()) - smp_set_ops(&psci_smp_ops); - else if (mdesc->smp) - smp_set_ops(mdesc->smp); - } + smp_set_ops(mdesc->smp); smp_init_cpus(); } #endif @@ -914,9 +872,6 @@ static const char *hwcap_str[] = { "vfpv4", "idiva", "idivt", - "vfpd32", - "lpae", - "evtstrm", NULL }; diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c index 3c23086dc8e2..296786bdbb73 100644 --- a/arch/arm/kernel/signal.c +++ b/arch/arm/kernel/signal.c @@ -8,7 +8,6 @@ * published by the Free Software Foundation. */ #include -#include #include #include #include @@ -16,14 +15,35 @@ #include #include -#include #include #include #include -extern const unsigned long sigreturn_codes[7]; +#include "signal.h" -static unsigned long signal_return_offset; +/* + * For ARM syscalls, we encode the syscall number into the instruction. + */ +#define SWI_SYS_SIGRETURN (0xef000000|(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE)) +#define SWI_SYS_RT_SIGRETURN (0xef000000|(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE)) + +/* + * With EABI, the syscall number has to be loaded into r7. + */ +#define MOV_R7_NR_SIGRETURN (0xe3a07000 | (__NR_sigreturn - __NR_SYSCALL_BASE)) +#define MOV_R7_NR_RT_SIGRETURN (0xe3a07000 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE)) + +/* + * For Thumb syscalls, we pass the syscall number via r7. We therefore + * need two 16-bit instructions. + */ +#define SWI_THUMB_SIGRETURN (0xdf00 << 16 | 0x2700 | (__NR_sigreturn - __NR_SYSCALL_BASE)) +#define SWI_THUMB_RT_SIGRETURN (0xdf00 << 16 | 0x2700 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE)) + +const unsigned long sigreturn_codes[7] = { + MOV_R7_NR_SIGRETURN, SWI_SYS_SIGRETURN, SWI_THUMB_SIGRETURN, + MOV_R7_NR_RT_SIGRETURN, SWI_SYS_RT_SIGRETURN, SWI_THUMB_RT_SIGRETURN, +}; #ifdef CONFIG_CRUNCH static int preserve_crunch_context(struct crunch_sigframe __user *frame) @@ -376,19 +396,13 @@ setup_return(struct pt_regs *regs, struct ksignal *ksig, __put_user(sigreturn_codes[idx+1], rc+1)) return 1; -#ifdef CONFIG_MMU if (cpsr & MODE32_BIT) { - struct mm_struct *mm = current->mm; /* - * 32-bit code can use the signal return page - * except when the MPU has protected the vectors - * page from PL0 + * 32-bit code can use the new high-page + * signal return code support. */ - retcode = mm->context.sigpage + signal_return_offset + - (idx << 2) + thumb; - } else -#endif - { + retcode = KERN_SIGRETURN_CODE + (idx << 2) + thumb; + } else { /* * Ensure that the instruction cache sees * the return code written onto the stack. @@ -589,33 +603,3 @@ do_work_pending(struct pt_regs *regs, unsigned int thread_flags, int syscall) } while (thread_flags & _TIF_WORK_MASK); return 0; } - -struct page *get_signal_page(void) -{ - unsigned long ptr; - unsigned offset; - struct page *page; - void *addr; - - page = alloc_pages(GFP_KERNEL, 0); - - if (!page) - return NULL; - - addr = page_address(page); - - /* Give the signal return code some randomness */ - offset = 0x200 + (get_random_int() & 0x7fc); - signal_return_offset = offset; - - /* - * Copy signal return handlers into the vector page, and - * set sigreturn to be a pointer to these. - */ - memcpy(addr + offset, sigreturn_codes, sizeof(sigreturn_codes)); - - ptr = (unsigned long)addr + offset; - flush_icache_range(ptr, ptr + sizeof(sigreturn_codes)); - - return page; -} diff --git a/arch/arm/kernel/sigreturn_codes.S b/arch/arm/kernel/sigreturn_codes.S deleted file mode 100644 index 3c5d0f2170fd..000000000000 --- a/arch/arm/kernel/sigreturn_codes.S +++ /dev/null @@ -1,80 +0,0 @@ -/* - * sigreturn_codes.S - code sinpets for sigreturn syscalls - * - * Created by: Victor Kamensky, 2013-08-13 - * Copyright: (C) 2013 Linaro Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include - -/* - * For ARM syscalls, we encode the syscall number into the instruction. - * With EABI, the syscall number has to be loaded into r7. As result - * ARM syscall sequence snippet will have move and svc in .arm encoding - * - * For Thumb syscalls, we pass the syscall number via r7. We therefore - * need two 16-bit instructions in .thumb encoding - * - * Please note sigreturn_codes code are not executed in place. Instead - * they just copied by kernel into appropriate places. Code inside of - * arch/arm/kernel/signal.c is very sensitive to layout of these code - * snippets. - */ - -#if __LINUX_ARM_ARCH__ <= 4 - /* - * Note we manually set minimally required arch that supports - * required thumb opcodes for early arch versions. It is OK - * for this file to be used in combination with other - * lower arch variants, since these code snippets are only - * used as input data. - */ - .arch armv4t -#endif - - .section .rodata - .global sigreturn_codes - .type sigreturn_codes, #object - - .arm - -sigreturn_codes: - - /* ARM sigreturn syscall code snippet */ - mov r7, #(__NR_sigreturn - __NR_SYSCALL_BASE) - swi #(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE) - - /* Thumb sigreturn syscall code snippet */ - .thumb - movs r7, #(__NR_sigreturn - __NR_SYSCALL_BASE) - swi #0 - - /* ARM sigreturn_rt syscall code snippet */ - .arm - mov r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE) - swi #(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE) - - /* Thumb sigreturn_rt syscall code snippet */ - .thumb - movs r7, #(__NR_rt_sigreturn - __NR_SYSCALL_BASE) - swi #0 - - /* - * Note on addtional space: setup_return in signal.c - * algorithm uses two words copy regardless whether - * it is thumb case or not, so we need additional - * word after real last entry. - */ - .arm - .space 4 - - .size sigreturn_codes, . - sigreturn_codes diff --git a/arch/arm/kernel/sleep.S b/arch/arm/kernel/sleep.S index baf4d28213a5..987dcf33415c 100644 --- a/arch/arm/kernel/sleep.S +++ b/arch/arm/kernel/sleep.S @@ -4,7 +4,6 @@ #include #include #include -#include "entry-header.S" .text /* @@ -31,8 +30,9 @@ ENTRY(__cpu_suspend) mov r2, r5 @ virtual SP ldr r3, =sleep_save_sp #ifdef CONFIG_SMP - get_thread_info r5 - ldr lr, [r5, #TI_CPU] @ cpu logical index + ALT_SMP(mrc p15, 0, lr, c0, c0, 5) + ALT_UP(mov lr, #0) + and lr, lr, #15 add r3, r3, lr, lsl #2 #endif bl __cpu_suspend_save @@ -81,15 +81,11 @@ ENDPROC(cpu_resume_after_mmu) .data .align ENTRY(cpu_resume) -ARM_BE8(setend be) @ ensure we are in BE mode #ifdef CONFIG_SMP - mov r1, #0 @ fall-back logical index for UP - ALT_SMP(mrc p15, 0, r0, c0, c0, 5) - ALT_UP_B(1f) - bic r0, #0xff000000 - bl cpu_logical_index @ return logical index in r1 -1: adr r0, sleep_save_sp + ALT_SMP(mrc p15, 0, r1, c0, c0, 5) + ALT_UP(mov r1, #0) + and r1, r1, #15 ldr r0, [r0, r1, lsl #2] @ stack phys addr #else ldr r0, sleep_save_sp @ stack phys addr @@ -106,20 +102,3 @@ sleep_save_sp: .rept CONFIG_NR_CPUS .long 0 @ preserve stack phys ptr here .endr - -#ifdef CONFIG_SMP -cpu_logical_index: - adr r3, cpu_map_ptr - ldr r2, [r3] - add r3, r3, r2 @ virt_to_phys(__cpu_logical_map) - mov r1, #0 -1: - ldr r2, [r3, r1, lsl #2] - cmp r2, r0 - moveq pc, lr - add r1, r1, #1 - b 1b - -cpu_map_ptr: - .long __cpu_logical_map - . -#endif diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index f2724e475b96..5919eb451bb9 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -46,9 +46,6 @@ #include #include -#define CREATE_TRACE_POINTS -#include - /* * as from 2.5, kernels no longer have an init_tasks structure * so we need some other way of telling a new secondary core @@ -60,7 +57,7 @@ struct secondary_data secondary_data; * control for which core is the next to come out of the secondary * boot "holding pen" */ -volatile int pen_release = -1; +volatile int __cpuinitdata pen_release = -1; enum ipi_msg_type { IPI_WAKEUP, @@ -69,8 +66,6 @@ enum ipi_msg_type { IPI_CALL_FUNC, IPI_CALL_FUNC_SINGLE, IPI_CPU_STOP, - IPI_COMPLETION, - IPI_CPU_BACKTRACE, }; static DECLARE_COMPLETION(cpu_running); @@ -92,8 +87,8 @@ int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle) * its stack and the page tables. */ secondary_data.stack = task_stack_page(idle) + THREAD_START_SP; - secondary_data.pgdir = virt_to_idmap(idmap_pgd); - secondary_data.swapper_pg_dir = virt_to_idmap(swapper_pg_dir); + secondary_data.pgdir = virt_to_phys(idmap_pgd); + secondary_data.swapper_pg_dir = virt_to_phys(swapper_pg_dir); __cpuc_flush_dcache_area(&secondary_data, sizeof(secondary_data)); outer_clean_range(__pa(&secondary_data), __pa(&secondary_data + 1)); @@ -468,8 +463,6 @@ static const char *ipi_types[NR_IPI] = { S(IPI_CALL_FUNC, "Function call interrupts"), S(IPI_CALL_FUNC_SINGLE, "Single function call interrupts"), S(IPI_CPU_STOP, "CPU stop interrupts"), - S(IPI_COMPLETION, "completion interrupts"), - S(IPI_CPU_BACKTRACE, "CPU backtrace"), }; void show_ipi_list(struct seq_file *p, int prec) @@ -595,71 +588,6 @@ static void ipi_cpu_stop(unsigned int cpu) cpu_relax(); } -static DEFINE_PER_CPU(struct completion *, cpu_completion); - -int register_ipi_completion(struct completion *completion, int cpu) -{ - per_cpu(cpu_completion, cpu) = completion; - return IPI_COMPLETION; -} - -static void ipi_complete(unsigned int cpu) -{ - complete(per_cpu(cpu_completion, cpu)); -} - -static cpumask_t backtrace_mask; -static DEFINE_RAW_SPINLOCK(backtrace_lock); - -/* "in progress" flag of arch_trigger_all_cpu_backtrace */ -static unsigned long backtrace_flag; - -void smp_send_all_cpu_backtrace(void) -{ - unsigned int this_cpu = smp_processor_id(); - int i; - - if (test_and_set_bit(0, &backtrace_flag)) - /* - * If there is already a trigger_all_cpu_backtrace() in progress - * (backtrace_flag == 1), don't output double cpu dump infos. - */ - return; - - cpumask_copy(&backtrace_mask, cpu_online_mask); - cpu_clear(this_cpu, backtrace_mask); - - pr_info("Backtrace for cpu %d (current):\n", this_cpu); - dump_stack(); - - pr_info("\nsending IPI to all other CPUs:\n"); - smp_cross_call(&backtrace_mask, IPI_CPU_BACKTRACE); - - /* Wait for up to 10 seconds for all other CPUs to do the backtrace */ - for (i = 0; i < 10 * 1000; i++) { - if (cpumask_empty(&backtrace_mask)) - break; - mdelay(1); - } - - clear_bit(0, &backtrace_flag); - smp_mb__after_clear_bit(); -} - -/* - * ipi_cpu_backtrace - handle IPI from smp_send_all_cpu_backtrace() - */ -static void ipi_cpu_backtrace(unsigned int cpu, struct pt_regs *regs) -{ - if (cpu_isset(cpu, backtrace_mask)) { - raw_spin_lock(&backtrace_lock); - pr_warning("IPI backtrace for cpu %d\n", cpu); - show_regs(regs); - raw_spin_unlock(&backtrace_lock); - cpu_clear(cpu, backtrace_mask); - } -} - /* * Main handler for inter-processor interrupts */ @@ -676,7 +604,6 @@ void handle_IPI(int ipinr, struct pt_regs *regs) if (ipinr < NR_IPI) __inc_irq_stat(cpu, ipi_irqs[ipinr]); - trace_arm_ipi_entry(ipinr); switch (ipinr) { case IPI_WAKEUP: break; @@ -711,22 +638,11 @@ void handle_IPI(int ipinr, struct pt_regs *regs) irq_exit(); break; - case IPI_COMPLETION: - irq_enter(); - ipi_complete(cpu); - irq_exit(); - break; - - case IPI_CPU_BACKTRACE: - ipi_cpu_backtrace(cpu, regs); - break; - default: printk(KERN_CRIT "CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr); break; } - trace_arm_ipi_exit(ipinr); set_irq_regs(old_regs); } diff --git a/arch/arm/kernel/smp_scu.c b/arch/arm/kernel/smp_scu.c index 1aafa0d785eb..5bc1a63284e3 100644 --- a/arch/arm/kernel/smp_scu.c +++ b/arch/arm/kernel/smp_scu.c @@ -28,7 +28,7 @@ */ unsigned int __init scu_get_core_count(void __iomem *scu_base) { - unsigned int ncores = readl_relaxed(scu_base + SCU_CONFIG); + unsigned int ncores = __raw_readl(scu_base + SCU_CONFIG); return (ncores & 0x03) + 1; } @@ -42,19 +42,19 @@ void scu_enable(void __iomem *scu_base) #ifdef CONFIG_ARM_ERRATA_764369 /* Cortex-A9 only */ if ((read_cpuid_id() & 0xff0ffff0) == 0x410fc090) { - scu_ctrl = readl_relaxed(scu_base + 0x30); + scu_ctrl = __raw_readl(scu_base + 0x30); if (!(scu_ctrl & 1)) - writel_relaxed(scu_ctrl | 0x1, scu_base + 0x30); + __raw_writel(scu_ctrl | 0x1, scu_base + 0x30); } #endif - scu_ctrl = readl_relaxed(scu_base + SCU_CTRL); + scu_ctrl = __raw_readl(scu_base + SCU_CTRL); /* already enabled? */ if (scu_ctrl & 1) return; scu_ctrl |= 1; - writel_relaxed(scu_ctrl, scu_base + SCU_CTRL); + __raw_writel(scu_ctrl, scu_base + SCU_CTRL); /* * Ensure that the data accessed by CPU0 before the SCU was @@ -80,9 +80,9 @@ int scu_power_mode(void __iomem *scu_base, unsigned int mode) if (mode > 3 || mode == 1 || cpu > 3) return -EINVAL; - val = readb_relaxed(scu_base + SCU_CPU_STATUS + cpu) & ~0x03; + val = __raw_readb(scu_base + SCU_CPU_STATUS + cpu) & ~0x03; val |= mode; - writeb_relaxed(val, scu_base + SCU_CPU_STATUS + cpu); + __raw_writeb(val, scu_base + SCU_CPU_STATUS + cpu); return 0; } diff --git a/arch/arm/kernel/smp_tlb.c b/arch/arm/kernel/smp_tlb.c index a98b62dca2fa..9a52a07aa40e 100644 --- a/arch/arm/kernel/smp_tlb.c +++ b/arch/arm/kernel/smp_tlb.c @@ -103,7 +103,7 @@ static void broadcast_tlb_a15_erratum(void) static void broadcast_tlb_mm_a15_erratum(struct mm_struct *mm) { - int this_cpu; + int cpu, this_cpu; cpumask_t mask = { CPU_BITS_NONE }; if (!erratum_a15_798181()) @@ -111,7 +111,21 @@ static void broadcast_tlb_mm_a15_erratum(struct mm_struct *mm) dummy_flush_tlb_a15_erratum(); this_cpu = get_cpu(); - a15_erratum_get_cpumask(this_cpu, mm, &mask); + for_each_online_cpu(cpu) { + if (cpu == this_cpu) + continue; + /* + * We only need to send an IPI if the other CPUs are running + * the same ASID as the one being invalidated. There is no + * need for locking around the active_asids check since the + * switch_mm() function has at least one dmb() (as required by + * this workaround) in case a context switch happens on + * another CPU after the condition below. + */ + if (atomic64_read(&mm->context.id) == + atomic64_read(&per_cpu(active_asids, cpu))) + cpumask_set_cpu(cpu, &mask); + } smp_call_function_many(&mask, ipi_flush_tlb_a15_erratum, NULL, 1); put_cpu(); } diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c index 4971ccf012ca..90525d9d290b 100644 --- a/arch/arm/kernel/smp_twd.c +++ b/arch/arm/kernel/smp_twd.c @@ -45,7 +45,7 @@ static void twd_set_mode(enum clock_event_mode mode, case CLOCK_EVT_MODE_PERIODIC: ctrl = TWD_TIMER_CONTROL_ENABLE | TWD_TIMER_CONTROL_IT_ENABLE | TWD_TIMER_CONTROL_PERIODIC; - writel_relaxed(DIV_ROUND_CLOSEST(twd_timer_rate, HZ), + __raw_writel(DIV_ROUND_CLOSEST(twd_timer_rate, HZ), twd_base + TWD_TIMER_LOAD); break; case CLOCK_EVT_MODE_ONESHOT: @@ -58,18 +58,18 @@ static void twd_set_mode(enum clock_event_mode mode, ctrl = 0; } - writel_relaxed(ctrl, twd_base + TWD_TIMER_CONTROL); + __raw_writel(ctrl, twd_base + TWD_TIMER_CONTROL); } static int twd_set_next_event(unsigned long evt, struct clock_event_device *unused) { - unsigned long ctrl = readl_relaxed(twd_base + TWD_TIMER_CONTROL); + unsigned long ctrl = __raw_readl(twd_base + TWD_TIMER_CONTROL); ctrl |= TWD_TIMER_CONTROL_ENABLE; - writel_relaxed(evt, twd_base + TWD_TIMER_COUNTER); - writel_relaxed(ctrl, twd_base + TWD_TIMER_CONTROL); + __raw_writel(evt, twd_base + TWD_TIMER_COUNTER); + __raw_writel(ctrl, twd_base + TWD_TIMER_CONTROL); return 0; } @@ -82,8 +82,8 @@ static int twd_set_next_event(unsigned long evt, */ static int twd_timer_ack(void) { - if (readl_relaxed(twd_base + TWD_TIMER_INTSTAT)) { - writel_relaxed(1, twd_base + TWD_TIMER_INTSTAT); + if (__raw_readl(twd_base + TWD_TIMER_INTSTAT)) { + __raw_writel(1, twd_base + TWD_TIMER_INTSTAT); return 1; } @@ -120,7 +120,7 @@ static int twd_rate_change(struct notifier_block *nb, * changing cpu. */ if (flags == POST_RATE_CHANGE) - on_each_cpu(twd_update_frequency, + smp_call_function(twd_update_frequency, (void *)&cnd->new_rate, 1); return NOTIFY_OK; @@ -209,15 +209,15 @@ static void __cpuinit twd_calibrate_rate(void) waitjiffies += 5; /* enable, no interrupt or reload */ - writel_relaxed(0x1, twd_base + TWD_TIMER_CONTROL); + __raw_writel(0x1, twd_base + TWD_TIMER_CONTROL); /* maximum value */ - writel_relaxed(0xFFFFFFFFU, twd_base + TWD_TIMER_COUNTER); + __raw_writel(0xFFFFFFFFU, twd_base + TWD_TIMER_COUNTER); while (get_jiffies_64() < waitjiffies) udelay(10); - count = readl_relaxed(twd_base + TWD_TIMER_COUNTER); + count = __raw_readl(twd_base + TWD_TIMER_COUNTER); twd_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5); @@ -275,7 +275,7 @@ static int __cpuinit twd_timer_setup(struct clock_event_device *clk) * bother with the below. */ if (per_cpu(percpu_setup_called, cpu)) { - writel_relaxed(0, twd_base + TWD_TIMER_CONTROL); + __raw_writel(0, twd_base + TWD_TIMER_CONTROL); clockevents_register_device(*__this_cpu_ptr(twd_evt)); enable_percpu_irq(clk->irq, 0); return 0; @@ -288,7 +288,7 @@ static int __cpuinit twd_timer_setup(struct clock_event_device *clk) * The following is done once per CPU the first time .setup() is * called. */ - writel_relaxed(0, twd_base + TWD_TIMER_CONTROL); + __raw_writel(0, twd_base + TWD_TIMER_CONTROL); clk->name = "local_timer"; clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT | diff --git a/arch/arm/kernel/stacktrace.c b/arch/arm/kernel/stacktrace.c index 6582c4adc182..00f79e59985b 100644 --- a/arch/arm/kernel/stacktrace.c +++ b/arch/arm/kernel/stacktrace.c @@ -31,7 +31,7 @@ int notrace unwind_frame(struct stackframe *frame) high = ALIGN(low, THREAD_SIZE); /* check current frame pointer is within bounds */ - if (fp < low + 12 || fp > high - 4) + if (fp < (low + 12) || fp + 4 >= high) return -EINVAL; /* restore the registers from the stack frame */ @@ -83,16 +83,13 @@ static int save_trace(struct stackframe *frame, void *d) return trace->nr_entries >= trace->max_entries; } -/* This must be noinline to so that our skip calculation works correctly */ -static noinline void __save_stack_trace(struct task_struct *tsk, - struct stack_trace *trace, unsigned int nosched) +void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace) { struct stack_trace_data data; struct stackframe frame; data.trace = trace; data.skip = trace->skip; - data.no_sched_functions = nosched; if (tsk != current) { #ifdef CONFIG_SMP @@ -105,6 +102,7 @@ static noinline void __save_stack_trace(struct task_struct *tsk, trace->entries[trace->nr_entries++] = ULONG_MAX; return; #else + data.no_sched_functions = 1; frame.fp = thread_saved_fp(tsk); frame.sp = thread_saved_sp(tsk); frame.lr = 0; /* recovered from the stack */ @@ -113,12 +111,11 @@ static noinline void __save_stack_trace(struct task_struct *tsk, } else { register unsigned long current_sp asm ("sp"); - /* We don't want this function nor the caller */ - data.skip += 2; + data.no_sched_functions = 0; frame.fp = (unsigned long)__builtin_frame_address(0); frame.sp = current_sp; frame.lr = (unsigned long)__builtin_return_address(0); - frame.pc = (unsigned long)__save_stack_trace; + frame.pc = (unsigned long)save_stack_trace_tsk; } walk_stackframe(&frame, save_trace, &data); @@ -126,14 +123,9 @@ static noinline void __save_stack_trace(struct task_struct *tsk, trace->entries[trace->nr_entries++] = ULONG_MAX; } -void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace) -{ - __save_stack_trace(tsk, trace, 1); -} - void save_stack_trace(struct stack_trace *trace) { - __save_stack_trace(current, trace, 0); + save_stack_trace_tsk(current, trace); } EXPORT_SYMBOL_GPL(save_stack_trace); #endif diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index 677da58d9e88..c5a59546a256 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -23,7 +23,6 @@ #include #include -#include #include /* @@ -290,140 +289,6 @@ void store_cpu_topology(unsigned int cpuid) cpu_topology[cpuid].socket_id, mpidr); } - -#ifdef CONFIG_SCHED_HMP - -static const char * const little_cores[] = { - "arm,cortex-a7", - NULL, -}; - -static bool is_little_cpu(struct device_node *cn) -{ - const char * const *lc; - for (lc = little_cores; *lc; lc++) - if (of_device_is_compatible(cn, *lc)) - return true; - return false; -} - -void __init arch_get_fast_and_slow_cpus(struct cpumask *fast, - struct cpumask *slow) -{ - struct device_node *cn = NULL; - int cpu; - - cpumask_clear(fast); - cpumask_clear(slow); - - /* - * Use the config options if they are given. This helps testing - * HMP scheduling on systems without a big.LITTLE architecture. - */ - if (strlen(CONFIG_HMP_FAST_CPU_MASK) && strlen(CONFIG_HMP_SLOW_CPU_MASK)) { - if (cpulist_parse(CONFIG_HMP_FAST_CPU_MASK, fast)) - WARN(1, "Failed to parse HMP fast cpu mask!\n"); - if (cpulist_parse(CONFIG_HMP_SLOW_CPU_MASK, slow)) - WARN(1, "Failed to parse HMP slow cpu mask!\n"); - return; - } - - /* - * Else, parse device tree for little cores. - */ - while ((cn = of_find_node_by_type(cn, "cpu"))) { - - const u32 *mpidr; - int len; - - mpidr = of_get_property(cn, "reg", &len); - if (!mpidr || len != 4) { - pr_err("* %s missing reg property\n", cn->full_name); - continue; - } - - cpu = get_logical_index(be32_to_cpup(mpidr)); - if (cpu == -EINVAL) { - pr_err("couldn't get logical index for mpidr %x\n", - be32_to_cpup(mpidr)); - break; - } - - if (is_little_cpu(cn)) - cpumask_set_cpu(cpu, slow); - else - cpumask_set_cpu(cpu, fast); - } - - if (!cpumask_empty(fast) && !cpumask_empty(slow)) - return; - - /* - * We didn't find both big and little cores so let's call all cores - * fast as this will keep the system running, with all cores being - * treated equal. - */ - cpumask_setall(fast); - cpumask_clear(slow); -} - -struct cpumask hmp_slow_cpu_mask; - -void __init arch_get_hmp_domains(struct list_head *hmp_domains_list) -{ - struct cpumask hmp_fast_cpu_mask; - struct hmp_domain *domain; - - arch_get_fast_and_slow_cpus(&hmp_fast_cpu_mask, &hmp_slow_cpu_mask); - - /* - * Initialize hmp_domains - * Must be ordered with respect to compute capacity. - * Fastest domain at head of list. - */ - if(!cpumask_empty(&hmp_slow_cpu_mask)) { - domain = (struct hmp_domain *) - kmalloc(sizeof(struct hmp_domain), GFP_KERNEL); - cpumask_copy(&domain->possible_cpus, &hmp_slow_cpu_mask); - cpumask_and(&domain->cpus, cpu_online_mask, &domain->possible_cpus); - list_add(&domain->hmp_domains, hmp_domains_list); - } - domain = (struct hmp_domain *) - kmalloc(sizeof(struct hmp_domain), GFP_KERNEL); - cpumask_copy(&domain->possible_cpus, &hmp_fast_cpu_mask); - cpumask_and(&domain->cpus, cpu_online_mask, &domain->possible_cpus); - list_add(&domain->hmp_domains, hmp_domains_list); -} -#endif /* CONFIG_SCHED_HMP */ - - -/* - * cluster_to_logical_mask - return cpu logical mask of CPUs in a cluster - * @socket_id: cluster HW identifier - * @cluster_mask: the cpumask location to be initialized, modified by the - * function only if return value == 0 - * - * Return: - * - * 0 on success - * -EINVAL if cluster_mask is NULL or there is no record matching socket_id - */ -int cluster_to_logical_mask(unsigned int socket_id, cpumask_t *cluster_mask) -{ - int cpu; - - if (!cluster_mask) - return -EINVAL; - - for_each_online_cpu(cpu) - if (socket_id == topology_physical_package_id(cpu)) { - cpumask_copy(cluster_mask, topology_core_cpumask(cpu)); - return 0; - } - - return -EINVAL; -} - /* * init_cpu_topology is called at boot when only one cpu is running * which prevent simultaneous write access to cpu_topology array diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index b4fd850c34b2..18b32e8e4497 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c @@ -34,15 +34,10 @@ #include #include #include -#include - -static const char *handler[]= { - "prefetch abort", - "data abort", - "address exception", - "interrupt", - "undefined instruction", -}; + +#include "signal.h" + +static const char *handler[]= { "prefetch abort", "data abort", "address exception", "interrupt" }; void *vectors_page; @@ -348,17 +343,15 @@ void arm_notify_die(const char *str, struct pt_regs *regs, int is_valid_bugaddr(unsigned long pc) { #ifdef CONFIG_THUMB2_KERNEL - u16 bkpt; - u16 insn = __opcode_to_mem_thumb16(BUG_INSTR_VALUE); + unsigned short bkpt; #else - u32 bkpt; - u32 insn = __opcode_to_mem_arm(BUG_INSTR_VALUE); + unsigned long bkpt; #endif if (probe_kernel_address((unsigned *)pc, bkpt)) return 0; - return bkpt == insn; + return bkpt == BUG_INSTR_VALUE; } #endif @@ -411,28 +404,25 @@ asmlinkage void __exception do_undefinstr(struct pt_regs *regs) if (processor_mode(regs) == SVC_MODE) { #ifdef CONFIG_THUMB2_KERNEL if (thumb_mode(regs)) { - instr = __mem_to_opcode_thumb16(((u16 *)pc)[0]); + instr = ((u16 *)pc)[0]; if (is_wide_instruction(instr)) { - u16 inst2; - inst2 = __mem_to_opcode_thumb16(((u16 *)pc)[1]); - instr = __opcode_thumb32_compose(instr, inst2); + instr <<= 16; + instr |= ((u16 *)pc)[1]; } } else #endif - instr = __mem_to_opcode_arm(*(u32 *) pc); + instr = *(u32 *) pc; } else if (thumb_mode(regs)) { if (get_user(instr, (u16 __user *)pc)) goto die_sig; - instr = __mem_to_opcode_thumb16(instr); if (is_wide_instruction(instr)) { unsigned int instr2; if (get_user(instr2, (u16 __user *)pc+1)) goto die_sig; - instr2 = __mem_to_opcode_thumb16(instr2); - instr = __opcode_thumb32_compose(instr, instr2); + instr <<= 16; + instr |= instr2; } } else if (get_user(instr, (u32 __user *)pc)) { - instr = __mem_to_opcode_arm(instr); goto die_sig; } @@ -810,55 +800,47 @@ void __init trap_init(void) return; } -#ifdef CONFIG_KUSER_HELPERS -static void __init kuser_init(void *vectors) +static void __init kuser_get_tls_init(unsigned long vectors) { - extern char __kuser_helper_start[], __kuser_helper_end[]; - int kuser_sz = __kuser_helper_end - __kuser_helper_start; - - memcpy(vectors + 0x1000 - kuser_sz, __kuser_helper_start, kuser_sz); - /* * vectors + 0xfe0 = __kuser_get_tls * vectors + 0xfe8 = hardware TLS instruction at 0xffff0fe8 */ if (tls_emu || has_tls_reg) - memcpy(vectors + 0xfe0, vectors + 0xfe8, 4); + memcpy((void *)vectors + 0xfe0, (void *)vectors + 0xfe8, 4); } -#else -static void __init kuser_init(void *vectors) -{ -} -#endif void __init early_trap_init(void *vectors_base) { unsigned long vectors = (unsigned long)vectors_base; extern char __stubs_start[], __stubs_end[]; extern char __vectors_start[], __vectors_end[]; - unsigned i; + extern char __kuser_helper_start[], __kuser_helper_end[]; + int kuser_sz = __kuser_helper_end - __kuser_helper_start; vectors_page = vectors_base; - /* - * Poison the vectors page with an undefined instruction. This - * instruction is chosen to be undefined for both ARM and Thumb - * ISAs. The Thumb version is an undefined instruction with a - * branch back to the undefined instruction. - */ - for (i = 0; i < PAGE_SIZE / sizeof(u32); i++) - ((u32 *)vectors_base)[i] = 0xe7fddef1; - /* * Copy the vectors, stubs and kuser helpers (in entry-armv.S) * into the vector page, mapped at 0xffff0000, and ensure these * are visible to the instruction stream. */ memcpy((void *)vectors, __vectors_start, __vectors_end - __vectors_start); - memcpy((void *)vectors + 0x1000, __stubs_start, __stubs_end - __stubs_start); + memcpy((void *)vectors + 0x200, __stubs_start, __stubs_end - __stubs_start); + memcpy((void *)vectors + 0x1000 - kuser_sz, __kuser_helper_start, kuser_sz); - kuser_init(vectors_base); + /* + * Do processor specific fixups for the kuser helpers + */ + kuser_get_tls_init(vectors); + + /* + * Copy signal return handlers into the vector page, and + * set sigreturn to be a pointer to these. + */ + memcpy((void *)(vectors + KERN_SIGRETURN_CODE - CONFIG_VECTORS_BASE), + sigreturn_codes, sizeof(sigreturn_codes)); - flush_icache_range(vectors, vectors + PAGE_SIZE * 2); + flush_icache_range(vectors, vectors + PAGE_SIZE); modify_domain(DOMAIN_USER, DOMAIN_CLIENT); } diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S index 33f2ea32f5a0..a871b8e00fca 100644 --- a/arch/arm/kernel/vmlinux.lds.S +++ b/arch/arm/kernel/vmlinux.lds.S @@ -152,23 +152,6 @@ SECTIONS . = ALIGN(PAGE_SIZE); __init_begin = .; #endif - /* - * The vectors and stubs are relocatable code, and the - * only thing that matters is their relative offsets - */ - __vectors_start = .; - .vectors 0 : AT(__vectors_start) { - *(.vectors) - } - . = __vectors_start + SIZEOF(.vectors); - __vectors_end = .; - - __stubs_start = .; - .stubs 0x1000 : AT(__stubs_start) { - *(.stubs) - } - . = __stubs_start + SIZEOF(.stubs); - __stubs_end = .; INIT_TEXT_SECTION(8) .exit.text : { diff --git a/arch/arm/kvm/Kconfig b/arch/arm/kvm/Kconfig index 466bd299b1a8..370e1a8af6ac 100644 --- a/arch/arm/kvm/Kconfig +++ b/arch/arm/kvm/Kconfig @@ -20,7 +20,6 @@ config KVM bool "Kernel-based Virtual Machine (KVM) support" select PREEMPT_NOTIFIERS select ANON_INODES - select HAVE_KVM_CPU_RELAX_INTERCEPT select KVM_MMIO select KVM_ARM_HOST depends on ARM_VIRT_EXT && ARM_LPAE @@ -42,9 +41,9 @@ config KVM_ARM_HOST Provides host support for ARM processors. config KVM_ARM_MAX_VCPUS - int "Number maximum supported virtual CPUs per VM" - depends on KVM_ARM_HOST - default 4 + int "Number maximum supported virtual CPUs per VM" if KVM_ARM_HOST + default 4 if KVM_ARM_HOST + default 0 help Static number of max supported virtual CPUs per VM. @@ -68,4 +67,6 @@ config KVM_ARM_TIMER ---help--- Adds support for the Architected Timers in virtual machines +source drivers/virtio/Kconfig + endif # VIRTUALIZATION diff --git a/arch/arm/kvm/Makefile b/arch/arm/kvm/Makefile index f7057ed045b6..53c5ed83d16f 100644 --- a/arch/arm/kvm/Makefile +++ b/arch/arm/kvm/Makefile @@ -14,12 +14,10 @@ CFLAGS_mmu.o := -I. AFLAGS_init.o := -Wa,-march=armv7-a$(plus_virt) AFLAGS_interrupts.o := -Wa,-march=armv7-a$(plus_virt) -KVM := ../../../virt/kvm -kvm-arm-y = $(KVM)/kvm_main.o $(KVM)/coalesced_mmio.o +kvm-arm-y = $(addprefix ../../../virt/kvm/, kvm_main.o coalesced_mmio.o) obj-y += kvm-arm.o init.o interrupts.o obj-y += arm.o handle_exit.o guest.o mmu.o emulate.o reset.o -obj-y += coproc.o coproc_a15.o coproc_a7.o mmio.o psci.o perf.o -obj-$(CONFIG_KVM_ARM_VGIC) += $(KVM)/arm/vgic.o -obj-$(CONFIG_KVM_ARM_VGIC) += $(KVM)/arm/vgic-v2.o -obj-$(CONFIG_KVM_ARM_TIMER) += $(KVM)/arm/arch_timer.o +obj-y += coproc.o coproc_a15.o mmio.o psci.o perf.o +obj-$(CONFIG_KVM_ARM_VGIC) += vgic.o +obj-$(CONFIG_KVM_ARM_TIMER) += arch_timer.o diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c index d0c8ee654bbf..ef1703b9587b 100644 --- a/arch/arm/kvm/arm.c +++ b/arch/arm/kvm/arm.c @@ -17,7 +17,6 @@ */ #include -#include #include #include #include @@ -82,12 +81,12 @@ struct kvm_vcpu *kvm_arm_get_running_vcpu(void) /** * kvm_arm_get_running_vcpus - get the per-CPU array of currently running vcpus. */ -struct kvm_vcpu * __percpu *kvm_get_running_vcpus(void) +struct kvm_vcpu __percpu **kvm_get_running_vcpus(void) { return &kvm_arm_running_vcpu; } -int kvm_arch_hardware_enable(void) +int kvm_arch_hardware_enable(void *garbage) { return 0; } @@ -97,16 +96,27 @@ int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu) return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE; } +void kvm_arch_hardware_disable(void *garbage) +{ +} + int kvm_arch_hardware_setup(void) { return 0; } +void kvm_arch_hardware_unsetup(void) +{ +} + void kvm_arch_check_processor_compat(void *rtn) { *(int *)rtn = 0; } +void kvm_arch_sync_events(struct kvm *kvm) +{ +} /** * kvm_arch_init_vm - initializes a VM data structure @@ -127,8 +137,6 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type) if (ret) goto out_free_stage2_pgd; - kvm_timer_init(kvm); - /* Mark the initial VMID generation invalid */ kvm->arch.vmid_gen = 0; @@ -144,6 +152,15 @@ int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf) return VM_FAULT_SIGBUS; } +void kvm_arch_free_memslot(struct kvm_memory_slot *free, + struct kvm_memory_slot *dont) +{ +} + +int kvm_arch_create_memslot(struct kvm_memory_slot *slot, unsigned long npages) +{ + return 0; +} /** * kvm_arch_destroy_vm - destroy the VM data structure @@ -161,25 +178,20 @@ void kvm_arch_destroy_vm(struct kvm *kvm) kvm->vcpus[i] = NULL; } } - - kvm_vgic_destroy(kvm); } -int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) +int kvm_dev_ioctl_check_extension(long ext) { int r; switch (ext) { case KVM_CAP_IRQCHIP: r = vgic_present; break; - case KVM_CAP_DEVICE_CTRL: case KVM_CAP_USER_MEMORY: case KVM_CAP_SYNC_MMU: case KVM_CAP_DESTROY_MEMORY_REGION_WORKS: case KVM_CAP_ONE_REG: case KVM_CAP_ARM_PSCI: - case KVM_CAP_ARM_PSCI_0_2: - case KVM_CAP_READONLY_MEM: r = 1; break; case KVM_CAP_COALESCED_MMIO: @@ -207,6 +219,29 @@ long kvm_arch_dev_ioctl(struct file *filp, return -EINVAL; } +int kvm_arch_prepare_memory_region(struct kvm *kvm, + struct kvm_memory_slot *memslot, + struct kvm_userspace_memory_region *mem, + enum kvm_mr_change change) +{ + return 0; +} + +void kvm_arch_commit_memory_region(struct kvm *kvm, + struct kvm_userspace_memory_region *mem, + const struct kvm_memory_slot *old, + enum kvm_mr_change change) +{ +} + +void kvm_arch_flush_shadow_all(struct kvm *kvm) +{ +} + +void kvm_arch_flush_shadow_memslot(struct kvm *kvm, + struct kvm_memory_slot *slot) +{ +} struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int id) { @@ -245,7 +280,6 @@ void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu) { kvm_mmu_free_memory_caches(vcpu); kvm_timer_vcpu_terminate(vcpu); - kvm_vgic_vcpu_destroy(vcpu); kmem_cache_free(kvm_vcpu_cache, vcpu); } @@ -261,15 +295,26 @@ int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu) int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu) { + int ret; + /* Force users to call KVM_ARM_VCPU_INIT */ vcpu->arch.target = -1; + /* Set up VGIC */ + ret = kvm_vgic_vcpu_init(vcpu); + if (ret) + return ret; + /* Set up the timer */ kvm_timer_vcpu_init(vcpu); return 0; } +void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) +{ +} + void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) { vcpu->cpu = cpu; @@ -289,13 +334,6 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) { - /* - * The arch-generic KVM code expects the cpu field of a vcpu to be -1 - * if the vcpu is no longer assigned to a cpu. This is used for the - * optimized make_all_cpus_request path. - */ - vcpu->cpu = -1; - kvm_arm_set_running_vcpu(NULL); } @@ -410,17 +448,15 @@ static void update_vttbr(struct kvm *kvm) /* update vttbr to be used with the new vmid */ pgd_phys = virt_to_phys(kvm->arch.pgd); - BUG_ON(pgd_phys & ~VTTBR_BADDR_MASK); vmid = ((u64)(kvm->arch.vmid) << VTTBR_VMID_SHIFT) & VTTBR_VMID_MASK; - kvm->arch.vttbr = pgd_phys | vmid; + kvm->arch.vttbr = pgd_phys & VTTBR_BADDR_MASK; + kvm->arch.vttbr |= vmid; spin_unlock(&kvm_vmid_lock); } static int kvm_vcpu_first_run_init(struct kvm_vcpu *vcpu) { - int ret; - if (likely(vcpu->arch.has_run_once)) return 0; @@ -430,12 +466,22 @@ static int kvm_vcpu_first_run_init(struct kvm_vcpu *vcpu) * Initialize the VGIC before running a vcpu the first time on * this VM. */ - if (unlikely(!vgic_initialized(vcpu->kvm))) { - ret = kvm_vgic_init(vcpu->kvm); + if (irqchip_in_kernel(vcpu->kvm) && + unlikely(!vgic_initialized(vcpu->kvm))) { + int ret = kvm_vgic_init(vcpu->kvm); if (ret) return ret; } + /* + * Handle the "start in power-off" case by calling into the + * PSCI code. + */ + if (test_and_clear_bit(KVM_ARM_VCPU_POWER_OFF, vcpu->arch.features)) { + *vcpu_reg(vcpu, 0) = KVM_PSCI_FN_CPU_OFF; + kvm_psci_call(vcpu); + } + return 0; } @@ -649,24 +695,6 @@ int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_level, return -EINVAL; } -static int kvm_arch_vcpu_ioctl_vcpu_init(struct kvm_vcpu *vcpu, - struct kvm_vcpu_init *init) -{ - int ret; - - ret = kvm_vcpu_set_target(vcpu, init); - if (ret) - return ret; - - /* - * Handle the "start in power-off" case by marking the VCPU as paused. - */ - if (__test_and_clear_bit(KVM_ARM_VCPU_POWER_OFF, vcpu->arch.features)) - vcpu->arch.pause = true; - - return 0; -} - long kvm_arch_vcpu_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg) { @@ -680,7 +708,8 @@ long kvm_arch_vcpu_ioctl(struct file *filp, if (copy_from_user(&init, argp, sizeof(init))) return -EFAULT; - return kvm_arch_vcpu_ioctl_vcpu_init(vcpu, &init); + return kvm_vcpu_set_target(vcpu, &init); + } case KVM_SET_ONE_REG: case KVM_GET_ONE_REG: { @@ -738,7 +767,7 @@ static int kvm_vm_ioctl_set_device_addr(struct kvm *kvm, case KVM_ARM_DEVICE_VGIC_V2: if (!vgic_present) return -ENXIO; - return kvm_vgic_addr(kvm, type, &dev_addr->addr, true); + return kvm_vgic_set_addr(kvm, type, dev_addr->addr); default: return -ENODEV; } @@ -764,19 +793,6 @@ long kvm_arch_vm_ioctl(struct file *filp, return -EFAULT; return kvm_vm_ioctl_set_device_addr(kvm, &dev_addr); } - case KVM_ARM_PREFERRED_TARGET: { - int err; - struct kvm_vcpu_init init; - - err = kvm_vcpu_preferred_target(&init); - if (err) - return err; - - if (copy_to_user(argp, &init, sizeof(init))) - return -EFAULT; - - return 0; - } default: return -EINVAL; } @@ -784,8 +800,8 @@ long kvm_arch_vm_ioctl(struct file *filp, static void cpu_init_hyp_mode(void *dummy) { - phys_addr_t boot_pgd_ptr; - phys_addr_t pgd_ptr; + unsigned long long boot_pgd_ptr; + unsigned long long pgd_ptr; unsigned long hyp_stack_ptr; unsigned long stack_page; unsigned long vector_ptr; @@ -793,8 +809,8 @@ static void cpu_init_hyp_mode(void *dummy) /* Switch from the HYP stub to our own HYP init vector */ __hyp_set_vectors(kvm_get_idmap_vector()); - boot_pgd_ptr = kvm_mmu_get_boot_httbr(); - pgd_ptr = kvm_mmu_get_httbr(); + boot_pgd_ptr = (unsigned long long)kvm_mmu_get_boot_httbr(); + pgd_ptr = (unsigned long long)kvm_mmu_get_httbr(); stack_page = __get_cpu_var(kvm_arm_hyp_stack_page); hyp_stack_ptr = stack_page + PAGE_SIZE; vector_ptr = (unsigned long)__kvm_hyp_vector; @@ -808,8 +824,7 @@ static int hyp_init_cpu_notify(struct notifier_block *self, switch (action) { case CPU_STARTING: case CPU_STARTING_FROZEN: - if (__hyp_get_vectors() == hyp_default_vectors) - cpu_init_hyp_mode(NULL); + cpu_init_hyp_mode(NULL); break; } @@ -820,34 +835,6 @@ static struct notifier_block hyp_init_cpu_nb = { .notifier_call = hyp_init_cpu_notify, }; -#ifdef CONFIG_CPU_PM -static int hyp_init_cpu_pm_notifier(struct notifier_block *self, - unsigned long cmd, - void *v) -{ - if (cmd == CPU_PM_EXIT && - __hyp_get_vectors() == hyp_default_vectors) { - cpu_init_hyp_mode(NULL); - return NOTIFY_OK; - } - - return NOTIFY_DONE; -} - -static struct notifier_block hyp_init_cpu_pm_nb = { - .notifier_call = hyp_init_cpu_pm_notifier, -}; - -static void __init hyp_cpu_pm_init(void) -{ - cpu_pm_register_notifier(&hyp_init_cpu_pm_nb); -} -#else -static inline void hyp_cpu_pm_init(void) -{ -} -#endif - /** * Inits Hyp-mode on all online CPUs */ @@ -1008,8 +995,6 @@ int kvm_arch_init(void *opaque) goto out_err; } - hyp_cpu_pm_init(); - kvm_coproc_table_init(); return 0; out_err: diff --git a/arch/arm/kvm/coproc.c b/arch/arm/kvm/coproc.c index 7928dbdf2102..8eea97be1ed5 100644 --- a/arch/arm/kvm/coproc.c +++ b/arch/arm/kvm/coproc.c @@ -23,7 +23,6 @@ #include #include #include -#include #include #include #include @@ -44,31 +43,6 @@ static u32 cache_levels; /* CSSELR values; used to index KVM_REG_ARM_DEMUX_ID_CCSIDR */ #define CSSELR_MAX 12 -/* - * kvm_vcpu_arch.cp15 holds cp15 registers as an array of u32, but some - * of cp15 registers can be viewed either as couple of two u32 registers - * or one u64 register. Current u64 register encoding is that least - * significant u32 word is followed by most significant u32 word. - */ -static inline void vcpu_cp15_reg64_set(struct kvm_vcpu *vcpu, - const struct coproc_reg *r, - u64 val) -{ - vcpu->arch.cp15[r->reg] = val & 0xffffffff; - vcpu->arch.cp15[r->reg + 1] = val >> 32; -} - -static inline u64 vcpu_cp15_reg64_get(struct kvm_vcpu *vcpu, - const struct coproc_reg *r) -{ - u64 val; - - val = vcpu->arch.cp15[r->reg + 1]; - val = val << 32; - val = val | vcpu->arch.cp15[r->reg]; - return val; -} - int kvm_handle_cp10_id(struct kvm_vcpu *vcpu, struct kvm_run *run) { kvm_inject_undefined(vcpu); @@ -97,98 +71,6 @@ int kvm_handle_cp14_access(struct kvm_vcpu *vcpu, struct kvm_run *run) return 1; } -static void reset_mpidr(struct kvm_vcpu *vcpu, const struct coproc_reg *r) -{ - /* - * Compute guest MPIDR. We build a virtual cluster out of the - * vcpu_id, but we read the 'U' bit from the underlying - * hardware directly. - */ - vcpu->arch.cp15[c0_MPIDR] = ((read_cpuid_mpidr() & MPIDR_SMP_BITMASK) | - ((vcpu->vcpu_id >> 2) << MPIDR_LEVEL_BITS) | - (vcpu->vcpu_id & 3)); -} - -/* TRM entries A7:4.3.31 A15:4.3.28 - RO WI */ -static bool access_actlr(struct kvm_vcpu *vcpu, - const struct coproc_params *p, - const struct coproc_reg *r) -{ - if (p->is_write) - return ignore_write(vcpu, p); - - *vcpu_reg(vcpu, p->Rt1) = vcpu->arch.cp15[c1_ACTLR]; - return true; -} - -/* TRM entries A7:4.3.56, A15:4.3.60 - R/O. */ -static bool access_cbar(struct kvm_vcpu *vcpu, - const struct coproc_params *p, - const struct coproc_reg *r) -{ - if (p->is_write) - return write_to_read_only(vcpu, p); - return read_zero(vcpu, p); -} - -/* TRM entries A7:4.3.49, A15:4.3.48 - R/O WI */ -static bool access_l2ctlr(struct kvm_vcpu *vcpu, - const struct coproc_params *p, - const struct coproc_reg *r) -{ - if (p->is_write) - return ignore_write(vcpu, p); - - *vcpu_reg(vcpu, p->Rt1) = vcpu->arch.cp15[c9_L2CTLR]; - return true; -} - -static void reset_l2ctlr(struct kvm_vcpu *vcpu, const struct coproc_reg *r) -{ - u32 l2ctlr, ncores; - - asm volatile("mrc p15, 1, %0, c9, c0, 2\n" : "=r" (l2ctlr)); - l2ctlr &= ~(3 << 24); - ncores = atomic_read(&vcpu->kvm->online_vcpus) - 1; - /* How many cores in the current cluster and the next ones */ - ncores -= (vcpu->vcpu_id & ~3); - /* Cap it to the maximum number of cores in a single cluster */ - ncores = min(ncores, 3U); - l2ctlr |= (ncores & 3) << 24; - - vcpu->arch.cp15[c9_L2CTLR] = l2ctlr; -} - -static void reset_actlr(struct kvm_vcpu *vcpu, const struct coproc_reg *r) -{ - u32 actlr; - - /* ACTLR contains SMP bit: make sure you create all cpus first! */ - asm volatile("mrc p15, 0, %0, c1, c0, 1\n" : "=r" (actlr)); - /* Make the SMP bit consistent with the guest configuration */ - if (atomic_read(&vcpu->kvm->online_vcpus) > 1) - actlr |= 1U << 6; - else - actlr &= ~(1U << 6); - - vcpu->arch.cp15[c1_ACTLR] = actlr; -} - -/* - * TRM entries: A7:4.3.50, A15:4.3.49 - * R/O WI (even if NSACR.NS_L2ERR, a write of 1 is ignored). - */ -static bool access_l2ectlr(struct kvm_vcpu *vcpu, - const struct coproc_params *p, - const struct coproc_reg *r) -{ - if (p->is_write) - return ignore_write(vcpu, p); - - *vcpu_reg(vcpu, p->Rt1) = 0; - return true; -} - /* See note at ARM ARM B1.14.4 */ static bool access_dcsw(struct kvm_vcpu *vcpu, const struct coproc_params *p, @@ -230,44 +112,6 @@ done: return true; } -/* - * Generic accessor for VM registers. Only called as long as HCR_TVM - * is set. - */ -static bool access_vm_reg(struct kvm_vcpu *vcpu, - const struct coproc_params *p, - const struct coproc_reg *r) -{ - BUG_ON(!p->is_write); - - vcpu->arch.cp15[r->reg] = *vcpu_reg(vcpu, p->Rt1); - if (p->is_64bit) - vcpu->arch.cp15[r->reg + 1] = *vcpu_reg(vcpu, p->Rt2); - - return true; -} - -/* - * SCTLR accessor. Only called as long as HCR_TVM is set. If the - * guest enables the MMU, we stop trapping the VM sys_regs and leave - * it in complete control of the caches. - * - * Used by the cpu-specific code. - */ -bool access_sctlr(struct kvm_vcpu *vcpu, - const struct coproc_params *p, - const struct coproc_reg *r) -{ - access_vm_reg(vcpu, p, r); - - if (vcpu_has_cache_enabled(vcpu)) { /* MMU+Caches enabled? */ - vcpu->arch.hcr &= ~HCR_TVM; - stage2_flush_vm(vcpu->kvm); - } - - return true; -} - /* * We could trap ID_DFR0 and tell the guest we don't support performance * monitoring. Unfortunately the patch to make the kernel check ID_DFR0 was @@ -302,76 +146,46 @@ static bool pm_fake(struct kvm_vcpu *vcpu, #define access_pmintenclr pm_fake /* Architected CP15 registers. - * CRn denotes the primary register number, but is copied to the CRm in the - * user space API for 64-bit register access in line with the terminology used - * in the ARM ARM. - * Important: Must be sorted ascending by CRn, CRM, Op1, Op2 and with 64-bit - * registers preceding 32-bit ones. + * Important: Must be sorted ascending by CRn, CRM, Op1, Op2 */ static const struct coproc_reg cp15_regs[] = { - /* MPIDR: we use VMPIDR for guest access. */ - { CRn( 0), CRm( 0), Op1( 0), Op2( 5), is32, - NULL, reset_mpidr, c0_MPIDR }, - /* CSSELR: swapped by interrupt.S. */ { CRn( 0), CRm( 0), Op1( 2), Op2( 0), is32, NULL, reset_unknown, c0_CSSELR }, - /* ACTLR: trapped by HCR.TAC bit. */ - { CRn( 1), CRm( 0), Op1( 0), Op2( 1), is32, - access_actlr, reset_actlr, c1_ACTLR }, + /* TTBR0/TTBR1: swapped by interrupt.S. */ + { CRm( 2), Op1( 0), is64, NULL, reset_unknown64, c2_TTBR0 }, + { CRm( 2), Op1( 1), is64, NULL, reset_unknown64, c2_TTBR1 }, - /* CPACR: swapped by interrupt.S. */ - { CRn( 1), CRm( 0), Op1( 0), Op2( 2), is32, - NULL, reset_val, c1_CPACR, 0x00000000 }, - - /* TTBR0/TTBR1/TTBCR: swapped by interrupt.S. */ - { CRm64( 2), Op1( 0), is64, access_vm_reg, reset_unknown64, c2_TTBR0 }, - { CRn(2), CRm( 0), Op1( 0), Op2( 0), is32, - access_vm_reg, reset_unknown, c2_TTBR0 }, - { CRn(2), CRm( 0), Op1( 0), Op2( 1), is32, - access_vm_reg, reset_unknown, c2_TTBR1 }, + /* TTBCR: swapped by interrupt.S. */ { CRn( 2), CRm( 0), Op1( 0), Op2( 2), is32, - access_vm_reg, reset_val, c2_TTBCR, 0x00000000 }, - { CRm64( 2), Op1( 1), is64, access_vm_reg, reset_unknown64, c2_TTBR1 }, - + NULL, reset_val, c2_TTBCR, 0x00000000 }, /* DACR: swapped by interrupt.S. */ { CRn( 3), CRm( 0), Op1( 0), Op2( 0), is32, - access_vm_reg, reset_unknown, c3_DACR }, + NULL, reset_unknown, c3_DACR }, /* DFSR/IFSR/ADFSR/AIFSR: swapped by interrupt.S. */ { CRn( 5), CRm( 0), Op1( 0), Op2( 0), is32, - access_vm_reg, reset_unknown, c5_DFSR }, + NULL, reset_unknown, c5_DFSR }, { CRn( 5), CRm( 0), Op1( 0), Op2( 1), is32, - access_vm_reg, reset_unknown, c5_IFSR }, + NULL, reset_unknown, c5_IFSR }, { CRn( 5), CRm( 1), Op1( 0), Op2( 0), is32, - access_vm_reg, reset_unknown, c5_ADFSR }, + NULL, reset_unknown, c5_ADFSR }, { CRn( 5), CRm( 1), Op1( 0), Op2( 1), is32, - access_vm_reg, reset_unknown, c5_AIFSR }, + NULL, reset_unknown, c5_AIFSR }, /* DFAR/IFAR: swapped by interrupt.S. */ { CRn( 6), CRm( 0), Op1( 0), Op2( 0), is32, - access_vm_reg, reset_unknown, c6_DFAR }, + NULL, reset_unknown, c6_DFAR }, { CRn( 6), CRm( 0), Op1( 0), Op2( 2), is32, - access_vm_reg, reset_unknown, c6_IFAR }, - - /* PAR swapped by interrupt.S */ - { CRm64( 7), Op1( 0), is64, NULL, reset_unknown64, c7_PAR }, - + NULL, reset_unknown, c6_IFAR }, /* * DC{C,I,CI}SW operations: */ { CRn( 7), CRm( 6), Op1( 0), Op2( 2), is32, access_dcsw}, { CRn( 7), CRm(10), Op1( 0), Op2( 2), is32, access_dcsw}, { CRn( 7), CRm(14), Op1( 0), Op2( 2), is32, access_dcsw}, - /* - * L2CTLR access (guest wants to know #CPUs). - */ - { CRn( 9), CRm( 0), Op1( 1), Op2( 2), is32, - access_l2ctlr, reset_l2ctlr, c9_L2CTLR }, - { CRn( 9), CRm( 0), Op1( 1), Op2( 3), is32, access_l2ectlr}, - /* * Dummy performance monitor implementation. */ @@ -391,15 +205,9 @@ static const struct coproc_reg cp15_regs[] = { /* PRRR/NMRR (aka MAIR0/MAIR1): swapped by interrupt.S. */ { CRn(10), CRm( 2), Op1( 0), Op2( 0), is32, - access_vm_reg, reset_unknown, c10_PRRR}, + NULL, reset_unknown, c10_PRRR}, { CRn(10), CRm( 2), Op1( 0), Op2( 1), is32, - access_vm_reg, reset_unknown, c10_NMRR}, - - /* AMAIR0/AMAIR1: swapped by interrupt.S. */ - { CRn(10), CRm( 3), Op1( 0), Op2( 0), is32, - access_vm_reg, reset_unknown, c10_AMAIR0}, - { CRn(10), CRm( 3), Op1( 0), Op2( 1), is32, - access_vm_reg, reset_unknown, c10_AMAIR1}, + NULL, reset_unknown, c10_NMRR}, /* VBAR: swapped by interrupt.S. */ { CRn(12), CRm( 0), Op1( 0), Op2( 0), is32, @@ -407,7 +215,7 @@ static const struct coproc_reg cp15_regs[] = { /* CONTEXTIDR/TPIDRURW/TPIDRURO/TPIDRPRW: swapped by interrupt.S. */ { CRn(13), CRm( 0), Op1( 0), Op2( 1), is32, - access_vm_reg, reset_val, c13_CID, 0x00000000 }, + NULL, reset_val, c13_CID, 0x00000000 }, { CRn(13), CRm( 0), Op1( 0), Op2( 2), is32, NULL, reset_unknown, c13_TID_URW }, { CRn(13), CRm( 0), Op1( 0), Op2( 3), is32, @@ -418,9 +226,6 @@ static const struct coproc_reg cp15_regs[] = { /* CNTKCTL: swapped by interrupt.S. */ { CRn(14), CRm( 1), Op1( 0), Op2( 0), is32, NULL, reset_val, c14_CNTKCTL, 0x00000000 }, - - /* The Configuration Base Address Register. */ - { CRn(15), CRm( 0), Op1( 4), Op2( 0), is32, access_cbar}, }; /* Target specific emulation tables */ @@ -428,12 +233,6 @@ static struct kvm_coproc_target_table *target_tables[KVM_ARM_NUM_TARGETS]; void kvm_register_target_coproc_table(struct kvm_coproc_target_table *table) { - unsigned int i; - - for (i = 1; i < table->num; i++) - BUG_ON(cmp_reg(&table->table[i-1], - &table->table[i]) >= 0); - target_tables[table->target] = table; } @@ -516,7 +315,7 @@ int kvm_handle_cp15_64(struct kvm_vcpu *vcpu, struct kvm_run *run) { struct coproc_params params; - params.CRn = (kvm_vcpu_get_hsr(vcpu) >> 1) & 0xf; + params.CRm = (kvm_vcpu_get_hsr(vcpu) >> 1) & 0xf; params.Rt1 = (kvm_vcpu_get_hsr(vcpu) >> 5) & 0xf; params.is_write = ((kvm_vcpu_get_hsr(vcpu) & 1) == 0); params.is_64bit = true; @@ -524,7 +323,7 @@ int kvm_handle_cp15_64(struct kvm_vcpu *vcpu, struct kvm_run *run) params.Op1 = (kvm_vcpu_get_hsr(vcpu) >> 16) & 0xf; params.Op2 = 0; params.Rt2 = (kvm_vcpu_get_hsr(vcpu) >> 10) & 0xf; - params.CRm = 0; + params.CRn = 0; return emulate_cp15(vcpu, ¶ms); } @@ -596,13 +395,12 @@ static bool index_to_params(u64 id, struct coproc_params *params) | KVM_REG_ARM_OPC1_MASK)) return false; params->is_64bit = true; - /* CRm to CRn: see cp15_to_index for details */ - params->CRn = ((id & KVM_REG_ARM_CRM_MASK) + params->CRm = ((id & KVM_REG_ARM_CRM_MASK) >> KVM_REG_ARM_CRM_SHIFT); params->Op1 = ((id & KVM_REG_ARM_OPC1_MASK) >> KVM_REG_ARM_OPC1_SHIFT); params->Op2 = 0; - params->CRm = 0; + params->CRn = 0; return true; default: return false; @@ -707,23 +505,17 @@ static struct coproc_reg invariant_cp15[] = { { CRn( 0), CRm( 0), Op1( 1), Op2( 7), is32, NULL, get_AIDR }, }; -/* - * Reads a register value from a userspace address to a kernel - * variable. Make sure that register size matches sizeof(*__val). - */ static int reg_from_user(void *val, const void __user *uaddr, u64 id) { + /* This Just Works because we are little endian. */ if (copy_from_user(val, uaddr, KVM_REG_SIZE(id)) != 0) return -EFAULT; return 0; } -/* - * Writes a register value to a userspace address from a kernel variable. - * Make sure that register size matches sizeof(*__val). - */ static int reg_to_user(void __user *uaddr, const void *val, u64 id) { + /* This Just Works because we are little endian. */ if (copy_to_user(uaddr, val, KVM_REG_SIZE(id)) != 0) return -EFAULT; return 0; @@ -733,7 +525,6 @@ static int get_invariant_cp15(u64 id, void __user *uaddr) { struct coproc_params params; const struct coproc_reg *r; - int ret; if (!index_to_params(id, ¶ms)) return -ENOENT; @@ -742,15 +533,7 @@ static int get_invariant_cp15(u64 id, void __user *uaddr) if (!r) return -ENOENT; - ret = -ENOENT; - if (KVM_REG_SIZE(id) == 4) { - u32 val = r->val; - - ret = reg_to_user(uaddr, &val, id); - } else if (KVM_REG_SIZE(id) == 8) { - ret = reg_to_user(uaddr, &r->val, id); - } - return ret; + return reg_to_user(uaddr, &r->val, id); } static int set_invariant_cp15(u64 id, void __user *uaddr) @@ -758,7 +541,7 @@ static int set_invariant_cp15(u64 id, void __user *uaddr) struct coproc_params params; const struct coproc_reg *r; int err; - u64 val; + u64 val = 0; /* Make sure high bits are 0 for 32-bit regs */ if (!index_to_params(id, ¶ms)) return -ENOENT; @@ -766,16 +549,7 @@ static int set_invariant_cp15(u64 id, void __user *uaddr) if (!r) return -ENOENT; - err = -ENOENT; - if (KVM_REG_SIZE(id) == 4) { - u32 val32; - - err = reg_from_user(&val32, uaddr, id); - if (!err) - val = val32; - } else if (KVM_REG_SIZE(id) == 8) { - err = reg_from_user(&val, uaddr, id); - } + err = reg_from_user(&val, uaddr, id); if (err) return err; @@ -791,7 +565,7 @@ static bool is_valid_cache(u32 val) u32 level, ctype; if (val >= CSSELR_MAX) - return false; + return -ENOENT; /* Bottom bit is Instruction or Data bit. Next 3 bits are level. */ level = (val >> 1); @@ -1053,7 +827,6 @@ int kvm_arm_coproc_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg) { const struct coproc_reg *r; void __user *uaddr = (void __user *)(long)reg->addr; - int ret; if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_DEMUX) return demux_c15_get(reg->id, uaddr); @@ -1065,24 +838,14 @@ int kvm_arm_coproc_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg) if (!r) return get_invariant_cp15(reg->id, uaddr); - ret = -ENOENT; - if (KVM_REG_SIZE(reg->id) == 8) { - u64 val; - - val = vcpu_cp15_reg64_get(vcpu, r); - ret = reg_to_user(uaddr, &val, reg->id); - } else if (KVM_REG_SIZE(reg->id) == 4) { - ret = reg_to_user(uaddr, &vcpu->arch.cp15[r->reg], reg->id); - } - - return ret; + /* Note: copies two regs if size is 64 bit. */ + return reg_to_user(uaddr, &vcpu->arch.cp15[r->reg], reg->id); } int kvm_arm_coproc_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg) { const struct coproc_reg *r; void __user *uaddr = (void __user *)(long)reg->addr; - int ret; if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_DEMUX) return demux_c15_set(reg->id, uaddr); @@ -1094,18 +857,8 @@ int kvm_arm_coproc_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg) if (!r) return set_invariant_cp15(reg->id, uaddr); - ret = -ENOENT; - if (KVM_REG_SIZE(reg->id) == 8) { - u64 val; - - ret = reg_from_user(&val, uaddr, reg->id); - if (!ret) - vcpu_cp15_reg64_set(vcpu, r, val); - } else if (KVM_REG_SIZE(reg->id) == 4) { - ret = reg_from_user(&vcpu->arch.cp15[r->reg], uaddr, reg->id); - } - - return ret; + /* Note: copies two regs if size is 64 bit */ + return reg_from_user(&vcpu->arch.cp15[r->reg], uaddr, reg->id); } static unsigned int num_demux_regs(void) @@ -1141,14 +894,7 @@ static u64 cp15_to_index(const struct coproc_reg *reg) if (reg->is_64) { val |= KVM_REG_SIZE_U64; val |= (reg->Op1 << KVM_REG_ARM_OPC1_SHIFT); - /* - * CRn always denotes the primary coproc. reg. nr. for the - * in-kernel representation, but the user space API uses the - * CRm for the encoding, because it is modelled after the - * MRRC/MCRR instructions: see the ARM ARM rev. c page - * B3-1445 - */ - val |= (reg->CRn << KVM_REG_ARM_CRM_SHIFT); + val |= (reg->CRm << KVM_REG_ARM_CRM_SHIFT); } else { val |= KVM_REG_SIZE_U32; val |= (reg->Op1 << KVM_REG_ARM_OPC1_SHIFT); diff --git a/arch/arm/kvm/coproc.h b/arch/arm/kvm/coproc.h index 1a44bbe39643..b7301d3e4799 100644 --- a/arch/arm/kvm/coproc.h +++ b/arch/arm/kvm/coproc.h @@ -58,8 +58,8 @@ static inline void print_cp_instr(const struct coproc_params *p) { /* Look, we even formatted it for you to paste into the table! */ if (p->is_64bit) { - kvm_pr_unimpl(" { CRm64(%2lu), Op1(%2lu), is64, func_%s },\n", - p->CRn, p->Op1, p->is_write ? "write" : "read"); + kvm_pr_unimpl(" { CRm(%2lu), Op1(%2lu), is64, func_%s },\n", + p->CRm, p->Op1, p->is_write ? "write" : "read"); } else { kvm_pr_unimpl(" { CRn(%2lu), CRm(%2lu), Op1(%2lu), Op2(%2lu), is32," " func_%s },\n", @@ -139,22 +139,15 @@ static inline int cmp_reg(const struct coproc_reg *i1, return i1->CRm - i2->CRm; if (i1->Op1 != i2->Op1) return i1->Op1 - i2->Op1; - if (i1->Op2 != i2->Op2) - return i1->Op2 - i2->Op2; - return i2->is_64 - i1->is_64; + return i1->Op2 - i2->Op2; } #define CRn(_x) .CRn = _x #define CRm(_x) .CRm = _x -#define CRm64(_x) .CRn = _x, .CRm = 0 #define Op1(_x) .Op1 = _x #define Op2(_x) .Op2 = _x #define is64 .is_64 = true #define is32 .is_64 = false -bool access_sctlr(struct kvm_vcpu *vcpu, - const struct coproc_params *p, - const struct coproc_reg *r); - #endif /* __ARM_KVM_COPROC_LOCAL_H__ */ diff --git a/arch/arm/kvm/coproc_a15.c b/arch/arm/kvm/coproc_a15.c index e6f4ae48bda9..685063a6d0cf 100644 --- a/arch/arm/kvm/coproc_a15.c +++ b/arch/arm/kvm/coproc_a15.c @@ -17,24 +17,129 @@ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ #include -#include +#include +#include +#include #include +#include #include +static void reset_mpidr(struct kvm_vcpu *vcpu, const struct coproc_reg *r) +{ + /* + * Compute guest MPIDR: + * (Even if we present only one VCPU to the guest on an SMP + * host we don't set the U bit in the MPIDR, or vice versa, as + * revealing the underlying hardware properties is likely to + * be the best choice). + */ + vcpu->arch.cp15[c0_MPIDR] = (read_cpuid_mpidr() & ~MPIDR_LEVEL_MASK) + | (vcpu->vcpu_id & MPIDR_LEVEL_MASK); +} + #include "coproc.h" +/* A15 TRM 4.3.28: RO WI */ +static bool access_actlr(struct kvm_vcpu *vcpu, + const struct coproc_params *p, + const struct coproc_reg *r) +{ + if (p->is_write) + return ignore_write(vcpu, p); + + *vcpu_reg(vcpu, p->Rt1) = vcpu->arch.cp15[c1_ACTLR]; + return true; +} + +/* A15 TRM 4.3.60: R/O. */ +static bool access_cbar(struct kvm_vcpu *vcpu, + const struct coproc_params *p, + const struct coproc_reg *r) +{ + if (p->is_write) + return write_to_read_only(vcpu, p); + return read_zero(vcpu, p); +} + +/* A15 TRM 4.3.48: R/O WI. */ +static bool access_l2ctlr(struct kvm_vcpu *vcpu, + const struct coproc_params *p, + const struct coproc_reg *r) +{ + if (p->is_write) + return ignore_write(vcpu, p); + + *vcpu_reg(vcpu, p->Rt1) = vcpu->arch.cp15[c9_L2CTLR]; + return true; +} + +static void reset_l2ctlr(struct kvm_vcpu *vcpu, const struct coproc_reg *r) +{ + u32 l2ctlr, ncores; + + asm volatile("mrc p15, 1, %0, c9, c0, 2\n" : "=r" (l2ctlr)); + l2ctlr &= ~(3 << 24); + ncores = atomic_read(&vcpu->kvm->online_vcpus) - 1; + l2ctlr |= (ncores & 3) << 24; + + vcpu->arch.cp15[c9_L2CTLR] = l2ctlr; +} + +static void reset_actlr(struct kvm_vcpu *vcpu, const struct coproc_reg *r) +{ + u32 actlr; + + /* ACTLR contains SMP bit: make sure you create all cpus first! */ + asm volatile("mrc p15, 0, %0, c1, c0, 1\n" : "=r" (actlr)); + /* Make the SMP bit consistent with the guest configuration */ + if (atomic_read(&vcpu->kvm->online_vcpus) > 1) + actlr |= 1U << 6; + else + actlr &= ~(1U << 6); + + vcpu->arch.cp15[c1_ACTLR] = actlr; +} + +/* A15 TRM 4.3.49: R/O WI (even if NSACR.NS_L2ERR, a write of 1 is ignored). */ +static bool access_l2ectlr(struct kvm_vcpu *vcpu, + const struct coproc_params *p, + const struct coproc_reg *r) +{ + if (p->is_write) + return ignore_write(vcpu, p); + + *vcpu_reg(vcpu, p->Rt1) = 0; + return true; +} + /* * A15-specific CP15 registers. - * CRn denotes the primary register number, but is copied to the CRm in the - * user space API for 64-bit register access in line with the terminology used - * in the ARM ARM. - * Important: Must be sorted ascending by CRn, CRM, Op1, Op2 and with 64-bit - * registers preceding 32-bit ones. + * Important: Must be sorted ascending by CRn, CRM, Op1, Op2 */ static const struct coproc_reg a15_regs[] = { + /* MPIDR: we use VMPIDR for guest access. */ + { CRn( 0), CRm( 0), Op1( 0), Op2( 5), is32, + NULL, reset_mpidr, c0_MPIDR }, + /* SCTLR: swapped by interrupt.S. */ { CRn( 1), CRm( 0), Op1( 0), Op2( 0), is32, - access_sctlr, reset_val, c1_SCTLR, 0x00C50078 }, + NULL, reset_val, c1_SCTLR, 0x00C50078 }, + /* ACTLR: trapped by HCR.TAC bit. */ + { CRn( 1), CRm( 0), Op1( 0), Op2( 1), is32, + access_actlr, reset_actlr, c1_ACTLR }, + /* CPACR: swapped by interrupt.S. */ + { CRn( 1), CRm( 0), Op1( 0), Op2( 2), is32, + NULL, reset_val, c1_CPACR, 0x00000000 }, + + /* + * L2CTLR access (guest wants to know #CPUs). + */ + { CRn( 9), CRm( 0), Op1( 1), Op2( 2), is32, + access_l2ctlr, reset_l2ctlr, c9_L2CTLR }, + { CRn( 9), CRm( 0), Op1( 1), Op2( 3), is32, access_l2ectlr}, + + /* The Configuration Base Address Register. */ + { CRn(15), CRm( 0), Op1( 4), Op2( 0), is32, access_cbar}, }; static struct kvm_coproc_target_table a15_target_table = { @@ -45,6 +150,12 @@ static struct kvm_coproc_target_table a15_target_table = { static int __init coproc_a15_init(void) { + unsigned int i; + + for (i = 1; i < ARRAY_SIZE(a15_regs); i++) + BUG_ON(cmp_reg(&a15_regs[i-1], + &a15_regs[i]) >= 0); + kvm_register_target_coproc_table(&a15_target_table); return 0; } diff --git a/arch/arm/kvm/coproc_a7.c b/arch/arm/kvm/coproc_a7.c deleted file mode 100644 index 17fc7cd479d3..000000000000 --- a/arch/arm/kvm/coproc_a7.c +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Copyright (C) 2012 - Virtual Open Systems and Columbia University - * Copyright (C) 2013 - ARM Ltd - * - * Authors: Rusty Russell - * Christoffer Dall - * Jonathan Austin - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, version 2, as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. - */ -#include -#include -#include -#include - -#include "coproc.h" - -/* - * Cortex-A7 specific CP15 registers. - * CRn denotes the primary register number, but is copied to the CRm in the - * user space API for 64-bit register access in line with the terminology used - * in the ARM ARM. - * Important: Must be sorted ascending by CRn, CRM, Op1, Op2 and with 64-bit - * registers preceding 32-bit ones. - */ -static const struct coproc_reg a7_regs[] = { - /* SCTLR: swapped by interrupt.S. */ - { CRn( 1), CRm( 0), Op1( 0), Op2( 0), is32, - access_sctlr, reset_val, c1_SCTLR, 0x00C50878 }, -}; - -static struct kvm_coproc_target_table a7_target_table = { - .target = KVM_ARM_TARGET_CORTEX_A7, - .table = a7_regs, - .num = ARRAY_SIZE(a7_regs), -}; - -static int __init coproc_a7_init(void) -{ - kvm_register_target_coproc_table(&a7_target_table); - return 0; -} -late_initcall(coproc_a7_init); diff --git a/arch/arm/kvm/emulate.c b/arch/arm/kvm/emulate.c index d6c005283678..bdede9e7da51 100644 --- a/arch/arm/kvm/emulate.c +++ b/arch/arm/kvm/emulate.c @@ -354,7 +354,7 @@ static void inject_abt(struct kvm_vcpu *vcpu, bool is_pabt, unsigned long addr) *vcpu_pc(vcpu) = exc_vector_base(vcpu) + vect_offset; if (is_pabt) { - /* Set IFAR and IFSR */ + /* Set DFAR and DFSR */ vcpu->arch.cp15[c6_IFAR] = addr; is_lpae = (vcpu->arch.cp15[c2_TTBCR] >> 31); /* Always give debug fault for now - should give guest a clue */ diff --git a/arch/arm/kvm/guest.c b/arch/arm/kvm/guest.c index cc0b78769bd8..152d03612181 100644 --- a/arch/arm/kvm/guest.c +++ b/arch/arm/kvm/guest.c @@ -38,7 +38,6 @@ struct kvm_stats_debugfs_item debugfs_entries[] = { int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) { - vcpu->arch.hcr = HCR_GUEST_MASK; return 0; } @@ -110,73 +109,6 @@ int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) return -EINVAL; } -#ifndef CONFIG_KVM_ARM_TIMER - -#define NUM_TIMER_REGS 0 - -static int copy_timer_indices(struct kvm_vcpu *vcpu, u64 __user *uindices) -{ - return 0; -} - -static bool is_timer_reg(u64 index) -{ - return false; -} - -#else - -#define NUM_TIMER_REGS 3 - -static bool is_timer_reg(u64 index) -{ - switch (index) { - case KVM_REG_ARM_TIMER_CTL: - case KVM_REG_ARM_TIMER_CNT: - case KVM_REG_ARM_TIMER_CVAL: - return true; - } - return false; -} - -static int copy_timer_indices(struct kvm_vcpu *vcpu, u64 __user *uindices) -{ - if (put_user(KVM_REG_ARM_TIMER_CTL, uindices)) - return -EFAULT; - uindices++; - if (put_user(KVM_REG_ARM_TIMER_CNT, uindices)) - return -EFAULT; - uindices++; - if (put_user(KVM_REG_ARM_TIMER_CVAL, uindices)) - return -EFAULT; - - return 0; -} - -#endif - -static int set_timer_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg) -{ - void __user *uaddr = (void __user *)(long)reg->addr; - u64 val; - int ret; - - ret = copy_from_user(&val, uaddr, KVM_REG_SIZE(reg->id)); - if (ret != 0) - return -EFAULT; - - return kvm_arm_timer_set_reg(vcpu, reg->id, val); -} - -static int get_timer_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg) -{ - void __user *uaddr = (void __user *)(long)reg->addr; - u64 val; - - val = kvm_arm_timer_get_reg(vcpu, reg->id); - return copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id)); -} - static unsigned long num_core_regs(void) { return sizeof(struct kvm_regs) / sizeof(u32); @@ -189,8 +121,7 @@ static unsigned long num_core_regs(void) */ unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu) { - return num_core_regs() + kvm_arm_num_coproc_regs(vcpu) - + NUM_TIMER_REGS; + return num_core_regs() + kvm_arm_num_coproc_regs(vcpu); } /** @@ -202,7 +133,6 @@ int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices) { unsigned int i; const u64 core_reg = KVM_REG_ARM | KVM_REG_SIZE_U32 | KVM_REG_ARM_CORE; - int ret; for (i = 0; i < sizeof(struct kvm_regs)/sizeof(u32); i++) { if (put_user(core_reg | i, uindices)) @@ -210,11 +140,6 @@ int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices) uindices++; } - ret = copy_timer_indices(vcpu, uindices); - if (ret) - return ret; - uindices += NUM_TIMER_REGS; - return kvm_arm_copy_coproc_indices(vcpu, uindices); } @@ -228,9 +153,6 @@ int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg) if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_CORE) return get_core_reg(vcpu, reg); - if (is_timer_reg(reg->id)) - return get_timer_reg(vcpu, reg); - return kvm_arm_coproc_get_reg(vcpu, reg); } @@ -244,9 +166,6 @@ int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg) if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_CORE) return set_core_reg(vcpu, reg); - if (is_timer_reg(reg->id)) - return set_timer_reg(vcpu, reg); - return kvm_arm_coproc_set_reg(vcpu, reg); } @@ -264,9 +183,13 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, int __attribute_const__ kvm_target_cpu(void) { - switch (read_cpuid_part()) { - case ARM_CPU_PART_CORTEX_A7: - return KVM_ARM_TARGET_CORTEX_A7; + unsigned long implementor = read_cpuid_implementor(); + unsigned long part_number = read_cpuid_part_number(); + + if (implementor != ARM_CPU_IMP_ARM) + return -EINVAL; + + switch (part_number) { case ARM_CPU_PART_CORTEX_A15: return KVM_ARM_TARGET_CORTEX_A15; default: @@ -279,7 +202,7 @@ int kvm_vcpu_set_target(struct kvm_vcpu *vcpu, { unsigned int i; - /* We can only cope with guest==host and only on A15/A7 (for now). */ + /* We can only do a cortex A15 for now. */ if (init->target != kvm_target_cpu()) return -EINVAL; @@ -299,26 +222,6 @@ int kvm_vcpu_set_target(struct kvm_vcpu *vcpu, return kvm_reset_vcpu(vcpu); } -int kvm_vcpu_preferred_target(struct kvm_vcpu_init *init) -{ - int target = kvm_target_cpu(); - - if (target < 0) - return -ENODEV; - - memset(init, 0, sizeof(*init)); - - /* - * For now, we don't return any features. - * In future, we might use features to return target - * specific features available for the preferred - * target type. - */ - init->target = (__u32)target; - - return 0; -} - int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) { return -EINVAL; diff --git a/arch/arm/kvm/handle_exit.c b/arch/arm/kvm/handle_exit.c index 4c979d466cc1..3d74a0be47db 100644 --- a/arch/arm/kvm/handle_exit.c +++ b/arch/arm/kvm/handle_exit.c @@ -26,6 +26,8 @@ #include "trace.h" +#include "trace.h" + typedef int (*exit_handle_fn)(struct kvm_vcpu *, struct kvm_run *); static int handle_svc_hyp(struct kvm_vcpu *vcpu, struct kvm_run *run) @@ -38,22 +40,21 @@ static int handle_svc_hyp(struct kvm_vcpu *vcpu, struct kvm_run *run) static int handle_hvc(struct kvm_vcpu *vcpu, struct kvm_run *run) { - int ret; - trace_kvm_hvc(*vcpu_pc(vcpu), *vcpu_reg(vcpu, 0), kvm_vcpu_hvc_get_imm(vcpu)); - ret = kvm_psci_call(vcpu); - if (ret < 0) { - kvm_inject_undefined(vcpu); + if (kvm_psci_call(vcpu)) return 1; - } - return ret; + kvm_inject_undefined(vcpu); + return 1; } static int handle_smc(struct kvm_vcpu *vcpu, struct kvm_run *run) { + if (kvm_psci_call(vcpu)) + return 1; + kvm_inject_undefined(vcpu); return 1; } @@ -75,29 +76,23 @@ static int handle_dabt_hyp(struct kvm_vcpu *vcpu, struct kvm_run *run) } /** - * kvm_handle_wfx - handle a WFI or WFE instructions trapped in guests + * kvm_handle_wfi - handle a wait-for-interrupts instruction executed by a guest * @vcpu: the vcpu pointer * @run: the kvm_run structure pointer * - * WFE: Yield the CPU and come back to this vcpu when the scheduler - * decides to. - * WFI: Simply call kvm_vcpu_block(), which will halt execution of - * world-switches and schedule other host processes until there is an - * incoming IRQ or FIQ to the VM. + * Simply sets the wait_for_interrupts flag on the vcpu structure, which will + * halt execution of world-switches and schedule other host processes until + * there is an incoming IRQ or FIQ to the VM. */ -static int kvm_handle_wfx(struct kvm_vcpu *vcpu, struct kvm_run *run) +static int kvm_handle_wfi(struct kvm_vcpu *vcpu, struct kvm_run *run) { trace_kvm_wfi(*vcpu_pc(vcpu)); - if (kvm_vcpu_get_hsr(vcpu) & HSR_WFI_IS_WFE) - kvm_vcpu_on_spin(vcpu); - else - kvm_vcpu_block(vcpu); - + kvm_vcpu_block(vcpu); return 1; } static exit_handle_fn arm_exit_handlers[] = { - [HSR_EC_WFI] = kvm_handle_wfx, + [HSR_EC_WFI] = kvm_handle_wfi, [HSR_EC_CP15_32] = kvm_handle_cp15_32, [HSR_EC_CP15_64] = kvm_handle_cp15_64, [HSR_EC_CP14_MR] = kvm_handle_cp14_access, diff --git a/arch/arm/kvm/init.S b/arch/arm/kvm/init.S index 2cc14dfad049..f048338135f7 100644 --- a/arch/arm/kvm/init.S +++ b/arch/arm/kvm/init.S @@ -71,7 +71,7 @@ __do_hyp_init: bne phase2 @ Yes, second stage init @ Set the HTTBR to point to the hypervisor PGD pointer passed - mcrr p15, 4, rr_lo_hi(r2, r3), c2 + mcrr p15, 4, r2, r3, c2 @ Set the HTCR and VTCR to the same shareability and cacheability @ settings as the non-secure TTBCR and with T0SZ == 0. @@ -137,12 +137,12 @@ phase2: mov pc, r0 target: @ We're now in the trampoline code, switch page tables - mcrr p15, 4, rr_lo_hi(r2, r3), c2 + mcrr p15, 4, r2, r3, c2 isb @ Invalidate the old TLBs mcr p15, 4, r0, c8, c7, 0 @ TLBIALLH - dsb ish + dsb eret diff --git a/arch/arm/kvm/interrupts.S b/arch/arm/kvm/interrupts.S index d66d608f7ce7..f7793df62f58 100644 --- a/arch/arm/kvm/interrupts.S +++ b/arch/arm/kvm/interrupts.S @@ -49,13 +49,12 @@ __kvm_hyp_code_start: ENTRY(__kvm_tlb_flush_vmid_ipa) push {r2, r3} - dsb ishst add r0, r0, #KVM_VTTBR ldrd r2, r3, [r0] - mcrr p15, 6, rr_lo_hi(r2, r3), c2 @ Write VTTBR + mcrr p15, 6, r2, r3, c2 @ Write VTTBR isb mcr p15, 0, r0, c8, c3, 0 @ TLBIALLIS (rt ignored) - dsb ish + dsb isb mov r2, #0 mov r3, #0 @@ -79,7 +78,7 @@ ENTRY(__kvm_flush_vm_context) mcr p15, 4, r0, c8, c3, 4 /* Invalidate instruction caches Inner Shareable (ICIALLUIS) */ mcr p15, 0, r0, c7, c1, 0 - dsb ish + dsb isb @ Not necessary if followed by eret bx lr @@ -135,7 +134,7 @@ ENTRY(__kvm_vcpu_run) ldr r1, [vcpu, #VCPU_KVM] add r1, r1, #KVM_VTTBR ldrd r2, r3, [r1] - mcrr p15, 6, rr_lo_hi(r2, r3), c2 @ Write VTTBR + mcrr p15, 6, r2, r3, c2 @ Write VTTBR @ We're all done, just restore the GPRs and go to the guest restore_guest_regs @@ -159,9 +158,13 @@ __kvm_vcpu_return: @ Don't trap coprocessor accesses for host kernel set_hstr vmexit set_hdcr vmexit - set_hcptr vmexit, (HCPTR_TTA | HCPTR_TCP(10) | HCPTR_TCP(11)), after_vfp_restore + set_hcptr vmexit, (HCPTR_TTA | HCPTR_TCP(10) | HCPTR_TCP(11)) #ifdef CONFIG_VFPv3 + @ Save floating point registers we if let guest use them. + tst r2, #(HCPTR_TCP(10) | HCPTR_TCP(11)) + bne after_vfp_restore + @ Switch VFP/NEON hardware state to the host's add r7, vcpu, #VCPU_VFP_GUEST store_vfp_state r7 @@ -173,8 +176,6 @@ after_vfp_restore: @ Restore FPEXC_EN which we clobbered on entry pop {r2} VFPFMXR FPEXC, r2 -#else -after_vfp_restore: #endif @ Reset Hyp-role @@ -197,13 +198,8 @@ after_vfp_restore: restore_host_regs clrex @ Clear exclusive monitor -#ifndef CONFIG_CPU_ENDIAN_BE8 mov r0, r1 @ Return the return code mov r1, #0 @ Clear upper bits in return value -#else - @ r1 already has return code - mov r0, #0 @ Clear upper bits in return value -#endif /* CONFIG_CPU_ENDIAN_BE8 */ bx lr @ return to IOCTL /******************************************************************** @@ -223,10 +219,6 @@ after_vfp_restore: * in Hyp mode (see init_hyp_mode in arch/arm/kvm/arm.c). Return values are * passed in r0 and r1. * - * A function pointer with a value of 0xffffffff has a special meaning, - * and is used to implement __hyp_get_vectors in the same way as in - * arch/arm/kernel/hyp_stub.S. - * * The calling convention follows the standard AAPCS: * r0 - r3: caller save * r12: caller save @@ -299,7 +291,6 @@ THUMB( orr r2, r2, #PSR_T_BIT ) ldr r2, =BSYM(panic) msr ELR_hyp, r2 ldr r0, =\panic_str - clrex @ Clear exclusive monitor eret .endm @@ -370,11 +361,6 @@ hyp_hvc: host_switch_to_hyp: pop {r0, r1, r2} - /* Check for __hyp_get_vectors */ - cmp r0, #-1 - mrceq p15, 4, r0, c12, c0, 0 @ get HVBAR - beq 1f - push {lr} mrs lr, SPSR push {lr} @@ -390,7 +376,7 @@ THUMB( orr lr, #1) pop {lr} msr SPSR_csxf, lr pop {lr} -1: eret + eret guest_trap: load_vcpu @ Load VCPU pointer to r0 @@ -428,10 +414,6 @@ guest_trap: mrcne p15, 4, r2, c6, c0, 4 @ HPFAR bne 3f - /* Preserve PAR */ - mrrc p15, 0, r0, r1, c7 @ PAR - push {r0, r1} - /* Resolve IPA using the xFAR */ mcr p15, 0, r2, c7, c8, 0 @ ATS1CPR isb @@ -442,20 +424,13 @@ guest_trap: lsl r2, r2, #4 orr r2, r2, r1, lsl #24 - /* Restore PAR */ - pop {r0, r1} - mcrr p15, 0, r0, r1, c7 @ PAR - 3: load_vcpu @ Load VCPU pointer to r0 str r2, [r0, #VCPU_HPFAR] 1: mov r1, #ARM_EXCEPTION_HVC b __kvm_vcpu_return -4: pop {r0, r1} @ Failed translation, return to guest - mcrr p15, 0, r0, r1, c7 @ PAR - clrex - pop {r0, r1, r2} +4: pop {r0, r1, r2} @ Failed translation, return to guest eret /* @@ -470,7 +445,7 @@ switch_to_guest_vfp: push {r3-r7} @ NEON/VFP used. Turn on VFP access. - set_hcptr vmtrap, (HCPTR_TCP(10) | HCPTR_TCP(11)) + set_hcptr vmexit, (HCPTR_TCP(10) | HCPTR_TCP(11)) @ Switch VFP/NEON hardware state to the guest's add r7, r0, #VCPU_VFP_HOST @@ -481,7 +456,6 @@ switch_to_guest_vfp: pop {r3-r7} pop {r0-r2} - clrex eret #endif @@ -504,10 +478,10 @@ __kvm_hyp_code_end: .section ".rodata" und_die_str: - .ascii "unexpected undefined exception in Hyp mode at: %#08x\n" + .ascii "unexpected undefined exception in Hyp mode at: %#08x" pabt_die_str: - .ascii "unexpected prefetch abort in Hyp mode at: %#08x\n" + .ascii "unexpected prefetch abort in Hyp mode at: %#08x" dabt_die_str: - .ascii "unexpected data abort in Hyp mode at: %#08x\n" + .ascii "unexpected data abort in Hyp mode at: %#08x" svc_die_str: - .ascii "unexpected HVC/SVC trap in Hyp mode at: %#08x\n" + .ascii "unexpected HVC/SVC trap in Hyp mode at: %#08x" diff --git a/arch/arm/kvm/interrupts_head.S b/arch/arm/kvm/interrupts_head.S index f8f322102989..3c8f2f0b4c5e 100644 --- a/arch/arm/kvm/interrupts_head.S +++ b/arch/arm/kvm/interrupts_head.S @@ -1,5 +1,4 @@ #include -#include #define VCPU_USR_REG(_reg_nr) (VCPU_USR_REGS + (_reg_nr * 4)) #define VCPU_USR_SP (VCPU_USR_REG(13)) @@ -303,18 +302,11 @@ vcpu .req r0 @ vcpu pointer always in r0 .endif mrc p15, 0, r2, c14, c1, 0 @ CNTKCTL - mrrc p15, 0, r4, r5, c7 @ PAR - mrc p15, 0, r6, c10, c3, 0 @ AMAIR0 - mrc p15, 0, r7, c10, c3, 1 @ AMAIR1 .if \store_to_vcpu == 0 - push {r2,r4-r7} + push {r2} .else str r2, [vcpu, #CP15_OFFSET(c14_CNTKCTL)] - add r12, vcpu, #CP15_OFFSET(c7_PAR) - strd r4, r5, [r12] - str r6, [vcpu, #CP15_OFFSET(c10_AMAIR0)] - str r7, [vcpu, #CP15_OFFSET(c10_AMAIR1)] .endif .endm @@ -327,19 +319,12 @@ vcpu .req r0 @ vcpu pointer always in r0 */ .macro write_cp15_state read_from_vcpu .if \read_from_vcpu == 0 - pop {r2,r4-r7} + pop {r2} .else ldr r2, [vcpu, #CP15_OFFSET(c14_CNTKCTL)] - add r12, vcpu, #CP15_OFFSET(c7_PAR) - ldrd r4, r5, [r12] - ldr r6, [vcpu, #CP15_OFFSET(c10_AMAIR0)] - ldr r7, [vcpu, #CP15_OFFSET(c10_AMAIR1)] .endif mcr p15, 0, r2, c14, c1, 0 @ CNTKCTL - mcrr p15, 0, r4, r5, c7 @ PAR - mcr p15, 0, r6, c10, c3, 0 @ AMAIR0 - mcr p15, 0, r7, c10, c3, 1 @ AMAIR1 .if \read_from_vcpu == 0 pop {r2-r12} @@ -421,23 +406,15 @@ vcpu .req r0 @ vcpu pointer always in r0 ldr r8, [r2, #GICH_ELRSR0] ldr r9, [r2, #GICH_ELRSR1] ldr r10, [r2, #GICH_APR] -ARM_BE8(rev r3, r3 ) -ARM_BE8(rev r4, r4 ) -ARM_BE8(rev r5, r5 ) -ARM_BE8(rev r6, r6 ) -ARM_BE8(rev r7, r7 ) -ARM_BE8(rev r8, r8 ) -ARM_BE8(rev r9, r9 ) -ARM_BE8(rev r10, r10 ) - - str r3, [r11, #VGIC_V2_CPU_HCR] - str r4, [r11, #VGIC_V2_CPU_VMCR] - str r5, [r11, #VGIC_V2_CPU_MISR] - str r6, [r11, #VGIC_V2_CPU_EISR] - str r7, [r11, #(VGIC_V2_CPU_EISR + 4)] - str r8, [r11, #VGIC_V2_CPU_ELRSR] - str r9, [r11, #(VGIC_V2_CPU_ELRSR + 4)] - str r10, [r11, #VGIC_V2_CPU_APR] + + str r3, [r11, #VGIC_CPU_HCR] + str r4, [r11, #VGIC_CPU_VMCR] + str r5, [r11, #VGIC_CPU_MISR] + str r6, [r11, #VGIC_CPU_EISR] + str r7, [r11, #(VGIC_CPU_EISR + 4)] + str r8, [r11, #VGIC_CPU_ELRSR] + str r9, [r11, #(VGIC_CPU_ELRSR + 4)] + str r10, [r11, #VGIC_CPU_APR] /* Clear GICH_HCR */ mov r5, #0 @@ -445,10 +422,9 @@ ARM_BE8(rev r10, r10 ) /* Save list registers */ add r2, r2, #GICH_LR0 - add r3, r11, #VGIC_V2_CPU_LR + add r3, r11, #VGIC_CPU_LR ldr r4, [r11, #VGIC_CPU_NR_LR] 1: ldr r6, [r2], #4 -ARM_BE8(rev r6, r6 ) str r6, [r3], #4 subs r4, r4, #1 bne 1b @@ -473,12 +449,9 @@ ARM_BE8(rev r6, r6 ) add r11, vcpu, #VCPU_VGIC_CPU /* We only restore a minimal set of registers */ - ldr r3, [r11, #VGIC_V2_CPU_HCR] - ldr r4, [r11, #VGIC_V2_CPU_VMCR] - ldr r8, [r11, #VGIC_V2_CPU_APR] -ARM_BE8(rev r3, r3 ) -ARM_BE8(rev r4, r4 ) -ARM_BE8(rev r8, r8 ) + ldr r3, [r11, #VGIC_CPU_HCR] + ldr r4, [r11, #VGIC_CPU_VMCR] + ldr r8, [r11, #VGIC_CPU_APR] str r3, [r2, #GICH_HCR] str r4, [r2, #GICH_VMCR] @@ -486,10 +459,9 @@ ARM_BE8(rev r8, r8 ) /* Restore list registers */ add r2, r2, #GICH_LR0 - add r3, r11, #VGIC_V2_CPU_LR + add r3, r11, #VGIC_CPU_LR ldr r4, [r11, #VGIC_CPU_NR_LR] 1: ldr r6, [r3], #4 -ARM_BE8(rev r6, r6 ) str r6, [r2], #4 subs r4, r4, #1 bne 1b @@ -520,15 +492,11 @@ ARM_BE8(rev r6, r6 ) mcr p15, 0, r2, c14, c3, 1 @ CNTV_CTL isb - mrrc p15, 3, rr_lo_hi(r2, r3), c14 @ CNTV_CVAL + mrrc p15, 3, r2, r3, c14 @ CNTV_CVAL ldr r4, =VCPU_TIMER_CNTV_CVAL add r5, vcpu, r4 strd r2, r3, [r5] - @ Ensure host CNTVCT == CNTPCT - mov r2, #0 - mcrr p15, 4, r2, r2, c14 @ CNTVOFF - 1: #endif @ Allow physical timer/counter access for the host @@ -560,12 +528,12 @@ ARM_BE8(rev r6, r6 ) ldr r2, [r4, #KVM_TIMER_CNTVOFF] ldr r3, [r4, #(KVM_TIMER_CNTVOFF + 4)] - mcrr p15, 4, rr_lo_hi(r2, r3), c14 @ CNTVOFF + mcrr p15, 4, r2, r3, c14 @ CNTVOFF ldr r4, =VCPU_TIMER_CNTV_CVAL add r5, vcpu, r4 ldrd r2, r3, [r5] - mcrr p15, 3, rr_lo_hi(r2, r3), c14 @ CNTV_CVAL + mcrr p15, 3, r2, r3, c14 @ CNTV_CVAL isb ldr r2, [vcpu, #VCPU_TIMER_CNTV_CTL] @@ -592,13 +560,8 @@ ARM_BE8(rev r6, r6 ) .endm /* Configures the HCPTR (Hyp Coprocessor Trap Register) on entry/return - * (hardware reset value is 0). Keep previous value in r2. - * An ISB is emited on vmexit/vmtrap, but executed on vmexit only if - * VFP wasn't already enabled (always executed on vmtrap). - * If a label is specified with vmexit, it is branched to if VFP wasn't - * enabled. - */ -.macro set_hcptr operation, mask, label = none + * (hardware reset value is 0). Keep previous value in r2. */ +.macro set_hcptr operation, mask mrc p15, 4, r2, c1, c1, 2 ldr r3, =\mask .if \operation == vmentry @@ -607,17 +570,6 @@ ARM_BE8(rev r6, r6 ) bic r3, r2, r3 @ Don't trap defined coproc-accesses .endif mcr p15, 4, r3, c1, c1, 2 - .if \operation != vmentry - .if \operation == vmexit - tst r2, #(HCPTR_TCP(10) | HCPTR_TCP(11)) - beq 1f - .endif - isb - .if \label != none - b \label - .endif -1: - .endif .endm /* Configures the HDCR (Hyp Debug Configuration Register) on entry/return @@ -635,14 +587,17 @@ ARM_BE8(rev r6, r6 ) /* Enable/Disable: stage-2 trans., trap interrupts, trap wfi, trap smc */ .macro configure_hyp_role operation + mrc p15, 4, r2, c1, c1, 0 @ HCR + bic r2, r2, #HCR_VIRT_EXCP_MASK + ldr r3, =HCR_GUEST_MASK .if \operation == vmentry - ldr r2, [vcpu, #VCPU_HCR] + orr r2, r2, r3 ldr r3, [vcpu, #VCPU_IRQ_LINES] orr r2, r2, r3 .else - mov r2, #0 + bic r2, r2, r3 .endif - mcr p15, 4, r2, c1, c1, 0 @ HCR + mcr p15, 4, r2, c1, c1, 0 .endm .macro load_vcpu diff --git a/arch/arm/kvm/mmio.c b/arch/arm/kvm/mmio.c index 4cb5a93182e9..72a12f2171b2 100644 --- a/arch/arm/kvm/mmio.c +++ b/arch/arm/kvm/mmio.c @@ -23,68 +23,6 @@ #include "trace.h" -static void mmio_write_buf(char *buf, unsigned int len, unsigned long data) -{ - void *datap = NULL; - union { - u8 byte; - u16 hword; - u32 word; - u64 dword; - } tmp; - - switch (len) { - case 1: - tmp.byte = data; - datap = &tmp.byte; - break; - case 2: - tmp.hword = data; - datap = &tmp.hword; - break; - case 4: - tmp.word = data; - datap = &tmp.word; - break; - case 8: - tmp.dword = data; - datap = &tmp.dword; - break; - } - - memcpy(buf, datap, len); -} - -static unsigned long mmio_read_buf(char *buf, unsigned int len) -{ - unsigned long data = 0; - union { - u16 hword; - u32 word; - u64 dword; - } tmp; - - switch (len) { - case 1: - data = buf[0]; - break; - case 2: - memcpy(&tmp.hword, buf, len); - data = tmp.hword; - break; - case 4: - memcpy(&tmp.word, buf, len); - data = tmp.word; - break; - case 8: - memcpy(&tmp.dword, buf, len); - data = tmp.dword; - break; - } - - return data; -} - /** * kvm_handle_mmio_return -- Handle MMIO loads after user space emulation * @vcpu: The VCPU pointer @@ -95,27 +33,28 @@ static unsigned long mmio_read_buf(char *buf, unsigned int len) */ int kvm_handle_mmio_return(struct kvm_vcpu *vcpu, struct kvm_run *run) { - unsigned long data; + unsigned long *dest; unsigned int len; int mask; if (!run->mmio.is_write) { + dest = vcpu_reg(vcpu, vcpu->arch.mmio_decode.rt); + *dest = 0; + len = run->mmio.len; if (len > sizeof(unsigned long)) return -EINVAL; - data = mmio_read_buf(run->mmio.data, len); + memcpy(dest, run->mmio.data, len); + + trace_kvm_mmio(KVM_TRACE_MMIO_READ, len, run->mmio.phys_addr, + *((u64 *)run->mmio.data)); if (vcpu->arch.mmio_decode.sign_extend && len < sizeof(unsigned long)) { mask = 1U << ((len * 8) - 1); - data = (data ^ mask) - mask; + *dest = (*dest ^ mask) - mask; } - - trace_kvm_mmio(KVM_TRACE_MMIO_READ, len, run->mmio.phys_addr, - data); - data = vcpu_data_host_to_guest(vcpu, data, len); - *vcpu_reg(vcpu, vcpu->arch.mmio_decode.rt) = data; } return 0; @@ -124,8 +63,7 @@ int kvm_handle_mmio_return(struct kvm_vcpu *vcpu, struct kvm_run *run) static int decode_hsr(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, struct kvm_exit_mmio *mmio) { - unsigned long rt; - int len; + unsigned long rt, len; bool is_write, sign_extend; if (kvm_vcpu_dabt_isextabt(vcpu)) { @@ -148,6 +86,12 @@ static int decode_hsr(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, sign_extend = kvm_vcpu_dabt_issext(vcpu); rt = kvm_vcpu_dabt_get_rd(vcpu); + if (kvm_vcpu_reg_is_pc(vcpu, rt)) { + /* IO memory trying to read/write pc */ + kvm_inject_pabt(vcpu, kvm_vcpu_get_hfar(vcpu)); + return 1; + } + mmio->is_write = is_write; mmio->phys_addr = fault_ipa; mmio->len = len; @@ -166,7 +110,6 @@ int io_mem_abort(struct kvm_vcpu *vcpu, struct kvm_run *run, phys_addr_t fault_ipa) { struct kvm_exit_mmio mmio; - unsigned long data; unsigned long rt; int ret; @@ -187,15 +130,13 @@ int io_mem_abort(struct kvm_vcpu *vcpu, struct kvm_run *run, } rt = vcpu->arch.mmio_decode.rt; - data = vcpu_data_guest_to_host(vcpu, *vcpu_reg(vcpu, rt), mmio.len); - trace_kvm_mmio((mmio.is_write) ? KVM_TRACE_MMIO_WRITE : KVM_TRACE_MMIO_READ_UNSATISFIED, mmio.len, fault_ipa, - (mmio.is_write) ? data : 0); + (mmio.is_write) ? *vcpu_reg(vcpu, rt) : 0); if (mmio.is_write) - mmio_write_buf(mmio.data, mmio.len, data); + memcpy(mmio.data, vcpu_reg(vcpu, rt), mmio.len); if (vgic_handle_mmio(vcpu, run, &mmio)) return 1; diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c index eea03069161b..84ba67b982c0 100644 --- a/arch/arm/kvm/mmu.c +++ b/arch/arm/kvm/mmu.c @@ -19,7 +19,6 @@ #include #include #include -#include #include #include #include @@ -42,10 +41,6 @@ static unsigned long hyp_idmap_start; static unsigned long hyp_idmap_end; static phys_addr_t hyp_idmap_vector; -#define pgd_order get_order(PTRS_PER_PGD * sizeof(pgd_t)) - -#define kvm_pmd_huge(_x) (pmd_huge(_x) || pmd_trans_huge(_x)) - static void kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) { /* @@ -90,19 +85,9 @@ static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc) return p; } -static void clear_pgd_entry(struct kvm *kvm, pgd_t *pgd, phys_addr_t addr) -{ - pud_t *pud_table __maybe_unused = pud_offset(pgd, 0); - pgd_clear(pgd); - kvm_tlb_flush_vmid_ipa(kvm, addr); - pud_free(NULL, pud_table); - put_page(virt_to_page(pgd)); -} - static void clear_pud_entry(struct kvm *kvm, pud_t *pud, phys_addr_t addr) { pmd_t *pmd_table = pmd_offset(pud, 0); - VM_BUG_ON(pud_huge(*pud)); pud_clear(pud); kvm_tlb_flush_vmid_ipa(kvm, addr); pmd_free(NULL, pmd_table); @@ -112,186 +97,73 @@ static void clear_pud_entry(struct kvm *kvm, pud_t *pud, phys_addr_t addr) static void clear_pmd_entry(struct kvm *kvm, pmd_t *pmd, phys_addr_t addr) { pte_t *pte_table = pte_offset_kernel(pmd, 0); - VM_BUG_ON(kvm_pmd_huge(*pmd)); pmd_clear(pmd); kvm_tlb_flush_vmid_ipa(kvm, addr); pte_free_kernel(NULL, pte_table); put_page(virt_to_page(pmd)); } -static void unmap_ptes(struct kvm *kvm, pmd_t *pmd, - phys_addr_t addr, phys_addr_t end) +static bool pmd_empty(pmd_t *pmd) { - phys_addr_t start_addr = addr; - pte_t *pte, *start_pte; - - start_pte = pte = pte_offset_kernel(pmd, addr); - do { - if (!pte_none(*pte)) { - kvm_set_pte(pte, __pte(0)); - put_page(virt_to_page(pte)); - kvm_tlb_flush_vmid_ipa(kvm, addr); - } - } while (pte++, addr += PAGE_SIZE, addr != end); - - if (kvm_pte_table_empty(start_pte)) - clear_pmd_entry(kvm, pmd, start_addr); + struct page *pmd_page = virt_to_page(pmd); + return page_count(pmd_page) == 1; } -static void unmap_pmds(struct kvm *kvm, pud_t *pud, - phys_addr_t addr, phys_addr_t end) +static void clear_pte_entry(struct kvm *kvm, pte_t *pte, phys_addr_t addr) { - phys_addr_t next, start_addr = addr; - pmd_t *pmd, *start_pmd; - - start_pmd = pmd = pmd_offset(pud, addr); - do { - next = kvm_pmd_addr_end(addr, end); - if (!pmd_none(*pmd)) { - if (kvm_pmd_huge(*pmd)) { - pmd_clear(pmd); - kvm_tlb_flush_vmid_ipa(kvm, addr); - put_page(virt_to_page(pmd)); - } else { - unmap_ptes(kvm, pmd, addr, next); - } - } - } while (pmd++, addr = next, addr != end); - - if (kvm_pmd_table_empty(start_pmd)) - clear_pud_entry(kvm, pud, start_addr); + if (pte_present(*pte)) { + kvm_set_pte(pte, __pte(0)); + put_page(virt_to_page(pte)); + kvm_tlb_flush_vmid_ipa(kvm, addr); + } } -static void unmap_puds(struct kvm *kvm, pgd_t *pgd, - phys_addr_t addr, phys_addr_t end) +static bool pte_empty(pte_t *pte) { - phys_addr_t next, start_addr = addr; - pud_t *pud, *start_pud; - - start_pud = pud = pud_offset(pgd, addr); - do { - next = kvm_pud_addr_end(addr, end); - if (!pud_none(*pud)) { - if (pud_huge(*pud)) { - pud_clear(pud); - kvm_tlb_flush_vmid_ipa(kvm, addr); - put_page(virt_to_page(pud)); - } else { - unmap_pmds(kvm, pud, addr, next); - } - } - } while (pud++, addr = next, addr != end); - - if (kvm_pud_table_empty(start_pud)) - clear_pgd_entry(kvm, pgd, start_addr); + struct page *pte_page = virt_to_page(pte); + return page_count(pte_page) == 1; } - static void unmap_range(struct kvm *kvm, pgd_t *pgdp, - phys_addr_t start, u64 size) + unsigned long long start, u64 size) { pgd_t *pgd; - phys_addr_t addr = start, end = start + size; - phys_addr_t next; - - pgd = pgdp + pgd_index(addr); - do { - next = kvm_pgd_addr_end(addr, end); - unmap_puds(kvm, pgd, addr, next); - } while (pgd++, addr = next, addr != end); -} - -static void stage2_flush_ptes(struct kvm *kvm, pmd_t *pmd, - phys_addr_t addr, phys_addr_t end) -{ + pud_t *pud; + pmd_t *pmd; pte_t *pte; + unsigned long long addr = start, end = start + size; + u64 range; - pte = pte_offset_kernel(pmd, addr); - do { - if (!pte_none(*pte)) { - hva_t hva = gfn_to_hva(kvm, addr >> PAGE_SHIFT); - kvm_flush_dcache_to_poc((void*)hva, PAGE_SIZE); + while (addr < end) { + pgd = pgdp + pgd_index(addr); + pud = pud_offset(pgd, addr); + if (pud_none(*pud)) { + addr += PUD_SIZE; + continue; } - } while (pte++, addr += PAGE_SIZE, addr != end); -} - -static void stage2_flush_pmds(struct kvm *kvm, pud_t *pud, - phys_addr_t addr, phys_addr_t end) -{ - pmd_t *pmd; - phys_addr_t next; - pmd = pmd_offset(pud, addr); - do { - next = kvm_pmd_addr_end(addr, end); - if (!pmd_none(*pmd)) { - if (kvm_pmd_huge(*pmd)) { - hva_t hva = gfn_to_hva(kvm, addr >> PAGE_SHIFT); - kvm_flush_dcache_to_poc((void*)hva, PMD_SIZE); - } else { - stage2_flush_ptes(kvm, pmd, addr, next); - } + pmd = pmd_offset(pud, addr); + if (pmd_none(*pmd)) { + addr += PMD_SIZE; + continue; } - } while (pmd++, addr = next, addr != end); -} - -static void stage2_flush_puds(struct kvm *kvm, pgd_t *pgd, - phys_addr_t addr, phys_addr_t end) -{ - pud_t *pud; - phys_addr_t next; - pud = pud_offset(pgd, addr); - do { - next = kvm_pud_addr_end(addr, end); - if (!pud_none(*pud)) { - if (pud_huge(*pud)) { - hva_t hva = gfn_to_hva(kvm, addr >> PAGE_SHIFT); - kvm_flush_dcache_to_poc((void*)hva, PUD_SIZE); - } else { - stage2_flush_pmds(kvm, pud, addr, next); + pte = pte_offset_kernel(pmd, addr); + clear_pte_entry(kvm, pte, addr); + range = PAGE_SIZE; + + /* If we emptied the pte, walk back up the ladder */ + if (pte_empty(pte)) { + clear_pmd_entry(kvm, pmd, addr); + range = PMD_SIZE; + if (pmd_empty(pmd)) { + clear_pud_entry(kvm, pud, addr); + range = PUD_SIZE; } } - } while (pud++, addr = next, addr != end); -} - -static void stage2_flush_memslot(struct kvm *kvm, - struct kvm_memory_slot *memslot) -{ - phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT; - phys_addr_t end = addr + PAGE_SIZE * memslot->npages; - phys_addr_t next; - pgd_t *pgd; - - pgd = kvm->arch.pgd + pgd_index(addr); - do { - next = kvm_pgd_addr_end(addr, end); - stage2_flush_puds(kvm, pgd, addr, next); - } while (pgd++, addr = next, addr != end); -} -/** - * stage2_flush_vm - Invalidate cache for pages mapped in stage 2 - * @kvm: The struct kvm pointer - * - * Go through the stage 2 page tables and invalidate any cache lines - * backing memory already mapped to the VM. - */ -void stage2_flush_vm(struct kvm *kvm) -{ - struct kvm_memslots *slots; - struct kvm_memory_slot *memslot; - int idx; - - idx = srcu_read_lock(&kvm->srcu); - spin_lock(&kvm->mmu_lock); - - slots = kvm_memslots(kvm); - kvm_for_each_memslot(memslot, slots) - stage2_flush_memslot(kvm, memslot); - - spin_unlock(&kvm->mmu_lock); - srcu_read_unlock(&kvm->srcu, idx); + addr += range; + } } /** @@ -306,14 +178,14 @@ void free_boot_hyp_pgd(void) if (boot_hyp_pgd) { unmap_range(NULL, boot_hyp_pgd, hyp_idmap_start, PAGE_SIZE); unmap_range(NULL, boot_hyp_pgd, TRAMPOLINE_VA, PAGE_SIZE); - free_pages((unsigned long)boot_hyp_pgd, pgd_order); + kfree(boot_hyp_pgd); boot_hyp_pgd = NULL; } if (hyp_pgd) unmap_range(NULL, hyp_pgd, TRAMPOLINE_VA, PAGE_SIZE); - free_page((unsigned long)init_bounce_page); + kfree(init_bounce_page); init_bounce_page = NULL; mutex_unlock(&kvm_hyp_pgd_mutex); @@ -343,7 +215,7 @@ void free_hyp_pgds(void) for (addr = VMALLOC_START; is_vmalloc_addr((void*)addr); addr += PGDIR_SIZE) unmap_range(NULL, hyp_pgd, KERN_TO_HYP(addr), PGDIR_SIZE); - free_pages((unsigned long)hyp_pgd, pgd_order); + kfree(hyp_pgd); hyp_pgd = NULL; } @@ -441,17 +313,6 @@ out: return err; } -static phys_addr_t kvm_kaddr_to_phys(void *kaddr) -{ - if (!is_vmalloc_addr(kaddr)) { - BUG_ON(!virt_addr_valid(kaddr)); - return __pa(kaddr); - } else { - return page_to_phys(vmalloc_to_page(kaddr)) + - offset_in_page(kaddr); - } -} - /** * create_hyp_mappings - duplicate a kernel virtual address range in Hyp mode * @from: The virtual kernel start address of the range @@ -463,27 +324,16 @@ static phys_addr_t kvm_kaddr_to_phys(void *kaddr) */ int create_hyp_mappings(void *from, void *to) { - phys_addr_t phys_addr; - unsigned long virt_addr; + unsigned long phys_addr = virt_to_phys(from); unsigned long start = KERN_TO_HYP((unsigned long)from); unsigned long end = KERN_TO_HYP((unsigned long)to); - start = start & PAGE_MASK; - end = PAGE_ALIGN(end); - - for (virt_addr = start; virt_addr < end; virt_addr += PAGE_SIZE) { - int err; - - phys_addr = kvm_kaddr_to_phys(from + virt_addr - start); - err = __create_hyp_mappings(hyp_pgd, virt_addr, - virt_addr + PAGE_SIZE, - __phys_to_pfn(phys_addr), - PAGE_HYP); - if (err) - return err; - } + /* Check for a valid kernel memory mapping */ + if (!virt_addr_valid(from) || !virt_addr_valid(to - 1)) + return -EINVAL; - return 0; + return __create_hyp_mappings(hyp_pgd, start, end, + __phys_to_pfn(phys_addr), PAGE_HYP); } /** @@ -532,6 +382,9 @@ int kvm_alloc_stage2_pgd(struct kvm *kvm) if (!pgd) return -ENOMEM; + /* stage-2 pgd must be aligned to its size */ + VM_BUG_ON((unsigned long)pgd & (S2_PGD_SIZE - 1)); + memset(pgd, 0, PTRS_PER_S2_PGD * sizeof(pgd_t)); kvm_clean_pgd(pgd); kvm->arch.pgd = pgd; @@ -576,71 +429,29 @@ void kvm_free_stage2_pgd(struct kvm *kvm) kvm->arch.pgd = NULL; } -static pmd_t *stage2_get_pmd(struct kvm *kvm, struct kvm_mmu_memory_cache *cache, - phys_addr_t addr) + +static int stage2_set_pte(struct kvm *kvm, struct kvm_mmu_memory_cache *cache, + phys_addr_t addr, const pte_t *new_pte, bool iomap) { pgd_t *pgd; pud_t *pud; pmd_t *pmd; + pte_t *pte, old_pte; + /* Create 2nd stage page table mapping - Level 1 */ pgd = kvm->arch.pgd + pgd_index(addr); pud = pud_offset(pgd, addr); if (pud_none(*pud)) { if (!cache) - return NULL; + return 0; /* ignore calls from kvm_set_spte_hva */ pmd = mmu_memory_cache_alloc(cache); pud_populate(NULL, pud, pmd); get_page(virt_to_page(pud)); } - return pmd_offset(pud, addr); -} - -static int stage2_set_pmd_huge(struct kvm *kvm, struct kvm_mmu_memory_cache - *cache, phys_addr_t addr, const pmd_t *new_pmd) -{ - pmd_t *pmd, old_pmd; - - pmd = stage2_get_pmd(kvm, cache, addr); - VM_BUG_ON(!pmd); - - /* - * Mapping in huge pages should only happen through a fault. If a - * page is merged into a transparent huge page, the individual - * subpages of that huge page should be unmapped through MMU - * notifiers before we get here. - * - * Merging of CompoundPages is not supported; they should become - * splitting first, unmapped, merged, and mapped back in on-demand. - */ - VM_BUG_ON(pmd_present(*pmd) && pmd_pfn(*pmd) != pmd_pfn(*new_pmd)); - - old_pmd = *pmd; - kvm_set_pmd(pmd, *new_pmd); - if (pmd_present(old_pmd)) - kvm_tlb_flush_vmid_ipa(kvm, addr); - else - get_page(virt_to_page(pmd)); - return 0; -} - -static int stage2_set_pte(struct kvm *kvm, struct kvm_mmu_memory_cache *cache, - phys_addr_t addr, const pte_t *new_pte, bool iomap) -{ - pmd_t *pmd; - pte_t *pte, old_pte; - - /* Create stage-2 page table mapping - Level 1 */ - pmd = stage2_get_pmd(kvm, cache, addr); - if (!pmd) { - /* - * Ignore calls from kvm_set_spte_hva for unallocated - * address ranges. - */ - return 0; - } + pmd = pmd_offset(pud, addr); - /* Create stage-2 page mappings - Level 2 */ + /* Create 2nd stage page table mapping - Level 2 */ if (pmd_none(*pmd)) { if (!cache) return 0; /* ignore calls from kvm_set_spte_hva */ @@ -687,6 +498,7 @@ int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa, for (addr = guest_ipa; addr < end; addr += PAGE_SIZE) { pte_t pte = pfn_pte(pfn, PAGE_S2_DEVICE); + kvm_set_s2pte_writable(&pte); ret = mmu_topup_memory_cache(&cache, 2, 2); if (ret) @@ -705,97 +517,23 @@ out: return ret; } -static bool transparent_hugepage_adjust(pfn_t *pfnp, phys_addr_t *ipap) -{ - pfn_t pfn = *pfnp; - gfn_t gfn = *ipap >> PAGE_SHIFT; - - if (PageTransCompound(pfn_to_page(pfn))) { - unsigned long mask; - /* - * The address we faulted on is backed by a transparent huge - * page. However, because we map the compound huge page and - * not the individual tail page, we need to transfer the - * refcount to the head page. We have to be careful that the - * THP doesn't start to split while we are adjusting the - * refcounts. - * - * We are sure this doesn't happen, because mmu_notifier_retry - * was successful and we are holding the mmu_lock, so if this - * THP is trying to split, it will be blocked in the mmu - * notifier before touching any of the pages, specifically - * before being able to call __split_huge_page_refcount(). - * - * We can therefore safely transfer the refcount from PG_tail - * to PG_head and switch the pfn from a tail page to the head - * page accordingly. - */ - mask = PTRS_PER_PMD - 1; - VM_BUG_ON((gfn & mask) != (pfn & mask)); - if (pfn & mask) { - *ipap &= PMD_MASK; - kvm_release_pfn_clean(pfn); - pfn &= ~mask; - kvm_get_pfn(pfn); - *pfnp = pfn; - } - - return true; - } - - return false; -} - -static bool kvm_is_write_fault(struct kvm_vcpu *vcpu) -{ - if (kvm_vcpu_trap_is_iabt(vcpu)) - return false; - - return kvm_vcpu_dabt_iswrite(vcpu); -} - static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, - struct kvm_memory_slot *memslot, unsigned long hva, + gfn_t gfn, struct kvm_memory_slot *memslot, unsigned long fault_status) { + pte_t new_pte; + pfn_t pfn; int ret; - bool write_fault, writable, hugetlb = false, force_pte = false; + bool write_fault, writable; unsigned long mmu_seq; - gfn_t gfn = fault_ipa >> PAGE_SHIFT; - struct kvm *kvm = vcpu->kvm; struct kvm_mmu_memory_cache *memcache = &vcpu->arch.mmu_page_cache; - struct vm_area_struct *vma; - pfn_t pfn; - pgprot_t mem_type = PAGE_S2; - write_fault = kvm_is_write_fault(vcpu); + write_fault = kvm_is_write_fault(kvm_vcpu_get_hsr(vcpu)); if (fault_status == FSC_PERM && !write_fault) { kvm_err("Unexpected L2 read permission error\n"); return -EFAULT; } - /* Let's check if we will get back a huge page backed by hugetlbfs */ - down_read(¤t->mm->mmap_sem); - vma = find_vma_intersection(current->mm, hva, hva + 1); - if (is_vm_hugetlb_page(vma)) { - hugetlb = true; - gfn = (fault_ipa & PMD_MASK) >> PAGE_SHIFT; - } else { - /* - * Pages belonging to memslots that don't have the same - * alignment for userspace and IPA cannot be mapped using - * block descriptors even if the pages belong to a THP for - * the process, because the stage-2 block descriptor will - * cover more than a single THP and we loose atomicity for - * unmapping, updates, and splits of the THP or other pages - * in the stage-2 block range. - */ - if ((memslot->userspace_addr & ~PMD_MASK) != - ((memslot->base_gfn << PAGE_SHIFT) & ~PMD_MASK)) - force_pte = true; - } - up_read(¤t->mm->mmap_sem); - /* We need minimum second+third level pages */ ret = mmu_topup_memory_cache(memcache, 2, KVM_NR_MEM_OBJS); if (ret) @@ -813,44 +551,26 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, */ smp_rmb(); - pfn = gfn_to_pfn_prot(kvm, gfn, write_fault, &writable); + pfn = gfn_to_pfn_prot(vcpu->kvm, gfn, write_fault, &writable); if (is_error_pfn(pfn)) return -EFAULT; - if (kvm_is_mmio_pfn(pfn)) - mem_type = PAGE_S2_DEVICE; + new_pte = pfn_pte(pfn, PAGE_S2); + coherent_icache_guest_page(vcpu->kvm, gfn); - spin_lock(&kvm->mmu_lock); - if (mmu_notifier_retry(kvm, mmu_seq)) + spin_lock(&vcpu->kvm->mmu_lock); + if (mmu_notifier_retry(vcpu->kvm, mmu_seq)) goto out_unlock; - if (!hugetlb && !force_pte) - hugetlb = transparent_hugepage_adjust(&pfn, &fault_ipa); - - if (hugetlb) { - pmd_t new_pmd = pfn_pmd(pfn, mem_type); - new_pmd = pmd_mkhuge(new_pmd); - if (writable) { - kvm_set_s2pmd_writable(&new_pmd); - kvm_set_pfn_dirty(pfn); - } - coherent_cache_guest_page(vcpu, hva & PMD_MASK, PMD_SIZE); - ret = stage2_set_pmd_huge(kvm, memcache, fault_ipa, &new_pmd); - } else { - pte_t new_pte = pfn_pte(pfn, mem_type); - if (writable) { - kvm_set_s2pte_writable(&new_pte); - kvm_set_pfn_dirty(pfn); - } - coherent_cache_guest_page(vcpu, hva, PAGE_SIZE); - ret = stage2_set_pte(kvm, memcache, fault_ipa, &new_pte, - mem_type == PAGE_S2_DEVICE); + if (writable) { + kvm_set_s2pte_writable(&new_pte); + kvm_set_pfn_dirty(pfn); } - + stage2_set_pte(vcpu->kvm, memcache, fault_ipa, &new_pte, false); out_unlock: - spin_unlock(&kvm->mmu_lock); + spin_unlock(&vcpu->kvm->mmu_lock); kvm_release_pfn_clean(pfn); - return ret; + return 0; } /** @@ -870,8 +590,7 @@ int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run) unsigned long fault_status; phys_addr_t fault_ipa; struct kvm_memory_slot *memslot; - unsigned long hva; - bool is_iabt, write_fault, writable; + bool is_iabt; gfn_t gfn; int ret, idx; @@ -882,22 +601,17 @@ int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run) kvm_vcpu_get_hfar(vcpu), fault_ipa); /* Check the stage-2 fault is trans. fault or write fault */ - fault_status = kvm_vcpu_trap_get_fault_type(vcpu); + fault_status = kvm_vcpu_trap_get_fault(vcpu); if (fault_status != FSC_FAULT && fault_status != FSC_PERM) { - kvm_err("Unsupported FSC: EC=%#x xFSC=%#lx ESR_EL2=%#lx\n", - kvm_vcpu_trap_get_class(vcpu), - (unsigned long)kvm_vcpu_trap_get_fault(vcpu), - (unsigned long)kvm_vcpu_get_hsr(vcpu)); + kvm_err("Unsupported fault status: EC=%#x DFCS=%#lx\n", + kvm_vcpu_trap_get_class(vcpu), fault_status); return -EFAULT; } idx = srcu_read_lock(&vcpu->kvm->srcu); gfn = fault_ipa >> PAGE_SHIFT; - memslot = gfn_to_memslot(vcpu->kvm, gfn); - hva = gfn_to_hva_memslot_prot(memslot, gfn, &writable); - write_fault = kvm_is_write_fault(vcpu); - if (kvm_is_error_hva(hva) || (write_fault && !writable)) { + if (!kvm_is_visible_gfn(vcpu->kvm, gfn)) { if (is_iabt) { /* Prefetch Abort on I/O address */ kvm_inject_pabt(vcpu, kvm_vcpu_get_hfar(vcpu)); @@ -905,6 +619,13 @@ int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run) goto out_unlock; } + if (fault_status != FSC_FAULT) { + kvm_err("Unsupported fault status on io memory: %#lx\n", + fault_status); + ret = -EFAULT; + goto out_unlock; + } + /* * The IPA is reported as [MAX:12], so we need to * complement it with the bottom 12 bits from the @@ -916,7 +637,9 @@ int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run) goto out_unlock; } - ret = user_mem_abort(vcpu, fault_ipa, memslot, hva, fault_status); + memslot = gfn_to_memslot(vcpu->kvm, gfn); + + ret = user_mem_abort(vcpu, fault_ipa, gfn, memslot, fault_status); if (ret == 0) ret = 1; out_unlock: @@ -1034,9 +757,9 @@ int kvm_mmu_init(void) { int err; - hyp_idmap_start = kvm_virt_to_phys(__hyp_idmap_text_start); - hyp_idmap_end = kvm_virt_to_phys(__hyp_idmap_text_end); - hyp_idmap_vector = kvm_virt_to_phys(__kvm_hyp_init); + hyp_idmap_start = virt_to_phys(__hyp_idmap_text_start); + hyp_idmap_end = virt_to_phys(__hyp_idmap_text_end); + hyp_idmap_vector = virt_to_phys(__kvm_hyp_init); if ((hyp_idmap_start ^ hyp_idmap_end) & PAGE_MASK) { /* @@ -1046,7 +769,7 @@ int kvm_mmu_init(void) size_t len = __hyp_idmap_text_end - __hyp_idmap_text_start; phys_addr_t phys_base; - init_bounce_page = (void *)__get_free_page(GFP_KERNEL); + init_bounce_page = kmalloc(PAGE_SIZE, GFP_KERNEL); if (!init_bounce_page) { kvm_err("Couldn't allocate HYP init bounce page\n"); err = -ENOMEM; @@ -1063,7 +786,7 @@ int kvm_mmu_init(void) */ kvm_flush_dcache_to_poc(init_bounce_page, len); - phys_base = kvm_virt_to_phys(init_bounce_page); + phys_base = virt_to_phys(init_bounce_page); hyp_idmap_vector += phys_base - hyp_idmap_start; hyp_idmap_start = phys_base; hyp_idmap_end = phys_base + len; @@ -1072,9 +795,8 @@ int kvm_mmu_init(void) (unsigned long)phys_base); } - hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, pgd_order); - boot_hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, pgd_order); - + hyp_pgd = kzalloc(PTRS_PER_PGD * sizeof(pgd_t), GFP_KERNEL); + boot_hyp_pgd = kzalloc(PTRS_PER_PGD * sizeof(pgd_t), GFP_KERNEL); if (!hyp_pgd || !boot_hyp_pgd) { kvm_err("Hyp mode PGD not allocated\n"); err = -ENOMEM; @@ -1120,49 +842,3 @@ out: free_hyp_pgds(); return err; } - -void kvm_arch_commit_memory_region(struct kvm *kvm, - struct kvm_userspace_memory_region *mem, - const struct kvm_memory_slot *old, - enum kvm_mr_change change) -{ - gpa_t gpa = old->base_gfn << PAGE_SHIFT; - phys_addr_t size = old->npages << PAGE_SHIFT; - if (change == KVM_MR_DELETE || change == KVM_MR_MOVE) { - spin_lock(&kvm->mmu_lock); - unmap_stage2_range(kvm, gpa, size); - spin_unlock(&kvm->mmu_lock); - } -} - -int kvm_arch_prepare_memory_region(struct kvm *kvm, - struct kvm_memory_slot *memslot, - struct kvm_userspace_memory_region *mem, - enum kvm_mr_change change) -{ - return 0; -} - -void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free, - struct kvm_memory_slot *dont) -{ -} - -int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot, - unsigned long npages) -{ - return 0; -} - -void kvm_arch_memslots_updated(struct kvm *kvm) -{ -} - -void kvm_arch_flush_shadow_all(struct kvm *kvm) -{ -} - -void kvm_arch_flush_shadow_memslot(struct kvm *kvm, - struct kvm_memory_slot *slot) -{ -} diff --git a/arch/arm/kvm/psci.c b/arch/arm/kvm/psci.c index 09cf37737ee2..7ee5bb7a3667 100644 --- a/arch/arm/kvm/psci.c +++ b/arch/arm/kvm/psci.c @@ -18,7 +18,6 @@ #include #include -#include #include #include @@ -27,36 +26,6 @@ * as described in ARM document number ARM DEN 0022A. */ -#define AFFINITY_MASK(level) ~((0x1UL << ((level) * MPIDR_LEVEL_BITS)) - 1) - -static unsigned long psci_affinity_mask(unsigned long affinity_level) -{ - if (affinity_level <= 3) - return MPIDR_HWID_BITMASK & AFFINITY_MASK(affinity_level); - - return 0; -} - -static unsigned long kvm_psci_vcpu_suspend(struct kvm_vcpu *vcpu) -{ - /* - * NOTE: For simplicity, we make VCPU suspend emulation to be - * same-as WFI (Wait-for-interrupt) emulation. - * - * This means for KVM the wakeup events are interrupts and - * this is consistent with intended use of StateID as described - * in section 5.4.1 of PSCI v0.2 specification (ARM DEN 0022A). - * - * Further, we also treat power-down request to be same as - * stand-by request as-per section 5.4.2 clause 3 of PSCI v0.2 - * specification (ARM DEN 0022A). This means all suspend states - * for KVM will preserve the register state. - */ - kvm_vcpu_block(vcpu); - - return PSCI_RET_SUCCESS; -} - static void kvm_psci_vcpu_off(struct kvm_vcpu *vcpu) { vcpu->arch.pause = true; @@ -65,41 +34,25 @@ static void kvm_psci_vcpu_off(struct kvm_vcpu *vcpu) static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu) { struct kvm *kvm = source_vcpu->kvm; - struct kvm_vcpu *vcpu = NULL, *tmp; + struct kvm_vcpu *vcpu; wait_queue_head_t *wq; unsigned long cpu_id; - unsigned long context_id; - unsigned long mpidr; phys_addr_t target_pc; - int i; cpu_id = *vcpu_reg(source_vcpu, 1); if (vcpu_mode_is_32bit(source_vcpu)) cpu_id &= ~((u32) 0); - kvm_for_each_vcpu(i, tmp, kvm) { - mpidr = kvm_vcpu_get_mpidr(tmp); - if ((mpidr & MPIDR_HWID_BITMASK) == (cpu_id & MPIDR_HWID_BITMASK)) { - vcpu = tmp; - break; - } - } - - /* - * Make sure the caller requested a valid CPU and that the CPU is - * turned off. - */ - if (!vcpu) - return PSCI_RET_INVALID_PARAMS; - if (!vcpu->arch.pause) { - if (kvm_psci_version(source_vcpu) != KVM_ARM_PSCI_0_1) - return PSCI_RET_ALREADY_ON; - else - return PSCI_RET_INVALID_PARAMS; - } + if (cpu_id >= atomic_read(&kvm->online_vcpus)) + return KVM_PSCI_RET_INVAL; target_pc = *vcpu_reg(source_vcpu, 2); - context_id = *vcpu_reg(source_vcpu, 3); + + vcpu = kvm_get_vcpu(kvm, cpu_id); + + wq = kvm_arch_vcpu_wq(vcpu); + if (!waitqueue_active(wq)) + return KVM_PSCI_RET_INVAL; kvm_reset_vcpu(vcpu); @@ -109,165 +62,26 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu) vcpu_set_thumb(vcpu); } - /* Propagate caller endianness */ - if (kvm_vcpu_is_be(source_vcpu)) - kvm_vcpu_set_be(vcpu); - *vcpu_pc(vcpu) = target_pc; - /* - * NOTE: We always update r0 (or x0) because for PSCI v0.1 - * the general puspose registers are undefined upon CPU_ON. - */ - *vcpu_reg(vcpu, 0) = context_id; vcpu->arch.pause = false; smp_mb(); /* Make sure the above is visible */ - wq = kvm_arch_vcpu_wq(vcpu); wake_up_interruptible(wq); - return PSCI_RET_SUCCESS; -} - -static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu) -{ - int i; - unsigned long mpidr; - unsigned long target_affinity; - unsigned long target_affinity_mask; - unsigned long lowest_affinity_level; - struct kvm *kvm = vcpu->kvm; - struct kvm_vcpu *tmp; - - target_affinity = *vcpu_reg(vcpu, 1); - lowest_affinity_level = *vcpu_reg(vcpu, 2); - - /* Determine target affinity mask */ - target_affinity_mask = psci_affinity_mask(lowest_affinity_level); - if (!target_affinity_mask) - return PSCI_RET_INVALID_PARAMS; - - /* Ignore other bits of target affinity */ - target_affinity &= target_affinity_mask; - - /* - * If one or more VCPU matching target affinity are running - * then ON else OFF - */ - kvm_for_each_vcpu(i, tmp, kvm) { - mpidr = kvm_vcpu_get_mpidr(tmp); - if (((mpidr & target_affinity_mask) == target_affinity) && - !tmp->arch.pause) { - return PSCI_0_2_AFFINITY_LEVEL_ON; - } - } - - return PSCI_0_2_AFFINITY_LEVEL_OFF; -} - -static void kvm_prepare_system_event(struct kvm_vcpu *vcpu, u32 type) -{ - memset(&vcpu->run->system_event, 0, sizeof(vcpu->run->system_event)); - vcpu->run->system_event.type = type; - vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT; -} - -static void kvm_psci_system_off(struct kvm_vcpu *vcpu) -{ - kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_SHUTDOWN); -} - -static void kvm_psci_system_reset(struct kvm_vcpu *vcpu) -{ - kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_RESET); -} - -int kvm_psci_version(struct kvm_vcpu *vcpu) -{ - if (test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features)) - return KVM_ARM_PSCI_0_2; - - return KVM_ARM_PSCI_0_1; + return KVM_PSCI_RET_SUCCESS; } -static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu) -{ - int ret = 1; - unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0); - unsigned long val; - - switch (psci_fn) { - case PSCI_0_2_FN_PSCI_VERSION: - /* - * Bits[31:16] = Major Version = 0 - * Bits[15:0] = Minor Version = 2 - */ - val = 2; - break; - case PSCI_0_2_FN_CPU_SUSPEND: - case PSCI_0_2_FN64_CPU_SUSPEND: - val = kvm_psci_vcpu_suspend(vcpu); - break; - case PSCI_0_2_FN_CPU_OFF: - kvm_psci_vcpu_off(vcpu); - val = PSCI_RET_SUCCESS; - break; - case PSCI_0_2_FN_CPU_ON: - case PSCI_0_2_FN64_CPU_ON: - val = kvm_psci_vcpu_on(vcpu); - break; - case PSCI_0_2_FN_AFFINITY_INFO: - case PSCI_0_2_FN64_AFFINITY_INFO: - val = kvm_psci_vcpu_affinity_info(vcpu); - break; - case PSCI_0_2_FN_MIGRATE: - case PSCI_0_2_FN64_MIGRATE: - val = PSCI_RET_NOT_SUPPORTED; - break; - case PSCI_0_2_FN_MIGRATE_INFO_TYPE: - /* - * Trusted OS is MP hence does not require migration - * or - * Trusted OS is not present - */ - val = PSCI_0_2_TOS_MP; - break; - case PSCI_0_2_FN_MIGRATE_INFO_UP_CPU: - case PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU: - val = PSCI_RET_NOT_SUPPORTED; - break; - case PSCI_0_2_FN_SYSTEM_OFF: - kvm_psci_system_off(vcpu); - /* - * We should'nt be going back to guest VCPU after - * receiving SYSTEM_OFF request. - * - * If user space accidently/deliberately resumes - * guest VCPU after SYSTEM_OFF request then guest - * VCPU should see internal failure from PSCI return - * value. To achieve this, we preload r0 (or x0) with - * PSCI return value INTERNAL_FAILURE. - */ - val = PSCI_RET_INTERNAL_FAILURE; - ret = 0; - break; - case PSCI_0_2_FN_SYSTEM_RESET: - kvm_psci_system_reset(vcpu); - /* - * Same reason as SYSTEM_OFF for preloading r0 (or x0) - * with PSCI return value INTERNAL_FAILURE. - */ - val = PSCI_RET_INTERNAL_FAILURE; - ret = 0; - break; - default: - return -EINVAL; - } - - *vcpu_reg(vcpu, 0) = val; - return ret; -} - -static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu) +/** + * kvm_psci_call - handle PSCI call if r0 value is in range + * @vcpu: Pointer to the VCPU struct + * + * Handle PSCI calls from guests through traps from HVC or SMC instructions. + * The calling convention is similar to SMC calls to the secure world where + * the function number is placed in r0 and this function returns true if the + * function number specified in r0 is withing the PSCI range, and false + * otherwise. + */ +bool kvm_psci_call(struct kvm_vcpu *vcpu) { unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0); unsigned long val; @@ -275,45 +89,20 @@ static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu) switch (psci_fn) { case KVM_PSCI_FN_CPU_OFF: kvm_psci_vcpu_off(vcpu); - val = PSCI_RET_SUCCESS; + val = KVM_PSCI_RET_SUCCESS; break; case KVM_PSCI_FN_CPU_ON: val = kvm_psci_vcpu_on(vcpu); break; case KVM_PSCI_FN_CPU_SUSPEND: case KVM_PSCI_FN_MIGRATE: - val = PSCI_RET_NOT_SUPPORTED; + val = KVM_PSCI_RET_NI; break; + default: - return -EINVAL; + return false; } *vcpu_reg(vcpu, 0) = val; - return 1; -} - -/** - * kvm_psci_call - handle PSCI call if r0 value is in range - * @vcpu: Pointer to the VCPU struct - * - * Handle PSCI calls from guests through traps from HVC instructions. - * The calling convention is similar to SMC calls to the secure world - * where the function number is placed in r0. - * - * This function returns: > 0 (success), 0 (success but exit to user - * space), and < 0 (errors) - * - * Errors: - * -EINVAL: Unrecognized PSCI function - */ -int kvm_psci_call(struct kvm_vcpu *vcpu) -{ - switch (kvm_psci_version(vcpu)) { - case KVM_ARM_PSCI_0_2: - return kvm_psci_0_2_call(vcpu); - case KVM_ARM_PSCI_0_1: - return kvm_psci_0_1_call(vcpu); - default: - return -EINVAL; - }; + return true; } diff --git a/arch/arm/kvm/reset.c b/arch/arm/kvm/reset.c index f558c073c023..b80256b554cd 100644 --- a/arch/arm/kvm/reset.c +++ b/arch/arm/kvm/reset.c @@ -27,19 +27,14 @@ #include #include -#include - /****************************************************************************** - * Cortex-A15 and Cortex-A7 Reset Values + * Cortex-A15 Reset Values */ -static struct kvm_regs cortexa_regs_reset = { - .usr_regs.ARM_cpsr = SVC_MODE | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT, -}; +static const int a15_max_cpu_idx = 3; -static const struct kvm_irq_level cortexa_vtimer_irq = { - { .irq = 27 }, - .level = 1, +static struct kvm_regs a15_regs_reset = { + .usr_regs.ARM_cpsr = SVC_MODE | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT, }; @@ -56,28 +51,24 @@ static const struct kvm_irq_level cortexa_vtimer_irq = { */ int kvm_reset_vcpu(struct kvm_vcpu *vcpu) { - struct kvm_regs *reset_regs; - const struct kvm_irq_level *cpu_vtimer_irq; + struct kvm_regs *cpu_reset; switch (vcpu->arch.target) { - case KVM_ARM_TARGET_CORTEX_A7: case KVM_ARM_TARGET_CORTEX_A15: - reset_regs = &cortexa_regs_reset; + if (vcpu->vcpu_id > a15_max_cpu_idx) + return -EINVAL; + cpu_reset = &a15_regs_reset; vcpu->arch.midr = read_cpuid_id(); - cpu_vtimer_irq = &cortexa_vtimer_irq; break; default: return -ENODEV; } /* Reset core registers */ - memcpy(&vcpu->arch.regs, reset_regs, sizeof(vcpu->arch.regs)); + memcpy(&vcpu->arch.regs, cpu_reset, sizeof(vcpu->arch.regs)); /* Reset CP15 registers */ kvm_reset_coprocs(vcpu); - /* Reset arch_timer context */ - kvm_timer_vcpu_reset(vcpu, cpu_vtimer_irq); - return 0; } diff --git a/arch/arm/kvm/trace.h b/arch/arm/kvm/trace.h index b1d640f78623..a8e73ed5ad5b 100644 --- a/arch/arm/kvm/trace.h +++ b/arch/arm/kvm/trace.h @@ -59,9 +59,10 @@ TRACE_EVENT(kvm_guest_fault, __entry->ipa = ipa; ), - TP_printk("ipa %#llx, hsr %#08lx, hxfar %#08lx, pc %#08lx", - __entry->ipa, __entry->hsr, - __entry->hxfar, __entry->vcpu_pc) + TP_printk("guest fault at PC %#08lx (hxfar %#08lx, " + "ipa %#16llx, hsr %#08lx", + __entry->vcpu_pc, __entry->hxfar, + __entry->ipa, __entry->hsr) ); TRACE_EVENT(kvm_irq_line, diff --git a/arch/arm/lib/copy_template.S b/arch/arm/lib/copy_template.S index 3bc8eb811a73..805e3f8fb007 100644 --- a/arch/arm/lib/copy_template.S +++ b/arch/arm/lib/copy_template.S @@ -197,24 +197,24 @@ 12: PLD( pld [r1, #124] ) 13: ldr4w r1, r4, r5, r6, r7, abort=19f - mov r3, lr, lspull #\pull + mov r3, lr, pull #\pull subs r2, r2, #32 ldr4w r1, r8, r9, ip, lr, abort=19f - orr r3, r3, r4, lspush #\push - mov r4, r4, lspull #\pull - orr r4, r4, r5, lspush #\push - mov r5, r5, lspull #\pull - orr r5, r5, r6, lspush #\push - mov r6, r6, lspull #\pull - orr r6, r6, r7, lspush #\push - mov r7, r7, lspull #\pull - orr r7, r7, r8, lspush #\push - mov r8, r8, lspull #\pull - orr r8, r8, r9, lspush #\push - mov r9, r9, lspull #\pull - orr r9, r9, ip, lspush #\push - mov ip, ip, lspull #\pull - orr ip, ip, lr, lspush #\push + orr r3, r3, r4, push #\push + mov r4, r4, pull #\pull + orr r4, r4, r5, push #\push + mov r5, r5, pull #\pull + orr r5, r5, r6, push #\push + mov r6, r6, pull #\pull + orr r6, r6, r7, push #\push + mov r7, r7, pull #\pull + orr r7, r7, r8, push #\push + mov r8, r8, pull #\pull + orr r8, r8, r9, push #\push + mov r9, r9, pull #\pull + orr r9, r9, ip, push #\push + mov ip, ip, pull #\pull + orr ip, ip, lr, push #\push str8w r0, r3, r4, r5, r6, r7, r8, r9, ip, , abort=19f bge 12b PLD( cmn r2, #96 ) @@ -225,10 +225,10 @@ 14: ands ip, r2, #28 beq 16f -15: mov r3, lr, lspull #\pull +15: mov r3, lr, pull #\pull ldr1w r1, lr, abort=21f subs ip, ip, #4 - orr r3, r3, lr, lspush #\push + orr r3, r3, lr, push #\push str1w r0, r3, abort=21f bgt 15b CALGN( cmp r2, #0 ) diff --git a/arch/arm/lib/csumpartialcopygeneric.S b/arch/arm/lib/csumpartialcopygeneric.S index d6e742d24007..d620a5f22a09 100644 --- a/arch/arm/lib/csumpartialcopygeneric.S +++ b/arch/arm/lib/csumpartialcopygeneric.S @@ -141,7 +141,7 @@ FN_ENTRY tst len, #2 mov r5, r4, get_byte_0 beq .Lexit - adcs sum, sum, r4, lspush #16 + adcs sum, sum, r4, push #16 strb r5, [dst], #1 mov r5, r4, get_byte_1 strb r5, [dst], #1 @@ -171,23 +171,23 @@ FN_ENTRY cmp ip, #2 beq .Lsrc2_aligned bhi .Lsrc3_aligned - mov r4, r5, lspull #8 @ C = 0 + mov r4, r5, pull #8 @ C = 0 bics ip, len, #15 beq 2f 1: load4l r5, r6, r7, r8 - orr r4, r4, r5, lspush #24 - mov r5, r5, lspull #8 - orr r5, r5, r6, lspush #24 - mov r6, r6, lspull #8 - orr r6, r6, r7, lspush #24 - mov r7, r7, lspull #8 - orr r7, r7, r8, lspush #24 + orr r4, r4, r5, push #24 + mov r5, r5, pull #8 + orr r5, r5, r6, push #24 + mov r6, r6, pull #8 + orr r6, r6, r7, push #24 + mov r7, r7, pull #8 + orr r7, r7, r8, push #24 stmia dst!, {r4, r5, r6, r7} adcs sum, sum, r4 adcs sum, sum, r5 adcs sum, sum, r6 adcs sum, sum, r7 - mov r4, r8, lspull #8 + mov r4, r8, pull #8 sub ip, ip, #16 teq ip, #0 bne 1b @@ -196,50 +196,50 @@ FN_ENTRY tst ip, #8 beq 3f load2l r5, r6 - orr r4, r4, r5, lspush #24 - mov r5, r5, lspull #8 - orr r5, r5, r6, lspush #24 + orr r4, r4, r5, push #24 + mov r5, r5, pull #8 + orr r5, r5, r6, push #24 stmia dst!, {r4, r5} adcs sum, sum, r4 adcs sum, sum, r5 - mov r4, r6, lspull #8 + mov r4, r6, pull #8 tst ip, #4 beq 4f 3: load1l r5 - orr r4, r4, r5, lspush #24 + orr r4, r4, r5, push #24 str r4, [dst], #4 adcs sum, sum, r4 - mov r4, r5, lspull #8 + mov r4, r5, pull #8 4: ands len, len, #3 beq .Ldone mov r5, r4, get_byte_0 tst len, #2 beq .Lexit - adcs sum, sum, r4, lspush #16 + adcs sum, sum, r4, push #16 strb r5, [dst], #1 mov r5, r4, get_byte_1 strb r5, [dst], #1 mov r5, r4, get_byte_2 b .Lexit -.Lsrc2_aligned: mov r4, r5, lspull #16 +.Lsrc2_aligned: mov r4, r5, pull #16 adds sum, sum, #0 bics ip, len, #15 beq 2f 1: load4l r5, r6, r7, r8 - orr r4, r4, r5, lspush #16 - mov r5, r5, lspull #16 - orr r5, r5, r6, lspush #16 - mov r6, r6, lspull #16 - orr r6, r6, r7, lspush #16 - mov r7, r7, lspull #16 - orr r7, r7, r8, lspush #16 + orr r4, r4, r5, push #16 + mov r5, r5, pull #16 + orr r5, r5, r6, push #16 + mov r6, r6, pull #16 + orr r6, r6, r7, push #16 + mov r7, r7, pull #16 + orr r7, r7, r8, push #16 stmia dst!, {r4, r5, r6, r7} adcs sum, sum, r4 adcs sum, sum, r5 adcs sum, sum, r6 adcs sum, sum, r7 - mov r4, r8, lspull #16 + mov r4, r8, pull #16 sub ip, ip, #16 teq ip, #0 bne 1b @@ -248,20 +248,20 @@ FN_ENTRY tst ip, #8 beq 3f load2l r5, r6 - orr r4, r4, r5, lspush #16 - mov r5, r5, lspull #16 - orr r5, r5, r6, lspush #16 + orr r4, r4, r5, push #16 + mov r5, r5, pull #16 + orr r5, r5, r6, push #16 stmia dst!, {r4, r5} adcs sum, sum, r4 adcs sum, sum, r5 - mov r4, r6, lspull #16 + mov r4, r6, pull #16 tst ip, #4 beq 4f 3: load1l r5 - orr r4, r4, r5, lspush #16 + orr r4, r4, r5, push #16 str r4, [dst], #4 adcs sum, sum, r4 - mov r4, r5, lspull #16 + mov r4, r5, pull #16 4: ands len, len, #3 beq .Ldone mov r5, r4, get_byte_0 @@ -276,24 +276,24 @@ FN_ENTRY load1b r5 b .Lexit -.Lsrc3_aligned: mov r4, r5, lspull #24 +.Lsrc3_aligned: mov r4, r5, pull #24 adds sum, sum, #0 bics ip, len, #15 beq 2f 1: load4l r5, r6, r7, r8 - orr r4, r4, r5, lspush #8 - mov r5, r5, lspull #24 - orr r5, r5, r6, lspush #8 - mov r6, r6, lspull #24 - orr r6, r6, r7, lspush #8 - mov r7, r7, lspull #24 - orr r7, r7, r8, lspush #8 + orr r4, r4, r5, push #8 + mov r5, r5, pull #24 + orr r5, r5, r6, push #8 + mov r6, r6, pull #24 + orr r6, r6, r7, push #8 + mov r7, r7, pull #24 + orr r7, r7, r8, push #8 stmia dst!, {r4, r5, r6, r7} adcs sum, sum, r4 adcs sum, sum, r5 adcs sum, sum, r6 adcs sum, sum, r7 - mov r4, r8, lspull #24 + mov r4, r8, pull #24 sub ip, ip, #16 teq ip, #0 bne 1b @@ -302,20 +302,20 @@ FN_ENTRY tst ip, #8 beq 3f load2l r5, r6 - orr r4, r4, r5, lspush #8 - mov r5, r5, lspull #24 - orr r5, r5, r6, lspush #8 + orr r4, r4, r5, push #8 + mov r5, r5, pull #24 + orr r5, r5, r6, push #8 stmia dst!, {r4, r5} adcs sum, sum, r4 adcs sum, sum, r5 - mov r4, r6, lspull #24 + mov r4, r6, pull #24 tst ip, #4 beq 4f 3: load1l r5 - orr r4, r4, r5, lspush #8 + orr r4, r4, r5, push #8 str r4, [dst], #4 adcs sum, sum, r4 - mov r4, r5, lspull #24 + mov r4, r5, pull #24 4: ands len, len, #3 beq .Ldone mov r5, r4, get_byte_0 @@ -326,7 +326,7 @@ FN_ENTRY load1l r4 mov r5, r4, get_byte_0 strb r5, [dst], #1 - adcs sum, sum, r4, lspush #24 + adcs sum, sum, r4, push #24 mov r5, r4, get_byte_1 b .Lexit FN_EXIT diff --git a/arch/arm/lib/io-readsl.S b/arch/arm/lib/io-readsl.S index 7a7430950c79..5fb97e7f9f4b 100644 --- a/arch/arm/lib/io-readsl.S +++ b/arch/arm/lib/io-readsl.S @@ -47,25 +47,25 @@ ENTRY(__raw_readsl) strb ip, [r1], #1 4: subs r2, r2, #1 - mov ip, r3, lspull #24 + mov ip, r3, pull #24 ldrne r3, [r0] - orrne ip, ip, r3, lspush #8 + orrne ip, ip, r3, push #8 strne ip, [r1], #4 bne 4b b 8f 5: subs r2, r2, #1 - mov ip, r3, lspull #16 + mov ip, r3, pull #16 ldrne r3, [r0] - orrne ip, ip, r3, lspush #16 + orrne ip, ip, r3, push #16 strne ip, [r1], #4 bne 5b b 7f 6: subs r2, r2, #1 - mov ip, r3, lspull #8 + mov ip, r3, pull #8 ldrne r3, [r0] - orrne ip, ip, r3, lspush #24 + orrne ip, ip, r3, push #24 strne ip, [r1], #4 bne 6b diff --git a/arch/arm/lib/io-writesl.S b/arch/arm/lib/io-writesl.S index d0d104a0dd11..8d3b7813725c 100644 --- a/arch/arm/lib/io-writesl.S +++ b/arch/arm/lib/io-writesl.S @@ -41,26 +41,26 @@ ENTRY(__raw_writesl) blt 5f bgt 6f -4: mov ip, r3, lspull #16 +4: mov ip, r3, pull #16 ldr r3, [r1], #4 subs r2, r2, #1 - orr ip, ip, r3, lspush #16 + orr ip, ip, r3, push #16 str ip, [r0] bne 4b mov pc, lr -5: mov ip, r3, lspull #8 +5: mov ip, r3, pull #8 ldr r3, [r1], #4 subs r2, r2, #1 - orr ip, ip, r3, lspush #24 + orr ip, ip, r3, push #24 str ip, [r0] bne 5b mov pc, lr -6: mov ip, r3, lspull #24 +6: mov ip, r3, pull #24 ldr r3, [r1], #4 subs r2, r2, #1 - orr ip, ip, r3, lspush #8 + orr ip, ip, r3, push #8 str ip, [r0] bne 6b mov pc, lr diff --git a/arch/arm/lib/memmove.S b/arch/arm/lib/memmove.S index d1fc0c0c342c..938fc14f962d 100644 --- a/arch/arm/lib/memmove.S +++ b/arch/arm/lib/memmove.S @@ -147,24 +147,24 @@ ENTRY(memmove) 12: PLD( pld [r1, #-128] ) 13: ldmdb r1!, {r7, r8, r9, ip} - mov lr, r3, lspush #\push + mov lr, r3, push #\push subs r2, r2, #32 ldmdb r1!, {r3, r4, r5, r6} - orr lr, lr, ip, lspull #\pull - mov ip, ip, lspush #\push - orr ip, ip, r9, lspull #\pull - mov r9, r9, lspush #\push - orr r9, r9, r8, lspull #\pull - mov r8, r8, lspush #\push - orr r8, r8, r7, lspull #\pull - mov r7, r7, lspush #\push - orr r7, r7, r6, lspull #\pull - mov r6, r6, lspush #\push - orr r6, r6, r5, lspull #\pull - mov r5, r5, lspush #\push - orr r5, r5, r4, lspull #\pull - mov r4, r4, lspush #\push - orr r4, r4, r3, lspull #\pull + orr lr, lr, ip, pull #\pull + mov ip, ip, push #\push + orr ip, ip, r9, pull #\pull + mov r9, r9, push #\push + orr r9, r9, r8, pull #\pull + mov r8, r8, push #\push + orr r8, r8, r7, pull #\pull + mov r7, r7, push #\push + orr r7, r7, r6, pull #\pull + mov r6, r6, push #\push + orr r6, r6, r5, pull #\pull + mov r5, r5, push #\push + orr r5, r5, r4, pull #\pull + mov r4, r4, push #\push + orr r4, r4, r3, pull #\pull stmdb r0!, {r4 - r9, ip, lr} bge 12b PLD( cmn r2, #96 ) @@ -175,10 +175,10 @@ ENTRY(memmove) 14: ands ip, r2, #28 beq 16f -15: mov lr, r3, lspush #\push +15: mov lr, r3, push #\push ldr r3, [r1, #-4]! subs ip, ip, #4 - orr lr, lr, r3, lspull #\pull + orr lr, lr, r3, pull #\pull str lr, [r0, #-4]! bgt 15b CALGN( cmp r2, #0 ) diff --git a/arch/arm/lib/uaccess.S b/arch/arm/lib/uaccess.S index e50520904b76..5c908b1cb8ed 100644 --- a/arch/arm/lib/uaccess.S +++ b/arch/arm/lib/uaccess.S @@ -117,9 +117,9 @@ USER( TUSER( strgtb) r3, [r0], #1) @ May fault .Lc2u_1fupi: subs r2, r2, #4 addmi ip, r2, #4 bmi .Lc2u_1nowords - mov r3, r7, lspull #8 + mov r3, r7, pull #8 ldr r7, [r1], #4 - orr r3, r3, r7, lspush #24 + orr r3, r3, r7, push #24 USER( TUSER( str) r3, [r0], #4) @ May fault mov ip, r0, lsl #32 - PAGE_SHIFT rsb ip, ip, #0 @@ -131,30 +131,30 @@ USER( TUSER( str) r3, [r0], #4) @ May fault subs ip, ip, #16 blt .Lc2u_1rem8lp -.Lc2u_1cpy8lp: mov r3, r7, lspull #8 +.Lc2u_1cpy8lp: mov r3, r7, pull #8 ldmia r1!, {r4 - r7} subs ip, ip, #16 - orr r3, r3, r4, lspush #24 - mov r4, r4, lspull #8 - orr r4, r4, r5, lspush #24 - mov r5, r5, lspull #8 - orr r5, r5, r6, lspush #24 - mov r6, r6, lspull #8 - orr r6, r6, r7, lspush #24 + orr r3, r3, r4, push #24 + mov r4, r4, pull #8 + orr r4, r4, r5, push #24 + mov r5, r5, pull #8 + orr r5, r5, r6, push #24 + mov r6, r6, pull #8 + orr r6, r6, r7, push #24 stmia r0!, {r3 - r6} @ Shouldnt fault bpl .Lc2u_1cpy8lp .Lc2u_1rem8lp: tst ip, #8 - movne r3, r7, lspull #8 + movne r3, r7, pull #8 ldmneia r1!, {r4, r7} - orrne r3, r3, r4, lspush #24 - movne r4, r4, lspull #8 - orrne r4, r4, r7, lspush #24 + orrne r3, r3, r4, push #24 + movne r4, r4, pull #8 + orrne r4, r4, r7, push #24 stmneia r0!, {r3 - r4} @ Shouldnt fault tst ip, #4 - movne r3, r7, lspull #8 + movne r3, r7, pull #8 ldrne r7, [r1], #4 - orrne r3, r3, r7, lspush #24 + orrne r3, r3, r7, push #24 TUSER( strne) r3, [r0], #4 @ Shouldnt fault ands ip, ip, #3 beq .Lc2u_1fupi @@ -172,9 +172,9 @@ USER( TUSER( strgtb) r3, [r0], #1) @ May fault .Lc2u_2fupi: subs r2, r2, #4 addmi ip, r2, #4 bmi .Lc2u_2nowords - mov r3, r7, lspull #16 + mov r3, r7, pull #16 ldr r7, [r1], #4 - orr r3, r3, r7, lspush #16 + orr r3, r3, r7, push #16 USER( TUSER( str) r3, [r0], #4) @ May fault mov ip, r0, lsl #32 - PAGE_SHIFT rsb ip, ip, #0 @@ -186,30 +186,30 @@ USER( TUSER( str) r3, [r0], #4) @ May fault subs ip, ip, #16 blt .Lc2u_2rem8lp -.Lc2u_2cpy8lp: mov r3, r7, lspull #16 +.Lc2u_2cpy8lp: mov r3, r7, pull #16 ldmia r1!, {r4 - r7} subs ip, ip, #16 - orr r3, r3, r4, lspush #16 - mov r4, r4, lspull #16 - orr r4, r4, r5, lspush #16 - mov r5, r5, lspull #16 - orr r5, r5, r6, lspush #16 - mov r6, r6, lspull #16 - orr r6, r6, r7, lspush #16 + orr r3, r3, r4, push #16 + mov r4, r4, pull #16 + orr r4, r4, r5, push #16 + mov r5, r5, pull #16 + orr r5, r5, r6, push #16 + mov r6, r6, pull #16 + orr r6, r6, r7, push #16 stmia r0!, {r3 - r6} @ Shouldnt fault bpl .Lc2u_2cpy8lp .Lc2u_2rem8lp: tst ip, #8 - movne r3, r7, lspull #16 + movne r3, r7, pull #16 ldmneia r1!, {r4, r7} - orrne r3, r3, r4, lspush #16 - movne r4, r4, lspull #16 - orrne r4, r4, r7, lspush #16 + orrne r3, r3, r4, push #16 + movne r4, r4, pull #16 + orrne r4, r4, r7, push #16 stmneia r0!, {r3 - r4} @ Shouldnt fault tst ip, #4 - movne r3, r7, lspull #16 + movne r3, r7, pull #16 ldrne r7, [r1], #4 - orrne r3, r3, r7, lspush #16 + orrne r3, r3, r7, push #16 TUSER( strne) r3, [r0], #4 @ Shouldnt fault ands ip, ip, #3 beq .Lc2u_2fupi @@ -227,9 +227,9 @@ USER( TUSER( strgtb) r3, [r0], #1) @ May fault .Lc2u_3fupi: subs r2, r2, #4 addmi ip, r2, #4 bmi .Lc2u_3nowords - mov r3, r7, lspull #24 + mov r3, r7, pull #24 ldr r7, [r1], #4 - orr r3, r3, r7, lspush #8 + orr r3, r3, r7, push #8 USER( TUSER( str) r3, [r0], #4) @ May fault mov ip, r0, lsl #32 - PAGE_SHIFT rsb ip, ip, #0 @@ -241,30 +241,30 @@ USER( TUSER( str) r3, [r0], #4) @ May fault subs ip, ip, #16 blt .Lc2u_3rem8lp -.Lc2u_3cpy8lp: mov r3, r7, lspull #24 +.Lc2u_3cpy8lp: mov r3, r7, pull #24 ldmia r1!, {r4 - r7} subs ip, ip, #16 - orr r3, r3, r4, lspush #8 - mov r4, r4, lspull #24 - orr r4, r4, r5, lspush #8 - mov r5, r5, lspull #24 - orr r5, r5, r6, lspush #8 - mov r6, r6, lspull #24 - orr r6, r6, r7, lspush #8 + orr r3, r3, r4, push #8 + mov r4, r4, pull #24 + orr r4, r4, r5, push #8 + mov r5, r5, pull #24 + orr r5, r5, r6, push #8 + mov r6, r6, pull #24 + orr r6, r6, r7, push #8 stmia r0!, {r3 - r6} @ Shouldnt fault bpl .Lc2u_3cpy8lp .Lc2u_3rem8lp: tst ip, #8 - movne r3, r7, lspull #24 + movne r3, r7, pull #24 ldmneia r1!, {r4, r7} - orrne r3, r3, r4, lspush #8 - movne r4, r4, lspull #24 - orrne r4, r4, r7, lspush #8 + orrne r3, r3, r4, push #8 + movne r4, r4, pull #24 + orrne r4, r4, r7, push #8 stmneia r0!, {r3 - r4} @ Shouldnt fault tst ip, #4 - movne r3, r7, lspull #24 + movne r3, r7, pull #24 ldrne r7, [r1], #4 - orrne r3, r3, r7, lspush #8 + orrne r3, r3, r7, push #8 TUSER( strne) r3, [r0], #4 @ Shouldnt fault ands ip, ip, #3 beq .Lc2u_3fupi @@ -382,9 +382,9 @@ USER( TUSER( ldr) r7, [r1], #4) @ May fault .Lcfu_1fupi: subs r2, r2, #4 addmi ip, r2, #4 bmi .Lcfu_1nowords - mov r3, r7, lspull #8 + mov r3, r7, pull #8 USER( TUSER( ldr) r7, [r1], #4) @ May fault - orr r3, r3, r7, lspush #24 + orr r3, r3, r7, push #24 str r3, [r0], #4 mov ip, r1, lsl #32 - PAGE_SHIFT rsb ip, ip, #0 @@ -396,30 +396,30 @@ USER( TUSER( ldr) r7, [r1], #4) @ May fault subs ip, ip, #16 blt .Lcfu_1rem8lp -.Lcfu_1cpy8lp: mov r3, r7, lspull #8 +.Lcfu_1cpy8lp: mov r3, r7, pull #8 ldmia r1!, {r4 - r7} @ Shouldnt fault subs ip, ip, #16 - orr r3, r3, r4, lspush #24 - mov r4, r4, lspull #8 - orr r4, r4, r5, lspush #24 - mov r5, r5, lspull #8 - orr r5, r5, r6, lspush #24 - mov r6, r6, lspull #8 - orr r6, r6, r7, lspush #24 + orr r3, r3, r4, push #24 + mov r4, r4, pull #8 + orr r4, r4, r5, push #24 + mov r5, r5, pull #8 + orr r5, r5, r6, push #24 + mov r6, r6, pull #8 + orr r6, r6, r7, push #24 stmia r0!, {r3 - r6} bpl .Lcfu_1cpy8lp .Lcfu_1rem8lp: tst ip, #8 - movne r3, r7, lspull #8 + movne r3, r7, pull #8 ldmneia r1!, {r4, r7} @ Shouldnt fault - orrne r3, r3, r4, lspush #24 - movne r4, r4, lspull #8 - orrne r4, r4, r7, lspush #24 + orrne r3, r3, r4, push #24 + movne r4, r4, pull #8 + orrne r4, r4, r7, push #24 stmneia r0!, {r3 - r4} tst ip, #4 - movne r3, r7, lspull #8 + movne r3, r7, pull #8 USER( TUSER( ldrne) r7, [r1], #4) @ May fault - orrne r3, r3, r7, lspush #24 + orrne r3, r3, r7, push #24 strne r3, [r0], #4 ands ip, ip, #3 beq .Lcfu_1fupi @@ -437,9 +437,9 @@ USER( TUSER( ldrne) r7, [r1], #4) @ May fault .Lcfu_2fupi: subs r2, r2, #4 addmi ip, r2, #4 bmi .Lcfu_2nowords - mov r3, r7, lspull #16 + mov r3, r7, pull #16 USER( TUSER( ldr) r7, [r1], #4) @ May fault - orr r3, r3, r7, lspush #16 + orr r3, r3, r7, push #16 str r3, [r0], #4 mov ip, r1, lsl #32 - PAGE_SHIFT rsb ip, ip, #0 @@ -452,30 +452,30 @@ USER( TUSER( ldr) r7, [r1], #4) @ May fault blt .Lcfu_2rem8lp -.Lcfu_2cpy8lp: mov r3, r7, lspull #16 +.Lcfu_2cpy8lp: mov r3, r7, pull #16 ldmia r1!, {r4 - r7} @ Shouldnt fault subs ip, ip, #16 - orr r3, r3, r4, lspush #16 - mov r4, r4, lspull #16 - orr r4, r4, r5, lspush #16 - mov r5, r5, lspull #16 - orr r5, r5, r6, lspush #16 - mov r6, r6, lspull #16 - orr r6, r6, r7, lspush #16 + orr r3, r3, r4, push #16 + mov r4, r4, pull #16 + orr r4, r4, r5, push #16 + mov r5, r5, pull #16 + orr r5, r5, r6, push #16 + mov r6, r6, pull #16 + orr r6, r6, r7, push #16 stmia r0!, {r3 - r6} bpl .Lcfu_2cpy8lp .Lcfu_2rem8lp: tst ip, #8 - movne r3, r7, lspull #16 + movne r3, r7, pull #16 ldmneia r1!, {r4, r7} @ Shouldnt fault - orrne r3, r3, r4, lspush #16 - movne r4, r4, lspull #16 - orrne r4, r4, r7, lspush #16 + orrne r3, r3, r4, push #16 + movne r4, r4, pull #16 + orrne r4, r4, r7, push #16 stmneia r0!, {r3 - r4} tst ip, #4 - movne r3, r7, lspull #16 + movne r3, r7, pull #16 USER( TUSER( ldrne) r7, [r1], #4) @ May fault - orrne r3, r3, r7, lspush #16 + orrne r3, r3, r7, push #16 strne r3, [r0], #4 ands ip, ip, #3 beq .Lcfu_2fupi @@ -493,9 +493,9 @@ USER( TUSER( ldrgtb) r3, [r1], #0) @ May fault .Lcfu_3fupi: subs r2, r2, #4 addmi ip, r2, #4 bmi .Lcfu_3nowords - mov r3, r7, lspull #24 + mov r3, r7, pull #24 USER( TUSER( ldr) r7, [r1], #4) @ May fault - orr r3, r3, r7, lspush #8 + orr r3, r3, r7, push #8 str r3, [r0], #4 mov ip, r1, lsl #32 - PAGE_SHIFT rsb ip, ip, #0 @@ -507,30 +507,30 @@ USER( TUSER( ldr) r7, [r1], #4) @ May fault subs ip, ip, #16 blt .Lcfu_3rem8lp -.Lcfu_3cpy8lp: mov r3, r7, lspull #24 +.Lcfu_3cpy8lp: mov r3, r7, pull #24 ldmia r1!, {r4 - r7} @ Shouldnt fault - orr r3, r3, r4, lspush #8 - mov r4, r4, lspull #24 - orr r4, r4, r5, lspush #8 - mov r5, r5, lspull #24 - orr r5, r5, r6, lspush #8 - mov r6, r6, lspull #24 - orr r6, r6, r7, lspush #8 + orr r3, r3, r4, push #8 + mov r4, r4, pull #24 + orr r4, r4, r5, push #8 + mov r5, r5, pull #24 + orr r5, r5, r6, push #8 + mov r6, r6, pull #24 + orr r6, r6, r7, push #8 stmia r0!, {r3 - r6} subs ip, ip, #16 bpl .Lcfu_3cpy8lp .Lcfu_3rem8lp: tst ip, #8 - movne r3, r7, lspull #24 + movne r3, r7, pull #24 ldmneia r1!, {r4, r7} @ Shouldnt fault - orrne r3, r3, r4, lspush #8 - movne r4, r4, lspull #24 - orrne r4, r4, r7, lspush #8 + orrne r3, r3, r4, push #8 + movne r4, r4, pull #24 + orrne r4, r4, r7, push #8 stmneia r0!, {r3 - r4} tst ip, #4 - movne r3, r7, lspull #24 + movne r3, r7, pull #24 USER( TUSER( ldrne) r7, [r1], #4) @ May fault - orrne r3, r3, r7, lspush #8 + orrne r3, r3, r7, push #8 strne r3, [r0], #4 ands ip, ip, #3 beq .Lcfu_3fupi diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index c336efdf8f13..788562dccb43 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -2,7 +2,7 @@ # Makefile for the linux kernel. # -obj-y := irq.o gpio.o setup.o sysirq_mask.o +obj-y := irq.o gpio.o setup.o obj-m := obj-n := obj- := diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index cdb1fb695edf..a8ce24538da6 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c @@ -351,8 +351,6 @@ static void __init at91sam9260_initialize(void) at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) | (1 << AT91SAM9260_ID_IRQ2); - at91_sysirq_mask_rtt(AT91SAM9260_BASE_RTT); - /* Register GPIO subsystem */ at91_gpio_init(at91sam9260_gpio, 3); } diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index 7c9d2ea5bb88..25efb5ac30f1 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c @@ -293,8 +293,6 @@ static void __init at91sam9261_initialize(void) at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) | (1 << AT91SAM9261_ID_IRQ2); - at91_sysirq_mask_rtt(AT91SAM9261_BASE_RTT); - /* Register GPIO subsystem */ at91_gpio_init(at91sam9261_gpio, 3); } diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index c6b2f477c71f..f44ffd2105a7 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c @@ -329,9 +329,6 @@ static void __init at91sam9263_initialize(void) arm_pm_restart = at91sam9_alt_restart; at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); - at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT0); - at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT1); - /* Register GPIO subsystem */ at91_gpio_init(at91sam9263_gpio, 5); } diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index e381fa125011..8b7fce067652 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c @@ -376,9 +376,6 @@ static void __init at91sam9g45_initialize(void) arm_pm_restart = at91sam9g45_restart; at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); - at91_sysirq_mask_rtc(AT91SAM9G45_BASE_RTC); - at91_sysirq_mask_rtt(AT91SAM9G45_BASE_RTT); - /* Register GPIO subsystem */ at91_gpio_init(at91sam9g45_gpio, 5); } diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c index 4d6001c355f5..c7d670d11802 100644 --- a/arch/arm/mach-at91/at91sam9n12.c +++ b/arch/arm/mach-at91/at91sam9n12.c @@ -223,13 +223,7 @@ static void __init at91sam9n12_map_io(void) at91_init_sram(0, AT91SAM9N12_SRAM_BASE, AT91SAM9N12_SRAM_SIZE); } -static void __init at91sam9n12_initialize(void) -{ - at91_sysirq_mask_rtc(AT91SAM9N12_BASE_RTC); -} - AT91_SOC_START(at91sam9n12) .map_io = at91sam9n12_map_io, .register_clocks = at91sam9n12_register_clocks, - .init = at91sam9n12_initialize, AT91_SOC_END diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c index 5615d28a5b96..f77fae5591bc 100644 --- a/arch/arm/mach-at91/at91sam9rl.c +++ b/arch/arm/mach-at91/at91sam9rl.c @@ -295,9 +295,6 @@ static void __init at91sam9rl_initialize(void) arm_pm_restart = at91sam9_alt_restart; at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); - at91_sysirq_mask_rtc(AT91SAM9RL_BASE_RTC); - at91_sysirq_mask_rtt(AT91SAM9RL_BASE_RTT); - /* Register GPIO subsystem */ at91_gpio_init(at91sam9rl_gpio, 4); } diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c index 7b4f848312eb..e631fec040ce 100644 --- a/arch/arm/mach-at91/at91sam9x5.c +++ b/arch/arm/mach-at91/at91sam9x5.c @@ -318,11 +318,6 @@ static void __init at91sam9x5_map_io(void) at91_init_sram(0, AT91SAM9X5_SRAM_BASE, AT91SAM9X5_SRAM_SIZE); } -static void __init at91sam9x5_initialize(void) -{ - at91_sysirq_mask_rtc(AT91SAM9X5_BASE_RTC); -} - /* -------------------------------------------------------------------- * Interrupt initialization * -------------------------------------------------------------------- */ @@ -330,5 +325,4 @@ static void __init at91sam9x5_initialize(void) AT91_SOC_START(at91sam9x5) .map_io = at91sam9x5_map_io, .register_clocks = at91sam9x5_register_clocks, - .init = at91sam9x5_initialize, AT91_SOC_END diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c index 64f9f1045539..da841885d01c 100644 --- a/arch/arm/mach-at91/clock.c +++ b/arch/arm/mach-at91/clock.c @@ -947,7 +947,6 @@ static int __init at91_clock_reset(void) } at91_pmc_write(AT91_PMC_SCDR, scdr); - at91_pmc_write(AT91_PMC_PCDR, pcdr); if (cpu_is_sama5d3()) at91_pmc_write(AT91_PMC_PCDR1, pcdr1); diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index d949ab4e26fa..78ab06548658 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h @@ -33,8 +33,6 @@ extern int __init at91_aic_of_init(struct device_node *node, struct device_node *parent); extern int __init at91_aic5_of_init(struct device_node *node, struct device_node *parent); -extern void __init at91_sysirq_mask_rtc(u32 rtc_base); -extern void __init at91_sysirq_mask_rtt(u32 rtt_base); /* Timer */ diff --git a/arch/arm/mach-at91/include/mach/at91sam9n12.h b/arch/arm/mach-at91/include/mach/at91sam9n12.h index 0151bcf6163c..d374b87c0459 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9n12.h +++ b/arch/arm/mach-at91/include/mach/at91sam9n12.h @@ -48,11 +48,6 @@ #define AT91SAM9N12_BASE_USART2 0xf8024000 #define AT91SAM9N12_BASE_USART3 0xf8028000 -/* - * System Peripherals - */ -#define AT91SAM9N12_BASE_RTC 0xfffffeb0 - /* * Internal Memory. */ diff --git a/arch/arm/mach-at91/include/mach/at91sam9x5.h b/arch/arm/mach-at91/include/mach/at91sam9x5.h index 2fc76c49e97c..c75ee19b58d3 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9x5.h +++ b/arch/arm/mach-at91/include/mach/at91sam9x5.h @@ -54,11 +54,6 @@ #define AT91SAM9X5_BASE_USART1 0xf8020000 #define AT91SAM9X5_BASE_USART2 0xf8024000 -/* - * System Peripherals - */ -#define AT91SAM9X5_BASE_RTC 0xfffffeb0 - /* * Internal Memory. */ diff --git a/arch/arm/mach-at91/include/mach/sama5d3.h b/arch/arm/mach-at91/include/mach/sama5d3.h index 3abbc4286875..6dc81ee38048 100644 --- a/arch/arm/mach-at91/include/mach/sama5d3.h +++ b/arch/arm/mach-at91/include/mach/sama5d3.h @@ -64,11 +64,6 @@ #define SAMA5D3_ID_TRNG 45 /* True Random Generator Number */ #define SAMA5D3_ID_IRQ0 47 /* Advanced Interrupt Controller (IRQ0) */ -/* - * System Peripherals - */ -#define SAMA5D3_BASE_RTC 0xfffffeb0 - /* * Internal Memory */ diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h index d8af0755bddc..2f5908f0b8c5 100644 --- a/arch/arm/mach-at91/pm.h +++ b/arch/arm/mach-at91/pm.h @@ -37,7 +37,7 @@ static inline void at91rm9200_standby(void) " mcr p15, 0, %0, c7, c0, 4\n\t" " str %5, [%1, %2]" : - : "r" (0), "r" (at91_ramc_base[0]), "r" (AT91RM9200_SDRAMC_LPR), + : "r" (0), "r" (AT91_BASE_SYS), "r" (AT91RM9200_SDRAMC_LPR), "r" (1), "r" (AT91RM9200_SDRAMC_SRR), "r" (lpr)); } diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c index b26156bf15db..99a0a1d2b7dc 100644 --- a/arch/arm/mach-at91/sam9_smc.c +++ b/arch/arm/mach-at91/sam9_smc.c @@ -101,7 +101,7 @@ static void sam9_smc_cs_read(void __iomem *base, /* Pulse register */ val = __raw_readl(base + AT91_SMC_PULSE); - config->nwe_pulse = val & AT91_SMC_NWEPULSE; + config->nwe_setup = val & AT91_SMC_NWEPULSE; config->ncs_write_pulse = (val & AT91_SMC_NCS_WRPULSE) >> 8; config->nrd_pulse = (val & AT91_SMC_NRDPULSE) >> 16; config->ncs_read_pulse = (val & AT91_SMC_NCS_RDPULSE) >> 24; diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c index a28873fe3049..401279715ab1 100644 --- a/arch/arm/mach-at91/sama5d3.c +++ b/arch/arm/mach-at91/sama5d3.c @@ -95,19 +95,19 @@ static struct clk twi0_clk = { .name = "twi0_clk", .pid = SAMA5D3_ID_TWI0, .type = CLK_TYPE_PERIPHERAL, - .div = AT91_PMC_PCR_DIV8, + .div = AT91_PMC_PCR_DIV2, }; static struct clk twi1_clk = { .name = "twi1_clk", .pid = SAMA5D3_ID_TWI1, .type = CLK_TYPE_PERIPHERAL, - .div = AT91_PMC_PCR_DIV8, + .div = AT91_PMC_PCR_DIV2, }; static struct clk twi2_clk = { .name = "twi2_clk", .pid = SAMA5D3_ID_TWI2, .type = CLK_TYPE_PERIPHERAL, - .div = AT91_PMC_PCR_DIV8, + .div = AT91_PMC_PCR_DIV2, }; static struct clk mmc0_clk = { .name = "mci0_clk", @@ -371,13 +371,7 @@ static void __init sama5d3_map_io(void) at91_init_sram(0, SAMA5D3_SRAM_BASE, SAMA5D3_SRAM_SIZE); } -static void __init sama5d3_initialize(void) -{ - at91_sysirq_mask_rtc(SAMA5D3_BASE_RTC); -} - AT91_SOC_START(sama5d3) .map_io = sama5d3_map_io, .register_clocks = sama5d3_register_clocks, - .init = sama5d3_initialize, AT91_SOC_END diff --git a/arch/arm/mach-at91/sysirq_mask.c b/arch/arm/mach-at91/sysirq_mask.c deleted file mode 100644 index f8bc3511a8c8..000000000000 --- a/arch/arm/mach-at91/sysirq_mask.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - * sysirq_mask.c - System-interrupt masking - * - * Copyright (C) 2013 Johan Hovold - * - * Functions to disable system interrupts from backup-powered peripherals. - * - * The RTC and RTT-peripherals are generally powered by backup power (VDDBU) - * and are not reset on wake-up, user, watchdog or software reset. This means - * that their interrupts may be enabled during early boot (e.g. after a user - * reset). - * - * As the RTC and RTT share the system-interrupt line with the PIT, an - * interrupt occurring before a handler has been installed would lead to the - * system interrupt being disabled and prevent the system from booting. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#include -#include - -#include "generic.h" - -#define AT91_RTC_IDR 0x24 /* Interrupt Disable Register */ -#define AT91_RTC_IMR 0x28 /* Interrupt Mask Register */ -#define AT91_RTC_IRQ_MASK 0x1f /* Available IRQs mask */ - -void __init at91_sysirq_mask_rtc(u32 rtc_base) -{ - void __iomem *base; - - base = ioremap(rtc_base, 64); - if (!base) - return; - - /* - * sam9x5 SoCs have the following errata: - * "RTC: Interrupt Mask Register cannot be used - * Interrupt Mask Register read always returns 0." - * - * Hence we're not relying on IMR values to disable - * interrupts. - */ - writel_relaxed(AT91_RTC_IRQ_MASK, base + AT91_RTC_IDR); - (void)readl_relaxed(base + AT91_RTC_IMR); /* flush */ - - iounmap(base); -} - -void __init at91_sysirq_mask_rtt(u32 rtt_base) -{ - void __iomem *base; - void __iomem *reg; - u32 mode; - - base = ioremap(rtt_base, 16); - if (!base) - return; - - reg = base + AT91_RTT_MR; - - mode = readl_relaxed(reg); - if (mode & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN)) { - pr_info("AT91: Disabling rtt irq\n"); - mode &= ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN); - writel_relaxed(mode, reg); - (void)readl_relaxed(reg); /* flush */ - } - - iounmap(base); -} diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c index 139e42da25f0..dff4ddc5ef81 100644 --- a/arch/arm/mach-davinci/board-dm355-leopard.c +++ b/arch/arm/mach-davinci/board-dm355-leopard.c @@ -75,7 +75,6 @@ static struct davinci_nand_pdata davinci_nand_data = { .parts = davinci_nand_partitions, .nr_parts = ARRAY_SIZE(davinci_nand_partitions), .ecc_mode = NAND_ECC_HW_SYNDROME, - .ecc_bits = 4, .bbt_options = NAND_BBT_USE_FLASH, }; diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c index fa4bfaf952d8..a33686a6fbb2 100644 --- a/arch/arm/mach-davinci/board-dm644x-evm.c +++ b/arch/arm/mach-davinci/board-dm644x-evm.c @@ -153,7 +153,6 @@ static struct davinci_nand_pdata davinci_evm_nandflash_data = { .parts = davinci_evm_nandflash_partition, .nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition), .ecc_mode = NAND_ECC_HW, - .ecc_bits = 1, .bbt_options = NAND_BBT_USE_FLASH, .timing = &davinci_evm_nandflash_timing, }; diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c index 0c005e876cac..fbb8e5ab1dc1 100644 --- a/arch/arm/mach-davinci/board-dm646x-evm.c +++ b/arch/arm/mach-davinci/board-dm646x-evm.c @@ -90,7 +90,6 @@ static struct davinci_nand_pdata davinci_nand_data = { .parts = davinci_nand_partitions, .nr_parts = ARRAY_SIZE(davinci_nand_partitions), .ecc_mode = NAND_ECC_HW, - .ecc_bits = 1, .options = 0, }; diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c index 808233b60e3d..2bc112adf565 100644 --- a/arch/arm/mach-davinci/board-neuros-osd2.c +++ b/arch/arm/mach-davinci/board-neuros-osd2.c @@ -88,7 +88,6 @@ static struct davinci_nand_pdata davinci_ntosd2_nandflash_data = { .parts = davinci_ntosd2_nandflash_partition, .nr_parts = ARRAY_SIZE(davinci_ntosd2_nandflash_partition), .ecc_mode = NAND_ECC_HW, - .ecc_bits = 1, .bbt_options = NAND_BBT_USE_FLASH, }; diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c index 8d4f5dc56910..e2b5da031f96 100644 --- a/arch/arm/mach-dove/common.c +++ b/arch/arm/mach-dove/common.c @@ -226,7 +226,7 @@ void __init dove_init_early(void) orion_time_set_base(TIMER_VIRT_BASE); mvebu_mbus_init("marvell,dove-mbus", BRIDGE_WINS_BASE, BRIDGE_WINS_SZ, - DOVE_MC_WINS_BASE, DOVE_MC_WINS_SZ, 0); + DOVE_MC_WINS_BASE, DOVE_MC_WINS_SZ); } static int __init dove_find_tclk(void) diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c index 8a53f346cdb3..b13cc74114db 100644 --- a/arch/arm/mach-ebsa110/core.c +++ b/arch/arm/mach-ebsa110/core.c @@ -116,7 +116,7 @@ static void __init ebsa110_map_io(void) iotable_init(ebsa110_io_desc, ARRAY_SIZE(ebsa110_io_desc)); } -static void __iomem *ebsa110_ioremap_caller(phys_addr_t cookie, size_t size, +static void __iomem *ebsa110_ioremap_caller(unsigned long cookie, size_t size, unsigned int flags, void *caller) { return (void __iomem *)cookie; diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c index d88234e14f96..753b94f3fca7 100644 --- a/arch/arm/mach-exynos/mach-exynos5-dt.c +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c @@ -14,7 +14,6 @@ #include #include #include -#include #include #include @@ -24,31 +23,11 @@ #include "common.h" -static u64 dma_mask64 = DMA_BIT_MASK(64); - static void __init exynos5_dt_map_io(void) { exynos_init_io(NULL, 0); } -static int exynos5250_platform_notifier(struct notifier_block *nb, - unsigned long event, void *__dev) -{ - struct device *dev = __dev; - - if (event != BUS_NOTIFY_ADD_DEVICE) - return NOTIFY_DONE; - - dev->dma_mask = &dma_mask64; - dev->coherent_dma_mask = DMA_BIT_MASK(64); - - return NOTIFY_OK; -} - -static struct notifier_block exynos5250_platform_nb = { - .notifier_call = exynos5250_platform_notifier, -}; - static void __init exynos5_dt_machine_init(void) { struct device_node *i2c_np; @@ -73,11 +52,6 @@ static void __init exynos5_dt_machine_init(void) } } - if (config_enabled(CONFIG_ARM_LPAE) && - of_machine_is_compatible("samsung,exynos5250")) - bus_register_notifier(&platform_bus_type, - &exynos5250_platform_nb); - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); } diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c index 95d0b6e6438b..a42b369bc439 100644 --- a/arch/arm/mach-footbridge/common.c +++ b/arch/arm/mach-footbridge/common.c @@ -15,7 +15,6 @@ #include #include #include -#include