From 929b0fb893f2c794a450975d802c0b39752effc0 Mon Sep 17 00:00:00 2001 From: David Woodhouse Date: Wed, 22 Jan 2014 15:31:32 +0000 Subject: [PATCH] [x86] Silence unused diReg variable warning in non-asserting builds git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199812 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp index e8c9107f662..0e18a4e9f65 100644 --- a/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp +++ b/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp @@ -1318,11 +1318,10 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS, case X86II::Pseudo: llvm_unreachable("Pseudo instruction shouldn't be emitted"); case X86II::RawFrmDstSrc: { - unsigned diReg = MI.getOperand(0).getReg(); unsigned siReg = MI.getOperand(1).getReg(); - assert(((siReg == X86::SI && diReg == X86::DI) || - (siReg == X86::ESI && diReg == X86::EDI) || - (siReg == X86::RSI && diReg == X86::RDI)) && + assert(((siReg == X86::SI && MI.getOperand(0).getReg() == X86::DI) || + (siReg == X86::ESI && MI.getOperand(0).getReg() == X86::EDI) || + (siReg == X86::RSI && MI.getOperand(0).getReg() == X86::RDI)) && "SI and DI register sizes do not match"); // Emit segment override opcode prefix as needed (not for %ds). if (MI.getOperand(2).getReg() != X86::DS) -- 2.34.1