From 940c8e5494c17529f96f5e1915ad89e488bdd69e Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Thu, 23 Dec 2010 23:19:54 +0000 Subject: [PATCH] Recognize a few more documented register name aliases for ARM in the asm lexer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122523 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/AsmParser/ARMAsmLexer.cpp | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/lib/Target/ARM/AsmParser/ARMAsmLexer.cpp b/lib/Target/ARM/AsmParser/ARMAsmLexer.cpp index e79a332f7eb..c93fb248e7a 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmLexer.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmLexer.cpp @@ -121,6 +121,24 @@ AsmToken ARMBaseAsmLexer::LexTokenUAL() { StringRef lowerRef(lowerCase); unsigned regID = MatchRegisterName(lowerRef); + // Check for register aliases. + // r13 -> sp + // r14 -> lr + // r15 -> pc + // ip -> r12 + // FIXME: Some assemblers support lots of others. Do we want them all? + if (!regID) { + if (lowerCase.size() == 3 && lowerCase[0] == 'r' + && lowerCase[1] == '1') { + switch (lowerCase[2]) { + default: break; + case '3': regID = ARM::SP; + case '4': regID = ARM::LR; + case '5': regID = ARM::PC; + } + } else if (lowerCase == "ip") + regID = ARM::R12; + } if (regID) { return AsmToken(AsmToken::Register, -- 2.34.1