From 94c96cc5197f527a8cb9f953be3a2e8f2f5aa9e3 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Wed, 6 Dec 2006 21:46:13 +0000 Subject: [PATCH] implement sextinreg i8->i64 and i16->i64 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32293 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPCInstr64Bit.td | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/lib/Target/PowerPC/PPCInstr64Bit.td b/lib/Target/PowerPC/PPCInstr64Bit.td index 7c3355a1d84..f47e92f3dcd 100644 --- a/lib/Target/PowerPC/PPCInstr64Bit.td +++ b/lib/Target/PowerPC/PPCInstr64Bit.td @@ -224,6 +224,14 @@ def SRD : XForm_6<31, 539, (ops G8RC:$rA, G8RC:$rS, GPRC:$rB), def SRAD : XForm_6<31, 794, (ops G8RC:$rA, G8RC:$rS, GPRC:$rB), "srad $rA, $rS, $rB", IntRotateD, [(set G8RC:$rA, (sra G8RC:$rS, GPRC:$rB))]>, isPPC64; + +def EXTSB8 : XForm_11<31, 954, (ops G8RC:$rA, G8RC:$rS), + "extsb $rA, $rS", IntGeneral, + [(set G8RC:$rA, (sext_inreg G8RC:$rS, i8))]>; +def EXTSH8 : XForm_11<31, 922, (ops G8RC:$rA, G8RC:$rS), + "extsh $rA, $rS", IntGeneral, + [(set G8RC:$rA, (sext_inreg G8RC:$rS, i16))]>; + def EXTSW : XForm_11<31, 986, (ops G8RC:$rA, G8RC:$rS), "extsw $rA, $rS", IntGeneral, [(set G8RC:$rA, (sext_inreg G8RC:$rS, i32))]>, isPPC64; -- 2.34.1