From 98ae09ca5dba69cd9e5933ceea27d08b901907c6 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Mon, 4 Dec 2006 22:38:21 +0000 Subject: [PATCH] =?utf8?q?Add=20support=20for=2064-bit=20'r'=20constraint.?= =?utf8?q?=20=20Patch=20by=20by=20Rafael=20~Avila=20de=20Esp=C3=83=C2=ADnd?= =?utf8?q?ol!=20This=20fixes=20PR1029=20and=20Regression/CodeGen/X86/x86-6?= =?utf8?q?4-asm.ll?= MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32206 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 375777a3290..9358c8b3d4a 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -5528,6 +5528,11 @@ getRegClassForInlineAsmConstraint(const std::string &Constraint, break; case 'r': // GENERAL_REGS case 'R': // LEGACY_REGS + if (VT == MVT::i64 && Subtarget->is64Bit()) + return make_vector(X86::RAX, X86::RDX, X86::RCX, X86::RBX, + X86::RSI, X86::RDI, X86::RBP, X86::RSP, + X86::R8, X86::R9, X86::R10, X86::R11, + X86::R12, X86::R13, X86::R14, X86::R15, 0); if (VT == MVT::i32) return make_vector(X86::EAX, X86::EDX, X86::ECX, X86::EBX, X86::ESI, X86::EDI, X86::EBP, X86::ESP, 0); -- 2.34.1