From 98df506e712d51bf74ae526e2b6304bef9025a7e Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Sat, 21 Aug 2004 20:00:36 +0000 Subject: [PATCH] Make alignment be in bits, just like size is git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15969 91177308-0d34-0410-b5e6-96231b3b80d8 --- utils/TableGen/CodeGenTarget.cpp | 3 ++- utils/TableGen/RegisterInfoEmitter.cpp | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp index 49fd772d2e5..b9c7f5172c4 100644 --- a/utils/TableGen/CodeGenTarget.cpp +++ b/utils/TableGen/CodeGenTarget.cpp @@ -133,7 +133,8 @@ void CodeGenTarget::ReadRegisterClasses() const { CodeGenRegisterClass::CodeGenRegisterClass(Record *R) : TheDef(R) { SpillSize = R->getValueAsInt("Size"); - SpillAlignment = R->getValueAsInt("Alignment"); + // FIXME: should convert to bits in all targets. + SpillAlignment = R->getValueAsInt("Alignment")*8; if (CodeInit *CI = dynamic_cast(R->getValueInit("Methods"))) MethodDefinitions = CI->getValue(); diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp index 682404ea148..ef79c35017e 100644 --- a/utils/TableGen/RegisterInfoEmitter.cpp +++ b/utils/TableGen/RegisterInfoEmitter.cpp @@ -128,7 +128,7 @@ void RegisterInfoEmitter::run(std::ostream &OS) { OS << " struct " << Name << "Class : public TargetRegisterClass {\n" << " " << Name << "Class() : TargetRegisterClass(" - << RC.SpillSize/8 << ", " << RC.SpillAlignment << ", " << Name << ", " + << RC.SpillSize/8 << ", " << RC.SpillAlignment/8 << ", " << Name << ", " << Name << " + " << RC.Elements.size() << ") {}\n" << RC.MethodDefinitions << " } " << Name << "Instance;\n\n"; } -- 2.34.1