From 995f55036fd1b420cf5c5d45096a8e36736303cd Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Wed, 28 Mar 2007 18:12:31 +0000 Subject: [PATCH] Compile CodeGen/X86/lea-3.ll:test2 to: _test3: leaq (,%rdi,4), %rax orq %rdi, %rax ret instead of: _test2: movq %rdi, %rax shlq $2, %rax orq %rdi, %rax ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35434 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86InstrInfo.cpp | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index aa15723c46e..3809b805495 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -149,6 +149,19 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI, NewMI = BuildMI(get(X86::PSHUFDri), A).addReg(B).addImm(M); break; } + case X86::SHL64ri: { + assert(MI->getNumOperands() == 3 && "Unknown shift instruction!"); + // NOTE: LEA doesn't produce flags like shift does, but LLVM never uses + // the flags produced by a shift yet, so this is safe. + unsigned Dest = MI->getOperand(0).getReg(); + unsigned Src = MI->getOperand(1).getReg(); + unsigned ShAmt = MI->getOperand(2).getImm(); + if (ShAmt == 0 || ShAmt >= 4) return 0; + + NewMI = BuildMI(get(X86::LEA64r), Dest) + .addReg(0).addImm(1 << ShAmt).addReg(Src).addImm(0); + break; + } case X86::SHL32ri: { assert(MI->getNumOperands() == 3 && "Unknown shift instruction!"); // NOTE: LEA doesn't produce flags like shift does, but LLVM never uses -- 2.34.1