From 9a7854d888c5a7a1290cc8b1c68a12d54b422459 Mon Sep 17 00:00:00 2001 From: yxj Date: Wed, 23 Jan 2013 15:49:08 +0800 Subject: [PATCH] dp501:add more config for low power,now the total for dp501 is 265mw --- drivers/video/display/transmitter/dp501.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/video/display/transmitter/dp501.c b/drivers/video/display/transmitter/dp501.c index f2dc73acab25..0414ae84e9df 100644 --- a/drivers/video/display/transmitter/dp501.c +++ b/drivers/video/display/transmitter/dp501.c @@ -111,6 +111,7 @@ static int dp501_init(struct i2c_client *client) dp501_write_reg(client,2,0x26,0x10); //PIO setting dp501_write_reg(client,0,0x0a,0x0c); //block 74 & 76 + dp501_write_reg(client,0,0x20,0x00); dp501_write_reg(client,0,0x27,0x30); //auto detect CRTC dp501_write_reg(client,0,0x2f,0x82); //reset tpfifo at v blank dp501_write_reg(client,0,0x24,0xc0); //DVO mapping ; crtc follow mode @@ -124,7 +125,7 @@ static int dp501_init(struct i2c_client *client) //second, set up training - dp501_write_reg(client,0,0x5d,0x0A); //training link rate(2.7Gbps) + dp501_write_reg(client,0,0x5d,0x06); //training link rate(2.7Gbps) dp501_write_reg(client,0,0x5e,0x84); //training lane count(4Lanes), dp501_write_reg(client,0,0x74,0x00); //idle pattern dp501_write_reg(client,0,0x5f,0x0d); //trigger training -- 2.34.1