From 9e39c99180e3ac138449ed3c8dad6ac237384a48 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault@amd.com>
Date: Wed, 18 Feb 2015 02:10:37 +0000
Subject: [PATCH] R600/SI: Fix operand encoding for flat instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229607 91177308-0d34-0410-b5e6-96231b3b80d8
---
lib/Target/R600/SIInstrInfo.td | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/lib/Target/R600/SIInstrInfo.td b/lib/Target/R600/SIInstrInfo.td
index 5e68cb25709..520379225d9 100644
--- a/lib/Target/R600/SIInstrInfo.td
+++ b/lib/Target/R600/SIInstrInfo.td
@@ -1915,12 +1915,13 @@ multiclass MUBUF_Store_Helper <mubuf op, string name, RegisterClass vdataClass,
}
class FLAT_Load_Helper <bits<7> op, string asm, RegisterClass regClass> :
- FLAT <op, (outs regClass:$data),
+ FLAT <op, (outs regClass:$vdst),
(ins VReg_64:$addr),
- asm#" $data, $addr, [M0, FLAT_SCRATCH]", []> {
+ asm#" $vdst, $addr, [M0, FLAT_SCRATCH]", []> {
let glc = 0;
let slc = 0;
let tfe = 0;
+ let data = 0;
let mayLoad = 1;
}
@@ -1936,6 +1937,7 @@ class FLAT_Store_Helper <bits<7> op, string name, RegisterClass vdataClass> :
let glc = 0;
let slc = 0;
let tfe = 0;
+ let vdst = 0;
}
class MIMG_Mask <string op, int channels> {
--
2.34.1