From 9f21286ceac1e40ea4e4149e4f4edad44d57ce05 Mon Sep 17 00:00:00 2001 From: David Wu Date: Wed, 12 Jul 2017 10:34:40 +0800 Subject: [PATCH] arm64: dts: rockchip: Add rk3366-sheep and rk3366-android dts file for Android7.1 Change-Id: Ib0f2dd27cb5154bed68e71780cfff4a1730399a3 Signed-off-by: David Wu --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3366-android.dtsi | 92 ++ arch/arm64/boot/dts/rockchip/rk3366-sheep.dts | 879 ++++++++++++++++++ 3 files changed, 972 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3366-android.dtsi create mode 100644 arch/arm64/boot/dts/rockchip/rk3366-sheep.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index a443ccf3ee81..9c867911b349 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -1,6 +1,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3366-fpga.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3366-tb.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3366-sheep.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-p9.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3366-android.dtsi b/arch/arm64/boot/dts/rockchip/rk3366-android.dtsi new file mode 100644 index 000000000000..cb111b2cec8f --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3366-android.dtsi @@ -0,0 +1,92 @@ +/* + * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ +#include +#include + +/ { + compatible = "rockchip,android", "rockchip,rk3366"; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + drm_logo: drm-logo@00000000 { + compatible = "rockchip,drm-logo"; + reg = <0x0 0x0 0x0 0x0>; + }; + }; +}; + +&display_subsystem { + status = "okay"; + + memory-region = <&drm_logo>; + + route { + route_mipi: route-mipi { + logo,uboot = "logo.bmp"; + logo,kernel = "logo_kernel.bmp"; + logo,mode = "center"; + charge_logo,mode = "center"; + connect = <&vopb_out_mipi>; + status = "disabled"; + }; + + route_lvds: route-lvds { + logo,uboot = "logo.bmp"; + logo,kernel = "logo_kernel.bmp"; + logo,mode = "center"; + charge_logo,mode = "center"; + connect = <&vopb_out_lvds>; + status = "disabled"; + }; + }; +}; + +&vopb_mmu { + status = "okay"; +}; + +&vopb { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3366-sheep.dts b/arch/arm64/boot/dts/rockchip/rk3366-sheep.dts new file mode 100644 index 000000000000..6b995cb60736 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3366-sheep.dts @@ -0,0 +1,879 @@ +/* + * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include +#include "rk3366.dtsi" +#include "rk3366-android.dtsi" + +/ { + model = "Rockchip SDK sheep board"; + compatible = "rockchip,sheep", "rockchip,rk3366"; + + chosen { + bootargs = "earlycon=uart8250,mmio32,0xff690000 swiotlb=1 firmware_class.path=/system/vendor/firmware"; + }; + + fiq_debugger: fiq-debugger { + compatible = "rockchip,fiq-debugger"; + rockchip,serial-id = <2>; + rockchip,wake-irq = <0>; + rockchip,irq-mode-enable = <0>; /* If enable uart uses irq instead of fiq */ + rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */ + pinctrl-names = "default"; + pinctrl-0 = <&uart2_t1_xfer>; + interrupts = ; /* signal irq */ + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm0 0 25000 PWM_POLARITY_INVERTED>; + brightness-levels = < + 0 1 2 3 4 5 6 7 + 8 9 10 11 12 13 14 15 + 16 17 18 19 20 21 22 23 + 24 25 26 27 28 29 30 31 + 32 33 34 35 36 37 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255>; + default-brightness-level = <200>; + enable-gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>; + }; + + dwc_control_usb: dwc-control-usb { + compatible = "rockchip,rk3368-dwc-control-usb"; + rockchip,grf = <&grf>; + grf-offset = <0x049c>; /* GRF_SOC_STATUS for USB2.0 OTG */ + interrupts = , + , + , + ; + interrupt-names = "otg_id", "otg_bvalid", + "otg_linestate", "host0_linestate"; + clocks = <&cru SCLK_USBPHY480M>, <&cru HCLK_OTG>; + clock-names = "sclk_otgphy0", "otg"; + + usb_bc { + compatible = "inno,phy"; + regbase = &dwc_control_usb; + rk_usb,bvalid = <0x49c 23 1>; + rk_usb,iddig = <0x49c 26 1>; + rk_usb,vdmsrcen = <0x718 12 1>; + rk_usb,vdpsrcen = <0x718 11 1>; + rk_usb,rdmpden = <0x718 10 1>; + rk_usb,idpsrcen = <0x718 9 1>; + rk_usb,idmsinken = <0x718 8 1>; + rk_usb,idpsinken = <0x718 7 1>; + rk_usb,dpattach = <0x498 31 1>; + rk_usb,cpdet = <0x498 30 1>; + rk_usb,dcpattach = <0x498 29 1>; + }; + }; + + ext_gmac: external-gmac-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "ext_gmac"; + #clock-cells = <0>; + }; + + ion { + compatible = "rockchip,ion"; + #address-cells = <1>; + #size-cells = <0>; + + cma-heap { + reg = <0x00000000 0x02000000>; + }; + + system-heap { + }; + }; + + io-domains { + compatible = "rockchip,rk3366-io-voltage-domain"; + rockchip,grf = <&grf>; + + lcdc-supply = <&vcc_io>; + dvpts-supply = <&vcc_18>; + wifibt-supply = <&vccio_wl>; + audio-supply = <&vcc_io>; + sdcard-supply = <&vccio_sd>; + tphdsor-supply = <&vcc_io>; + }; + + i2c@2 { + compatible = "i2c-gpio"; + gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>, /* sda */ + <&gpio5 16 GPIO_ACTIVE_HIGH>; /* scl */ + i2c-gpio,delay-us = <2>; /* ~100 kHz */ + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_gpio>; + status = "disabled"; + + mpu6050@68 { + status = "disabled"; + compatible = "invensense,mpu6050"; + pinctrl-names = "default"; + pinctrl-0 = <&mpu6500_irq_gpio>; + reg = <0x68>; + irq-gpio = <&gpio5 18 IRQ_TYPE_EDGE_RISING>; + mpu-int_config = <0x10>; + mpu-level_shifter = <0>; + mpu-orientation = <0 1 0 1 0 0 0 0 1>; + orientation-x= <0>; + orientation-y= <1>; + orientation-z= <0>; + support-hw-poweroff = <0>; + mpu-debug = <1>; + }; + }; + + i2c@4 { + compatible = "i2c-gpio"; + gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>, /* sda */ + <&gpio5 8 GPIO_ACTIVE_HIGH>; /* scl */ + i2c-gpio,delay-us = <2>; /* ~100 kHz */ + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c4_gpio>; + status = "okay"; + + gt9xx: gt9xx@14 { + compatible = "goodix,gt9xx"; + reg = <0x14>; + touch-gpio = <&gpio5 11 IRQ_TYPE_LEVEL_LOW>; + reset-gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>; + max-x = <1200>; + max-y = <1900>; + tp-size = <911>; + tp-supply = <&vcc_tp>; + status = "okay"; + }; + }; + + ramoops_mem: ramoops_mem { + reg = <0x0 0x100000 0x0 0x100000>; + reg-names = "ramoops_mem"; + }; + + ramoops { + compatible = "ramoops"; + record-size = <0x0 0x10000>; + console-size = <0x0 0x80000>; + ftrace-size = <0x0 0x10000>; + pmsg-size = <0x0 0x50000>; + memory-region = <&ramoops_mem>; + }; + + rk_key: rockchip-key { + compatible = "rockchip,key"; + status = "okay"; + + io-channels = <&saradc 1>; + + vol-up-key { + linux,code = <115>; + label = "volume up"; + rockchip,adc_value = <1>; + }; + + vol-down-key { + linux,code = <114>; + label = "volume down"; + rockchip,adc_value = <170>; + }; + + power-key { + gpios = <&gpio0 11 GPIO_ACTIVE_LOW>; + linux,code = <116>; + label = "power"; + gpio-key,wakeup; + }; + + menu-key { + linux,code = <59>; + label = "menu"; + rockchip,adc_value = <355>; + }; + + home-key { + linux,code = <102>; + label = "home"; + rockchip,adc_value = <746>; + }; + + back-key { + linux,code = <158>; + label = "back"; + rockchip,adc_value = <560>; + }; + + camera-key { + linux,code = <212>; + label = "camera"; + rockchip,adc_value = <450>; + }; + }; + + rt5640-sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,name = "rockchip,rt5640-codec"; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,widgets = + "Microphone", "Mic Jack", + "Headphone", "Headphone Jack"; + simple-audio-card,routing = + "Mic Jack", "MICBIAS1", + "IN1P", "Mic Jack", + "Headphone Jack", "HPOL", + "Headphone Jack", "HPOR"; + simple-audio-card,cpu { + sound-dai = <&i2s_8ch>; + }; + simple-audio-card,codec { + sound-dai = <&rt5640>; + }; + }; + + spdif-sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "rockchip,spdif"; + simple-audio-card,cpu { + sound-dai = <&spdif>; + }; + simple-audio-card,codec { + sound-dai = <&spdif_out>; + }; + }; + + spdif_out: spdif-out { + compatible = "linux,spdif-dit"; + #sound-dai-cells = <0>; + }; + + vcc_sys: vcc-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3800000>; + regulator-max-microvolt = <3800000>; + }; + + vbus_host: vbus-host-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 16 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&host_vbus_drv>; + regulator-name = "vbus_host"; + }; + + vcc_phy: vcc-phy-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 25 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <ð_phy_pwr>; + regulator-name = "vcc_phy"; + regulator-always-on; + regulator-boot-on; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rk818 1>; + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + + /* + * On the module itself this is one of these (depending + * on the actual card populated): + * - SDIO_RESET_L_WL_REG_ON + * - PDN (power down when low) + */ + reset-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; /* GPIO0_B6 */ + }; + + wireless-wlan { + compatible = "wlan-platdata"; + rockchip,grf = <&grf>; + wifi_chip_type = "ap6335"; + sdio_vref = <1800>; + WIFI,host_wake_irq = <&gpio3 20 GPIO_ACTIVE_HIGH>; /* GPIO3_c4 */ + status = "okay"; + }; + + wireless-bluetooth { + compatible = "bluetooth-platdata"; + //wifi-bt-power-toggle; + uart_rts_gpios = <&gpio3 11 GPIO_ACTIVE_LOW>; /* GPIO3_b3 */ + pinctrl-names = "default","rts_gpio"; + pinctrl-0 = <&uart0_rts>; + pinctrl-1 = <&uart0_rts_gpio>; + //BT,power_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIO3_c3 */ + BT,reset_gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; /* GPIO3_c3 */ + BT,wake_gpio = <&gpio3 18 GPIO_ACTIVE_HIGH>; /* GPIO3_c2 */ + BT,wake_host_irq = <&gpio3 21 GPIO_ACTIVE_HIGH>; /* GPIO3_c5 */ + status = "okay"; + }; +}; + +&cpu0 { + cpu-supply = <&syr827>; +}; + +&cpu1 { + cpu-supply = <&syr827>; +}; + +&cpu2 { + cpu-supply = <&syr827>; +}; + +&cpu3 { + cpu-supply = <&syr827>; +}; + +&gpu { + mali-supply = <&vdd_logic>; + status = "okay"; +}; + +&gmac { + phy-supply = <&vcc_phy>; + phy-mode = "rgmii"; + clock_in_out = "input"; + snps,reset-gpio = <&gpio2 15 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 50000>; + assigned-clocks = <&cru SCLK_MAC>; + assigned-clock-parents = <&ext_gmac>; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + tx_delay = <0x25>; + rx_delay = <0x1d>; + status = "okay"; +}; + +&i2c0 { + status = "okay"; + i2c-scl-rising-time-ns = <250>; + i2c-scl-falling-time-ns = <20>; + + syr827: syr827@40 { + regulator-name = "vdd_arm"; + compatible = "silergy,syr827"; + status = "okay"; + reg = <0x40>; + regulator-compatible = "fan53555-reg"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; + fcs,suspend-voltage-selector = <1>; + regulator-always-on; + regulator-boot-on; + regulator-initial-state = <3>; + regulator-ramp-delay = <2000>; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + rk818: pmic@1c { + compatible = "rockchip,rk818"; + status = "okay"; + reg = <0x1c>; + clock-output-names = "xin32k", "wifibt_32kin"; + interrupt-parent = <&gpio0>; + interrupts = <2 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; + wakeup-source; + #clock-cells = <1>; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc6-supply = <&vcc_sys>; + vcc7-supply = <&vcc_sys>; + vcc8-supply = <&vcc_sys>; + vcc9-supply = <&vcc_io>; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name = "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1450000>; + regulator-ramp-delay = <6001>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-name = "vdd_gpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1250000>; + regulator-ramp-delay = <6001>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_io: DCDC_REG4 { + regulator-name = "vcc_io"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca_codec: LDO_REG1 { + regulator-name = "vcca_codec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_tp: LDO_REG2 { + regulator-name = "vcc_tp"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3000000>; + }; + }; + + vdd_10: LDO_REG3 { + regulator-name = "vdd_10"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc18_lcd: LDO_REG4 { + regulator-name = "vcc18_lcd"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vccio_pmu: LDO_REG5 { + regulator-name = "vccio_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd10_lcd: LDO_REG6 { + regulator-name = "vdd10_lcd"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc_18: LDO_REG7 { + regulator-name = "vcc_18"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vccio_wl: LDO_REG8 { + regulator-name = "vccio_wl"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vccio_sd: LDO_REG9 { + regulator-name = "vccio_sd"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_sd: SWITCH_REG { + regulator-name = "vcc_sd"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + }; + + battery { + compatible = "rk818-battery"; + ocv_table = <3400 3650 3693 3707 3731 3749 3760 + 3770 3782 3796 3812 3829 3852 3882 + 3915 3951 3981 4047 4086 4132 4182>; + design_capacity = <7916>; + design_qmax = <8708>; + bat_res = <65>; + max_input_current = <2000>; + max_chrg_current = <1600>; + max_chrg_voltage = <4200>; + sleep_enter_current = <300>; + sleep_exit_current = <300>; + power_off_thresd = <3400>; + zero_algorithm_vol = <3850>; + fb_temperature = <105>; + sample_res = <20>; + max_soc_offset = <60>; + energy_mode = <0>; + monitor_sec = <5>; + virtual_power = <0>; + power_dc2otg = <0>; + }; + }; +}; + +&i2c1 { + status = "okay"; + i2c-scl-rising-time-ns = <460>; + i2c-scl-falling-time-ns = <15>; + + rt5640: rt5640@1c { + #sound-dai-cells = <0>; + compatible = "realtek,rt5640"; + reg = <0x1c>; + clocks = <&cru SCLK_I2S_8CH_OUT>; + clock-names = "mclk"; + realtek,in1-differential; + }; +}; + +&i2s_8ch { + status = "okay"; + rockchip,i2s-broken-burst-len; + rockchip,playback-channels = <8>; + rockchip,capture-channels = <2>; + #sound-dai-cells = <0>; +}; + +&spdif { + status = "okay"; + #sound-dai-cells = <0>; +}; + +&dsi { + status = "okay"; + + panel: panel@0 { + compatible = "simple-panel-dsi"; + reg = <0>; + backlight = <&backlight>; + enable-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; + + delay,prepare = <20>; + delay,enable = <20>; + + dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST)>; + dsi,format = ; + dsi,lanes = <4>; + + display-timings { + native-mode = <&timing0>; + + timing0: timing0 { + clock-frequency = <135000000>; + hactive = <1200>; + vactive = <1920>; + hfront-porch = <80>; + hsync-len = <20>; + hback-porch = <80>; + vfront-porch = <21>; + vsync-len = <3>; + vback-porch = <21>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + }; + }; +}; + +&pwm0 { + status = "okay"; +}; + +&rga { + status = "okay"; +}; + +&route_mipi { + status = "okay"; +}; + +&video_phy { + status = "okay"; + rockchip,dsi-panel = <&panel>; +}; + +&dwc_control_usb { + otg_drv_gpio = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO_B2 = 10 */ + + rockchip,remote_wakeup; + rockchip,usb_irq_wakeup; +}; + +&usb_host0_ehci { + assigned-clocks = <&cru SCLK_USBPHY480M>; + assigned-clock-parents = <&u2phy>; + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_otg { + clocks = <&cru SCLK_USBPHY480M>, <&cru HCLK_OTG>; + clock-names = "usbphy_480m", "otg"; + resets = <&cru SRST_USBOTG_AHB>, + <&cru SRST_USBOTG_PHY>, + <&cru SRST_USBOTG_CON>; + reset-names = "otg_ahb", "otg_phy", "otg_controller"; + /* 0 - Normal, 1 - Force Host, 2 - Force Device */ + rockchip,usb-mode = <0>; + status = "okay"; +}; + +&u2phy_host { + phy-supply = <&vbus_host>; +}; + +&pinctrl { + mpu6500 { + mpu6500_irq_gpio: mpu6500-irq-gpio { + rockchip,pins = <5 18 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifienable-h { + rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + wireless-bluetooth { + uart0_rts_gpio: uart0-rts-gpios { + rockchip,pins = <3 11 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pvtm { + status = "okay"; +}; + +&pmu_pvtm { + status = "okay"; +}; + +&emmc { + clock-frequency = <100000000>; + clock-freq-min-max = <400000 100000000>; + supports-emmc; + bus-width = <8>; + cap-mmc-highspeed; + disable-wp; + non-removable; + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>; + status = "okay"; +}; + +&nandc0 { + status = "okay"; /* enable both for emmc and nand */ +}; + +&sdmmc { + clock-frequency = <37500000>; + clock-freq-min-max = <400000 37500000>; + supports-sd; + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + card-detect-delay = <200>; + disable-wp; + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; + status = "okay"; +}; + +&sdio { + clock-frequency = <37500000>; + clock-freq-min-max = <200000 37500000>; + supports-sdio; + bus-width = <4>; + disable-wp; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + mmc-pwrseq = <&sdio_pwrseq>; + non-removable; + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&sdio_bus4 &sdio_cmd &sdio_clk>; + sd-uhs-sdr104; + status = "okay"; +}; + +&saradc { + status = "okay"; +}; + +&tsadc { + status = "okay"; +}; + +&uart0 { + status = "okay"; + pinctrl-0 = <&uart0_xfer &uart0_cts>; +}; -- 2.34.1